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-rw-r--r--drivers/acpi/acpica/hwxface.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/acpi/acpica/hwxface.c b/drivers/acpi/acpica/hwxface.c
index 50cc3be77724..f75f81ad15c9 100644
--- a/drivers/acpi/acpica/hwxface.c
+++ b/drivers/acpi/acpica/hwxface.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
@@ -80,14 +80,14 @@ acpi_status acpi_reset(void)
80 80
81 if (reset_reg->space_id == ACPI_ADR_SPACE_SYSTEM_IO) { 81 if (reset_reg->space_id == ACPI_ADR_SPACE_SYSTEM_IO) {
82 /* 82 /*
83 * For I/O space, write directly to the OSL. This bypasses the port 83 * For I/O space, write directly to the OSL. This
84 * validation mechanism, which may block a valid write to the reset 84 * bypasses the port validation mechanism, which may
85 * register. 85 * block a valid write to the reset register. Spec
86 * section 4.7.3.6 requires register width to be 8.
86 */ 87 */
87 status = 88 status =
88 acpi_os_write_port((acpi_io_address) reset_reg->address, 89 acpi_os_write_port((acpi_io_address) reset_reg->address,
89 acpi_gbl_FADT.reset_value, 90 acpi_gbl_FADT.reset_value, 8);
90 reset_reg->bit_width);
91 } else { 91 } else {
92 /* Write the reset value to the reset register */ 92 /* Write the reset value to the reset register */
93 93