215 files changed, 1918 insertions, 1275 deletions
diff --git a/arch/Kconfig b/arch/Kconfig
index dd0e8eb8042f..a4429bcd609e 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -213,6 +213,9 @@ config USE_GENERIC_SMP_HELPERS
 config GENERIC_SMP_IDLE_THREAD
       bool
+config GENERIC_IDLE_POLL_SETUP
+       bool
 # Select if arch init_task initializer is different to init/init_task.c
 config ARCH_INIT_TASK
       bool
diff --git a/arch/arc/boot/dts/abilis_tb100_dvk.dts b/arch/arc/boot/dts/abilis_tb100_dvk.dts
index c0fd3623c393..0fa0d4abe795 100644
--- a/arch/arc/boot/dts/abilis_tb100_dvk.dts
+++ b/arch/arc/boot/dts/abilis_tb100_dvk.dts
@@ -37,7 +37,7 @@
        soc100 {
                uart@FF100000 {
-                        pinctrl-names = "abilis,simple-default";
+                        pinctrl-names = "default";
                        pinctrl-0 = <&pctl_uart0>;
                };
                ethernet@FE100000 {
diff --git a/arch/arc/boot/dts/abilis_tb101_dvk.dts b/arch/arc/boot/dts/abilis_tb101_dvk.dts
index 6f8c381f6268..a4d80ce283ae 100644
--- a/arch/arc/boot/dts/abilis_tb101_dvk.dts
+++ b/arch/arc/boot/dts/abilis_tb101_dvk.dts
@@ -37,7 +37,7 @@
        soc100 {
                uart@FF100000 {
-                        pinctrl-names = "abilis,simple-default";
+                        pinctrl-names = "default";
                        pinctrl-0 = <&pctl_uart0>;
                };
                ethernet@FE100000 {
diff --git a/arch/arc/boot/dts/abilis_tb10x.dtsi b/arch/arc/boot/dts/abilis_tb10x.dtsi
index a6139fc5aaa3..b97e3051ba4b 100644
--- a/arch/arc/boot/dts/abilis_tb10x.dtsi
+++ b/arch/arc/boot/dts/abilis_tb10x.dtsi
@@ -88,8 +88,7 @@
                };
                uart@FF100000 {
-                        compatible = "snps,dw-apb-uart",
+                        compatible = "snps,dw-apb-uart";
-                                        "abilis,simple-pinctrl";
                        reg = <0xFF100000 0x100>;
                        clock-frequency = <166666666>;
                        interrupts = <25 1>;
@@ -184,8 +183,7 @@
                        #address-cells = <1>;
                        #size-cells = <0>;
                        cell-index = <1>;
-                        compatible = "abilis,tb100-spi",
+                        compatible = "abilis,tb100-spi";
-                                        "abilis,simple-pinctrl";
                        num-cs = <2>;
                        reg = <0xFE011000 0x20>;
                        interrupt-parent = <&tb10x_ictl>;
diff --git a/arch/arc/include/asm/cacheflush.h b/arch/arc/include/asm/cacheflush.h
index 9f841af41092..ef62682e8d95 100644
--- a/arch/arc/include/asm/cacheflush.h
+++ b/arch/arc/include/asm/cacheflush.h
@@ -93,14 +93,16 @@ static inline int cache_is_vipt_aliasing(void)
 #endif
 }
-#define CACHE_COLOR(addr)       (((unsigned long)(addr) >> (PAGE_SHIFT)) & 3)
+#define CACHE_COLOR(addr)       (((unsigned long)(addr) >> (PAGE_SHIFT)) & 1)
 /*
 * checks if two addresses (after page aligning) index into same cache set
 */
 #define addr_not_cache_congruent(addr1, addr2)                          \
+({                                                                      \
        cache_is_vipt_aliasing() ?                                      \
-                (CACHE_COLOR(addr1) != CACHE_COLOR(addr2)) : 0          \
+                (CACHE_COLOR(addr1) != CACHE_COLOR(addr2)) : 0;         \
+})
 #define copy_to_user_page(vma, page, vaddr, dst, src, len)              \
 do {                                                                    \
diff --git a/arch/arc/include/asm/page.h b/arch/arc/include/asm/page.h
index 374a35514116..ab84bf131fe1 100644
--- a/arch/arc/include/asm/page.h
+++ b/arch/arc/include/asm/page.h
@@ -19,13 +19,6 @@
 #define clear_page(paddr)               memset((paddr), 0, PAGE_SIZE)
 #define copy_page(to, from)             memcpy((to), (from), PAGE_SIZE)
-#ifndef CONFIG_ARC_CACHE_VIPT_ALIASING
-#define clear_user_page(addr, vaddr, pg)        clear_page(addr)
-#define copy_user_page(vto, vfrom, vaddr, pg)   copy_page(vto, vfrom)
-#else   /* VIPT aliasing dcache */
 struct vm_area_struct;
 struct page;
@@ -35,8 +28,6 @@ void copy_user_highpage(struct page *to, struct page *from,
                        unsigned long u_vaddr, struct vm_area_struct *vma);
 void clear_user_page(void *to, unsigned long u_vaddr, struct page *page);
-#endif  /* CONFIG_ARC_CACHE_VIPT_ALIASING */
 #undef STRICT_MM_TYPECHECKS
 #ifdef STRICT_MM_TYPECHECKS
diff --git a/arch/arc/include/asm/pgtable.h b/arch/arc/include/asm/pgtable.h
index 1cc4720faccb..95b1522212a7 100644
--- a/arch/arc/include/asm/pgtable.h
+++ b/arch/arc/include/asm/pgtable.h
@@ -57,9 +57,9 @@
 #define _PAGE_ACCESSED      (1<<1)      /* Page is accessed (S) */
 #define _PAGE_CACHEABLE     (1<<2)      /* Page is cached (H) */
-#define _PAGE_EXECUTE       (1<<3)      /* Page has user execute perm (H) */
+#define _PAGE_U_EXECUTE     (1<<3)      /* Page has user execute perm (H) */
-#define _PAGE_WRITE         (1<<4)      /* Page has user write perm (H) */
+#define _PAGE_U_WRITE       (1<<4)      /* Page has user write perm (H) */
-#define _PAGE_READ          (1<<5)      /* Page has user read perm (H) */
+#define _PAGE_U_READ        (1<<5)      /* Page has user read perm (H) */
 #define _PAGE_K_EXECUTE     (1<<6)      /* Page has kernel execute perm (H) */
 #define _PAGE_K_WRITE       (1<<7)      /* Page has kernel write perm (H) */
 #define _PAGE_K_READ        (1<<8)      /* Page has kernel perm (H) */
@@ -72,9 +72,9 @@
 /* PD1 */
 #define _PAGE_CACHEABLE     (1<<0)      /* Page is cached (H) */
-#define _PAGE_EXECUTE       (1<<1)      /* Page has user execute perm (H) */
+#define _PAGE_U_EXECUTE     (1<<1)      /* Page has user execute perm (H) */
-#define _PAGE_WRITE         (1<<2)      /* Page has user write perm (H) */
+#define _PAGE_U_WRITE       (1<<2)      /* Page has user write perm (H) */
-#define _PAGE_READ          (1<<3)      /* Page has user read perm (H) */
+#define _PAGE_U_READ        (1<<3)      /* Page has user read perm (H) */
 #define _PAGE_K_EXECUTE     (1<<4)      /* Page has kernel execute perm (H) */
 #define _PAGE_K_WRITE       (1<<5)      /* Page has kernel write perm (H) */
 #define _PAGE_K_READ        (1<<6)      /* Page has kernel perm (H) */
@@ -93,7 +93,8 @@
 #endif
 /* Kernel allowed all permissions for all pages */
-#define _K_PAGE_PERMS  (_PAGE_K_EXECUTE | _PAGE_K_WRITE | _PAGE_K_READ)
+#define _K_PAGE_PERMS  (_PAGE_K_EXECUTE | _PAGE_K_WRITE | _PAGE_K_READ | \
+                        _PAGE_GLOBAL | _PAGE_PRESENT)
 #ifdef CONFIG_ARC_CACHE_PAGES
 #define _PAGE_DEF_CACHEABLE _PAGE_CACHEABLE
@@ -106,7 +107,11 @@
 * -by default cached, unless config otherwise
 * -present in memory
 */
-#define ___DEF (_PAGE_PRESENT | _K_PAGE_PERMS | _PAGE_DEF_CACHEABLE)
+#define ___DEF (_PAGE_PRESENT | _PAGE_DEF_CACHEABLE)
+#define _PAGE_READ      (_PAGE_U_READ    | _PAGE_K_READ)
+#define _PAGE_WRITE     (_PAGE_U_WRITE   | _PAGE_K_WRITE)
+#define _PAGE_EXECUTE   (_PAGE_U_EXECUTE | _PAGE_K_EXECUTE)
 /* Set of bits not changed in pte_modify */
 #define _PAGE_CHG_MASK  (PAGE_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED)
@@ -125,11 +130,10 @@
 * kernel vaddr space - visible in all addr spaces, but kernel mode only
 * Thus Global, all-kernel-access, no-user-access, cached
 */
-#define PAGE_KERNEL          __pgprot(___DEF | _PAGE_GLOBAL)
+#define PAGE_KERNEL          __pgprot(_K_PAGE_PERMS | _PAGE_DEF_CACHEABLE)
 /* ioremap */
-#define PAGE_KERNEL_NO_CACHE __pgprot(_PAGE_PRESENT | _K_PAGE_PERMS | \
+#define PAGE_KERNEL_NO_CACHE __pgprot(_K_PAGE_PERMS)
-                                                     _PAGE_GLOBAL)
 /**************************************************************************
 * Mapping of vm_flags (Generic VM) to PTE flags (arch specific)
diff --git a/arch/arc/include/asm/tlb.h b/arch/arc/include/asm/tlb.h
index 85b6df839bd7..cb0c708ca665 100644
--- a/arch/arc/include/asm/tlb.h
+++ b/arch/arc/include/asm/tlb.h
@@ -16,7 +16,7 @@
 /* Masks for actual TLB "PD"s */
 #define PTE_BITS_IN_PD0 (_PAGE_GLOBAL | _PAGE_PRESENT)
 #define PTE_BITS_IN_PD1 (PAGE_MASK | _PAGE_CACHEABLE | \
-                         _PAGE_EXECUTE | _PAGE_WRITE | _PAGE_READ | \
+                         _PAGE_U_EXECUTE | _PAGE_U_WRITE | _PAGE_U_READ | \
                         _PAGE_K_EXECUTE | _PAGE_K_WRITE | _PAGE_K_READ)
 #ifndef __ASSEMBLY__
diff --git a/arch/arc/mm/cache_arc700.c b/arch/arc/mm/cache_arc700.c
index 2f12bca8aef3..aedce1905441 100644
--- a/arch/arc/mm/cache_arc700.c
+++ b/arch/arc/mm/cache_arc700.c
@@ -610,7 +610,7 @@ void __sync_icache_dcache(unsigned long paddr, unsigned long vaddr, int len)
        local_irq_save(flags);
        __ic_line_inv_vaddr(paddr, vaddr, len);
-        __dc_line_op(paddr, vaddr, len, OP_FLUSH);
+        __dc_line_op(paddr, vaddr, len, OP_FLUSH_N_INV);
        local_irq_restore(flags);
 }
@@ -676,6 +676,17 @@ void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
        flush_cache_all();
 }
+void flush_anon_page(struct vm_area_struct *vma, struct page *page,
+                     unsigned long u_vaddr)
+{
+        /* TBD: do we really need to clear the kernel mapping */
+        __flush_dcache_page(page_address(page), u_vaddr);
+        __flush_dcache_page(page_address(page), page_address(page));
+}
+#endif
 void copy_user_highpage(struct page *to, struct page *from,
        unsigned long u_vaddr, struct vm_area_struct *vma)
 {
@@ -725,16 +736,6 @@ void clear_user_page(void *to, unsigned long u_vaddr, struct page *page)
        set_bit(PG_arch_1, &page->flags);
 }
-void flush_anon_page(struct vm_area_struct *vma, struct page *page,
-                     unsigned long u_vaddr)
-{
-        /* TBD: do we really need to clear the kernel mapping */
-        __flush_dcache_page(page_address(page), u_vaddr);
-        __flush_dcache_page(page_address(page), page_address(page));
-}
-#endif
 /**********************************************************************
 * Explicit Cache flush request from user space via syscall
diff --git a/arch/arc/mm/tlb.c b/arch/arc/mm/tlb.c
index 066145b5f348..fe1c5a073afe 100644
--- a/arch/arc/mm/tlb.c
+++ b/arch/arc/mm/tlb.c
@@ -444,7 +444,8 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long vaddr_unaligned,
         *             so userspace sees the right data.
         *  (Avoids the flush for Non-exec + congruent mapping case)
         */
-        if (vma->vm_flags & VM_EXEC || addr_not_cache_congruent(paddr, vaddr)) {
+        if ((vma->vm_flags & VM_EXEC) ||
+             addr_not_cache_congruent(paddr, vaddr)) {
                struct page *page = pfn_to_page(pte_pfn(*ptep));
                int dirty = test_and_clear_bit(PG_arch_1, &page->flags);
diff --git a/arch/arc/mm/tlbex.S b/arch/arc/mm/tlbex.S
index 9df765dc7c3a..3357d26ffe54 100644
--- a/arch/arc/mm/tlbex.S
+++ b/arch/arc/mm/tlbex.S
@@ -277,7 +277,7 @@ ARC_ENTRY EV_TLBMissI
        ;----------------------------------------------------------------
        ; VERIFY_PTE: Check if PTE permissions approp for executing code
        cmp_s   r2, VMALLOC_START
-        mov.lo  r2, (_PAGE_PRESENT | _PAGE_READ | _PAGE_EXECUTE)
+        mov.lo  r2, (_PAGE_PRESENT | _PAGE_U_READ | _PAGE_U_EXECUTE)
        mov.hs  r2, (_PAGE_PRESENT | _PAGE_K_READ | _PAGE_K_EXECUTE)
        and     r3, r0, r2  ; Mask out NON Flag bits from PTE
@@ -320,9 +320,9 @@ ARC_ENTRY EV_TLBMissD
        mov_s   r2, 0
        lr      r3, [ecr]
        btst_s  r3, ECR_C_BIT_DTLB_LD_MISS      ; Read Access
-        or.nz   r2, r2, _PAGE_READ              ; chk for Read flag in PTE
+        or.nz   r2, r2, _PAGE_U_READ            ; chk for Read flag in PTE
        btst_s  r3, ECR_C_BIT_DTLB_ST_MISS      ; Write Access
-        or.nz   r2, r2, _PAGE_WRITE             ; chk for Write flag in PTE
+        or.nz   r2, r2, _PAGE_U_WRITE           ; chk for Write flag in PTE
        ; Above laddering takes care of XCHG access
        ;   which is both Read and Write
diff --git a/arch/arc/plat-tb10x/tb10x.c b/arch/arc/plat-tb10x/tb10x.c
index d3567691c7e1..06cb30929460 100644
--- a/arch/arc/plat-tb10x/tb10x.c
+++ b/arch/arc/plat-tb10x/tb10x.c
@@ -34,31 +34,6 @@ static void __init tb10x_platform_init(void)
        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 }
-static void __init tb10x_platform_late_init(void)
-{
-        struct device_node *dn;
-        /*
-         * Pinctrl documentation recommends setting up the iomux here for
-         * all modules which don't require control over the pins themselves.
-         * Modules which need this kind of assistance are compatible with
-         * "abilis,simple-pinctrl", i.e. we can easily iterate over them.
-         * TODO: Does this recommended method work cleanly with pins required
-         * by modules?
-         */
-        for_each_compatible_node(dn, NULL, "abilis,simple-pinctrl") {
-                struct platform_device *pd = of_find_device_by_node(dn);
-                struct pinctrl *pctl;
-                pctl = pinctrl_get_select(&pd->dev, "abilis,simple-default");
-                if (IS_ERR(pctl)) {
-                        int ret = PTR_ERR(pctl);
-                        dev_err(&pd->dev, "Could not set up pinctrl: %d\n",
-                                ret);
-                }
-        }
-}
 static const char *tb10x_compat[] __initdata = {
        "abilis,arc-tb10x",
        NULL,
@@ -67,5 +42,4 @@ static const char *tb10x_compat[] __initdata = {
 MACHINE_START(TB10x, "tb10x")
        .dt_compat      = tb10x_compat,
        .init_machine   = tb10x_platform_init,
-        .init_late      = tb10x_platform_late_init,
 MACHINE_END
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d423d58f938d..49d993cee512 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -38,6 +38,7 @@ config ARM
        select HAVE_GENERIC_HARDIRQS
        select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
        select HAVE_IDE if PCI || ISA || PCMCIA
+        select HAVE_IRQ_TIME_ACCOUNTING
        select HAVE_KERNEL_GZIP
        select HAVE_KERNEL_LZMA
        select HAVE_KERNEL_LZO
@@ -488,7 +489,7 @@ config ARCH_IXP4XX
 config ARCH_DOVE
        bool "Marvell Dove"
        select ARCH_REQUIRE_GPIOLIB
-        select CPU_V7
+        select CPU_PJ4
        select GENERIC_CLOCKEVENTS
        select MIGHT_HAVE_PCI
        select PINCTRL
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 47374085befd..1ba358ba16b8 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -309,7 +309,7 @@ define archhelp
  echo  '  Image         - Uncompressed kernel image (arch/$(ARCH)/boot/Image)'
  echo  '* xipImage      - XIP kernel image, if configured (arch/$(ARCH)/boot/xipImage)'
  echo  '  uImage        - U-Boot wrapped zImage'
-  echo  '  bootpImage    - Combined zImage and initial RAM disk' 
+  echo  '  bootpImage    - Combined zImage and initial RAM disk'
  echo  '                  (supply initrd image via make variable INITRD=<path>)'
  echo  '* dtbs          - Build device tree blobs for enabled boards'
  echo  '  install       - Install uncompressed kernel'
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index b9f7121e6ecf..f0895c581a89 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -177,7 +177,9 @@ dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \
        spear320-evb.dtb \
        spear320-hmi.dtb
 dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb
-dtb-$(CONFIG_ARCH_SUNXI) += sun4i-a10-cubieboard.dtb \
+dtb-$(CONFIG_ARCH_SUNXI) += \
+        sun4i-a10-cubieboard.dtb \
+        sun4i-a10-mini-xplus.dtb \
        sun4i-a10-hackberry.dtb \
        sun5i-a13-olinuxino.dtb
 dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index 272bbc65fab0..550eb772c30e 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -33,7 +33,8 @@
                #size-cells = <1>;
                compatible = "simple-bus";
                interrupt-parent = <&mpic>;
-                ranges = <0 0 0xd0000000 0x100000>;
+                ranges = <0          0 0xd0000000 0x0100000 /* internal registers */
+                          0xe0000000 0 0xe0000000 0x8100000 /* PCIe */>;
                internal-regs {
                        compatible = "simple-bus";
diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index b2c1b5af9749..aee2b1866ce2 100644
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -29,7 +29,8 @@
        };
        soc {
-                ranges = <0 0xd0000000 0x100000>;
+                ranges = <0          0xd0000000 0x0100000 /* internal registers */
+                          0xe0000000 0xe0000000 0x8100000 /* PCIe */>;
                internal-regs {
                        system-controller@18200 {
                                compatible = "marvell,armada-370-xp-system-controller";
@@ -38,12 +39,12 @@
                        L2: l2-cache {
                                compatible = "marvell,aurora-outer-cache";
-                                reg = <0xd0008000 0x1000>;
+                                reg = <0x08000 0x1000>;
                                cache-id-part = <0x100>;
                                wt-override;
                        };
-                        mpic: interrupt-controller@20000 {
+                        interrupt-controller@20000 {
                                reg = <0x20a00 0x1d0>, <0x21870 0x58>;
                        };
diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts
index 26ad06fc147e..3ee63d128e27 100644
--- a/arch/arm/boot/dts/armada-xp-gp.dts
+++ b/arch/arm/boot/dts/armada-xp-gp.dts
@@ -39,6 +39,9 @@
        };
        soc {
+                ranges = <0          0 0xd0000000 0x100000
+                          0xf0000000 0 0xf0000000 0x1000000>;
                internal-regs {
                        serial@12000 {
                                clock-frequency = <250000000>;
diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
index f14d36c46159..46b785064dd8 100644
--- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
+++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
@@ -27,6 +27,9 @@
        };
        soc {
+                ranges = <0          0 0xd0000000 0x100000
+                          0xf0000000 0 0xf0000000 0x8000000>;
                internal-regs {
                        serial@12000 {
                                clock-frequency = <250000000>;
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index bacab11c10dc..5b902f9a3af2 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -31,7 +31,7 @@
                                wt-override;
                        };
-                        mpic: interrupt-controller@20000 {
+                        interrupt-controller@20000 {
                              reg = <0x20a00 0x2d0>, <0x21070 0x58>;
                        };
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index 70b5ccbac234..84c4bef2d726 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -264,7 +264,7 @@
                                                atmel,pins =
                                                        <0 10 0x2 0x0   /* PA10 periph B */
                                                         0 11 0x2 0x0   /* PA11 periph B */
-                                                         0 24 0x2 0x0   /* PA24 periph B */
+                                                         0 22 0x2 0x0   /* PA22 periph B */
                                                         0 25 0x2 0x0   /* PA25 periph B */
                                                         0 26 0x2 0x0   /* PA26 periph B */
                                                         0 27 0x2 0x0   /* PA27 periph B */
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 3de8e6dfbcb1..8d25f889928e 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -57,6 +57,7 @@
                                compatible = "atmel,at91rm9200-aic";
                                interrupt-controller;
                                reg = <0xfffff000 0x200>;
+                                atmel,external-irqs = <31>;
                        };
                        ramc0: ramc@ffffe800 {
diff --git a/arch/arm/boot/dts/at91sam9x25ek.dts b/arch/arm/boot/dts/at91sam9x25ek.dts
index 3b40d11d65e7..315250b4995e 100644
--- a/arch/arm/boot/dts/at91sam9x25ek.dts
+++ b/arch/arm/boot/dts/at91sam9x25ek.dts
@@ -11,7 +11,7 @@
 /include/ "at91sam9x5ek.dtsi"
 / {
-        model = "Atmel AT91SAM9G25-EK";
+        model = "Atmel AT91SAM9X25-EK";
        compatible = "atmel,at91sam9x25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
        ahb {
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 82a404da1c0d..99ba6e14ebf3 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -516,7 +516,7 @@
                usb_otg_hs: usb_otg_hs@480ab000 {
                        compatible = "ti,omap3-musb";
                        reg = <0x480ab000 0x1000>;
-                        interrupts = <0 92 0x4>, <0 93 0x4>;
+                        interrupts = <92>, <93>;
                        interrupt-names = "mc", "dma";
                        ti,hwmods = "usb_otg_hs";
                        multipoint = <1>;
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 2e643ea51cce..5000e0d42849 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -75,11 +75,6 @@
                                compatible = "atmel,at91sam9x5-spi";
                                reg = <0xf0004000 0x100>;
                                interrupts = <24 4 3>;
-                                cs-gpios = <&pioD 13 0
-                                            &pioD 14 0 /* conflicts with SCK0 and CANRX0 */
-                                            &pioD 15 0 /* conflicts with CTS0 and CANTX0 */
-                                            &pioD 16 0 /* conflicts with RTS0 and PWMFI3 */
-                                           >;
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_spi0>;
                                status = "disabled";
@@ -156,7 +151,7 @@
                        };
                        macb0: ethernet@f0028000 {
-                                compatible = "cnds,pc302-gem", "cdns,gem";
+                                compatible = "cdns,pc302-gem", "cdns,gem";
                                reg = <0xf0028000 0x100>;
                                interrupts = <34 4 3>;
                                pinctrl-names = "default";
@@ -203,11 +198,6 @@
                                compatible = "atmel,at91sam9x5-spi";
                                reg = <0xf8008000 0x100>;
                                interrupts = <25 4 3>;
-                                cs-gpios = <&pioC 25 0
-                                            &pioC 26 0 /* conflitcs with TWD1 and ISI_D11 */
-                                            &pioC 27 0 /* conflitcs with TWCK1 and ISI_D10 */
-                                            &pioC 28 0 /* conflitcs with PWMFI0 and ISI_D9 */
-                                           >;
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_spi1>;
                                status = "disabled";
diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi
index 1f8ed404626c..b336e7787cb3 100644
--- a/arch/arm/boot/dts/sama5d3xcm.dtsi
+++ b/arch/arm/boot/dts/sama5d3xcm.dtsi
@@ -32,6 +32,10 @@
        ahb {
                apb {
+                        spi0: spi@f0004000 {
+                                cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
+                        };
                        macb0: ethernet@f0028000 {
                                phy-mode = "rgmii";
                        };
diff --git a/arch/arm/boot/dts/ste-nomadik-s8815.dts b/arch/arm/boot/dts/ste-nomadik-s8815.dts
index b28fbf3408e3..6f82d9368948 100644
--- a/arch/arm/boot/dts/ste-nomadik-s8815.dts
+++ b/arch/arm/boot/dts/ste-nomadik-s8815.dts
@@ -14,13 +14,19 @@
                bootargs = "root=/dev/ram0 console=ttyAMA1,115200n8 earlyprintk";
        };
+        /* This is where the interrupt is routed on the S8815 board */
+        external-bus@34000000 {
+                ethernet@300 {
+                        interrupt-parent = <&gpio3>;
+                        interrupts = <8 0x1>;
+                };
+        };
        /* Custom board node with GPIO pins to active etc */
        usb-s8815 {
                /* The S8815 is using this very GPIO pin for the SMSC91x IRQs */
                ethernet-gpio {
-                        gpios = <&gpio3 19 0x1>;
+                        gpios = <&gpio3 8 0x1>;
-                        interrupts = <19 0x1>;
-                        interrupt-parent = <&gpio3>;
                };
                /* This will bias the MMC/SD card detect line */
                mmcsd-gpio {
diff --git a/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts b/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts
index 4a7c35d6726a..078ed7f618d7 100644
--- a/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts
+++ b/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts
@@ -22,8 +22,8 @@
                bootargs = "earlyprintk console=ttyS0,115200";
        };
-        soc {
+        soc@01c20000 {
-                uart0: uart@01c28000 {
+                uart0: serial@01c28000 {
                        pinctrl-names = "default";
                        pinctrl-0 = <&uart0_pins_a>;
                        status = "okay";
diff --git a/arch/arm/common/mcpm_platsmp.c b/arch/arm/common/mcpm_platsmp.c
index 52b88d81b7bb..3caed0db6986 100644
--- a/arch/arm/common/mcpm_platsmp.c
+++ b/arch/arm/common/mcpm_platsmp.c
@@ -15,8 +15,6 @@
 #include <linux/smp.h>
 #include <linux/spinlock.h>
-#include <linux/irqchip/arm-gic.h>
 #include <asm/mcpm.h>
 #include <asm/smp.h>
 #include <asm/smp_plat.h>
@@ -49,7 +47,6 @@ static int __cpuinit mcpm_boot_secondary(unsigned int cpu, struct task_struct *i
 static void __cpuinit mcpm_secondary_init(unsigned int cpu)
 {
        mcpm_cpu_powered_up();
-        gic_secondary_init(0);
 }
 #ifdef CONFIG_HOTPLUG_CPU
diff --git a/arch/arm/configs/omap1_defconfig b/arch/arm/configs/omap1_defconfig
index 7e0ebb64a7f9..9940f7b4e438 100644
--- a/arch/arm/configs/omap1_defconfig
+++ b/arch/arm/configs/omap1_defconfig
@@ -199,7 +199,6 @@ CONFIG_USB_PHY=y
 CONFIG_USB_DEBUG=y
 CONFIG_USB_DEVICEFS=y
 # CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_SUSPEND=y
 CONFIG_USB_MON=y
 CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_STORAGE=y
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index c1ef64bc5abd..abbe31937c65 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -20,6 +20,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 CONFIG_MODVERSIONS=y
 CONFIG_MODULE_SRCVERSION_ALL=y
 # CONFIG_BLK_DEV_BSG is not set
+CONFIG_ARCH_MULTI_V6=y
 CONFIG_ARCH_OMAP2PLUS=y
 CONFIG_OMAP_RESET_CLOCKS=y
 CONFIG_OMAP_MUX_DEBUG=y
@@ -204,7 +205,6 @@ CONFIG_USB=y
 CONFIG_USB_DEBUG=y
 CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
 CONFIG_USB_DEVICEFS=y
-CONFIG_USB_SUSPEND=y
 CONFIG_USB_MON=y
 CONFIG_USB_WDM=y
 CONFIG_USB_STORAGE=y
diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig
index a5f0485133cf..f7ba316164d4 100644
--- a/arch/arm/configs/tegra_defconfig
+++ b/arch/arm/configs/tegra_defconfig
@@ -153,6 +153,7 @@ CONFIG_MEDIA_CAMERA_SUPPORT=y
 CONFIG_MEDIA_USB_SUPPORT=y
 CONFIG_USB_VIDEO_CLASS=m
 CONFIG_DRM=y
+CONFIG_TEGRA_HOST1X=y
 CONFIG_DRM_TEGRA=y
 CONFIG_BACKLIGHT_LCD_SUPPORT=y
 # CONFIG_LCD_CLASS_DEVICE is not set
@@ -202,7 +203,7 @@ CONFIG_TEGRA20_APB_DMA=y
 CONFIG_STAGING=y
 CONFIG_SENSORS_ISL29018=y
 CONFIG_SENSORS_ISL29028=y
-CONFIG_SENSORS_AK8975=y
+CONFIG_AK8975=y
 CONFIG_MFD_NVEC=y
 CONFIG_KEYBOARD_NVEC=y
 CONFIG_SERIO_NVEC_PS2=y
diff --git a/arch/arm/crypto/sha1-armv4-large.S b/arch/arm/crypto/sha1-armv4-large.S
index 92c6eed7aac9..99207c45ec10 100644
--- a/arch/arm/crypto/sha1-armv4-large.S
+++ b/arch/arm/crypto/sha1-armv4-large.S
@@ -195,6 +195,7 @@ ENTRY(sha1_block_data_order)
        add     r3,r3,r10                       @ E+=F_00_19(B,C,D)
        cmp     r14,sp
        bne     .L_00_15                @ [((11+4)*5+2)*3]
+        sub     sp,sp,#25*4
 #if __ARM_ARCH__<7
        ldrb    r10,[r1,#2]
        ldrb    r9,[r1,#3]
@@ -290,7 +291,6 @@ ENTRY(sha1_block_data_order)
        add     r3,r3,r10                       @ E+=F_00_19(B,C,D)
        ldr     r8,.LK_20_39            @ [+15+16*4]
-        sub     sp,sp,#25*4
        cmn     sp,#0                   @ [+3], clear carry to denote 20_39
 .L_20_39_or_60_79:
        ldr     r9,[r14,#15*4]
diff --git a/arch/arm/include/asm/cmpxchg.h b/arch/arm/include/asm/cmpxchg.h
index 7eb18c1d8d6c..4f009c10540d 100644
--- a/arch/arm/include/asm/cmpxchg.h
+++ b/arch/arm/include/asm/cmpxchg.h
@@ -233,15 +233,15 @@ static inline unsigned long __cmpxchg_local(volatile void *ptr,
        ((__typeof__(*(ptr)))atomic64_cmpxchg(container_of((ptr),       \
                                                atomic64_t,             \
                                                counter),               \
-                                              (unsigned long)(o),       \
+                                              (unsigned long long)(o),  \
-                                              (unsigned long)(n)))
+                                              (unsigned long long)(n)))
 #define cmpxchg64_local(ptr, o, n)                                      \
        ((__typeof__(*(ptr)))local64_cmpxchg(container_of((ptr),        \
                                                local64_t,              \
                                                a),                     \
-                                             (unsigned long)(o),        \
+                                             (unsigned long long)(o),   \
-                                             (unsigned long)(n)))
+                                             (unsigned long long)(n)))
 #endif  /* __LINUX_ARM_ARCH__ >= 6 */
diff --git a/arch/arm/include/debug/ux500.S b/arch/arm/include/debug/ux500.S
index 2848857f5b62..fbd24beeb1fa 100644
--- a/arch/arm/include/debug/ux500.S
+++ b/arch/arm/include/debug/ux500.S
@@ -24,9 +24,9 @@
 #define U8500_UART0_PHYS_BASE   (0x80120000)
 #define U8500_UART1_PHYS_BASE   (0x80121000)
 #define U8500_UART2_PHYS_BASE   (0x80007000)
-#define U8500_UART0_VIRT_BASE   (0xa8120000)
+#define U8500_UART0_VIRT_BASE   (0xf8120000)
-#define U8500_UART1_VIRT_BASE   (0xa8121000)
+#define U8500_UART1_VIRT_BASE   (0xf8121000)
-#define U8500_UART2_VIRT_BASE   (0xa8007000)
+#define U8500_UART2_VIRT_BASE   (0xf8007000)
 #define __UX500_PHYS_UART(n)    U8500_UART##n##_PHYS_BASE
 #define __UX500_VIRT_UART(n)    U8500_UART##n##_VIRT_BASE
 #endif
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index f21970316836..282de4826abb 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -411,7 +411,6 @@ static struct vm_area_struct gate_vma = {
        .vm_start       = 0xffff0000,
        .vm_end         = 0xffff0000 + PAGE_SIZE,
        .vm_flags       = VM_READ | VM_EXEC | VM_MAYREAD | VM_MAYEXEC,
-        .vm_mm          = &init_mm,
 };
 static int __init gate_vma_init(void)
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 47ab90563bf4..550d63cef68e 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -251,7 +251,7 @@ void __ref cpu_die(void)
         * this returns, power and/or clocks can be removed at any point
         * from this CPU and its cache by platform_cpu_kill().
         */
-        RCU_NONIDLE(complete(&cpu_died));
+        complete(&cpu_died);
        /*
         * Ensure that the cache lines associated with that completion are
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index 2acdff4c1dfe..180b3024bec3 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -174,6 +174,7 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
 static struct clock_event_device clkevt = {
        .name           = "at91_tick",
        .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
+        .shift          = 32,
        .rating         = 150,
        .set_next_event = clkevt32k_next_event,
        .set_mode       = clkevt32k_mode,
@@ -264,9 +265,11 @@ void __init at91rm9200_timer_init(void)
        at91_st_write(AT91_ST_RTMR, 1);
        /* Setup timer clockevent, with minimum of two ticks (important!!) */
+        clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift);
+        clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt);
+        clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1;
        clkevt.cpumask = cpumask_of(0);
-        clockevents_config_and_register(&clkevt, AT91_SLOW_CLOCK,
+        clockevents_register_device(&clkevt);
-                                        2, AT91_ST_ALMV);
        /* register clocksource */
        clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK);
diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c
index 13cdbcd48f51..c7d670d11802 100644
--- a/arch/arm/mach-at91/at91sam9n12.c
+++ b/arch/arm/mach-at91/at91sam9n12.c
@@ -223,13 +223,7 @@ static void __init at91sam9n12_map_io(void)
        at91_init_sram(0, AT91SAM9N12_SRAM_BASE, AT91SAM9N12_SRAM_SIZE);
 }
-void __init at91sam9n12_initialize(void)
-{
-        at91_extern_irq = (1 << AT91SAM9N12_ID_IRQ0);
-}
 AT91_SOC_START(at91sam9n12)
        .map_io = at91sam9n12_map_io,
        .register_clocks = at91sam9n12_register_clocks,
-        .init = at91sam9n12_initialize,
 AT91_SOC_END
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
index 31df12029c4e..2bd7f51b0b82 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -179,9 +179,9 @@ extern void __iomem *at91_pmc_base;
 #define         AT91_PMC_PCR_CMD        (0x1  <<  12)           /* Command (read=0, write=1) */
 #define         AT91_PMC_PCR_DIV(n)     ((n)  <<  16)           /* Divisor Value */
 #define                 AT91_PMC_PCR_DIV0       0x0                     /* Peripheral clock is MCK */
-#define                 AT91_PMC_PCR_DIV2       0x2                     /* Peripheral clock is MCK/2 */
+#define                 AT91_PMC_PCR_DIV2       0x1                     /* Peripheral clock is MCK/2 */
-#define                 AT91_PMC_PCR_DIV4       0x4                     /* Peripheral clock is MCK/4 */
+#define                 AT91_PMC_PCR_DIV4       0x2                     /* Peripheral clock is MCK/4 */
-#define                 AT91_PMC_PCR_DIV8       0x8                     /* Peripheral clock is MCK/8 */
+#define                 AT91_PMC_PCR_DIV8       0x3                     /* Peripheral clock is MCK/8 */
 #define         AT91_PMC_PCR_EN         (0x1  <<  28)           /* Enable */
 #endif
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 151259003086..dda9a2bd3acb 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -177,7 +177,8 @@ int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
 static const char *step_sels[]  = { "osc", "pll2_pfd2_396m", };
 static const char *pll1_sw_sels[]       = { "pll1_sys", "step", };
 static const char *periph_pre_sels[]    = { "pll2_bus", "pll2_pfd2_396m", "pll2_pfd0_352m", "pll2_198m", };
-static const char *periph_clk2_sels[]   = { "pll3_usb_otg", "osc", };
+static const char *periph_clk2_sels[]   = { "pll3_usb_otg", "osc", "osc", "dummy", };
+static const char *periph2_clk2_sels[]  = { "pll3_usb_otg", "pll2_bus", };
 static const char *periph_sels[]        = { "periph_pre", "periph_clk2", };
 static const char *periph2_sels[]       = { "periph2_pre", "periph2_clk2", };
 static const char *axi_sels[]           = { "periph", "pll2_pfd2_396m", "pll3_pfd1_540m", };
@@ -185,7 +186,7 @@ static const char *audio_sels[]	= { "pll4_post_div", "pll3_pfd2_508m", "pll3_pfd
 static const char *gpu_axi_sels[]       = { "axi", "ahb", };
 static const char *gpu2d_core_sels[]    = { "axi", "pll3_usb_otg", "pll2_pfd0_352m", "pll2_pfd2_396m", };
 static const char *gpu3d_core_sels[]    = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd2_396m", };
-static const char *gpu3d_shader_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd9_720m", };
+static const char *gpu3d_shader_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll3_pfd0_720m", };
 static const char *ipu_sels[]           = { "mmdc_ch0_axi", "pll2_pfd2_396m", "pll3_120m", "pll3_pfd1_540m", };
 static const char *ldb_di_sels[]        = { "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "mmdc_ch1_axi", "pll3_usb_otg", };
 static const char *ipu_di_pre_sels[]    = { "mmdc_ch0_axi", "pll3_usb_otg", "pll5_video_div", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd1_540m", };
@@ -369,8 +370,8 @@ int __init mx6q_clocks_init(void)
        clk[pll1_sw]          = imx_clk_mux("pll1_sw",          base + 0xc,  2,  1, pll1_sw_sels,      ARRAY_SIZE(pll1_sw_sels));
        clk[periph_pre]       = imx_clk_mux("periph_pre",       base + 0x18, 18, 2, periph_pre_sels,   ARRAY_SIZE(periph_pre_sels));
        clk[periph2_pre]      = imx_clk_mux("periph2_pre",      base + 0x18, 21, 2, periph_pre_sels,   ARRAY_SIZE(periph_pre_sels));
-        clk[periph_clk2_sel]  = imx_clk_mux("periph_clk2_sel",  base + 0x18, 12, 1, periph_clk2_sels,  ARRAY_SIZE(periph_clk2_sels));
+        clk[periph_clk2_sel]  = imx_clk_mux("periph_clk2_sel",  base + 0x18, 12, 2, periph_clk2_sels,  ARRAY_SIZE(periph_clk2_sels));
-        clk[periph2_clk2_sel] = imx_clk_mux("periph2_clk2_sel", base + 0x18, 20, 1, periph_clk2_sels,  ARRAY_SIZE(periph_clk2_sels));
+        clk[periph2_clk2_sel] = imx_clk_mux("periph2_clk2_sel", base + 0x18, 20, 1, periph2_clk2_sels, ARRAY_SIZE(periph2_clk2_sels));
        clk[axi_sel]          = imx_clk_mux("axi_sel",          base + 0x14, 6,  2, axi_sels,          ARRAY_SIZE(axi_sels));
        clk[esai_sel]         = imx_clk_mux("esai_sel",         base + 0x20, 19, 2, audio_sels,        ARRAY_SIZE(audio_sels));
        clk[asrc_sel]         = imx_clk_mux("asrc_sel",         base + 0x30, 7,  2, audio_sels,        ARRAY_SIZE(audio_sels));
@@ -498,7 +499,7 @@ int __init mx6q_clocks_init(void)
        clk[ldb_di1]      = imx_clk_gate2("ldb_di1",       "ldb_di1_podf",      base + 0x74, 14);
        clk[ipu2_di1]     = imx_clk_gate2("ipu2_di1",      "ipu2_di1_sel",      base + 0x74, 10);
        clk[hsi_tx]       = imx_clk_gate2("hsi_tx",        "hsi_tx_podf",       base + 0x74, 16);
-        clk[mlb]          = imx_clk_gate2("mlb",           "pll8_mlb",          base + 0x74, 18);
+        clk[mlb]          = imx_clk_gate2("mlb",           "axi",               base + 0x74, 18);
        clk[mmdc_ch0_axi] = imx_clk_gate2("mmdc_ch0_axi",  "mmdc_ch0_axi_podf", base + 0x74, 20);
        clk[mmdc_ch1_axi] = imx_clk_gate2("mmdc_ch1_axi",  "mmdc_ch1_axi_podf", base + 0x74, 22);
        clk[ocram]        = imx_clk_gate2("ocram",         "ahb",               base + 0x74, 28);
diff --git a/arch/arm/mach-imx/headsmp.S b/arch/arm/mach-imx/headsmp.S
index 67b9c48dcafe..627f16f0e9d1 100644
--- a/arch/arm/mach-imx/headsmp.S
+++ b/arch/arm/mach-imx/headsmp.S
@@ -18,8 +18,20 @@
        .section ".text.head", "ax"
 #ifdef CONFIG_SMP
+diag_reg_offset:
+        .word   g_diag_reg - .
+        .macro  set_diag_reg
+        adr     r0, diag_reg_offset
+        ldr     r1, [r0]
+        add     r1, r1, r0              @ r1 = physical &g_diag_reg
+        ldr     r0, [r1]
+        mcr     p15, 0, r0, c15, c0, 1  @ write diagnostic register
+        .endm
 ENTRY(v7_secondary_startup)
        bl      v7_invalidate_l1
+        set_diag_reg
        b       secondary_startup
 ENDPROC(v7_secondary_startup)
 #endif
diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c
index 4a69305db65e..c6e1ab544882 100644
--- a/arch/arm/mach-imx/platsmp.c
+++ b/arch/arm/mach-imx/platsmp.c
@@ -12,6 +12,7 @@
 #include <linux/init.h>
 #include <linux/smp.h>
+#include <asm/cacheflush.h>
 #include <asm/page.h>
 #include <asm/smp_scu.h>
 #include <asm/mach/map.h>
@@ -21,6 +22,7 @@
 #define SCU_STANDBY_ENABLE      (1 << 5)
+u32 g_diag_reg;
 static void __iomem *scu_base;
 static struct map_desc scu_io_desc __initdata = {
@@ -80,6 +82,18 @@ void imx_smp_prepare(void)
 static void __init imx_smp_prepare_cpus(unsigned int max_cpus)
 {
        imx_smp_prepare();
+        /*
+         * The diagnostic register holds the errata bits.  Mostly bootloader
+         * does not bring up secondary cores, so that when errata bits are set
+         * in bootloader, they are set only for boot cpu.  But on a SMP
+         * configuration, it should be equally done on every single core.
+         * Read the register from boot cpu here, and will replicate it into
+         * secondary cores when booting them.
+         */
+        asm("mrc p15, 0, %0, c15, c0, 1" : "=r" (g_diag_reg) : : "cc");
+        __cpuc_flush_dcache_area(&g_diag_reg, sizeof(g_diag_reg));
+        outer_clean_range(__pa(&g_diag_reg), __pa(&g_diag_reg + 1));
 }
 struct smp_operations  imx_smp_ops __initdata = {
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index c2cae69e6d2b..f38922897563 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -528,12 +528,6 @@ void __init kirkwood_init_early(void)
 {
        orion_time_set_base(TIMER_VIRT_BASE);
-        /*
-         * Some Kirkwood devices allocate their coherent buffers from atomic
-         * context. Increase size of atomic coherent pool to make sure such
-         * the allocations won't fail.
-         */
-        init_dma_coherent_pool_size(SZ_1M);
        mvebu_mbus_init("marvell,kirkwood-mbus",
                        BRIDGE_WINS_BASE, BRIDGE_WINS_SZ,
                        DDR_WINDOW_CPU_BASE, DDR_WINDOW_CPU_SZ);
diff --git a/arch/arm/mach-kirkwood/ts219-setup.c b/arch/arm/mach-kirkwood/ts219-setup.c
index 283abff90228..e1267d6b468f 100644
--- a/arch/arm/mach-kirkwood/ts219-setup.c
+++ b/arch/arm/mach-kirkwood/ts219-setup.c
@@ -124,7 +124,7 @@ static void __init qnap_ts219_init(void)
 static int __init ts219_pci_init(void)
 {
        if (machine_is_ts219())
-                kirkwood_pcie_init(KW_PCIE0);
+                kirkwood_pcie_init(KW_PCIE1 | KW_PCIE0);
        return 0;
 }
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index e11acbb0a46d..80a8bcacd9d5 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -15,6 +15,7 @@ config ARCH_MVEBU
        select MVEBU_CLK_GATING
        select MVEBU_MBUS
        select ZONE_DMA if ARM_LPAE
+        select ARCH_REQUIRE_GPIOLIB
 if ARCH_MVEBU
diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c
index 42a4cb3087e2..1c48890bb72b 100644
--- a/arch/arm/mach-mvebu/armada-370-xp.c
+++ b/arch/arm/mach-mvebu/armada-370-xp.c
@@ -54,13 +54,6 @@ void __init armada_370_xp_init_early(void)
        char *mbus_soc_name;
        /*
-         * Some Armada 370/XP devices allocate their coherent buffers
-         * from atomic context. Increase size of atomic coherent pool
-         * to make sure such the allocations won't fail.
-         */
-        init_dma_coherent_pool_size(SZ_1M);
-        /*
         * This initialization will be replaced by a DT-based
         * initialization once the mvebu-mbus driver gains DT support.
         */
diff --git a/arch/arm/mach-omap1/dma.c b/arch/arm/mach-omap1/dma.c
index 68ab858e27b7..a94b3a718d1a 100644
--- a/arch/arm/mach-omap1/dma.c
+++ b/arch/arm/mach-omap1/dma.c
@@ -345,6 +345,7 @@ static int __init omap1_system_dma_init(void)
                dev_err(&pdev->dev,
                        "%s: Memory allocation failed for d->chan!\n",
                        __func__);
+                ret = -ENOMEM;
                goto exit_release_d;
        }
diff --git a/arch/arm/mach-omap2/cclock33xx_data.c b/arch/arm/mach-omap2/cclock33xx_data.c
index 6ebc7803bc3e..af3544ce4f02 100644
--- a/arch/arm/mach-omap2/cclock33xx_data.c
+++ b/arch/arm/mach-omap2/cclock33xx_data.c
@@ -454,9 +454,29 @@ DEFINE_CLK_GATE(cefuse_fck, "sys_clkin_ck", &sys_clkin_ck, 0x0,
 */
 DEFINE_CLK_FIXED_FACTOR(clkdiv32k_ck, "clk_24mhz", &clk_24mhz, 0x0, 1, 732);
-DEFINE_CLK_GATE(clkdiv32k_ick, "clkdiv32k_ck", &clkdiv32k_ck, 0x0,
+static struct clk clkdiv32k_ick;
-                AM33XX_CM_PER_CLKDIV32K_CLKCTRL, AM33XX_MODULEMODE_SWCTRL_SHIFT,
-                0x0, NULL);
+static const char *clkdiv32k_ick_parent_names[] = {
+        "clkdiv32k_ck",
+};
+static const struct clk_ops clkdiv32k_ick_ops = {
+        .enable         = &omap2_dflt_clk_enable,
+        .disable        = &omap2_dflt_clk_disable,
+        .is_enabled     = &omap2_dflt_clk_is_enabled,
+        .init           = &omap2_init_clk_clkdm,
+};
+static struct clk_hw_omap clkdiv32k_ick_hw = {
+        .hw     = {
+                .clk    = &clkdiv32k_ick,
+        },
+        .enable_reg     = AM33XX_CM_PER_CLKDIV32K_CLKCTRL,
+        .enable_bit     = AM33XX_MODULEMODE_SWCTRL_SHIFT,
+        .clkdm_name     = "clk_24mhz_clkdm",
+};
+DEFINE_STRUCT_CLK(clkdiv32k_ick, clkdiv32k_ick_parent_names, clkdiv32k_ick_ops);
 /* "usbotg_fck" is an additional clock and not really a modulemode */
 DEFINE_CLK_GATE(usbotg_fck, "dpll_per_ck", &dpll_per_ck, 0x0,
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index d25a95fe9921..7341eff63f56 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1356,13 +1356,27 @@ static void _enable_sysc(struct omap_hwmod *oh)
        clkdm = _get_clkdm(oh);
        if (sf & SYSC_HAS_SIDLEMODE) {
+                if (oh->flags & HWMOD_SWSUP_SIDLE ||
+                    oh->flags & HWMOD_SWSUP_SIDLE_ACT) {
+                        idlemode = HWMOD_IDLEMODE_NO;
+                } else {
+                        if (sf & SYSC_HAS_ENAWAKEUP)
+                                _enable_wakeup(oh, &v);
+                        if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
+                                idlemode = HWMOD_IDLEMODE_SMART_WKUP;
+                        else
+                                idlemode = HWMOD_IDLEMODE_SMART;
+                }
+                /*
+                 * This is special handling for some IPs like
+                 * 32k sync timer. Force them to idle!
+                 */
                clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
                if (clkdm_act && !(oh->class->sysc->idlemodes &
                                   (SIDLE_SMART | SIDLE_SMART_WKUP)))
                        idlemode = HWMOD_IDLEMODE_FORCE;
-                else
-                        idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
-                                HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
                _set_slave_idlemode(oh, idlemode, &v);
        }
@@ -1391,10 +1405,6 @@ static void _enable_sysc(struct omap_hwmod *oh)
            (sf & SYSC_HAS_CLOCKACTIVITY))
                _set_clockactivity(oh, oh->class->sysc->clockact, &v);
-        /* If slave is in SMARTIDLE, also enable wakeup */
-        if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
-                _enable_wakeup(oh, &v);
        _write_sysconfig(v, oh);
        /*
@@ -1430,13 +1440,16 @@ static void _idle_sysc(struct omap_hwmod *oh)
        sf = oh->class->sysc->sysc_flags;
        if (sf & SYSC_HAS_SIDLEMODE) {
-                /* XXX What about HWMOD_IDLEMODE_SMART_WKUP? */
+                if (oh->flags & HWMOD_SWSUP_SIDLE) {
-                if (oh->flags & HWMOD_SWSUP_SIDLE ||
-                    !(oh->class->sysc->idlemodes &
-                      (SIDLE_SMART | SIDLE_SMART_WKUP)))
                        idlemode = HWMOD_IDLEMODE_FORCE;
-                else
+                } else {
-                        idlemode = HWMOD_IDLEMODE_SMART;
+                        if (sf & SYSC_HAS_ENAWAKEUP)
+                                _enable_wakeup(oh, &v);
+                        if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
+                                idlemode = HWMOD_IDLEMODE_SMART_WKUP;
+                        else
+                                idlemode = HWMOD_IDLEMODE_SMART;
+                }
                _set_slave_idlemode(oh, idlemode, &v);
        }
@@ -1455,10 +1468,6 @@ static void _idle_sysc(struct omap_hwmod *oh)
                _set_master_standbymode(oh, idlemode, &v);
        }
-        /* If slave is in SMARTIDLE, also enable wakeup */
-        if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
-                _enable_wakeup(oh, &v);
        _write_sysconfig(v, oh);
 }
@@ -2065,7 +2074,7 @@ static int _omap4_get_context_lost(struct omap_hwmod *oh)
 * do so is present in the hwmod data, then call it and pass along the
 * return value; otherwise, return 0.
 */
-static int __init _enable_preprogram(struct omap_hwmod *oh)
+static int _enable_preprogram(struct omap_hwmod *oh)
 {
        if (!oh->class->enable_preprogram)
                return 0;
@@ -2246,42 +2255,6 @@ static int _idle(struct omap_hwmod *oh)
 }
 /**
- * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
- * @oh: struct omap_hwmod *
- * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
- *
- * Sets the IP block's OCP autoidle bit in hardware, and updates our
- * local copy. Intended to be used by drivers that require
- * direct manipulation of the AUTOIDLE bits.
- * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
- * along the return value from _set_module_autoidle().
- *
- * Any users of this function should be scrutinized carefully.
- */
-int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
-{
-        u32 v;
-        int retval = 0;
-        unsigned long flags;
-        if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
-                return -EINVAL;
-        spin_lock_irqsave(&oh->_lock, flags);
-        v = oh->_sysc_cache;
-        retval = _set_module_autoidle(oh, autoidle, &v);
-        if (!retval)
-                _write_sysconfig(v, oh);
-        spin_unlock_irqrestore(&oh->_lock, flags);
-        return retval;
-}
-/**
 * _shutdown - shutdown an omap_hwmod
 * @oh: struct omap_hwmod *
 *
@@ -3180,38 +3153,6 @@ error:
 }
 /**
- * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
- * @oh: struct omap_hwmod *
- * @idlemode: SIDLEMODE field bits (shifted to bit 0)
- *
- * Sets the IP block's OCP slave idlemode in hardware, and updates our
- * local copy.  Intended to be used by drivers that have some erratum
- * that requires direct manipulation of the SIDLEMODE bits.  Returns
- * -EINVAL if @oh is null, or passes along the return value from
- * _set_slave_idlemode().
- *
- * XXX Does this function have any current users?  If not, we should
- * remove it; it is better to let the rest of the hwmod code handle this.
- * Any users of this function should be scrutinized carefully.
- */
-int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
-{
-        u32 v;
-        int retval = 0;
-        if (!oh)
-                return -EINVAL;
-        v = oh->_sysc_cache;
-        retval = _set_slave_idlemode(oh, idlemode, &v);
-        if (!retval)
-                _write_sysconfig(v, oh);
-        return retval;
-}
-/**
 * omap_hwmod_lookup - look up a registered omap_hwmod by name
 * @name: name of the omap_hwmod to look up
 *
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index fe5962921f07..0c898f58ac9b 100644
--- a/arch/arm/mach-omap2/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -463,6 +463,9 @@ struct omap_hwmod_omap4_prcm {
 *     is kept in force-standby mode. Failing to do so causes PM problems
 *     with musb on OMAP3630 at least. Note that musb has a dedicated register
 *     to control MSTANDBY signal when MIDLEMODE is set to force-standby.
+ * HWMOD_SWSUP_SIDLE_ACT: omap_hwmod code should manually bring the module
+ *     out of idle, but rely on smart-idle to the put it back in idle,
+ *     so the wakeups are still functional (Only known case for now is UART)
 */
 #define HWMOD_SWSUP_SIDLE                       (1 << 0)
 #define HWMOD_SWSUP_MSTANDBY                    (1 << 1)
@@ -476,6 +479,7 @@ struct omap_hwmod_omap4_prcm {
 #define HWMOD_EXT_OPT_MAIN_CLK                  (1 << 9)
 #define HWMOD_BLOCK_WFI                         (1 << 10)
 #define HWMOD_FORCE_MSTANDBY                    (1 << 11)
+#define HWMOD_SWSUP_SIDLE_ACT                   (1 << 12)
 /*
 * omap_hwmod._int_flags definitions
@@ -641,9 +645,6 @@ int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name);
 int omap_hwmod_enable_clocks(struct omap_hwmod *oh);
 int omap_hwmod_disable_clocks(struct omap_hwmod *oh);
-int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode);
-int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle);
 int omap_hwmod_reset(struct omap_hwmod *oh);
 void omap_hwmod_ocp_barrier(struct omap_hwmod *oh);
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
index c8c64b3e1acc..d05fc7b54567 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
@@ -512,6 +512,7 @@ struct omap_hwmod omap2xxx_uart1_hwmod = {
        .mpu_irqs       = omap2_uart1_mpu_irqs,
        .sdma_reqs      = omap2_uart1_sdma_reqs,
        .main_clk       = "uart1_fck",
+        .flags          = HWMOD_SWSUP_SIDLE_ACT,
        .prcm           = {
                .omap2 = {
                        .module_offs = CORE_MOD,
@@ -531,6 +532,7 @@ struct omap_hwmod omap2xxx_uart2_hwmod = {
        .mpu_irqs       = omap2_uart2_mpu_irqs,
        .sdma_reqs      = omap2_uart2_sdma_reqs,
        .main_clk       = "uart2_fck",
+        .flags          = HWMOD_SWSUP_SIDLE_ACT,
        .prcm           = {
                .omap2 = {
                        .module_offs = CORE_MOD,
@@ -550,6 +552,7 @@ struct omap_hwmod omap2xxx_uart3_hwmod = {
        .mpu_irqs       = omap2_uart3_mpu_irqs,
        .sdma_reqs      = omap2_uart3_sdma_reqs,
        .main_clk       = "uart3_fck",
+        .flags          = HWMOD_SWSUP_SIDLE_ACT,
        .prcm           = {
                .omap2 = {
                        .module_offs = CORE_MOD,
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 01d8f324450a..075f7cc51026 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -1995,6 +1995,7 @@ static struct omap_hwmod am33xx_uart1_hwmod = {
        .name           = "uart1",
        .class          = &uart_class,
        .clkdm_name     = "l4_wkup_clkdm",
+        .flags          = HWMOD_SWSUP_SIDLE_ACT,
        .mpu_irqs       = am33xx_uart1_irqs,
        .sdma_reqs      = uart1_edma_reqs,
        .main_clk       = "dpll_per_m2_div4_wkupdm_ck",
@@ -2015,6 +2016,7 @@ static struct omap_hwmod am33xx_uart2_hwmod = {
        .name           = "uart2",
        .class          = &uart_class,
        .clkdm_name     = "l4ls_clkdm",
+        .flags          = HWMOD_SWSUP_SIDLE_ACT,
        .mpu_irqs       = am33xx_uart2_irqs,
        .sdma_reqs      = uart1_edma_reqs,
        .main_clk       = "dpll_per_m2_div4_ck",
@@ -2042,6 +2044,7 @@ static struct omap_hwmod am33xx_uart3_hwmod = {
        .name           = "uart3",
        .class          = &uart_class,
        .clkdm_name     = "l4ls_clkdm",
+        .flags          = HWMOD_SWSUP_SIDLE_ACT,
        .mpu_irqs       = am33xx_uart3_irqs,
        .sdma_reqs      = uart3_edma_reqs,
        .main_clk       = "dpll_per_m2_div4_ck",
@@ -2062,6 +2065,7 @@ static struct omap_hwmod am33xx_uart4_hwmod = {
        .name           = "uart4",
        .class          = &uart_class,
        .clkdm_name     = "l4ls_clkdm",
+        .flags          = HWMOD_SWSUP_SIDLE_ACT,
        .mpu_irqs       = am33xx_uart4_irqs,
        .sdma_reqs      = uart1_edma_reqs,
        .main_clk       = "dpll_per_m2_div4_ck",
@@ -2082,6 +2086,7 @@ static struct omap_hwmod am33xx_uart5_hwmod = {
        .name           = "uart5",
        .class          = &uart_class,
        .clkdm_name     = "l4ls_clkdm",
+        .flags          = HWMOD_SWSUP_SIDLE_ACT,
        .mpu_irqs       = am33xx_uart5_irqs,
        .sdma_reqs      = uart1_edma_reqs,
        .main_clk       = "dpll_per_m2_div4_ck",
@@ -2102,6 +2107,7 @@ static struct omap_hwmod am33xx_uart6_hwmod = {
        .name           = "uart6",
        .class          = &uart_class,
        .clkdm_name     = "l4ls_clkdm",
+        .flags          = HWMOD_SWSUP_SIDLE_ACT,
        .mpu_irqs       = am33xx_uart6_irqs,
        .sdma_reqs      = uart1_edma_reqs,
        .main_clk       = "dpll_per_m2_div4_ck",
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 4083606ea1da..31c7126eb3bb 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -490,6 +490,7 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = {
        .mpu_irqs       = omap2_uart1_mpu_irqs,
        .sdma_reqs      = omap2_uart1_sdma_reqs,
        .main_clk       = "uart1_fck",
+        .flags          = HWMOD_SWSUP_SIDLE_ACT,
        .prcm           = {
                .omap2 = {
                        .module_offs = CORE_MOD,
@@ -508,6 +509,7 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = {
        .mpu_irqs       = omap2_uart2_mpu_irqs,
        .sdma_reqs      = omap2_uart2_sdma_reqs,
        .main_clk       = "uart2_fck",
+        .flags          = HWMOD_SWSUP_SIDLE_ACT,
        .prcm           = {
                .omap2 = {
                        .module_offs = CORE_MOD,
@@ -526,6 +528,7 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = {
        .mpu_irqs       = omap2_uart3_mpu_irqs,
        .sdma_reqs      = omap2_uart3_sdma_reqs,
        .main_clk       = "uart3_fck",
+        .flags          = HWMOD_SWSUP_SIDLE_ACT,
        .prcm           = {
                .omap2 = {
                        .module_offs = OMAP3430_PER_MOD,
@@ -555,6 +558,7 @@ static struct omap_hwmod omap36xx_uart4_hwmod = {
        .mpu_irqs       = uart4_mpu_irqs,
        .sdma_reqs      = uart4_sdma_reqs,
        .main_clk       = "uart4_fck",
+        .flags          = HWMOD_SWSUP_SIDLE_ACT,
        .prcm           = {
                .omap2 = {
                        .module_offs = OMAP3430_PER_MOD,
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index eaba9dc91a0d..848b6dc67590 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -3434,6 +3434,7 @@ static struct omap_hwmod omap44xx_uart1_hwmod = {
        .name           = "uart1",
        .class          = &omap44xx_uart_hwmod_class,
        .clkdm_name     = "l4_per_clkdm",
+        .flags          = HWMOD_SWSUP_SIDLE_ACT,
        .mpu_irqs       = omap44xx_uart1_irqs,
        .sdma_reqs      = omap44xx_uart1_sdma_reqs,
        .main_clk       = "func_48m_fclk",
@@ -3462,6 +3463,7 @@ static struct omap_hwmod omap44xx_uart2_hwmod = {
        .name           = "uart2",
        .class          = &omap44xx_uart_hwmod_class,
        .clkdm_name     = "l4_per_clkdm",
+        .flags          = HWMOD_SWSUP_SIDLE_ACT,
        .mpu_irqs       = omap44xx_uart2_irqs,
        .sdma_reqs      = omap44xx_uart2_sdma_reqs,
        .main_clk       = "func_48m_fclk",
@@ -3490,7 +3492,8 @@ static struct omap_hwmod omap44xx_uart3_hwmod = {
        .name           = "uart3",
        .class          = &omap44xx_uart_hwmod_class,
        .clkdm_name     = "l4_per_clkdm",
-        .flags          = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
+        .flags          = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET |
+                                HWMOD_SWSUP_SIDLE_ACT,
        .mpu_irqs       = omap44xx_uart3_irqs,
        .sdma_reqs      = omap44xx_uart3_sdma_reqs,
        .main_clk       = "func_48m_fclk",
@@ -3519,6 +3522,7 @@ static struct omap_hwmod omap44xx_uart4_hwmod = {
        .name           = "uart4",
        .class          = &omap44xx_uart_hwmod_class,
        .clkdm_name     = "l4_per_clkdm",
+        .flags          = HWMOD_SWSUP_SIDLE_ACT,
        .mpu_irqs       = omap44xx_uart4_irqs,
        .sdma_reqs      = omap44xx_uart4_sdma_reqs,
        .main_clk       = "func_48m_fclk",
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 8396b5b7e912..f6601563aa69 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -95,38 +95,9 @@ static void omap_uart_enable_wakeup(struct device *dev, bool enable)
                omap_hwmod_disable_wakeup(od->hwmods[0]);
 }
-/*
- * Errata i291: [UART]:Cannot Acknowledge Idle Requests
- * in Smartidle Mode When Configured for DMA Operations.
- * WA: configure uart in force idle mode.
- */
-static void omap_uart_set_noidle(struct device *dev)
-{
-        struct platform_device *pdev = to_platform_device(dev);
-        struct omap_device *od = to_omap_device(pdev);
-        omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_NO);
-}
-static void omap_uart_set_smartidle(struct device *dev)
-{
-        struct platform_device *pdev = to_platform_device(dev);
-        struct omap_device *od = to_omap_device(pdev);
-        u8 idlemode;
-        if (od->hwmods[0]->class->sysc->idlemodes & SIDLE_SMART_WKUP)
-                idlemode = HWMOD_IDLEMODE_SMART_WKUP;
-        else
-                idlemode = HWMOD_IDLEMODE_SMART;
-        omap_hwmod_set_slave_idlemode(od->hwmods[0], idlemode);
-}
 #else
 static void omap_uart_enable_wakeup(struct device *dev, bool enable)
 {}
-static void omap_uart_set_noidle(struct device *dev) {}
-static void omap_uart_set_smartidle(struct device *dev) {}
 #endif /* CONFIG_PM */
 #ifdef CONFIG_OMAP_MUX
@@ -299,8 +270,6 @@ void __init omap_serial_init_port(struct omap_board_data *bdata,
        omap_up.uartclk = OMAP24XX_BASE_BAUD * 16;
        omap_up.flags = UPF_BOOT_AUTOCONF;
        omap_up.get_context_loss_count = omap_pm_get_dev_context_loss_count;
-        omap_up.set_forceidle = omap_uart_set_smartidle;
-        omap_up.set_noidle = omap_uart_set_noidle;
        omap_up.enable_wakeup = omap_uart_enable_wakeup;
        omap_up.dma_rx_buf_size = info->dma_rx_buf_size;
        omap_up.dma_rx_timeout = info->dma_rx_timeout;
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index b97fd672e89d..f8a6db9239bf 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -199,13 +199,6 @@ void __init orion5x_init_early(void)
        orion_time_set_base(TIMER_VIRT_BASE);
-        /*
-         * Some Orion5x devices allocate their coherent buffers from atomic
-         * context. Increase size of atomic coherent pool to make sure such
-         * the allocations won't fail.
-         */
-        init_dma_coherent_pool_size(SZ_1M);
        /* Initialize the MBUS driver */
        orion5x_pcie_id(&dev, &rev);
        if (dev == MV88F5281_DEV_ID)
diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
index 91052855cc12..b9594e911ce7 100644
--- a/arch/arm/mach-shmobile/board-marzen.c
+++ b/arch/arm/mach-shmobile/board-marzen.c
@@ -212,8 +212,8 @@ static struct platform_device *marzen_devices[] __initdata = {
 static struct usb_phy *phy;
 static int usb_power_on(struct platform_device *pdev)
 {
-        if (!phy)
+        if (IS_ERR(phy))
-                return -EIO;
+                return PTR_ERR(phy);
        pm_runtime_enable(&pdev->dev);
        pm_runtime_get_sync(&pdev->dev);
@@ -225,7 +225,7 @@ static int usb_power_on(struct platform_device *pdev)
 static void usb_power_off(struct platform_device *pdev)
 {
-        if (!phy)
+        if (IS_ERR(phy))
                return;
        usb_phy_shutdown(phy);
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index d259c782d742..5b045e302b43 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -1,5 +1,6 @@
 config ARCH_SUNXI
        bool "Allwinner A1X SOCs" if ARCH_MULTI_V7
+        select ARCH_REQUIRE_GPIOLIB
        select CLKSRC_MMIO
        select CLKSRC_OF
        select COMMON_CLK
diff --git a/arch/arm/mach-tegra/tegra2_emc.c b/arch/arm/mach-tegra/tegra2_emc.c
index 9e8bdfa2b369..31e69a019bdd 100644
--- a/arch/arm/mach-tegra/tegra2_emc.c
+++ b/arch/arm/mach-tegra/tegra2_emc.c
@@ -307,11 +307,6 @@ static int tegra_emc_probe(struct platform_device *pdev)
        }
        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-        if (!res) {
-                dev_err(&pdev->dev, "missing register base\n");
-                return -ENOMEM;
-        }
        emc_regbase = devm_ioremap_resource(&pdev->dev, res);
        if (IS_ERR(emc_regbase))
                return PTR_ERR(emc_regbase);
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index 6a4387e39df8..b19b07204aaf 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -51,6 +51,7 @@ config MACH_MOP500
        bool "U8500 Development platform, MOP500 versions"
        select I2C
        select I2C_NOMADIK
+        select REGULATOR
        select REGULATOR_FIXED_VOLTAGE
        select SOC_BUS
        select UX500_SOC_DB8500
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index 3cd555ac6d0a..78389de94dde 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -623,7 +623,7 @@ static void __init mop500_init_machine(void)
        sdi0_reg_info.gpios[0].gpio = GPIO_SDMMC_1V8_3V_SEL;
        mop500_pinmaps_init();
-        parent = u8500_init_devices(&ab8500_platdata);
+        parent = u8500_init_devices();
        for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
                mop500_platform_devs[i]->dev.parent = parent;
@@ -660,7 +660,7 @@ static void __init snowball_init_machine(void)
        sdi0_reg_info.gpios[0].gpio = SNOWBALL_SDMMC_1V8_3V_GPIO;
        snowball_pinmaps_init();
-        parent = u8500_init_devices(&ab8500_platdata);
+        parent = u8500_init_devices();
        for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++)
                snowball_platform_devs[i]->dev.parent = parent;
@@ -698,7 +698,7 @@ static void __init hrefv60_init_machine(void)
        sdi0_reg_info.gpios[0].gpio = HREFV60_SDMMC_1V8_3V_GPIO;
        hrefv60_pinmaps_init();
-        parent = u8500_init_devices(&ab8500_platdata);
+        parent = u8500_init_devices();
        for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
                mop500_platform_devs[i]->dev.parent = parent;
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index e90b5ab23b6d..46cca52890bc 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -206,7 +206,7 @@ static struct device * __init db8500_soc_device_init(void)
 /*
 * This function is called from the board init
 */
-struct device * __init u8500_init_devices(struct ab8500_platform_data *ab8500)
+struct device * __init u8500_init_devices(void)
 {
        struct device *parent;
        int i;
@@ -220,8 +220,6 @@ struct device * __init u8500_init_devices(struct ab8500_platform_data *ab8500)
        for (i = 0; i < ARRAY_SIZE(platform_devs); i++)
                platform_devs[i]->dev.parent = parent;
-        db8500_prcmu_device.dev.platform_data = ab8500;
        platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
        return parent;
@@ -278,7 +276,7 @@ static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
        OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL),
        OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
                        &db8500_prcmu_pdata),
-        OF_DEV_AUXDATA("smsc,lan9115", 0x50000000, "smsc911x", NULL),
+        OF_DEV_AUXDATA("smsc,lan9115", 0x50000000, "smsc911x.0", NULL),
        /* Requires device name bindings. */
        OF_DEV_AUXDATA("stericsson,nmk-pinctrl", U8500_PRCMU_BASE,
                "pinctrl-db8500", NULL),
diff --git a/arch/arm/mach-ux500/setup.h b/arch/arm/mach-ux500/setup.h
index bddce2b49372..cad3ca86c540 100644
--- a/arch/arm/mach-ux500/setup.h
+++ b/arch/arm/mach-ux500/setup.h
@@ -18,7 +18,7 @@
 void __init ux500_map_io(void);
 extern void __init u8500_map_io(void);
-extern struct device * __init u8500_init_devices(struct ab8500_platform_data *ab8500);
+extern struct device * __init u8500_init_devices(void);
 extern void __init ux500_init_irq(void);
 extern void __init ux500_init_late(void);
diff --git a/arch/arm/mach-vt8500/vt8500.c b/arch/arm/mach-vt8500/vt8500.c
index 1dd281efc020..f5c33df7a597 100644
--- a/arch/arm/mach-vt8500/vt8500.c
+++ b/arch/arm/mach-vt8500/vt8500.c
@@ -173,6 +173,7 @@ static const char * const vt8500_dt_compat[] = {
        "wm,wm8505",
        "wm,wm8750",
        "wm,wm8850",
+        NULL
 };
 DT_MACHINE_START(WMT_DT, "VIA/Wondermedia SoC (Device Tree Support)")
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c
index 251f827271e9..c019b7aaf776 100644
--- a/arch/arm/plat-orion/common.c
+++ b/arch/arm/plat-orion/common.c
@@ -383,7 +383,7 @@ static struct resource orion_ge10_shared_resources[] = {
 static struct platform_device orion_ge10_shared = {
        .name           = MV643XX_ETH_SHARED_NAME,
-        .id             = 1,
+        .id             = 2,
        .dev            = {
                .platform_data  = &orion_ge10_shared_data,
        },
@@ -398,8 +398,8 @@ static struct resource orion_ge10_resources[] = {
 static struct platform_device orion_ge10 = {
        .name           = MV643XX_ETH_NAME,
-        .id             = 1,
+        .id             = 2,
-        .num_resources  = 2,
+        .num_resources  = 1,
        .resource       = orion_ge10_resources,
        .dev            = {
                .coherent_dma_mask      = DMA_BIT_MASK(32),
@@ -432,7 +432,7 @@ static struct resource orion_ge11_shared_resources[] = {
 static struct platform_device orion_ge11_shared = {
        .name           = MV643XX_ETH_SHARED_NAME,
-        .id             = 1,
+        .id             = 3,
        .dev            = {
                .platform_data  = &orion_ge11_shared_data,
        },
@@ -447,8 +447,8 @@ static struct resource orion_ge11_resources[] = {
 static struct platform_device orion_ge11 = {
        .name           = MV643XX_ETH_NAME,
-        .id             = 1,
+        .id             = 3,
-        .num_resources  = 2,
+        .num_resources  = 1,
        .resource       = orion_ge11_resources,
        .dev            = {
                .coherent_dma_mask      = DMA_BIT_MASK(32),
diff --git a/arch/arm/plat-orion/include/plat/common.h b/arch/arm/plat-orion/include/plat/common.h
index e06fc5fefa14..d9a24f605a2b 100644
--- a/arch/arm/plat-orion/include/plat/common.h
+++ b/arch/arm/plat-orion/include/plat/common.h
@@ -10,6 +10,7 @@
 #ifndef __PLAT_COMMON_H
 #include <linux/mv643xx_eth.h>
+#include <linux/platform_data/usb-ehci-orion.h>
 struct dsa_platform_data;
 struct mv_sata_platform_data;
diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/plat-samsung/adc.c
index ca07cb1b155a..79690f2f6d3f 100644
--- a/arch/arm/plat-samsung/adc.c
+++ b/arch/arm/plat-samsung/adc.c
@@ -381,11 +381,6 @@ static int s3c_adc_probe(struct platform_device *pdev)
        }
        regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-        if (!regs) {
-                dev_err(dev, "failed to find registers\n");
-                return -ENXIO;
-        }
        adc->regs = devm_ioremap_resource(dev, regs);
        if (IS_ERR(adc->regs))
                return PTR_ERR(adc->regs);
diff --git a/arch/arm/vfp/entry.S b/arch/arm/vfp/entry.S
index 323ce1a62bbf..46e17492fd1f 100644
--- a/arch/arm/vfp/entry.S
+++ b/arch/arm/vfp/entry.S
@@ -60,7 +60,7 @@ ENTRY(vfp_testing_entry)
        str     r11, [r10, #TI_PREEMPT]
 #endif
        ldr     r0, VFP_arch_address
-        str     r5, [r0]                @ known non-zero value
+        str     r0, [r0]                @ set to non-zero value
        mov     pc, r9                  @ we have handled the fault
 ENDPROC(vfp_testing_entry)
diff --git a/arch/arm/xen/enlighten.c b/arch/arm/xen/enlighten.c
index d30042e39974..13609e01f4b7 100644
--- a/arch/arm/xen/enlighten.c
+++ b/arch/arm/xen/enlighten.c
@@ -152,11 +152,12 @@ int xen_unmap_domain_mfn_range(struct vm_area_struct *vma,
 }
 EXPORT_SYMBOL_GPL(xen_unmap_domain_mfn_range);
-static int __init xen_secondary_init(unsigned int cpu)
+static void __init xen_percpu_init(void *unused)
 {
        struct vcpu_register_vcpu_info info;
        struct vcpu_info *vcpup;
        int err;
+        int cpu = get_cpu();
        pr_info("Xen: initializing cpu%d\n", cpu);
        vcpup = per_cpu_ptr(xen_vcpu_info, cpu);
@@ -165,14 +166,10 @@ static int __init xen_secondary_init(unsigned int cpu)
        info.offset = offset_in_page(vcpup);
        err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info);
-        if (err) {
+        BUG_ON(err);
-                pr_debug("register_vcpu_info failed: err=%d\n", err);
+        per_cpu(xen_vcpu, cpu) = vcpup;
-        } else {
-                /* This cpu is using the registered vcpu info, even if
+        enable_percpu_irq(xen_events_irq, 0);
-                   later ones fail to. */
-                per_cpu(xen_vcpu, cpu) = vcpup;
-        }
-        return 0;
 }
 static void xen_restart(char str, const char *cmd)
@@ -208,7 +205,6 @@ static int __init xen_guest_init(void)
        const char *version = NULL;
        const char *xen_prefix = "xen,xen-";
        struct resource res;
-        int i;
        node = of_find_compatible_node(NULL, NULL, "xen,xen");
        if (!node) {
@@ -265,19 +261,23 @@ static int __init xen_guest_init(void)
                                               sizeof(struct vcpu_info));
        if (xen_vcpu_info == NULL)
                return -ENOMEM;
-        for_each_online_cpu(i)
-                xen_secondary_init(i);
        gnttab_init();
        if (!xen_initial_domain())
                xenbus_probe(NULL);
+        return 0;
+}
+core_initcall(xen_guest_init);
+static int __init xen_pm_init(void)
+{
        pm_power_off = xen_power_off;
        arm_pm_restart = xen_restart;
        return 0;
 }
-core_initcall(xen_guest_init);
+subsys_initcall(xen_pm_init);
 static irqreturn_t xen_arm_callback(int irq, void *arg)
 {
@@ -285,11 +285,6 @@ static irqreturn_t xen_arm_callback(int irq, void *arg)
        return IRQ_HANDLED;
 }
-static __init void xen_percpu_enable_events(void *unused)
-{
-        enable_percpu_irq(xen_events_irq, 0);
-}
 static int __init xen_init_events(void)
 {
        if (!xen_domain() || xen_events_irq < 0)
@@ -303,7 +298,7 @@ static int __init xen_init_events(void)
                return -EINVAL;
        }
-        on_each_cpu(xen_percpu_enable_events, NULL, 0);
+        on_each_cpu(xen_percpu_init, NULL, 0);
        return 0;
 }
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 48347dcf0566..56b3f6d447ae 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -122,8 +122,6 @@ endmenu
 menu "Kernel Features"
-source "kernel/time/Kconfig"
 config ARM64_64K_PAGES
        bool "Enable 64KB pages support"
        help
diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
index c8eedc604984..5aceb83b3f5c 100644
--- a/arch/arm64/include/asm/assembler.h
+++ b/arch/arm64/include/asm/assembler.h
@@ -82,7 +82,7 @@
        .macro  enable_dbg_if_not_stepping, tmp
        mrs     \tmp, mdscr_el1
-        tbnz    \tmp, #1, 9990f
+        tbnz    \tmp, #0, 9990f
        enable_dbg
 9990:
        .endm
diff --git a/arch/arm64/kernel/debug-monitors.c b/arch/arm64/kernel/debug-monitors.c
index 0c3ba9f51376..f4726dc054b3 100644
--- a/arch/arm64/kernel/debug-monitors.c
+++ b/arch/arm64/kernel/debug-monitors.c
@@ -136,8 +136,6 @@ void disable_debug_monitors(enum debug_el el)
 */
 static void clear_os_lock(void *unused)
 {
-        asm volatile("msr mdscr_el1, %0" : : "r" (0));
-        isb();
        asm volatile("msr oslar_el1, %0" : : "r" (0));
        isb();
 }
diff --git a/arch/arm64/kernel/early_printk.c b/arch/arm64/kernel/early_printk.c
index ac974f48a7a2..fbb6e1843659 100644
--- a/arch/arm64/kernel/early_printk.c
+++ b/arch/arm64/kernel/early_printk.c
@@ -95,7 +95,7 @@ static void early_write(struct console *con, const char *s, unsigned n)
        }
 }
-static struct console early_console = {
+static struct console early_console_dev = {
        .name =         "earlycon",
        .write =        early_write,
        .flags =        CON_PRINTBUFFER | CON_BOOT,
@@ -145,7 +145,8 @@ static int __init setup_early_printk(char *buf)
                early_base = early_io_map(paddr, EARLYCON_IOBASE);
        printch = match->printch;
-        register_console(&early_console);
+        early_console = &early_console_dev;
+        register_console(&early_console_dev);
        return 0;
 }
diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c
index 6a9a53292590..add6ea616843 100644
--- a/arch/arm64/kernel/setup.c
+++ b/arch/arm64/kernel/setup.c
@@ -282,12 +282,13 @@ void __init setup_arch(char **cmdline_p)
 #endif
 }
-static int __init arm64_of_clk_init(void)
+static int __init arm64_device_init(void)
 {
        of_clk_init(NULL);
+        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
        return 0;
 }
-arch_initcall(arm64_of_clk_init);
+arch_initcall(arm64_device_init);
 static DEFINE_PER_CPU(struct cpu, cpu_data);
@@ -305,13 +306,6 @@ static int __init topology_init(void)
 }
 subsys_initcall(topology_init);
-static int __init arm64_device_probe(void)
-{
-        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-        return 0;
-}
-device_initcall(arm64_device_probe);
 static const char *hwcap_str[] = {
        "fp",
        "asimd",
diff --git a/arch/arm64/mm/cache.S b/arch/arm64/mm/cache.S
index abe69b80cf7f..48a386094fa3 100644
--- a/arch/arm64/mm/cache.S
+++ b/arch/arm64/mm/cache.S
@@ -52,7 +52,7 @@ loop1:
        add     x2, x2, #4                      // add 4 (line length offset)
        mov     x4, #0x3ff
        and     x4, x4, x1, lsr #3              // find maximum number on the way size
-        clz     x5, x4                          // find bit position of way size increment
+        clz     w5, w4                          // find bit position of way size increment
        mov     x7, #0x7fff
        and     x7, x7, x1, lsr #13             // extract max number of the index size
 loop2:
diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
index f1d8b9bbfdad..a82ae8868077 100644
--- a/arch/arm64/mm/proc.S
+++ b/arch/arm64/mm/proc.S
@@ -119,8 +119,7 @@ ENTRY(__cpu_setup)
        mov     x0, #3 << 20
        msr     cpacr_el1, x0                   // Enable FP/ASIMD
-        mov     x0, #1
+        msr     mdscr_el1, xzr                  // Reset mdscr_el1
-        msr     oslar_el1, x0                   // Set the debug OS lock
        tlbi    vmalle1is                       // invalidate I + D TLBs
        /*
         * Memory region attributes for LPAE:
diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig
index bdc35589277f..549903cfc2cb 100644
--- a/arch/avr32/Kconfig
+++ b/arch/avr32/Kconfig
@@ -205,6 +205,11 @@ config ARCH_DISCONTIGMEM_ENABLE
 config ARCH_SPARSEMEM_ENABLE
        def_bool n
+config NODES_SHIFT
+        int
+        default "2"
+        depends on NEED_MULTIPLE_NODES
 source "mm/Kconfig"
 config OWNERSHIP_TRACE
diff --git a/arch/avr32/include/asm/Kbuild b/arch/avr32/include/asm/Kbuild
index 4dd4f78d3dcc..d22af851f3f6 100644
--- a/arch/avr32/include/asm/Kbuild
+++ b/arch/avr32/include/asm/Kbuild
@@ -2,3 +2,4 @@
 generic-y       += clkdev.h
 generic-y       += exec.h
 generic-y       += trace_clock.h
+generic-y       += param.h
diff --git a/arch/avr32/include/asm/numnodes.h b/arch/avr32/include/asm/numnodes.h
deleted file mode 100644
index 0b864d7ce330..000000000000
--- a/arch/avr32/include/asm/numnodes.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef __ASM_AVR32_NUMNODES_H
-#define __ASM_AVR32_NUMNODES_H
-/* Max 4 nodes */
-#define NODES_SHIFT     2
-#endif /* __ASM_AVR32_NUMNODES_H */
diff --git a/arch/avr32/include/asm/param.h b/arch/avr32/include/asm/param.h
deleted file mode 100644
index 009a167aea1f..000000000000
--- a/arch/avr32/include/asm/param.h
+++ /dev/null
@@ -1,9 +0,0 @@
-#ifndef __ASM_AVR32_PARAM_H
-#define __ASM_AVR32_PARAM_H
-#include <uapi/asm/param.h>
-# define HZ             CONFIG_HZ
-# define USER_HZ        100             /* User interfaces are in "ticks" */
-# define CLOCKS_PER_SEC (USER_HZ)       /* frequency at which times() counts */
-#endif /* __ASM_AVR32_PARAM_H */
diff --git a/arch/avr32/include/uapi/asm/Kbuild b/arch/avr32/include/uapi/asm/Kbuild
index df53e7a46774..3b85eaddf525 100644
--- a/arch/avr32/include/uapi/asm/Kbuild
+++ b/arch/avr32/include/uapi/asm/Kbuild
@@ -33,3 +33,4 @@ header-y += termbits.h
 header-y += termios.h
 header-y += types.h
 header-y += unistd.h
+generic-y += param.h
diff --git a/arch/avr32/include/uapi/asm/param.h b/arch/avr32/include/uapi/asm/param.h
deleted file mode 100644
index d28aa5ee6d37..000000000000
--- a/arch/avr32/include/uapi/asm/param.h
+++ /dev/null
@@ -1,18 +0,0 @@
-#ifndef _UAPI__ASM_AVR32_PARAM_H
-#define _UAPI__ASM_AVR32_PARAM_H
-#ifndef HZ
-# define HZ             100
-#endif
-/* TODO: Should be configurable */
-#define EXEC_PAGESIZE   4096
-#ifndef NOGROUP
-# define NOGROUP        (-1)
-#endif
-#define MAXHOSTNAMELEN  64
-#endif /* _UAPI__ASM_AVR32_PARAM_H */
diff --git a/arch/avr32/kernel/module.c b/arch/avr32/kernel/module.c
index 596f7305d93f..2c9412908024 100644
--- a/arch/avr32/kernel/module.c
+++ b/arch/avr32/kernel/module.c
@@ -264,7 +264,7 @@ int apply_relocate_add(Elf32_Shdr *sechdrs, const char *strtab,
                        break;
                case R_AVR32_GOT18SW:
                        if ((relocation & 0xfffe0003) != 0
-                            && (relocation & 0xfffc0003) != 0xffff0000)
+                            && (relocation & 0xfffc0000) != 0xfffc0000)
                                return reloc_overflow(module, "R_AVR32_GOT18SW",
                                                     relocation);
                        relocation >>= 2;
diff --git a/arch/mips/alchemy/board-gpr.c b/arch/mips/alchemy/board-gpr.c
index cb0f6afb7389..9edc35ff8cf1 100644
--- a/arch/mips/alchemy/board-gpr.c
+++ b/arch/mips/alchemy/board-gpr.c
@@ -31,6 +31,7 @@
 #include <linux/i2c.h>
 #include <linux/i2c-gpio.h>
 #include <asm/bootinfo.h>
+#include <asm/idle.h>
 #include <asm/reboot.h>
 #include <asm/mach-au1x00/au1000.h>
 #include <prom.h>
diff --git a/arch/mips/alchemy/common/time.c b/arch/mips/alchemy/common/time.c
index 38afb11ba2c4..93fa586d52e2 100644
--- a/arch/mips/alchemy/common/time.c
+++ b/arch/mips/alchemy/common/time.c
@@ -36,6 +36,7 @@
 #include <linux/interrupt.h>
 #include <linux/spinlock.h>
+#include <asm/idle.h>
 #include <asm/processor.h>
 #include <asm/time.h>
 #include <asm/mach-au1x00/au1000.h>
diff --git a/arch/mips/ath79/setup.c b/arch/mips/ath79/setup.c
index a0233a2c1988..8be4e856b8b8 100644
--- a/arch/mips/ath79/setup.c
+++ b/arch/mips/ath79/setup.c
@@ -19,6 +19,7 @@
 #include <linux/clk.h>
 #include <asm/bootinfo.h>
+#include <asm/idle.h>
 #include <asm/time.h>           /* for mips_hpt_frequency */
 #include <asm/reboot.h>         /* for _machine_{restart,halt} */
 #include <asm/mips_machine.h>
diff --git a/arch/mips/cobalt/reset.c b/arch/mips/cobalt/reset.c
index 516b4428df4e..4eedd481dd00 100644
--- a/arch/mips/cobalt/reset.c
+++ b/arch/mips/cobalt/reset.c
@@ -12,6 +12,7 @@
 #include <linux/io.h>
 #include <linux/leds.h>
+#include <asm/idle.h>
 #include <asm/processor.h>
 #include <cobalt.h>
diff --git a/arch/mips/configs/db1000_defconfig b/arch/mips/configs/db1000_defconfig
index face9d26e6d5..bac26b971c5e 100644
--- a/arch/mips/configs/db1000_defconfig
+++ b/arch/mips/configs/db1000_defconfig
@@ -228,7 +228,6 @@ CONFIG_HIDRAW=y
 CONFIG_USB_HID=y
 CONFIG_USB_SUPPORT=y
 CONFIG_USB=y
-CONFIG_USB_SUSPEND=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_ROOT_HUB_TT=y
 CONFIG_USB_EHCI_TT_NEWSCHED=y
diff --git a/arch/mips/configs/db1235_defconfig b/arch/mips/configs/db1235_defconfig
index 14752dde7540..e2b4ad55462f 100644
--- a/arch/mips/configs/db1235_defconfig
+++ b/arch/mips/configs/db1235_defconfig
@@ -344,7 +344,6 @@ CONFIG_UHID=y
 CONFIG_USB_HIDDEV=y
 CONFIG_USB=y
 CONFIG_USB_DYNAMIC_MINORS=y
-CONFIG_USB_SUSPEND=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_HCD_PLATFORM=y
 CONFIG_USB_EHCI_ROOT_HUB_TT=y
diff --git a/arch/mips/configs/lemote2f_defconfig b/arch/mips/configs/lemote2f_defconfig
index b6acd2f256b6..343bebc4b63b 100644
--- a/arch/mips/configs/lemote2f_defconfig
+++ b/arch/mips/configs/lemote2f_defconfig
@@ -300,7 +300,6 @@ CONFIG_USB=y
 CONFIG_USB_DEVICEFS=y
 # CONFIG_USB_DEVICE_CLASS is not set
 CONFIG_USB_DYNAMIC_MINORS=y
-CONFIG_USB_SUSPEND=y
 CONFIG_USB_OTG_WHITELIST=y
 CONFIG_USB_MON=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/arch/mips/include/asm/clock.h b/arch/mips/include/asm/clock.h
index c9456e7a7283..778e32d817bc 100644
--- a/arch/mips/include/asm/clock.h
+++ b/arch/mips/include/asm/clock.h
@@ -6,8 +6,6 @@
 #include <linux/seq_file.h>
 #include <linux/clk.h>
-extern void (*cpu_wait) (void);
 struct clk;
 struct clk_ops {
diff --git a/arch/mips/include/asm/idle.h b/arch/mips/include/asm/idle.h
new file mode 100644
index 000000000000..d192158886b1
--- /dev/null
+++ b/arch/mips/include/asm/idle.h
@@ -0,0 +1,23 @@
+#ifndef __ASM_IDLE_H
+#define __ASM_IDLE_H
+#include <linux/linkage.h>
+extern void (*cpu_wait)(void);
+extern void r4k_wait(void);
+extern asmlinkage void __r4k_wait(void);
+extern void r4k_wait_irqoff(void);
+extern void __pastwait(void);
+static inline int using_rollback_handler(void)
+{
+        return cpu_wait == r4k_wait;
+}
+static inline int address_is_in_r4k_wait_irqoff(unsigned long addr)
+{
+        return addr >= (unsigned long)r4k_wait_irqoff &&
+               addr < (unsigned long)__pastwait;
+}
+#endif /* __ASM_IDLE_H  */
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index 1be13727323f..b7e59853fd33 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -118,7 +118,7 @@ static inline void set_io_port_base(unsigned long base)
 */
 static inline unsigned long virt_to_phys(volatile const void *address)
 {
-        return (unsigned long)address - PAGE_OFFSET + PHYS_OFFSET;
+        return __pa(address);
 }
 /*
diff --git a/arch/mips/include/asm/kvm_host.h b/arch/mips/include/asm/kvm_host.h
index e68781e18387..143875c6c95a 100644
--- a/arch/mips/include/asm/kvm_host.h
+++ b/arch/mips/include/asm/kvm_host.h
@@ -336,7 +336,7 @@ enum emulation_result {
 #define VPN2_MASK           0xffffe000
 #define TLB_IS_GLOBAL(x)    (((x).tlb_lo0 & MIPS3_PG_G) && ((x).tlb_lo1 & MIPS3_PG_G))
 #define TLB_VPN2(x)         ((x).tlb_hi & VPN2_MASK)
-#define TLB_ASID(x)         (ASID_MASK((x).tlb_hi))
+#define TLB_ASID(x)         ((x).tlb_hi & ASID_MASK)
 #define TLB_IS_VALID(x, va) (((va) & (1 << PAGE_SHIFT)) ? ((x).tlb_lo1 & MIPS3_PG_V) : ((x).tlb_lo0 & MIPS3_PG_V))
 struct kvm_mips_tlb {
diff --git a/arch/mips/include/asm/mmu_context.h b/arch/mips/include/asm/mmu_context.h
index 1554721e4808..820116067c10 100644
--- a/arch/mips/include/asm/mmu_context.h
+++ b/arch/mips/include/asm/mmu_context.h
@@ -67,68 +67,45 @@ extern unsigned long pgd_current[];
        TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
 #endif
 #endif /* CONFIG_MIPS_PGD_C0_CONTEXT*/
+#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
-#define ASID_INC(asid)                                          \
+#define ASID_INC        0x40
-({                                                              \
+#define ASID_MASK       0xfc0
-        unsigned long __asid = asid;                            \
-        __asm__("1:\taddiu\t%0,1\t\t\t\t# patched\n\t"          \
+#elif defined(CONFIG_CPU_R8000)
-        ".section\t__asid_inc,\"a\"\n\t"                        \
-        ".word\t1b\n\t"                                         \
+#define ASID_INC        0x10
-        ".previous"                                             \
+#define ASID_MASK       0xff0
-        :"=r" (__asid)                                          \
-        :"0" (__asid));                                         \
+#elif defined(CONFIG_MIPS_MT_SMTC)
-        __asid;                                                 \
-})
+#define ASID_INC        0x1
-#define ASID_MASK(asid)                                         \
+extern unsigned long smtc_asid_mask;
-({                                                              \
+#define ASID_MASK       (smtc_asid_mask)
-        unsigned long __asid = asid;                            \
+#define HW_ASID_MASK    0xff
-        __asm__("1:\tandi\t%0,%1,0xfc0\t\t\t# patched\n\t"      \
+/* End SMTC/34K debug hack */
-        ".section\t__asid_mask,\"a\"\n\t"                       \
+#else /* FIXME: not correct for R6000 */
-        ".word\t1b\n\t"                                         \
-        ".previous"                                             \
+#define ASID_INC        0x1
-        :"=r" (__asid)                                          \
+#define ASID_MASK       0xff
-        :"r" (__asid));                                         \
-        __asid;                                                 \
-})
-#define ASID_VERSION_MASK                                       \
-({                                                              \
-        unsigned long __asid;                                   \
-        __asm__("1:\taddiu\t%0,$0,0xff00\t\t\t\t# patched\n\t"  \
-        ".section\t__asid_version_mask,\"a\"\n\t"               \
-        ".word\t1b\n\t"                                         \
-        ".previous"                                             \
-        :"=r" (__asid));                                        \
-        __asid;                                                 \
-})
-#define ASID_FIRST_VERSION                                      \
-({                                                              \
-        unsigned long __asid = asid;                            \
-        __asm__("1:\tli\t%0,0x100\t\t\t\t# patched\n\t"         \
-        ".section\t__asid_first_version,\"a\"\n\t"              \
-        ".word\t1b\n\t"                                         \
-        ".previous"                                             \
-        :"=r" (__asid));                                        \
-        __asid;                                                 \
-})
-#define ASID_FIRST_VERSION_R3000        0x1000
-#define ASID_FIRST_VERSION_R4000        0x100
-#define ASID_FIRST_VERSION_R8000        0x1000
-#define ASID_FIRST_VERSION_RM9000       0x1000
-#ifdef CONFIG_MIPS_MT_SMTC
-#define SMTC_HW_ASID_MASK               0xff
-extern unsigned int smtc_asid_mask;
 #endif
 #define cpu_context(cpu, mm)    ((mm)->context.asid[cpu])
-#define cpu_asid(cpu, mm)       ASID_MASK(cpu_context((cpu), (mm)))
+#define cpu_asid(cpu, mm)       (cpu_context((cpu), (mm)) & ASID_MASK)
 #define asid_cache(cpu)         (cpu_data[cpu].asid_cache)
 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
 {
 }
+/*
+ *  All unused by hardware upper bits will be considered
+ *  as a software asid extension.
+ */
+#define ASID_VERSION_MASK  ((unsigned long)~(ASID_MASK|(ASID_MASK-1)))
+#define ASID_FIRST_VERSION ((unsigned long)(~ASID_VERSION_MASK) + 1)
 #ifndef CONFIG_MIPS_MT_SMTC
 /* Normal, classic MIPS get_new_mmu_context */
 static inline void
@@ -137,7 +114,7 @@ get_new_mmu_context(struct mm_struct *mm, unsigned long cpu)
        extern void kvm_local_flush_tlb_all(void);
        unsigned long asid = asid_cache(cpu);
-        if (!ASID_MASK((asid = ASID_INC(asid)))) {
+        if (! ((asid += ASID_INC) & ASID_MASK) ) {
                if (cpu_has_vtag_icache)
                        flush_icache_all();
 #ifdef CONFIG_VIRTUALIZATION
@@ -200,7 +177,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
         * free up the ASID value for use and flush any old
         * instances of it from the TLB.
         */
-        oldasid = ASID_MASK(read_c0_entryhi());
+        oldasid = (read_c0_entryhi() & ASID_MASK);
        if(smtc_live_asid[mytlb][oldasid]) {
                smtc_live_asid[mytlb][oldasid] &= ~(0x1 << cpu);
                if(smtc_live_asid[mytlb][oldasid] == 0)
@@ -211,7 +188,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
         * having ASID_MASK smaller than the hardware maximum,
         * make sure no "soft" bits become "hard"...
         */
-        write_c0_entryhi((read_c0_entryhi() & ~SMTC_HW_ASID_MASK) |
+        write_c0_entryhi((read_c0_entryhi() & ~HW_ASID_MASK) |
                         cpu_asid(cpu, next));
        ehb(); /* Make sure it propagates to TCStatus */
        evpe(mtflags);
@@ -264,15 +241,15 @@ activate_mm(struct mm_struct *prev, struct mm_struct *next)
 #ifdef CONFIG_MIPS_MT_SMTC
        /* See comments for similar code above */
        mtflags = dvpe();
-        oldasid = ASID_MASK(read_c0_entryhi());
+        oldasid = read_c0_entryhi() & ASID_MASK;
        if(smtc_live_asid[mytlb][oldasid]) {
                smtc_live_asid[mytlb][oldasid] &= ~(0x1 << cpu);
                if(smtc_live_asid[mytlb][oldasid] == 0)
                         smtc_flush_tlb_asid(oldasid);
        }
        /* See comments for similar code above */
-        write_c0_entryhi((read_c0_entryhi() & ~SMTC_HW_ASID_MASK) |
+        write_c0_entryhi((read_c0_entryhi() & ~HW_ASID_MASK) |
-                         cpu_asid(cpu, next));
+                         cpu_asid(cpu, next));
        ehb(); /* Make sure it propagates to TCStatus */
        evpe(mtflags);
 #else
@@ -309,14 +286,14 @@ drop_mmu_context(struct mm_struct *mm, unsigned cpu)
 #ifdef CONFIG_MIPS_MT_SMTC
                /* See comments for similar code above */
                prevvpe = dvpe();
-                oldasid = ASID_MASK(read_c0_entryhi());
+                oldasid = (read_c0_entryhi() & ASID_MASK);
                if (smtc_live_asid[mytlb][oldasid]) {
                        smtc_live_asid[mytlb][oldasid] &= ~(0x1 << cpu);
                        if(smtc_live_asid[mytlb][oldasid] == 0)
                                smtc_flush_tlb_asid(oldasid);
                }
                /* See comments for similar code above */
-                write_c0_entryhi((read_c0_entryhi() & ~SMTC_HW_ASID_MASK)
+                write_c0_entryhi((read_c0_entryhi() & ~HW_ASID_MASK)
                                | cpu_asid(cpu, mm));
                ehb(); /* Make sure it propagates to TCStatus */
                evpe(prevvpe);
diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h
index eab99e536b5c..f59552fae917 100644
--- a/arch/mips/include/asm/page.h
+++ b/arch/mips/include/asm/page.h
@@ -46,7 +46,6 @@
 #endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
 #include <linux/pfn.h>
-#include <asm/io.h>
 extern void build_clear_page(void);
 extern void build_copy_page(void);
@@ -151,6 +150,7 @@ typedef struct { unsigned long pgprot; } pgprot_t;
    ((unsigned long)(x) - PAGE_OFFSET + PHYS_OFFSET)
 #endif
 #define __va(x)         ((void *)((unsigned long)(x) + PAGE_OFFSET - PHYS_OFFSET))
+#include <asm/io.h>
 /*
 * RELOC_HIDE was originally added by 6007b903dfe5f1d13e0c711ac2894bdd4a61b1ad
@@ -171,14 +171,13 @@ typedef struct { unsigned long pgprot; } pgprot_t;
 #ifdef CONFIG_FLATMEM
-#define pfn_valid(pfn)                                                  \
+static inline int pfn_valid(unsigned long pfn)
-({                                                                      \
+{
-        unsigned long __pfn = (pfn);                                    \
+        /* avoid <linux/mm.h> include hell */
-        /* avoid <linux/bootmem.h> include hell */                      \
+        extern unsigned long max_mapnr;
-        extern unsigned long min_low_pfn;                               \
-                                                                        \
+        return pfn >= ARCH_PFN_OFFSET && pfn < max_mapnr;
-        __pfn >= min_low_pfn && __pfn < max_mapnr;                      \
+}
-})
 #elif defined(CONFIG_SPARSEMEM)
diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h
index 71686c897dea..1470b7b68b0e 100644
--- a/arch/mips/include/asm/processor.h
+++ b/arch/mips/include/asm/processor.h
@@ -28,7 +28,6 @@
 /*
 * System setup and hardware flags..
 */
-extern void (*cpu_wait)(void);
 extern unsigned int vced_count, vcei_count;
diff --git a/arch/mips/include/asm/kvm.h b/arch/mips/include/uapi/asm/kvm.h
index 85789eacbf18..85789eacbf18 100644
--- a/arch/mips/include/asm/kvm.h
+++ b/arch/mips/include/uapi/asm/kvm.h
diff --git a/arch/mips/include/uapi/asm/unistd.h b/arch/mips/include/uapi/asm/unistd.h
index 16338b84fa79..1dee279f9665 100644
--- a/arch/mips/include/uapi/asm/unistd.h
+++ b/arch/mips/include/uapi/asm/unistd.h
@@ -694,16 +694,17 @@
 #define __NR_process_vm_writev          (__NR_Linux + 305)
 #define __NR_kcmp                       (__NR_Linux + 306)
 #define __NR_finit_module               (__NR_Linux + 307)
+#define __NR_getdents64                 (__NR_Linux + 308)
 /*
 * Offset of the last Linux 64-bit flavoured syscall
 */
-#define __NR_Linux_syscalls             307
+#define __NR_Linux_syscalls             308
 #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
 #define __NR_64_Linux                   5000
-#define __NR_64_Linux_syscalls          307
+#define __NR_64_Linux_syscalls          308
 #if _MIPS_SIM == _MIPS_SIM_NABI32
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index 6ad9e04bdf62..423d871a946b 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -4,7 +4,7 @@
 extra-y         := head.o vmlinux.lds
-obj-y           += cpu-probe.o branch.o entry.o genex.o irq.o process.o \
+obj-y           += cpu-probe.o branch.o entry.o genex.o idle.o irq.o process.o \
                   prom.o ptrace.o reset.o setup.o signal.o syscall.o \
                   time.o topology.o traps.o unaligned.o watch.o vdso.o
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 4bbffdb9024f..c6568bf4b1b0 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -27,105 +27,6 @@
 #include <asm/spram.h>
 #include <asm/uaccess.h>
-/*
- * Not all of the MIPS CPUs have the "wait" instruction available. Moreover,
- * the implementation of the "wait" feature differs between CPU families. This
- * points to the function that implements CPU specific wait.
- * The wait instruction stops the pipeline and reduces the power consumption of
- * the CPU very much.
- */
-void (*cpu_wait)(void);
-EXPORT_SYMBOL(cpu_wait);
-static void r3081_wait(void)
-{
-        unsigned long cfg = read_c0_conf();
-        write_c0_conf(cfg | R30XX_CONF_HALT);
-}
-static void r39xx_wait(void)
-{
-        local_irq_disable();
-        if (!need_resched())
-                write_c0_conf(read_c0_conf() | TX39_CONF_HALT);
-        local_irq_enable();
-}
-extern void r4k_wait(void);
-/*
- * This variant is preferable as it allows testing need_resched and going to
- * sleep depending on the outcome atomically.  Unfortunately the "It is
- * implementation-dependent whether the pipeline restarts when a non-enabled
- * interrupt is requested" restriction in the MIPS32/MIPS64 architecture makes
- * using this version a gamble.
- */
-void r4k_wait_irqoff(void)
-{
-        local_irq_disable();
-        if (!need_resched())
-                __asm__("       .set    push            \n"
-                        "       .set    mips3           \n"
-                        "       wait                    \n"
-                        "       .set    pop             \n");
-        local_irq_enable();
-        __asm__("       .globl __pastwait       \n"
-                "__pastwait:                    \n");
-}
-/*
- * The RM7000 variant has to handle erratum 38.  The workaround is to not
- * have any pending stores when the WAIT instruction is executed.
- */
-static void rm7k_wait_irqoff(void)
-{
-        local_irq_disable();
-        if (!need_resched())
-                __asm__(
-                "       .set    push                                    \n"
-                "       .set    mips3                                   \n"
-                "       .set    noat                                    \n"
-                "       mfc0    $1, $12                                 \n"
-                "       sync                                            \n"
-                "       mtc0    $1, $12         # stalls until W stage  \n"
-                "       wait                                            \n"
-                "       mtc0    $1, $12         # stalls until W stage  \n"
-                "       .set    pop                                     \n");
-        local_irq_enable();
-}
-/*
- * The Au1xxx wait is available only if using 32khz counter or
- * external timer source, but specifically not CP0 Counter.
- * alchemy/common/time.c may override cpu_wait!
- */
-static void au1k_wait(void)
-{
-        __asm__("       .set    mips3                   \n"
-                "       cache   0x14, 0(%0)             \n"
-                "       cache   0x14, 32(%0)            \n"
-                "       sync                            \n"
-                "       nop                             \n"
-                "       wait                            \n"
-                "       nop                             \n"
-                "       nop                             \n"
-                "       nop                             \n"
-                "       nop                             \n"
-                "       .set    mips0                   \n"
-                : : "r" (au1k_wait));
-}
-static int __initdata nowait;
-static int __init wait_disable(char *s)
-{
-        nowait = 1;
-        return 1;
-}
-__setup("nowait", wait_disable);
 static int __cpuinitdata mips_fpu_disabled;
 static int __init fpu_disable(char *s)
@@ -150,105 +51,6 @@ static int __init dsp_disable(char *s)
 __setup("nodsp", dsp_disable);
-void __init check_wait(void)
-{
-        struct cpuinfo_mips *c = &current_cpu_data;
-        if (nowait) {
-                printk("Wait instruction disabled.\n");
-                return;
-        }
-        switch (c->cputype) {
-        case CPU_R3081:
-        case CPU_R3081E:
-                cpu_wait = r3081_wait;
-                break;
-        case CPU_TX3927:
-                cpu_wait = r39xx_wait;
-                break;
-        case CPU_R4200:
-/*      case CPU_R4300: */
-        case CPU_R4600:
-        case CPU_R4640:
-        case CPU_R4650:
-        case CPU_R4700:
-        case CPU_R5000:
-        case CPU_R5500:
-        case CPU_NEVADA:
-        case CPU_4KC:
-        case CPU_4KEC:
-        case CPU_4KSC:
-        case CPU_5KC:
-        case CPU_25KF:
-        case CPU_PR4450:
-        case CPU_BMIPS3300:
-        case CPU_BMIPS4350:
-        case CPU_BMIPS4380:
-        case CPU_BMIPS5000:
-        case CPU_CAVIUM_OCTEON:
-        case CPU_CAVIUM_OCTEON_PLUS:
-        case CPU_CAVIUM_OCTEON2:
-        case CPU_JZRISC:
-        case CPU_LOONGSON1:
-        case CPU_XLR:
-        case CPU_XLP:
-                cpu_wait = r4k_wait;
-                break;
-        case CPU_RM7000:
-                cpu_wait = rm7k_wait_irqoff;
-                break;
-        case CPU_M14KC:
-        case CPU_M14KEC:
-        case CPU_24K:
-        case CPU_34K:
-        case CPU_1004K:
-                cpu_wait = r4k_wait;
-                if (read_c0_config7() & MIPS_CONF7_WII)
-                        cpu_wait = r4k_wait_irqoff;
-                break;
-        case CPU_74K:
-                cpu_wait = r4k_wait;
-                if ((c->processor_id & 0xff) >= PRID_REV_ENCODE_332(2, 1, 0))
-                        cpu_wait = r4k_wait_irqoff;
-                break;
-        case CPU_TX49XX:
-                cpu_wait = r4k_wait_irqoff;
-                break;
-        case CPU_ALCHEMY:
-                cpu_wait = au1k_wait;
-                break;
-        case CPU_20KC:
-                /*
-                 * WAIT on Rev1.0 has E1, E2, E3 and E16.
-                 * WAIT on Rev2.0 and Rev3.0 has E16.
-                 * Rev3.1 WAIT is nop, why bother
-                 */
-                if ((c->processor_id & 0xff) <= 0x64)
-                        break;
-                /*
-                 * Another rev is incremeting c0_count at a reduced clock
-                 * rate while in WAIT mode.  So we basically have the choice
-                 * between using the cp0 timer as clocksource or avoiding
-                 * the WAIT instruction.  Until more details are known,
-                 * disable the use of WAIT for 20Kc entirely.
-                   cpu_wait = r4k_wait;
-                 */
-                break;
-        case CPU_RM9000:
-                if ((c->processor_id & 0x00ff) >= 0x40)
-                        cpu_wait = r4k_wait;
-                break;
-        default:
-                break;
-        }
-}
 static inline void check_errata(void)
 {
        struct cpuinfo_mips *c = &current_cpu_data;
diff --git a/arch/mips/kernel/crash_dump.c b/arch/mips/kernel/crash_dump.c
index 35bed0d2342c..3be9e7bb30ff 100644
--- a/arch/mips/kernel/crash_dump.c
+++ b/arch/mips/kernel/crash_dump.c
@@ -2,6 +2,7 @@
 #include <linux/bootmem.h>
 #include <linux/crash_dump.h>
 #include <asm/uaccess.h>
+#include <linux/slab.h>
 static int __init parse_savemaxmem(char *p)
 {
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index 5c2ba9f08a80..31fa856829cb 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -122,7 +122,7 @@ handle_vcei:
        __FINIT
        .align  5       /* 32 byte rollback region */
-LEAF(r4k_wait)
+LEAF(__r4k_wait)
        .set    push
        .set    noreorder
        /* start of rollback region */
@@ -146,14 +146,14 @@ LEAF(r4k_wait)
        jr      ra
        nop
        .set    pop
-        END(r4k_wait)
+        END(__r4k_wait)
        .macro  BUILD_ROLLBACK_PROLOGUE handler
        FEXPORT(rollback_\handler)
        .set    push
        .set    noat
        MFC0    k0, CP0_EPC
-        PTR_LA  k1, r4k_wait
+        PTR_LA  k1, __r4k_wait
        ori     k0, 0x1f        /* 32 byte rollback region */
        xori    k0, 0x1f
        bne     k0, k1, 9f
@@ -493,7 +493,7 @@ NESTED(nmi_handler, PT_SIZE, sp)
        .set    noreorder
        /* check if TLB contains a entry for EPC */
        MFC0    k1, CP0_ENTRYHI
-        andi    k1, 0xff        /* ASID_MASK patched at run-time!! */
+        andi    k1, 0xff        /* ASID_MASK */
        MFC0    k0, CP0_EPC
        PTR_SRL k0, _PAGE_SHIFT + 1
        PTR_SLL k0, _PAGE_SHIFT + 1
diff --git a/arch/mips/kernel/idle.c b/arch/mips/kernel/idle.c
new file mode 100644
index 000000000000..3b09b888afa9
--- /dev/null
+++ b/arch/mips/kernel/idle.c
@@ -0,0 +1,244 @@
+/*
+ * MIPS idle loop and WAIT instruction support.
+ *
+ * Copyright (C) xxxx  the Anonymous
+ * Copyright (C) 1994 - 2006 Ralf Baechle
+ * Copyright (C) 2003, 2004  Maciej W. Rozycki
+ * Copyright (C) 2001, 2004, 2011, 2012  MIPS Technologies, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/export.h>
+#include <linux/init.h>
+#include <linux/irqflags.h>
+#include <linux/printk.h>
+#include <linux/sched.h>
+#include <asm/cpu.h>
+#include <asm/cpu-info.h>
+#include <asm/idle.h>
+#include <asm/mipsregs.h>
+/*
+ * Not all of the MIPS CPUs have the "wait" instruction available. Moreover,
+ * the implementation of the "wait" feature differs between CPU families. This
+ * points to the function that implements CPU specific wait.
+ * The wait instruction stops the pipeline and reduces the power consumption of
+ * the CPU very much.
+ */
+void (*cpu_wait)(void);
+EXPORT_SYMBOL(cpu_wait);
+static void r3081_wait(void)
+{
+        unsigned long cfg = read_c0_conf();
+        write_c0_conf(cfg | R30XX_CONF_HALT);
+        local_irq_enable();
+}
+static void r39xx_wait(void)
+{
+        if (!need_resched())
+                write_c0_conf(read_c0_conf() | TX39_CONF_HALT);
+        local_irq_enable();
+}
+void r4k_wait(void)
+{
+        local_irq_enable();
+        __r4k_wait();
+}
+/*
+ * This variant is preferable as it allows testing need_resched and going to
+ * sleep depending on the outcome atomically.  Unfortunately the "It is
+ * implementation-dependent whether the pipeline restarts when a non-enabled
+ * interrupt is requested" restriction in the MIPS32/MIPS64 architecture makes
+ * using this version a gamble.
+ */
+void r4k_wait_irqoff(void)
+{
+        if (!need_resched())
+                __asm__(
+                "       .set    push            \n"
+                "       .set    mips3           \n"
+                "       wait                    \n"
+                "       .set    pop             \n");
+        local_irq_enable();
+        __asm__(
+        "       .globl __pastwait       \n"
+        "__pastwait:                    \n");
+}
+/*
+ * The RM7000 variant has to handle erratum 38.  The workaround is to not
+ * have any pending stores when the WAIT instruction is executed.
+ */
+static void rm7k_wait_irqoff(void)
+{
+        if (!need_resched())
+                __asm__(
+                "       .set    push                                    \n"
+                "       .set    mips3                                   \n"
+                "       .set    noat                                    \n"
+                "       mfc0    $1, $12                                 \n"
+                "       sync                                            \n"
+                "       mtc0    $1, $12         # stalls until W stage  \n"
+                "       wait                                            \n"
+                "       mtc0    $1, $12         # stalls until W stage  \n"
+                "       .set    pop                                     \n");
+        local_irq_enable();
+}
+/*
+ * The Au1xxx wait is available only if using 32khz counter or
+ * external timer source, but specifically not CP0 Counter.
+ * alchemy/common/time.c may override cpu_wait!
+ */
+static void au1k_wait(void)
+{
+        __asm__(
+        "       .set    mips3                   \n"
+        "       cache   0x14, 0(%0)             \n"
+        "       cache   0x14, 32(%0)            \n"
+        "       sync                            \n"
+        "       nop                             \n"
+        "       wait                            \n"
+        "       nop                             \n"
+        "       nop                             \n"
+        "       nop                             \n"
+        "       nop                             \n"
+        "       .set    mips0                   \n"
+        : : "r" (au1k_wait));
+        local_irq_enable();
+}
+static int __initdata nowait;
+static int __init wait_disable(char *s)
+{
+        nowait = 1;
+        return 1;
+}
+__setup("nowait", wait_disable);
+void __init check_wait(void)
+{
+        struct cpuinfo_mips *c = &current_cpu_data;
+        if (nowait) {
+                printk("Wait instruction disabled.\n");
+                return;
+        }
+        switch (c->cputype) {
+        case CPU_R3081:
+        case CPU_R3081E:
+                cpu_wait = r3081_wait;
+                break;
+        case CPU_TX3927:
+                cpu_wait = r39xx_wait;
+                break;
+        case CPU_R4200:
+/*      case CPU_R4300: */
+        case CPU_R4600:
+        case CPU_R4640:
+        case CPU_R4650:
+        case CPU_R4700:
+        case CPU_R5000:
+        case CPU_R5500:
+        case CPU_NEVADA:
+        case CPU_4KC:
+        case CPU_4KEC:
+        case CPU_4KSC:
+        case CPU_5KC:
+        case CPU_25KF:
+        case CPU_PR4450:
+        case CPU_BMIPS3300:
+        case CPU_BMIPS4350:
+        case CPU_BMIPS4380:
+        case CPU_BMIPS5000:
+        case CPU_CAVIUM_OCTEON:
+        case CPU_CAVIUM_OCTEON_PLUS:
+        case CPU_CAVIUM_OCTEON2:
+        case CPU_JZRISC:
+        case CPU_LOONGSON1:
+        case CPU_XLR:
+        case CPU_XLP:
+                cpu_wait = r4k_wait;
+                break;
+        case CPU_RM7000:
+                cpu_wait = rm7k_wait_irqoff;
+                break;
+        case CPU_M14KC:
+        case CPU_M14KEC:
+        case CPU_24K:
+        case CPU_34K:
+        case CPU_1004K:
+                cpu_wait = r4k_wait;
+                if (read_c0_config7() & MIPS_CONF7_WII)
+                        cpu_wait = r4k_wait_irqoff;
+                break;
+        case CPU_74K:
+                cpu_wait = r4k_wait;
+                if ((c->processor_id & 0xff) >= PRID_REV_ENCODE_332(2, 1, 0))
+                        cpu_wait = r4k_wait_irqoff;
+                break;
+        case CPU_TX49XX:
+                cpu_wait = r4k_wait_irqoff;
+                break;
+        case CPU_ALCHEMY:
+                cpu_wait = au1k_wait;
+                break;
+        case CPU_20KC:
+                /*
+                 * WAIT on Rev1.0 has E1, E2, E3 and E16.
+                 * WAIT on Rev2.0 and Rev3.0 has E16.
+                 * Rev3.1 WAIT is nop, why bother
+                 */
+                if ((c->processor_id & 0xff) <= 0x64)
+                        break;
+                /*
+                 * Another rev is incremeting c0_count at a reduced clock
+                 * rate while in WAIT mode.  So we basically have the choice
+                 * between using the cp0 timer as clocksource or avoiding
+                 * the WAIT instruction.  Until more details are known,
+                 * disable the use of WAIT for 20Kc entirely.
+                   cpu_wait = r4k_wait;
+                 */
+                break;
+        case CPU_RM9000:
+                if ((c->processor_id & 0x00ff) >= 0x40)
+                        cpu_wait = r4k_wait;
+                break;
+        default:
+                break;
+        }
+}
+static void smtc_idle_hook(void)
+{
+#ifdef CONFIG_MIPS_MT_SMTC
+        void smtc_idle_loop_hook(void);
+        smtc_idle_loop_hook();
+#endif
+}
+void arch_cpu_idle(void)
+{
+        smtc_idle_hook();
+        if (cpu_wait)
+                cpu_wait();
+        else
+                local_irq_enable();
+}
diff --git a/arch/mips/kernel/kprobes.c b/arch/mips/kernel/kprobes.c
index 12bc4ebdf55b..1f8187ab0997 100644
--- a/arch/mips/kernel/kprobes.c
+++ b/arch/mips/kernel/kprobes.c
@@ -207,7 +207,10 @@ void __kprobes arch_disarm_kprobe(struct kprobe *p)
 void __kprobes arch_remove_kprobe(struct kprobe *p)
 {
-        free_insn_slot(p->ainsn.insn, 0);
+        if (p->ainsn.insn) {
+                free_insn_slot(p->ainsn.insn, 0);
+                p->ainsn.insn = NULL;
+        }
 }
 static void save_previous_kprobe(struct kprobe_ctlblk *kcb)
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index a3e461408b7e..acb34373679e 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -10,6 +10,7 @@
 #include <asm/bootinfo.h>
 #include <asm/cpu.h>
 #include <asm/cpu-features.h>
+#include <asm/idle.h>
 #include <asm/mipsregs.h>
 #include <asm/processor.h>
 #include <asm/prom.h>
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index eb902c1f0cad..c6a041d9d05d 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -51,19 +51,6 @@ void arch_cpu_idle_dead(void)
 }
 #endif
-void arch_cpu_idle(void)
-{
-#ifdef CONFIG_MIPS_MT_SMTC
-        extern void smtc_idle_loop_hook(void);
-        smtc_idle_loop_hook();
-#endif
-        if (cpu_wait)
-                (*cpu_wait)();
-        else
-                local_irq_enable();
-}
 asmlinkage void ret_from_fork(void);
 asmlinkage void ret_from_kernel_thread(void);
@@ -224,6 +211,9 @@ struct mips_frame_info {
        int             pc_offset;
 };
+#define J_TARGET(pc,target)     \
+                (((unsigned long)(pc) & 0xf0000000) | ((target) << 2))
 static inline int is_ra_save_ins(union mips_instruction *ip)
 {
 #ifdef CONFIG_CPU_MICROMIPS
@@ -264,7 +254,7 @@ static inline int is_ra_save_ins(union mips_instruction *ip)
 #endif
 }
-static inline int is_jal_jalr_jr_ins(union mips_instruction *ip)
+static inline int is_jump_ins(union mips_instruction *ip)
 {
 #ifdef CONFIG_CPU_MICROMIPS
        /*
@@ -288,6 +278,8 @@ static inline int is_jal_jalr_jr_ins(union mips_instruction *ip)
                return 0;
        return (((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op);
 #else
+        if (ip->j_format.opcode == j_op)
+                return 1;
        if (ip->j_format.opcode == jal_op)
                return 1;
        if (ip->r_format.opcode != spec_op)
@@ -350,7 +342,7 @@ static int get_frame_info(struct mips_frame_info *info)
        for (i = 0; i < max_insns; i++, ip++) {
-                if (is_jal_jalr_jr_ins(ip))
+                if (is_jump_ins(ip))
                        break;
                if (!info->frame_size) {
                        if (is_sp_move_ins(ip))
@@ -393,15 +385,42 @@ err:
 static struct mips_frame_info schedule_mfi __read_mostly;
+#ifdef CONFIG_KALLSYMS
+static unsigned long get___schedule_addr(void)
+{
+        return kallsyms_lookup_name("__schedule");
+}
+#else
+static unsigned long get___schedule_addr(void)
+{
+        union mips_instruction *ip = (void *)schedule;
+        int max_insns = 8;
+        int i;
+        for (i = 0; i < max_insns; i++, ip++) {
+                if (ip->j_format.opcode == j_op)
+                        return J_TARGET(ip, ip->j_format.target);
+        }
+        return 0;
+}
+#endif
 static int __init frame_info_init(void)
 {
        unsigned long size = 0;
 #ifdef CONFIG_KALLSYMS
        unsigned long ofs;
+#endif
+        unsigned long addr;
+        addr = get___schedule_addr();
+        if (!addr)
+                addr = (unsigned long)schedule;
-        kallsyms_lookup_size_offset((unsigned long)schedule, &size, &ofs);
+#ifdef CONFIG_KALLSYMS
+        kallsyms_lookup_size_offset(addr, &size, &ofs);
 #endif
-        schedule_mfi.func = schedule;
+        schedule_mfi.func = (void *)addr;
        schedule_mfi.func_size = size;
        get_frame_info(&schedule_mfi);
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index 36cfd4060e1f..97a5909a61cf 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -423,4 +423,5 @@ sys_call_table:
        PTR     sys_process_vm_writev           /* 5305 */
        PTR     sys_kcmp
        PTR     sys_finit_module
+        PTR     sys_getdents64
        .size   sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index c17619fe18e3..6e7862ab46cc 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -37,6 +37,7 @@
 #include <linux/atomic.h>
 #include <asm/cpu.h>
 #include <asm/processor.h>
+#include <asm/idle.h>
 #include <asm/r4k-timer.h>
 #include <asm/mmu_context.h>
 #include <asm/time.h>
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 31d22f3121c9..75a4fd709841 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -34,6 +34,7 @@
 #include <asm/hardirq.h>
 #include <asm/hazards.h>
 #include <asm/irq.h>
+#include <asm/idle.h>
 #include <asm/mmu_context.h>
 #include <asm/mipsregs.h>
 #include <asm/cacheflush.h>
@@ -111,7 +112,7 @@ static int vpe0limit;
 static int ipibuffers;
 static int nostlb;
 static int asidmask;
-unsigned int smtc_asid_mask = 0xff;
+unsigned long smtc_asid_mask = 0xff;
 static int __init vpe0tcs(char *str)
 {
@@ -858,7 +859,6 @@ void smtc_send_ipi(int cpu, int type, unsigned int action)
        unsigned long flags;
        int mtflags;
        unsigned long tcrestart;
-        extern void r4k_wait_irqoff(void), __pastwait(void);
        int set_resched_flag = (type == LINUX_SMP_IPI &&
                                action == SMP_RESCHEDULE_YOURSELF);
@@ -914,8 +914,7 @@ void smtc_send_ipi(int cpu, int type, unsigned int action)
                         */
                        if (cpu_wait == r4k_wait_irqoff) {
                                tcrestart = read_tc_c0_tcrestart();
-                                if (tcrestart >= (unsigned long)r4k_wait_irqoff
+                                if (address_is_in_r4k_wait_irqoff(tcrestart)) {
-                                    && tcrestart < (unsigned long)__pastwait) {
                                        write_tc_c0_tcrestart(__pastwait);
                                        tcstatus &= ~TCSTATUS_IXMT;
                                        write_tc_c0_tcstatus(tcstatus);
@@ -1395,7 +1394,7 @@ void smtc_get_new_mmu_context(struct mm_struct *mm, unsigned long cpu)
        asid = asid_cache(cpu);
        do {
-                if (!ASID_MASK(ASID_INC(asid))) {
+                if (!((asid += ASID_INC) & ASID_MASK) ) {
                        if (cpu_has_vtag_icache)
                                flush_icache_all();
                        /* Traverse all online CPUs (hack requires contiguous range) */
@@ -1414,7 +1413,7 @@ void smtc_get_new_mmu_context(struct mm_struct *mm, unsigned long cpu)
                                                mips_ihb();
                                        }
                                        tcstat = read_tc_c0_tcstatus();
-                                        smtc_live_asid[tlb][ASID_MASK(tcstat)] |= (asiduse)(0x1 << i);
+                                        smtc_live_asid[tlb][(tcstat & ASID_MASK)] |= (asiduse)(0x1 << i);
                                        if (!prevhalt)
                                                write_tc_c0_tchalt(0);
                                }
@@ -1423,7 +1422,7 @@ void smtc_get_new_mmu_context(struct mm_struct *mm, unsigned long cpu)
                                asid = ASID_FIRST_VERSION;
                        local_flush_tlb_all();  /* start new asid cycle */
                }
-        } while (smtc_live_asid[tlb][ASID_MASK(asid)]);
+        } while (smtc_live_asid[tlb][(asid & ASID_MASK)]);
        /*
         * SMTC shares the TLB within VPEs and possibly across all VPEs.
@@ -1461,7 +1460,7 @@ void smtc_flush_tlb_asid(unsigned long asid)
                tlb_read();
                ehb();
                ehi = read_c0_entryhi();
-                if (ASID_MASK(ehi) == asid) {
+                if ((ehi & ASID_MASK) == asid) {
                    /*
                     * Invalidate only entries with specified ASID,
                     * makiing sure all entries differ.
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 77cff1f6d050..e3be67012d78 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -41,6 +41,7 @@
 #include <asm/dsp.h>
 #include <asm/fpu.h>
 #include <asm/fpu_emulator.h>
+#include <asm/idle.h>
 #include <asm/mipsregs.h>
 #include <asm/mipsmtregs.h>
 #include <asm/module.h>
@@ -57,7 +58,6 @@
 #include <asm/uasm.h>
 extern void check_wait(void);
-extern asmlinkage void r4k_wait(void);
 extern asmlinkage void rollback_handle_int(void);
 extern asmlinkage void handle_int(void);
 extern u32 handle_tlbl[];
@@ -1542,7 +1542,7 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
                extern char except_vec_vi, except_vec_vi_lui;
                extern char except_vec_vi_ori, except_vec_vi_end;
                extern char rollback_except_vec_vi;
-                char *vec_start = (cpu_wait == r4k_wait) ?
+                char *vec_start = using_rollback_handler() ?
                        &rollback_except_vec_vi : &except_vec_vi;
 #ifdef CONFIG_MIPS_MT_SMTC
                /*
@@ -1656,7 +1656,6 @@ void __cpuinit per_cpu_trap_init(bool is_boot_cpu)
        unsigned int cpu = smp_processor_id();
        unsigned int status_set = ST0_CU0;
        unsigned int hwrena = cpu_hwrena_impl_bits;
-        unsigned long asid = 0;
 #ifdef CONFIG_MIPS_MT_SMTC
        int secondaryTC = 0;
        int bootTC = (cpu == 0);
@@ -1740,9 +1739,8 @@ void __cpuinit per_cpu_trap_init(bool is_boot_cpu)
        }
 #endif /* CONFIG_MIPS_MT_SMTC */
-        asid = ASID_FIRST_VERSION;
+        if (!cpu_data[cpu].asid_cache)
-        cpu_data[cpu].asid_cache = asid;
+                cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
-        TLBMISS_HANDLER_SETUP();
        atomic_inc(&init_mm.mm_count);
        current->active_mm = &init_mm;
@@ -1814,10 +1812,8 @@ void __init trap_init(void)
        extern char except_vec4;
        extern char except_vec3_r4000;
        unsigned long i;
-        int rollback;
        check_wait();
-        rollback = (cpu_wait == r4k_wait);
 #if defined(CONFIG_KGDB)
        if (kgdb_early_setup)
@@ -1894,7 +1890,8 @@ void __init trap_init(void)
        if (board_be_init)
                board_be_init();
-        set_except_vector(0, rollback ? rollback_handle_int : handle_int);
+        set_except_vector(0, using_rollback_handler() ? rollback_handle_int
+                                                      : handle_int);
        set_except_vector(1, handle_tlbm);
        set_except_vector(2, handle_tlbl);
        set_except_vector(3, handle_tlbs);
diff --git a/arch/mips/kvm/kvm_mips_emul.c b/arch/mips/kvm/kvm_mips_emul.c
index 2b2bac9a40aa..4b6274b47f33 100644
--- a/arch/mips/kvm/kvm_mips_emul.c
+++ b/arch/mips/kvm/kvm_mips_emul.c
@@ -525,16 +525,18 @@ kvm_mips_emulate_CP0(uint32_t inst, uint32_t *opc, uint32_t cause,
                                printk("MTCz, cop0->reg[EBASE]: %#lx\n",
                                       kvm_read_c0_guest_ebase(cop0));
                        } else if (rd == MIPS_CP0_TLB_HI && sel == 0) {
-                                uint32_t nasid = ASID_MASK(vcpu->arch.gprs[rt]);
+                                uint32_t nasid =
+                                    vcpu->arch.gprs[rt] & ASID_MASK;
                                if ((KSEGX(vcpu->arch.gprs[rt]) != CKSEG0)
                                    &&
-                                    (ASID_MASK(kvm_read_c0_guest_entryhi(cop0))
+                                    ((kvm_read_c0_guest_entryhi(cop0) &
-                                      != nasid)) {
+                                      ASID_MASK) != nasid)) {
                                        kvm_debug
                                            ("MTCz, change ASID from %#lx to %#lx\n",
-                                             ASID_MASK(kvm_read_c0_guest_entryhi(cop0)),
+                                             kvm_read_c0_guest_entryhi(cop0) &
-                                             ASID_MASK(vcpu->arch.gprs[rt]));
+                                             ASID_MASK,
+                                             vcpu->arch.gprs[rt] & ASID_MASK);
                                        /* Blow away the shadow host TLBs */
                                        kvm_mips_flush_host_tlb(1);
@@ -986,7 +988,8 @@ kvm_mips_emulate_cache(uint32_t inst, uint32_t *opc, uint32_t cause,
                 * resulting handler will do the right thing
                 */
                index = kvm_mips_guest_tlb_lookup(vcpu, (va & VPN2_MASK) |
-                                                  ASID_MASK(kvm_read_c0_guest_entryhi(cop0)));
+                                                  (kvm_read_c0_guest_entryhi
+                                                   (cop0) & ASID_MASK));
                if (index < 0) {
                        vcpu->arch.host_cp0_entryhi = (va & VPN2_MASK);
@@ -1151,7 +1154,7 @@ kvm_mips_emulate_tlbmiss_ld(unsigned long cause, uint32_t *opc,
        struct kvm_vcpu_arch *arch = &vcpu->arch;
        enum emulation_result er = EMULATE_DONE;
        unsigned long entryhi = (vcpu->arch.  host_cp0_badvaddr & VPN2_MASK) |
-                                ASID_MASK(kvm_read_c0_guest_entryhi(cop0));
+                                (kvm_read_c0_guest_entryhi(cop0) & ASID_MASK);
        if ((kvm_read_c0_guest_status(cop0) & ST0_EXL) == 0) {
                /* save old pc */
@@ -1198,7 +1201,7 @@ kvm_mips_emulate_tlbinv_ld(unsigned long cause, uint32_t *opc,
        enum emulation_result er = EMULATE_DONE;
        unsigned long entryhi =
                (vcpu->arch.host_cp0_badvaddr & VPN2_MASK) |
-                ASID_MASK(kvm_read_c0_guest_entryhi(cop0));
+                (kvm_read_c0_guest_entryhi(cop0) & ASID_MASK);
        if ((kvm_read_c0_guest_status(cop0) & ST0_EXL) == 0) {
                /* save old pc */
@@ -1243,7 +1246,7 @@ kvm_mips_emulate_tlbmiss_st(unsigned long cause, uint32_t *opc,
        struct kvm_vcpu_arch *arch = &vcpu->arch;
        enum emulation_result er = EMULATE_DONE;
        unsigned long entryhi = (vcpu->arch.host_cp0_badvaddr & VPN2_MASK) |
-                                ASID_MASK(kvm_read_c0_guest_entryhi(cop0));
+                                (kvm_read_c0_guest_entryhi(cop0) & ASID_MASK);
        if ((kvm_read_c0_guest_status(cop0) & ST0_EXL) == 0) {
                /* save old pc */
@@ -1287,7 +1290,7 @@ kvm_mips_emulate_tlbinv_st(unsigned long cause, uint32_t *opc,
        struct kvm_vcpu_arch *arch = &vcpu->arch;
        enum emulation_result er = EMULATE_DONE;
        unsigned long entryhi = (vcpu->arch.host_cp0_badvaddr & VPN2_MASK) |
-                ASID_MASK(kvm_read_c0_guest_entryhi(cop0));
+                (kvm_read_c0_guest_entryhi(cop0) & ASID_MASK);
        if ((kvm_read_c0_guest_status(cop0) & ST0_EXL) == 0) {
                /* save old pc */
@@ -1356,7 +1359,7 @@ kvm_mips_emulate_tlbmod(unsigned long cause, uint32_t *opc,
 {
        struct mips_coproc *cop0 = vcpu->arch.cop0;
        unsigned long entryhi = (vcpu->arch.host_cp0_badvaddr & VPN2_MASK) |
-                                ASID_MASK(kvm_read_c0_guest_entryhi(cop0));
+                                (kvm_read_c0_guest_entryhi(cop0) & ASID_MASK);
        struct kvm_vcpu_arch *arch = &vcpu->arch;
        enum emulation_result er = EMULATE_DONE;
@@ -1783,8 +1786,8 @@ kvm_mips_handle_tlbmiss(unsigned long cause, uint32_t *opc,
         */
        index = kvm_mips_guest_tlb_lookup(vcpu,
                                          (va & VPN2_MASK) |
-                                          ASID_MASK(kvm_read_c0_guest_entryhi
+                                          (kvm_read_c0_guest_entryhi
-                                           (vcpu->arch.cop0)));
+                                           (vcpu->arch.cop0) & ASID_MASK));
        if (index < 0) {
                if (exccode == T_TLB_LD_MISS) {
                        er = kvm_mips_emulate_tlbmiss_ld(cause, opc, run, vcpu);
diff --git a/arch/mips/kvm/kvm_tlb.c b/arch/mips/kvm/kvm_tlb.c
index 89511a9258d3..c777dd36d4a8 100644
--- a/arch/mips/kvm/kvm_tlb.c
+++ b/arch/mips/kvm/kvm_tlb.c
@@ -17,6 +17,8 @@
 #include <linux/delay.h>
 #include <linux/module.h>
 #include <linux/kvm_host.h>
+#include <linux/srcu.h>
 #include <asm/cpu.h>
 #include <asm/bootinfo.h>
@@ -51,13 +53,13 @@ EXPORT_SYMBOL(kvm_mips_is_error_pfn);
 uint32_t kvm_mips_get_kernel_asid(struct kvm_vcpu *vcpu)
 {
-        return ASID_MASK(vcpu->arch.guest_kernel_asid[smp_processor_id()]);
+        return vcpu->arch.guest_kernel_asid[smp_processor_id()] & ASID_MASK;
 }
 uint32_t kvm_mips_get_user_asid(struct kvm_vcpu *vcpu)
 {
-        return ASID_MASK(vcpu->arch.guest_user_asid[smp_processor_id()]);
+        return vcpu->arch.guest_user_asid[smp_processor_id()] & ASID_MASK;
 }
 inline uint32_t kvm_mips_get_commpage_asid (struct kvm_vcpu *vcpu)
@@ -84,7 +86,7 @@ void kvm_mips_dump_host_tlbs(void)
        old_pagemask = read_c0_pagemask();
        printk("HOST TLBs:\n");
-        printk("ASID: %#lx\n", ASID_MASK(read_c0_entryhi()));
+        printk("ASID: %#lx\n", read_c0_entryhi() & ASID_MASK);
        for (i = 0; i < current_cpu_data.tlbsize; i++) {
                write_c0_index(i);
@@ -169,21 +171,27 @@ void kvm_mips_dump_shadow_tlbs(struct kvm_vcpu *vcpu)
        }
 }
-static void kvm_mips_map_page(struct kvm *kvm, gfn_t gfn)
+static int kvm_mips_map_page(struct kvm *kvm, gfn_t gfn)
 {
+        int srcu_idx, err = 0;
        pfn_t pfn;
        if (kvm->arch.guest_pmap[gfn] != KVM_INVALID_PAGE)
-                return;
+                return 0;
+        srcu_idx = srcu_read_lock(&kvm->srcu);
        pfn = kvm_mips_gfn_to_pfn(kvm, gfn);
        if (kvm_mips_is_error_pfn(pfn)) {
-                panic("Couldn't get pfn for gfn %#" PRIx64 "!\n", gfn);
+                kvm_err("Couldn't get pfn for gfn %#" PRIx64 "!\n", gfn);
+                err = -EFAULT;
+                goto out;
        }
        kvm->arch.guest_pmap[gfn] = pfn;
-        return;
+out:
+        srcu_read_unlock(&kvm->srcu, srcu_idx);
+        return err;
 }
 /* Translate guest KSEG0 addresses to Host PA */
@@ -207,7 +215,10 @@ unsigned long kvm_mips_translate_guest_kseg0_to_hpa(struct kvm_vcpu *vcpu,
                        gva);
                return KVM_INVALID_PAGE;
        }
-        kvm_mips_map_page(vcpu->kvm, gfn);
+        if (kvm_mips_map_page(vcpu->kvm, gfn) < 0)
+                return KVM_INVALID_ADDR;
        return (kvm->arch.guest_pmap[gfn] << PAGE_SHIFT) + offset;
 }
@@ -310,8 +321,11 @@ int kvm_mips_handle_kseg0_tlb_fault(unsigned long badvaddr,
        even = !(gfn & 0x1);
        vaddr = badvaddr & (PAGE_MASK << 1);
-        kvm_mips_map_page(vcpu->kvm, gfn);
+        if (kvm_mips_map_page(vcpu->kvm, gfn) < 0)
-        kvm_mips_map_page(vcpu->kvm, gfn ^ 0x1);
+                return -1;
+        if (kvm_mips_map_page(vcpu->kvm, gfn ^ 0x1) < 0)
+                return -1;
        if (even) {
                pfn0 = kvm->arch.guest_pmap[gfn];
@@ -389,8 +403,11 @@ kvm_mips_handle_mapped_seg_tlb_fault(struct kvm_vcpu *vcpu,
                pfn0 = 0;
                pfn1 = 0;
        } else {
-                kvm_mips_map_page(kvm, mips3_tlbpfn_to_paddr(tlb->tlb_lo0) >> PAGE_SHIFT);
+                if (kvm_mips_map_page(kvm, mips3_tlbpfn_to_paddr(tlb->tlb_lo0) >> PAGE_SHIFT) < 0)
-                kvm_mips_map_page(kvm, mips3_tlbpfn_to_paddr(tlb->tlb_lo1) >> PAGE_SHIFT);
+                        return -1;
+                if (kvm_mips_map_page(kvm, mips3_tlbpfn_to_paddr(tlb->tlb_lo1) >> PAGE_SHIFT) < 0)
+                        return -1;
                pfn0 = kvm->arch.guest_pmap[mips3_tlbpfn_to_paddr(tlb->tlb_lo0) >> PAGE_SHIFT];
                pfn1 = kvm->arch.guest_pmap[mips3_tlbpfn_to_paddr(tlb->tlb_lo1) >> PAGE_SHIFT];
@@ -428,7 +445,7 @@ int kvm_mips_guest_tlb_lookup(struct kvm_vcpu *vcpu, unsigned long entryhi)
        for (i = 0; i < KVM_MIPS_GUEST_TLB_SIZE; i++) {
                if (((TLB_VPN2(tlb[i]) & ~tlb[i].tlb_mask) == ((entryhi & VPN2_MASK) & ~tlb[i].tlb_mask)) &&
-                        (TLB_IS_GLOBAL(tlb[i]) || (TLB_ASID(tlb[i]) == ASID_MASK(entryhi)))) {
+                        (TLB_IS_GLOBAL(tlb[i]) || (TLB_ASID(tlb[i]) == (entryhi & ASID_MASK)))) {
                        index = i;
                        break;
                }
@@ -626,7 +643,7 @@ kvm_get_new_mmu_context(struct mm_struct *mm, unsigned long cpu,
 {
        unsigned long asid = asid_cache(cpu);
-        if (!(ASID_MASK(ASID_INC(asid)))) {
+        if (!((asid += ASID_INC) & ASID_MASK)) {
                if (cpu_has_vtag_icache) {
                        flush_icache_all();
                }
@@ -804,7 +821,8 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
        if (!newasid) {
                /* If we preempted while the guest was executing, then reload the pre-empted ASID */
                if (current->flags & PF_VCPU) {
-                        write_c0_entryhi(ASID_MASK(vcpu->arch.preempt_entryhi));
+                        write_c0_entryhi(vcpu->arch.
+                                         preempt_entryhi & ASID_MASK);
                        ehb();
                }
        } else {
@@ -816,11 +834,13 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
                 */
                if (current->flags & PF_VCPU) {
                        if (KVM_GUEST_KERNEL_MODE(vcpu))
-                                write_c0_entryhi(ASID_MASK(vcpu->arch.
+                                write_c0_entryhi(vcpu->arch.
-                                                 guest_kernel_asid[cpu]));
+                                                 guest_kernel_asid[cpu] &
+                                                 ASID_MASK);
                        else
-                                write_c0_entryhi(ASID_MASK(vcpu->arch.
+                                write_c0_entryhi(vcpu->arch.
-                                                 guest_user_asid[cpu]));
+                                                 guest_user_asid[cpu] &
+                                                 ASID_MASK);
                        ehb();
                }
        }
@@ -879,7 +899,8 @@ uint32_t kvm_get_inst(uint32_t *opc, struct kvm_vcpu *vcpu)
                            kvm_mips_guest_tlb_lookup(vcpu,
                                                      ((unsigned long) opc & VPN2_MASK)
                                                      |
-                                                      ASID_MASK(kvm_read_c0_guest_entryhi(cop0)));
+                                                      (kvm_read_c0_guest_entryhi
+                                                       (cop0) & ASID_MASK));
                        if (index < 0) {
                                kvm_err
                                    ("%s: get_user_failed for %p, vcpu: %p, ASID: %#lx\n",
diff --git a/arch/mips/lantiq/xway/gptu.c b/arch/mips/lantiq/xway/gptu.c
index 9861c8669fab..850821df924c 100644
--- a/arch/mips/lantiq/xway/gptu.c
+++ b/arch/mips/lantiq/xway/gptu.c
@@ -144,10 +144,6 @@ static int gptu_probe(struct platform_device *pdev)
        }
        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-        if (!res) {
-                dev_err(&pdev->dev, "Failed to get resource\n");
-                return -ENOMEM;
-        }
        /* remap gptu register range */
        gptu_membase = devm_ioremap_resource(&pdev->dev, res);
@@ -169,6 +165,8 @@ static int gptu_probe(struct platform_device *pdev)
        if (((gptu_r32(GPTU_ID) >> 8) & 0xff) != GPTU_MAGIC) {
                dev_err(&pdev->dev, "Failed to find magic\n");
                gptu_hwexit();
+                clk_disable(clk);
+                clk_put(clk);
                return -ENAVAIL;
        }
diff --git a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c
index 8a12d00908e0..32b9f21bfd85 100644
--- a/arch/mips/lib/dump_tlb.c
+++ b/arch/mips/lib/dump_tlb.c
@@ -11,7 +11,6 @@
 #include <asm/page.h>
 #include <asm/pgtable.h>
 #include <asm/tlbdebug.h>
-#include <asm/mmu_context.h>
 static inline const char *msk2str(unsigned int mask)
 {
@@ -56,7 +55,7 @@ static void dump_tlb(int first, int last)
        s_pagemask = read_c0_pagemask();
        s_entryhi = read_c0_entryhi();
        s_index = read_c0_index();
-        asid = ASID_MASK(s_entryhi);
+        asid = s_entryhi & 0xff;
        for (i = first; i <= last; i++) {
                write_c0_index(i);
@@ -86,7 +85,7 @@ static void dump_tlb(int first, int last)
                        printk("va=%0*lx asid=%02lx\n",
                               width, (entryhi & ~0x1fffUL),
-                               ASID_MASK(entryhi));
+                               entryhi & 0xff);
                        printk("\t[pa=%0*llx c=%d d=%d v=%d g=%d] ",
                               width,
                               (entrylo0 << 6) & PAGE_MASK, c0,
diff --git a/arch/mips/lib/r3k_dump_tlb.c b/arch/mips/lib/r3k_dump_tlb.c
index 8327698b9937..91615c2ef0cf 100644
--- a/arch/mips/lib/r3k_dump_tlb.c
+++ b/arch/mips/lib/r3k_dump_tlb.c
@@ -9,7 +9,6 @@
 #include <linux/mm.h>
 #include <asm/mipsregs.h>
-#include <asm/mmu_context.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
 #include <asm/tlbdebug.h>
@@ -22,7 +21,7 @@ static void dump_tlb(int first, int last)
        unsigned int asid;
        unsigned long entryhi, entrylo0;
-        asid = ASID_MASK(read_c0_entryhi());
+        asid = read_c0_entryhi() & 0xfc0;
        for (i = first; i <= last; i++) {
                write_c0_index(i<<8);
@@ -36,7 +35,7 @@ static void dump_tlb(int first, int last)
                /* Unused entries have a virtual address of KSEG0.  */
                if ((entryhi & 0xffffe000) != 0x80000000
-                    && (ASID_MASK(entryhi) == asid)) {
+                    && (entryhi & 0xfc0) == asid) {
                        /*
                         * Only print entries in use
                         */
@@ -45,7 +44,7 @@ static void dump_tlb(int first, int last)
                        printk("va=%08lx asid=%08lx"
                               "  [pa=%06lx n=%d d=%d v=%d g=%d]",
                               (entryhi & 0xffffe000),
-                               ASID_MASK(entryhi),
+                               entryhi & 0xfc0,
                               entrylo0 & PAGE_MASK,
                               (entrylo0 & (1 << 11)) ? 1 : 0,
                               (entrylo0 & (1 << 10)) ? 1 : 0,
diff --git a/arch/mips/loongson/common/reset.c b/arch/mips/loongson/common/reset.c
index 35c8c6468494..65bfbb5d06f4 100644
--- a/arch/mips/loongson/common/reset.c
+++ b/arch/mips/loongson/common/reset.c
@@ -12,6 +12,7 @@
 #include <linux/init.h>
 #include <linux/pm.h>
+#include <asm/idle.h>
 #include <asm/reboot.h>
 #include <loongson.h>
diff --git a/arch/mips/loongson1/common/reset.c b/arch/mips/loongson1/common/reset.c
index d4f610f9604a..547f34b69e4c 100644
--- a/arch/mips/loongson1/common/reset.c
+++ b/arch/mips/loongson1/common/reset.c
@@ -9,6 +9,7 @@
 #include <linux/io.h>
 #include <linux/pm.h>
+#include <asm/idle.h>
 #include <asm/reboot.h>
 #include <loongson1.h>
diff --git a/arch/mips/mm/tlb-r3k.c b/arch/mips/mm/tlb-r3k.c
index 4a13c150f31b..a63d1ed0827f 100644
--- a/arch/mips/mm/tlb-r3k.c
+++ b/arch/mips/mm/tlb-r3k.c
@@ -51,7 +51,7 @@ void local_flush_tlb_all(void)
 #endif
        local_irq_save(flags);
-        old_ctx = ASID_MASK(read_c0_entryhi());
+        old_ctx = read_c0_entryhi() & ASID_MASK;
        write_c0_entrylo0(0);
        entry = r3k_have_wired_reg ? read_c0_wired() : 8;
        for (; entry < current_cpu_data.tlbsize; entry++) {
@@ -87,13 +87,13 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
 #ifdef DEBUG_TLB
                printk("[tlbrange<%lu,0x%08lx,0x%08lx>]",
-                        ASID_MASK(cpu_context(cpu, mm)), start, end);
+                        cpu_context(cpu, mm) & ASID_MASK, start, end);
 #endif
                local_irq_save(flags);
                size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
                if (size <= current_cpu_data.tlbsize) {
-                        int oldpid = ASID_MASK(read_c0_entryhi());
+                        int oldpid = read_c0_entryhi() & ASID_MASK;
-                        int newpid = ASID_MASK(cpu_context(cpu, mm));
+                        int newpid = cpu_context(cpu, mm) & ASID_MASK;
                        start &= PAGE_MASK;
                        end += PAGE_SIZE - 1;
@@ -166,10 +166,10 @@ void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
 #ifdef DEBUG_TLB
                printk("[tlbpage<%lu,0x%08lx>]", cpu_context(cpu, vma->vm_mm), page);
 #endif
-                newpid = ASID_MASK(cpu_context(cpu, vma->vm_mm));
+                newpid = cpu_context(cpu, vma->vm_mm) & ASID_MASK;
                page &= PAGE_MASK;
                local_irq_save(flags);
-                oldpid = ASID_MASK(read_c0_entryhi());
+                oldpid = read_c0_entryhi() & ASID_MASK;
                write_c0_entryhi(page | newpid);
                BARRIER;
                tlb_probe();
@@ -197,10 +197,10 @@ void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
        if (current->active_mm != vma->vm_mm)
                return;
-        pid = ASID_MASK(read_c0_entryhi());
+        pid = read_c0_entryhi() & ASID_MASK;
 #ifdef DEBUG_TLB
-        if ((pid != ASID_MASK(cpu_context(cpu, vma->vm_mm))) || (cpu_context(cpu, vma->vm_mm) == 0)) {
+        if ((pid != (cpu_context(cpu, vma->vm_mm) & ASID_MASK)) || (cpu_context(cpu, vma->vm_mm) == 0)) {
                printk("update_mmu_cache: Wheee, bogus tlbpid mmpid=%lu tlbpid=%d\n",
                       (cpu_context(cpu, vma->vm_mm)), pid);
        }
@@ -241,7 +241,7 @@ void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
                local_irq_save(flags);
                /* Save old context and create impossible VPN2 value */
-                old_ctx = ASID_MASK(read_c0_entryhi());
+                old_ctx = read_c0_entryhi() & ASID_MASK;
                old_pagemask = read_c0_pagemask();
                w = read_c0_wired();
                write_c0_wired(w + 1);
@@ -264,7 +264,7 @@ void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
 #endif
                local_irq_save(flags);
-                old_ctx = ASID_MASK(read_c0_entryhi());
+                old_ctx = read_c0_entryhi() & ASID_MASK;
                write_c0_entrylo0(entrylo0);
                write_c0_entryhi(entryhi);
                write_c0_index(wired);
diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
index 09653b290d53..c643de4c473a 100644
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -287,7 +287,7 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
        ENTER_CRITICAL(flags);
-        pid = ASID_MASK(read_c0_entryhi());
+        pid = read_c0_entryhi() & ASID_MASK;
        address &= (PAGE_MASK << 1);
        write_c0_entryhi(address | pid);
        pgdp = pgd_offset(vma->vm_mm, address);
diff --git a/arch/mips/mm/tlb-r8k.c b/arch/mips/mm/tlb-r8k.c
index 122f9207f49e..91c2499f806a 100644
--- a/arch/mips/mm/tlb-r8k.c
+++ b/arch/mips/mm/tlb-r8k.c
@@ -195,7 +195,7 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
        if (current->active_mm != vma->vm_mm)
                return;
-        pid = ASID_MASK(read_c0_entryhi());
+        pid = read_c0_entryhi() & ASID_MASK;
        local_irq_save(flags);
        address &= PAGE_MASK;
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 4d46d3787576..ce9818eef7d3 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -29,7 +29,6 @@
 #include <linux/init.h>
 #include <linux/cache.h>
-#include <asm/mmu_context.h>
 #include <asm/cacheflush.h>
 #include <asm/pgtable.h>
 #include <asm/war.h>
@@ -306,78 +305,6 @@ static struct uasm_reloc relocs[128] __cpuinitdata;
 static int check_for_high_segbits __cpuinitdata;
 #endif
-static void __cpuinit insn_fixup(unsigned int **start, unsigned int **stop,
-                                        unsigned int i_const)
-{
-        unsigned int **p;
-        for (p = start; p < stop; p++) {
-#ifndef CONFIG_CPU_MICROMIPS
-                unsigned int *ip;
-                ip = *p;
-                *ip = (*ip & 0xffff0000) | i_const;
-#else
-                unsigned short *ip;
-                ip = ((unsigned short *)((unsigned int)*p - 1));
-                if ((*ip & 0xf000) == 0x4000) {
-                        *ip &= 0xfff1;
-                        *ip |= (i_const << 1);
-                } else if ((*ip & 0xf000) == 0x6000) {
-                        *ip &= 0xfff1;
-                        *ip |= ((i_const >> 2) << 1);
-                } else {
-                        ip++;
-                        *ip = i_const;
-                }
-#endif
-                local_flush_icache_range((unsigned long)ip,
-                                         (unsigned long)ip + sizeof(*ip));
-        }
-}
-#define asid_insn_fixup(section, const)                                 \
-do {                                                                    \
-        extern unsigned int *__start_ ## section;                       \
-        extern unsigned int *__stop_ ## section;                        \
-        insn_fixup(&__start_ ## section, &__stop_ ## section, const);   \
-} while(0)
-/*
- * Caller is assumed to flush the caches before the first context switch.
- */
-static void __cpuinit setup_asid(unsigned int inc, unsigned int mask,
-                                 unsigned int version_mask,
-                                 unsigned int first_version)
-{
-        extern asmlinkage void handle_ri_rdhwr_vivt(void);
-        unsigned long *vivt_exc;
-#ifdef CONFIG_CPU_MICROMIPS
-        /*
-         * Worst case optimised microMIPS addiu instructions support
-         * only a 3-bit immediate value.
-         */
-        if(inc > 7)
-                panic("Invalid ASID increment value!");
-#endif
-        asid_insn_fixup(__asid_inc, inc);
-        asid_insn_fixup(__asid_mask, mask);
-        asid_insn_fixup(__asid_version_mask, version_mask);
-        asid_insn_fixup(__asid_first_version, first_version);
-        /* Patch up the 'handle_ri_rdhwr_vivt' handler. */
-        vivt_exc = (unsigned long *) &handle_ri_rdhwr_vivt;
-#ifdef CONFIG_CPU_MICROMIPS
-        vivt_exc = (unsigned long *)((unsigned long) vivt_exc - 1);
-#endif
-        vivt_exc++;
-        *vivt_exc = (*vivt_exc & ~mask) | mask;
-        current_cpu_data.asid_cache = first_version;
-}
 static int check_for_high_segbits __cpuinitdata;
 static unsigned int kscratch_used_mask __cpuinitdata;
@@ -2256,7 +2183,6 @@ void __cpuinit build_tlb_refill_handler(void)
        case CPU_TX3922:
        case CPU_TX3927:
 #ifndef CONFIG_MIPS_PGD_C0_CONTEXT
-                setup_asid(0x40, 0xfc0, 0xf000, ASID_FIRST_VERSION_R3000);
                if (cpu_has_local_ebase)
                        build_r3000_tlb_refill_handler();
                if (!run_once) {
@@ -2282,11 +2208,6 @@ void __cpuinit build_tlb_refill_handler(void)
                break;
        default:
-#ifndef CONFIG_MIPS_MT_SMTC
-                setup_asid(0x1, 0xff, 0xff00, ASID_FIRST_VERSION_R4000);
-#else
-                setup_asid(0x1, smtc_asid_mask, 0xff00, ASID_FIRST_VERSION_R4000);
-#endif
                if (!run_once) {
                        scratch_reg = allocate_kscratch();
 #ifdef CONFIG_MIPS_PGD_C0_CONTEXT
diff --git a/arch/mips/netlogic/xlp/setup.c b/arch/mips/netlogic/xlp/setup.c
index af319143b591..eaa99d28cb8e 100644
--- a/arch/mips/netlogic/xlp/setup.c
+++ b/arch/mips/netlogic/xlp/setup.c
@@ -37,6 +37,7 @@
 #include <linux/pm.h>
 #include <linux/bootmem.h>
+#include <asm/idle.h>
 #include <asm/reboot.h>
 #include <asm/time.h>
 #include <asm/bootinfo.h>
diff --git a/arch/mips/netlogic/xlr/setup.c b/arch/mips/netlogic/xlr/setup.c
index e3e094100e3e..89c8c1066632 100644
--- a/arch/mips/netlogic/xlr/setup.c
+++ b/arch/mips/netlogic/xlr/setup.c
@@ -36,6 +36,7 @@
 #include <linux/serial_8250.h>
 #include <linux/pm.h>
+#include <asm/idle.h>
 #include <asm/reboot.h>
 #include <asm/time.h>
 #include <asm/bootinfo.h>
diff --git a/arch/mips/pmcs-msp71xx/msp_prom.c b/arch/mips/pmcs-msp71xx/msp_prom.c
index 0edb89a63516..1c9897531660 100644
--- a/arch/mips/pmcs-msp71xx/msp_prom.c
+++ b/arch/mips/pmcs-msp71xx/msp_prom.c
@@ -83,7 +83,7 @@ static inline unsigned char str2hexnum(unsigned char c)
        return 0; /* foo */
 }
-static inline int str2eaddr(unsigned char *ea, unsigned char *str)
+int str2eaddr(unsigned char *ea, unsigned char *str)
 {
        int index = 0;
        unsigned char num = 0;
diff --git a/arch/mips/pmcs-msp71xx/msp_setup.c b/arch/mips/pmcs-msp71xx/msp_setup.c
index 1651cfdbfe7b..396b2967ad85 100644
--- a/arch/mips/pmcs-msp71xx/msp_setup.c
+++ b/arch/mips/pmcs-msp71xx/msp_setup.c
@@ -12,6 +12,7 @@
 #include <asm/bootinfo.h>
 #include <asm/cacheflush.h>
+#include <asm/idle.h>
 #include <asm/r4kcache.h>
 #include <asm/reboot.h>
 #include <asm/smp-ops.h>
diff --git a/arch/mips/ralink/dts/rt3050.dtsi b/arch/mips/ralink/dts/rt3050.dtsi
index ef7da1e227e6..e3203d414fee 100644
--- a/arch/mips/ralink/dts/rt3050.dtsi
+++ b/arch/mips/ralink/dts/rt3050.dtsi
@@ -55,4 +55,14 @@
                        reg-shift = <2>;
                };
        };
+        usb@101c0000 {
+                compatible = "ralink,rt3050-usb", "snps,dwc2";
+                reg = <0x101c0000 40000>;
+                interrupt-parent = <&intc>;
+                interrupts = <18>;
+                status = "disabled";
+        };
 };
diff --git a/arch/mips/ralink/dts/rt3052_eval.dts b/arch/mips/ralink/dts/rt3052_eval.dts
index c18c9a84f4c4..0ac73ea28198 100644
--- a/arch/mips/ralink/dts/rt3052_eval.dts
+++ b/arch/mips/ralink/dts/rt3052_eval.dts
@@ -43,4 +43,8 @@
                        reg = <0x50000 0x7b0000>;
                };
        };
+        usb@101c0000 {
+                status = "ok";
+        };
 };
diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c
index 5364aabc2102..681e7f86c080 100644
--- a/arch/mips/txx9/generic/setup.c
+++ b/arch/mips/txx9/generic/setup.c
@@ -26,6 +26,7 @@
 #include <linux/slab.h>
 #include <linux/irq.h>
 #include <asm/bootinfo.h>
+#include <asm/idle.h>
 #include <asm/time.h>
 #include <asm/reboot.h>
 #include <asm/r4kcache.h>
diff --git a/arch/mips/vr41xx/common/pmu.c b/arch/mips/vr41xx/common/pmu.c
index 70a3f90131d8..d7f755833c3f 100644
--- a/arch/mips/vr41xx/common/pmu.c
+++ b/arch/mips/vr41xx/common/pmu.c
@@ -27,6 +27,7 @@
 #include <asm/cacheflush.h>
 #include <asm/cpu.h>
+#include <asm/idle.h>
 #include <asm/io.h>
 #include <asm/processor.h>
 #include <asm/reboot.h>
diff --git a/arch/mips/wrppmc/reset.c b/arch/mips/wrppmc/reset.c
index cc5474b24f06..80beb188ed47 100644
--- a/arch/mips/wrppmc/reset.c
+++ b/arch/mips/wrppmc/reset.c
@@ -9,6 +9,7 @@
 #include <linux/kernel.h>
 #include <asm/cacheflush.h>
+#include <asm/idle.h>
 #include <asm/mipsregs.h>
 #include <asm/processor.h>
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index cad060f288cf..6507dabdd5dd 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -245,7 +245,7 @@ config SMP
 config IRQSTACKS
        bool "Use separate kernel stacks when processing interrupts"
-        default n
+        default y
        help
          If you say Y here the kernel will use separate kernel stacks
          for handling hard and soft interrupts.  This can help avoid
diff --git a/arch/parisc/Makefile b/arch/parisc/Makefile
index 2f967cc6649e..197690068f88 100644
--- a/arch/parisc/Makefile
+++ b/arch/parisc/Makefile
@@ -23,24 +23,21 @@ NM		= sh $(srctree)/arch/parisc/nm
 CHECKFLAGS      += -D__hppa__=1
 LIBGCC          = $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
-MACHINE         := $(shell uname -m)
-NATIVE          := $(if $(filter parisc%,$(MACHINE)),1,0)
 ifdef CONFIG_64BIT
 UTS_MACHINE     := parisc64
 CHECKFLAGS      += -D__LP64__=1 -m64
-WIDTH           := 64
+CC_ARCHES       = hppa64
 else # 32-bit
-WIDTH           :=
+CC_ARCHES       = hppa hppa2.0 hppa1.1
 endif
-# attempt to help out folks who are cross-compiling
+ifneq ($(SUBARCH),$(UTS_MACHINE))
-ifeq ($(NATIVE),1)
+        ifeq ($(CROSS_COMPILE),)
-CROSS_COMPILE   := hppa$(WIDTH)-linux-
+                CC_SUFFIXES = linux linux-gnu unknown-linux-gnu
-else
+                CROSS_COMPILE := $(call cc-cross-prefix, \
- ifeq ($(CROSS_COMPILE),)
+                        $(foreach a,$(CC_ARCHES), \
- CROSS_COMPILE  := hppa$(WIDTH)-linux-gnu-
+                        $(foreach s,$(CC_SUFFIXES),$(a)-$(s)-)))
- endif
+        endif
 endif
 OBJCOPY_FLAGS =-O binary -R .note -R .comment -S
diff --git a/arch/parisc/include/asm/assembly.h b/arch/parisc/include/asm/assembly.h
index 89fb40005e3f..0da848232344 100644
--- a/arch/parisc/include/asm/assembly.h
+++ b/arch/parisc/include/asm/assembly.h
@@ -438,7 +438,6 @@
        SAVE_SP  (%sr4, PT_SR4 (\regs))
        SAVE_SP  (%sr5, PT_SR5 (\regs))
        SAVE_SP  (%sr6, PT_SR6 (\regs))
-        SAVE_SP  (%sr7, PT_SR7 (\regs))
        SAVE_CR  (%cr17, PT_IASQ0(\regs))
        mtctl    %r0,   %cr17
diff --git a/arch/parisc/include/asm/hardirq.h b/arch/parisc/include/asm/hardirq.h
index 12373c4dabab..241c34518465 100644
--- a/arch/parisc/include/asm/hardirq.h
+++ b/arch/parisc/include/asm/hardirq.h
@@ -11,15 +11,20 @@
 #include <linux/threads.h>
 #include <linux/irq.h>
+#ifdef CONFIG_IRQSTACKS
+#define __ARCH_HAS_DO_SOFTIRQ
+#endif
 typedef struct {
        unsigned int __softirq_pending;
-#ifdef CONFIG_DEBUG_STACKOVERFLOW
        unsigned int kernel_stack_usage;
-#endif
+        unsigned int irq_stack_usage;
 #ifdef CONFIG_SMP
        unsigned int irq_resched_count;
        unsigned int irq_call_count;
 #endif
+        unsigned int irq_unaligned_count;
+        unsigned int irq_fpassist_count;
        unsigned int irq_tlb_count;
 } ____cacheline_aligned irq_cpustat_t;
@@ -28,6 +33,7 @@ DECLARE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
 #define __ARCH_IRQ_STAT
 #define __IRQ_STAT(cpu, member) (irq_stat[cpu].member)
 #define inc_irq_stat(member)    this_cpu_inc(irq_stat.member)
+#define __inc_irq_stat(member)  __this_cpu_inc(irq_stat.member)
 #define local_softirq_pending() this_cpu_read(irq_stat.__softirq_pending)
 #define __ARCH_SET_SOFTIRQ_PENDING
diff --git a/arch/parisc/include/asm/processor.h b/arch/parisc/include/asm/processor.h
index 064015547d1e..cc2290a3cace 100644
--- a/arch/parisc/include/asm/processor.h
+++ b/arch/parisc/include/asm/processor.h
@@ -17,7 +17,6 @@
 #include <asm/ptrace.h>
 #include <asm/types.h>
 #include <asm/percpu.h>
 #endif /* __ASSEMBLY__ */
 /*
@@ -59,23 +58,6 @@
 #ifndef __ASSEMBLY__
 /*
- * IRQ STACK - used for irq handler
- */
-#ifdef __KERNEL__
-#define IRQ_STACK_SIZE      (4096 << 2) /* 16k irq stack size */
-union irq_stack_union {
-        unsigned long stack[IRQ_STACK_SIZE/sizeof(unsigned long)];
-};
-DECLARE_PER_CPU(union irq_stack_union, irq_stack_union);
-void call_on_stack(unsigned long p1, void *func, unsigned long new_stack);
-#endif /* __KERNEL__ */
-/*
 * Data detected about CPUs at boot time which is the same for all CPU's.
 * HP boxes are SMP - ie identical processors.
 *
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S
index 4bb96ad9b0b1..e8f07dd28401 100644
--- a/arch/parisc/kernel/entry.S
+++ b/arch/parisc/kernel/entry.S
@@ -65,15 +65,11 @@
        rsm     PSW_SM_I, %r0   /* barrier for "Relied upon Translation */
        mtsp    %r0, %sr4
        mtsp    %r0, %sr5
-        mfsp    %sr7, %r1
+        mtsp    %r0, %sr6
-        or,=    %r0,%r1,%r0     /* Only save sr7 in sr3 if sr7 != 0 */
-        mtsp    %r1, %sr3
        tovirt_r1 %r29
        load32  KERNEL_PSW, %r1
        rsm     PSW_SM_QUIET,%r0        /* second "heavy weight" ctl op */
-        mtsp    %r0, %sr6
-        mtsp    %r0, %sr7
        mtctl   %r0, %cr17      /* Clear IIASQ tail */
        mtctl   %r0, %cr17      /* Clear IIASQ head */
        mtctl   %r1, %ipsw
@@ -119,17 +115,20 @@
        /* we save the registers in the task struct */
+        copy    %r30, %r17
        mfctl   %cr30, %r1
+        ldo     THREAD_SZ_ALGN(%r1), %r30
+        mtsp    %r0,%sr7
+        mtsp    %r16,%sr3
        tophys  %r1,%r9
        LDREG   TI_TASK(%r9), %r1       /* thread_info -> task_struct */
        tophys  %r1,%r9
        ldo     TASK_REGS(%r9),%r9
-        STREG   %r30, PT_GR30(%r9)
+        STREG   %r17,PT_GR30(%r9)
        STREG   %r29,PT_GR29(%r9)
        STREG   %r26,PT_GR26(%r9)
+        STREG   %r16,PT_SR7(%r9)
        copy    %r9,%r29
-        mfctl   %cr30, %r1
-        ldo     THREAD_SZ_ALGN(%r1), %r30
        .endm
        .macro  get_stack_use_r30
@@ -137,10 +136,12 @@
        /* we put a struct pt_regs on the stack and save the registers there */
        tophys  %r30,%r9
-        STREG   %r30,PT_GR30(%r9)
+        copy    %r30,%r1
        ldo     PT_SZ_ALGN(%r30),%r30
+        STREG   %r1,PT_GR30(%r9)
        STREG   %r29,PT_GR29(%r9)
        STREG   %r26,PT_GR26(%r9)
+        STREG   %r16,PT_SR7(%r9)
        copy    %r9,%r29
        .endm
@@ -452,9 +453,41 @@
        L2_ptep         \pgd,\pte,\index,\va,\fault
        .endm
+        /* Acquire pa_dbit_lock lock. */
+        .macro          dbit_lock       spc,tmp,tmp1
+#ifdef CONFIG_SMP
+        cmpib,COND(=),n 0,\spc,2f
+        load32          PA(pa_dbit_lock),\tmp
+1:      LDCW            0(\tmp),\tmp1
+        cmpib,COND(=)   0,\tmp1,1b
+        nop
+2:
+#endif
+        .endm
+        /* Release pa_dbit_lock lock without reloading lock address. */
+        .macro          dbit_unlock0    spc,tmp
+#ifdef CONFIG_SMP
+        or,COND(=)      %r0,\spc,%r0
+        stw             \spc,0(\tmp)
+#endif
+        .endm
+        /* Release pa_dbit_lock lock. */
+        .macro          dbit_unlock1    spc,tmp
+#ifdef CONFIG_SMP
+        load32          PA(pa_dbit_lock),\tmp
+        dbit_unlock0    \spc,\tmp
+#endif
+        .endm
        /* Set the _PAGE_ACCESSED bit of the PTE.  Be clever and
         * don't needlessly dirty the cache line if it was already set */
-        .macro          update_ptep     ptep,pte,tmp,tmp1
+        .macro          update_ptep     spc,ptep,pte,tmp,tmp1
+#ifdef CONFIG_SMP
+        or,COND(=)      %r0,\spc,%r0
+        LDREG           0(\ptep),\pte
+#endif
        ldi             _PAGE_ACCESSED,\tmp1
        or              \tmp1,\pte,\tmp
        and,COND(<>)    \tmp1,\pte,%r0
@@ -463,7 +496,11 @@
        /* Set the dirty bit (and accessed bit).  No need to be
         * clever, this is only used from the dirty fault */
-        .macro          update_dirty    ptep,pte,tmp
+        .macro          update_dirty    spc,ptep,pte,tmp
+#ifdef CONFIG_SMP
+        or,COND(=)      %r0,\spc,%r0
+        LDREG           0(\ptep),\pte
+#endif
        ldi             _PAGE_ACCESSED|_PAGE_DIRTY,\tmp
        or              \tmp,\pte,\pte
        STREG           \pte,0(\ptep)
@@ -1111,11 +1148,13 @@ dtlb_miss_20w:
        L3_ptep         ptp,pte,t0,va,dtlb_check_alias_20w
-        update_ptep     ptp,pte,t0,t1
+        dbit_lock       spc,t0,t1
+        update_ptep     spc,ptp,pte,t0,t1
        make_insert_tlb spc,pte,prot
        
        idtlbt          pte,prot
+        dbit_unlock1    spc,t0
        rfir
        nop
@@ -1135,11 +1174,13 @@ nadtlb_miss_20w:
        L3_ptep         ptp,pte,t0,va,nadtlb_check_alias_20w
-        update_ptep     ptp,pte,t0,t1
+        dbit_lock       spc,t0,t1
+        update_ptep     spc,ptp,pte,t0,t1
        make_insert_tlb spc,pte,prot
        idtlbt          pte,prot
+        dbit_unlock1    spc,t0
        rfir
        nop
@@ -1161,7 +1202,8 @@ dtlb_miss_11:
        L2_ptep         ptp,pte,t0,va,dtlb_check_alias_11
-        update_ptep     ptp,pte,t0,t1
+        dbit_lock       spc,t0,t1
+        update_ptep     spc,ptp,pte,t0,t1
        make_insert_tlb_11      spc,pte,prot
@@ -1172,6 +1214,7 @@ dtlb_miss_11:
        idtlbp          prot,(%sr1,va)
        mtsp            t0, %sr1        /* Restore sr1 */
+        dbit_unlock1    spc,t0
        rfir
        nop
@@ -1192,7 +1235,8 @@ nadtlb_miss_11:
        L2_ptep         ptp,pte,t0,va,nadtlb_check_alias_11
-        update_ptep     ptp,pte,t0,t1
+        dbit_lock       spc,t0,t1
+        update_ptep     spc,ptp,pte,t0,t1
        make_insert_tlb_11      spc,pte,prot
@@ -1204,6 +1248,7 @@ nadtlb_miss_11:
        idtlbp          prot,(%sr1,va)
        mtsp            t0, %sr1        /* Restore sr1 */
+        dbit_unlock1    spc,t0
        rfir
        nop
@@ -1224,13 +1269,15 @@ dtlb_miss_20:
        L2_ptep         ptp,pte,t0,va,dtlb_check_alias_20
-        update_ptep     ptp,pte,t0,t1
+        dbit_lock       spc,t0,t1
+        update_ptep     spc,ptp,pte,t0,t1
        make_insert_tlb spc,pte,prot
        f_extend        pte,t0
        idtlbt          pte,prot
+        dbit_unlock1    spc,t0
        rfir
        nop
@@ -1250,13 +1297,15 @@ nadtlb_miss_20:
        L2_ptep         ptp,pte,t0,va,nadtlb_check_alias_20
-        update_ptep     ptp,pte,t0,t1
+        dbit_lock       spc,t0,t1
+        update_ptep     spc,ptp,pte,t0,t1
        make_insert_tlb spc,pte,prot
        f_extend        pte,t0
        
        idtlbt          pte,prot
+        dbit_unlock1    spc,t0
        rfir
        nop
@@ -1357,11 +1406,13 @@ itlb_miss_20w:
        L3_ptep         ptp,pte,t0,va,itlb_fault
-        update_ptep     ptp,pte,t0,t1
+        dbit_lock       spc,t0,t1
+        update_ptep     spc,ptp,pte,t0,t1
        make_insert_tlb spc,pte,prot
        
        iitlbt          pte,prot
+        dbit_unlock1    spc,t0
        rfir
        nop
@@ -1379,11 +1430,13 @@ naitlb_miss_20w:
        L3_ptep         ptp,pte,t0,va,naitlb_check_alias_20w
-        update_ptep     ptp,pte,t0,t1
+        dbit_lock       spc,t0,t1
+        update_ptep     spc,ptp,pte,t0,t1
        make_insert_tlb spc,pte,prot
        iitlbt          pte,prot
+        dbit_unlock1    spc,t0
        rfir
        nop
@@ -1405,7 +1458,8 @@ itlb_miss_11:
        L2_ptep         ptp,pte,t0,va,itlb_fault
-        update_ptep     ptp,pte,t0,t1
+        dbit_lock       spc,t0,t1
+        update_ptep     spc,ptp,pte,t0,t1
        make_insert_tlb_11      spc,pte,prot
@@ -1416,6 +1470,7 @@ itlb_miss_11:
        iitlbp          prot,(%sr1,va)
        mtsp            t0, %sr1        /* Restore sr1 */
+        dbit_unlock1    spc,t0
        rfir
        nop
@@ -1427,7 +1482,8 @@ naitlb_miss_11:
        L2_ptep         ptp,pte,t0,va,naitlb_check_alias_11
-        update_ptep     ptp,pte,t0,t1
+        dbit_lock       spc,t0,t1
+        update_ptep     spc,ptp,pte,t0,t1
        make_insert_tlb_11      spc,pte,prot
@@ -1438,6 +1494,7 @@ naitlb_miss_11:
        iitlbp          prot,(%sr1,va)
        mtsp            t0, %sr1        /* Restore sr1 */
+        dbit_unlock1    spc,t0
        rfir
        nop
@@ -1459,13 +1516,15 @@ itlb_miss_20:
        L2_ptep         ptp,pte,t0,va,itlb_fault
-        update_ptep     ptp,pte,t0,t1
+        dbit_lock       spc,t0,t1
+        update_ptep     spc,ptp,pte,t0,t1
        make_insert_tlb spc,pte,prot
        f_extend        pte,t0  
        iitlbt          pte,prot
+        dbit_unlock1    spc,t0
        rfir
        nop
@@ -1477,13 +1536,15 @@ naitlb_miss_20:
        L2_ptep         ptp,pte,t0,va,naitlb_check_alias_20
-        update_ptep     ptp,pte,t0,t1
+        dbit_lock       spc,t0,t1
+        update_ptep     spc,ptp,pte,t0,t1
        make_insert_tlb spc,pte,prot
        f_extend        pte,t0
        iitlbt          pte,prot
+        dbit_unlock1    spc,t0
        rfir
        nop
@@ -1507,29 +1568,13 @@ dbit_trap_20w:
        L3_ptep         ptp,pte,t0,va,dbit_fault
-#ifdef CONFIG_SMP
+        dbit_lock       spc,t0,t1
-        cmpib,COND(=),n        0,spc,dbit_nolock_20w
+        update_dirty    spc,ptp,pte,t1
-        load32          PA(pa_dbit_lock),t0
-dbit_spin_20w:
-        LDCW            0(t0),t1
-        cmpib,COND(=)         0,t1,dbit_spin_20w
-        nop
-dbit_nolock_20w:
-#endif
-        update_dirty    ptp,pte,t1
        make_insert_tlb spc,pte,prot
                
        idtlbt          pte,prot
-#ifdef CONFIG_SMP
+        dbit_unlock0    spc,t0
-        cmpib,COND(=),n        0,spc,dbit_nounlock_20w
-        ldi             1,t1
-        stw             t1,0(t0)
-dbit_nounlock_20w:
-#endif
        rfir
        nop
@@ -1543,18 +1588,8 @@ dbit_trap_11:
        L2_ptep         ptp,pte,t0,va,dbit_fault
-#ifdef CONFIG_SMP
+        dbit_lock       spc,t0,t1
-        cmpib,COND(=),n        0,spc,dbit_nolock_11
+        update_dirty    spc,ptp,pte,t1
-        load32          PA(pa_dbit_lock),t0
-dbit_spin_11:
-        LDCW            0(t0),t1
-        cmpib,=         0,t1,dbit_spin_11
-        nop
-dbit_nolock_11:
-#endif
-        update_dirty    ptp,pte,t1
        make_insert_tlb_11      spc,pte,prot
@@ -1565,13 +1600,7 @@ dbit_nolock_11:
        idtlbp          prot,(%sr1,va)
        mtsp            t1, %sr1     /* Restore sr1 */
-#ifdef CONFIG_SMP
+        dbit_unlock0    spc,t0
-        cmpib,COND(=),n        0,spc,dbit_nounlock_11
-        ldi             1,t1
-        stw             t1,0(t0)
-dbit_nounlock_11:
-#endif
        rfir
        nop
@@ -1583,32 +1612,15 @@ dbit_trap_20:
        L2_ptep         ptp,pte,t0,va,dbit_fault
-#ifdef CONFIG_SMP
+        dbit_lock       spc,t0,t1
-        cmpib,COND(=),n        0,spc,dbit_nolock_20
+        update_dirty    spc,ptp,pte,t1
-        load32          PA(pa_dbit_lock),t0
-dbit_spin_20:
-        LDCW            0(t0),t1
-        cmpib,=         0,t1,dbit_spin_20
-        nop
-dbit_nolock_20:
-#endif
-        update_dirty    ptp,pte,t1
        make_insert_tlb spc,pte,prot
        f_extend        pte,t1
        
        idtlbt          pte,prot
+        dbit_unlock0    spc,t0
-#ifdef CONFIG_SMP
-        cmpib,COND(=),n        0,spc,dbit_nounlock_20
-        ldi             1,t1
-        stw             t1,0(t0)
-dbit_nounlock_20:
-#endif
        rfir
        nop
diff --git a/arch/parisc/kernel/hardware.c b/arch/parisc/kernel/hardware.c
index f7752f6af29e..9e2d2e408529 100644
--- a/arch/parisc/kernel/hardware.c
+++ b/arch/parisc/kernel/hardware.c
@@ -222,6 +222,7 @@ static struct hp_hardware hp_hardware_list[] = {
        {HPHW_NPROC,0x5DD,0x4,0x81,"Duet W2"},
        {HPHW_NPROC,0x5DE,0x4,0x81,"Piccolo W+"},
        {HPHW_NPROC,0x5DF,0x4,0x81,"Cantata W2"},
+        {HPHW_NPROC,0x5DF,0x0,0x00,"Marcato W+? (rp5470)"},
        {HPHW_NPROC,0x5E0,0x4,0x91,"Cantata DC- W2"},
        {HPHW_NPROC,0x5E1,0x4,0x91,"Crescendo DC- W2"},
        {HPHW_NPROC,0x5E2,0x4,0x91,"Crescendo 650 W2"},
diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c
index e255db0bb761..2e6443b1e922 100644
--- a/arch/parisc/kernel/irq.c
+++ b/arch/parisc/kernel/irq.c
@@ -27,11 +27,11 @@
 #include <linux/interrupt.h>
 #include <linux/kernel_stat.h>
 #include <linux/seq_file.h>
-#include <linux/spinlock.h>
 #include <linux/types.h>
 #include <asm/io.h>
 #include <asm/smp.h>
+#include <asm/ldcw.h>
 #undef PARISC_IRQ_CR16_COUNTS
@@ -166,22 +166,36 @@ int arch_show_interrupts(struct seq_file *p, int prec)
        seq_printf(p, "%*s: ", prec, "STK");
        for_each_online_cpu(j)
                seq_printf(p, "%10u ", irq_stats(j)->kernel_stack_usage);
-        seq_printf(p, "  Kernel stack usage\n");
+        seq_puts(p, "  Kernel stack usage\n");
+# ifdef CONFIG_IRQSTACKS
+        seq_printf(p, "%*s: ", prec, "IST");
+        for_each_online_cpu(j)
+                seq_printf(p, "%10u ", irq_stats(j)->irq_stack_usage);
+        seq_puts(p, "  Interrupt stack usage\n");
+# endif
 #endif
 #ifdef CONFIG_SMP
        seq_printf(p, "%*s: ", prec, "RES");
        for_each_online_cpu(j)
                seq_printf(p, "%10u ", irq_stats(j)->irq_resched_count);
-        seq_printf(p, "  Rescheduling interrupts\n");
+        seq_puts(p, "  Rescheduling interrupts\n");
        seq_printf(p, "%*s: ", prec, "CAL");
        for_each_online_cpu(j)
                seq_printf(p, "%10u ", irq_stats(j)->irq_call_count);
-        seq_printf(p, "  Function call interrupts\n");
+        seq_puts(p, "  Function call interrupts\n");
 #endif
+        seq_printf(p, "%*s: ", prec, "UAH");
+        for_each_online_cpu(j)
+                seq_printf(p, "%10u ", irq_stats(j)->irq_unaligned_count);
+        seq_puts(p, "  Unaligned access handler traps\n");
+        seq_printf(p, "%*s: ", prec, "FPA");
+        for_each_online_cpu(j)
+                seq_printf(p, "%10u ", irq_stats(j)->irq_fpassist_count);
+        seq_puts(p, "  Floating point assist traps\n");
        seq_printf(p, "%*s: ", prec, "TLB");
        for_each_online_cpu(j)
                seq_printf(p, "%10u ", irq_stats(j)->irq_tlb_count);
-        seq_printf(p, "  TLB shootdowns\n");
+        seq_puts(p, "  TLB shootdowns\n");
        return 0;
 }
@@ -366,6 +380,24 @@ static inline int eirr_to_irq(unsigned long eirr)
        return (BITS_PER_LONG - bit) + TIMER_IRQ;
 }
+#ifdef CONFIG_IRQSTACKS
+/*
+ * IRQ STACK - used for irq handler
+ */
+#define IRQ_STACK_SIZE      (4096 << 2) /* 16k irq stack size */
+union irq_stack_union {
+        unsigned long stack[IRQ_STACK_SIZE/sizeof(unsigned long)];
+        volatile unsigned int slock[4];
+        volatile unsigned int lock[1];
+};
+DEFINE_PER_CPU(union irq_stack_union, irq_stack_union) = {
+                .slock = { 1,1,1,1 },
+        };
+#endif
 int sysctl_panic_on_stackoverflow = 1;
 static inline void stack_overflow_check(struct pt_regs *regs)
@@ -378,6 +410,7 @@ static inline void stack_overflow_check(struct pt_regs *regs)
        unsigned long sp = regs->gr[30];
        unsigned long stack_usage;
        unsigned int *last_usage;
+        int cpu = smp_processor_id();
        /* if sr7 != 0, we interrupted a userspace process which we do not want
         * to check for stack overflow. We will only check the kernel stack. */
@@ -386,7 +419,31 @@ static inline void stack_overflow_check(struct pt_regs *regs)
        /* calculate kernel stack usage */
        stack_usage = sp - stack_start;
-        last_usage = &per_cpu(irq_stat.kernel_stack_usage, smp_processor_id());
+#ifdef CONFIG_IRQSTACKS
+        if (likely(stack_usage <= THREAD_SIZE))
+                goto check_kernel_stack; /* found kernel stack */
+        /* check irq stack usage */
+        stack_start = (unsigned long) &per_cpu(irq_stack_union, cpu).stack;
+        stack_usage = sp - stack_start;
+        last_usage = &per_cpu(irq_stat.irq_stack_usage, cpu);
+        if (unlikely(stack_usage > *last_usage))
+                *last_usage = stack_usage;
+        if (likely(stack_usage < (IRQ_STACK_SIZE - STACK_MARGIN)))
+                return;
+        pr_emerg("stackcheck: %s will most likely overflow irq stack "
+                 "(sp:%lx, stk bottom-top:%lx-%lx)\n",
+                current->comm, sp, stack_start, stack_start + IRQ_STACK_SIZE);
+        goto panic_check;
+check_kernel_stack:
+#endif
+        /* check kernel stack usage */
+        last_usage = &per_cpu(irq_stat.kernel_stack_usage, cpu);
        if (unlikely(stack_usage > *last_usage))
                *last_usage = stack_usage;
@@ -398,31 +455,66 @@ static inline void stack_overflow_check(struct pt_regs *regs)
                 "(sp:%lx, stk bottom-top:%lx-%lx)\n",
                current->comm, sp, stack_start, stack_start + THREAD_SIZE);
+#ifdef CONFIG_IRQSTACKS
+panic_check:
+#endif
        if (sysctl_panic_on_stackoverflow)
                panic("low stack detected by irq handler - check messages\n");
 #endif
 }
 #ifdef CONFIG_IRQSTACKS
-DEFINE_PER_CPU(union irq_stack_union, irq_stack_union);
+/* in entry.S: */
+void call_on_stack(unsigned long p1, void *func, unsigned long new_stack);
 static void execute_on_irq_stack(void *func, unsigned long param1)
 {
-        unsigned long *irq_stack_start;
+        union irq_stack_union *union_ptr;
        unsigned long irq_stack;
-        int cpu = smp_processor_id();
+        volatile unsigned int *irq_stack_in_use;
+        union_ptr = &per_cpu(irq_stack_union, smp_processor_id());
+        irq_stack = (unsigned long) &union_ptr->stack;
+        irq_stack = ALIGN(irq_stack + sizeof(irq_stack_union.slock),
+                         64); /* align for stack frame usage */
-        irq_stack_start = &per_cpu(irq_stack_union, cpu).stack[0];
+        /* We may be called recursive. If we are already using the irq stack,
-        irq_stack = (unsigned long) irq_stack_start;
+         * just continue to use it. Use spinlocks to serialize
-        irq_stack = ALIGN(irq_stack, 16); /* align for stack frame usage */
+         * the irq stack usage.
+         */
+        irq_stack_in_use = (volatile unsigned int *)__ldcw_align(union_ptr);
+        if (!__ldcw(irq_stack_in_use)) {
+                void (*direct_call)(unsigned long p1) = func;
-        BUG_ON(*irq_stack_start); /* report bug if we were called recursive. */
+                /* We are using the IRQ stack already.
-        *irq_stack_start = 1;
+                 * Do direct call on current stack. */
+                direct_call(param1);
+                return;
+        }
        /* This is where we switch to the IRQ stack. */
        call_on_stack(param1, func, irq_stack);
-        *irq_stack_start = 0;
+        /* free up irq stack usage. */
+        *irq_stack_in_use = 1;
+}
+asmlinkage void do_softirq(void)
+{
+        __u32 pending;
+        unsigned long flags;
+        if (in_interrupt())
+                return;
+        local_irq_save(flags);
+        pending = local_softirq_pending();
+        if (pending)
+                execute_on_irq_stack(__do_softirq, 0);
+        local_irq_restore(flags);
 }
 #endif /* CONFIG_IRQSTACKS */
diff --git a/arch/parisc/kernel/pacache.S b/arch/parisc/kernel/pacache.S
index 5e1de6072be5..36d7f402e48e 100644
--- a/arch/parisc/kernel/pacache.S
+++ b/arch/parisc/kernel/pacache.S
@@ -605,14 +605,14 @@ ENTRY(copy_user_page_asm)
        convert_phys_for_tlb_insert20 %r26      /* convert phys addr to tlb insert format */
        convert_phys_for_tlb_insert20 %r23      /* convert phys addr to tlb insert format */
        depd            %r24,63,22, %r28        /* Form aliased virtual address 'to' */
-        depdi           0, 63,PAGE_SHIFT, %r28  /* Clear any offset bits */
+        depdi           0, 63,PAGE_SHIFT, %r28  /* Clear any offset bits */
        copy            %r28, %r29
        depdi           1, 41,1, %r29           /* Form aliased virtual address 'from' */
 #else
        extrw,u         %r26, 24,25, %r26       /* convert phys addr to tlb insert format */
        extrw,u         %r23, 24,25, %r23       /* convert phys addr to tlb insert format */
        depw            %r24, 31,22, %r28       /* Form aliased virtual address 'to' */
-        depwi           0, 31,12, %r28          /* Clear any offset bits */
+        depwi           0, 31,PAGE_SHIFT, %r28  /* Clear any offset bits */
        copy            %r28, %r29
        depwi           1, 9,1, %r29            /* Form aliased virtual address 'from' */
 #endif
@@ -762,7 +762,7 @@ ENTRY(clear_user_page_asm)
 #else
        extrw,u         %r26, 24,25, %r26       /* convert phys addr to tlb insert format */
        depw            %r25, 31,22, %r28       /* Form aliased virtual address 'to' */
-        depwi           0, 31,12, %r28          /* Clear any offset bits */
+        depwi           0, 31,PAGE_SHIFT, %r28  /* Clear any offset bits */
 #endif
        /* Purge any old translation */
@@ -846,7 +846,7 @@ ENTRY(flush_dcache_page_asm)
 #else
        extrw,u         %r26, 24,25, %r26       /* convert phys addr to tlb insert format */
        depw            %r25, 31,22, %r28       /* Form aliased virtual address 'to' */
-        depwi           0, 31,12, %r28          /* Clear any offset bits */
+        depwi           0, 31,PAGE_SHIFT, %r28  /* Clear any offset bits */
 #endif
        /* Purge any old translation */
@@ -918,11 +918,11 @@ ENTRY(flush_icache_page_asm)
 #endif
        convert_phys_for_tlb_insert20 %r26      /* convert phys addr to tlb insert format */
        depd            %r25, 63,22, %r28       /* Form aliased virtual address 'to' */
-        depdi           0, 63,PAGE_SHIFT, %r28  /* Clear any offset bits */
+        depdi           0, 63,PAGE_SHIFT, %r28  /* Clear any offset bits */
 #else
        extrw,u         %r26, 24,25, %r26       /* convert phys addr to tlb insert format */
        depw            %r25, 31,22, %r28       /* Form aliased virtual address 'to' */
-        depwi           0, 31,12, %r28          /* Clear any offset bits */
+        depwi           0, 31,PAGE_SHIFT, %r28  /* Clear any offset bits */
 #endif
        /* Purge any old translation */
diff --git a/arch/parisc/kernel/traps.c b/arch/parisc/kernel/traps.c
index fe41a98043bb..04e47c6a4562 100644
--- a/arch/parisc/kernel/traps.c
+++ b/arch/parisc/kernel/traps.c
@@ -646,6 +646,7 @@ void notrace handle_interruption(int code, struct pt_regs *regs)
        case 14:
                /* Assist Exception Trap, i.e. floating point exception. */
                die_if_kernel("Floating point exception", regs, 0); /* quiet */
+                __inc_irq_stat(irq_fpassist_count);
                handle_fpe(regs);
                return;
diff --git a/arch/parisc/kernel/unaligned.c b/arch/parisc/kernel/unaligned.c
index 234e3682cf09..d7c0acb35ec2 100644
--- a/arch/parisc/kernel/unaligned.c
+++ b/arch/parisc/kernel/unaligned.c
@@ -27,6 +27,7 @@
 #include <linux/signal.h>
 #include <linux/ratelimit.h>
 #include <asm/uaccess.h>
+#include <asm/hardirq.h>
 /* #define DEBUG_UNALIGNED 1 */
@@ -454,6 +455,8 @@ void handle_unaligned(struct pt_regs *regs)
        struct siginfo si;
        register int flop=0;    /* true if this is a flop */
+        __inc_irq_stat(irq_unaligned_count);
        /* log a message with pacing */
        if (user_mode(regs)) {
                if (current->thread.flags & PARISC_UAC_SIGBUS) {
diff --git a/arch/parisc/mm/init.c b/arch/parisc/mm/init.c
index ce939ac8622b..1c965642068b 100644
--- a/arch/parisc/mm/init.c
+++ b/arch/parisc/mm/init.c
@@ -1069,7 +1069,7 @@ void flush_tlb_all(void)
 {
        int do_recycle;
-        inc_irq_stat(irq_tlb_count);
+        __inc_irq_stat(irq_tlb_count);
        do_recycle = 0;
        spin_lock(&sid_lock);
        if (dirty_space_ids > RECYCLE_THRESHOLD) {
@@ -1090,7 +1090,7 @@ void flush_tlb_all(void)
 #else
 void flush_tlb_all(void)
 {
-        inc_irq_stat(irq_tlb_count);
+        __inc_irq_stat(irq_tlb_count);
        spin_lock(&sid_lock);
        flush_tlb_all_local(NULL);
        recycle_sids();
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index 5416e28a7538..863d877e0b5f 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -262,8 +262,31 @@ config PPC_EARLY_DEBUG_OPAL_HVSI
          Select this to enable early debugging for the PowerNV platform
          using an "hvsi" console
+config PPC_EARLY_DEBUG_MEMCONS
+        bool "In memory console"
+        help
+          Select this to enable early debugging using an in memory console.
+          This console provides input and output buffers stored within the
+          kernel BSS and should be safe to select on any system. A debugger
+          can then be used to read kernel output or send input to the console.
 endchoice
+config PPC_MEMCONS_OUTPUT_SIZE
+        int "In memory console output buffer size"
+        depends on PPC_EARLY_DEBUG_MEMCONS
+        default 4096
+        help
+          Selects the size of the output buffer (in bytes) of the in memory
+          console.
+config PPC_MEMCONS_INPUT_SIZE
+        int "In memory console input buffer size"
+        depends on PPC_EARLY_DEBUG_MEMCONS
+        default 128
+        help
+          Selects the size of the input buffer (in bytes) of the in memory
+          console.
 config PPC_EARLY_DEBUG_OPAL
        def_bool y
        depends on PPC_EARLY_DEBUG_OPAL_RAW || PPC_EARLY_DEBUG_OPAL_HVSI
diff --git a/arch/powerpc/configs/ps3_defconfig b/arch/powerpc/configs/ps3_defconfig
index f79196232917..139a8308070c 100644
--- a/arch/powerpc/configs/ps3_defconfig
+++ b/arch/powerpc/configs/ps3_defconfig
@@ -136,7 +136,6 @@ CONFIG_HID_SMARTJOYPLUS=m
 CONFIG_USB_HIDDEV=y
 CONFIG_USB=m
 CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_SUSPEND=y
 CONFIG_USB_MON=m
 CONFIG_USB_EHCI_HCD=m
 # CONFIG_USB_EHCI_HCD_PPC_OF is not set
diff --git a/arch/powerpc/include/asm/context_tracking.h b/arch/powerpc/include/asm/context_tracking.h
new file mode 100644
index 000000000000..b6f5a33b8ee2
--- /dev/null
+++ b/arch/powerpc/include/asm/context_tracking.h
@@ -0,0 +1,10 @@
+#ifndef _ASM_POWERPC_CONTEXT_TRACKING_H
+#define _ASM_POWERPC_CONTEXT_TRACKING_H
+#ifdef CONFIG_CONTEXT_TRACKING
+#define SCHEDULE_USER bl        .schedule_user
+#else
+#define SCHEDULE_USER bl        .schedule
+#endif
+#endif
diff --git a/arch/powerpc/include/asm/firmware.h b/arch/powerpc/include/asm/firmware.h
index 0df54646f968..681bc0314b6b 100644
--- a/arch/powerpc/include/asm/firmware.h
+++ b/arch/powerpc/include/asm/firmware.h
@@ -52,6 +52,7 @@
 #define FW_FEATURE_BEST_ENERGY  ASM_CONST(0x0000000080000000)
 #define FW_FEATURE_TYPE1_AFFINITY ASM_CONST(0x0000000100000000)
 #define FW_FEATURE_PRRN         ASM_CONST(0x0000000200000000)
+#define FW_FEATURE_OPALv3       ASM_CONST(0x0000000400000000)
 #ifndef __ASSEMBLY__
@@ -69,7 +70,8 @@ enum {
                FW_FEATURE_SET_MODE | FW_FEATURE_BEST_ENERGY |
                FW_FEATURE_TYPE1_AFFINITY | FW_FEATURE_PRRN,
        FW_FEATURE_PSERIES_ALWAYS = 0,
-        FW_FEATURE_POWERNV_POSSIBLE = FW_FEATURE_OPAL | FW_FEATURE_OPALv2,
+        FW_FEATURE_POWERNV_POSSIBLE = FW_FEATURE_OPAL | FW_FEATURE_OPALv2 |
+                FW_FEATURE_OPALv3,
        FW_FEATURE_POWERNV_ALWAYS = 0,
        FW_FEATURE_PS3_POSSIBLE = FW_FEATURE_LPAR | FW_FEATURE_PS3_LV1,
        FW_FEATURE_PS3_ALWAYS = FW_FEATURE_LPAR | FW_FEATURE_PS3_LV1,
diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h
index d615b28dda82..ba713f166fa5 100644
--- a/arch/powerpc/include/asm/hw_irq.h
+++ b/arch/powerpc/include/asm/hw_irq.h
@@ -96,11 +96,12 @@ static inline bool arch_irqs_disabled(void)
 #endif
 #define hard_irq_disable()      do {                    \
+        u8 _was_enabled = get_paca()->soft_enabled;     \
        __hard_irq_disable();                           \
-        if (local_paca->soft_enabled)                   \
-                trace_hardirqs_off();                   \
        get_paca()->soft_enabled = 0;                   \
        get_paca()->irq_happened |= PACA_IRQ_HARD_DIS;  \
+        if (_was_enabled)                               \
+                trace_hardirqs_off();                   \
 } while(0)
 static inline bool lazy_irq_pending(void)
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index b6c8b58b1d76..cbb9305ab15a 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -243,7 +243,8 @@ enum OpalMCE_TlbErrorType {
 enum OpalThreadStatus {
        OPAL_THREAD_INACTIVE = 0x0,
-        OPAL_THREAD_STARTED = 0x1
+        OPAL_THREAD_STARTED = 0x1,
+        OPAL_THREAD_UNAVAILABLE = 0x2 /* opal-v3 */
 };
 enum OpalPciBusCompare {
@@ -563,6 +564,8 @@ extern void opal_nvram_init(void);
 extern int opal_machine_check(struct pt_regs *regs);
+extern void opal_shutdown(void);
 #endif /* __ASSEMBLY__ */
 #endif /* __OPAL_H */
diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
index 8b11b5bd9938..2c1d8cb9b265 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -174,6 +174,8 @@ struct pci_dn {
 /* Get the pointer to a device_node's pci_dn */
 #define PCI_DN(dn)      ((struct pci_dn *) (dn)->data)
+extern struct pci_dn *pci_get_pdn(struct pci_dev *pdev);
 extern void * update_dn_pci_info(struct device_node *dn, void *data);
 static inline int pci_device_from_OF_node(struct device_node *np,
diff --git a/arch/powerpc/include/asm/pgalloc-64.h b/arch/powerpc/include/asm/pgalloc-64.h
index 91acb12bac92..b66ae722a8e9 100644
--- a/arch/powerpc/include/asm/pgalloc-64.h
+++ b/arch/powerpc/include/asm/pgalloc-64.h
@@ -186,7 +186,7 @@ static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
 static inline pgtable_t pmd_pgtable(pmd_t pmd)
 {
-        return (pgtable_t)(pmd_val(pmd) & -sizeof(pte_t)*PTRS_PER_PTE);
+        return (pgtable_t)(pmd_val(pmd) & ~PMD_MASKED_BITS);
 }
 static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index d7e67ca8b4a6..594db6bc093c 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -284,6 +284,12 @@ struct thread_struct {
        unsigned long   ebbrr;
        unsigned long   ebbhr;
        unsigned long   bescr;
+        unsigned long   siar;
+        unsigned long   sdar;
+        unsigned long   sier;
+        unsigned long   mmcr0;
+        unsigned long   mmcr2;
+        unsigned long   mmcra;
 #endif
 };
diff --git a/arch/powerpc/include/asm/pte-hash64-64k.h b/arch/powerpc/include/asm/pte-hash64-64k.h
index 3e13e23e4fdf..d836d945068d 100644
--- a/arch/powerpc/include/asm/pte-hash64-64k.h
+++ b/arch/powerpc/include/asm/pte-hash64-64k.h
@@ -47,7 +47,7 @@
 * generic accessors and iterators here
 */
 #define __real_pte(e,p)         ((real_pte_t) { \
-                        (e), ((e) & _PAGE_COMBO) ? \
+                        (e), (pte_val(e) & _PAGE_COMBO) ? \
                                (pte_val(*((p) + PTRS_PER_PTE))) : 0 })
 #define __rpte_to_hidx(r,index) ((pte_val((r).pte) & _PAGE_COMBO) ? \
        (((r).hidx >> ((index)<<2)) & 0xf) : ((pte_val((r).pte) >> 12) & 0xf))
diff --git a/arch/powerpc/include/asm/rtas.h b/arch/powerpc/include/asm/rtas.h
index a8bc2bb4adc9..34fd70488d83 100644
--- a/arch/powerpc/include/asm/rtas.h
+++ b/arch/powerpc/include/asm/rtas.h
@@ -264,6 +264,8 @@ extern void rtas_progress(char *s, unsigned short hex);
 extern void rtas_initialize(void);
 extern int rtas_suspend_cpu(struct rtas_suspend_me_data *data);
 extern int rtas_suspend_last_cpu(struct rtas_suspend_me_data *data);
+extern int rtas_online_cpus_mask(cpumask_var_t cpus);
+extern int rtas_offline_cpus_mask(cpumask_var_t cpus);
 extern int rtas_ibm_suspend_me(struct rtas_args *);
 struct rtc_time;
diff --git a/arch/powerpc/include/asm/thread_info.h b/arch/powerpc/include/asm/thread_info.h
index 8ceea14d6fe4..ba7b1973866e 100644
--- a/arch/powerpc/include/asm/thread_info.h
+++ b/arch/powerpc/include/asm/thread_info.h
@@ -97,7 +97,7 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_PERFMON_CTXSW       6       /* perfmon needs ctxsw calls */
 #define TIF_SYSCALL_AUDIT       7       /* syscall auditing active */
 #define TIF_SINGLESTEP          8       /* singlestepping active */
-#define TIF_MEMDIE              9       /* is terminating due to OOM killer */
+#define TIF_NOHZ                9       /* in adaptive nohz mode */
 #define TIF_SECCOMP             10      /* secure computing */
 #define TIF_RESTOREALL          11      /* Restore all regs (implies NOERROR) */
 #define TIF_NOERROR             12      /* Force successful syscall return */
@@ -106,6 +106,7 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_SYSCALL_TRACEPOINT  15      /* syscall tracepoint instrumentation */
 #define TIF_EMULATE_STACK_STORE 16      /* Is an instruction emulation
                                                for stack store? */
+#define TIF_MEMDIE              17      /* is terminating due to OOM killer */
 /* as above, but as bit values */
 #define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
@@ -124,8 +125,10 @@ static inline struct thread_info *current_thread_info(void)
 #define _TIF_UPROBE             (1<<TIF_UPROBE)
 #define _TIF_SYSCALL_TRACEPOINT (1<<TIF_SYSCALL_TRACEPOINT)
 #define _TIF_EMULATE_STACK_STORE        (1<<TIF_EMULATE_STACK_STORE)
+#define _TIF_NOHZ               (1<<TIF_NOHZ)
 #define _TIF_SYSCALL_T_OR_A     (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \
-                                 _TIF_SECCOMP | _TIF_SYSCALL_TRACEPOINT)
+                                 _TIF_SECCOMP | _TIF_SYSCALL_TRACEPOINT | \
+                                 _TIF_NOHZ)
 #define _TIF_USER_WORK_MASK     (_TIF_SIGPENDING | _TIF_NEED_RESCHED | \
                                 _TIF_NOTIFY_RESUME | _TIF_UPROBE)
diff --git a/arch/powerpc/include/asm/udbg.h b/arch/powerpc/include/asm/udbg.h
index 5a7510e9d09d..dc590919f8eb 100644
--- a/arch/powerpc/include/asm/udbg.h
+++ b/arch/powerpc/include/asm/udbg.h
@@ -52,6 +52,7 @@ extern void __init udbg_init_40x_realmode(void);
 extern void __init udbg_init_cpm(void);
 extern void __init udbg_init_usbgecko(void);
 extern void __init udbg_init_wsp(void);
+extern void __init udbg_init_memcons(void);
 extern void __init udbg_init_ehv_bc(void);
 extern void __init udbg_init_ps3gelic(void);
 extern void __init udbg_init_debug_opal_raw(void);
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index b51a97cfedf8..6f16ffafa6f0 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -127,6 +127,12 @@ int main(void)
        DEFINE(THREAD_BESCR, offsetof(struct thread_struct, bescr));
        DEFINE(THREAD_EBBHR, offsetof(struct thread_struct, ebbhr));
        DEFINE(THREAD_EBBRR, offsetof(struct thread_struct, ebbrr));
+        DEFINE(THREAD_SIAR, offsetof(struct thread_struct, siar));
+        DEFINE(THREAD_SDAR, offsetof(struct thread_struct, sdar));
+        DEFINE(THREAD_SIER, offsetof(struct thread_struct, sier));
+        DEFINE(THREAD_MMCR0, offsetof(struct thread_struct, mmcr0));
+        DEFINE(THREAD_MMCR2, offsetof(struct thread_struct, mmcr2));
+        DEFINE(THREAD_MMCRA, offsetof(struct thread_struct, mmcra));
 #endif
 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
        DEFINE(PACATMSCRATCH, offsetof(struct paca_struct, tm_scratch));
diff --git a/arch/powerpc/kernel/cpu_setup_power.S b/arch/powerpc/kernel/cpu_setup_power.S
index a283b6442b26..18b5b9cf8e37 100644
--- a/arch/powerpc/kernel/cpu_setup_power.S
+++ b/arch/powerpc/kernel/cpu_setup_power.S
@@ -135,8 +135,12 @@ __init_HFSCR:
        blr
 __init_TLB:
-        /* Clear the TLB */
+        /*
-        li      r6,128
+         * Clear the TLB using the "IS 3" form of tlbiel instruction
+         * (invalidate by congruence class). P7 has 128 CCs, P8 has 512
+         * so we just always do 512
+         */
+        li      r6,512
        mtctr   r6
        li      r7,0xc00        /* IS field = 0b11 */
        ptesync
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index e514de57a125..d22e73e4618b 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -439,8 +439,6 @@ ret_from_fork:
 ret_from_kernel_thread:
        REST_NVGPRS(r1)
        bl      schedule_tail
-        li      r3,0
-        stw     r3,0(r1)
        mtlr    r14
        mr      r3,r15
        PPC440EP_ERR42
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 915fbb4fc2fe..0e9095e47b5b 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -33,6 +33,7 @@
 #include <asm/irqflags.h>
 #include <asm/ftrace.h>
 #include <asm/hw_irq.h>
+#include <asm/context_tracking.h>
 /*
 * System calls.
@@ -376,8 +377,6 @@ _GLOBAL(ret_from_fork)
 _GLOBAL(ret_from_kernel_thread)
        bl      .schedule_tail
        REST_NVGPRS(r1)
-        li      r3,0
-        std     r3,0(r1)
        ld      r14, 0(r14)
        mtlr    r14
        mr      r3,r15
@@ -466,6 +465,20 @@ BEGIN_FTR_SECTION
        std     r0, THREAD_EBBHR(r3)
        mfspr   r0, SPRN_EBBRR
        std     r0, THREAD_EBBRR(r3)
+        /* PMU registers made user read/(write) by EBB */
+        mfspr   r0, SPRN_SIAR
+        std     r0, THREAD_SIAR(r3)
+        mfspr   r0, SPRN_SDAR
+        std     r0, THREAD_SDAR(r3)
+        mfspr   r0, SPRN_SIER
+        std     r0, THREAD_SIER(r3)
+        mfspr   r0, SPRN_MMCR0
+        std     r0, THREAD_MMCR0(r3)
+        mfspr   r0, SPRN_MMCR2
+        std     r0, THREAD_MMCR2(r3)
+        mfspr   r0, SPRN_MMCRA
+        std     r0, THREAD_MMCRA(r3)
 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
 #endif
@@ -561,6 +574,20 @@ BEGIN_FTR_SECTION
        ld      r0, THREAD_EBBRR(r4)
        mtspr   SPRN_EBBRR, r0
+        /* PMU registers made user read/(write) by EBB */
+        ld      r0, THREAD_SIAR(r4)
+        mtspr   SPRN_SIAR, r0
+        ld      r0, THREAD_SDAR(r4)
+        mtspr   SPRN_SDAR, r0
+        ld      r0, THREAD_SIER(r4)
+        mtspr   SPRN_SIER, r0
+        ld      r0, THREAD_MMCR0(r4)
+        mtspr   SPRN_MMCR0, r0
+        ld      r0, THREAD_MMCR2(r4)
+        mtspr   SPRN_MMCR2, r0
+        ld      r0, THREAD_MMCRA(r4)
+        mtspr   SPRN_MMCRA, r0
        ld      r0,THREAD_TAR(r4)
        mtspr   SPRN_TAR,r0
 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
@@ -634,7 +661,7 @@ _GLOBAL(ret_from_except_lite)
        andi.   r0,r4,_TIF_NEED_RESCHED
        beq     1f
        bl      .restore_interrupts
-        bl      .schedule
+        SCHEDULE_USER
        b       .ret_from_except_lite
 1:      bl      .save_nvgprs
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S
index 42a756eec9ff..645170a07ada 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -489,7 +489,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
         */
        mfspr   r14,SPRN_DBSR           /* check single-step/branch taken */
-        andis.  r15,r14,DBSR_IC@h
+        andis.  r15,r14,(DBSR_IC|DBSR_BT)@h
        beq+    1f
        LOAD_REG_IMMEDIATE(r14,interrupt_base_book3e)
@@ -500,7 +500,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
        bge+    cr1,1f
        /* here it looks like we got an inappropriate debug exception. */
-        lis     r14,DBSR_IC@h           /* clear the IC event */
+        lis     r14,(DBSR_IC|DBSR_BT)@h         /* clear the event */
        rlwinm  r11,r11,0,~MSR_DE       /* clear DE in the CSRR1 value */
        mtspr   SPRN_DBSR,r14
        mtspr   SPRN_CSRR1,r11
@@ -555,7 +555,7 @@ kernel_dbg_exc:
         */
        mfspr   r14,SPRN_DBSR           /* check single-step/branch taken */
-        andis.  r15,r14,DBSR_IC@h
+        andis.  r15,r14,(DBSR_IC|DBSR_BT)@h
        beq+    1f
        LOAD_REG_IMMEDIATE(r14,interrupt_base_book3e)
@@ -566,7 +566,7 @@ kernel_dbg_exc:
        bge+    cr1,1f
        /* here it looks like we got an inappropriate debug exception. */
-        lis     r14,DBSR_IC@h           /* clear the IC event */
+        lis     r14,(DBSR_IC|DBSR_BT)@h         /* clear the event */
        rlwinm  r11,r11,0,~MSR_DE       /* clear DE in the DSRR1 value */
        mtspr   SPRN_DBSR,r14
        mtspr   SPRN_DSRR1,r11
diff --git a/arch/powerpc/kernel/machine_kexec_64.c b/arch/powerpc/kernel/machine_kexec_64.c
index 466a2908bb63..611acdf30096 100644
--- a/arch/powerpc/kernel/machine_kexec_64.c
+++ b/arch/powerpc/kernel/machine_kexec_64.c
@@ -17,6 +17,7 @@
 #include <linux/errno.h>
 #include <linux/kernel.h>
 #include <linux/cpu.h>
+#include <linux/hardirq.h>
 #include <asm/page.h>
 #include <asm/current.h>
@@ -335,10 +336,13 @@ void default_machine_kexec(struct kimage *image)
        pr_debug("kexec: Starting switchover sequence.\n");
        /* switch to a staticly allocated stack.  Based on irq stack code.
+         * We setup preempt_count to avoid using VMX in memcpy.
         * XXX: the task struct will likely be invalid once we do the copy!
         */
        kexec_stack.thread_info.task = current_thread_info()->task;
        kexec_stack.thread_info.flags = 0;
+        kexec_stack.thread_info.preempt_count = HARDIRQ_OFFSET;
+        kexec_stack.thread_info.cpu = current_thread_info()->cpu;
        /* We need a static PACA, too; copy this CPU's PACA over and switch to
         * it.  Also poison per_cpu_offset to catch anyone using non-static
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 19e096bd0e73..e469f30e6eeb 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -657,6 +657,17 @@ _GLOBAL(__ucmpdi2)
        li      r3,2
        blr
+_GLOBAL(__bswapdi2)
+        rotlwi  r9,r4,8
+        rotlwi  r10,r3,8
+        rlwimi  r9,r4,24,0,7
+        rlwimi  r10,r3,24,0,7
+        rlwimi  r9,r4,24,16,23
+        rlwimi  r10,r3,24,16,23
+        mr      r3,r9
+        mr      r4,r10
+        blr
 _GLOBAL(abs)
        srawi   r4,r3,31
        xor     r3,r3,r4
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index 5cfa8008693b..6820e45f557b 100644
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -234,6 +234,17 @@ _GLOBAL(__flush_dcache_icache)
        isync
        blr
+_GLOBAL(__bswapdi2)
+        srdi    r8,r3,32
+        rlwinm  r7,r3,8,0xffffffff
+        rlwimi  r7,r3,24,0,7
+        rlwinm  r9,r8,8,0xffffffff
+        rlwimi  r7,r3,24,16,23
+        rlwimi  r9,r8,24,0,7
+        rlwimi  r9,r8,24,16,23
+        sldi    r7,r7,32
+        or      r3,r7,r9
+        blr
 #if defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_MAPLE)
 /*
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index f5c5c90799a7..e9acf50dd5b2 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -359,7 +359,6 @@ static pgprot_t __pci_mmap_set_pgprot(struct pci_dev *dev, struct resource *rp,
                                      enum pci_mmap_state mmap_state,
                                      int write_combine)
 {
-        unsigned long prot = pgprot_val(protection);
        /* Write combine is always 0 on non-memory space mappings. On
         * memory space, if the user didn't pass 1, we check for a
@@ -376,9 +375,9 @@ static pgprot_t __pci_mmap_set_pgprot(struct pci_dev *dev, struct resource *rp,
        /* XXX would be nice to have a way to ask for write-through */
        if (write_combine)
-                return pgprot_noncached_wc(prot);
+                return pgprot_noncached_wc(protection);
        else
-                return pgprot_noncached(prot);
+                return pgprot_noncached(protection);
 }
 /*
@@ -1521,9 +1520,10 @@ static void pcibios_setup_phb_resources(struct pci_controller *hose,
        for (i = 0; i < 3; ++i) {
                res = &hose->mem_resources[i];
                if (!res->flags) {
-                        printk(KERN_ERR "PCI: Memory resource 0 not set for "
+                        if (i == 0)
-                               "host bridge %s (domain %d)\n",
+                                printk(KERN_ERR "PCI: Memory resource 0 not set for "
-                               hose->dn->full_name, hose->global_number);
+                                       "host bridge %s (domain %d)\n",
+                                       hose->dn->full_name, hose->global_number);
                        continue;
                }
                offset = hose->mem_offset[i];
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index 873050d26840..2e8629654ca8 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -266,3 +266,13 @@ int pcibus_to_node(struct pci_bus *bus)
 }
 EXPORT_SYMBOL(pcibus_to_node);
 #endif
+static void quirk_radeon_32bit_msi(struct pci_dev *dev)
+{
+        struct pci_dn *pdn = pci_get_pdn(dev);
+        if (pdn)
+                pdn->force_32bit_msi = 1;
+}
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x68f2, quirk_radeon_32bit_msi);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0xaa68, quirk_radeon_32bit_msi);
diff --git a/arch/powerpc/kernel/pci_dn.c b/arch/powerpc/kernel/pci_dn.c
index e7af165f8b9d..df038442548a 100644
--- a/arch/powerpc/kernel/pci_dn.c
+++ b/arch/powerpc/kernel/pci_dn.c
@@ -32,6 +32,14 @@
 #include <asm/ppc-pci.h>
 #include <asm/firmware.h>
+struct pci_dn *pci_get_pdn(struct pci_dev *pdev)
+{
+        struct device_node *dn = pci_device_to_OF_node(pdev);
+        if (!dn)
+                return NULL;
+        return PCI_DN(dn);
+}
 /*
 * Traverse_func that inits the PCI fields of the device node.
 * NOTE: this *must* be done before read/write config to the device.
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index 78b8766fd79e..c29666586998 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -143,7 +143,8 @@ EXPORT_SYMBOL(__lshrdi3);
 int __ucmpdi2(unsigned long long, unsigned long long);
 EXPORT_SYMBOL(__ucmpdi2);
 #endif
+long long __bswapdi2(long long);
+EXPORT_SYMBOL(__bswapdi2);
 EXPORT_SYMBOL(memcpy);
 EXPORT_SYMBOL(memset);
 EXPORT_SYMBOL(memmove);
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index ceb4e7b62cf4..a902723fdc69 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -339,6 +339,13 @@ static void set_debug_reg_defaults(struct thread_struct *thread)
 static void prime_debug_regs(struct thread_struct *thread)
 {
+        /*
+         * We could have inherited MSR_DE from userspace, since
+         * it doesn't get cleared on exception entry.  Make sure
+         * MSR_DE is clear before we enable any debug events.
+         */
+        mtmsr(mfmsr() & ~MSR_DE);
        mtspr(SPRN_IAC1, thread->iac1);
        mtspr(SPRN_IAC2, thread->iac2);
 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
@@ -971,6 +978,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
         * do some house keeping and then return from the fork or clone
         * system call, using the stack frame created above.
         */
+        ((unsigned long *)sp)[0] = 0;
        sp -= sizeof(struct pt_regs);
        kregs = (struct pt_regs *) sp;
        sp -= STACK_FRAME_OVERHEAD;
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 3b14d320e69f..98c2fc198712 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -32,6 +32,7 @@
 #include <trace/syscall.h>
 #include <linux/hw_breakpoint.h>
 #include <linux/perf_event.h>
+#include <linux/context_tracking.h>
 #include <asm/uaccess.h>
 #include <asm/page.h>
@@ -1788,6 +1789,8 @@ long do_syscall_trace_enter(struct pt_regs *regs)
 {
        long ret = 0;
+        user_exit();
        secure_computing_strict(regs->gpr[0]);
        if (test_thread_flag(TIF_SYSCALL_TRACE) &&
@@ -1832,4 +1835,6 @@ void do_syscall_trace_leave(struct pt_regs *regs)
        step = test_thread_flag(TIF_SINGLESTEP);
        if (step || test_thread_flag(TIF_SYSCALL_TRACE))
                tracehook_report_syscall_exit(regs, step);
+        user_enter();
 }
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index 1fd6e7b2f390..52add6f3e201 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -19,6 +19,7 @@
 #include <linux/init.h>
 #include <linux/capability.h>
 #include <linux/delay.h>
+#include <linux/cpu.h>
 #include <linux/smp.h>
 #include <linux/completion.h>
 #include <linux/cpumask.h>
@@ -807,6 +808,95 @@ static void rtas_percpu_suspend_me(void *info)
        __rtas_suspend_cpu((struct rtas_suspend_me_data *)info, 1);
 }
+enum rtas_cpu_state {
+        DOWN,
+        UP,
+};
+#ifndef CONFIG_SMP
+static int rtas_cpu_state_change_mask(enum rtas_cpu_state state,
+                                cpumask_var_t cpus)
+{
+        if (!cpumask_empty(cpus)) {
+                cpumask_clear(cpus);
+                return -EINVAL;
+        } else
+                return 0;
+}
+#else
+/* On return cpumask will be altered to indicate CPUs changed.
+ * CPUs with states changed will be set in the mask,
+ * CPUs with status unchanged will be unset in the mask. */
+static int rtas_cpu_state_change_mask(enum rtas_cpu_state state,
+                                cpumask_var_t cpus)
+{
+        int cpu;
+        int cpuret = 0;
+        int ret = 0;
+        if (cpumask_empty(cpus))
+                return 0;
+        for_each_cpu(cpu, cpus) {
+                switch (state) {
+                case DOWN:
+                        cpuret = cpu_down(cpu);
+                        break;
+                case UP:
+                        cpuret = cpu_up(cpu);
+                        break;
+                }
+                if (cpuret) {
+                        pr_debug("%s: cpu_%s for cpu#%d returned %d.\n",
+                                        __func__,
+                                        ((state == UP) ? "up" : "down"),
+                                        cpu, cpuret);
+                        if (!ret)
+                                ret = cpuret;
+                        if (state == UP) {
+                                /* clear bits for unchanged cpus, return */
+                                cpumask_shift_right(cpus, cpus, cpu);
+                                cpumask_shift_left(cpus, cpus, cpu);
+                                break;
+                        } else {
+                                /* clear bit for unchanged cpu, continue */
+                                cpumask_clear_cpu(cpu, cpus);
+                        }
+                }
+        }
+        return ret;
+}
+#endif
+int rtas_online_cpus_mask(cpumask_var_t cpus)
+{
+        int ret;
+        ret = rtas_cpu_state_change_mask(UP, cpus);
+        if (ret) {
+                cpumask_var_t tmp_mask;
+                if (!alloc_cpumask_var(&tmp_mask, GFP_TEMPORARY))
+                        return ret;
+                /* Use tmp_mask to preserve cpus mask from first failure */
+                cpumask_copy(tmp_mask, cpus);
+                rtas_offline_cpus_mask(tmp_mask);
+                free_cpumask_var(tmp_mask);
+        }
+        return ret;
+}
+EXPORT_SYMBOL(rtas_online_cpus_mask);
+int rtas_offline_cpus_mask(cpumask_var_t cpus)
+{
+        return rtas_cpu_state_change_mask(DOWN, cpus);
+}
+EXPORT_SYMBOL(rtas_offline_cpus_mask);
 int rtas_ibm_suspend_me(struct rtas_args *args)
 {
        long state;
@@ -814,6 +904,8 @@ int rtas_ibm_suspend_me(struct rtas_args *args)
        unsigned long retbuf[PLPAR_HCALL_BUFSIZE];
        struct rtas_suspend_me_data data;
        DECLARE_COMPLETION_ONSTACK(done);
+        cpumask_var_t offline_mask;
+        int cpuret;
        if (!rtas_service_present("ibm,suspend-me"))
                return -ENOSYS;
@@ -837,11 +929,24 @@ int rtas_ibm_suspend_me(struct rtas_args *args)
                return 0;
        }
+        if (!alloc_cpumask_var(&offline_mask, GFP_TEMPORARY))
+                return -ENOMEM;
        atomic_set(&data.working, 0);
        atomic_set(&data.done, 0);
        atomic_set(&data.error, 0);
        data.token = rtas_token("ibm,suspend-me");
        data.complete = &done;
+        /* All present CPUs must be online */
+        cpumask_andnot(offline_mask, cpu_present_mask, cpu_online_mask);
+        cpuret = rtas_online_cpus_mask(offline_mask);
+        if (cpuret) {
+                pr_err("%s: Could not bring present CPUs online.\n", __func__);
+                atomic_set(&data.error, cpuret);
+                goto out;
+        }
        stop_topology_update();
        /* Call function on all CPUs.  One of us will make the
@@ -857,6 +962,14 @@ int rtas_ibm_suspend_me(struct rtas_args *args)
        start_topology_update();
+        /* Take down CPUs not online prior to suspend */
+        cpuret = rtas_offline_cpus_mask(offline_mask);
+        if (cpuret)
+                pr_warn("%s: Could not restore CPUs to offline state.\n",
+                                __func__);
+out:
+        free_cpumask_var(offline_mask);
        return atomic_read(&data.error);
 }
 #else /* CONFIG_PPC_PSERIES */
diff --git a/arch/powerpc/kernel/rtas_flash.c b/arch/powerpc/kernel/rtas_flash.c
index 5b3022470126..2f3cdb01506d 100644
--- a/arch/powerpc/kernel/rtas_flash.c
+++ b/arch/powerpc/kernel/rtas_flash.c
@@ -89,6 +89,7 @@
 /* Array sizes */
 #define VALIDATE_BUF_SIZE 4096    
+#define VALIDATE_MSG_LEN  256
 #define RTAS_MSG_MAXLEN   64
 /* Quirk - RTAS requires 4k list length and block size */
@@ -466,7 +467,7 @@ static void validate_flash(struct rtas_validate_flash_t *args_buf)
 }
 static int get_validate_flash_msg(struct rtas_validate_flash_t *args_buf, 
-                                   char *msg)
+                                   char *msg, int msglen)
 {
        int n;
@@ -474,7 +475,8 @@ static int get_validate_flash_msg(struct rtas_validate_flash_t *args_buf,
                n = sprintf(msg, "%d\n", args_buf->update_results);
                if ((args_buf->update_results >= VALIDATE_CUR_UNKNOWN) ||
                    (args_buf->update_results == VALIDATE_TMP_UPDATE))
-                        n += sprintf(msg + n, "%s\n", args_buf->buf);
+                        n += snprintf(msg + n, msglen - n, "%s\n",
+                                        args_buf->buf);
        } else {
                n = sprintf(msg, "%d\n", args_buf->status);
        }
@@ -486,11 +488,11 @@ static ssize_t validate_flash_read(struct file *file, char __user *buf,
 {
        struct rtas_validate_flash_t *const args_buf =
                &rtas_validate_flash_data;
-        char msg[RTAS_MSG_MAXLEN];
+        char msg[VALIDATE_MSG_LEN];
        int msglen;
        mutex_lock(&rtas_validate_flash_mutex);
-        msglen = get_validate_flash_msg(args_buf, msg);
+        msglen = get_validate_flash_msg(args_buf, msg, VALIDATE_MSG_LEN);
        mutex_unlock(&rtas_validate_flash_mutex);
        return simple_read_from_buffer(buf, count, ppos, msg, msglen);
diff --git a/arch/powerpc/kernel/signal.c b/arch/powerpc/kernel/signal.c
index cf12eae02de5..577a8aa69c6e 100644
--- a/arch/powerpc/kernel/signal.c
+++ b/arch/powerpc/kernel/signal.c
@@ -13,6 +13,7 @@
 #include <linux/signal.h>
 #include <linux/uprobes.h>
 #include <linux/key.h>
+#include <linux/context_tracking.h>
 #include <asm/hw_breakpoint.h>
 #include <asm/uaccess.h>
 #include <asm/unistd.h>
@@ -24,7 +25,7 @@
 * through debug.exception-trace sysctl.
 */
-int show_unhandled_signals = 0;
+int show_unhandled_signals = 1;
 /*
 * Allocate space for the signal frame
@@ -159,6 +160,8 @@ static int do_signal(struct pt_regs *regs)
 void do_notify_resume(struct pt_regs *regs, unsigned long thread_info_flags)
 {
+        user_exit();
        if (thread_info_flags & _TIF_UPROBE)
                uprobe_notify_resume(regs);
@@ -169,4 +172,6 @@ void do_notify_resume(struct pt_regs *regs, unsigned long thread_info_flags)
                clear_thread_flag(TIF_NOTIFY_RESUME);
                tracehook_notify_resume(regs);
        }
+        user_enter();
 }
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 83efa2f7d926..a7a648f6b750 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -35,6 +35,7 @@
 #include <linux/kdebug.h>
 #include <linux/debugfs.h>
 #include <linux/ratelimit.h>
+#include <linux/context_tracking.h>
 #include <asm/emulated_ops.h>
 #include <asm/pgtable.h>
@@ -667,6 +668,7 @@ int machine_check_generic(struct pt_regs *regs)
 void machine_check_exception(struct pt_regs *regs)
 {
+        enum ctx_state prev_state = exception_enter();
        int recover = 0;
        __get_cpu_var(irq_stat).mce_exceptions++;
@@ -683,7 +685,7 @@ void machine_check_exception(struct pt_regs *regs)
                recover = cur_cpu_spec->machine_check(regs);
        if (recover > 0)
-                return;
+                goto bail;
 #if defined(CONFIG_8xx) && defined(CONFIG_PCI)
        /* the qspan pci read routines can cause machine checks -- Cort
@@ -693,20 +695,23 @@ void machine_check_exception(struct pt_regs *regs)
         * -- BenH
         */
        bad_page_fault(regs, regs->dar, SIGBUS);
-        return;
+        goto bail;
 #endif
        if (debugger_fault_handler(regs))
-                return;
+                goto bail;
        if (check_io_access(regs))
-                return;
+                goto bail;
        die("Machine check", regs, SIGBUS);
        /* Must die if the interrupt is not recoverable */
        if (!(regs->msr & MSR_RI))
                panic("Unrecoverable Machine check");
+bail:
+        exception_exit(prev_state);
 }
 void SMIException(struct pt_regs *regs)
@@ -716,20 +721,29 @@ void SMIException(struct pt_regs *regs)
 void unknown_exception(struct pt_regs *regs)
 {
+        enum ctx_state prev_state = exception_enter();
        printk("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
               regs->nip, regs->msr, regs->trap);
        _exception(SIGTRAP, regs, 0, 0);
+        exception_exit(prev_state);
 }
 void instruction_breakpoint_exception(struct pt_regs *regs)
 {
+        enum ctx_state prev_state = exception_enter();
        if (notify_die(DIE_IABR_MATCH, "iabr_match", regs, 5,
                                        5, SIGTRAP) == NOTIFY_STOP)
-                return;
+                goto bail;
        if (debugger_iabr_match(regs))
-                return;
+                goto bail;
        _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
+bail:
+        exception_exit(prev_state);
 }
 void RunModeException(struct pt_regs *regs)
@@ -739,15 +753,20 @@ void RunModeException(struct pt_regs *regs)
 void __kprobes single_step_exception(struct pt_regs *regs)
 {
+        enum ctx_state prev_state = exception_enter();
        clear_single_step(regs);
        if (notify_die(DIE_SSTEP, "single_step", regs, 5,
                                        5, SIGTRAP) == NOTIFY_STOP)
-                return;
+                goto bail;
        if (debugger_sstep(regs))
-                return;
+                goto bail;
        _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
+bail:
+        exception_exit(prev_state);
 }
 /*
@@ -1005,6 +1024,7 @@ int is_valid_bugaddr(unsigned long addr)
 void __kprobes program_check_exception(struct pt_regs *regs)
 {
+        enum ctx_state prev_state = exception_enter();
        unsigned int reason = get_reason(regs);
        extern int do_mathemu(struct pt_regs *regs);
@@ -1014,26 +1034,26 @@ void __kprobes program_check_exception(struct pt_regs *regs)
        if (reason & REASON_FP) {
                /* IEEE FP exception */
                parse_fpe(regs);
-                return;
+                goto bail;
        }
        if (reason & REASON_TRAP) {
                /* Debugger is first in line to stop recursive faults in
                 * rcu_lock, notify_die, or atomic_notifier_call_chain */
                if (debugger_bpt(regs))
-                        return;
+                        goto bail;
                /* trap exception */
                if (notify_die(DIE_BPT, "breakpoint", regs, 5, 5, SIGTRAP)
                                == NOTIFY_STOP)
-                        return;
+                        goto bail;
                if (!(regs->msr & MSR_PR) &&  /* not user-mode */
                    report_bug(regs->nip, regs) == BUG_TRAP_TYPE_WARN) {
                        regs->nip += 4;
-                        return;
+                        goto bail;
                }
                _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
-                return;
+                goto bail;
        }
 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
        if (reason & REASON_TM) {
@@ -1049,7 +1069,7 @@ void __kprobes program_check_exception(struct pt_regs *regs)
                if (!user_mode(regs) &&
                    report_bug(regs->nip, regs) == BUG_TRAP_TYPE_WARN) {
                        regs->nip += 4;
-                        return;
+                        goto bail;
                }
                /* If usermode caused this, it's done something illegal and
                 * gets a SIGILL slap on the wrist.  We call it an illegal
@@ -1059,7 +1079,7 @@ void __kprobes program_check_exception(struct pt_regs *regs)
                 */
                if (user_mode(regs)) {
                        _exception(SIGILL, regs, ILL_ILLOPN, regs->nip);
-                        return;
+                        goto bail;
                } else {
                        printk(KERN_EMERG "Unexpected TM Bad Thing exception "
                               "at %lx (msr 0x%x)\n", regs->nip, reason);
@@ -1083,16 +1103,16 @@ void __kprobes program_check_exception(struct pt_regs *regs)
        switch (do_mathemu(regs)) {
        case 0:
                emulate_single_step(regs);
-                return;
+                goto bail;
        case 1: {
                        int code = 0;
                        code = __parse_fpscr(current->thread.fpscr.val);
                        _exception(SIGFPE, regs, code, regs->nip);
-                        return;
+                        goto bail;
                }
        case -EFAULT:
                _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
-                return;
+                goto bail;
        }
        /* fall through on any other errors */
 #endif /* CONFIG_MATH_EMULATION */
@@ -1103,10 +1123,10 @@ void __kprobes program_check_exception(struct pt_regs *regs)
                case 0:
                        regs->nip += 4;
                        emulate_single_step(regs);
-                        return;
+                        goto bail;
                case -EFAULT:
                        _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
-                        return;
+                        goto bail;
                }
        }
@@ -1114,10 +1134,14 @@ void __kprobes program_check_exception(struct pt_regs *regs)
                _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
        else
                _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
+bail:
+        exception_exit(prev_state);
 }
 void alignment_exception(struct pt_regs *regs)
 {
+        enum ctx_state prev_state = exception_enter();
        int sig, code, fixed = 0;
        /* We restore the interrupt state now */
@@ -1131,7 +1155,7 @@ void alignment_exception(struct pt_regs *regs)
        if (fixed == 1) {
                regs->nip += 4; /* skip over emulated instruction */
                emulate_single_step(regs);
-                return;
+                goto bail;
        }
        /* Operand address was bad */
@@ -1146,6 +1170,9 @@ void alignment_exception(struct pt_regs *regs)
                _exception(sig, regs, code, regs->dar);
        else
                bad_page_fault(regs, regs->dar, sig);
+bail:
+        exception_exit(prev_state);
 }
 void StackOverflow(struct pt_regs *regs)
@@ -1174,23 +1201,32 @@ void trace_syscall(struct pt_regs *regs)
 void kernel_fp_unavailable_exception(struct pt_regs *regs)
 {
+        enum ctx_state prev_state = exception_enter();
        printk(KERN_EMERG "Unrecoverable FP Unavailable Exception "
                          "%lx at %lx\n", regs->trap, regs->nip);
        die("Unrecoverable FP Unavailable Exception", regs, SIGABRT);
+        exception_exit(prev_state);
 }
 void altivec_unavailable_exception(struct pt_regs *regs)
 {
+        enum ctx_state prev_state = exception_enter();
        if (user_mode(regs)) {
                /* A user program has executed an altivec instruction,
                   but this kernel doesn't support altivec. */
                _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
-                return;
+                goto bail;
        }
        printk(KERN_EMERG "Unrecoverable VMX/Altivec Unavailable Exception "
                        "%lx at %lx\n", regs->trap, regs->nip);
        die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT);
+bail:
+        exception_exit(prev_state);
 }
 void vsx_unavailable_exception(struct pt_regs *regs)
diff --git a/arch/powerpc/kernel/udbg.c b/arch/powerpc/kernel/udbg.c
index 13b867093499..9d3fdcd66290 100644
--- a/arch/powerpc/kernel/udbg.c
+++ b/arch/powerpc/kernel/udbg.c
@@ -64,6 +64,9 @@ void __init udbg_early_init(void)
        udbg_init_usbgecko();
 #elif defined(CONFIG_PPC_EARLY_DEBUG_WSP)
        udbg_init_wsp();
+#elif defined(CONFIG_PPC_EARLY_DEBUG_MEMCONS)
+        /* In memory console */
+        udbg_init_memcons();
 #elif defined(CONFIG_PPC_EARLY_DEBUG_EHV_BC)
        udbg_init_ehv_bc();
 #elif defined(CONFIG_PPC_EARLY_DEBUG_PS3GELIC)
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 229951ffc351..8726779e1409 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -32,6 +32,7 @@
 #include <linux/perf_event.h>
 #include <linux/magic.h>
 #include <linux/ratelimit.h>
+#include <linux/context_tracking.h>
 #include <asm/firmware.h>
 #include <asm/page.h>
@@ -196,6 +197,7 @@ static int mm_fault_error(struct pt_regs *regs, unsigned long addr, int fault)
 int __kprobes do_page_fault(struct pt_regs *regs, unsigned long address,
                            unsigned long error_code)
 {
+        enum ctx_state prev_state = exception_enter();
        struct vm_area_struct * vma;
        struct mm_struct *mm = current->mm;
        unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
@@ -204,6 +206,7 @@ int __kprobes do_page_fault(struct pt_regs *regs, unsigned long address,
        int trap = TRAP(regs);
        int is_exec = trap == 0x400;
        int fault;
+        int rc = 0;
 #if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
        /*
@@ -230,28 +233,30 @@ int __kprobes do_page_fault(struct pt_regs *regs, unsigned long address,
         * look at it
         */
        if (error_code & ICSWX_DSI_UCT) {
-                int rc = acop_handle_fault(regs, address, error_code);
+                rc = acop_handle_fault(regs, address, error_code);
                if (rc)
-                        return rc;
+                        goto bail;
        }
 #endif /* CONFIG_PPC_ICSWX */
        if (notify_page_fault(regs))
-                return 0;
+                goto bail;
        if (unlikely(debugger_fault_handler(regs)))
-                return 0;
+                goto bail;
        /* On a kernel SLB miss we can only check for a valid exception entry */
-        if (!user_mode(regs) && (address >= TASK_SIZE))
+        if (!user_mode(regs) && (address >= TASK_SIZE)) {
-                return SIGSEGV;
+                rc = SIGSEGV;
+                goto bail;
+        }
 #if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE) || \
                             defined(CONFIG_PPC_BOOK3S_64))
        if (error_code & DSISR_DABRMATCH) {
                /* breakpoint match */
                do_break(regs, address, error_code);
-                return 0;
+                goto bail;
        }
 #endif
@@ -260,8 +265,10 @@ int __kprobes do_page_fault(struct pt_regs *regs, unsigned long address,
                local_irq_enable();
        if (in_atomic() || mm == NULL) {
-                if (!user_mode(regs))
+                if (!user_mode(regs)) {
-                        return SIGSEGV;
+                        rc = SIGSEGV;
+                        goto bail;
+                }
                /* in_atomic() in user mode is really bad,
                   as is current->mm == NULL. */
                printk(KERN_EMERG "Page fault in user mode with "
@@ -417,9 +424,11 @@ good_area:
         */
        fault = handle_mm_fault(mm, vma, address, flags);
        if (unlikely(fault & (VM_FAULT_RETRY|VM_FAULT_ERROR))) {
-                int rc = mm_fault_error(regs, address, fault);
+                rc = mm_fault_error(regs, address, fault);
                if (rc >= MM_FAULT_RETURN)
-                        return rc;
+                        goto bail;
+                else
+                        rc = 0;
        }
        /*
@@ -454,7 +463,7 @@ good_area:
        }
        up_read(&mm->mmap_sem);
-        return 0;
+        goto bail;
 bad_area:
        up_read(&mm->mmap_sem);
@@ -463,7 +472,7 @@ bad_area_nosemaphore:
        /* User mode accesses cause a SIGSEGV */
        if (user_mode(regs)) {
                _exception(SIGSEGV, regs, code, address);
-                return 0;
+                goto bail;
        }
        if (is_exec && (error_code & DSISR_PROTFAULT))
@@ -471,7 +480,11 @@ bad_area_nosemaphore:
                                   " page (%lx) - exploit attempt? (uid: %d)\n",
                                   address, from_kuid(&init_user_ns, current_uid()));
-        return SIGSEGV;
+        rc = SIGSEGV;
+bail:
+        exception_exit(prev_state);
+        return rc;
 }
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 88ac0eeaadde..e303a6d74e3a 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -33,6 +33,7 @@
 #include <linux/init.h>
 #include <linux/signal.h>
 #include <linux/memblock.h>
+#include <linux/context_tracking.h>
 #include <asm/processor.h>
 #include <asm/pgtable.h>
@@ -954,6 +955,7 @@ void hash_failure_debug(unsigned long ea, unsigned long access,
 */
 int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
 {
+        enum ctx_state prev_state = exception_enter();
        pgd_t *pgdir;
        unsigned long vsid;
        struct mm_struct *mm;
@@ -973,7 +975,8 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
                mm = current->mm;
                if (! mm) {
                        DBG_LOW(" user region with no mm !\n");
-                        return 1;
+                        rc = 1;
+                        goto bail;
                }
                psize = get_slice_psize(mm, ea);
                ssize = user_segment_size(ea);
@@ -992,19 +995,23 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
                /* Not a valid range
                 * Send the problem up to do_page_fault 
                 */
-                return 1;
+                rc = 1;
+                goto bail;
        }
        DBG_LOW(" mm=%p, mm->pgdir=%p, vsid=%016lx\n", mm, mm->pgd, vsid);
        /* Bad address. */
        if (!vsid) {
                DBG_LOW("Bad address!\n");
-                return 1;
+                rc = 1;
+                goto bail;
        }
        /* Get pgdir */
        pgdir = mm->pgd;
-        if (pgdir == NULL)
+        if (pgdir == NULL) {
-                return 1;
+                rc = 1;
+                goto bail;
+        }
        /* Check CPU locality */
        tmp = cpumask_of(smp_processor_id());
@@ -1027,7 +1034,8 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
        ptep = find_linux_pte_or_hugepte(pgdir, ea, &hugeshift);
        if (ptep == NULL || !pte_present(*ptep)) {
                DBG_LOW(" no PTE !\n");
-                return 1;
+                rc = 1;
+                goto bail;
        }
        /* Add _PAGE_PRESENT to the required access perm */
@@ -1038,13 +1046,16 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
         */
        if (access & ~pte_val(*ptep)) {
                DBG_LOW(" no access !\n");
-                return 1;
+                rc = 1;
+                goto bail;
        }
 #ifdef CONFIG_HUGETLB_PAGE
-        if (hugeshift)
+        if (hugeshift) {
-                return __hash_page_huge(ea, access, vsid, ptep, trap, local,
+                rc = __hash_page_huge(ea, access, vsid, ptep, trap, local,
                                        ssize, hugeshift, psize);
+                goto bail;
+        }
 #endif /* CONFIG_HUGETLB_PAGE */
 #ifndef CONFIG_PPC_64K_PAGES
@@ -1124,6 +1135,9 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
                pte_val(*(ptep + PTRS_PER_PTE)));
 #endif
        DBG_LOW(" -> rc=%d\n", rc);
+bail:
+        exception_exit(prev_state);
        return rc;
 }
 EXPORT_SYMBOL_GPL(hash_page);
@@ -1259,6 +1273,8 @@ void flush_hash_range(unsigned long number, int local)
 */
 void low_hash_fault(struct pt_regs *regs, unsigned long address, int rc)
 {
+        enum ctx_state prev_state = exception_enter();
        if (user_mode(regs)) {
 #ifdef CONFIG_PPC_SUBPAGE_PROT
                if (rc == -2)
@@ -1268,6 +1284,8 @@ void low_hash_fault(struct pt_regs *regs, unsigned long address, int rc)
                        _exception(SIGBUS, regs, BUS_ADRERR, address);
        } else
                bad_page_fault(regs, address, SIGBUS);
+        exception_exit(prev_state);
 }
 long hpte_insert_repeating(unsigned long hash, unsigned long vpn,
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
index c2787bf779ca..a90b9c458990 100644
--- a/arch/powerpc/mm/init_64.c
+++ b/arch/powerpc/mm/init_64.c
@@ -215,7 +215,8 @@ static void __meminit vmemmap_create_mapping(unsigned long start,
                                             unsigned long phys)
 {
        int  mapped = htab_bolt_mapping(start, start + page_size, phys,
-                                        PAGE_KERNEL, mmu_vmemmap_psize,
+                                        pgprot_val(PAGE_KERNEL),
+                                        mmu_vmemmap_psize,
                                        mmu_kernel_ssize);
        BUG_ON(mapped < 0);
 }
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index c627843c5b2e..426180b84978 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -13,11 +13,13 @@
 #include <linux/perf_event.h>
 #include <linux/percpu.h>
 #include <linux/hardirq.h>
+#include <linux/uaccess.h>
 #include <asm/reg.h>
 #include <asm/pmc.h>
 #include <asm/machdep.h>
 #include <asm/firmware.h>
 #include <asm/ptrace.h>
+#include <asm/code-patching.h>
 #define BHRB_MAX_ENTRIES        32
 #define BHRB_TARGET             0x0000000000000002
@@ -100,6 +102,10 @@ static inline int siar_valid(struct pt_regs *regs)
        return 1;
 }
+static inline void power_pmu_bhrb_enable(struct perf_event *event) {}
+static inline void power_pmu_bhrb_disable(struct perf_event *event) {}
+void power_pmu_flush_branch_stack(void) {}
+static inline void power_pmu_bhrb_read(struct cpu_hw_events *cpuhw) {}
 #endif /* CONFIG_PPC32 */
 static bool regs_use_siar(struct pt_regs *regs)
@@ -308,6 +314,159 @@ static inline int siar_valid(struct pt_regs *regs)
        return 1;
 }
+/* Reset all possible BHRB entries */
+static void power_pmu_bhrb_reset(void)
+{
+        asm volatile(PPC_CLRBHRB);
+}
+static void power_pmu_bhrb_enable(struct perf_event *event)
+{
+        struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
+        if (!ppmu->bhrb_nr)
+                return;
+        /* Clear BHRB if we changed task context to avoid data leaks */
+        if (event->ctx->task && cpuhw->bhrb_context != event->ctx) {
+                power_pmu_bhrb_reset();
+                cpuhw->bhrb_context = event->ctx;
+        }
+        cpuhw->bhrb_users++;
+}
+static void power_pmu_bhrb_disable(struct perf_event *event)
+{
+        struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
+        if (!ppmu->bhrb_nr)
+                return;
+        cpuhw->bhrb_users--;
+        WARN_ON_ONCE(cpuhw->bhrb_users < 0);
+        if (!cpuhw->disabled && !cpuhw->bhrb_users) {
+                /* BHRB cannot be turned off when other
+                 * events are active on the PMU.
+                 */
+                /* avoid stale pointer */
+                cpuhw->bhrb_context = NULL;
+        }
+}
+/* Called from ctxsw to prevent one process's branch entries to
+ * mingle with the other process's entries during context switch.
+ */
+void power_pmu_flush_branch_stack(void)
+{
+        if (ppmu->bhrb_nr)
+                power_pmu_bhrb_reset();
+}
+/* Calculate the to address for a branch */
+static __u64 power_pmu_bhrb_to(u64 addr)
+{
+        unsigned int instr;
+        int ret;
+        __u64 target;
+        if (is_kernel_addr(addr))
+                return branch_target((unsigned int *)addr);
+        /* Userspace: need copy instruction here then translate it */
+        pagefault_disable();
+        ret = __get_user_inatomic(instr, (unsigned int __user *)addr);
+        if (ret) {
+                pagefault_enable();
+                return 0;
+        }
+        pagefault_enable();
+        target = branch_target(&instr);
+        if ((!target) || (instr & BRANCH_ABSOLUTE))
+                return target;
+        /* Translate relative branch target from kernel to user address */
+        return target - (unsigned long)&instr + addr;
+}
+/* Processing BHRB entries */
+void power_pmu_bhrb_read(struct cpu_hw_events *cpuhw)
+{
+        u64 val;
+        u64 addr;
+        int r_index, u_index, pred;
+        r_index = 0;
+        u_index = 0;
+        while (r_index < ppmu->bhrb_nr) {
+                /* Assembly read function */
+                val = read_bhrb(r_index++);
+                if (!val)
+                        /* Terminal marker: End of valid BHRB entries */
+                        break;
+                else {
+                        addr = val & BHRB_EA;
+                        pred = val & BHRB_PREDICTION;
+                        if (!addr)
+                                /* invalid entry */
+                                continue;
+                        /* Branches are read most recent first (ie. mfbhrb 0 is
+                         * the most recent branch).
+                         * There are two types of valid entries:
+                         * 1) a target entry which is the to address of a
+                         *    computed goto like a blr,bctr,btar.  The next
+                         *    entry read from the bhrb will be branch
+                         *    corresponding to this target (ie. the actual
+                         *    blr/bctr/btar instruction).
+                         * 2) a from address which is an actual branch.  If a
+                         *    target entry proceeds this, then this is the
+                         *    matching branch for that target.  If this is not
+                         *    following a target entry, then this is a branch
+                         *    where the target is given as an immediate field
+                         *    in the instruction (ie. an i or b form branch).
+                         *    In this case we need to read the instruction from
+                         *    memory to determine the target/to address.
+                         */
+                        if (val & BHRB_TARGET) {
+                                /* Target branches use two entries
+                                 * (ie. computed gotos/XL form)
+                                 */
+                                cpuhw->bhrb_entries[u_index].to = addr;
+                                cpuhw->bhrb_entries[u_index].mispred = pred;
+                                cpuhw->bhrb_entries[u_index].predicted = ~pred;
+                                /* Get from address in next entry */
+                                val = read_bhrb(r_index++);
+                                addr = val & BHRB_EA;
+                                if (val & BHRB_TARGET) {
+                                        /* Shouldn't have two targets in a
+                                           row.. Reset index and try again */
+                                        r_index--;
+                                        addr = 0;
+                                }
+                                cpuhw->bhrb_entries[u_index].from = addr;
+                        } else {
+                                /* Branches to immediate field 
+                                   (ie I or B form) */
+                                cpuhw->bhrb_entries[u_index].from = addr;
+                                cpuhw->bhrb_entries[u_index].to =
+                                        power_pmu_bhrb_to(addr);
+                                cpuhw->bhrb_entries[u_index].mispred = pred;
+                                cpuhw->bhrb_entries[u_index].predicted = ~pred;
+                        }
+                        u_index++;
+                }
+        }
+        cpuhw->bhrb_stack.nr = u_index;
+        return;
+}
 #endif /* CONFIG_PPC64 */
 static void perf_event_interrupt(struct pt_regs *regs);
@@ -904,47 +1063,6 @@ static int collect_events(struct perf_event *group, int max_count,
        return n;
 }
-/* Reset all possible BHRB entries */
-static void power_pmu_bhrb_reset(void)
-{
-        asm volatile(PPC_CLRBHRB);
-}
-void power_pmu_bhrb_enable(struct perf_event *event)
-{
-        struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
-        if (!ppmu->bhrb_nr)
-                return;
-        /* Clear BHRB if we changed task context to avoid data leaks */
-        if (event->ctx->task && cpuhw->bhrb_context != event->ctx) {
-                power_pmu_bhrb_reset();
-                cpuhw->bhrb_context = event->ctx;
-        }
-        cpuhw->bhrb_users++;
-}
-void power_pmu_bhrb_disable(struct perf_event *event)
-{
-        struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
-        if (!ppmu->bhrb_nr)
-                return;
-        cpuhw->bhrb_users--;
-        WARN_ON_ONCE(cpuhw->bhrb_users < 0);
-        if (!cpuhw->disabled && !cpuhw->bhrb_users) {
-                /* BHRB cannot be turned off when other
-                 * events are active on the PMU.
-                 */
-                /* avoid stale pointer */
-                cpuhw->bhrb_context = NULL;
-        }
-}
 /*
 * Add a event to the PMU.
 * If all events are not already frozen, then we disable and
@@ -1180,15 +1298,6 @@ int power_pmu_commit_txn(struct pmu *pmu)
        return 0;
 }
-/* Called from ctxsw to prevent one process's branch entries to
- * mingle with the other process's entries during context switch.
- */
-void power_pmu_flush_branch_stack(void)
-{
-        if (ppmu->bhrb_nr)
-                power_pmu_bhrb_reset();
-}
 /*
 * Return 1 if we might be able to put event on a limited PMC,
 * or 0 if not.
@@ -1458,77 +1567,6 @@ struct pmu power_pmu = {
        .flush_branch_stack = power_pmu_flush_branch_stack,
 };
-/* Processing BHRB entries */
-void power_pmu_bhrb_read(struct cpu_hw_events *cpuhw)
-{
-        u64 val;
-        u64 addr;
-        int r_index, u_index, target, pred;
-        r_index = 0;
-        u_index = 0;
-        while (r_index < ppmu->bhrb_nr) {
-                /* Assembly read function */
-                val = read_bhrb(r_index);
-                /* Terminal marker: End of valid BHRB entries */
-                if (val == 0) {
-                        break;
-                } else {
-                        /* BHRB field break up */
-                        addr = val & BHRB_EA;
-                        pred = val & BHRB_PREDICTION;
-                        target = val & BHRB_TARGET;
-                        /* Probable Missed entry: Not applicable for POWER8 */
-                        if ((addr == 0) && (target == 0) && (pred == 1)) {
-                                r_index++;
-                                continue;
-                        }
-                        /* Real Missed entry: Power8 based missed entry */
-                        if ((addr == 0) && (target == 1) && (pred == 1)) {
-                                r_index++;
-                                continue;
-                        }
-                        /* Reserved condition: Not a valid entry  */
-                        if ((addr == 0) && (target == 1) && (pred == 0)) {
-                                r_index++;
-                                continue;
-                        }
-                        /* Is a target address */
-                        if (val & BHRB_TARGET) {
-                                /* First address cannot be a target address */
-                                if (r_index == 0) {
-                                        r_index++;
-                                        continue;
-                                }
-                                /* Update target address for the previous entry */
-                                cpuhw->bhrb_entries[u_index - 1].to = addr;
-                                cpuhw->bhrb_entries[u_index - 1].mispred = pred;
-                                cpuhw->bhrb_entries[u_index - 1].predicted = ~pred;
-                                /* Dont increment u_index */
-                                r_index++;
-                        } else {
-                                /* Update address, flags for current entry */
-                                cpuhw->bhrb_entries[u_index].from = addr;
-                                cpuhw->bhrb_entries[u_index].mispred = pred;
-                                cpuhw->bhrb_entries[u_index].predicted = ~pred;
-                                /* Successfully popullated one entry */
-                                u_index++;
-                                r_index++;
-                        }
-                }
-        }
-        cpuhw->bhrb_stack.nr = u_index;
-        return;
-}
 /*
 * A counter has overflowed; update its count and record
 * things if requested.  Note that interrupts are hard-disabled
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index a881232a3cce..b62aab3e22ec 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -128,7 +128,7 @@ config PPC_RTAS_DAEMON
 config RTAS_PROC
        bool "Proc interface to RTAS"
-        depends on PPC_RTAS
+        depends on PPC_RTAS && PROC_FS
        default y
 config RTAS_FLASH
diff --git a/arch/powerpc/platforms/powernv/Kconfig b/arch/powerpc/platforms/powernv/Kconfig
index d3e840d643af..c24684c818ab 100644
--- a/arch/powerpc/platforms/powernv/Kconfig
+++ b/arch/powerpc/platforms/powernv/Kconfig
@@ -6,6 +6,7 @@ config PPC_POWERNV
        select PPC_ICP_NATIVE
        select PPC_P7_NAP
        select PPC_PCI_CHOICE if EMBEDDED
+        select EPAPR_BOOT
        default y
 config POWERNV_MSI
diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platforms/powernv/opal.c
index ade4463226c6..628c564ceadb 100644
--- a/arch/powerpc/platforms/powernv/opal.c
+++ b/arch/powerpc/platforms/powernv/opal.c
@@ -15,6 +15,7 @@
 #include <linux/of.h>
 #include <linux/of_platform.h>
 #include <linux/interrupt.h>
+#include <linux/slab.h>
 #include <asm/opal.h>
 #include <asm/firmware.h>
@@ -28,6 +29,8 @@ struct opal {
 static struct device_node *opal_node;
 static DEFINE_SPINLOCK(opal_write_lock);
 extern u64 opal_mc_secondary_handler[];
+static unsigned int *opal_irqs;
+static unsigned int opal_irq_count;
 int __init early_init_dt_scan_opal(unsigned long node,
                                   const char *uname, int depth, void *data)
@@ -53,7 +56,11 @@ int __init early_init_dt_scan_opal(unsigned long node,
                 opal.entry, entryp, entrysz);
        powerpc_firmware_features |= FW_FEATURE_OPAL;
-        if (of_flat_dt_is_compatible(node, "ibm,opal-v2")) {
+        if (of_flat_dt_is_compatible(node, "ibm,opal-v3")) {
+                powerpc_firmware_features |= FW_FEATURE_OPALv2;
+                powerpc_firmware_features |= FW_FEATURE_OPALv3;
+                printk("OPAL V3 detected !\n");
+        } else if (of_flat_dt_is_compatible(node, "ibm,opal-v2")) {
                powerpc_firmware_features |= FW_FEATURE_OPALv2;
                printk("OPAL V2 detected !\n");
        } else {
@@ -144,6 +151,13 @@ int opal_put_chars(uint32_t vtermno, const char *data, int total_len)
                                rc == OPAL_BUSY_EVENT || rc == OPAL_SUCCESS)) {
                len = total_len;
                rc = opal_console_write(vtermno, &len, data);
+                /* Closed or other error drop */
+                if (rc != OPAL_SUCCESS && rc != OPAL_BUSY &&
+                    rc != OPAL_BUSY_EVENT) {
+                        written = total_len;
+                        break;
+                }
                if (rc == OPAL_SUCCESS) {
                        total_len -= len;
                        data += len;
@@ -316,6 +330,8 @@ static int __init opal_init(void)
        irqs = of_get_property(opal_node, "opal-interrupts", &irqlen);
        pr_debug("opal: Found %d interrupts reserved for OPAL\n",
                 irqs ? (irqlen / 4) : 0);
+        opal_irq_count = irqlen / 4;
+        opal_irqs = kzalloc(opal_irq_count * sizeof(unsigned int), GFP_KERNEL);
        for (i = 0; irqs && i < (irqlen / 4); i++, irqs++) {
                unsigned int hwirq = be32_to_cpup(irqs);
                unsigned int irq = irq_create_mapping(NULL, hwirq);
@@ -327,7 +343,19 @@ static int __init opal_init(void)
                if (rc)
                        pr_warning("opal: Error %d requesting irq %d"
                                   " (0x%x)\n", rc, irq, hwirq);
+                opal_irqs[i] = irq;
        }
        return 0;
 }
 subsys_initcall(opal_init);
+void opal_shutdown(void)
+{
+        unsigned int i;
+        for (i = 0; i < opal_irq_count; i++) {
+                if (opal_irqs[i])
+                        free_irq(opal_irqs[i], 0);
+                opal_irqs[i] = 0;
+        }
+}
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index 1da578b7c1bf..9c9d15e4cdf2 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -68,16 +68,6 @@ define_pe_printk_level(pe_err, KERN_ERR);
 define_pe_printk_level(pe_warn, KERN_WARNING);
 define_pe_printk_level(pe_info, KERN_INFO);
-static struct pci_dn *pnv_ioda_get_pdn(struct pci_dev *dev)
-{
-        struct device_node *np;
-        np = pci_device_to_OF_node(dev);
-        if (!np)
-                return NULL;
-        return PCI_DN(np);
-}
 static int pnv_ioda_alloc_pe(struct pnv_phb *phb)
 {
        unsigned long pe;
@@ -110,7 +100,7 @@ static struct pnv_ioda_pe *pnv_ioda_get_pe(struct pci_dev *dev)
 {
        struct pci_controller *hose = pci_bus_to_host(dev->bus);
        struct pnv_phb *phb = hose->private_data;
-        struct pci_dn *pdn = pnv_ioda_get_pdn(dev);
+        struct pci_dn *pdn = pci_get_pdn(dev);
        if (!pdn)
                return NULL;
@@ -173,7 +163,7 @@ static int pnv_ioda_configure_pe(struct pnv_phb *phb, struct pnv_ioda_pe *pe)
        /* Add to all parents PELT-V */
        while (parent) {
-                struct pci_dn *pdn = pnv_ioda_get_pdn(parent);
+                struct pci_dn *pdn = pci_get_pdn(parent);
                if (pdn && pdn->pe_number != IODA_INVALID_PE) {
                        rc = opal_pci_set_peltv(phb->opal_id, pdn->pe_number,
                                                pe->pe_number, OPAL_ADD_PE_TO_DOMAIN);
@@ -252,7 +242,7 @@ static struct pnv_ioda_pe *pnv_ioda_setup_dev_PE(struct pci_dev *dev)
 {
        struct pci_controller *hose = pci_bus_to_host(dev->bus);
        struct pnv_phb *phb = hose->private_data;
-        struct pci_dn *pdn = pnv_ioda_get_pdn(dev);
+        struct pci_dn *pdn = pci_get_pdn(dev);
        struct pnv_ioda_pe *pe;
        int pe_num;
@@ -323,7 +313,7 @@ static void pnv_ioda_setup_same_PE(struct pci_bus *bus, struct pnv_ioda_pe *pe)
        struct pci_dev *dev;
        list_for_each_entry(dev, &bus->devices, bus_list) {
-                struct pci_dn *pdn = pnv_ioda_get_pdn(dev);
+                struct pci_dn *pdn = pci_get_pdn(dev);
                if (pdn == NULL) {
                        pr_warn("%s: No device node associated with device !\n",
@@ -436,7 +426,7 @@ static void pnv_pci_ioda_setup_PEs(void)
 static void pnv_pci_ioda_dma_dev_setup(struct pnv_phb *phb, struct pci_dev *pdev)
 {
-        struct pci_dn *pdn = pnv_ioda_get_pdn(pdev);
+        struct pci_dn *pdn = pci_get_pdn(pdev);
        struct pnv_ioda_pe *pe;
        /*
@@ -768,6 +758,7 @@ static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb, struct pci_dev *dev,
                                  unsigned int is_64, struct msi_msg *msg)
 {
        struct pnv_ioda_pe *pe = pnv_ioda_get_pe(dev);
+        struct pci_dn *pdn = pci_get_pdn(dev);
        struct irq_data *idata;
        struct irq_chip *ichip;
        unsigned int xive_num = hwirq - phb->msi_base;
@@ -783,6 +774,10 @@ static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb, struct pci_dev *dev,
        if (pe->mve_number < 0)
                return -ENXIO;
+        /* Force 32-bit MSI on some broken devices */
+        if (pdn && pdn->force_32bit_msi)
+                is_64 = 0;
        /* Assign XIVE to PE */
        rc = opal_pci_set_xive_pe(phb->opal_id, pe->pe_number, xive_num);
        if (rc) {
@@ -1035,7 +1030,7 @@ static int pnv_pci_enable_device_hook(struct pci_dev *dev)
        if (!phb->initialized)
                return 0;
-        pdn = pnv_ioda_get_pdn(dev);
+        pdn = pci_get_pdn(dev);
        if (!pdn || pdn->pe_number == IODA_INVALID_PE)
                return -EINVAL;
@@ -1048,6 +1043,12 @@ static u32 pnv_ioda_bdfn_to_pe(struct pnv_phb *phb, struct pci_bus *bus,
        return phb->ioda.pe_rmap[(bus->number << 8) | devfn];
 }
+static void pnv_pci_ioda_shutdown(struct pnv_phb *phb)
+{
+        opal_pci_reset(phb->opal_id, OPAL_PCI_IODA_TABLE_RESET,
+                       OPAL_ASSERT_RESET);
+}
 void __init pnv_pci_init_ioda_phb(struct device_node *np, int ioda_type)
 {
        struct pci_controller *hose;
@@ -1178,6 +1179,9 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np, int ioda_type)
        /* Setup TCEs */
        phb->dma_dev_setup = pnv_pci_ioda_dma_dev_setup;
+        /* Setup shutdown function for kexec */
+        phb->shutdown = pnv_pci_ioda_shutdown;
        /* Setup MSI support */
        pnv_pci_init_ioda_msis(phb);
diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
index 55dfca844ddf..277343cc6a3d 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -47,6 +47,10 @@ static int pnv_msi_check_device(struct pci_dev* pdev, int nvec, int type)
 {
        struct pci_controller *hose = pci_bus_to_host(pdev->bus);
        struct pnv_phb *phb = hose->private_data;
+        struct pci_dn *pdn = pci_get_pdn(pdev);
+        if (pdn && pdn->force_32bit_msi && !phb->msi32_support)
+                return -ENODEV;
        return (phb && phb->msi_bmp.bitmap) ? 0 : -ENODEV;
 }
@@ -367,7 +371,7 @@ static void pnv_tce_free(struct iommu_table *tbl, long index, long npages)
        while (npages--)
                *(tcep++) = 0;
-        if (tbl->it_type & TCE_PCI_SWINV_CREATE)
+        if (tbl->it_type & TCE_PCI_SWINV_FREE)
                pnv_pci_ioda_tce_invalidate(tbl, tces, tcep - 1);
 }
@@ -450,6 +454,18 @@ static void pnv_pci_dma_dev_setup(struct pci_dev *pdev)
                pnv_pci_dma_fallback_setup(hose, pdev);
 }
+void pnv_pci_shutdown(void)
+{
+        struct pci_controller *hose;
+        list_for_each_entry(hose, &hose_list, list_node) {
+                struct pnv_phb *phb = hose->private_data;
+                if (phb && phb->shutdown)
+                        phb->shutdown(phb);
+        }
+}
 /* Fixup wrong class code in p7ioc and p8 root complex */
 static void pnv_p7ioc_rc_quirk(struct pci_dev *dev)
 {
diff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h
index 48dc4bb856a1..25d76c4df50b 100644
--- a/arch/powerpc/platforms/powernv/pci.h
+++ b/arch/powerpc/platforms/powernv/pci.h
@@ -86,6 +86,7 @@ struct pnv_phb {
        void (*dma_dev_setup)(struct pnv_phb *phb, struct pci_dev *pdev);
        void (*fixup_phb)(struct pci_controller *hose);
        u32 (*bdfn_to_pe)(struct pnv_phb *phb, struct pci_bus *bus, u32 devfn);
+        void (*shutdown)(struct pnv_phb *phb);
        union {
                struct {
@@ -158,4 +159,5 @@ extern void pnv_pci_init_ioda_hub(struct device_node *np);
 extern void pnv_pci_init_ioda2_phb(struct device_node *np);
 extern void pnv_pci_ioda_tce_invalidate(struct iommu_table *tbl,
                                        u64 *startp, u64 *endp);
 #endif /* __POWERNV_PCI_H */
diff --git a/arch/powerpc/platforms/powernv/powernv.h b/arch/powerpc/platforms/powernv/powernv.h
index 8a9df7f9667e..a1c6f83fc391 100644
--- a/arch/powerpc/platforms/powernv/powernv.h
+++ b/arch/powerpc/platforms/powernv/powernv.h
@@ -9,8 +9,10 @@ static inline void pnv_smp_init(void) { }
 #ifdef CONFIG_PCI
 extern void pnv_pci_init(void);
+extern void pnv_pci_shutdown(void);
 #else
 static inline void pnv_pci_init(void) { }
+static inline void pnv_pci_shutdown(void) { }
 #endif
 #endif /* _POWERNV_H */
diff --git a/arch/powerpc/platforms/powernv/setup.c b/arch/powerpc/platforms/powernv/setup.c
index db1ad1c8f68f..d4459bfc92f7 100644
--- a/arch/powerpc/platforms/powernv/setup.c
+++ b/arch/powerpc/platforms/powernv/setup.c
@@ -78,7 +78,9 @@ static void pnv_show_cpuinfo(struct seq_file *m)
        if (root)
                model = of_get_property(root, "model", NULL);
        seq_printf(m, "machine\t\t: PowerNV %s\n", model);
-        if (firmware_has_feature(FW_FEATURE_OPALv2))
+        if (firmware_has_feature(FW_FEATURE_OPALv3))
+                seq_printf(m, "firmware\t: OPAL v3\n");
+        else if (firmware_has_feature(FW_FEATURE_OPALv2))
                seq_printf(m, "firmware\t: OPAL v2\n");
        else if (firmware_has_feature(FW_FEATURE_OPAL))
                seq_printf(m, "firmware\t: OPAL v1\n");
@@ -126,6 +128,17 @@ static void pnv_progress(char *s, unsigned short hex)
 {
 }
+static void pnv_shutdown(void)
+{
+        /* Let the PCI code clear up IODA tables */
+        pnv_pci_shutdown();
+        /* And unregister all OPAL interrupts so they don't fire
+         * up while we kexec
+         */
+        opal_shutdown();
+}
 #ifdef CONFIG_KEXEC
 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
 {
@@ -187,6 +200,7 @@ define_machine(powernv) {
        .init_IRQ               = pnv_init_IRQ,
        .show_cpuinfo           = pnv_show_cpuinfo,
        .progress               = pnv_progress,
+        .machine_shutdown       = pnv_shutdown,
        .power_save             = power7_idle,
        .calibrate_decr         = generic_calibrate_decr,
 #ifdef CONFIG_KEXEC
diff --git a/arch/powerpc/platforms/powernv/smp.c b/arch/powerpc/platforms/powernv/smp.c
index 6a3ecca5b725..88c9459c3e07 100644
--- a/arch/powerpc/platforms/powernv/smp.c
+++ b/arch/powerpc/platforms/powernv/smp.c
@@ -71,18 +71,68 @@ int pnv_smp_kick_cpu(int nr)
        BUG_ON(nr < 0 || nr >= NR_CPUS);
-        /* On OPAL v2 the CPU are still spinning inside OPAL itself,
+        /*
-         * get them back now
+         * If we already started or OPALv2 is not supported, we just
+         * kick the CPU via the PACA
         */
-        if (!paca[nr].cpu_start && firmware_has_feature(FW_FEATURE_OPALv2)) {
+        if (paca[nr].cpu_start || !firmware_has_feature(FW_FEATURE_OPALv2))
-                pr_devel("OPAL: Starting CPU %d (HW 0x%x)...\n", nr, pcpu);
+                goto kick;
-                rc = opal_start_cpu(pcpu, start_here);
+        /*
+         * At this point, the CPU can either be spinning on the way in
+         * from kexec or be inside OPAL waiting to be started for the
+         * first time. OPAL v3 allows us to query OPAL to know if it
+         * has the CPUs, so we do that
+         */
+        if (firmware_has_feature(FW_FEATURE_OPALv3)) {
+                uint8_t status;
+                rc = opal_query_cpu_status(pcpu, &status);
                if (rc != OPAL_SUCCESS) {
-                        pr_warn("OPAL Error %ld starting CPU %d\n",
+                        pr_warn("OPAL Error %ld querying CPU %d state\n",
                                rc, nr);
                        return -ENODEV;
                }
+                /*
+                 * Already started, just kick it, probably coming from
+                 * kexec and spinning
+                 */
+                if (status == OPAL_THREAD_STARTED)
+                        goto kick;
+                /*
+                 * Available/inactive, let's kick it
+                 */
+                if (status == OPAL_THREAD_INACTIVE) {
+                        pr_devel("OPAL: Starting CPU %d (HW 0x%x)...\n",
+                                 nr, pcpu);
+                        rc = opal_start_cpu(pcpu, start_here);
+                        if (rc != OPAL_SUCCESS) {
+                                pr_warn("OPAL Error %ld starting CPU %d\n",
+                                        rc, nr);
+                                return -ENODEV;
+                        }
+                } else {
+                        /*
+                         * An unavailable CPU (or any other unknown status)
+                         * shouldn't be started. It should also
+                         * not be in the possible map but currently it can
+                         * happen
+                         */
+                        pr_devel("OPAL: CPU %d (HW 0x%x) is unavailable"
+                                 " (status %d)...\n", nr, pcpu, status);
+                        return -ENODEV;
+                }
+        } else {
+                /*
+                 * On OPAL v2, we just kick it and hope for the best,
+                 * we must not test the error from opal_start_cpu() or
+                 * we would fail to get CPUs from kexec.
+                 */
+                opal_start_cpu(pcpu, start_here);
        }
+ kick:
        return smp_generic_kick_cpu(nr);
 }
diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig
index 9a0941bc4d31..023b288f895b 100644
--- a/arch/powerpc/platforms/pseries/Kconfig
+++ b/arch/powerpc/platforms/pseries/Kconfig
@@ -18,6 +18,7 @@ config PPC_PSERIES
        select PPC_PCI_CHOICE if EXPERT
        select ZLIB_DEFLATE
        select PPC_DOORBELL
+        select HAVE_CONTEXT_TRACKING
        default y
 config PPC_SPLPAR
diff --git a/arch/powerpc/platforms/pseries/msi.c b/arch/powerpc/platforms/pseries/msi.c
index 420524e6f8c9..6d2f0abce6fa 100644
--- a/arch/powerpc/platforms/pseries/msi.c
+++ b/arch/powerpc/platforms/pseries/msi.c
@@ -26,26 +26,6 @@ static int query_token, change_token;
 #define RTAS_CHANGE_MSIX_FN     4
 #define RTAS_CHANGE_32MSI_FN    5
-static struct pci_dn *get_pdn(struct pci_dev *pdev)
-{
-        struct device_node *dn;
-        struct pci_dn *pdn;
-        dn = pci_device_to_OF_node(pdev);
-        if (!dn) {
-                dev_dbg(&pdev->dev, "rtas_msi: No OF device node\n");
-                return NULL;
-        }
-        pdn = PCI_DN(dn);
-        if (!pdn) {
-                dev_dbg(&pdev->dev, "rtas_msi: No PCI DN\n");
-                return NULL;
-        }
-        return pdn;
-}
 /* RTAS Helpers */
 static int rtas_change_msi(struct pci_dn *pdn, u32 func, u32 num_irqs)
@@ -91,7 +71,7 @@ static void rtas_disable_msi(struct pci_dev *pdev)
 {
        struct pci_dn *pdn;
-        pdn = get_pdn(pdev);
+        pdn = pci_get_pdn(pdev);
        if (!pdn)
                return;
@@ -152,7 +132,7 @@ static int check_req(struct pci_dev *pdev, int nvec, char *prop_name)
        struct pci_dn *pdn;
        const u32 *req_msi;
-        pdn = get_pdn(pdev);
+        pdn = pci_get_pdn(pdev);
        if (!pdn)
                return -ENODEV;
@@ -394,6 +374,23 @@ static int check_msix_entries(struct pci_dev *pdev)
        return 0;
 }
+static void rtas_hack_32bit_msi_gen2(struct pci_dev *pdev)
+{
+        u32 addr_hi, addr_lo;
+        /*
+         * We should only get in here for IODA1 configs. This is based on the
+         * fact that we using RTAS for MSIs, we don't have the 32 bit MSI RTAS
+         * support, and we are in a PCIe Gen2 slot.
+         */
+        dev_info(&pdev->dev,
+                 "rtas_msi: No 32 bit MSI firmware support, forcing 32 bit MSI\n");
+        pci_read_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_HI, &addr_hi);
+        addr_lo = 0xffff0000 | ((addr_hi >> (48 - 32)) << 4);
+        pci_write_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_LO, addr_lo);
+        pci_write_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_HI, 0);
+}
 static int rtas_setup_msi_irqs(struct pci_dev *pdev, int nvec_in, int type)
 {
        struct pci_dn *pdn;
@@ -401,8 +398,9 @@ static int rtas_setup_msi_irqs(struct pci_dev *pdev, int nvec_in, int type)
        struct msi_desc *entry;
        struct msi_msg msg;
        int nvec = nvec_in;
+        int use_32bit_msi_hack = 0;
-        pdn = get_pdn(pdev);
+        pdn = pci_get_pdn(pdev);
        if (!pdn)
                return -ENODEV;
@@ -428,15 +426,31 @@ static int rtas_setup_msi_irqs(struct pci_dev *pdev, int nvec_in, int type)
         */
 again:
        if (type == PCI_CAP_ID_MSI) {
-                if (pdn->force_32bit_msi)
+                if (pdn->force_32bit_msi) {
                        rc = rtas_change_msi(pdn, RTAS_CHANGE_32MSI_FN, nvec);
-                else
+                        if (rc < 0) {
+                                /*
+                                 * We only want to run the 32 bit MSI hack below if
+                                 * the max bus speed is Gen2 speed
+                                 */
+                                if (pdev->bus->max_bus_speed != PCIE_SPEED_5_0GT)
+                                        return rc;
+                                use_32bit_msi_hack = 1;
+                        }
+                } else
+                        rc = -1;
+                if (rc < 0)
                        rc = rtas_change_msi(pdn, RTAS_CHANGE_MSI_FN, nvec);
-                if (rc < 0 && !pdn->force_32bit_msi) {
+                if (rc < 0) {
                        pr_debug("rtas_msi: trying the old firmware call.\n");
                        rc = rtas_change_msi(pdn, RTAS_CHANGE_FN, nvec);
                }
+                if (use_32bit_msi_hack && rc > 0)
+                        rtas_hack_32bit_msi_gen2(pdev);
        } else
                rc = rtas_change_msi(pdn, RTAS_CHANGE_MSIX_FN, nvec);
@@ -518,12 +532,3 @@ static int rtas_msi_init(void)
 }
 arch_initcall(rtas_msi_init);
-static void quirk_radeon(struct pci_dev *dev)
-{
-        struct pci_dn *pdn = get_pdn(dev);
-        if (pdn)
-                pdn->force_32bit_msi = 1;
-}
-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x68f2, quirk_radeon);
-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0xaa68, quirk_radeon);
diff --git a/arch/powerpc/platforms/pseries/suspend.c b/arch/powerpc/platforms/pseries/suspend.c
index 47226e04126d..5f997e79d570 100644
--- a/arch/powerpc/platforms/pseries/suspend.c
+++ b/arch/powerpc/platforms/pseries/suspend.c
@@ -16,6 +16,7 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  */
+#include <linux/cpu.h>
 #include <linux/delay.h>
 #include <linux/suspend.h>
 #include <linux/stat.h>
@@ -126,11 +127,15 @@ static ssize_t store_hibernate(struct device *dev,
                               struct device_attribute *attr,
                               const char *buf, size_t count)
 {
+        cpumask_var_t offline_mask;
        int rc;
        if (!capable(CAP_SYS_ADMIN))
                return -EPERM;
+        if (!alloc_cpumask_var(&offline_mask, GFP_TEMPORARY))
+                return -ENOMEM;
        stream_id = simple_strtoul(buf, NULL, 16);
        do {
@@ -140,15 +145,32 @@ static ssize_t store_hibernate(struct device *dev,
        } while (rc == -EAGAIN);
        if (!rc) {
+                /* All present CPUs must be online */
+                cpumask_andnot(offline_mask, cpu_present_mask,
+                                cpu_online_mask);
+                rc = rtas_online_cpus_mask(offline_mask);
+                if (rc) {
+                        pr_err("%s: Could not bring present CPUs online.\n",
+                                        __func__);
+                        goto out;
+                }
                stop_topology_update();
                rc = pm_suspend(PM_SUSPEND_MEM);
                start_topology_update();
+                /* Take down CPUs not online prior to suspend */
+                if (!rtas_offline_cpus_mask(offline_mask))
+                        pr_warn("%s: Could not restore CPUs to offline "
+                                        "state.\n", __func__);
        }
        stream_id = 0;
        if (!rc)
                rc = count;
+out:
+        free_cpumask_var(offline_mask);
        return rc;
 }
diff --git a/arch/powerpc/platforms/wsp/ics.c b/arch/powerpc/platforms/wsp/ics.c
index 97fe82ee8633..2d3b1dd9571d 100644
--- a/arch/powerpc/platforms/wsp/ics.c
+++ b/arch/powerpc/platforms/wsp/ics.c
@@ -361,7 +361,7 @@ static int wsp_chip_set_affinity(struct irq_data *d,
        xive = xive_set_server(xive, get_irq_server(ics, hw_irq));
        wsp_ics_set_xive(ics, hw_irq, xive);
-        return 0;
+        return IRQ_SET_MASK_OK;
 }
 static struct irq_chip wsp_irq_chip = {
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index b0a518e97599..99464a7bdb3b 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -64,6 +64,8 @@ endif
 obj-$(CONFIG_PPC_SCOM)          += scom.o
+obj-$(CONFIG_PPC_EARLY_DEBUG_MEMCONS)   += udbg_memcons.o
 subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
 obj-$(CONFIG_PPC_XICS)          += xics/
diff --git a/arch/powerpc/sysdev/ehv_pic.c b/arch/powerpc/sysdev/ehv_pic.c
index 6e0e1005227f..9cd0e60716fe 100644
--- a/arch/powerpc/sysdev/ehv_pic.c
+++ b/arch/powerpc/sysdev/ehv_pic.c
@@ -81,7 +81,7 @@ int ehv_pic_set_affinity(struct irq_data *d, const struct cpumask *dest,
        ev_int_set_config(src, config, prio, cpuid);
        spin_unlock_irqrestore(&ehv_pic_lock, flags);
-        return 0;
+        return IRQ_SET_MASK_OK;
 }
 static unsigned int ehv_pic_type_to_vecpri(unsigned int type)
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index ee21b5e71aec..0a13ecb270c7 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -836,7 +836,7 @@ int mpic_set_affinity(struct irq_data *d, const struct cpumask *cpumask,
                               mpic_physmask(mask));
        }
-        return 0;
+        return IRQ_SET_MASK_OK;
 }
 static unsigned int mpic_type_to_vecpri(struct mpic *mpic, unsigned int type)
diff --git a/arch/powerpc/sysdev/udbg_memcons.c b/arch/powerpc/sysdev/udbg_memcons.c
new file mode 100644
index 000000000000..ce5a7b489e4b
--- /dev/null
+++ b/arch/powerpc/sysdev/udbg_memcons.c
@@ -0,0 +1,105 @@
+/*
+ * A udbg backend which logs messages and reads input from in memory
+ * buffers.
+ *
+ * The console output can be read from memcons_output which is a
+ * circular buffer whose next write position is stored in memcons.output_pos.
+ *
+ * Input may be passed by writing into the memcons_input buffer when it is
+ * empty. The input buffer is empty when both input_pos == input_start and
+ * *input_start == '\0'.
+ *
+ * Copyright (C) 2003-2005 Anton Blanchard and Milton Miller, IBM Corp
+ * Copyright (C) 2013 Alistair Popple, IBM Corp
+ *
+ *      This program is free software; you can redistribute it and/or
+ *      modify it under the terms of the GNU General Public License
+ *      as published by the Free Software Foundation; either version
+ *      2 of the License, or (at your option) any later version.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <asm/barrier.h>
+#include <asm/page.h>
+#include <asm/processor.h>
+#include <asm/udbg.h>
+struct memcons {
+        char *output_start;
+        char *output_pos;
+        char *output_end;
+        char *input_start;
+        char *input_pos;
+        char *input_end;
+};
+static char memcons_output[CONFIG_PPC_MEMCONS_OUTPUT_SIZE];
+static char memcons_input[CONFIG_PPC_MEMCONS_INPUT_SIZE];
+struct memcons memcons = {
+        .output_start = memcons_output,
+        .output_pos = memcons_output,
+        .output_end = &memcons_output[CONFIG_PPC_MEMCONS_OUTPUT_SIZE],
+        .input_start = memcons_input,
+        .input_pos = memcons_input,
+        .input_end = &memcons_input[CONFIG_PPC_MEMCONS_INPUT_SIZE],
+};
+void memcons_putc(char c)
+{
+        char *new_output_pos;
+        *memcons.output_pos = c;
+        wmb();
+        new_output_pos = memcons.output_pos + 1;
+        if (new_output_pos >= memcons.output_end)
+                new_output_pos = memcons.output_start;
+        memcons.output_pos = new_output_pos;
+}
+int memcons_getc_poll(void)
+{
+        char c;
+        char *new_input_pos;
+        if (*memcons.input_pos) {
+                c = *memcons.input_pos;
+                new_input_pos = memcons.input_pos + 1;
+                if (new_input_pos >= memcons.input_end)
+                        new_input_pos = memcons.input_start;
+                else if (*new_input_pos == '\0')
+                        new_input_pos = memcons.input_start;
+                *memcons.input_pos = '\0';
+                wmb();
+                memcons.input_pos = new_input_pos;
+                return c;
+        }
+        return -1;
+}
+int memcons_getc(void)
+{
+        int c;
+        while (1) {
+                c = memcons_getc_poll();
+                if (c == -1)
+                        cpu_relax();
+                else
+                        break;
+        }
+        return c;
+}
+void udbg_init_memcons(void)
+{
+        udbg_putc = memcons_putc;
+        udbg_getc = memcons_getc;
+        udbg_getc_poll = memcons_getc_poll;
+}
diff --git a/arch/powerpc/sysdev/xics/ics-opal.c b/arch/powerpc/sysdev/xics/ics-opal.c
index f7e8609df0d5..39d72212655e 100644
--- a/arch/powerpc/sysdev/xics/ics-opal.c
+++ b/arch/powerpc/sysdev/xics/ics-opal.c
@@ -148,7 +148,7 @@ static int ics_opal_set_affinity(struct irq_data *d,
                       __func__, d->irq, hw_irq, server, rc);
                return -1;
        }
-        return 0;
+        return IRQ_SET_MASK_OK;
 }
 static struct irq_chip ics_opal_irq_chip = {
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 2c9789da0e24..da183c5a103c 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -98,7 +98,6 @@ config S390
        select CLONE_BACKWARDS2
        select GENERIC_CLOCKEVENTS
        select GENERIC_CPU_DEVICES if !SMP
-        select GENERIC_KERNEL_THREAD
        select GENERIC_SMP_IDLE_THREAD
        select GENERIC_TIME_VSYSCALL_OLD
        select HAVE_ALIGNED_STRUCT_PAGE if SLUB
diff --git a/arch/s390/include/asm/ftrace.h b/arch/s390/include/asm/ftrace.h
index b7931faaef6d..bf246dae1367 100644
--- a/arch/s390/include/asm/ftrace.h
+++ b/arch/s390/include/asm/ftrace.h
@@ -9,11 +9,6 @@ struct dyn_arch_ftrace { };
 #define MCOUNT_ADDR ((long)_mcount)
-#ifdef CONFIG_64BIT
-#define MCOUNT_INSN_SIZE  12
-#else
-#define MCOUNT_INSN_SIZE  20
-#endif
 static inline unsigned long ftrace_call_adjust(unsigned long addr)
 {
@@ -21,4 +16,11 @@ static inline unsigned long ftrace_call_adjust(unsigned long addr)
 }
 #endif /* __ASSEMBLY__ */
+#ifdef CONFIG_64BIT
+#define MCOUNT_INSN_SIZE  12
+#else
+#define MCOUNT_INSN_SIZE  22
+#endif
 #endif /* _ASM_S390_FTRACE_H */
diff --git a/arch/s390/include/asm/page.h b/arch/s390/include/asm/page.h
index 75ce9b065f9f..5d64fb7619cc 100644
--- a/arch/s390/include/asm/page.h
+++ b/arch/s390/include/asm/page.h
@@ -32,7 +32,7 @@
 void storage_key_init_range(unsigned long start, unsigned long end);
-static unsigned long pfmf(unsigned long function, unsigned long address)
+static inline unsigned long pfmf(unsigned long function, unsigned long address)
 {
        asm volatile(
                "       .insn   rre,0xb9af0000,%[function],%[address]"
@@ -44,17 +44,13 @@ static unsigned long pfmf(unsigned long function, unsigned long address)
 static inline void clear_page(void *page)
 {
-        if (MACHINE_HAS_PFMF) {
+        register unsigned long reg1 asm ("1") = 0;
-                pfmf(0x10000, (unsigned long)page);
+        register void *reg2 asm ("2") = page;
-        } else {
+        register unsigned long reg3 asm ("3") = 4096;
-                register unsigned long reg1 asm ("1") = 0;
+        asm volatile(
-                register void *reg2 asm ("2") = page;
+                "       mvcl    2,0"
-                register unsigned long reg3 asm ("3") = 4096;
+                : "+d" (reg2), "+d" (reg3) : "d" (reg1)
-                asm volatile(
+                : "memory", "cc");
-                        "       mvcl    2,0"
-                        : "+d" (reg2), "+d" (reg3) : "d" (reg1)
-                        : "memory", "cc");
-        }
 }
 static inline void copy_page(void *to, void *from)
diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h
index 4105b8221fdd..0f0de30e3e3f 100644
--- a/arch/s390/include/asm/pgtable.h
+++ b/arch/s390/include/asm/pgtable.h
@@ -306,7 +306,7 @@ extern unsigned long MODULES_END;
 #define RCP_HC_BIT      0x00200000UL
 #define RCP_GR_BIT      0x00040000UL
 #define RCP_GC_BIT      0x00020000UL
-#define RCP_IN_BIT      0x00008000UL    /* IPTE notify bit */
+#define RCP_IN_BIT      0x00002000UL    /* IPTE notify bit */
 /* User dirty / referenced bit for KVM's migration feature */
 #define KVM_UR_BIT      0x00008000UL
@@ -374,7 +374,7 @@ extern unsigned long MODULES_END;
 #define RCP_HC_BIT      0x0020000000000000UL
 #define RCP_GR_BIT      0x0004000000000000UL
 #define RCP_GC_BIT      0x0002000000000000UL
-#define RCP_IN_BIT      0x0000800000000000UL    /* IPTE notify bit */
+#define RCP_IN_BIT      0x0000200000000000UL    /* IPTE notify bit */
 /* User dirty / referenced bit for KVM's migration feature */
 #define KVM_UR_BIT      0x0000800000000000UL
diff --git a/arch/s390/kernel/dis.c b/arch/s390/kernel/dis.c
index 7f4a4a8c847c..be87d3e05a5b 100644
--- a/arch/s390/kernel/dis.c
+++ b/arch/s390/kernel/dis.c
@@ -1862,6 +1862,8 @@ void print_fn_code(unsigned char *code, unsigned long len)
        while (len) {
                ptr = buffer;
                opsize = insn_length(*code);
+                if (opsize > len)
+                        break;
                ptr += sprintf(ptr, "%p: ", code);
                for (i = 0; i < opsize; i++)
                        ptr += sprintf(ptr, "%02x", code[i]);
diff --git a/arch/s390/kernel/ftrace.c b/arch/s390/kernel/ftrace.c
index 78bdf0e5dff7..e3043aef87a9 100644
--- a/arch/s390/kernel/ftrace.c
+++ b/arch/s390/kernel/ftrace.c
@@ -16,12 +16,6 @@
 #include <trace/syscall.h>
 #include <asm/asm-offsets.h>
-#ifdef CONFIG_64BIT
-#define MCOUNT_OFFSET_RET 12
-#else
-#define MCOUNT_OFFSET_RET 22
-#endif
 #ifdef CONFIG_DYNAMIC_FTRACE
 void ftrace_disable_code(void);
@@ -155,9 +149,10 @@ unsigned long __kprobes prepare_ftrace_return(unsigned long parent,
        if (unlikely(atomic_read(&current->tracing_graph_pause)))
                goto out;
+        ip = (ip & PSW_ADDR_INSN) - MCOUNT_INSN_SIZE;
        if (ftrace_push_return_trace(parent, ip, &trace.depth, 0) == -EBUSY)
                goto out;
-        trace.func = (ip & PSW_ADDR_INSN) - MCOUNT_OFFSET_RET;
+        trace.func = ip;
        /* Only trace if the calling function expects to. */
        if (!ftrace_graph_entry(&trace)) {
                current->curr_ret_stack--;
diff --git a/arch/s390/kernel/mcount.S b/arch/s390/kernel/mcount.S
index 4567ce20d900..08dcf21cb8df 100644
--- a/arch/s390/kernel/mcount.S
+++ b/arch/s390/kernel/mcount.S
@@ -7,6 +7,7 @@
 #include <linux/linkage.h>
 #include <asm/asm-offsets.h>
+#include <asm/ftrace.h>
        .section .kprobes.text, "ax"
@@ -33,6 +34,7 @@ ENTRY(ftrace_caller)
        la      %r2,0(%r14)
        st      %r0,__SF_BACKCHAIN(%r15)
        la      %r3,0(%r3)
+        ahi     %r2,-MCOUNT_INSN_SIZE
        l       %r14,0b-0b(%r1)
        l       %r14,0(%r14)
        basr    %r14,%r14
diff --git a/arch/s390/kernel/mcount64.S b/arch/s390/kernel/mcount64.S
index 11332193db30..1c52eae3396a 100644
--- a/arch/s390/kernel/mcount64.S
+++ b/arch/s390/kernel/mcount64.S
@@ -7,6 +7,7 @@
 #include <linux/linkage.h>
 #include <asm/asm-offsets.h>
+#include <asm/ftrace.h>
        .section .kprobes.text, "ax"
@@ -29,6 +30,7 @@ ENTRY(ftrace_caller)
        stg     %r1,__SF_BACKCHAIN(%r15)
        lgr     %r2,%r14
        lg      %r3,168(%r15)
+        aghi    %r2,-MCOUNT_INSN_SIZE
        larl    %r14,ftrace_trace_function
        lg      %r14,0(%r14)
        basr    %r14,%r14
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c
index 8074cb4b7cbf..05674b669001 100644
--- a/arch/s390/kernel/smp.c
+++ b/arch/s390/kernel/smp.c
@@ -645,7 +645,7 @@ static int __cpuinit __smp_rescan_cpus(struct sclp_cpu_info *info,
                        continue;
                pcpu = pcpu_devices + cpu;
                pcpu->address = info->cpu[i].address;
-                pcpu->state = (cpu >= info->configured) ?
+                pcpu->state = (i >= info->configured) ?
                        CPU_STATE_STANDBY : CPU_STATE_CONFIGURED;
                smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
                set_cpu_present(cpu, true);
diff --git a/arch/s390/mm/pgtable.c b/arch/s390/mm/pgtable.c
index 7805ddca833d..18dc417aaf79 100644
--- a/arch/s390/mm/pgtable.c
+++ b/arch/s390/mm/pgtable.c
@@ -677,8 +677,7 @@ int gmap_ipte_notify(struct gmap *gmap, unsigned long start, unsigned long len)
                        break;
                }
                /* Get the page mapped */
-                if (get_user_pages(current, gmap->mm, addr, 1, 1, 0,
+                if (fixup_user_fault(current, gmap->mm, addr, FAULT_FLAG_WRITE)) {
-                                   NULL, NULL) != 1) {
                        rc = -EFAULT;
                        break;
                }
diff --git a/arch/score/mm/init.c b/arch/score/mm/init.c
index d8f988a37d16..0940682ab38b 100644
--- a/arch/score/mm/init.c
+++ b/arch/score/mm/init.c
@@ -41,8 +41,6 @@
 unsigned long empty_zero_page;
 EXPORT_SYMBOL_GPL(empty_zero_page);
-static struct kcore_list kcore_mem, kcore_vmalloc;
 static void setup_zero_page(void)
 {
        struct page *page;
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 6a154a91c7e7..685692c94f05 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -108,7 +108,6 @@ config X86
        select GENERIC_CLOCKEVENTS_BROADCAST if X86_64 || (X86_32 && X86_LOCAL_APIC)
        select GENERIC_TIME_VSYSCALL if X86_64
        select KTIME_SCALAR if X86_32
-        select ALWAYS_USE_PERSISTENT_CLOCK
        select GENERIC_STRNCPY_FROM_USER
        select GENERIC_STRNLEN_USER
        select HAVE_CONTEXT_TRACKING if X86_64
diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c
index dab95a85f7f8..55b67614ed94 100644
--- a/arch/x86/kernel/head64.c
+++ b/arch/x86/kernel/head64.c
@@ -34,7 +34,7 @@
 extern pgd_t early_level4_pgt[PTRS_PER_PGD];
 extern pmd_t early_dynamic_pgts[EARLY_DYNAMIC_PAGE_TABLES][PTRS_PER_PMD];
 static unsigned int __initdata next_early_pgt = 2;
-pmdval_t __initdata early_pmd_flags = __PAGE_KERNEL_LARGE & ~(_PAGE_GLOBAL | _PAGE_NX);
+pmdval_t early_pmd_flags = __PAGE_KERNEL_LARGE & ~(_PAGE_GLOBAL | _PAGE_NX);
 /* Wipe all early page tables except for the kernel symbol map */
 static void __init reset_early_page_tables(void)
diff --git a/arch/x86/kernel/microcode_intel_early.c b/arch/x86/kernel/microcode_intel_early.c
index d893e8ed8ac9..2e9e12871c2b 100644
--- a/arch/x86/kernel/microcode_intel_early.c
+++ b/arch/x86/kernel/microcode_intel_early.c
@@ -487,6 +487,7 @@ static inline void show_saved_mc(void)
 #endif
 #if defined(CONFIG_MICROCODE_INTEL_EARLY) && defined(CONFIG_HOTPLUG_CPU)
+static DEFINE_MUTEX(x86_cpu_microcode_mutex);
 /*
 * Save this mc into mc_saved_data. So it will be loaded early when a CPU is
 * hot added or resumes.
@@ -507,7 +508,7 @@ int save_mc_for_early(u8 *mc)
         * Hold hotplug lock so mc_saved_data is not accessed by a CPU in
         * hotplug.
         */
-        cpu_hotplug_driver_lock();
+        mutex_lock(&x86_cpu_microcode_mutex);
        mc_saved_count_init = mc_saved_data.mc_saved_count;
        mc_saved_count = mc_saved_data.mc_saved_count;
@@ -544,7 +545,7 @@ int save_mc_for_early(u8 *mc)
        }
 out:
-        cpu_hotplug_driver_unlock();
+        mutex_unlock(&x86_cpu_microcode_mutex);
        return ret;
 }
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 607af0d4d5ef..4e7a37ff03ab 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -312,6 +312,8 @@ void arch_cpu_idle(void)
 {
        if (cpuidle_idle_call())
                x86_idle();
+        else
+                local_irq_enable();
 }
 /*
@@ -368,9 +370,6 @@ void amd_e400_remove_cpu(int cpu)
 */
 static void amd_e400_idle(void)
 {
-        if (need_resched())
-                return;
        if (!amd_e400_c1e_detected) {
                u32 lo, hi;
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index fdc5dca14fb3..eaac1743def7 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -359,7 +359,17 @@ unsigned long __init_refok init_memory_mapping(unsigned long start,
 }
 /*
- * would have hole in the middle or ends, and only ram parts will be mapped.
+ * We need to iterate through the E820 memory map and create direct mappings
+ * for only E820_RAM and E820_KERN_RESERVED regions. We cannot simply
+ * create direct mappings for all pfns from [0 to max_low_pfn) and
+ * [4GB to max_pfn) because of possible memory holes in high addresses
+ * that cannot be marked as UC by fixed/variable range MTRRs.
+ * Depending on the alignment of E820 ranges, this may possibly result
+ * in using smaller size (i.e. 4K instead of 2M or 1G) page tables.
+ *
+ * init_mem_mapping() calls init_range_memory_mapping() with big range.
+ * That range would have hole in the middle or ends, and only ram parts
+ * will be mapped in init_range_memory_mapping().
 */
 static unsigned long __init init_range_memory_mapping(
                                           unsigned long r_start,
@@ -419,6 +429,13 @@ void __init init_mem_mapping(void)
        max_pfn_mapped = 0; /* will get exact value next */
        min_pfn_mapped = real_end >> PAGE_SHIFT;
        last_start = start = real_end;
+        /*
+         * We start from the top (end of memory) and go to the bottom.
+         * The memblock_find_in_range() gets us a block of RAM from the
+         * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
+         * for page table.
+         */
        while (last_start > ISA_END_ADDRESS) {
                if (last_start > step_size) {
                        start = round_down(last_start - 1, step_size);
diff --git a/arch/x86/pci/mrst.c b/arch/x86/pci/mrst.c
index 0e0fabf17342..6eb18c42a28a 100644
--- a/arch/x86/pci/mrst.c
+++ b/arch/x86/pci/mrst.c
@@ -141,11 +141,6 @@ static int pci_device_update_fixed(struct pci_bus *bus, unsigned int devfn,
 */
 static bool type1_access_ok(unsigned int bus, unsigned int devfn, int reg)
 {
-        if (bus == 0 && (devfn == PCI_DEVFN(2, 0)
-                                || devfn == PCI_DEVFN(0, 0)
-                                || devfn == PCI_DEVFN(3, 0)))
-                return 1;
        /* This is a workaround for A0 LNC bug where PCI status register does
         * not have new CAP bit set. can not be written by SW either.
         *
@@ -155,7 +150,10 @@ static bool type1_access_ok(unsigned int bus, unsigned int devfn, int reg)
         */
        if (reg >= 0x100 || reg == PCI_STATUS || reg == PCI_HEADER_TYPE)
                return 0;
+        if (bus == 0 && (devfn == PCI_DEVFN(2, 0)
+                                || devfn == PCI_DEVFN(0, 0)
+                                || devfn == PCI_DEVFN(3, 0)))
+                return 1;
        return 0; /* langwell on others */
 }