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-rw-r--r--arch/arm/boot/dts/am335x-bone-common.dtsi1
-rw-r--r--arch/arm/boot/dts/am437x-idk-evm.dts25
-rw-r--r--arch/arm/boot/dts/am57xx-beagle-x15.dts8
-rw-r--r--arch/arm/boot/dts/dm8168-evm.dts25
-rw-r--r--arch/arm/boot/dts/dm816x.dtsi34
-rw-r--r--arch/arm/boot/dts/dra7-evm.dts8
-rw-r--r--arch/arm/boot/dts/dra7.dtsi8
-rw-r--r--arch/arm/boot/dts/dra72-evm.dts8
-rw-r--r--arch/arm/boot/dts/exynos3250.dtsi2
-rw-r--r--arch/arm/boot/dts/exynos4-cpu-thermal.dtsi52
-rw-r--r--arch/arm/boot/dts/exynos4.dtsi45
-rw-r--r--arch/arm/boot/dts/exynos4210-trats.dts19
-rw-r--r--arch/arm/boot/dts/exynos4210-universal_c210.dts57
-rw-r--r--arch/arm/boot/dts/exynos4210.dtsi38
-rw-r--r--arch/arm/boot/dts/exynos4212.dtsi5
-rw-r--r--arch/arm/boot/dts/exynos4412-odroid-common.dtsi64
-rw-r--r--arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi24
-rw-r--r--arch/arm/boot/dts/exynos4412-trats2.dts15
-rw-r--r--arch/arm/boot/dts/exynos4412.dtsi5
-rw-r--r--arch/arm/boot/dts/exynos4x12.dtsi12
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi44
-rw-r--r--arch/arm/boot/dts/exynos5420-trip-points.dtsi35
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi33
-rw-r--r--arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi24
-rw-r--r--arch/arm/boot/dts/exynos5440-trip-points.dtsi25
-rw-r--r--arch/arm/boot/dts/exynos5440.dtsi18
-rw-r--r--arch/arm/boot/dts/omap2.dtsi4
-rw-r--r--arch/arm/boot/dts/omap3-n900.dts9
-rw-r--r--arch/arm/boot/dts/omap3.dtsi4
-rw-r--r--arch/arm/boot/dts/omap4.dtsi4
-rw-r--r--arch/arm/boot/dts/omap5.dtsi8
-rw-r--r--arch/arm/boot/dts/socfpga.dtsi6
-rw-r--r--arch/arm/configs/multi_v7_defconfig84
-rw-r--r--arch/arm/configs/omap2plus_defconfig4
-rw-r--r--arch/arm/configs/sunxi_defconfig1
-rw-r--r--arch/arm/mach-asm9260/Kconfig2
-rw-r--r--arch/arm/mach-exynos/platsmp.c3
-rw-r--r--arch/arm/mach-exynos/pm_domains.c28
-rw-r--r--arch/arm/mach-exynos/suspend.c4
-rw-r--r--arch/arm/mach-socfpga/core.h2
-rw-r--r--arch/arm/mach-socfpga/socfpga.c5
-rw-r--r--arch/arm64/boot/dts/arm/foundation-v8.dts8
-rw-r--r--arch/arm64/boot/dts/arm/juno.dts14
-rw-r--r--arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts8
-rw-r--r--arch/arm64/crypto/Makefile2
-rw-r--r--arch/arm64/include/asm/assembler.h5
-rw-r--r--arch/arm64/include/asm/cpuidle.h2
-rw-r--r--arch/arm64/include/asm/insn.h6
-rw-r--r--arch/arm64/include/asm/pgtable.h2
-rw-r--r--arch/arm64/include/asm/processor.h3
-rw-r--r--arch/arm64/include/asm/tlbflush.h5
-rw-r--r--arch/arm64/kernel/Makefile5
-rw-r--r--arch/arm64/kernel/ftrace.c2
-rw-r--r--arch/arm64/kernel/insn.c4
-rw-r--r--arch/arm64/kernel/psci-call.S28
-rw-r--r--arch/arm64/kernel/psci.c37
-rw-r--r--arch/arm64/kernel/signal32.c5
-rw-r--r--arch/arm64/kernel/vdso/gettimeofday.S3
-rw-r--r--arch/arm64/mm/dma-mapping.c16
-rw-r--r--arch/arm64/mm/init.c14
-rw-r--r--arch/frv/include/asm/pgtable.h2
-rw-r--r--arch/m32r/include/asm/pgtable-2level.h1
-rw-r--r--arch/m68k/include/asm/pgtable_mm.h2
-rw-r--r--arch/metag/include/asm/processor.h4
-rw-r--r--arch/mn10300/include/asm/pgtable.h2
-rw-r--r--arch/parisc/include/asm/pgtable.h1
-rw-r--r--arch/s390/include/asm/pgtable.h2
-rw-r--r--arch/x86/kernel/cpu/common.c6
-rw-r--r--arch/x86/kernel/cpu/intel.c4
-rw-r--r--arch/x86/kernel/entry_32.S3
-rw-r--r--arch/x86/kernel/entry_64.S3
-rw-r--r--arch/x86/kernel/kprobes/core.c54
-rw-r--r--arch/x86/kernel/kprobes/opt.c2
-rw-r--r--arch/x86/lguest/Kconfig4
-rw-r--r--arch/x86/platform/intel-mid/intel-mid.c2
-rw-r--r--arch/x86/xen/enlighten.c20
76 files changed, 901 insertions, 182 deletions
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
index 6cc25ed912ee..2c6248d9a9ef 100644
--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
@@ -195,6 +195,7 @@
195 195
196&usb0 { 196&usb0 {
197 status = "okay"; 197 status = "okay";
198 dr_mode = "peripheral";
198}; 199};
199 200
200&usb1 { 201&usb1 {
diff --git a/arch/arm/boot/dts/am437x-idk-evm.dts b/arch/arm/boot/dts/am437x-idk-evm.dts
index f9a17e2ca8cb..0198f5a62b96 100644
--- a/arch/arm/boot/dts/am437x-idk-evm.dts
+++ b/arch/arm/boot/dts/am437x-idk-evm.dts
@@ -133,20 +133,6 @@
133 >; 133 >;
134 }; 134 };
135 135
136 i2c1_pins_default: i2c1_pins_default {
137 pinctrl-single,pins = <
138 0x15c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
139 0x158 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
140 >;
141 };
142
143 i2c1_pins_sleep: i2c1_pins_sleep {
144 pinctrl-single,pins = <
145 0x15c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_cs0.i2c1_scl */
146 0x158 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d1.i2c1_sda */
147 >;
148 };
149
150 mmc1_pins_default: pinmux_mmc1_pins_default { 136 mmc1_pins_default: pinmux_mmc1_pins_default {
151 pinctrl-single,pins = < 137 pinctrl-single,pins = <
152 0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */ 138 0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
@@ -254,7 +240,7 @@
254 status = "okay"; 240 status = "okay";
255 pinctrl-names = "default", "sleep"; 241 pinctrl-names = "default", "sleep";
256 pinctrl-0 = <&i2c0_pins_default>; 242 pinctrl-0 = <&i2c0_pins_default>;
257 pinctrl-1 = <&i2c0_pins_default>; 243 pinctrl-1 = <&i2c0_pins_sleep>;
258 clock-frequency = <400000>; 244 clock-frequency = <400000>;
259 245
260 at24@50 { 246 at24@50 {
@@ -262,17 +248,10 @@
262 pagesize = <64>; 248 pagesize = <64>;
263 reg = <0x50>; 249 reg = <0x50>;
264 }; 250 };
265};
266
267&i2c1 {
268 status = "okay";
269 pinctrl-names = "default", "sleep";
270 pinctrl-0 = <&i2c1_pins_default>;
271 pinctrl-1 = <&i2c1_pins_default>;
272 clock-frequency = <400000>;
273 251
274 tps: tps62362@60 { 252 tps: tps62362@60 {
275 compatible = "ti,tps62362"; 253 compatible = "ti,tps62362";
254 reg = <0x60>;
276 regulator-name = "VDD_MPU"; 255 regulator-name = "VDD_MPU";
277 regulator-min-microvolt = <950000>; 256 regulator-min-microvolt = <950000>;
278 regulator-max-microvolt = <1330000>; 257 regulator-max-microvolt = <1330000>;
diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts
index 03750af3b49a..6463f9ef2b54 100644
--- a/arch/arm/boot/dts/am57xx-beagle-x15.dts
+++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts
@@ -549,14 +549,6 @@
549 pinctrl-0 = <&usb1_pins>; 549 pinctrl-0 = <&usb1_pins>;
550}; 550};
551 551
552&omap_dwc3_1 {
553 extcon = <&extcon_usb1>;
554};
555
556&omap_dwc3_2 {
557 extcon = <&extcon_usb2>;
558};
559
560&usb2 { 552&usb2 {
561 dr_mode = "peripheral"; 553 dr_mode = "peripheral";
562}; 554};
diff --git a/arch/arm/boot/dts/dm8168-evm.dts b/arch/arm/boot/dts/dm8168-evm.dts
index 857d0289ad4d..d3a29c1b8417 100644
--- a/arch/arm/boot/dts/dm8168-evm.dts
+++ b/arch/arm/boot/dts/dm8168-evm.dts
@@ -35,6 +35,18 @@
35 DM816X_IOPAD(0x0aac, PIN_INPUT | MUX_MODE0) /* SPI_D1 */ 35 DM816X_IOPAD(0x0aac, PIN_INPUT | MUX_MODE0) /* SPI_D1 */
36 >; 36 >;
37 }; 37 };
38
39 usb0_pins: pinmux_usb0_pins {
40 pinctrl-single,pins = <
41 DM816X_IOPAD(0x0d00, MUX_MODE0) /* USB0_DRVVBUS */
42 >;
43 };
44
45 usb1_pins: pinmux_usb0_pins {
46 pinctrl-single,pins = <
47 DM816X_IOPAD(0x0d04, MUX_MODE0) /* USB1_DRVVBUS */
48 >;
49 };
38}; 50};
39 51
40&i2c1 { 52&i2c1 {
@@ -127,3 +139,16 @@
127&mmc1 { 139&mmc1 {
128 vmmc-supply = <&vmmcsd_fixed>; 140 vmmc-supply = <&vmmcsd_fixed>;
129}; 141};
142
143/* At least dm8168-evm rev c won't support multipoint, later may */
144&usb0 {
145 pinctrl-names = "default";
146 pinctrl-0 = <&usb0_pins>;
147 mentor,multipoint = <0>;
148};
149
150&usb1 {
151 pinctrl-names = "default";
152 pinctrl-0 = <&usb1_pins>;
153 mentor,multipoint = <0>;
154};
diff --git a/arch/arm/boot/dts/dm816x.dtsi b/arch/arm/boot/dts/dm816x.dtsi
index d98d0f7de380..3c97b5f2addc 100644
--- a/arch/arm/boot/dts/dm816x.dtsi
+++ b/arch/arm/boot/dts/dm816x.dtsi
@@ -97,10 +97,31 @@
97 97
98 /* Device Configuration Registers */ 98 /* Device Configuration Registers */
99 scm_conf: syscon@600 { 99 scm_conf: syscon@600 {
100 compatible = "syscon"; 100 compatible = "syscon", "simple-bus";
101 reg = <0x600 0x110>; 101 reg = <0x600 0x110>;
102 #address-cells = <1>; 102 #address-cells = <1>;
103 #size-cells = <1>; 103 #size-cells = <1>;
104 ranges = <0 0x600 0x110>;
105
106 usb_phy0: usb-phy@20 {
107 compatible = "ti,dm8168-usb-phy";
108 reg = <0x20 0x8>;
109 reg-names = "phy";
110 clocks = <&main_fapll 6>;
111 clock-names = "refclk";
112 #phy-cells = <0>;
113 syscon = <&scm_conf>;
114 };
115
116 usb_phy1: usb-phy@28 {
117 compatible = "ti,dm8168-usb-phy";
118 reg = <0x28 0x8>;
119 reg-names = "phy";
120 clocks = <&main_fapll 6>;
121 clock-names = "refclk";
122 #phy-cells = <0>;
123 syscon = <&scm_conf>;
124 };
104 }; 125 };
105 126
106 scrm_clocks: clocks { 127 scrm_clocks: clocks {
@@ -357,7 +378,10 @@
357 reg-names = "mc", "control"; 378 reg-names = "mc", "control";
358 interrupts = <18>; 379 interrupts = <18>;
359 interrupt-names = "mc"; 380 interrupt-names = "mc";
360 dr_mode = "otg"; 381 dr_mode = "host";
382 interface-type = <0>;
383 phys = <&usb_phy0>;
384 phy-names = "usb2-phy";
361 mentor,multipoint = <1>; 385 mentor,multipoint = <1>;
362 mentor,num-eps = <16>; 386 mentor,num-eps = <16>;
363 mentor,ram-bits = <12>; 387 mentor,ram-bits = <12>;
@@ -366,13 +390,15 @@
366 390
367 usb1: usb@47401800 { 391 usb1: usb@47401800 {
368 compatible = "ti,musb-am33xx"; 392 compatible = "ti,musb-am33xx";
369 status = "disabled";
370 reg = <0x47401c00 0x400 393 reg = <0x47401c00 0x400
371 0x47401800 0x200>; 394 0x47401800 0x200>;
372 reg-names = "mc", "control"; 395 reg-names = "mc", "control";
373 interrupts = <19>; 396 interrupts = <19>;
374 interrupt-names = "mc"; 397 interrupt-names = "mc";
375 dr_mode = "otg"; 398 dr_mode = "host";
399 interface-type = <0>;
400 phys = <&usb_phy1>;
401 phy-names = "usb2-phy";
376 mentor,multipoint = <1>; 402 mentor,multipoint = <1>;
377 mentor,num-eps = <16>; 403 mentor,num-eps = <16>;
378 mentor,ram-bits = <12>; 404 mentor,ram-bits = <12>;
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 746cddb1b8f5..3290a96ba586 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -543,14 +543,6 @@
543 }; 543 };
544}; 544};
545 545
546&omap_dwc3_1 {
547 extcon = <&extcon_usb1>;
548};
549
550&omap_dwc3_2 {
551 extcon = <&extcon_usb2>;
552};
553
554&usb1 { 546&usb1 {
555 dr_mode = "peripheral"; 547 dr_mode = "peripheral";
556 pinctrl-names = "default"; 548 pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 5827fedafd43..127608d79033 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -249,8 +249,8 @@
249 <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 249 <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
250 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 250 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
251 #dma-cells = <1>; 251 #dma-cells = <1>;
252 #dma-channels = <32>; 252 dma-channels = <32>;
253 #dma-requests = <127>; 253 dma-requests = <127>;
254 }; 254 };
255 255
256 gpio1: gpio@4ae10000 { 256 gpio1: gpio@4ae10000 {
@@ -1090,8 +1090,8 @@
1090 <0x4A096800 0x40>; /* pll_ctrl */ 1090 <0x4A096800 0x40>; /* pll_ctrl */
1091 reg-names = "phy_rx", "phy_tx", "pll_ctrl"; 1091 reg-names = "phy_rx", "phy_tx", "pll_ctrl";
1092 ctrl-module = <&omap_control_sata>; 1092 ctrl-module = <&omap_control_sata>;
1093 clocks = <&sys_clkin1>; 1093 clocks = <&sys_clkin1>, <&sata_ref_clk>;
1094 clock-names = "sysclk"; 1094 clock-names = "sysclk", "refclk";
1095 #phy-cells = <0>; 1095 #phy-cells = <0>;
1096 }; 1096 };
1097 1097
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index 4d8711713610..e0264d0bf7b9 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -380,14 +380,6 @@
380 phy-supply = <&ldo4_reg>; 380 phy-supply = <&ldo4_reg>;
381}; 381};
382 382
383&omap_dwc3_1 {
384 extcon = <&extcon_usb1>;
385};
386
387&omap_dwc3_2 {
388 extcon = <&extcon_usb2>;
389};
390
391&usb1 { 383&usb1 {
392 dr_mode = "peripheral"; 384 dr_mode = "peripheral";
393 pinctrl-names = "default"; 385 pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index 277b48b0b6f9..ac6b0ae42caf 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -18,6 +18,7 @@
18 */ 18 */
19 19
20#include "skeleton.dtsi" 20#include "skeleton.dtsi"
21#include "exynos4-cpu-thermal.dtsi"
21#include <dt-bindings/clock/exynos3250.h> 22#include <dt-bindings/clock/exynos3250.h>
22 23
23/ { 24/ {
@@ -193,6 +194,7 @@
193 interrupts = <0 216 0>; 194 interrupts = <0 216 0>;
194 clocks = <&cmu CLK_TMU_APBIF>; 195 clocks = <&cmu CLK_TMU_APBIF>;
195 clock-names = "tmu_apbif"; 196 clock-names = "tmu_apbif";
197 #include "exynos4412-tmu-sensor-conf.dtsi"
196 status = "disabled"; 198 status = "disabled";
197 }; 199 };
198 200
diff --git a/arch/arm/boot/dts/exynos4-cpu-thermal.dtsi b/arch/arm/boot/dts/exynos4-cpu-thermal.dtsi
new file mode 100644
index 000000000000..735cb2f10817
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4-cpu-thermal.dtsi
@@ -0,0 +1,52 @@
1/*
2 * Device tree sources for Exynos4 thermal zone
3 *
4 * Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <dt-bindings/thermal/thermal.h>
13
14/ {
15thermal-zones {
16 cpu_thermal: cpu-thermal {
17 thermal-sensors = <&tmu 0>;
18 polling-delay-passive = <0>;
19 polling-delay = <0>;
20 trips {
21 cpu_alert0: cpu-alert-0 {
22 temperature = <70000>; /* millicelsius */
23 hysteresis = <10000>; /* millicelsius */
24 type = "active";
25 };
26 cpu_alert1: cpu-alert-1 {
27 temperature = <95000>; /* millicelsius */
28 hysteresis = <10000>; /* millicelsius */
29 type = "active";
30 };
31 cpu_alert2: cpu-alert-2 {
32 temperature = <110000>; /* millicelsius */
33 hysteresis = <10000>; /* millicelsius */
34 type = "active";
35 };
36 cpu_crit0: cpu-crit-0 {
37 temperature = <120000>; /* millicelsius */
38 hysteresis = <0>; /* millicelsius */
39 type = "critical";
40 };
41 };
42 cooling-maps {
43 map0 {
44 trip = <&cpu_alert0>;
45 };
46 map1 {
47 trip = <&cpu_alert1>;
48 };
49 };
50 };
51};
52};
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 76173cacd450..77ea547768f4 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -38,6 +38,7 @@
38 i2c5 = &i2c_5; 38 i2c5 = &i2c_5;
39 i2c6 = &i2c_6; 39 i2c6 = &i2c_6;
40 i2c7 = &i2c_7; 40 i2c7 = &i2c_7;
41 i2c8 = &i2c_8;
41 csis0 = &csis_0; 42 csis0 = &csis_0;
42 csis1 = &csis_1; 43 csis1 = &csis_1;
43 fimc0 = &fimc_0; 44 fimc0 = &fimc_0;
@@ -104,6 +105,7 @@
104 compatible = "samsung,exynos4210-pd"; 105 compatible = "samsung,exynos4210-pd";
105 reg = <0x10023C20 0x20>; 106 reg = <0x10023C20 0x20>;
106 #power-domain-cells = <0>; 107 #power-domain-cells = <0>;
108 power-domains = <&pd_lcd0>;
107 }; 109 };
108 110
109 pd_cam: cam-power-domain@10023C00 { 111 pd_cam: cam-power-domain@10023C00 {
@@ -554,6 +556,22 @@
554 status = "disabled"; 556 status = "disabled";
555 }; 557 };
556 558
559 i2c_8: i2c@138E0000 {
560 #address-cells = <1>;
561 #size-cells = <0>;
562 compatible = "samsung,s3c2440-hdmiphy-i2c";
563 reg = <0x138E0000 0x100>;
564 interrupts = <0 93 0>;
565 clocks = <&clock CLK_I2C_HDMI>;
566 clock-names = "i2c";
567 status = "disabled";
568
569 hdmi_i2c_phy: hdmiphy@38 {
570 compatible = "exynos4210-hdmiphy";
571 reg = <0x38>;
572 };
573 };
574
557 spi_0: spi@13920000 { 575 spi_0: spi@13920000 {
558 compatible = "samsung,exynos4210-spi"; 576 compatible = "samsung,exynos4210-spi";
559 reg = <0x13920000 0x100>; 577 reg = <0x13920000 0x100>;
@@ -663,6 +681,33 @@
663 status = "disabled"; 681 status = "disabled";
664 }; 682 };
665 683
684 tmu: tmu@100C0000 {
685 #include "exynos4412-tmu-sensor-conf.dtsi"
686 };
687
688 hdmi: hdmi@12D00000 {
689 compatible = "samsung,exynos4210-hdmi";
690 reg = <0x12D00000 0x70000>;
691 interrupts = <0 92 0>;
692 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy",
693 "mout_hdmi";
694 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
695 <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
696 <&clock CLK_MOUT_HDMI>;
697 phy = <&hdmi_i2c_phy>;
698 power-domains = <&pd_tv>;
699 samsung,syscon-phandle = <&pmu_system_controller>;
700 status = "disabled";
701 };
702
703 mixer: mixer@12C10000 {
704 compatible = "samsung,exynos4210-mixer";
705 interrupts = <0 91 0>;
706 reg = <0x12C10000 0x2100>, <0x12c00000 0x300>;
707 power-domains = <&pd_tv>;
708 status = "disabled";
709 };
710
666 ppmu_dmc0: ppmu_dmc0@106a0000 { 711 ppmu_dmc0: ppmu_dmc0@106a0000 {
667 compatible = "samsung,exynos-ppmu"; 712 compatible = "samsung,exynos-ppmu";
668 reg = <0x106a0000 0x2000>; 713 reg = <0x106a0000 0x2000>;
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
index 3d6652a4b6cb..32c5fd8f6269 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -426,6 +426,25 @@
426 status = "okay"; 426 status = "okay";
427 }; 427 };
428 428
429 tmu@100C0000 {
430 status = "okay";
431 };
432
433 thermal-zones {
434 cpu_thermal: cpu-thermal {
435 cooling-maps {
436 map0 {
437 /* Corresponds to 800MHz at freq_table */
438 cooling-device = <&cpu0 2 2>;
439 };
440 map1 {
441 /* Corresponds to 200MHz at freq_table */
442 cooling-device = <&cpu0 4 4>;
443 };
444 };
445 };
446 };
447
429 camera { 448 camera {
430 pinctrl-names = "default"; 449 pinctrl-names = "default";
431 pinctrl-0 = <>; 450 pinctrl-0 = <>;
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index b57e6b82ea20..d4f2b11319dd 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -505,6 +505,63 @@
505 assigned-clock-rates = <0>, <160000000>; 505 assigned-clock-rates = <0>, <160000000>;
506 }; 506 };
507 }; 507 };
508
509 hdmi_en: voltage-regulator-hdmi-5v {
510 compatible = "regulator-fixed";
511 regulator-name = "HDMI_5V";
512 regulator-min-microvolt = <5000000>;
513 regulator-max-microvolt = <5000000>;
514 gpio = <&gpe0 1 0>;
515 enable-active-high;
516 };
517
518 hdmi_ddc: i2c-ddc {
519 compatible = "i2c-gpio";
520 gpios = <&gpe4 2 0 &gpe4 3 0>;
521 i2c-gpio,delay-us = <100>;
522 #address-cells = <1>;
523 #size-cells = <0>;
524
525 pinctrl-0 = <&i2c_ddc_bus>;
526 pinctrl-names = "default";
527 status = "okay";
528 };
529
530 mixer@12C10000 {
531 status = "okay";
532 };
533
534 hdmi@12D00000 {
535 hpd-gpio = <&gpx3 7 0>;
536 pinctrl-names = "default";
537 pinctrl-0 = <&hdmi_hpd>;
538 hdmi-en-supply = <&hdmi_en>;
539 vdd-supply = <&ldo3_reg>;
540 vdd_osc-supply = <&ldo4_reg>;
541 vdd_pll-supply = <&ldo3_reg>;
542 ddc = <&hdmi_ddc>;
543 status = "okay";
544 };
545
546 i2c@138E0000 {
547 status = "okay";
548 };
549};
550
551&pinctrl_1 {
552 hdmi_hpd: hdmi-hpd {
553 samsung,pins = "gpx3-7";
554 samsung,pin-pud = <0>;
555 };
556};
557
558&pinctrl_0 {
559 i2c_ddc_bus: i2c-ddc-bus {
560 samsung,pins = "gpe4-2", "gpe4-3";
561 samsung,pin-function = <2>;
562 samsung,pin-pud = <3>;
563 samsung,pin-drv = <0>;
564 };
508}; 565};
509 566
510&mdma1 { 567&mdma1 {
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 67c832c9dcf1..be89f83f70e7 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -21,6 +21,7 @@
21 21
22#include "exynos4.dtsi" 22#include "exynos4.dtsi"
23#include "exynos4210-pinctrl.dtsi" 23#include "exynos4210-pinctrl.dtsi"
24#include "exynos4-cpu-thermal.dtsi"
24 25
25/ { 26/ {
26 compatible = "samsung,exynos4210", "samsung,exynos4"; 27 compatible = "samsung,exynos4210", "samsung,exynos4";
@@ -35,10 +36,13 @@
35 #address-cells = <1>; 36 #address-cells = <1>;
36 #size-cells = <0>; 37 #size-cells = <0>;
37 38
38 cpu@900 { 39 cpu0: cpu@900 {
39 device_type = "cpu"; 40 device_type = "cpu";
40 compatible = "arm,cortex-a9"; 41 compatible = "arm,cortex-a9";
41 reg = <0x900>; 42 reg = <0x900>;
43 cooling-min-level = <4>;
44 cooling-max-level = <2>;
45 #cooling-cells = <2>; /* min followed by max */
42 }; 46 };
43 47
44 cpu@901 { 48 cpu@901 {
@@ -153,16 +157,38 @@
153 reg = <0x03860000 0x1000>; 157 reg = <0x03860000 0x1000>;
154 }; 158 };
155 159
156 tmu@100C0000 { 160 tmu: tmu@100C0000 {
157 compatible = "samsung,exynos4210-tmu"; 161 compatible = "samsung,exynos4210-tmu";
158 interrupt-parent = <&combiner>; 162 interrupt-parent = <&combiner>;
159 reg = <0x100C0000 0x100>; 163 reg = <0x100C0000 0x100>;
160 interrupts = <2 4>; 164 interrupts = <2 4>;
161 clocks = <&clock CLK_TMU_APBIF>; 165 clocks = <&clock CLK_TMU_APBIF>;
162 clock-names = "tmu_apbif"; 166 clock-names = "tmu_apbif";
167 samsung,tmu_gain = <15>;
168 samsung,tmu_reference_voltage = <7>;
163 status = "disabled"; 169 status = "disabled";
164 }; 170 };
165 171
172 thermal-zones {
173 cpu_thermal: cpu-thermal {
174 polling-delay-passive = <0>;
175 polling-delay = <0>;
176 thermal-sensors = <&tmu 0>;
177
178 trips {
179 cpu_alert0: cpu-alert-0 {
180 temperature = <85000>; /* millicelsius */
181 };
182 cpu_alert1: cpu-alert-1 {
183 temperature = <100000>; /* millicelsius */
184 };
185 cpu_alert2: cpu-alert-2 {
186 temperature = <110000>; /* millicelsius */
187 };
188 };
189 };
190 };
191
166 g2d@12800000 { 192 g2d@12800000 {
167 compatible = "samsung,s5pv210-g2d"; 193 compatible = "samsung,s5pv210-g2d";
168 reg = <0x12800000 0x1000>; 194 reg = <0x12800000 0x1000>;
@@ -203,6 +229,14 @@
203 }; 229 };
204 }; 230 };
205 231
232 mixer: mixer@12C10000 {
233 clock-names = "mixer", "hdmi", "sclk_hdmi", "vp", "mout_mixer",
234 "sclk_mixer";
235 clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
236 <&clock CLK_SCLK_HDMI>, <&clock CLK_VP>,
237 <&clock CLK_MOUT_MIXER>, <&clock CLK_SCLK_MIXER>;
238 };
239
206 ppmu_lcd1: ppmu_lcd1@12240000 { 240 ppmu_lcd1: ppmu_lcd1@12240000 {
207 compatible = "samsung,exynos-ppmu"; 241 compatible = "samsung,exynos-ppmu";
208 reg = <0x12240000 0x2000>; 242 reg = <0x12240000 0x2000>;
diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi
index dd0a43ec56da..5be03288f1ee 100644
--- a/arch/arm/boot/dts/exynos4212.dtsi
+++ b/arch/arm/boot/dts/exynos4212.dtsi
@@ -26,10 +26,13 @@
26 #address-cells = <1>; 26 #address-cells = <1>;
27 #size-cells = <0>; 27 #size-cells = <0>;
28 28
29 cpu@A00 { 29 cpu0: cpu@A00 {
30 device_type = "cpu"; 30 device_type = "cpu";
31 compatible = "arm,cortex-a9"; 31 compatible = "arm,cortex-a9";
32 reg = <0xA00>; 32 reg = <0xA00>;
33 cooling-min-level = <13>;
34 cooling-max-level = <7>;
35 #cooling-cells = <2>; /* min followed by max */
33 }; 36 };
34 37
35 cpu@A01 { 38 cpu@A01 {
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index de80b5bba204..adb4f6a97a1d 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -249,6 +249,20 @@
249 regulator-always-on; 249 regulator-always-on;
250 }; 250 };
251 251
252 ldo8_reg: ldo@8 {
253 regulator-compatible = "LDO8";
254 regulator-name = "VDD10_HDMI_1.0V";
255 regulator-min-microvolt = <1000000>;
256 regulator-max-microvolt = <1000000>;
257 };
258
259 ldo10_reg: ldo@10 {
260 regulator-compatible = "LDO10";
261 regulator-name = "VDDQ_MIPIHSI_1.8V";
262 regulator-min-microvolt = <1800000>;
263 regulator-max-microvolt = <1800000>;
264 };
265
252 ldo11_reg: LDO11 { 266 ldo11_reg: LDO11 {
253 regulator-name = "VDD18_ABB1_1.8V"; 267 regulator-name = "VDD18_ABB1_1.8V";
254 regulator-min-microvolt = <1800000>; 268 regulator-min-microvolt = <1800000>;
@@ -411,6 +425,51 @@
411 ehci: ehci@12580000 { 425 ehci: ehci@12580000 {
412 status = "okay"; 426 status = "okay";
413 }; 427 };
428
429 tmu@100C0000 {
430 vtmu-supply = <&ldo10_reg>;
431 status = "okay";
432 };
433
434 thermal-zones {
435 cpu_thermal: cpu-thermal {
436 cooling-maps {
437 map0 {
438 /* Corresponds to 800MHz at freq_table */
439 cooling-device = <&cpu0 7 7>;
440 };
441 map1 {
442 /* Corresponds to 200MHz at freq_table */
443 cooling-device = <&cpu0 13 13>;
444 };
445 };
446 };
447 };
448
449 mixer: mixer@12C10000 {
450 status = "okay";
451 };
452
453 hdmi@12D00000 {
454 hpd-gpio = <&gpx3 7 0>;
455 pinctrl-names = "default";
456 pinctrl-0 = <&hdmi_hpd>;
457 vdd-supply = <&ldo8_reg>;
458 vdd_osc-supply = <&ldo10_reg>;
459 vdd_pll-supply = <&ldo8_reg>;
460 ddc = <&hdmi_ddc>;
461 status = "okay";
462 };
463
464 hdmi_ddc: i2c@13880000 {
465 status = "okay";
466 pinctrl-names = "default";
467 pinctrl-0 = <&i2c2_bus>;
468 };
469
470 i2c@138E0000 {
471 status = "okay";
472 };
414}; 473};
415 474
416&pinctrl_1 { 475&pinctrl_1 {
@@ -425,4 +484,9 @@
425 samsung,pin-pud = <0>; 484 samsung,pin-pud = <0>;
426 samsung,pin-drv = <0>; 485 samsung,pin-drv = <0>;
427 }; 486 };
487
488 hdmi_hpd: hdmi-hpd {
489 samsung,pins = "gpx3-7";
490 samsung,pin-pud = <1>;
491 };
428}; 492};
diff --git a/arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi b/arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi
new file mode 100644
index 000000000000..e3f7934d19d0
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi
@@ -0,0 +1,24 @@
1/*
2 * Device tree sources for Exynos4412 TMU sensor configuration
3 *
4 * Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <dt-bindings/thermal/thermal_exynos.h>
13
14#thermal-sensor-cells = <0>;
15samsung,tmu_gain = <8>;
16samsung,tmu_reference_voltage = <16>;
17samsung,tmu_noise_cancel_mode = <4>;
18samsung,tmu_efuse_value = <55>;
19samsung,tmu_min_efuse_value = <40>;
20samsung,tmu_max_efuse_value = <100>;
21samsung,tmu_first_point_trim = <25>;
22samsung,tmu_second_point_trim = <85>;
23samsung,tmu_default_temp_offset = <50>;
24samsung,tmu_cal_type = <TYPE_ONE_POINT_TRIMMING>;
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
index 21f748083586..173ffa479ad3 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -927,6 +927,21 @@
927 pulldown-ohm = <100000>; /* 100K */ 927 pulldown-ohm = <100000>; /* 100K */
928 io-channels = <&adc 2>; /* Battery temperature */ 928 io-channels = <&adc 2>; /* Battery temperature */
929 }; 929 };
930
931 thermal-zones {
932 cpu_thermal: cpu-thermal {
933 cooling-maps {
934 map0 {
935 /* Corresponds to 800MHz at freq_table */
936 cooling-device = <&cpu0 7 7>;
937 };
938 map1 {
939 /* Corresponds to 200MHz at freq_table */
940 cooling-device = <&cpu0 13 13>;
941 };
942 };
943 };
944 };
930}; 945};
931 946
932&pmu_system_controller { 947&pmu_system_controller {
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index 0f6ec93bb1d8..68ad43b391ae 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -26,10 +26,13 @@
26 #address-cells = <1>; 26 #address-cells = <1>;
27 #size-cells = <0>; 27 #size-cells = <0>;
28 28
29 cpu@A00 { 29 cpu0: cpu@A00 {
30 device_type = "cpu"; 30 device_type = "cpu";
31 compatible = "arm,cortex-a9"; 31 compatible = "arm,cortex-a9";
32 reg = <0xA00>; 32 reg = <0xA00>;
33 cooling-min-level = <13>;
34 cooling-max-level = <7>;
35 #cooling-cells = <2>; /* min followed by max */
33 }; 36 };
34 37
35 cpu@A01 { 38 cpu@A01 {
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index f5e0ae780d6c..6a6abe14fd9b 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -19,6 +19,7 @@
19 19
20#include "exynos4.dtsi" 20#include "exynos4.dtsi"
21#include "exynos4x12-pinctrl.dtsi" 21#include "exynos4x12-pinctrl.dtsi"
22#include "exynos4-cpu-thermal.dtsi"
22 23
23/ { 24/ {
24 aliases { 25 aliases {
@@ -297,4 +298,15 @@
297 clock-names = "tmu_apbif"; 298 clock-names = "tmu_apbif";
298 status = "disabled"; 299 status = "disabled";
299 }; 300 };
301
302 hdmi: hdmi@12D00000 {
303 compatible = "samsung,exynos4212-hdmi";
304 };
305
306 mixer: mixer@12C10000 {
307 compatible = "samsung,exynos4212-mixer";
308 clock-names = "mixer", "hdmi", "sclk_hdmi", "vp";
309 clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
310 <&clock CLK_SCLK_HDMI>, <&clock CLK_VP>;
311 };
300}; 312};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 9bb1b0b738f5..adbde1adad95 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -20,7 +20,7 @@
20#include <dt-bindings/clock/exynos5250.h> 20#include <dt-bindings/clock/exynos5250.h>
21#include "exynos5.dtsi" 21#include "exynos5.dtsi"
22#include "exynos5250-pinctrl.dtsi" 22#include "exynos5250-pinctrl.dtsi"
23 23#include "exynos4-cpu-thermal.dtsi"
24#include <dt-bindings/clock/exynos-audss-clk.h> 24#include <dt-bindings/clock/exynos-audss-clk.h>
25 25
26/ { 26/ {
@@ -58,11 +58,14 @@
58 #address-cells = <1>; 58 #address-cells = <1>;
59 #size-cells = <0>; 59 #size-cells = <0>;
60 60
61 cpu@0 { 61 cpu0: cpu@0 {
62 device_type = "cpu"; 62 device_type = "cpu";
63 compatible = "arm,cortex-a15"; 63 compatible = "arm,cortex-a15";
64 reg = <0>; 64 reg = <0>;
65 clock-frequency = <1700000000>; 65 clock-frequency = <1700000000>;
66 cooling-min-level = <15>;
67 cooling-max-level = <9>;
68 #cooling-cells = <2>; /* min followed by max */
66 }; 69 };
67 cpu@1 { 70 cpu@1 {
68 device_type = "cpu"; 71 device_type = "cpu";
@@ -102,6 +105,12 @@
102 #power-domain-cells = <0>; 105 #power-domain-cells = <0>;
103 }; 106 };
104 107
108 pd_disp1: disp1-power-domain@100440A0 {
109 compatible = "samsung,exynos4210-pd";
110 reg = <0x100440A0 0x20>;
111 #power-domain-cells = <0>;
112 };
113
105 clock: clock-controller@10010000 { 114 clock: clock-controller@10010000 {
106 compatible = "samsung,exynos5250-clock"; 115 compatible = "samsung,exynos5250-clock";
107 reg = <0x10010000 0x30000>; 116 reg = <0x10010000 0x30000>;
@@ -235,12 +244,32 @@
235 status = "disabled"; 244 status = "disabled";
236 }; 245 };
237 246
238 tmu@10060000 { 247 tmu: tmu@10060000 {
239 compatible = "samsung,exynos5250-tmu"; 248 compatible = "samsung,exynos5250-tmu";
240 reg = <0x10060000 0x100>; 249 reg = <0x10060000 0x100>;
241 interrupts = <0 65 0>; 250 interrupts = <0 65 0>;
242 clocks = <&clock CLK_TMU>; 251 clocks = <&clock CLK_TMU>;
243 clock-names = "tmu_apbif"; 252 clock-names = "tmu_apbif";
253 #include "exynos4412-tmu-sensor-conf.dtsi"
254 };
255
256 thermal-zones {
257 cpu_thermal: cpu-thermal {
258 polling-delay-passive = <0>;
259 polling-delay = <0>;
260 thermal-sensors = <&tmu 0>;
261
262 cooling-maps {
263 map0 {
264 /* Corresponds to 800MHz at freq_table */
265 cooling-device = <&cpu0 9 9>;
266 };
267 map1 {
268 /* Corresponds to 200MHz at freq_table */
269 cooling-device = <&cpu0 15 15>;
270 };
271 };
272 };
244 }; 273 };
245 274
246 serial@12C00000 { 275 serial@12C00000 {
@@ -719,6 +748,7 @@
719 hdmi: hdmi { 748 hdmi: hdmi {
720 compatible = "samsung,exynos4212-hdmi"; 749 compatible = "samsung,exynos4212-hdmi";
721 reg = <0x14530000 0x70000>; 750 reg = <0x14530000 0x70000>;
751 power-domains = <&pd_disp1>;
722 interrupts = <0 95 0>; 752 interrupts = <0 95 0>;
723 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>, 753 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
724 <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>, 754 <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
@@ -731,9 +761,11 @@
731 mixer { 761 mixer {
732 compatible = "samsung,exynos5250-mixer"; 762 compatible = "samsung,exynos5250-mixer";
733 reg = <0x14450000 0x10000>; 763 reg = <0x14450000 0x10000>;
764 power-domains = <&pd_disp1>;
734 interrupts = <0 94 0>; 765 interrupts = <0 94 0>;
735 clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>; 766 clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
736 clock-names = "mixer", "sclk_hdmi"; 767 <&clock CLK_SCLK_HDMI>;
768 clock-names = "mixer", "hdmi", "sclk_hdmi";
737 }; 769 };
738 770
739 dp_phy: video-phy@10040720 { 771 dp_phy: video-phy@10040720 {
@@ -743,6 +775,7 @@
743 }; 775 };
744 776
745 dp: dp-controller@145B0000 { 777 dp: dp-controller@145B0000 {
778 power-domains = <&pd_disp1>;
746 clocks = <&clock CLK_DP>; 779 clocks = <&clock CLK_DP>;
747 clock-names = "dp"; 780 clock-names = "dp";
748 phys = <&dp_phy>; 781 phys = <&dp_phy>;
@@ -750,6 +783,7 @@
750 }; 783 };
751 784
752 fimd: fimd@14400000 { 785 fimd: fimd@14400000 {
786 power-domains = <&pd_disp1>;
753 clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>; 787 clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
754 clock-names = "sclk_fimd", "fimd"; 788 clock-names = "sclk_fimd", "fimd";
755 }; 789 };
diff --git a/arch/arm/boot/dts/exynos5420-trip-points.dtsi b/arch/arm/boot/dts/exynos5420-trip-points.dtsi
new file mode 100644
index 000000000000..5d31fc140823
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5420-trip-points.dtsi
@@ -0,0 +1,35 @@
1/*
2 * Device tree sources for default Exynos5420 thermal zone definition
3 *
4 * Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12polling-delay-passive = <0>;
13polling-delay = <0>;
14trips {
15 cpu-alert-0 {
16 temperature = <85000>; /* millicelsius */
17 hysteresis = <10000>; /* millicelsius */
18 type = "active";
19 };
20 cpu-alert-1 {
21 temperature = <103000>; /* millicelsius */
22 hysteresis = <10000>; /* millicelsius */
23 type = "active";
24 };
25 cpu-alert-2 {
26 temperature = <110000>; /* millicelsius */
27 hysteresis = <10000>; /* millicelsius */
28 type = "active";
29 };
30 cpu-crit-0 {
31 temperature = <1200000>; /* millicelsius */
32 hysteresis = <0>; /* millicelsius */
33 type = "critical";
34 };
35};
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 9dc2e9773b30..c0e98cf3514f 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -740,8 +740,9 @@
740 compatible = "samsung,exynos5420-mixer"; 740 compatible = "samsung,exynos5420-mixer";
741 reg = <0x14450000 0x10000>; 741 reg = <0x14450000 0x10000>;
742 interrupts = <0 94 0>; 742 interrupts = <0 94 0>;
743 clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>; 743 clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
744 clock-names = "mixer", "sclk_hdmi"; 744 <&clock CLK_SCLK_HDMI>;
745 clock-names = "mixer", "hdmi", "sclk_hdmi";
745 power-domains = <&disp_pd>; 746 power-domains = <&disp_pd>;
746 }; 747 };
747 748
@@ -782,6 +783,7 @@
782 interrupts = <0 65 0>; 783 interrupts = <0 65 0>;
783 clocks = <&clock CLK_TMU>; 784 clocks = <&clock CLK_TMU>;
784 clock-names = "tmu_apbif"; 785 clock-names = "tmu_apbif";
786 #include "exynos4412-tmu-sensor-conf.dtsi"
785 }; 787 };
786 788
787 tmu_cpu1: tmu@10064000 { 789 tmu_cpu1: tmu@10064000 {
@@ -790,6 +792,7 @@
790 interrupts = <0 183 0>; 792 interrupts = <0 183 0>;
791 clocks = <&clock CLK_TMU>; 793 clocks = <&clock CLK_TMU>;
792 clock-names = "tmu_apbif"; 794 clock-names = "tmu_apbif";
795 #include "exynos4412-tmu-sensor-conf.dtsi"
793 }; 796 };
794 797
795 tmu_cpu2: tmu@10068000 { 798 tmu_cpu2: tmu@10068000 {
@@ -798,6 +801,7 @@
798 interrupts = <0 184 0>; 801 interrupts = <0 184 0>;
799 clocks = <&clock CLK_TMU>, <&clock CLK_TMU>; 802 clocks = <&clock CLK_TMU>, <&clock CLK_TMU>;
800 clock-names = "tmu_apbif", "tmu_triminfo_apbif"; 803 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
804 #include "exynos4412-tmu-sensor-conf.dtsi"
801 }; 805 };
802 806
803 tmu_cpu3: tmu@1006c000 { 807 tmu_cpu3: tmu@1006c000 {
@@ -806,6 +810,7 @@
806 interrupts = <0 185 0>; 810 interrupts = <0 185 0>;
807 clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>; 811 clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>;
808 clock-names = "tmu_apbif", "tmu_triminfo_apbif"; 812 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
813 #include "exynos4412-tmu-sensor-conf.dtsi"
809 }; 814 };
810 815
811 tmu_gpu: tmu@100a0000 { 816 tmu_gpu: tmu@100a0000 {
@@ -814,6 +819,30 @@
814 interrupts = <0 215 0>; 819 interrupts = <0 215 0>;
815 clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>; 820 clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>;
816 clock-names = "tmu_apbif", "tmu_triminfo_apbif"; 821 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
822 #include "exynos4412-tmu-sensor-conf.dtsi"
823 };
824
825 thermal-zones {
826 cpu0_thermal: cpu0-thermal {
827 thermal-sensors = <&tmu_cpu0>;
828 #include "exynos5420-trip-points.dtsi"
829 };
830 cpu1_thermal: cpu1-thermal {
831 thermal-sensors = <&tmu_cpu1>;
832 #include "exynos5420-trip-points.dtsi"
833 };
834 cpu2_thermal: cpu2-thermal {
835 thermal-sensors = <&tmu_cpu2>;
836 #include "exynos5420-trip-points.dtsi"
837 };
838 cpu3_thermal: cpu3-thermal {
839 thermal-sensors = <&tmu_cpu3>;
840 #include "exynos5420-trip-points.dtsi"
841 };
842 gpu_thermal: gpu-thermal {
843 thermal-sensors = <&tmu_gpu>;
844 #include "exynos5420-trip-points.dtsi"
845 };
817 }; 846 };
818 847
819 watchdog: watchdog@101D0000 { 848 watchdog: watchdog@101D0000 {
diff --git a/arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi b/arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi
new file mode 100644
index 000000000000..7b2fba0ae92b
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi
@@ -0,0 +1,24 @@
1/*
2 * Device tree sources for Exynos5440 TMU sensor configuration
3 *
4 * Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <dt-bindings/thermal/thermal_exynos.h>
13
14#thermal-sensor-cells = <0>;
15samsung,tmu_gain = <5>;
16samsung,tmu_reference_voltage = <16>;
17samsung,tmu_noise_cancel_mode = <4>;
18samsung,tmu_efuse_value = <0x5d2d>;
19samsung,tmu_min_efuse_value = <16>;
20samsung,tmu_max_efuse_value = <76>;
21samsung,tmu_first_point_trim = <25>;
22samsung,tmu_second_point_trim = <70>;
23samsung,tmu_default_temp_offset = <25>;
24samsung,tmu_cal_type = <TYPE_ONE_POINT_TRIMMING>;
diff --git a/arch/arm/boot/dts/exynos5440-trip-points.dtsi b/arch/arm/boot/dts/exynos5440-trip-points.dtsi
new file mode 100644
index 000000000000..48adfa8f4300
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5440-trip-points.dtsi
@@ -0,0 +1,25 @@
1/*
2 * Device tree sources for default Exynos5440 thermal zone definition
3 *
4 * Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12polling-delay-passive = <0>;
13polling-delay = <0>;
14trips {
15 cpu-alert-0 {
16 temperature = <100000>; /* millicelsius */
17 hysteresis = <0>; /* millicelsius */
18 type = "active";
19 };
20 cpu-crit-0 {
21 temperature = <1050000>; /* millicelsius */
22 hysteresis = <0>; /* millicelsius */
23 type = "critical";
24 };
25};
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index 8f3373cd7b87..59d9416b3b03 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -219,6 +219,7 @@
219 interrupts = <0 58 0>; 219 interrupts = <0 58 0>;
220 clocks = <&clock CLK_B_125>; 220 clocks = <&clock CLK_B_125>;
221 clock-names = "tmu_apbif"; 221 clock-names = "tmu_apbif";
222 #include "exynos5440-tmu-sensor-conf.dtsi"
222 }; 223 };
223 224
224 tmuctrl_1: tmuctrl@16011C { 225 tmuctrl_1: tmuctrl@16011C {
@@ -227,6 +228,7 @@
227 interrupts = <0 58 0>; 228 interrupts = <0 58 0>;
228 clocks = <&clock CLK_B_125>; 229 clocks = <&clock CLK_B_125>;
229 clock-names = "tmu_apbif"; 230 clock-names = "tmu_apbif";
231 #include "exynos5440-tmu-sensor-conf.dtsi"
230 }; 232 };
231 233
232 tmuctrl_2: tmuctrl@160120 { 234 tmuctrl_2: tmuctrl@160120 {
@@ -235,6 +237,22 @@
235 interrupts = <0 58 0>; 237 interrupts = <0 58 0>;
236 clocks = <&clock CLK_B_125>; 238 clocks = <&clock CLK_B_125>;
237 clock-names = "tmu_apbif"; 239 clock-names = "tmu_apbif";
240 #include "exynos5440-tmu-sensor-conf.dtsi"
241 };
242
243 thermal-zones {
244 cpu0_thermal: cpu0-thermal {
245 thermal-sensors = <&tmuctrl_0>;
246 #include "exynos5440-trip-points.dtsi"
247 };
248 cpu1_thermal: cpu1-thermal {
249 thermal-sensors = <&tmuctrl_1>;
250 #include "exynos5440-trip-points.dtsi"
251 };
252 cpu2_thermal: cpu2-thermal {
253 thermal-sensors = <&tmuctrl_2>;
254 #include "exynos5440-trip-points.dtsi"
255 };
238 }; 256 };
239 257
240 sata@210000 { 258 sata@210000 {
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi
index 59d1c297bb30..578fa2a54dce 100644
--- a/arch/arm/boot/dts/omap2.dtsi
+++ b/arch/arm/boot/dts/omap2.dtsi
@@ -87,8 +87,8 @@
87 <14>, 87 <14>,
88 <15>; 88 <15>;
89 #dma-cells = <1>; 89 #dma-cells = <1>;
90 #dma-channels = <32>; 90 dma-channels = <32>;
91 #dma-requests = <64>; 91 dma-requests = <64>;
92 }; 92 };
93 93
94 i2c1: i2c@48070000 { 94 i2c1: i2c@48070000 {
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index 60403273f83e..db80f9d376fa 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -16,6 +16,13 @@
16 model = "Nokia N900"; 16 model = "Nokia N900";
17 compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3"; 17 compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3";
18 18
19 aliases {
20 i2c0;
21 i2c1 = &i2c1;
22 i2c2 = &i2c2;
23 i2c3 = &i2c3;
24 };
25
19 cpus { 26 cpus {
20 cpu@0 { 27 cpu@0 {
21 cpu0-supply = <&vcc>; 28 cpu0-supply = <&vcc>;
@@ -704,7 +711,7 @@
704 compatible = "smsc,lan91c94"; 711 compatible = "smsc,lan91c94";
705 interrupt-parent = <&gpio2>; 712 interrupt-parent = <&gpio2>;
706 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; /* gpio54 */ 713 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; /* gpio54 */
707 reg = <1 0x300 0xf>; /* 16 byte IO range at offset 0x300 */ 714 reg = <1 0 0xf>; /* 16 byte IO range */
708 bank-width = <2>; 715 bank-width = <2>;
709 pinctrl-names = "default"; 716 pinctrl-names = "default";
710 pinctrl-0 = <&ethernet_pins>; 717 pinctrl-0 = <&ethernet_pins>;
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 01b71111bd55..f4f78c40b564 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -155,8 +155,8 @@
155 <14>, 155 <14>,
156 <15>; 156 <15>;
157 #dma-cells = <1>; 157 #dma-cells = <1>;
158 #dma-channels = <32>; 158 dma-channels = <32>;
159 #dma-requests = <96>; 159 dma-requests = <96>;
160 }; 160 };
161 161
162 omap3_pmx_core: pinmux@48002030 { 162 omap3_pmx_core: pinmux@48002030 {
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 074147cebae4..87401d9f4d8b 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -223,8 +223,8 @@
223 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 223 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
224 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 224 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
225 #dma-cells = <1>; 225 #dma-cells = <1>;
226 #dma-channels = <32>; 226 dma-channels = <32>;
227 #dma-requests = <127>; 227 dma-requests = <127>;
228 }; 228 };
229 229
230 gpio1: gpio@4a310000 { 230 gpio1: gpio@4a310000 {
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index b321fdf42c9f..ddff674bd05e 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -238,8 +238,8 @@
238 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 238 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
239 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 239 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
240 #dma-cells = <1>; 240 #dma-cells = <1>;
241 #dma-channels = <32>; 241 dma-channels = <32>;
242 #dma-requests = <127>; 242 dma-requests = <127>;
243 }; 243 };
244 244
245 gpio1: gpio@4ae10000 { 245 gpio1: gpio@4ae10000 {
@@ -929,8 +929,8 @@
929 <0x4A096800 0x40>; /* pll_ctrl */ 929 <0x4A096800 0x40>; /* pll_ctrl */
930 reg-names = "phy_rx", "phy_tx", "pll_ctrl"; 930 reg-names = "phy_rx", "phy_tx", "pll_ctrl";
931 ctrl-module = <&omap_control_sata>; 931 ctrl-module = <&omap_control_sata>;
932 clocks = <&sys_clkin>; 932 clocks = <&sys_clkin>, <&sata_ref_clk>;
933 clock-names = "sysclk"; 933 clock-names = "sysclk", "refclk";
934 #phy-cells = <0>; 934 #phy-cells = <0>;
935 }; 935 };
936 }; 936 };
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 252c3d1bda50..9d8760956752 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -713,6 +713,9 @@
713 reg-shift = <2>; 713 reg-shift = <2>;
714 reg-io-width = <4>; 714 reg-io-width = <4>;
715 clocks = <&l4_sp_clk>; 715 clocks = <&l4_sp_clk>;
716 dmas = <&pdma 28>,
717 <&pdma 29>;
718 dma-names = "tx", "rx";
716 }; 719 };
717 720
718 uart1: serial1@ffc03000 { 721 uart1: serial1@ffc03000 {
@@ -722,6 +725,9 @@
722 reg-shift = <2>; 725 reg-shift = <2>;
723 reg-io-width = <4>; 726 reg-io-width = <4>;
724 clocks = <&l4_sp_clk>; 727 clocks = <&l4_sp_clk>;
728 dmas = <&pdma 30>,
729 <&pdma 31>;
730 dma-names = "tx", "rx";
725 }; 731 };
726 732
727 rst: rstmgr@ffd05000 { 733 rst: rstmgr@ffd05000 {
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index e8a4c955241b..06075b6d2463 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -62,6 +62,17 @@ CONFIG_MACH_SPEAR1340=y
62CONFIG_ARCH_STI=y 62CONFIG_ARCH_STI=y
63CONFIG_ARCH_EXYNOS=y 63CONFIG_ARCH_EXYNOS=y
64CONFIG_EXYNOS5420_MCPM=y 64CONFIG_EXYNOS5420_MCPM=y
65CONFIG_ARCH_SHMOBILE_MULTI=y
66CONFIG_ARCH_EMEV2=y
67CONFIG_ARCH_R7S72100=y
68CONFIG_ARCH_R8A73A4=y
69CONFIG_ARCH_R8A7740=y
70CONFIG_ARCH_R8A7779=y
71CONFIG_ARCH_R8A7790=y
72CONFIG_ARCH_R8A7791=y
73CONFIG_ARCH_R8A7794=y
74CONFIG_ARCH_SH73A0=y
75CONFIG_MACH_MARZEN=y
65CONFIG_ARCH_SUNXI=y 76CONFIG_ARCH_SUNXI=y
66CONFIG_ARCH_SIRF=y 77CONFIG_ARCH_SIRF=y
67CONFIG_ARCH_TEGRA=y 78CONFIG_ARCH_TEGRA=y
@@ -84,9 +95,11 @@ CONFIG_PCI_KEYSTONE=y
84CONFIG_PCI_MSI=y 95CONFIG_PCI_MSI=y
85CONFIG_PCI_MVEBU=y 96CONFIG_PCI_MVEBU=y
86CONFIG_PCI_TEGRA=y 97CONFIG_PCI_TEGRA=y
98CONFIG_PCI_RCAR_GEN2=y
99CONFIG_PCI_RCAR_GEN2_PCIE=y
87CONFIG_PCIEPORTBUS=y 100CONFIG_PCIEPORTBUS=y
88CONFIG_SMP=y 101CONFIG_SMP=y
89CONFIG_NR_CPUS=8 102CONFIG_NR_CPUS=16
90CONFIG_HIGHPTE=y 103CONFIG_HIGHPTE=y
91CONFIG_CMA=y 104CONFIG_CMA=y
92CONFIG_ARM_APPENDED_DTB=y 105CONFIG_ARM_APPENDED_DTB=y
@@ -130,6 +143,7 @@ CONFIG_DEVTMPFS_MOUNT=y
130CONFIG_DMA_CMA=y 143CONFIG_DMA_CMA=y
131CONFIG_CMA_SIZE_MBYTES=64 144CONFIG_CMA_SIZE_MBYTES=64
132CONFIG_OMAP_OCP2SCP=y 145CONFIG_OMAP_OCP2SCP=y
146CONFIG_SIMPLE_PM_BUS=y
133CONFIG_MTD=y 147CONFIG_MTD=y
134CONFIG_MTD_CMDLINE_PARTS=y 148CONFIG_MTD_CMDLINE_PARTS=y
135CONFIG_MTD_BLOCK=y 149CONFIG_MTD_BLOCK=y
@@ -157,6 +171,7 @@ CONFIG_AHCI_SUNXI=y
157CONFIG_AHCI_TEGRA=y 171CONFIG_AHCI_TEGRA=y
158CONFIG_SATA_HIGHBANK=y 172CONFIG_SATA_HIGHBANK=y
159CONFIG_SATA_MV=y 173CONFIG_SATA_MV=y
174CONFIG_SATA_RCAR=y
160CONFIG_NETDEVICES=y 175CONFIG_NETDEVICES=y
161CONFIG_HIX5HD2_GMAC=y 176CONFIG_HIX5HD2_GMAC=y
162CONFIG_SUN4I_EMAC=y 177CONFIG_SUN4I_EMAC=y
@@ -167,14 +182,17 @@ CONFIG_MV643XX_ETH=y
167CONFIG_MVNETA=y 182CONFIG_MVNETA=y
168CONFIG_KS8851=y 183CONFIG_KS8851=y
169CONFIG_R8169=y 184CONFIG_R8169=y
185CONFIG_SH_ETH=y
170CONFIG_SMSC911X=y 186CONFIG_SMSC911X=y
171CONFIG_STMMAC_ETH=y 187CONFIG_STMMAC_ETH=y
172CONFIG_TI_CPSW=y 188CONFIG_TI_CPSW=y
173CONFIG_XILINX_EMACLITE=y 189CONFIG_XILINX_EMACLITE=y
174CONFIG_AT803X_PHY=y 190CONFIG_AT803X_PHY=y
175CONFIG_MARVELL_PHY=y 191CONFIG_MARVELL_PHY=y
192CONFIG_SMSC_PHY=y
176CONFIG_BROADCOM_PHY=y 193CONFIG_BROADCOM_PHY=y
177CONFIG_ICPLUS_PHY=y 194CONFIG_ICPLUS_PHY=y
195CONFIG_MICREL_PHY=y
178CONFIG_USB_PEGASUS=y 196CONFIG_USB_PEGASUS=y
179CONFIG_USB_USBNET=y 197CONFIG_USB_USBNET=y
180CONFIG_USB_NET_SMSC75XX=y 198CONFIG_USB_NET_SMSC75XX=y
@@ -192,15 +210,18 @@ CONFIG_KEYBOARD_CROS_EC=y
192CONFIG_MOUSE_PS2_ELANTECH=y 210CONFIG_MOUSE_PS2_ELANTECH=y
193CONFIG_INPUT_TOUCHSCREEN=y 211CONFIG_INPUT_TOUCHSCREEN=y
194CONFIG_TOUCHSCREEN_ATMEL_MXT=y 212CONFIG_TOUCHSCREEN_ATMEL_MXT=y
213CONFIG_TOUCHSCREEN_ST1232=m
195CONFIG_TOUCHSCREEN_STMPE=y 214CONFIG_TOUCHSCREEN_STMPE=y
196CONFIG_TOUCHSCREEN_SUN4I=y 215CONFIG_TOUCHSCREEN_SUN4I=y
197CONFIG_INPUT_MISC=y 216CONFIG_INPUT_MISC=y
198CONFIG_INPUT_MPU3050=y 217CONFIG_INPUT_MPU3050=y
199CONFIG_INPUT_AXP20X_PEK=y 218CONFIG_INPUT_AXP20X_PEK=y
219CONFIG_INPUT_ADXL34X=m
200CONFIG_SERIO_AMBAKMI=y 220CONFIG_SERIO_AMBAKMI=y
201CONFIG_SERIAL_8250=y 221CONFIG_SERIAL_8250=y
202CONFIG_SERIAL_8250_CONSOLE=y 222CONFIG_SERIAL_8250_CONSOLE=y
203CONFIG_SERIAL_8250_DW=y 223CONFIG_SERIAL_8250_DW=y
224CONFIG_SERIAL_8250_EM=y
204CONFIG_SERIAL_8250_MT6577=y 225CONFIG_SERIAL_8250_MT6577=y
205CONFIG_SERIAL_AMBA_PL011=y 226CONFIG_SERIAL_AMBA_PL011=y
206CONFIG_SERIAL_AMBA_PL011_CONSOLE=y 227CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
@@ -213,6 +234,9 @@ CONFIG_SERIAL_SIRFSOC_CONSOLE=y
213CONFIG_SERIAL_TEGRA=y 234CONFIG_SERIAL_TEGRA=y
214CONFIG_SERIAL_IMX=y 235CONFIG_SERIAL_IMX=y
215CONFIG_SERIAL_IMX_CONSOLE=y 236CONFIG_SERIAL_IMX_CONSOLE=y
237CONFIG_SERIAL_SH_SCI=y
238CONFIG_SERIAL_SH_SCI_NR_UARTS=20
239CONFIG_SERIAL_SH_SCI_CONSOLE=y
216CONFIG_SERIAL_MSM=y 240CONFIG_SERIAL_MSM=y
217CONFIG_SERIAL_MSM_CONSOLE=y 241CONFIG_SERIAL_MSM_CONSOLE=y
218CONFIG_SERIAL_VT8500=y 242CONFIG_SERIAL_VT8500=y
@@ -233,19 +257,26 @@ CONFIG_I2C_MUX_PCA954x=y
233CONFIG_I2C_MUX_PINCTRL=y 257CONFIG_I2C_MUX_PINCTRL=y
234CONFIG_I2C_CADENCE=y 258CONFIG_I2C_CADENCE=y
235CONFIG_I2C_DESIGNWARE_PLATFORM=y 259CONFIG_I2C_DESIGNWARE_PLATFORM=y
260CONFIG_I2C_GPIO=m
236CONFIG_I2C_EXYNOS5=y 261CONFIG_I2C_EXYNOS5=y
237CONFIG_I2C_MV64XXX=y 262CONFIG_I2C_MV64XXX=y
263CONFIG_I2C_RIIC=y
238CONFIG_I2C_S3C2410=y 264CONFIG_I2C_S3C2410=y
265CONFIG_I2C_SH_MOBILE=y
239CONFIG_I2C_SIRF=y 266CONFIG_I2C_SIRF=y
240CONFIG_I2C_TEGRA=y
241CONFIG_I2C_ST=y 267CONFIG_I2C_ST=y
242CONFIG_SPI=y 268CONFIG_I2C_TEGRA=y
243CONFIG_I2C_XILINX=y 269CONFIG_I2C_XILINX=y
244CONFIG_SPI_DAVINCI=y 270CONFIG_I2C_RCAR=y
271CONFIG_SPI=y
245CONFIG_SPI_CADENCE=y 272CONFIG_SPI_CADENCE=y
273CONFIG_SPI_DAVINCI=y
246CONFIG_SPI_OMAP24XX=y 274CONFIG_SPI_OMAP24XX=y
247CONFIG_SPI_ORION=y 275CONFIG_SPI_ORION=y
248CONFIG_SPI_PL022=y 276CONFIG_SPI_PL022=y
277CONFIG_SPI_RSPI=y
278CONFIG_SPI_SH_MSIOF=m
279CONFIG_SPI_SH_HSPI=y
249CONFIG_SPI_SIRF=y 280CONFIG_SPI_SIRF=y
250CONFIG_SPI_SUN4I=y 281CONFIG_SPI_SUN4I=y
251CONFIG_SPI_SUN6I=y 282CONFIG_SPI_SUN6I=y
@@ -259,12 +290,15 @@ CONFIG_PINCTRL_PALMAS=y
259CONFIG_PINCTRL_APQ8084=y 290CONFIG_PINCTRL_APQ8084=y
260CONFIG_GPIO_SYSFS=y 291CONFIG_GPIO_SYSFS=y
261CONFIG_GPIO_GENERIC_PLATFORM=y 292CONFIG_GPIO_GENERIC_PLATFORM=y
262CONFIG_GPIO_DWAPB=y
263CONFIG_GPIO_DAVINCI=y 293CONFIG_GPIO_DAVINCI=y
294CONFIG_GPIO_DWAPB=y
295CONFIG_GPIO_EM=y
296CONFIG_GPIO_RCAR=y
264CONFIG_GPIO_XILINX=y 297CONFIG_GPIO_XILINX=y
265CONFIG_GPIO_ZYNQ=y 298CONFIG_GPIO_ZYNQ=y
266CONFIG_GPIO_PCA953X=y 299CONFIG_GPIO_PCA953X=y
267CONFIG_GPIO_PCA953X_IRQ=y 300CONFIG_GPIO_PCA953X_IRQ=y
301CONFIG_GPIO_PCF857X=y
268CONFIG_GPIO_TWL4030=y 302CONFIG_GPIO_TWL4030=y
269CONFIG_GPIO_PALMAS=y 303CONFIG_GPIO_PALMAS=y
270CONFIG_GPIO_SYSCON=y 304CONFIG_GPIO_SYSCON=y
@@ -276,10 +310,12 @@ CONFIG_POWER_RESET_AS3722=y
276CONFIG_POWER_RESET_GPIO=y 310CONFIG_POWER_RESET_GPIO=y
277CONFIG_POWER_RESET_KEYSTONE=y 311CONFIG_POWER_RESET_KEYSTONE=y
278CONFIG_POWER_RESET_SUN6I=y 312CONFIG_POWER_RESET_SUN6I=y
313CONFIG_POWER_RESET_RMOBILE=y
279CONFIG_SENSORS_LM90=y 314CONFIG_SENSORS_LM90=y
280CONFIG_SENSORS_LM95245=y 315CONFIG_SENSORS_LM95245=y
281CONFIG_THERMAL=y 316CONFIG_THERMAL=y
282CONFIG_CPU_THERMAL=y 317CONFIG_CPU_THERMAL=y
318CONFIG_RCAR_THERMAL=y
283CONFIG_ARMADA_THERMAL=y 319CONFIG_ARMADA_THERMAL=y
284CONFIG_DAVINCI_WATCHDOG 320CONFIG_DAVINCI_WATCHDOG
285CONFIG_ST_THERMAL_SYSCFG=y 321CONFIG_ST_THERMAL_SYSCFG=y
@@ -290,6 +326,7 @@ CONFIG_ARM_SP805_WATCHDOG=y
290CONFIG_ORION_WATCHDOG=y 326CONFIG_ORION_WATCHDOG=y
291CONFIG_SUNXI_WATCHDOG=y 327CONFIG_SUNXI_WATCHDOG=y
292CONFIG_MESON_WATCHDOG=y 328CONFIG_MESON_WATCHDOG=y
329CONFIG_MFD_AS3711=y
293CONFIG_MFD_AS3722=y 330CONFIG_MFD_AS3722=y
294CONFIG_MFD_BCM590XX=y 331CONFIG_MFD_BCM590XX=y
295CONFIG_MFD_AXP20X=y 332CONFIG_MFD_AXP20X=y
@@ -304,13 +341,16 @@ CONFIG_MFD_TPS65090=y
304CONFIG_MFD_TPS6586X=y 341CONFIG_MFD_TPS6586X=y
305CONFIG_MFD_TPS65910=y 342CONFIG_MFD_TPS65910=y
306CONFIG_REGULATOR_AB8500=y 343CONFIG_REGULATOR_AB8500=y
344CONFIG_REGULATOR_AS3711=y
307CONFIG_REGULATOR_AS3722=y 345CONFIG_REGULATOR_AS3722=y
308CONFIG_REGULATOR_AXP20X=y 346CONFIG_REGULATOR_AXP20X=y
309CONFIG_REGULATOR_BCM590XX=y 347CONFIG_REGULATOR_BCM590XX=y
348CONFIG_REGULATOR_DA9210=y
310CONFIG_REGULATOR_GPIO=y 349CONFIG_REGULATOR_GPIO=y
311CONFIG_MFD_SYSCON=y 350CONFIG_MFD_SYSCON=y
312CONFIG_POWER_RESET_SYSCON=y 351CONFIG_POWER_RESET_SYSCON=y
313CONFIG_REGULATOR_MAX8907=y 352CONFIG_REGULATOR_MAX8907=y
353CONFIG_REGULATOR_MAX8973=y
314CONFIG_REGULATOR_MAX77686=y 354CONFIG_REGULATOR_MAX77686=y
315CONFIG_REGULATOR_PALMAS=y 355CONFIG_REGULATOR_PALMAS=y
316CONFIG_REGULATOR_S2MPS11=y 356CONFIG_REGULATOR_S2MPS11=y
@@ -324,18 +364,32 @@ CONFIG_REGULATOR_TWL4030=y
324CONFIG_REGULATOR_VEXPRESS=y 364CONFIG_REGULATOR_VEXPRESS=y
325CONFIG_MEDIA_SUPPORT=y 365CONFIG_MEDIA_SUPPORT=y
326CONFIG_MEDIA_CAMERA_SUPPORT=y 366CONFIG_MEDIA_CAMERA_SUPPORT=y
367CONFIG_MEDIA_CONTROLLER=y
368CONFIG_VIDEO_V4L2_SUBDEV_API=y
327CONFIG_MEDIA_USB_SUPPORT=y 369CONFIG_MEDIA_USB_SUPPORT=y
328CONFIG_USB_VIDEO_CLASS=y 370CONFIG_USB_VIDEO_CLASS=y
329CONFIG_USB_GSPCA=y 371CONFIG_USB_GSPCA=y
372CONFIG_V4L_PLATFORM_DRIVERS=y
373CONFIG_SOC_CAMERA=m
374CONFIG_SOC_CAMERA_PLATFORM=m
375CONFIG_VIDEO_RCAR_VIN=m
376CONFIG_V4L_MEM2MEM_DRIVERS=y
377CONFIG_VIDEO_RENESAS_VSP1=m
378# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
379CONFIG_VIDEO_ADV7180=m
330CONFIG_DRM=y 380CONFIG_DRM=y
381CONFIG_DRM_RCAR_DU=m
331CONFIG_DRM_TEGRA=y 382CONFIG_DRM_TEGRA=y
332CONFIG_DRM_PANEL_SIMPLE=y 383CONFIG_DRM_PANEL_SIMPLE=y
333CONFIG_FB_ARMCLCD=y 384CONFIG_FB_ARMCLCD=y
334CONFIG_FB_WM8505=y 385CONFIG_FB_WM8505=y
386CONFIG_FB_SH_MOBILE_LCDC=y
335CONFIG_FB_SIMPLE=y 387CONFIG_FB_SIMPLE=y
388CONFIG_FB_SH_MOBILE_MERAM=y
336CONFIG_BACKLIGHT_LCD_SUPPORT=y 389CONFIG_BACKLIGHT_LCD_SUPPORT=y
337CONFIG_BACKLIGHT_CLASS_DEVICE=y 390CONFIG_BACKLIGHT_CLASS_DEVICE=y
338CONFIG_BACKLIGHT_PWM=y 391CONFIG_BACKLIGHT_PWM=y
392CONFIG_BACKLIGHT_AS3711=y
339CONFIG_FRAMEBUFFER_CONSOLE=y 393CONFIG_FRAMEBUFFER_CONSOLE=y
340CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y 394CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
341CONFIG_SOUND=y 395CONFIG_SOUND=y
@@ -343,6 +397,8 @@ CONFIG_SND=y
343CONFIG_SND_DYNAMIC_MINORS=y 397CONFIG_SND_DYNAMIC_MINORS=y
344CONFIG_SND_USB_AUDIO=y 398CONFIG_SND_USB_AUDIO=y
345CONFIG_SND_SOC=y 399CONFIG_SND_SOC=y
400CONFIG_SND_SOC_SH4_FSI=m
401CONFIG_SND_SOC_RCAR=m
346CONFIG_SND_SOC_TEGRA=y 402CONFIG_SND_SOC_TEGRA=y
347CONFIG_SND_SOC_TEGRA_RT5640=y 403CONFIG_SND_SOC_TEGRA_RT5640=y
348CONFIG_SND_SOC_TEGRA_WM8753=y 404CONFIG_SND_SOC_TEGRA_WM8753=y
@@ -350,6 +406,8 @@ CONFIG_SND_SOC_TEGRA_WM8903=y
350CONFIG_SND_SOC_TEGRA_TRIMSLICE=y 406CONFIG_SND_SOC_TEGRA_TRIMSLICE=y
351CONFIG_SND_SOC_TEGRA_ALC5632=y 407CONFIG_SND_SOC_TEGRA_ALC5632=y
352CONFIG_SND_SOC_TEGRA_MAX98090=y 408CONFIG_SND_SOC_TEGRA_MAX98090=y
409CONFIG_SND_SOC_AK4642=m
410CONFIG_SND_SOC_WM8978=m
353CONFIG_USB=y 411CONFIG_USB=y
354CONFIG_USB_XHCI_HCD=y 412CONFIG_USB_XHCI_HCD=y
355CONFIG_USB_XHCI_MVEBU=y 413CONFIG_USB_XHCI_MVEBU=y
@@ -362,6 +420,8 @@ CONFIG_USB_ISP1760_HCD=y
362CONFIG_USB_OHCI_HCD=y 420CONFIG_USB_OHCI_HCD=y
363CONFIG_USB_OHCI_HCD_STI=y 421CONFIG_USB_OHCI_HCD_STI=y
364CONFIG_USB_OHCI_HCD_PLATFORM=y 422CONFIG_USB_OHCI_HCD_PLATFORM=y
423CONFIG_USB_R8A66597_HCD=m
424CONFIG_USB_RENESAS_USBHS=m
365CONFIG_USB_STORAGE=y 425CONFIG_USB_STORAGE=y
366CONFIG_USB_DWC3=y 426CONFIG_USB_DWC3=y
367CONFIG_USB_CHIPIDEA=y 427CONFIG_USB_CHIPIDEA=y
@@ -374,6 +434,10 @@ CONFIG_SAMSUNG_USB3PHY=y
374CONFIG_USB_GPIO_VBUS=y 434CONFIG_USB_GPIO_VBUS=y
375CONFIG_USB_ISP1301=y 435CONFIG_USB_ISP1301=y
376CONFIG_USB_MXS_PHY=y 436CONFIG_USB_MXS_PHY=y
437CONFIG_USB_RCAR_PHY=m
438CONFIG_USB_RCAR_GEN2_PHY=m
439CONFIG_USB_GADGET=y
440CONFIG_USB_RENESAS_USBHS_UDC=m
377CONFIG_MMC=y 441CONFIG_MMC=y
378CONFIG_MMC_BLOCK_MINORS=16 442CONFIG_MMC_BLOCK_MINORS=16
379CONFIG_MMC_ARMMMCI=y 443CONFIG_MMC_ARMMMCI=y
@@ -392,12 +456,14 @@ CONFIG_MMC_SDHCI_ST=y
392CONFIG_MMC_OMAP=y 456CONFIG_MMC_OMAP=y
393CONFIG_MMC_OMAP_HS=y 457CONFIG_MMC_OMAP_HS=y
394CONFIG_MMC_MVSDIO=y 458CONFIG_MMC_MVSDIO=y
395CONFIG_MMC_SUNXI=y 459CONFIG_MMC_SDHI=y
396CONFIG_MMC_DW=y 460CONFIG_MMC_DW=y
397CONFIG_MMC_DW_IDMAC=y 461CONFIG_MMC_DW_IDMAC=y
398CONFIG_MMC_DW_PLTFM=y 462CONFIG_MMC_DW_PLTFM=y
399CONFIG_MMC_DW_EXYNOS=y 463CONFIG_MMC_DW_EXYNOS=y
400CONFIG_MMC_DW_ROCKCHIP=y 464CONFIG_MMC_DW_ROCKCHIP=y
465CONFIG_MMC_SH_MMCIF=y
466CONFIG_MMC_SUNXI=y
401CONFIG_NEW_LEDS=y 467CONFIG_NEW_LEDS=y
402CONFIG_LEDS_CLASS=y 468CONFIG_LEDS_CLASS=y
403CONFIG_LEDS_GPIO=y 469CONFIG_LEDS_GPIO=y
@@ -421,10 +487,12 @@ CONFIG_RTC_DRV_AS3722=y
421CONFIG_RTC_DRV_DS1307=y 487CONFIG_RTC_DRV_DS1307=y
422CONFIG_RTC_DRV_MAX8907=y 488CONFIG_RTC_DRV_MAX8907=y
423CONFIG_RTC_DRV_MAX77686=y 489CONFIG_RTC_DRV_MAX77686=y
490CONFIG_RTC_DRV_RS5C372=m
424CONFIG_RTC_DRV_PALMAS=y 491CONFIG_RTC_DRV_PALMAS=y
425CONFIG_RTC_DRV_TWL4030=y 492CONFIG_RTC_DRV_TWL4030=y
426CONFIG_RTC_DRV_TPS6586X=y 493CONFIG_RTC_DRV_TPS6586X=y
427CONFIG_RTC_DRV_TPS65910=y 494CONFIG_RTC_DRV_TPS65910=y
495CONFIG_RTC_DRV_S35390A=m
428CONFIG_RTC_DRV_EM3027=y 496CONFIG_RTC_DRV_EM3027=y
429CONFIG_RTC_DRV_PL031=y 497CONFIG_RTC_DRV_PL031=y
430CONFIG_RTC_DRV_VT8500=y 498CONFIG_RTC_DRV_VT8500=y
@@ -436,6 +504,9 @@ CONFIG_DMADEVICES=y
436CONFIG_DW_DMAC=y 504CONFIG_DW_DMAC=y
437CONFIG_MV_XOR=y 505CONFIG_MV_XOR=y
438CONFIG_TEGRA20_APB_DMA=y 506CONFIG_TEGRA20_APB_DMA=y
507CONFIG_SH_DMAE=y
508CONFIG_RCAR_AUDMAC_PP=m
509CONFIG_RCAR_DMAC=y
439CONFIG_STE_DMA40=y 510CONFIG_STE_DMA40=y
440CONFIG_SIRF_DMA=y 511CONFIG_SIRF_DMA=y
441CONFIG_TI_EDMA=y 512CONFIG_TI_EDMA=y
@@ -468,6 +539,7 @@ CONFIG_IIO=y
468CONFIG_XILINX_XADC=y 539CONFIG_XILINX_XADC=y
469CONFIG_AK8975=y 540CONFIG_AK8975=y
470CONFIG_PWM=y 541CONFIG_PWM=y
542CONFIG_PWM_RENESAS_TPU=y
471CONFIG_PWM_TEGRA=y 543CONFIG_PWM_TEGRA=y
472CONFIG_PWM_VT8500=y 544CONFIG_PWM_VT8500=y
473CONFIG_PHY_HIX5HD2_SATA=y 545CONFIG_PHY_HIX5HD2_SATA=y
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index b7386524c356..a097cffa1231 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -114,6 +114,7 @@ CONFIG_MTD_PHYSMAP_OF=y
114CONFIG_MTD_NAND=y 114CONFIG_MTD_NAND=y
115CONFIG_MTD_NAND_ECC_BCH=y 115CONFIG_MTD_NAND_ECC_BCH=y
116CONFIG_MTD_NAND_OMAP2=y 116CONFIG_MTD_NAND_OMAP2=y
117CONFIG_MTD_NAND_OMAP_BCH=y
117CONFIG_MTD_ONENAND=y 118CONFIG_MTD_ONENAND=y
118CONFIG_MTD_ONENAND_VERIFY_WRITE=y 119CONFIG_MTD_ONENAND_VERIFY_WRITE=y
119CONFIG_MTD_ONENAND_OMAP2=y 120CONFIG_MTD_ONENAND_OMAP2=y
@@ -248,6 +249,7 @@ CONFIG_TWL6040_CORE=y
248CONFIG_REGULATOR_PALMAS=y 249CONFIG_REGULATOR_PALMAS=y
249CONFIG_REGULATOR_PBIAS=y 250CONFIG_REGULATOR_PBIAS=y
250CONFIG_REGULATOR_TI_ABB=y 251CONFIG_REGULATOR_TI_ABB=y
252CONFIG_REGULATOR_TPS62360=m
251CONFIG_REGULATOR_TPS65023=y 253CONFIG_REGULATOR_TPS65023=y
252CONFIG_REGULATOR_TPS6507X=y 254CONFIG_REGULATOR_TPS6507X=y
253CONFIG_REGULATOR_TPS65217=y 255CONFIG_REGULATOR_TPS65217=y
@@ -374,7 +376,7 @@ CONFIG_PWM_TIEHRPWM=m
374CONFIG_PWM_TWL=m 376CONFIG_PWM_TWL=m
375CONFIG_PWM_TWL_LED=m 377CONFIG_PWM_TWL_LED=m
376CONFIG_OMAP_USB2=m 378CONFIG_OMAP_USB2=m
377CONFIG_TI_PIPE3=m 379CONFIG_TI_PIPE3=y
378CONFIG_EXT2_FS=y 380CONFIG_EXT2_FS=y
379CONFIG_EXT3_FS=y 381CONFIG_EXT3_FS=y
380# CONFIG_EXT3_FS_XATTR is not set 382# CONFIG_EXT3_FS_XATTR is not set
diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig
index 38840a812924..8f6a5702b696 100644
--- a/arch/arm/configs/sunxi_defconfig
+++ b/arch/arm/configs/sunxi_defconfig
@@ -4,6 +4,7 @@ CONFIG_BLK_DEV_INITRD=y
4CONFIG_PERF_EVENTS=y 4CONFIG_PERF_EVENTS=y
5CONFIG_ARCH_SUNXI=y 5CONFIG_ARCH_SUNXI=y
6CONFIG_SMP=y 6CONFIG_SMP=y
7CONFIG_NR_CPUS=8
7CONFIG_AEABI=y 8CONFIG_AEABI=y
8CONFIG_HIGHMEM=y 9CONFIG_HIGHMEM=y
9CONFIG_HIGHPTE=y 10CONFIG_HIGHPTE=y
diff --git a/arch/arm/mach-asm9260/Kconfig b/arch/arm/mach-asm9260/Kconfig
index 8423be76080e..52241207a82a 100644
--- a/arch/arm/mach-asm9260/Kconfig
+++ b/arch/arm/mach-asm9260/Kconfig
@@ -2,5 +2,7 @@ config MACH_ASM9260
2 bool "Alphascale ASM9260" 2 bool "Alphascale ASM9260"
3 depends on ARCH_MULTI_V5 3 depends on ARCH_MULTI_V5
4 select CPU_ARM926T 4 select CPU_ARM926T
5 select ASM9260_TIMER
6 select GENERIC_CLOCKEVENTS
5 help 7 help
6 Support for Alphascale ASM9260 based platform. 8 Support for Alphascale ASM9260 based platform.
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 3f32c47a6d74..d2e9f12d12f1 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -126,8 +126,7 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
126 */ 126 */
127void exynos_cpu_power_down(int cpu) 127void exynos_cpu_power_down(int cpu)
128{ 128{
129 if (cpu == 0 && (of_machine_is_compatible("samsung,exynos5420") || 129 if (cpu == 0 && (soc_is_exynos5420() || soc_is_exynos5800())) {
130 of_machine_is_compatible("samsung,exynos5800"))) {
131 /* 130 /*
132 * Bypass power down for CPU0 during suspend. Check for 131 * Bypass power down for CPU0 during suspend. Check for
133 * the SYS_PWR_REG value to decide if we are suspending 132 * the SYS_PWR_REG value to decide if we are suspending
diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c
index 20f267121b3e..37266a826437 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -161,6 +161,34 @@ no_clk:
161 of_genpd_add_provider_simple(np, &pd->pd); 161 of_genpd_add_provider_simple(np, &pd->pd);
162 } 162 }
163 163
164 /* Assign the child power domains to their parents */
165 for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") {
166 struct generic_pm_domain *child_domain, *parent_domain;
167 struct of_phandle_args args;
168
169 args.np = np;
170 args.args_count = 0;
171 child_domain = of_genpd_get_from_provider(&args);
172 if (!child_domain)
173 continue;
174
175 if (of_parse_phandle_with_args(np, "power-domains",
176 "#power-domain-cells", 0, &args) != 0)
177 continue;
178
179 parent_domain = of_genpd_get_from_provider(&args);
180 if (!parent_domain)
181 continue;
182
183 if (pm_genpd_add_subdomain(parent_domain, child_domain))
184 pr_warn("%s failed to add subdomain: %s\n",
185 parent_domain->name, child_domain->name);
186 else
187 pr_info("%s has as child subdomain: %s.\n",
188 parent_domain->name, child_domain->name);
189 of_node_put(np);
190 }
191
164 return 0; 192 return 0;
165} 193}
166arch_initcall(exynos4_pm_init_power_domain); 194arch_initcall(exynos4_pm_init_power_domain);
diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c
index 52e2b1a2fddb..318d127df147 100644
--- a/arch/arm/mach-exynos/suspend.c
+++ b/arch/arm/mach-exynos/suspend.c
@@ -87,8 +87,8 @@ static unsigned int exynos_pmu_spare3;
87static u32 exynos_irqwake_intmask = 0xffffffff; 87static u32 exynos_irqwake_intmask = 0xffffffff;
88 88
89static const struct exynos_wkup_irq exynos3250_wkup_irq[] = { 89static const struct exynos_wkup_irq exynos3250_wkup_irq[] = {
90 { 73, BIT(1) }, /* RTC alarm */ 90 { 105, BIT(1) }, /* RTC alarm */
91 { 74, BIT(2) }, /* RTC tick */ 91 { 106, BIT(2) }, /* RTC tick */
92 { /* sentinel */ }, 92 { /* sentinel */ },
93}; 93};
94 94
diff --git a/arch/arm/mach-socfpga/core.h b/arch/arm/mach-socfpga/core.h
index 483cb467bf65..a0f3b1cd497c 100644
--- a/arch/arm/mach-socfpga/core.h
+++ b/arch/arm/mach-socfpga/core.h
@@ -45,6 +45,6 @@ extern char secondary_trampoline, secondary_trampoline_end;
45 45
46extern unsigned long socfpga_cpu1start_addr; 46extern unsigned long socfpga_cpu1start_addr;
47 47
48#define SOCFPGA_SCU_VIRT_BASE 0xfffec000 48#define SOCFPGA_SCU_VIRT_BASE 0xfee00000
49 49
50#endif 50#endif
diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c
index 383d61e138af..f5e597c207b9 100644
--- a/arch/arm/mach-socfpga/socfpga.c
+++ b/arch/arm/mach-socfpga/socfpga.c
@@ -23,6 +23,7 @@
23#include <asm/hardware/cache-l2x0.h> 23#include <asm/hardware/cache-l2x0.h>
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
25#include <asm/mach/map.h> 25#include <asm/mach/map.h>
26#include <asm/cacheflush.h>
26 27
27#include "core.h" 28#include "core.h"
28 29
@@ -73,6 +74,10 @@ void __init socfpga_sysmgr_init(void)
73 (u32 *) &socfpga_cpu1start_addr)) 74 (u32 *) &socfpga_cpu1start_addr))
74 pr_err("SMP: Need cpu1-start-addr in device tree.\n"); 75 pr_err("SMP: Need cpu1-start-addr in device tree.\n");
75 76
77 /* Ensure that socfpga_cpu1start_addr is visible to other CPUs */
78 smp_wmb();
79 sync_cache_w(&socfpga_cpu1start_addr);
80
76 sys_manager_base_addr = of_iomap(np, 0); 81 sys_manager_base_addr = of_iomap(np, 0);
77 82
78 np = of_find_compatible_node(NULL, NULL, "altr,rst-mgr"); 83 np = of_find_compatible_node(NULL, NULL, "altr,rst-mgr");
diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts
index 27f32962e55c..4eac8dcea423 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8.dts
+++ b/arch/arm64/boot/dts/arm/foundation-v8.dts
@@ -34,6 +34,7 @@
34 reg = <0x0 0x0>; 34 reg = <0x0 0x0>;
35 enable-method = "spin-table"; 35 enable-method = "spin-table";
36 cpu-release-addr = <0x0 0x8000fff8>; 36 cpu-release-addr = <0x0 0x8000fff8>;
37 next-level-cache = <&L2_0>;
37 }; 38 };
38 cpu@1 { 39 cpu@1 {
39 device_type = "cpu"; 40 device_type = "cpu";
@@ -41,6 +42,7 @@
41 reg = <0x0 0x1>; 42 reg = <0x0 0x1>;
42 enable-method = "spin-table"; 43 enable-method = "spin-table";
43 cpu-release-addr = <0x0 0x8000fff8>; 44 cpu-release-addr = <0x0 0x8000fff8>;
45 next-level-cache = <&L2_0>;
44 }; 46 };
45 cpu@2 { 47 cpu@2 {
46 device_type = "cpu"; 48 device_type = "cpu";
@@ -48,6 +50,7 @@
48 reg = <0x0 0x2>; 50 reg = <0x0 0x2>;
49 enable-method = "spin-table"; 51 enable-method = "spin-table";
50 cpu-release-addr = <0x0 0x8000fff8>; 52 cpu-release-addr = <0x0 0x8000fff8>;
53 next-level-cache = <&L2_0>;
51 }; 54 };
52 cpu@3 { 55 cpu@3 {
53 device_type = "cpu"; 56 device_type = "cpu";
@@ -55,6 +58,11 @@
55 reg = <0x0 0x3>; 58 reg = <0x0 0x3>;
56 enable-method = "spin-table"; 59 enable-method = "spin-table";
57 cpu-release-addr = <0x0 0x8000fff8>; 60 cpu-release-addr = <0x0 0x8000fff8>;
61 next-level-cache = <&L2_0>;
62 };
63
64 L2_0: l2-cache0 {
65 compatible = "cache";
58 }; 66 };
59 }; 67 };
60 68
diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
index d429129ecb3d..133ee59de2d7 100644
--- a/arch/arm64/boot/dts/arm/juno.dts
+++ b/arch/arm64/boot/dts/arm/juno.dts
@@ -39,6 +39,7 @@
39 reg = <0x0 0x0>; 39 reg = <0x0 0x0>;
40 device_type = "cpu"; 40 device_type = "cpu";
41 enable-method = "psci"; 41 enable-method = "psci";
42 next-level-cache = <&A57_L2>;
42 }; 43 };
43 44
44 A57_1: cpu@1 { 45 A57_1: cpu@1 {
@@ -46,6 +47,7 @@
46 reg = <0x0 0x1>; 47 reg = <0x0 0x1>;
47 device_type = "cpu"; 48 device_type = "cpu";
48 enable-method = "psci"; 49 enable-method = "psci";
50 next-level-cache = <&A57_L2>;
49 }; 51 };
50 52
51 A53_0: cpu@100 { 53 A53_0: cpu@100 {
@@ -53,6 +55,7 @@
53 reg = <0x0 0x100>; 55 reg = <0x0 0x100>;
54 device_type = "cpu"; 56 device_type = "cpu";
55 enable-method = "psci"; 57 enable-method = "psci";
58 next-level-cache = <&A53_L2>;
56 }; 59 };
57 60
58 A53_1: cpu@101 { 61 A53_1: cpu@101 {
@@ -60,6 +63,7 @@
60 reg = <0x0 0x101>; 63 reg = <0x0 0x101>;
61 device_type = "cpu"; 64 device_type = "cpu";
62 enable-method = "psci"; 65 enable-method = "psci";
66 next-level-cache = <&A53_L2>;
63 }; 67 };
64 68
65 A53_2: cpu@102 { 69 A53_2: cpu@102 {
@@ -67,6 +71,7 @@
67 reg = <0x0 0x102>; 71 reg = <0x0 0x102>;
68 device_type = "cpu"; 72 device_type = "cpu";
69 enable-method = "psci"; 73 enable-method = "psci";
74 next-level-cache = <&A53_L2>;
70 }; 75 };
71 76
72 A53_3: cpu@103 { 77 A53_3: cpu@103 {
@@ -74,6 +79,15 @@
74 reg = <0x0 0x103>; 79 reg = <0x0 0x103>;
75 device_type = "cpu"; 80 device_type = "cpu";
76 enable-method = "psci"; 81 enable-method = "psci";
82 next-level-cache = <&A53_L2>;
83 };
84
85 A57_L2: l2-cache0 {
86 compatible = "cache";
87 };
88
89 A53_L2: l2-cache1 {
90 compatible = "cache";
77 }; 91 };
78 }; 92 };
79 93
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
index efc59b3baf63..20addabbd127 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
@@ -37,6 +37,7 @@
37 reg = <0x0 0x0>; 37 reg = <0x0 0x0>;
38 enable-method = "spin-table"; 38 enable-method = "spin-table";
39 cpu-release-addr = <0x0 0x8000fff8>; 39 cpu-release-addr = <0x0 0x8000fff8>;
40 next-level-cache = <&L2_0>;
40 }; 41 };
41 cpu@1 { 42 cpu@1 {
42 device_type = "cpu"; 43 device_type = "cpu";
@@ -44,6 +45,7 @@
44 reg = <0x0 0x1>; 45 reg = <0x0 0x1>;
45 enable-method = "spin-table"; 46 enable-method = "spin-table";
46 cpu-release-addr = <0x0 0x8000fff8>; 47 cpu-release-addr = <0x0 0x8000fff8>;
48 next-level-cache = <&L2_0>;
47 }; 49 };
48 cpu@2 { 50 cpu@2 {
49 device_type = "cpu"; 51 device_type = "cpu";
@@ -51,6 +53,7 @@
51 reg = <0x0 0x2>; 53 reg = <0x0 0x2>;
52 enable-method = "spin-table"; 54 enable-method = "spin-table";
53 cpu-release-addr = <0x0 0x8000fff8>; 55 cpu-release-addr = <0x0 0x8000fff8>;
56 next-level-cache = <&L2_0>;
54 }; 57 };
55 cpu@3 { 58 cpu@3 {
56 device_type = "cpu"; 59 device_type = "cpu";
@@ -58,6 +61,11 @@
58 reg = <0x0 0x3>; 61 reg = <0x0 0x3>;
59 enable-method = "spin-table"; 62 enable-method = "spin-table";
60 cpu-release-addr = <0x0 0x8000fff8>; 63 cpu-release-addr = <0x0 0x8000fff8>;
64 next-level-cache = <&L2_0>;
65 };
66
67 L2_0: l2-cache0 {
68 compatible = "cache";
61 }; 69 };
62 }; 70 };
63 71
diff --git a/arch/arm64/crypto/Makefile b/arch/arm64/crypto/Makefile
index 5720608c50b1..abb79b3cfcfe 100644
--- a/arch/arm64/crypto/Makefile
+++ b/arch/arm64/crypto/Makefile
@@ -29,7 +29,7 @@ aes-ce-blk-y := aes-glue-ce.o aes-ce.o
29obj-$(CONFIG_CRYPTO_AES_ARM64_NEON_BLK) += aes-neon-blk.o 29obj-$(CONFIG_CRYPTO_AES_ARM64_NEON_BLK) += aes-neon-blk.o
30aes-neon-blk-y := aes-glue-neon.o aes-neon.o 30aes-neon-blk-y := aes-glue-neon.o aes-neon.o
31 31
32AFLAGS_aes-ce.o := -DINTERLEAVE=2 -DINTERLEAVE_INLINE 32AFLAGS_aes-ce.o := -DINTERLEAVE=4
33AFLAGS_aes-neon.o := -DINTERLEAVE=4 33AFLAGS_aes-neon.o := -DINTERLEAVE=4
34 34
35CFLAGS_aes-glue-ce.o := -DUSE_V8_CRYPTO_EXTENSIONS 35CFLAGS_aes-glue-ce.o := -DUSE_V8_CRYPTO_EXTENSIONS
diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
index 5901480bfdca..750bac4e637e 100644
--- a/arch/arm64/include/asm/assembler.h
+++ b/arch/arm64/include/asm/assembler.h
@@ -20,6 +20,9 @@
20#error "Only include this from assembly code" 20#error "Only include this from assembly code"
21#endif 21#endif
22 22
23#ifndef __ASM_ASSEMBLER_H
24#define __ASM_ASSEMBLER_H
25
23#include <asm/ptrace.h> 26#include <asm/ptrace.h>
24#include <asm/thread_info.h> 27#include <asm/thread_info.h>
25 28
@@ -155,3 +158,5 @@ lr .req x30 // link register
155#endif 158#endif
156 orr \rd, \lbits, \hbits, lsl #32 159 orr \rd, \lbits, \hbits, lsl #32
157 .endm 160 .endm
161
162#endif /* __ASM_ASSEMBLER_H */
diff --git a/arch/arm64/include/asm/cpuidle.h b/arch/arm64/include/asm/cpuidle.h
index 0710654631e7..c60643f14cda 100644
--- a/arch/arm64/include/asm/cpuidle.h
+++ b/arch/arm64/include/asm/cpuidle.h
@@ -1,6 +1,8 @@
1#ifndef __ASM_CPUIDLE_H 1#ifndef __ASM_CPUIDLE_H
2#define __ASM_CPUIDLE_H 2#define __ASM_CPUIDLE_H
3 3
4#include <asm/proc-fns.h>
5
4#ifdef CONFIG_CPU_IDLE 6#ifdef CONFIG_CPU_IDLE
5extern int cpu_init_idle(unsigned int cpu); 7extern int cpu_init_idle(unsigned int cpu);
6extern int cpu_suspend(unsigned long arg); 8extern int cpu_suspend(unsigned long arg);
diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h
index e2ff32a93b5c..d2f49423c5dc 100644
--- a/arch/arm64/include/asm/insn.h
+++ b/arch/arm64/include/asm/insn.h
@@ -264,8 +264,10 @@ __AARCH64_INSN_FUNCS(ands, 0x7F200000, 0x6A000000)
264__AARCH64_INSN_FUNCS(bics, 0x7F200000, 0x6A200000) 264__AARCH64_INSN_FUNCS(bics, 0x7F200000, 0x6A200000)
265__AARCH64_INSN_FUNCS(b, 0xFC000000, 0x14000000) 265__AARCH64_INSN_FUNCS(b, 0xFC000000, 0x14000000)
266__AARCH64_INSN_FUNCS(bl, 0xFC000000, 0x94000000) 266__AARCH64_INSN_FUNCS(bl, 0xFC000000, 0x94000000)
267__AARCH64_INSN_FUNCS(cbz, 0xFE000000, 0x34000000) 267__AARCH64_INSN_FUNCS(cbz, 0x7F000000, 0x34000000)
268__AARCH64_INSN_FUNCS(cbnz, 0xFE000000, 0x35000000) 268__AARCH64_INSN_FUNCS(cbnz, 0x7F000000, 0x35000000)
269__AARCH64_INSN_FUNCS(tbz, 0x7F000000, 0x36000000)
270__AARCH64_INSN_FUNCS(tbnz, 0x7F000000, 0x37000000)
269__AARCH64_INSN_FUNCS(bcond, 0xFF000010, 0x54000000) 271__AARCH64_INSN_FUNCS(bcond, 0xFF000010, 0x54000000)
270__AARCH64_INSN_FUNCS(svc, 0xFFE0001F, 0xD4000001) 272__AARCH64_INSN_FUNCS(svc, 0xFFE0001F, 0xD4000001)
271__AARCH64_INSN_FUNCS(hvc, 0xFFE0001F, 0xD4000002) 273__AARCH64_INSN_FUNCS(hvc, 0xFFE0001F, 0xD4000002)
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
index 16449c535e50..800ec0e87ed9 100644
--- a/arch/arm64/include/asm/pgtable.h
+++ b/arch/arm64/include/asm/pgtable.h
@@ -460,7 +460,7 @@ static inline pud_t *pud_offset(pgd_t *pgd, unsigned long addr)
460static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 460static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
461{ 461{
462 const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY | 462 const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY |
463 PTE_PROT_NONE | PTE_VALID | PTE_WRITE; 463 PTE_PROT_NONE | PTE_WRITE | PTE_TYPE_MASK;
464 pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask); 464 pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
465 return pte; 465 return pte;
466} 466}
diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
index f9be30ea1cbd..20e9591a60cf 100644
--- a/arch/arm64/include/asm/processor.h
+++ b/arch/arm64/include/asm/processor.h
@@ -45,7 +45,8 @@
45#define STACK_TOP STACK_TOP_MAX 45#define STACK_TOP STACK_TOP_MAX
46#endif /* CONFIG_COMPAT */ 46#endif /* CONFIG_COMPAT */
47 47
48#define ARCH_LOW_ADDRESS_LIMIT PHYS_MASK 48extern phys_addr_t arm64_dma_phys_limit;
49#define ARCH_LOW_ADDRESS_LIMIT (arm64_dma_phys_limit - 1)
49#endif /* __KERNEL__ */ 50#endif /* __KERNEL__ */
50 51
51struct debug_info { 52struct debug_info {
diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
index 73f0ce570fb3..4abe9b945f77 100644
--- a/arch/arm64/include/asm/tlbflush.h
+++ b/arch/arm64/include/asm/tlbflush.h
@@ -24,11 +24,6 @@
24#include <linux/sched.h> 24#include <linux/sched.h>
25#include <asm/cputype.h> 25#include <asm/cputype.h>
26 26
27extern void __cpu_flush_user_tlb_range(unsigned long, unsigned long, struct vm_area_struct *);
28extern void __cpu_flush_kern_tlb_range(unsigned long, unsigned long);
29
30extern struct cpu_tlb_fns cpu_tlb;
31
32/* 27/*
33 * TLB Management 28 * TLB Management
34 * ============== 29 * ==============
diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
index bef04afd6031..5ee07eee80c2 100644
--- a/arch/arm64/kernel/Makefile
+++ b/arch/arm64/kernel/Makefile
@@ -15,8 +15,9 @@ CFLAGS_REMOVE_return_address.o = -pg
15arm64-obj-y := cputable.o debug-monitors.o entry.o irq.o fpsimd.o \ 15arm64-obj-y := cputable.o debug-monitors.o entry.o irq.o fpsimd.o \
16 entry-fpsimd.o process.o ptrace.o setup.o signal.o \ 16 entry-fpsimd.o process.o ptrace.o setup.o signal.o \
17 sys.o stacktrace.o time.o traps.o io.o vdso.o \ 17 sys.o stacktrace.o time.o traps.o io.o vdso.o \
18 hyp-stub.o psci.o cpu_ops.o insn.o return_address.o \ 18 hyp-stub.o psci.o psci-call.o cpu_ops.o insn.o \
19 cpuinfo.o cpu_errata.o alternative.o cacheinfo.o 19 return_address.o cpuinfo.o cpu_errata.o \
20 alternative.o cacheinfo.o
20 21
21arm64-obj-$(CONFIG_COMPAT) += sys32.o kuser32.o signal32.o \ 22arm64-obj-$(CONFIG_COMPAT) += sys32.o kuser32.o signal32.o \
22 sys_compat.o entry32.o \ 23 sys_compat.o entry32.o \
diff --git a/arch/arm64/kernel/ftrace.c b/arch/arm64/kernel/ftrace.c
index cf8556ae09d0..c851be795080 100644
--- a/arch/arm64/kernel/ftrace.c
+++ b/arch/arm64/kernel/ftrace.c
@@ -156,7 +156,7 @@ static int ftrace_modify_graph_caller(bool enable)
156 156
157 branch = aarch64_insn_gen_branch_imm(pc, 157 branch = aarch64_insn_gen_branch_imm(pc,
158 (unsigned long)ftrace_graph_caller, 158 (unsigned long)ftrace_graph_caller,
159 AARCH64_INSN_BRANCH_LINK); 159 AARCH64_INSN_BRANCH_NOLINK);
160 nop = aarch64_insn_gen_nop(); 160 nop = aarch64_insn_gen_nop();
161 161
162 if (enable) 162 if (enable)
diff --git a/arch/arm64/kernel/insn.c b/arch/arm64/kernel/insn.c
index 27d4864577e5..c8eca88f12e6 100644
--- a/arch/arm64/kernel/insn.c
+++ b/arch/arm64/kernel/insn.c
@@ -87,8 +87,10 @@ static void __kprobes *patch_map(void *addr, int fixmap)
87 87
88 if (module && IS_ENABLED(CONFIG_DEBUG_SET_MODULE_RONX)) 88 if (module && IS_ENABLED(CONFIG_DEBUG_SET_MODULE_RONX))
89 page = vmalloc_to_page(addr); 89 page = vmalloc_to_page(addr);
90 else 90 else if (!module && IS_ENABLED(CONFIG_DEBUG_RODATA))
91 page = virt_to_page(addr); 91 page = virt_to_page(addr);
92 else
93 return addr;
92 94
93 BUG_ON(!page); 95 BUG_ON(!page);
94 set_fixmap(fixmap, page_to_phys(page)); 96 set_fixmap(fixmap, page_to_phys(page));
diff --git a/arch/arm64/kernel/psci-call.S b/arch/arm64/kernel/psci-call.S
new file mode 100644
index 000000000000..cf83e61cd3b5
--- /dev/null
+++ b/arch/arm64/kernel/psci-call.S
@@ -0,0 +1,28 @@
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License version 2 as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * Copyright (C) 2015 ARM Limited
12 *
13 * Author: Will Deacon <will.deacon@arm.com>
14 */
15
16#include <linux/linkage.h>
17
18/* int __invoke_psci_fn_hvc(u64 function_id, u64 arg0, u64 arg1, u64 arg2) */
19ENTRY(__invoke_psci_fn_hvc)
20 hvc #0
21 ret
22ENDPROC(__invoke_psci_fn_hvc)
23
24/* int __invoke_psci_fn_smc(u64 function_id, u64 arg0, u64 arg1, u64 arg2) */
25ENTRY(__invoke_psci_fn_smc)
26 smc #0
27 ret
28ENDPROC(__invoke_psci_fn_smc)
diff --git a/arch/arm64/kernel/psci.c b/arch/arm64/kernel/psci.c
index 3425f311c49e..9b8a70ae64a1 100644
--- a/arch/arm64/kernel/psci.c
+++ b/arch/arm64/kernel/psci.c
@@ -57,6 +57,9 @@ static struct psci_operations psci_ops;
57static int (*invoke_psci_fn)(u64, u64, u64, u64); 57static int (*invoke_psci_fn)(u64, u64, u64, u64);
58typedef int (*psci_initcall_t)(const struct device_node *); 58typedef int (*psci_initcall_t)(const struct device_node *);
59 59
60asmlinkage int __invoke_psci_fn_hvc(u64, u64, u64, u64);
61asmlinkage int __invoke_psci_fn_smc(u64, u64, u64, u64);
62
60enum psci_function { 63enum psci_function {
61 PSCI_FN_CPU_SUSPEND, 64 PSCI_FN_CPU_SUSPEND,
62 PSCI_FN_CPU_ON, 65 PSCI_FN_CPU_ON,
@@ -109,40 +112,6 @@ static void psci_power_state_unpack(u32 power_state,
109 PSCI_0_2_POWER_STATE_AFFL_SHIFT; 112 PSCI_0_2_POWER_STATE_AFFL_SHIFT;
110} 113}
111 114
112/*
113 * The following two functions are invoked via the invoke_psci_fn pointer
114 * and will not be inlined, allowing us to piggyback on the AAPCS.
115 */
116static noinline int __invoke_psci_fn_hvc(u64 function_id, u64 arg0, u64 arg1,
117 u64 arg2)
118{
119 asm volatile(
120 __asmeq("%0", "x0")
121 __asmeq("%1", "x1")
122 __asmeq("%2", "x2")
123 __asmeq("%3", "x3")
124 "hvc #0\n"
125 : "+r" (function_id)
126 : "r" (arg0), "r" (arg1), "r" (arg2));
127
128 return function_id;
129}
130
131static noinline int __invoke_psci_fn_smc(u64 function_id, u64 arg0, u64 arg1,
132 u64 arg2)
133{
134 asm volatile(
135 __asmeq("%0", "x0")
136 __asmeq("%1", "x1")
137 __asmeq("%2", "x2")
138 __asmeq("%3", "x3")
139 "smc #0\n"
140 : "+r" (function_id)
141 : "r" (arg0), "r" (arg1), "r" (arg2));
142
143 return function_id;
144}
145
146static int psci_get_version(void) 115static int psci_get_version(void)
147{ 116{
148 int err; 117 int err;
diff --git a/arch/arm64/kernel/signal32.c b/arch/arm64/kernel/signal32.c
index c20a300e2213..d26fcd4cd6e6 100644
--- a/arch/arm64/kernel/signal32.c
+++ b/arch/arm64/kernel/signal32.c
@@ -154,8 +154,7 @@ int copy_siginfo_to_user32(compat_siginfo_t __user *to, const siginfo_t *from)
154 case __SI_TIMER: 154 case __SI_TIMER:
155 err |= __put_user(from->si_tid, &to->si_tid); 155 err |= __put_user(from->si_tid, &to->si_tid);
156 err |= __put_user(from->si_overrun, &to->si_overrun); 156 err |= __put_user(from->si_overrun, &to->si_overrun);
157 err |= __put_user((compat_uptr_t)(unsigned long)from->si_ptr, 157 err |= __put_user(from->si_int, &to->si_int);
158 &to->si_ptr);
159 break; 158 break;
160 case __SI_POLL: 159 case __SI_POLL:
161 err |= __put_user(from->si_band, &to->si_band); 160 err |= __put_user(from->si_band, &to->si_band);
@@ -184,7 +183,7 @@ int copy_siginfo_to_user32(compat_siginfo_t __user *to, const siginfo_t *from)
184 case __SI_MESGQ: /* But this is */ 183 case __SI_MESGQ: /* But this is */
185 err |= __put_user(from->si_pid, &to->si_pid); 184 err |= __put_user(from->si_pid, &to->si_pid);
186 err |= __put_user(from->si_uid, &to->si_uid); 185 err |= __put_user(from->si_uid, &to->si_uid);
187 err |= __put_user((compat_uptr_t)(unsigned long)from->si_ptr, &to->si_ptr); 186 err |= __put_user(from->si_int, &to->si_int);
188 break; 187 break;
189 case __SI_SYS: 188 case __SI_SYS:
190 err |= __put_user((compat_uptr_t)(unsigned long) 189 err |= __put_user((compat_uptr_t)(unsigned long)
diff --git a/arch/arm64/kernel/vdso/gettimeofday.S b/arch/arm64/kernel/vdso/gettimeofday.S
index fe652ffd34c2..efa79e8d4196 100644
--- a/arch/arm64/kernel/vdso/gettimeofday.S
+++ b/arch/arm64/kernel/vdso/gettimeofday.S
@@ -174,8 +174,6 @@ ENDPROC(__kernel_clock_gettime)
174/* int __kernel_clock_getres(clockid_t clock_id, struct timespec *res); */ 174/* int __kernel_clock_getres(clockid_t clock_id, struct timespec *res); */
175ENTRY(__kernel_clock_getres) 175ENTRY(__kernel_clock_getres)
176 .cfi_startproc 176 .cfi_startproc
177 cbz w1, 3f
178
179 cmp w0, #CLOCK_REALTIME 177 cmp w0, #CLOCK_REALTIME
180 ccmp w0, #CLOCK_MONOTONIC, #0x4, ne 178 ccmp w0, #CLOCK_MONOTONIC, #0x4, ne
181 b.ne 1f 179 b.ne 1f
@@ -188,6 +186,7 @@ ENTRY(__kernel_clock_getres)
188 b.ne 4f 186 b.ne 4f
189 ldr x2, 6f 187 ldr x2, 6f
1902: 1882:
189 cbz w1, 3f
191 stp xzr, x2, [x1] 190 stp xzr, x2, [x1]
192 191
1933: /* res == NULL. */ 1923: /* res == NULL. */
diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c
index 0a24b9b8c698..58e0c2bdde04 100644
--- a/arch/arm64/mm/dma-mapping.c
+++ b/arch/arm64/mm/dma-mapping.c
@@ -348,8 +348,6 @@ static struct dma_map_ops swiotlb_dma_ops = {
348 .mapping_error = swiotlb_dma_mapping_error, 348 .mapping_error = swiotlb_dma_mapping_error,
349}; 349};
350 350
351extern int swiotlb_late_init_with_default_size(size_t default_size);
352
353static int __init atomic_pool_init(void) 351static int __init atomic_pool_init(void)
354{ 352{
355 pgprot_t prot = __pgprot(PROT_NORMAL_NC); 353 pgprot_t prot = __pgprot(PROT_NORMAL_NC);
@@ -411,21 +409,13 @@ out:
411 return -ENOMEM; 409 return -ENOMEM;
412} 410}
413 411
414static int __init swiotlb_late_init(void) 412static int __init arm64_dma_init(void)
415{ 413{
416 size_t swiotlb_size = min(SZ_64M, MAX_ORDER_NR_PAGES << PAGE_SHIFT); 414 int ret;
417 415
418 dma_ops = &swiotlb_dma_ops; 416 dma_ops = &swiotlb_dma_ops;
419 417
420 return swiotlb_late_init_with_default_size(swiotlb_size); 418 ret = atomic_pool_init();
421}
422
423static int __init arm64_dma_init(void)
424{
425 int ret = 0;
426
427 ret |= swiotlb_late_init();
428 ret |= atomic_pool_init();
429 419
430 return ret; 420 return ret;
431} 421}
diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
index 71145f952070..ae85da6307bb 100644
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -33,6 +33,7 @@
33#include <linux/dma-mapping.h> 33#include <linux/dma-mapping.h>
34#include <linux/dma-contiguous.h> 34#include <linux/dma-contiguous.h>
35#include <linux/efi.h> 35#include <linux/efi.h>
36#include <linux/swiotlb.h>
36 37
37#include <asm/fixmap.h> 38#include <asm/fixmap.h>
38#include <asm/memory.h> 39#include <asm/memory.h>
@@ -45,6 +46,7 @@
45#include "mm.h" 46#include "mm.h"
46 47
47phys_addr_t memstart_addr __read_mostly = 0; 48phys_addr_t memstart_addr __read_mostly = 0;
49phys_addr_t arm64_dma_phys_limit __read_mostly;
48 50
49#ifdef CONFIG_BLK_DEV_INITRD 51#ifdef CONFIG_BLK_DEV_INITRD
50static int __init early_initrd(char *p) 52static int __init early_initrd(char *p)
@@ -85,7 +87,7 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max)
85 87
86 /* 4GB maximum for 32-bit only capable devices */ 88 /* 4GB maximum for 32-bit only capable devices */
87 if (IS_ENABLED(CONFIG_ZONE_DMA)) { 89 if (IS_ENABLED(CONFIG_ZONE_DMA)) {
88 max_dma = PFN_DOWN(max_zone_dma_phys()); 90 max_dma = PFN_DOWN(arm64_dma_phys_limit);
89 zone_size[ZONE_DMA] = max_dma - min; 91 zone_size[ZONE_DMA] = max_dma - min;
90 } 92 }
91 zone_size[ZONE_NORMAL] = max - max_dma; 93 zone_size[ZONE_NORMAL] = max - max_dma;
@@ -156,8 +158,6 @@ early_param("mem", early_mem);
156 158
157void __init arm64_memblock_init(void) 159void __init arm64_memblock_init(void)
158{ 160{
159 phys_addr_t dma_phys_limit = 0;
160
161 memblock_enforce_memory_limit(memory_limit); 161 memblock_enforce_memory_limit(memory_limit);
162 162
163 /* 163 /*
@@ -174,8 +174,10 @@ void __init arm64_memblock_init(void)
174 174
175 /* 4GB maximum for 32-bit only capable devices */ 175 /* 4GB maximum for 32-bit only capable devices */
176 if (IS_ENABLED(CONFIG_ZONE_DMA)) 176 if (IS_ENABLED(CONFIG_ZONE_DMA))
177 dma_phys_limit = max_zone_dma_phys(); 177 arm64_dma_phys_limit = max_zone_dma_phys();
178 dma_contiguous_reserve(dma_phys_limit); 178 else
179 arm64_dma_phys_limit = PHYS_MASK + 1;
180 dma_contiguous_reserve(arm64_dma_phys_limit);
179 181
180 memblock_allow_resize(); 182 memblock_allow_resize();
181 memblock_dump_all(); 183 memblock_dump_all();
@@ -276,6 +278,8 @@ static void __init free_unused_memmap(void)
276 */ 278 */
277void __init mem_init(void) 279void __init mem_init(void)
278{ 280{
281 swiotlb_init(1);
282
279 set_max_mapnr(pfn_to_page(max_pfn) - mem_map); 283 set_max_mapnr(pfn_to_page(max_pfn) - mem_map);
280 284
281#ifndef CONFIG_SPARSEMEM_VMEMMAP 285#ifndef CONFIG_SPARSEMEM_VMEMMAP
diff --git a/arch/frv/include/asm/pgtable.h b/arch/frv/include/asm/pgtable.h
index 93bcf2abd1a1..07d7a7ef8bd5 100644
--- a/arch/frv/include/asm/pgtable.h
+++ b/arch/frv/include/asm/pgtable.h
@@ -123,12 +123,14 @@ extern unsigned long empty_zero_page;
123#define PGDIR_MASK (~(PGDIR_SIZE - 1)) 123#define PGDIR_MASK (~(PGDIR_SIZE - 1))
124#define PTRS_PER_PGD 64 124#define PTRS_PER_PGD 64
125 125
126#define __PAGETABLE_PUD_FOLDED
126#define PUD_SHIFT 26 127#define PUD_SHIFT 26
127#define PTRS_PER_PUD 1 128#define PTRS_PER_PUD 1
128#define PUD_SIZE (1UL << PUD_SHIFT) 129#define PUD_SIZE (1UL << PUD_SHIFT)
129#define PUD_MASK (~(PUD_SIZE - 1)) 130#define PUD_MASK (~(PUD_SIZE - 1))
130#define PUE_SIZE 256 131#define PUE_SIZE 256
131 132
133#define __PAGETABLE_PMD_FOLDED
132#define PMD_SHIFT 26 134#define PMD_SHIFT 26
133#define PMD_SIZE (1UL << PMD_SHIFT) 135#define PMD_SIZE (1UL << PMD_SHIFT)
134#define PMD_MASK (~(PMD_SIZE - 1)) 136#define PMD_MASK (~(PMD_SIZE - 1))
diff --git a/arch/m32r/include/asm/pgtable-2level.h b/arch/m32r/include/asm/pgtable-2level.h
index 8fd8ee70266a..421e6ba3a173 100644
--- a/arch/m32r/include/asm/pgtable-2level.h
+++ b/arch/m32r/include/asm/pgtable-2level.h
@@ -13,6 +13,7 @@
13 * the M32R is two-level, so we don't really have any 13 * the M32R is two-level, so we don't really have any
14 * PMD directory physically. 14 * PMD directory physically.
15 */ 15 */
16#define __PAGETABLE_PMD_FOLDED
16#define PMD_SHIFT 22 17#define PMD_SHIFT 22
17#define PTRS_PER_PMD 1 18#define PTRS_PER_PMD 1
18 19
diff --git a/arch/m68k/include/asm/pgtable_mm.h b/arch/m68k/include/asm/pgtable_mm.h
index 28a145bfbb71..35ed4a9981ae 100644
--- a/arch/m68k/include/asm/pgtable_mm.h
+++ b/arch/m68k/include/asm/pgtable_mm.h
@@ -54,10 +54,12 @@
54 */ 54 */
55#ifdef CONFIG_SUN3 55#ifdef CONFIG_SUN3
56#define PTRS_PER_PTE 16 56#define PTRS_PER_PTE 16
57#define __PAGETABLE_PMD_FOLDED
57#define PTRS_PER_PMD 1 58#define PTRS_PER_PMD 1
58#define PTRS_PER_PGD 2048 59#define PTRS_PER_PGD 2048
59#elif defined(CONFIG_COLDFIRE) 60#elif defined(CONFIG_COLDFIRE)
60#define PTRS_PER_PTE 512 61#define PTRS_PER_PTE 512
62#define __PAGETABLE_PMD_FOLDED
61#define PTRS_PER_PMD 1 63#define PTRS_PER_PMD 1
62#define PTRS_PER_PGD 1024 64#define PTRS_PER_PGD 1024
63#else 65#else
diff --git a/arch/metag/include/asm/processor.h b/arch/metag/include/asm/processor.h
index 881071c07942..13272fd5a5ba 100644
--- a/arch/metag/include/asm/processor.h
+++ b/arch/metag/include/asm/processor.h
@@ -149,8 +149,8 @@ extern void exit_thread(void);
149 149
150unsigned long get_wchan(struct task_struct *p); 150unsigned long get_wchan(struct task_struct *p);
151 151
152#define KSTK_EIP(tsk) ((tsk)->thread.kernel_context->CurrPC) 152#define KSTK_EIP(tsk) (task_pt_regs(tsk)->ctx.CurrPC)
153#define KSTK_ESP(tsk) ((tsk)->thread.kernel_context->AX[0].U0) 153#define KSTK_ESP(tsk) (task_pt_regs(tsk)->ctx.AX[0].U0)
154 154
155#define user_stack_pointer(regs) ((regs)->ctx.AX[0].U0) 155#define user_stack_pointer(regs) ((regs)->ctx.AX[0].U0)
156 156
diff --git a/arch/mn10300/include/asm/pgtable.h b/arch/mn10300/include/asm/pgtable.h
index afab728ab65e..96d3f9deb59c 100644
--- a/arch/mn10300/include/asm/pgtable.h
+++ b/arch/mn10300/include/asm/pgtable.h
@@ -56,7 +56,9 @@ extern void paging_init(void);
56#define PGDIR_SHIFT 22 56#define PGDIR_SHIFT 22
57#define PTRS_PER_PGD 1024 57#define PTRS_PER_PGD 1024
58#define PTRS_PER_PUD 1 /* we don't really have any PUD physically */ 58#define PTRS_PER_PUD 1 /* we don't really have any PUD physically */
59#define __PAGETABLE_PUD_FOLDED
59#define PTRS_PER_PMD 1 /* we don't really have any PMD physically */ 60#define PTRS_PER_PMD 1 /* we don't really have any PMD physically */
61#define __PAGETABLE_PMD_FOLDED
60#define PTRS_PER_PTE 1024 62#define PTRS_PER_PTE 1024
61 63
62#define PGD_SIZE PAGE_SIZE 64#define PGD_SIZE PAGE_SIZE
diff --git a/arch/parisc/include/asm/pgtable.h b/arch/parisc/include/asm/pgtable.h
index 8c966b2270aa..15207b9362bf 100644
--- a/arch/parisc/include/asm/pgtable.h
+++ b/arch/parisc/include/asm/pgtable.h
@@ -96,6 +96,7 @@ extern void purge_tlb_entries(struct mm_struct *, unsigned long);
96#if PT_NLEVELS == 3 96#if PT_NLEVELS == 3
97#define BITS_PER_PMD (PAGE_SHIFT + PMD_ORDER - BITS_PER_PMD_ENTRY) 97#define BITS_PER_PMD (PAGE_SHIFT + PMD_ORDER - BITS_PER_PMD_ENTRY)
98#else 98#else
99#define __PAGETABLE_PMD_FOLDED
99#define BITS_PER_PMD 0 100#define BITS_PER_PMD 0
100#endif 101#endif
101#define PTRS_PER_PMD (1UL << BITS_PER_PMD) 102#define PTRS_PER_PMD (1UL << BITS_PER_PMD)
diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h
index fbb5ee3ae57c..e08ec38f8c6e 100644
--- a/arch/s390/include/asm/pgtable.h
+++ b/arch/s390/include/asm/pgtable.h
@@ -91,7 +91,9 @@ extern unsigned long zero_page_mask;
91 */ 91 */
92#define PTRS_PER_PTE 256 92#define PTRS_PER_PTE 256
93#ifndef CONFIG_64BIT 93#ifndef CONFIG_64BIT
94#define __PAGETABLE_PUD_FOLDED
94#define PTRS_PER_PMD 1 95#define PTRS_PER_PMD 1
96#define __PAGETABLE_PMD_FOLDED
95#define PTRS_PER_PUD 1 97#define PTRS_PER_PUD 1
96#else /* CONFIG_64BIT */ 98#else /* CONFIG_64BIT */
97#define PTRS_PER_PMD 2048 99#define PTRS_PER_PMD 2048
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index b5c8ff5e9dfc..2346c95c6ab1 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1396,6 +1396,12 @@ void cpu_init(void)
1396 1396
1397 wait_for_master_cpu(cpu); 1397 wait_for_master_cpu(cpu);
1398 1398
1399 /*
1400 * Initialize the CR4 shadow before doing anything that could
1401 * try to read it.
1402 */
1403 cr4_init_shadow();
1404
1399 show_ucode_info_early(); 1405 show_ucode_info_early();
1400 1406
1401 printk(KERN_INFO "Initializing CPU#%d\n", cpu); 1407 printk(KERN_INFO "Initializing CPU#%d\n", cpu);
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 94d7dcb12145..50163fa9034f 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -565,8 +565,8 @@ static const struct _tlb_table intel_tlb_table[] = {
565 { 0xb2, TLB_INST_4K, 64, " TLB_INST 4KByte pages, 4-way set associative" }, 565 { 0xb2, TLB_INST_4K, 64, " TLB_INST 4KByte pages, 4-way set associative" },
566 { 0xb3, TLB_DATA_4K, 128, " TLB_DATA 4 KByte pages, 4-way set associative" }, 566 { 0xb3, TLB_DATA_4K, 128, " TLB_DATA 4 KByte pages, 4-way set associative" },
567 { 0xb4, TLB_DATA_4K, 256, " TLB_DATA 4 KByte pages, 4-way associative" }, 567 { 0xb4, TLB_DATA_4K, 256, " TLB_DATA 4 KByte pages, 4-way associative" },
568 { 0xb5, TLB_INST_4K, 64, " TLB_INST 4 KByte pages, 8-way set ssociative" }, 568 { 0xb5, TLB_INST_4K, 64, " TLB_INST 4 KByte pages, 8-way set associative" },
569 { 0xb6, TLB_INST_4K, 128, " TLB_INST 4 KByte pages, 8-way set ssociative" }, 569 { 0xb6, TLB_INST_4K, 128, " TLB_INST 4 KByte pages, 8-way set associative" },
570 { 0xba, TLB_DATA_4K, 64, " TLB_DATA 4 KByte pages, 4-way associative" }, 570 { 0xba, TLB_DATA_4K, 64, " TLB_DATA 4 KByte pages, 4-way associative" },
571 { 0xc0, TLB_DATA_4K_4M, 8, " TLB_DATA 4 KByte and 4 MByte pages, 4-way associative" }, 571 { 0xc0, TLB_DATA_4K_4M, 8, " TLB_DATA 4 KByte and 4 MByte pages, 4-way associative" },
572 { 0xc1, STLB_4K_2M, 1024, " STLB 4 KByte and 2 MByte pages, 8-way associative" }, 572 { 0xc1, STLB_4K_2M, 1024, " STLB 4 KByte and 2 MByte pages, 8-way associative" },
diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S
index 000d4199b03e..31e2d5bf3e38 100644
--- a/arch/x86/kernel/entry_32.S
+++ b/arch/x86/kernel/entry_32.S
@@ -982,6 +982,9 @@ ENTRY(xen_hypervisor_callback)
982ENTRY(xen_do_upcall) 982ENTRY(xen_do_upcall)
9831: mov %esp, %eax 9831: mov %esp, %eax
984 call xen_evtchn_do_upcall 984 call xen_evtchn_do_upcall
985#ifndef CONFIG_PREEMPT
986 call xen_maybe_preempt_hcall
987#endif
985 jmp ret_from_intr 988 jmp ret_from_intr
986 CFI_ENDPROC 989 CFI_ENDPROC
987ENDPROC(xen_hypervisor_callback) 990ENDPROC(xen_hypervisor_callback)
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index db13655c3a2a..10074ad9ebf8 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -1208,6 +1208,9 @@ ENTRY(xen_do_hypervisor_callback) # do_hypervisor_callback(struct *pt_regs)
1208 popq %rsp 1208 popq %rsp
1209 CFI_DEF_CFA_REGISTER rsp 1209 CFI_DEF_CFA_REGISTER rsp
1210 decl PER_CPU_VAR(irq_count) 1210 decl PER_CPU_VAR(irq_count)
1211#ifndef CONFIG_PREEMPT
1212 call xen_maybe_preempt_hcall
1213#endif
1211 jmp error_exit 1214 jmp error_exit
1212 CFI_ENDPROC 1215 CFI_ENDPROC
1213END(xen_do_hypervisor_callback) 1216END(xen_do_hypervisor_callback)
diff --git a/arch/x86/kernel/kprobes/core.c b/arch/x86/kernel/kprobes/core.c
index 6a1146ea4d4d..4e3d5a9621fe 100644
--- a/arch/x86/kernel/kprobes/core.c
+++ b/arch/x86/kernel/kprobes/core.c
@@ -223,27 +223,48 @@ static unsigned long
223__recover_probed_insn(kprobe_opcode_t *buf, unsigned long addr) 223__recover_probed_insn(kprobe_opcode_t *buf, unsigned long addr)
224{ 224{
225 struct kprobe *kp; 225 struct kprobe *kp;
226 unsigned long faddr;
226 227
227 kp = get_kprobe((void *)addr); 228 kp = get_kprobe((void *)addr);
228 /* There is no probe, return original address */ 229 faddr = ftrace_location(addr);
229 if (!kp) 230 /*
231 * Addresses inside the ftrace location are refused by
232 * arch_check_ftrace_location(). Something went terribly wrong
233 * if such an address is checked here.
234 */
235 if (WARN_ON(faddr && faddr != addr))
236 return 0UL;
237 /*
238 * Use the current code if it is not modified by Kprobe
239 * and it cannot be modified by ftrace.
240 */
241 if (!kp && !faddr)
230 return addr; 242 return addr;
231 243
232 /* 244 /*
233 * Basically, kp->ainsn.insn has an original instruction. 245 * Basically, kp->ainsn.insn has an original instruction.
234 * However, RIP-relative instruction can not do single-stepping 246 * However, RIP-relative instruction can not do single-stepping
235 * at different place, __copy_instruction() tweaks the displacement of 247 * at different place, __copy_instruction() tweaks the displacement of
236 * that instruction. In that case, we can't recover the instruction 248 * that instruction. In that case, we can't recover the instruction
237 * from the kp->ainsn.insn. 249 * from the kp->ainsn.insn.
238 * 250 *
239 * On the other hand, kp->opcode has a copy of the first byte of 251 * On the other hand, in case on normal Kprobe, kp->opcode has a copy
240 * the probed instruction, which is overwritten by int3. And 252 * of the first byte of the probed instruction, which is overwritten
241 * the instruction at kp->addr is not modified by kprobes except 253 * by int3. And the instruction at kp->addr is not modified by kprobes
242 * for the first byte, we can recover the original instruction 254 * except for the first byte, we can recover the original instruction
243 * from it and kp->opcode. 255 * from it and kp->opcode.
256 *
257 * In case of Kprobes using ftrace, we do not have a copy of
258 * the original instruction. In fact, the ftrace location might
259 * be modified at anytime and even could be in an inconsistent state.
260 * Fortunately, we know that the original code is the ideal 5-byte
261 * long NOP.
244 */ 262 */
245 memcpy(buf, kp->addr, MAX_INSN_SIZE * sizeof(kprobe_opcode_t)); 263 memcpy(buf, (void *)addr, MAX_INSN_SIZE * sizeof(kprobe_opcode_t));
246 buf[0] = kp->opcode; 264 if (faddr)
265 memcpy(buf, ideal_nops[NOP_ATOMIC5], 5);
266 else
267 buf[0] = kp->opcode;
247 return (unsigned long)buf; 268 return (unsigned long)buf;
248} 269}
249 270
@@ -251,6 +272,7 @@ __recover_probed_insn(kprobe_opcode_t *buf, unsigned long addr)
251 * Recover the probed instruction at addr for further analysis. 272 * Recover the probed instruction at addr for further analysis.
252 * Caller must lock kprobes by kprobe_mutex, or disable preemption 273 * Caller must lock kprobes by kprobe_mutex, or disable preemption
253 * for preventing to release referencing kprobes. 274 * for preventing to release referencing kprobes.
275 * Returns zero if the instruction can not get recovered.
254 */ 276 */
255unsigned long recover_probed_instruction(kprobe_opcode_t *buf, unsigned long addr) 277unsigned long recover_probed_instruction(kprobe_opcode_t *buf, unsigned long addr)
256{ 278{
@@ -285,6 +307,8 @@ static int can_probe(unsigned long paddr)
285 * normally used, we just go through if there is no kprobe. 307 * normally used, we just go through if there is no kprobe.
286 */ 308 */
287 __addr = recover_probed_instruction(buf, addr); 309 __addr = recover_probed_instruction(buf, addr);
310 if (!__addr)
311 return 0;
288 kernel_insn_init(&insn, (void *)__addr, MAX_INSN_SIZE); 312 kernel_insn_init(&insn, (void *)__addr, MAX_INSN_SIZE);
289 insn_get_length(&insn); 313 insn_get_length(&insn);
290 314
@@ -333,6 +357,8 @@ int __copy_instruction(u8 *dest, u8 *src)
333 unsigned long recovered_insn = 357 unsigned long recovered_insn =
334 recover_probed_instruction(buf, (unsigned long)src); 358 recover_probed_instruction(buf, (unsigned long)src);
335 359
360 if (!recovered_insn)
361 return 0;
336 kernel_insn_init(&insn, (void *)recovered_insn, MAX_INSN_SIZE); 362 kernel_insn_init(&insn, (void *)recovered_insn, MAX_INSN_SIZE);
337 insn_get_length(&insn); 363 insn_get_length(&insn);
338 /* Another subsystem puts a breakpoint, failed to recover */ 364 /* Another subsystem puts a breakpoint, failed to recover */
diff --git a/arch/x86/kernel/kprobes/opt.c b/arch/x86/kernel/kprobes/opt.c
index 0dd8d089c315..7b3b9d15c47a 100644
--- a/arch/x86/kernel/kprobes/opt.c
+++ b/arch/x86/kernel/kprobes/opt.c
@@ -259,6 +259,8 @@ static int can_optimize(unsigned long paddr)
259 */ 259 */
260 return 0; 260 return 0;
261 recovered_insn = recover_probed_instruction(buf, addr); 261 recovered_insn = recover_probed_instruction(buf, addr);
262 if (!recovered_insn)
263 return 0;
262 kernel_insn_init(&insn, (void *)recovered_insn, MAX_INSN_SIZE); 264 kernel_insn_init(&insn, (void *)recovered_insn, MAX_INSN_SIZE);
263 insn_get_length(&insn); 265 insn_get_length(&insn);
264 /* Another subsystem puts a breakpoint */ 266 /* Another subsystem puts a breakpoint */
diff --git a/arch/x86/lguest/Kconfig b/arch/x86/lguest/Kconfig
index 4a0890f815c4..08f41caada45 100644
--- a/arch/x86/lguest/Kconfig
+++ b/arch/x86/lguest/Kconfig
@@ -1,6 +1,6 @@
1config LGUEST_GUEST 1config LGUEST_GUEST
2 bool "Lguest guest support" 2 bool "Lguest guest support"
3 depends on X86_32 && PARAVIRT 3 depends on X86_32 && PARAVIRT && PCI
4 select TTY 4 select TTY
5 select VIRTUALIZATION 5 select VIRTUALIZATION
6 select VIRTIO 6 select VIRTIO
@@ -8,7 +8,7 @@ config LGUEST_GUEST
8 help 8 help
9 Lguest is a tiny in-kernel hypervisor. Selecting this will 9 Lguest is a tiny in-kernel hypervisor. Selecting this will
10 allow your kernel to boot under lguest. This option will increase 10 allow your kernel to boot under lguest. This option will increase
11 your kernel size by about 6k. If in doubt, say N. 11 your kernel size by about 10k. If in doubt, say N.
12 12
13 If you say Y here, make sure you say Y (or M) to the virtio block 13 If you say Y here, make sure you say Y (or M) to the virtio block
14 and net drivers which lguest needs. 14 and net drivers which lguest needs.
diff --git a/arch/x86/platform/intel-mid/intel-mid.c b/arch/x86/platform/intel-mid/intel-mid.c
index 1bbedc4b0f88..3005f0c89f2e 100644
--- a/arch/x86/platform/intel-mid/intel-mid.c
+++ b/arch/x86/platform/intel-mid/intel-mid.c
@@ -130,7 +130,7 @@ static void intel_mid_arch_setup(void)
130 intel_mid_ops = get_intel_mid_ops[__intel_mid_cpu_chip](); 130 intel_mid_ops = get_intel_mid_ops[__intel_mid_cpu_chip]();
131 else { 131 else {
132 intel_mid_ops = get_intel_mid_ops[INTEL_MID_CPU_CHIP_PENWELL](); 132 intel_mid_ops = get_intel_mid_ops[INTEL_MID_CPU_CHIP_PENWELL]();
133 pr_info("ARCH: Uknown SoC, assuming PENWELL!\n"); 133 pr_info("ARCH: Unknown SoC, assuming PENWELL!\n");
134 } 134 }
135 135
136out: 136out:
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index bd8b8459c3d0..5240f563076d 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -1070,6 +1070,23 @@ static inline void xen_write_cr8(unsigned long val)
1070 BUG_ON(val); 1070 BUG_ON(val);
1071} 1071}
1072#endif 1072#endif
1073
1074static u64 xen_read_msr_safe(unsigned int msr, int *err)
1075{
1076 u64 val;
1077
1078 val = native_read_msr_safe(msr, err);
1079 switch (msr) {
1080 case MSR_IA32_APICBASE:
1081#ifdef CONFIG_X86_X2APIC
1082 if (!(cpuid_ecx(1) & (1 << (X86_FEATURE_X2APIC & 31))))
1083#endif
1084 val &= ~X2APIC_ENABLE;
1085 break;
1086 }
1087 return val;
1088}
1089
1073static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) 1090static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
1074{ 1091{
1075 int ret; 1092 int ret;
@@ -1240,7 +1257,7 @@ static const struct pv_cpu_ops xen_cpu_ops __initconst = {
1240 1257
1241 .wbinvd = native_wbinvd, 1258 .wbinvd = native_wbinvd,
1242 1259
1243 .read_msr = native_read_msr_safe, 1260 .read_msr = xen_read_msr_safe,
1244 .write_msr = xen_write_msr_safe, 1261 .write_msr = xen_write_msr_safe,
1245 1262
1246 .read_tsc = native_read_tsc, 1263 .read_tsc = native_read_tsc,
@@ -1741,6 +1758,7 @@ asmlinkage __visible void __init xen_start_kernel(void)
1741#ifdef CONFIG_X86_32 1758#ifdef CONFIG_X86_32
1742 i386_start_kernel(); 1759 i386_start_kernel();
1743#else 1760#else
1761 cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */
1744 x86_64_start_reservations((char *)__pa_symbol(&boot_params)); 1762 x86_64_start_reservations((char *)__pa_symbol(&boot_params));
1745#endif 1763#endif
1746} 1764}
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-16 22:59:06 -0500