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authorArnd Bergmann <arnd@arndb.de>2015-03-11 10:33:41 -0400
committerArnd Bergmann <arnd@arndb.de>2015-03-11 10:33:41 -0400
commite76296580d32b2b967a395b9e77bc6f69d55852e (patch)
tree7ec731e64502a5f33c39c4e496198af36d938ba7 /arch
parent8c1134080e9da5b485653d47962196a54d9ec006 (diff)
parent5957457a2d96e4c9b2fecd40f29cdb3bb841d75e (diff)
Merge tag 'at91-fixes2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into fixes
Pull "Second fixes batch for AT91 on 4.0" from Nicolas Ferre: - little fix for !MMU debug: may also help for randconfig - fix of 2 errors in LCD clock definitions - in PM code, not writing the key leads to not execute the action * tag 'at91-fixes2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91: ARM: at91/pm: MOR register KEY was missing ARM: at91/dt: sama5d4: fix lcdck clock definition ARM: at91/dt: sama5d4: rename lcd_clk into lcdc_clk ARM: at91: debug: fix non MMU debug
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/sama5d4.dtsi6
-rw-r--r--arch/arm/include/debug/at91.S5
-rw-r--r--arch/arm/mach-at91/pm_slowclock.S2
3 files changed, 9 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index 97d5b9759c07..8240b490825c 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -462,8 +462,8 @@
462 462
463 lcdck: lcdck { 463 lcdck: lcdck {
464 #clock-cells = <0>; 464 #clock-cells = <0>;
465 reg = <4>; 465 reg = <3>;
466 clocks = <&smd>; 466 clocks = <&mck>;
467 }; 467 };
468 468
469 smdck: smdck { 469 smdck: smdck {
@@ -771,7 +771,7 @@
771 reg = <50>; 771 reg = <50>;
772 }; 772 };
773 773
774 lcd_clk: lcd_clk { 774 lcdc_clk: lcdc_clk {
775 #clock-cells = <0>; 775 #clock-cells = <0>;
776 reg = <51>; 776 reg = <51>;
777 }; 777 };
diff --git a/arch/arm/include/debug/at91.S b/arch/arm/include/debug/at91.S
index 80a6501b4d50..c3c45e628e33 100644
--- a/arch/arm/include/debug/at91.S
+++ b/arch/arm/include/debug/at91.S
@@ -18,8 +18,11 @@
18#define AT91_DBGU 0xfc00c000 /* SAMA5D4_BASE_USART3 */ 18#define AT91_DBGU 0xfc00c000 /* SAMA5D4_BASE_USART3 */
19#endif 19#endif
20 20
21/* Keep in sync with mach-at91/include/mach/hardware.h */ 21#ifdef CONFIG_MMU
22#define AT91_IO_P2V(x) ((x) - 0x01000000) 22#define AT91_IO_P2V(x) ((x) - 0x01000000)
23#else
24#define AT91_IO_P2V(x) (x)
25#endif
23 26
24#define AT91_DBGU_SR (0x14) /* Status Register */ 27#define AT91_DBGU_SR (0x14) /* Status Register */
25#define AT91_DBGU_THR (0x1c) /* Transmitter Holding Register */ 28#define AT91_DBGU_THR (0x1c) /* Transmitter Holding Register */
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index a2cc49f96f61..8ab80e579be0 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -205,6 +205,7 @@ sdr_sr_done:
205 /* Turn off the main oscillator */ 205 /* Turn off the main oscillator */
206 ldr tmp1, [pmc, #AT91_CKGR_MOR] 206 ldr tmp1, [pmc, #AT91_CKGR_MOR]
207 bic tmp1, tmp1, #AT91_PMC_MOSCEN 207 bic tmp1, tmp1, #AT91_PMC_MOSCEN
208 orr tmp1, tmp1, #AT91_PMC_KEY
208 str tmp1, [pmc, #AT91_CKGR_MOR] 209 str tmp1, [pmc, #AT91_CKGR_MOR]
209 210
210 /* Wait for interrupt */ 211 /* Wait for interrupt */
@@ -213,6 +214,7 @@ sdr_sr_done:
213 /* Turn on the main oscillator */ 214 /* Turn on the main oscillator */
214 ldr tmp1, [pmc, #AT91_CKGR_MOR] 215 ldr tmp1, [pmc, #AT91_CKGR_MOR]
215 orr tmp1, tmp1, #AT91_PMC_MOSCEN 216 orr tmp1, tmp1, #AT91_PMC_MOSCEN
217 orr tmp1, tmp1, #AT91_PMC_KEY
216 str tmp1, [pmc, #AT91_CKGR_MOR] 218 str tmp1, [pmc, #AT91_CKGR_MOR]
217 219
218 wait_moscrdy 220 wait_moscrdy