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-rw-r--r--arch/arm/boot/dts/bcm28155-ap.dts4
-rw-r--r--arch/arm/boot/dts/qcom-msm8660-surf.dts11
-rw-r--r--arch/arm/boot/dts/qcom-msm8960-cdp.dts18
-rw-r--r--arch/arm/boot/dts/qcom-msm8974.dtsi24
-rw-r--r--arch/arm/boot/dts/r8a7790.dtsi8
-rw-r--r--arch/arm/boot/dts/zynq-7000.dtsi20
-rw-r--r--arch/arm/boot/dts/zynq-zc702.dts4
-rw-r--r--arch/arm/boot/dts/zynq-zc706.dts4
-rw-r--r--arch/arm/boot/dts/zynq-zed.dts4
-rw-r--r--arch/arm/configs/keystone_defconfig1
-rw-r--r--arch/arm/configs/msm_defconfig4
-rw-r--r--arch/arm/configs/multi_v7_defconfig154
-rw-r--r--arch/arm/configs/tegra_defconfig11
-rw-r--r--arch/arm/mach-hisi/Kconfig1
-rw-r--r--arch/arm/mach-integrator/integrator_cp.c6
-rw-r--r--arch/arm/mach-iop32x/em7210.c32
-rw-r--r--arch/arm/mach-keystone/Kconfig1
-rw-r--r--arch/arm/mach-kirkwood/pm.c4
-rw-r--r--arch/arm/mach-mvebu/mvebu-soc-id.c2
-rw-r--r--arch/arm/mach-omap2/common.h7
-rw-r--r--arch/arm/mach-omap2/cpuidle44xx.c26
-rw-r--r--arch/arm/mach-omap2/io.c1
-rw-r--r--arch/arm/mach-omap2/omap-mpuss-lowpower.c3
-rw-r--r--arch/arm/mach-omap2/omap-smp.c6
-rw-r--r--arch/arm/mach-omap2/omap4-common.c6
-rw-r--r--arch/arm/mach-omap2/pm44xx.c15
-rw-r--r--arch/arm/plat-orion/irq.c47
27 files changed, 381 insertions, 43 deletions
diff --git a/arch/arm/boot/dts/bcm28155-ap.dts b/arch/arm/boot/dts/bcm28155-ap.dts
index c7fa9fbb999c..5ff2382a49e4 100644
--- a/arch/arm/boot/dts/bcm28155-ap.dts
+++ b/arch/arm/boot/dts/bcm28155-ap.dts
@@ -13,6 +13,8 @@
13 13
14/dts-v1/; 14/dts-v1/;
15 15
16#include <dt-bindings/gpio/gpio.h>
17
16#include "bcm11351.dtsi" 18#include "bcm11351.dtsi"
17 19
18/ { 20/ {
@@ -60,7 +62,7 @@
60 62
61 sdio4: sdio@3f1b0000 { 63 sdio4: sdio@3f1b0000 {
62 max-frequency = <48000000>; 64 max-frequency = <48000000>;
63 cd-gpios = <&gpio 14 0>; 65 cd-gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
64 status = "okay"; 66 status = "okay";
65 }; 67 };
66 68
diff --git a/arch/arm/boot/dts/qcom-msm8660-surf.dts b/arch/arm/boot/dts/qcom-msm8660-surf.dts
index 1187185cf25b..68a72f5507b9 100644
--- a/arch/arm/boot/dts/qcom-msm8660-surf.dts
+++ b/arch/arm/boot/dts/qcom-msm8660-surf.dts
@@ -2,6 +2,8 @@
2 2
3/include/ "skeleton.dtsi" 3/include/ "skeleton.dtsi"
4 4
5#include <dt-bindings/clock/qcom,gcc-msm8660.h>
6
5/ { 7/ {
6 model = "Qualcomm MSM8660 SURF"; 8 model = "Qualcomm MSM8660 SURF";
7 compatible = "qcom,msm8660-surf", "qcom,msm8660"; 9 compatible = "qcom,msm8660-surf", "qcom,msm8660";
@@ -37,11 +39,20 @@
37 #interrupt-cells = <2>; 39 #interrupt-cells = <2>;
38 }; 40 };
39 41
42 gcc: clock-controller@900000 {
43 compatible = "qcom,gcc-msm8660";
44 #clock-cells = <1>;
45 #reset-cells = <1>;
46 reg = <0x900000 0x4000>;
47 };
48
40 serial@19c40000 { 49 serial@19c40000 {
41 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; 50 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
42 reg = <0x19c40000 0x1000>, 51 reg = <0x19c40000 0x1000>,
43 <0x19c00000 0x1000>; 52 <0x19c00000 0x1000>;
44 interrupts = <0 195 0x0>; 53 interrupts = <0 195 0x0>;
54 clocks = <&gcc GSBI12_UART_CLK>, <&gcc GSBI12_H_CLK>;
55 clock-names = "core", "iface";
45 }; 56 };
46 57
47 qcom,ssbi@500000 { 58 qcom,ssbi@500000 {
diff --git a/arch/arm/boot/dts/qcom-msm8960-cdp.dts b/arch/arm/boot/dts/qcom-msm8960-cdp.dts
index 6ccbac77931e..7c30de4fa302 100644
--- a/arch/arm/boot/dts/qcom-msm8960-cdp.dts
+++ b/arch/arm/boot/dts/qcom-msm8960-cdp.dts
@@ -2,6 +2,8 @@
2 2
3/include/ "skeleton.dtsi" 3/include/ "skeleton.dtsi"
4 4
5#include <dt-bindings/clock/qcom,gcc-msm8960.h>
6
5/ { 7/ {
6 model = "Qualcomm MSM8960 CDP"; 8 model = "Qualcomm MSM8960 CDP";
7 compatible = "qcom,msm8960-cdp", "qcom,msm8960"; 9 compatible = "qcom,msm8960-cdp", "qcom,msm8960";
@@ -37,11 +39,27 @@
37 reg = <0x800000 0x4000>; 39 reg = <0x800000 0x4000>;
38 }; 40 };
39 41
42 gcc: clock-controller@900000 {
43 compatible = "qcom,gcc-msm8960";
44 #clock-cells = <1>;
45 #reset-cells = <1>;
46 reg = <0x900000 0x4000>;
47 };
48
49 clock-controller@4000000 {
50 compatible = "qcom,mmcc-msm8960";
51 reg = <0x4000000 0x1000>;
52 #clock-cells = <1>;
53 #reset-cells = <1>;
54 };
55
40 serial@16440000 { 56 serial@16440000 {
41 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; 57 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
42 reg = <0x16440000 0x1000>, 58 reg = <0x16440000 0x1000>,
43 <0x16400000 0x1000>; 59 <0x16400000 0x1000>;
44 interrupts = <0 154 0x0>; 60 interrupts = <0 154 0x0>;
61 clocks = <&gcc GSBI5_UART_CLK>, <&gcc GSBI5_H_CLK>;
62 clock-names = "core", "iface";
45 }; 63 };
46 64
47 qcom,ssbi@500000 { 65 qcom,ssbi@500000 {
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 6ac94967d2d3..9e5dadb101eb 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -2,6 +2,8 @@
2 2
3#include "skeleton.dtsi" 3#include "skeleton.dtsi"
4 4
5#include <dt-bindings/clock/qcom,gcc-msm8974.h>
6
5/ { 7/ {
6 model = "Qualcomm MSM8974"; 8 model = "Qualcomm MSM8974";
7 compatible = "qcom,msm8974"; 9 compatible = "qcom,msm8974";
@@ -93,5 +95,27 @@
93 compatible = "qcom,pshold"; 95 compatible = "qcom,pshold";
94 reg = <0xfc4ab000 0x4>; 96 reg = <0xfc4ab000 0x4>;
95 }; 97 };
98
99 gcc: clock-controller@fc400000 {
100 compatible = "qcom,gcc-msm8974";
101 #clock-cells = <1>;
102 #reset-cells = <1>;
103 reg = <0xfc400000 0x4000>;
104 };
105
106 mmcc: clock-controller@fd8c0000 {
107 compatible = "qcom,mmcc-msm8974";
108 #clock-cells = <1>;
109 #reset-cells = <1>;
110 reg = <0xfd8c0000 0x6000>;
111 };
112
113 serial@f991e000 {
114 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
115 reg = <0xf991e000 0x1000>;
116 interrupts = <0 108 0x0>;
117 clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
118 clock-names = "core", "iface";
119 };
96 }; 120 };
97}; 121};
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index f48487c2a970..71b1251f79c7 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -197,7 +197,7 @@
197 reg = <0 0xe6508000 0 0x40>; 197 reg = <0 0xe6508000 0 0x40>;
198 interrupt-parent = <&gic>; 198 interrupt-parent = <&gic>;
199 interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>; 199 interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;
200 clocks = <&mstp3_clks R8A7790_CLK_I2C0>; 200 clocks = <&mstp9_clks R8A7790_CLK_I2C0>;
201 status = "disabled"; 201 status = "disabled";
202 }; 202 };
203 203
@@ -208,7 +208,7 @@
208 reg = <0 0xe6518000 0 0x40>; 208 reg = <0 0xe6518000 0 0x40>;
209 interrupt-parent = <&gic>; 209 interrupt-parent = <&gic>;
210 interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>; 210 interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>;
211 clocks = <&mstp3_clks R8A7790_CLK_I2C1>; 211 clocks = <&mstp9_clks R8A7790_CLK_I2C1>;
212 status = "disabled"; 212 status = "disabled";
213 }; 213 };
214 214
@@ -219,7 +219,7 @@
219 reg = <0 0xe6530000 0 0x40>; 219 reg = <0 0xe6530000 0 0x40>;
220 interrupt-parent = <&gic>; 220 interrupt-parent = <&gic>;
221 interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>; 221 interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>;
222 clocks = <&mstp3_clks R8A7790_CLK_I2C2>; 222 clocks = <&mstp9_clks R8A7790_CLK_I2C2>;
223 status = "disabled"; 223 status = "disabled";
224 }; 224 };
225 225
@@ -230,7 +230,7 @@
230 reg = <0 0xe6540000 0 0x40>; 230 reg = <0 0xe6540000 0 0x40>;
231 interrupt-parent = <&gic>; 231 interrupt-parent = <&gic>;
232 interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>; 232 interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>;
233 clocks = <&mstp3_clks R8A7790_CLK_I2C3>; 233 clocks = <&mstp9_clks R8A7790_CLK_I2C3>;
234 status = "disabled"; 234 status = "disabled";
235 }; 235 };
236 236
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index 5d7681be0580..8b67b19392ec 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -102,6 +102,26 @@
102 clock-names = "pclk", "hclk", "tx_clk"; 102 clock-names = "pclk", "hclk", "tx_clk";
103 }; 103 };
104 104
105 sdhci0: ps7-sdhci@e0100000 {
106 compatible = "arasan,sdhci-8.9a";
107 status = "disabled";
108 clock-names = "clk_xin", "clk_ahb";
109 clocks = <&clkc 21>, <&clkc 32>;
110 interrupt-parent = <&intc>;
111 interrupts = <0 24 4>;
112 reg = <0xe0100000 0x1000>;
113 } ;
114
115 sdhci1: ps7-sdhci@e0101000 {
116 compatible = "arasan,sdhci-8.9a";
117 status = "disabled";
118 clock-names = "clk_xin", "clk_ahb";
119 clocks = <&clkc 22>, <&clkc 33>;
120 interrupt-parent = <&intc>;
121 interrupts = <0 47 4>;
122 reg = <0xe0101000 0x1000>;
123 } ;
124
105 slcr: slcr@f8000000 { 125 slcr: slcr@f8000000 {
106 compatible = "xlnx,zynq-slcr"; 126 compatible = "xlnx,zynq-slcr";
107 reg = <0xF8000000 0x1000>; 127 reg = <0xF8000000 0x1000>;
diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts
index 34d680a46b7e..c913f77a21eb 100644
--- a/arch/arm/boot/dts/zynq-zc702.dts
+++ b/arch/arm/boot/dts/zynq-zc702.dts
@@ -34,6 +34,10 @@
34 phy-mode = "rgmii"; 34 phy-mode = "rgmii";
35}; 35};
36 36
37&sdhci0 {
38 status = "okay";
39};
40
37&uart1 { 41&uart1 {
38 status = "okay"; 42 status = "okay";
39}; 43};
diff --git a/arch/arm/boot/dts/zynq-zc706.dts b/arch/arm/boot/dts/zynq-zc706.dts
index b2835d5fc09a..88f62c50382e 100644
--- a/arch/arm/boot/dts/zynq-zc706.dts
+++ b/arch/arm/boot/dts/zynq-zc706.dts
@@ -35,6 +35,10 @@
35 phy-mode = "rgmii"; 35 phy-mode = "rgmii";
36}; 36};
37 37
38&sdhci0 {
39 status = "okay";
40};
41
38&uart1 { 42&uart1 {
39 status = "okay"; 43 status = "okay";
40}; 44};
diff --git a/arch/arm/boot/dts/zynq-zed.dts b/arch/arm/boot/dts/zynq-zed.dts
index 2eda06889dfc..82d7ef1a9a9c 100644
--- a/arch/arm/boot/dts/zynq-zed.dts
+++ b/arch/arm/boot/dts/zynq-zed.dts
@@ -35,6 +35,10 @@
35 phy-mode = "rgmii"; 35 phy-mode = "rgmii";
36}; 36};
37 37
38&sdhci0 {
39 status = "okay";
40};
41
38&uart1 { 42&uart1 {
39 status = "okay"; 43 status = "okay";
40}; 44};
diff --git a/arch/arm/configs/keystone_defconfig b/arch/arm/configs/keystone_defconfig
index a0182447d133..4582e160feab 100644
--- a/arch/arm/configs/keystone_defconfig
+++ b/arch/arm/configs/keystone_defconfig
@@ -142,6 +142,7 @@ CONFIG_USB_DWC3_DEBUG=y
142CONFIG_USB_DWC3_VERBOSE=y 142CONFIG_USB_DWC3_VERBOSE=y
143CONFIG_KEYSTONE_USB_PHY=y 143CONFIG_KEYSTONE_USB_PHY=y
144CONFIG_DMADEVICES=y 144CONFIG_DMADEVICES=y
145CONFIG_TI_EDMA=y
145CONFIG_COMMON_CLK_DEBUG=y 146CONFIG_COMMON_CLK_DEBUG=y
146CONFIG_MEMORY=y 147CONFIG_MEMORY=y
147CONFIG_EXT4_FS=y 148CONFIG_EXT4_FS=y
diff --git a/arch/arm/configs/msm_defconfig b/arch/arm/configs/msm_defconfig
index 0219c65cefd5..c5858b9eb516 100644
--- a/arch/arm/configs/msm_defconfig
+++ b/arch/arm/configs/msm_defconfig
@@ -114,6 +114,10 @@ CONFIG_USB_GADGET_VBUS_DRAW=500
114CONFIG_NEW_LEDS=y 114CONFIG_NEW_LEDS=y
115CONFIG_RTC_CLASS=y 115CONFIG_RTC_CLASS=y
116CONFIG_STAGING=y 116CONFIG_STAGING=y
117CONFIG_COMMON_CLK_QCOM=y
118CONFIG_MSM_GCC_8660=y
119CONFIG_MSM_MMCC_8960=y
120CONFIG_MSM_MMCC_8974=y
117CONFIG_MSM_IOMMU=y 121CONFIG_MSM_IOMMU=y
118CONFIG_EXT2_FS=y 122CONFIG_EXT2_FS=y
119CONFIG_EXT2_FS_XATTR=y 123CONFIG_EXT2_FS_XATTR=y
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index 687e4e811b2a..845bc745706b 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -1,7 +1,12 @@
1CONFIG_SYSVIPC=y
1CONFIG_IRQ_DOMAIN_DEBUG=y 2CONFIG_IRQ_DOMAIN_DEBUG=y
2CONFIG_NO_HZ=y 3CONFIG_NO_HZ=y
3CONFIG_HIGH_RES_TIMERS=y 4CONFIG_HIGH_RES_TIMERS=y
4CONFIG_BLK_DEV_INITRD=y 5CONFIG_BLK_DEV_INITRD=y
6CONFIG_EMBEDDED=y
7CONFIG_MODULES=y
8CONFIG_MODULE_UNLOAD=y
9CONFIG_PARTITION_ADVANCED=y
5CONFIG_ARCH_MVEBU=y 10CONFIG_ARCH_MVEBU=y
6CONFIG_MACH_ARMADA_370=y 11CONFIG_MACH_ARMADA_370=y
7CONFIG_MACH_ARMADA_XP=y 12CONFIG_MACH_ARMADA_XP=y
@@ -38,7 +43,7 @@ CONFIG_ARCH_TEGRA=y
38CONFIG_ARCH_TEGRA_2x_SOC=y 43CONFIG_ARCH_TEGRA_2x_SOC=y
39CONFIG_ARCH_TEGRA_3x_SOC=y 44CONFIG_ARCH_TEGRA_3x_SOC=y
40CONFIG_ARCH_TEGRA_114_SOC=y 45CONFIG_ARCH_TEGRA_114_SOC=y
41CONFIG_TEGRA_PCI=y 46CONFIG_ARCH_TEGRA_124_SOC=y
42CONFIG_TEGRA_EMC_SCALING_ENABLE=y 47CONFIG_TEGRA_EMC_SCALING_ENABLE=y
43CONFIG_ARCH_U8500=y 48CONFIG_ARCH_U8500=y
44CONFIG_MACH_HREFV60=y 49CONFIG_MACH_HREFV60=y
@@ -49,19 +54,55 @@ CONFIG_ARCH_VEXPRESS_CA9X4=y
49CONFIG_ARCH_VIRT=y 54CONFIG_ARCH_VIRT=y
50CONFIG_ARCH_WM8850=y 55CONFIG_ARCH_WM8850=y
51CONFIG_ARCH_ZYNQ=y 56CONFIG_ARCH_ZYNQ=y
57CONFIG_TRUSTED_FOUNDATIONS=y
58CONFIG_PCI=y
59CONFIG_PCI_MSI=y
60CONFIG_PCI_MVEBU=y
61CONFIG_PCI_TEGRA=y
52CONFIG_SMP=y 62CONFIG_SMP=y
53CONFIG_HIGHPTE=y 63CONFIG_HIGHPTE=y
64CONFIG_CMA=y
54CONFIG_ARM_APPENDED_DTB=y 65CONFIG_ARM_APPENDED_DTB=y
55CONFIG_ARM_ATAG_DTB_COMPAT=y 66CONFIG_ARM_ATAG_DTB_COMPAT=y
67CONFIG_KEXEC=y
68CONFIG_CPU_FREQ=y
69CONFIG_CPU_FREQ_STAT_DETAILS=y
70CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
71CONFIG_CPU_IDLE=y
56CONFIG_NET=y 72CONFIG_NET=y
73CONFIG_PACKET=y
57CONFIG_UNIX=y 74CONFIG_UNIX=y
58CONFIG_INET=y 75CONFIG_INET=y
59CONFIG_IP_PNP=y 76CONFIG_IP_PNP=y
60CONFIG_IP_PNP_DHCP=y 77CONFIG_IP_PNP_DHCP=y
78CONFIG_IP_PNP_BOOTP=y
79CONFIG_IP_PNP_RARP=y
80CONFIG_IPV6_ROUTER_PREF=y
81CONFIG_IPV6_OPTIMISTIC_DAD=y
82CONFIG_INET6_AH=m
83CONFIG_INET6_ESP=m
84CONFIG_INET6_IPCOMP=m
85CONFIG_IPV6_MIP6=m
86CONFIG_IPV6_TUNNEL=m
87CONFIG_IPV6_MULTIPLE_TABLES=y
88CONFIG_CFG80211=m
89CONFIG_MAC80211=m
90CONFIG_RFKILL=y
91CONFIG_RFKILL_INPUT=y
92CONFIG_RFKILL_GPIO=y
61CONFIG_DEVTMPFS=y 93CONFIG_DEVTMPFS=y
62CONFIG_DEVTMPFS_MOUNT=y 94CONFIG_DEVTMPFS_MOUNT=y
95CONFIG_DMA_CMA=y
63CONFIG_OMAP_OCP2SCP=y 96CONFIG_OMAP_OCP2SCP=y
97CONFIG_MTD=y
98CONFIG_MTD_M25P80=y
99CONFIG_BLK_DEV_LOOP=y
100CONFIG_ICS932S401=y
101CONFIG_APDS9802ALS=y
102CONFIG_ISL29003=y
64CONFIG_BLK_DEV_SD=y 103CONFIG_BLK_DEV_SD=y
104CONFIG_BLK_DEV_SR=y
105CONFIG_SCSI_MULTI_LUN=y
65CONFIG_ATA=y 106CONFIG_ATA=y
66CONFIG_SATA_AHCI_PLATFORM=y 107CONFIG_SATA_AHCI_PLATFORM=y
67CONFIG_SATA_HIGHBANK=y 108CONFIG_SATA_HIGHBANK=y
@@ -69,13 +110,30 @@ CONFIG_SATA_MV=y
69CONFIG_NETDEVICES=y 110CONFIG_NETDEVICES=y
70CONFIG_SUN4I_EMAC=y 111CONFIG_SUN4I_EMAC=y
71CONFIG_NET_CALXEDA_XGMAC=y 112CONFIG_NET_CALXEDA_XGMAC=y
113CONFIG_MVNETA=y
72CONFIG_KS8851=y 114CONFIG_KS8851=y
115CONFIG_R8169=y
73CONFIG_SMSC911X=y 116CONFIG_SMSC911X=y
74CONFIG_STMMAC_ETH=y 117CONFIG_STMMAC_ETH=y
75CONFIG_ICPLUS_PHY=y
76CONFIG_MDIO_SUN4I=y
77CONFIG_TI_CPSW=y 118CONFIG_TI_CPSW=y
119CONFIG_AT803X_PHY=y
120CONFIG_MARVELL_PHY=y
121CONFIG_ICPLUS_PHY=y
122CONFIG_USB_PEGASUS=y
123CONFIG_USB_USBNET=y
124CONFIG_USB_NET_SMSC75XX=y
125CONFIG_USB_NET_SMSC95XX=y
126CONFIG_BRCMFMAC=m
127CONFIG_RT2X00=m
128CONFIG_RT2800USB=m
129CONFIG_INPUT_EVDEV=y
130CONFIG_KEYBOARD_GPIO=y
131CONFIG_KEYBOARD_TEGRA=y
78CONFIG_KEYBOARD_SPEAR=y 132CONFIG_KEYBOARD_SPEAR=y
133CONFIG_KEYBOARD_CROS_EC=y
134CONFIG_MOUSE_PS2_ELANTECH=y
135CONFIG_INPUT_MISC=y
136CONFIG_INPUT_MPU3050=y
79CONFIG_SERIO_AMBAKMI=y 137CONFIG_SERIO_AMBAKMI=y
80CONFIG_SERIAL_8250=y 138CONFIG_SERIAL_8250=y
81CONFIG_SERIAL_8250_CONSOLE=y 139CONFIG_SERIAL_8250_CONSOLE=y
@@ -98,30 +156,81 @@ CONFIG_SERIAL_FSL_LPUART=y
98CONFIG_SERIAL_FSL_LPUART_CONSOLE=y 156CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
99CONFIG_SERIAL_ST_ASC=y 157CONFIG_SERIAL_ST_ASC=y
100CONFIG_SERIAL_ST_ASC_CONSOLE=y 158CONFIG_SERIAL_ST_ASC_CONSOLE=y
159CONFIG_I2C_CHARDEV=y
160CONFIG_I2C_MUX=y
161CONFIG_I2C_MUX_PINCTRL=y
101CONFIG_I2C_DESIGNWARE_PLATFORM=y 162CONFIG_I2C_DESIGNWARE_PLATFORM=y
163CONFIG_I2C_MV64XXX=y
102CONFIG_I2C_SIRF=y 164CONFIG_I2C_SIRF=y
103CONFIG_I2C_TEGRA=y 165CONFIG_I2C_TEGRA=y
104CONFIG_SPI=y 166CONFIG_SPI=y
105CONFIG_SPI_OMAP24XX=y 167CONFIG_SPI_OMAP24XX=y
168CONFIG_SPI_ORION=y
106CONFIG_SPI_PL022=y 169CONFIG_SPI_PL022=y
107CONFIG_SPI_SIRF=y 170CONFIG_SPI_SIRF=y
108CONFIG_SPI_TEGRA114=y 171CONFIG_SPI_TEGRA114=y
172CONFIG_SPI_TEGRA20_SFLASH=y
109CONFIG_SPI_TEGRA20_SLINK=y 173CONFIG_SPI_TEGRA20_SLINK=y
110CONFIG_PINCTRL_SINGLE=y 174CONFIG_PINCTRL_AS3722=y
175CONFIG_PINCTRL_PALMAS=y
176CONFIG_GPIO_SYSFS=y
111CONFIG_GPIO_GENERIC_PLATFORM=y 177CONFIG_GPIO_GENERIC_PLATFORM=y
178CONFIG_GPIO_PCA953X_IRQ=y
112CONFIG_GPIO_TWL4030=y 179CONFIG_GPIO_TWL4030=y
113CONFIG_REGULATOR_GPIO=y 180CONFIG_GPIO_PALMAS=y
181CONFIG_GPIO_TPS6586X=y
182CONFIG_GPIO_TPS65910=y
183CONFIG_BATTERY_SBS=y
184CONFIG_CHARGER_TPS65090=y
185CONFIG_POWER_RESET_AS3722=y
186CONFIG_POWER_RESET_GPIO=y
187CONFIG_SENSORS_LM90=y
188CONFIG_THERMAL=y
189CONFIG_ARMADA_THERMAL=y
190CONFIG_MFD_AS3722=y
191CONFIG_MFD_CROS_EC=y
192CONFIG_MFD_CROS_EC_SPI=y
193CONFIG_MFD_MAX8907=y
194CONFIG_MFD_PALMAS=y
195CONFIG_MFD_TPS65090=y
196CONFIG_MFD_TPS6586X=y
197CONFIG_MFD_TPS65910=y
198CONFIG_REGULATOR_VIRTUAL_CONSUMER=y
114CONFIG_REGULATOR_AB8500=y 199CONFIG_REGULATOR_AB8500=y
200CONFIG_REGULATOR_AS3722=y
201CONFIG_REGULATOR_GPIO=y
202CONFIG_REGULATOR_MAX8907=y
203CONFIG_REGULATOR_PALMAS=y
115CONFIG_REGULATOR_TPS51632=y 204CONFIG_REGULATOR_TPS51632=y
116CONFIG_REGULATOR_TPS62360=y 205CONFIG_REGULATOR_TPS62360=y
206CONFIG_REGULATOR_TPS65090=y
207CONFIG_REGULATOR_TPS6586X=y
208CONFIG_REGULATOR_TPS65910=y
117CONFIG_REGULATOR_TWL4030=y 209CONFIG_REGULATOR_TWL4030=y
118CONFIG_REGULATOR_VEXPRESS=y 210CONFIG_REGULATOR_VEXPRESS=y
211CONFIG_MEDIA_SUPPORT=y
212CONFIG_MEDIA_CAMERA_SUPPORT=y
213CONFIG_MEDIA_USB_SUPPORT=y
119CONFIG_DRM=y 214CONFIG_DRM=y
120CONFIG_TEGRA_HOST1X=y
121CONFIG_DRM_TEGRA=y 215CONFIG_DRM_TEGRA=y
216CONFIG_DRM_PANEL_SIMPLE=y
122CONFIG_FB_ARMCLCD=y 217CONFIG_FB_ARMCLCD=y
123CONFIG_FB_WM8505=y 218CONFIG_FB_WM8505=y
124CONFIG_FB_SIMPLE=y 219CONFIG_FB_SIMPLE=y
220CONFIG_BACKLIGHT_LCD_SUPPORT=y
221CONFIG_BACKLIGHT_CLASS_DEVICE=y
222CONFIG_BACKLIGHT_PWM=y
223CONFIG_FRAMEBUFFER_CONSOLE=y
224CONFIG_SOUND=y
225CONFIG_SND=y
226CONFIG_SND_SOC=y
227CONFIG_SND_SOC_TEGRA=y
228CONFIG_SND_SOC_TEGRA_RT5640=y
229CONFIG_SND_SOC_TEGRA_WM8753=y
230CONFIG_SND_SOC_TEGRA_WM8903=y
231CONFIG_SND_SOC_TEGRA_TRIMSLICE=y
232CONFIG_SND_SOC_TEGRA_ALC5632=y
233CONFIG_SND_SOC_TEGRA_MAX98090=y
125CONFIG_USB=y 234CONFIG_USB=y
126CONFIG_USB_XHCI_HCD=y 235CONFIG_USB_XHCI_HCD=y
127CONFIG_USB_EHCI_HCD=y 236CONFIG_USB_EHCI_HCD=y
@@ -132,8 +241,6 @@ CONFIG_USB_STORAGE=y
132CONFIG_USB_CHIPIDEA=y 241CONFIG_USB_CHIPIDEA=y
133CONFIG_USB_CHIPIDEA_HOST=y 242CONFIG_USB_CHIPIDEA_HOST=y
134CONFIG_AB8500_USB=y 243CONFIG_AB8500_USB=y
135CONFIG_NOP_USB_XCEIV=y
136CONFIG_OMAP_USB2=y
137CONFIG_OMAP_USB3=y 244CONFIG_OMAP_USB3=y
138CONFIG_SAMSUNG_USB2PHY=y 245CONFIG_SAMSUNG_USB2PHY=y
139CONFIG_SAMSUNG_USB3PHY=y 246CONFIG_SAMSUNG_USB3PHY=y
@@ -144,24 +251,32 @@ CONFIG_MMC=y
144CONFIG_MMC_BLOCK_MINORS=16 251CONFIG_MMC_BLOCK_MINORS=16
145CONFIG_MMC_ARMMMCI=y 252CONFIG_MMC_ARMMMCI=y
146CONFIG_MMC_SDHCI=y 253CONFIG_MMC_SDHCI=y
147CONFIG_MMC_SDHCI_PLTFM=y
148CONFIG_MMC_SDHCI_ESDHC_IMX=y 254CONFIG_MMC_SDHCI_ESDHC_IMX=y
149CONFIG_MMC_SDHCI_TEGRA=y 255CONFIG_MMC_SDHCI_TEGRA=y
150CONFIG_MMC_SDHCI_SPEAR=y 256CONFIG_MMC_SDHCI_SPEAR=y
151CONFIG_MMC_SDHCI_BCM_KONA=y 257CONFIG_MMC_SDHCI_BCM_KONA=y
152CONFIG_MMC_OMAP=y 258CONFIG_MMC_OMAP=y
153CONFIG_MMC_OMAP_HS=y 259CONFIG_MMC_OMAP_HS=y
260CONFIG_MMC_MVSDIO=y
154CONFIG_EDAC=y 261CONFIG_EDAC=y
155CONFIG_EDAC_MM_EDAC=y 262CONFIG_EDAC_MM_EDAC=y
156CONFIG_EDAC_HIGHBANK_MC=y 263CONFIG_EDAC_HIGHBANK_MC=y
157CONFIG_EDAC_HIGHBANK_L2=y 264CONFIG_EDAC_HIGHBANK_L2=y
158CONFIG_RTC_CLASS=y 265CONFIG_RTC_CLASS=y
266CONFIG_RTC_DRV_AS3722=y
267CONFIG_RTC_DRV_MAX8907=y
268CONFIG_RTC_DRV_PALMAS=y
159CONFIG_RTC_DRV_TWL4030=y 269CONFIG_RTC_DRV_TWL4030=y
270CONFIG_RTC_DRV_TPS6586X=y
271CONFIG_RTC_DRV_TPS65910=y
272CONFIG_RTC_DRV_EM3027=y
160CONFIG_RTC_DRV_PL031=y 273CONFIG_RTC_DRV_PL031=y
161CONFIG_RTC_DRV_VT8500=y 274CONFIG_RTC_DRV_VT8500=y
275CONFIG_RTC_DRV_MV=y
162CONFIG_RTC_DRV_TEGRA=y 276CONFIG_RTC_DRV_TEGRA=y
163CONFIG_DMADEVICES=y 277CONFIG_DMADEVICES=y
164CONFIG_DW_DMAC=y 278CONFIG_DW_DMAC=y
279CONFIG_MV_XOR=y
165CONFIG_TEGRA20_APB_DMA=y 280CONFIG_TEGRA20_APB_DMA=y
166CONFIG_STE_DMA40=y 281CONFIG_STE_DMA40=y
167CONFIG_SIRF_DMA=y 282CONFIG_SIRF_DMA=y
@@ -171,15 +286,34 @@ CONFIG_IMX_SDMA=y
171CONFIG_IMX_DMA=y 286CONFIG_IMX_DMA=y
172CONFIG_MXS_DMA=y 287CONFIG_MXS_DMA=y
173CONFIG_DMA_OMAP=y 288CONFIG_DMA_OMAP=y
289CONFIG_STAGING=y
290CONFIG_SENSORS_ISL29018=y
291CONFIG_SENSORS_ISL29028=y
292CONFIG_MFD_NVEC=y
293CONFIG_KEYBOARD_NVEC=y
294CONFIG_SERIO_NVEC_PS2=y
295CONFIG_NVEC_POWER=y
296CONFIG_TEGRA_IOMMU_GART=y
297CONFIG_TEGRA_IOMMU_SMMU=y
298CONFIG_MEMORY=y
299CONFIG_IIO=y
300CONFIG_AK8975=y
174CONFIG_PWM=y 301CONFIG_PWM=y
302CONFIG_PWM_TEGRA=y
175CONFIG_PWM_VT8500=y 303CONFIG_PWM_VT8500=y
304CONFIG_OMAP_USB2=y
176CONFIG_EXT4_FS=y 305CONFIG_EXT4_FS=y
306CONFIG_VFAT_FS=y
177CONFIG_TMPFS=y 307CONFIG_TMPFS=y
308CONFIG_SQUASHFS=y
309CONFIG_SQUASHFS_LZO=y
310CONFIG_SQUASHFS_XZ=y
178CONFIG_NFS_FS=y 311CONFIG_NFS_FS=y
179CONFIG_NFS_V3_ACL=y 312CONFIG_NFS_V3_ACL=y
180CONFIG_NFS_V4=y 313CONFIG_NFS_V4=y
181CONFIG_ROOT_NFS=y 314CONFIG_ROOT_NFS=y
182CONFIG_PRINTK_TIME=y 315CONFIG_PRINTK_TIME=y
183CONFIG_DEBUG_FS=y 316CONFIG_DEBUG_FS=y
184CONFIG_DEBUG_KERNEL=y 317CONFIG_MAGIC_SYSRQ=y
185CONFIG_LOCKUP_DETECTOR=y 318CONFIG_LOCKUP_DETECTOR=y
319CONFIG_CRYPTO_DEV_TEGRA_AES=y
diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig
index 5fdc9a09d339..00fe9e9710fd 100644
--- a/arch/arm/configs/tegra_defconfig
+++ b/arch/arm/configs/tegra_defconfig
@@ -29,11 +29,11 @@ CONFIG_ARCH_TEGRA_3x_SOC=y
29CONFIG_ARCH_TEGRA_114_SOC=y 29CONFIG_ARCH_TEGRA_114_SOC=y
30CONFIG_ARCH_TEGRA_124_SOC=y 30CONFIG_ARCH_TEGRA_124_SOC=y
31CONFIG_TEGRA_EMC_SCALING_ENABLE=y 31CONFIG_TEGRA_EMC_SCALING_ENABLE=y
32CONFIG_TRUSTED_FOUNDATIONS=y
32CONFIG_PCI=y 33CONFIG_PCI=y
33CONFIG_PCI_MSI=y 34CONFIG_PCI_MSI=y
34CONFIG_PCI_TEGRA=y 35CONFIG_PCI_TEGRA=y
35CONFIG_PCIEPORTBUS=y 36CONFIG_PCIEPORTBUS=y
36CONFIG_TRUSTED_FOUNDATIONS=y
37CONFIG_SMP=y 37CONFIG_SMP=y
38CONFIG_PREEMPT=y 38CONFIG_PREEMPT=y
39CONFIG_AEABI=y 39CONFIG_AEABI=y
@@ -125,7 +125,6 @@ CONFIG_SERIAL_TEGRA=y
125CONFIG_SERIAL_OF_PLATFORM=y 125CONFIG_SERIAL_OF_PLATFORM=y
126# CONFIG_HW_RANDOM is not set 126# CONFIG_HW_RANDOM is not set
127# CONFIG_I2C_COMPAT is not set 127# CONFIG_I2C_COMPAT is not set
128CONFIG_I2C_MUX=y
129CONFIG_I2C_MUX_PINCTRL=y 128CONFIG_I2C_MUX_PINCTRL=y
130CONFIG_I2C_TEGRA=y 129CONFIG_I2C_TEGRA=y
131CONFIG_SPI=y 130CONFIG_SPI=y
@@ -169,9 +168,8 @@ CONFIG_MEDIA_CAMERA_SUPPORT=y
169CONFIG_MEDIA_USB_SUPPORT=y 168CONFIG_MEDIA_USB_SUPPORT=y
170CONFIG_USB_VIDEO_CLASS=m 169CONFIG_USB_VIDEO_CLASS=m
171CONFIG_DRM=y 170CONFIG_DRM=y
172CONFIG_DRM_PANEL=y
173CONFIG_DRM_PANEL_SIMPLE=y
174CONFIG_DRM_TEGRA=y 171CONFIG_DRM_TEGRA=y
172CONFIG_DRM_PANEL_SIMPLE=y
175CONFIG_BACKLIGHT_LCD_SUPPORT=y 173CONFIG_BACKLIGHT_LCD_SUPPORT=y
176# CONFIG_LCD_CLASS_DEVICE is not set 174# CONFIG_LCD_CLASS_DEVICE is not set
177CONFIG_BACKLIGHT_CLASS_DEVICE=y 175CONFIG_BACKLIGHT_CLASS_DEVICE=y
@@ -206,10 +204,7 @@ CONFIG_MMC_BLOCK_MINORS=16
206CONFIG_MMC_SDHCI=y 204CONFIG_MMC_SDHCI=y
207CONFIG_MMC_SDHCI_PLTFM=y 205CONFIG_MMC_SDHCI_PLTFM=y
208CONFIG_MMC_SDHCI_TEGRA=y 206CONFIG_MMC_SDHCI_TEGRA=y
209CONFIG_NEW_LEDS=y
210CONFIG_LEDS_CLASS=y
211CONFIG_LEDS_GPIO=y 207CONFIG_LEDS_GPIO=y
212CONFIG_LEDS_TRIGGERS=y
213CONFIG_LEDS_TRIGGER_TIMER=y 208CONFIG_LEDS_TRIGGER_TIMER=y
214CONFIG_LEDS_TRIGGER_ONESHOT=y 209CONFIG_LEDS_TRIGGER_ONESHOT=y
215CONFIG_LEDS_TRIGGER_HEARTBEAT=y 210CONFIG_LEDS_TRIGGER_HEARTBEAT=y
@@ -235,7 +230,6 @@ CONFIG_KEYBOARD_NVEC=y
235CONFIG_SERIO_NVEC_PS2=y 230CONFIG_SERIO_NVEC_PS2=y
236CONFIG_NVEC_POWER=y 231CONFIG_NVEC_POWER=y
237CONFIG_NVEC_PAZ00=y 232CONFIG_NVEC_PAZ00=y
238CONFIG_COMMON_CLK_DEBUG=y
239CONFIG_TEGRA_IOMMU_GART=y 233CONFIG_TEGRA_IOMMU_GART=y
240CONFIG_TEGRA_IOMMU_SMMU=y 234CONFIG_TEGRA_IOMMU_SMMU=y
241CONFIG_MEMORY=y 235CONFIG_MEMORY=y
@@ -265,6 +259,7 @@ CONFIG_NLS_CODEPAGE_437=y
265CONFIG_NLS_ISO8859_1=y 259CONFIG_NLS_ISO8859_1=y
266CONFIG_PRINTK_TIME=y 260CONFIG_PRINTK_TIME=y
267CONFIG_DEBUG_INFO=y 261CONFIG_DEBUG_INFO=y
262CONFIG_DEBUG_FS=y
268CONFIG_MAGIC_SYSRQ=y 263CONFIG_MAGIC_SYSRQ=y
269CONFIG_DEBUG_SLAB=y 264CONFIG_DEBUG_SLAB=y
270CONFIG_DEBUG_VM=y 265CONFIG_DEBUG_VM=y
diff --git a/arch/arm/mach-hisi/Kconfig b/arch/arm/mach-hisi/Kconfig
index 018ad67f1b38..8f4649b301b2 100644
--- a/arch/arm/mach-hisi/Kconfig
+++ b/arch/arm/mach-hisi/Kconfig
@@ -12,6 +12,5 @@ config ARCH_HI3xxx
12 select HAVE_SMP 12 select HAVE_SMP
13 select PINCTRL 13 select PINCTRL
14 select PINCTRL_SINGLE 14 select PINCTRL_SINGLE
15 select SMP
16 help 15 help
17 Support for Hisilicon Hi36xx/Hi37xx processor family 16 Support for Hisilicon Hi36xx/Hi37xx processor family
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 5e84149d1790..a3ef961e4a93 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -64,6 +64,7 @@ static void __iomem *intcp_con_base;
64 64
65/* 65/*
66 * Logical Physical 66 * Logical Physical
67 * f1000000 10000000 Core module registers
67 * f1300000 13000000 Counter/Timer 68 * f1300000 13000000 Counter/Timer
68 * f1400000 14000000 Interrupt controller 69 * f1400000 14000000 Interrupt controller
69 * f1600000 16000000 UART 0 70 * f1600000 16000000 UART 0
@@ -75,6 +76,11 @@ static void __iomem *intcp_con_base;
75 76
76static struct map_desc intcp_io_desc[] __initdata __maybe_unused = { 77static struct map_desc intcp_io_desc[] __initdata __maybe_unused = {
77 { 78 {
79 .virtual = IO_ADDRESS(INTEGRATOR_HDR_BASE),
80 .pfn = __phys_to_pfn(INTEGRATOR_HDR_BASE),
81 .length = SZ_4K,
82 .type = MT_DEVICE
83 }, {
78 .virtual = IO_ADDRESS(INTEGRATOR_CT_BASE), 84 .virtual = IO_ADDRESS(INTEGRATOR_CT_BASE),
79 .pfn = __phys_to_pfn(INTEGRATOR_CT_BASE), 85 .pfn = __phys_to_pfn(INTEGRATOR_CT_BASE),
80 .length = SZ_4K, 86 .length = SZ_4K,
diff --git a/arch/arm/mach-iop32x/em7210.c b/arch/arm/mach-iop32x/em7210.c
index 177cd073a83b..77e1ff057303 100644
--- a/arch/arm/mach-iop32x/em7210.c
+++ b/arch/arm/mach-iop32x/em7210.c
@@ -23,6 +23,7 @@
23#include <linux/mtd/physmap.h> 23#include <linux/mtd/physmap.h>
24#include <linux/platform_device.h> 24#include <linux/platform_device.h>
25#include <linux/i2c.h> 25#include <linux/i2c.h>
26#include <linux/gpio.h>
26#include <mach/hardware.h> 27#include <mach/hardware.h>
27#include <linux/io.h> 28#include <linux/io.h>
28#include <linux/irq.h> 29#include <linux/irq.h>
@@ -176,11 +177,35 @@ static struct platform_device em7210_serial_device = {
176 .resource = &em7210_uart_resource, 177 .resource = &em7210_uart_resource,
177}; 178};
178 179
180#define EM7210_HARDWARE_POWER 0
181
179void em7210_power_off(void) 182void em7210_power_off(void)
180{ 183{
181 *IOP3XX_GPOE &= 0xfe; 184 int ret;
182 *IOP3XX_GPOD |= 0x01; 185
186 ret = gpio_direction_output(EM7210_HARDWARE_POWER, 1);
187 if (ret)
188 pr_crit("could not drive power off GPIO high\n");
189}
190
191static int __init em7210_request_gpios(void)
192{
193 int ret;
194
195 if (!machine_is_em7210())
196 return 0;
197
198 ret = gpio_request(EM7210_HARDWARE_POWER, "power");
199 if (ret) {
200 pr_err("could not request power off GPIO\n");
201 return 0;
202 }
203
204 pm_power_off = em7210_power_off;
205
206 return 0;
183} 207}
208device_initcall(em7210_request_gpios);
184 209
185static void __init em7210_init_machine(void) 210static void __init em7210_init_machine(void)
186{ 211{
@@ -194,9 +219,6 @@ static void __init em7210_init_machine(void)
194 219
195 i2c_register_board_info(0, em7210_i2c_devices, 220 i2c_register_board_info(0, em7210_i2c_devices,
196 ARRAY_SIZE(em7210_i2c_devices)); 221 ARRAY_SIZE(em7210_i2c_devices));
197
198
199 pm_power_off = em7210_power_off;
200} 222}
201 223
202MACHINE_START(EM7210, "Lanner EM7210") 224MACHINE_START(EM7210, "Lanner EM7210")
diff --git a/arch/arm/mach-keystone/Kconfig b/arch/arm/mach-keystone/Kconfig
index dabc5eee52e7..90a708fef541 100644
--- a/arch/arm/mach-keystone/Kconfig
+++ b/arch/arm/mach-keystone/Kconfig
@@ -10,7 +10,6 @@ config ARCH_KEYSTONE
10 select ARCH_WANT_OPTIONAL_GPIOLIB 10 select ARCH_WANT_OPTIONAL_GPIOLIB
11 select ARM_ERRATA_798181 if SMP 11 select ARM_ERRATA_798181 if SMP
12 select COMMON_CLK_KEYSTONE 12 select COMMON_CLK_KEYSTONE
13 select TI_EDMA
14 select ARCH_SUPPORTS_BIG_ENDIAN 13 select ARCH_SUPPORTS_BIG_ENDIAN
15 select ZONE_DMA if ARM_LPAE 14 select ZONE_DMA if ARM_LPAE
16 help 15 help
diff --git a/arch/arm/mach-kirkwood/pm.c b/arch/arm/mach-kirkwood/pm.c
index 8783a7184e73..c6ab8d9303a5 100644
--- a/arch/arm/mach-kirkwood/pm.c
+++ b/arch/arm/mach-kirkwood/pm.c
@@ -18,6 +18,7 @@
18#include <linux/suspend.h> 18#include <linux/suspend.h>
19#include <linux/io.h> 19#include <linux/io.h>
20#include <mach/bridge-regs.h> 20#include <mach/bridge-regs.h>
21#include "common.h"
21 22
22static void __iomem *ddr_operation_base; 23static void __iomem *ddr_operation_base;
23 24
@@ -65,9 +66,8 @@ static const struct platform_suspend_ops kirkwood_suspend_ops = {
65 .valid = kirkwood_pm_valid_standby, 66 .valid = kirkwood_pm_valid_standby,
66}; 67};
67 68
68int __init kirkwood_pm_init(void) 69void __init kirkwood_pm_init(void)
69{ 70{
70 ddr_operation_base = ioremap(DDR_OPERATION_BASE, 4); 71 ddr_operation_base = ioremap(DDR_OPERATION_BASE, 4);
71 suspend_set_ops(&kirkwood_suspend_ops); 72 suspend_set_ops(&kirkwood_suspend_ops);
72 return 0;
73} 73}
diff --git a/arch/arm/mach-mvebu/mvebu-soc-id.c b/arch/arm/mach-mvebu/mvebu-soc-id.c
index fe4fc1cbdfaf..f3b325f6cbd4 100644
--- a/arch/arm/mach-mvebu/mvebu-soc-id.c
+++ b/arch/arm/mach-mvebu/mvebu-soc-id.c
@@ -88,7 +88,7 @@ static int __init mvebu_soc_id_init(void)
88 } 88 }
89 89
90 pci_base = of_iomap(child, 0); 90 pci_base = of_iomap(child, 0);
91 if (IS_ERR(pci_base)) { 91 if (pci_base == NULL) {
92 pr_err("cannot map registers\n"); 92 pr_err("cannot map registers\n");
93 ret = -ENOMEM; 93 ret = -ENOMEM;
94 goto res_ioremap; 94 goto res_ioremap;
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index e51527835160..a6aae300542c 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -62,11 +62,17 @@ static inline int omap3_pm_init(void)
62 62
63#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4) 63#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4)
64int omap4_pm_init(void); 64int omap4_pm_init(void);
65int omap4_pm_init_early(void);
65#else 66#else
66static inline int omap4_pm_init(void) 67static inline int omap4_pm_init(void)
67{ 68{
68 return 0; 69 return 0;
69} 70}
71
72static inline int omap4_pm_init_early(void)
73{
74 return 0;
75}
70#endif 76#endif
71 77
72#ifdef CONFIG_OMAP_MUX 78#ifdef CONFIG_OMAP_MUX
@@ -236,6 +242,7 @@ static inline void __iomem *omap4_get_scu_base(void)
236 242
237extern void __init gic_init_irq(void); 243extern void __init gic_init_irq(void);
238extern void gic_dist_disable(void); 244extern void gic_dist_disable(void);
245extern void gic_dist_enable(void);
239extern bool gic_dist_disabled(void); 246extern bool gic_dist_disabled(void);
240extern void gic_timer_retrigger(void); 247extern void gic_timer_retrigger(void);
241extern void omap_smc1(u32 fn, u32 arg); 248extern void omap_smc1(u32 fn, u32 arg);
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c
index 4c8982ae9529..4c158c838d40 100644
--- a/arch/arm/mach-omap2/cpuidle44xx.c
+++ b/arch/arm/mach-omap2/cpuidle44xx.c
@@ -80,6 +80,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
80 int index) 80 int index)
81{ 81{
82 struct idle_statedata *cx = state_ptr + index; 82 struct idle_statedata *cx = state_ptr + index;
83 u32 mpuss_can_lose_context = 0;
83 84
84 /* 85 /*
85 * CPU0 has to wait and stay ON until CPU1 is OFF state. 86 * CPU0 has to wait and stay ON until CPU1 is OFF state.
@@ -104,6 +105,9 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
104 } 105 }
105 } 106 }
106 107
108 mpuss_can_lose_context = (cx->mpu_state == PWRDM_POWER_RET) &&
109 (cx->mpu_logic_state == PWRDM_POWER_OFF);
110
107 /* 111 /*
108 * Call idle CPU PM enter notifier chain so that 112 * Call idle CPU PM enter notifier chain so that
109 * VFP and per CPU interrupt context is saved. 113 * VFP and per CPU interrupt context is saved.
@@ -118,9 +122,8 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
118 * Call idle CPU cluster PM enter notifier chain 122 * Call idle CPU cluster PM enter notifier chain
119 * to save GIC and wakeupgen context. 123 * to save GIC and wakeupgen context.
120 */ 124 */
121 if ((cx->mpu_state == PWRDM_POWER_RET) && 125 if (mpuss_can_lose_context)
122 (cx->mpu_logic_state == PWRDM_POWER_OFF)) 126 cpu_cluster_pm_enter();
123 cpu_cluster_pm_enter();
124 } 127 }
125 128
126 omap4_enter_lowpower(dev->cpu, cx->cpu_state); 129 omap4_enter_lowpower(dev->cpu, cx->cpu_state);
@@ -128,9 +131,23 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
128 131
129 /* Wakeup CPU1 only if it is not offlined */ 132 /* Wakeup CPU1 only if it is not offlined */
130 if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) { 133 if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) {
134
135 if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD) &&
136 mpuss_can_lose_context)
137 gic_dist_disable();
138
131 clkdm_wakeup(cpu_clkdm[1]); 139 clkdm_wakeup(cpu_clkdm[1]);
132 omap_set_pwrdm_state(cpu_pd[1], PWRDM_POWER_ON); 140 omap_set_pwrdm_state(cpu_pd[1], PWRDM_POWER_ON);
133 clkdm_allow_idle(cpu_clkdm[1]); 141 clkdm_allow_idle(cpu_clkdm[1]);
142
143 if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD) &&
144 mpuss_can_lose_context) {
145 while (gic_dist_disabled()) {
146 udelay(1);
147 cpu_relax();
148 }
149 gic_timer_retrigger();
150 }
134 } 151 }
135 152
136 /* 153 /*
@@ -143,8 +160,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
143 * Call idle CPU cluster PM exit notifier chain 160 * Call idle CPU cluster PM exit notifier chain
144 * to restore GIC and wakeupgen context. 161 * to restore GIC and wakeupgen context.
145 */ 162 */
146 if (dev->cpu == 0 && (cx->mpu_state == PWRDM_POWER_RET) && 163 if (dev->cpu == 0 && mpuss_can_lose_context)
147 (cx->mpu_logic_state == PWRDM_POWER_OFF))
148 cpu_cluster_pm_exit(); 164 cpu_cluster_pm_exit();
149 165
150fail: 166fail:
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 47381fd8746f..d408b15b4fbf 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -641,6 +641,7 @@ void __init omap4430_init_early(void)
641 omap_cm_base_init(); 641 omap_cm_base_init();
642 omap4xxx_check_revision(); 642 omap4xxx_check_revision();
643 omap4xxx_check_features(); 643 omap4xxx_check_features();
644 omap4_pm_init_early();
644 omap44xx_prm_init(); 645 omap44xx_prm_init();
645 omap44xx_voltagedomains_init(); 646 omap44xx_voltagedomains_init();
646 omap44xx_powerdomains_init(); 647 omap44xx_powerdomains_init();
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index f991016e2a6a..667915d236f3 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -271,6 +271,9 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
271 else 271 else
272 omap_pm_ops.finish_suspend(save_state); 272 omap_pm_ops.finish_suspend(save_state);
273 273
274 if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD) && cpu)
275 gic_dist_enable();
276
274 /* 277 /*
275 * Restore the CPUx power state to ON otherwise CPUx 278 * Restore the CPUx power state to ON otherwise CPUx
276 * power domain can transitions to programmed low power 279 * power domain can transitions to programmed low power
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 75e95d4fb448..17550aa39d0f 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -39,8 +39,6 @@
39 39
40#define OMAP5_CORE_COUNT 0x2 40#define OMAP5_CORE_COUNT 0x2
41 41
42u16 pm44xx_errata;
43
44/* SCU base address */ 42/* SCU base address */
45static void __iomem *scu_base; 43static void __iomem *scu_base;
46 44
@@ -217,10 +215,8 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
217 if (scu_base) 215 if (scu_base)
218 scu_enable(scu_base); 216 scu_enable(scu_base);
219 217
220 if (cpu_is_omap446x()) { 218 if (cpu_is_omap446x())
221 startup_addr = omap4460_secondary_startup; 219 startup_addr = omap4460_secondary_startup;
222 pm44xx_errata |= PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD;
223 }
224 220
225 /* 221 /*
226 * Write the address of secondary startup routine into the 222 * Write the address of secondary startup routine into the
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index dd893ec4c8f2..6cd3f3772ecf 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -127,6 +127,12 @@ void gic_dist_disable(void)
127 __raw_writel(0x0, gic_dist_base_addr + GIC_DIST_CTRL); 127 __raw_writel(0x0, gic_dist_base_addr + GIC_DIST_CTRL);
128} 128}
129 129
130void gic_dist_enable(void)
131{
132 if (gic_dist_base_addr)
133 __raw_writel(0x1, gic_dist_base_addr + GIC_DIST_CTRL);
134}
135
130bool gic_dist_disabled(void) 136bool gic_dist_disabled(void)
131{ 137{
132 return !(__raw_readl(gic_dist_base_addr + GIC_DIST_CTRL) & 0x1); 138 return !(__raw_readl(gic_dist_base_addr + GIC_DIST_CTRL) & 0x1);
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index 82f0698933d8..eefb30cfcabd 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -24,6 +24,8 @@
24#include "powerdomain.h" 24#include "powerdomain.h"
25#include "pm.h" 25#include "pm.h"
26 26
27u16 pm44xx_errata;
28
27struct power_state { 29struct power_state {
28 struct powerdomain *pwrdm; 30 struct powerdomain *pwrdm;
29 u32 next_state; 31 u32 next_state;
@@ -199,6 +201,19 @@ static inline int omap4_init_static_deps(void)
199} 201}
200 202
201/** 203/**
204 * omap4_pm_init_early - Does early initialization necessary for OMAP4+ devices
205 *
206 * Initializes basic stuff for power management functionality.
207 */
208int __init omap4_pm_init_early(void)
209{
210 if (cpu_is_omap446x())
211 pm44xx_errata |= PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD;
212
213 return 0;
214}
215
216/**
202 * omap4_pm_init - Init routine for OMAP4+ devices 217 * omap4_pm_init - Init routine for OMAP4+ devices
203 * 218 *
204 * Initializes all powerdomain and clockdomain target states 219 * Initializes all powerdomain and clockdomain target states
diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c
index c492e1b3dfdb..807df142444b 100644
--- a/arch/arm/plat-orion/irq.c
+++ b/arch/arm/plat-orion/irq.c
@@ -15,8 +15,51 @@
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/of_address.h> 16#include <linux/of_address.h>
17#include <linux/of_irq.h> 17#include <linux/of_irq.h>
18#include <asm/exception.h>
18#include <plat/irq.h> 19#include <plat/irq.h>
19#include <plat/orion-gpio.h> 20#include <plat/orion-gpio.h>
21#include <mach/bridge-regs.h>
22
23#ifdef CONFIG_MULTI_IRQ_HANDLER
24/*
25 * Compiling with both non-DT and DT support enabled, will
26 * break asm irq handler used by non-DT boards. Therefore,
27 * we provide a C-style irq handler even for non-DT boards,
28 * if MULTI_IRQ_HANDLER is set.
29 *
30 * Notes:
31 * - this is prepared for Kirkwood and Dove only, update
32 * accordingly if you add Orion5x or MV78x00.
33 * - Orion5x uses different macro names and has only one
34 * set of CAUSE/MASK registers.
35 * - MV78x00 uses the same macro names but has a third
36 * set of CAUSE/MASK registers.
37 *
38 */
39
40static void __iomem *orion_irq_base = IRQ_VIRT_BASE;
41
42asmlinkage void
43__exception_irq_entry orion_legacy_handle_irq(struct pt_regs *regs)
44{
45 u32 stat;
46
47 stat = readl_relaxed(orion_irq_base + IRQ_CAUSE_LOW_OFF);
48 stat &= readl_relaxed(orion_irq_base + IRQ_MASK_LOW_OFF);
49 if (stat) {
50 unsigned int hwirq = __fls(stat);
51 handle_IRQ(hwirq, regs);
52 return;
53 }
54 stat = readl_relaxed(orion_irq_base + IRQ_CAUSE_HIGH_OFF);
55 stat &= readl_relaxed(orion_irq_base + IRQ_MASK_HIGH_OFF);
56 if (stat) {
57 unsigned int hwirq = 32 + __fls(stat);
58 handle_IRQ(hwirq, regs);
59 return;
60 }
61}
62#endif
20 63
21void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr) 64void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
22{ 65{
@@ -35,6 +78,10 @@ void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
35 ct->chip.irq_unmask = irq_gc_mask_set_bit; 78 ct->chip.irq_unmask = irq_gc_mask_set_bit;
36 irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_MASK_CACHE, 79 irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_MASK_CACHE,
37 IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE); 80 IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE);
81
82#ifdef CONFIG_MULTI_IRQ_HANDLER
83 set_handle_irq(orion_legacy_handle_irq);
84#endif
38} 85}
39 86
40#ifdef CONFIG_OF 87#ifdef CONFIG_OF
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-01 02:58:40 -0500