diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/kvm/init.S | 2 | ||||
-rw-r--r-- | arch/arm/kvm/interrupts.S | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/kvm/init.S b/arch/arm/kvm/init.S index f048338135f7..1b9844d369cc 100644 --- a/arch/arm/kvm/init.S +++ b/arch/arm/kvm/init.S | |||
@@ -142,7 +142,7 @@ target: @ We're now in the trampoline code, switch page tables | |||
142 | 142 | ||
143 | @ Invalidate the old TLBs | 143 | @ Invalidate the old TLBs |
144 | mcr p15, 4, r0, c8, c7, 0 @ TLBIALLH | 144 | mcr p15, 4, r0, c8, c7, 0 @ TLBIALLH |
145 | dsb | 145 | dsb ish |
146 | 146 | ||
147 | eret | 147 | eret |
148 | 148 | ||
diff --git a/arch/arm/kvm/interrupts.S b/arch/arm/kvm/interrupts.S index 16cd4ba5d7fd..f85052facffc 100644 --- a/arch/arm/kvm/interrupts.S +++ b/arch/arm/kvm/interrupts.S | |||
@@ -55,7 +55,7 @@ ENTRY(__kvm_tlb_flush_vmid_ipa) | |||
55 | mcrr p15, 6, r2, r3, c2 @ Write VTTBR | 55 | mcrr p15, 6, r2, r3, c2 @ Write VTTBR |
56 | isb | 56 | isb |
57 | mcr p15, 0, r0, c8, c3, 0 @ TLBIALLIS (rt ignored) | 57 | mcr p15, 0, r0, c8, c3, 0 @ TLBIALLIS (rt ignored) |
58 | dsb | 58 | dsb ish |
59 | isb | 59 | isb |
60 | mov r2, #0 | 60 | mov r2, #0 |
61 | mov r3, #0 | 61 | mov r3, #0 |
@@ -79,7 +79,7 @@ ENTRY(__kvm_flush_vm_context) | |||
79 | mcr p15, 4, r0, c8, c3, 4 | 79 | mcr p15, 4, r0, c8, c3, 4 |
80 | /* Invalidate instruction caches Inner Shareable (ICIALLUIS) */ | 80 | /* Invalidate instruction caches Inner Shareable (ICIALLUIS) */ |
81 | mcr p15, 0, r0, c7, c1, 0 | 81 | mcr p15, 0, r0, c7, c1, 0 |
82 | dsb | 82 | dsb ish |
83 | isb @ Not necessary if followed by eret | 83 | isb @ Not necessary if followed by eret |
84 | 84 | ||
85 | bx lr | 85 | bx lr |