diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86/include/asm/io_apic.h | 5 | ||||
-rw-r--r-- | arch/x86/include/asm/x86_init.h | 1 | ||||
-rw-r--r-- | arch/x86/kernel/apic/io_apic.c | 20 | ||||
-rw-r--r-- | arch/x86/kernel/x86_init.c | 1 |
4 files changed, 13 insertions, 14 deletions
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h index 1838e884a5cc..459e50a424d1 100644 --- a/arch/x86/include/asm/io_apic.h +++ b/arch/x86/include/asm/io_apic.h | |||
@@ -161,6 +161,7 @@ extern void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg); | |||
161 | extern void native_compose_msi_msg(struct pci_dev *pdev, | 161 | extern void native_compose_msi_msg(struct pci_dev *pdev, |
162 | unsigned int irq, unsigned int dest, | 162 | unsigned int irq, unsigned int dest, |
163 | struct msi_msg *msg, u8 hpet_id); | 163 | struct msi_msg *msg, u8 hpet_id); |
164 | extern void native_eoi_ioapic_pin(int apic, int pin, int vector); | ||
164 | int io_apic_setup_irq_pin_once(unsigned int irq, int node, struct io_apic_irq_attr *attr); | 165 | int io_apic_setup_irq_pin_once(unsigned int irq, int node, struct io_apic_irq_attr *attr); |
165 | 166 | ||
166 | extern int save_ioapic_entries(void); | 167 | extern int save_ioapic_entries(void); |
@@ -211,6 +212,9 @@ static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned | |||
211 | { | 212 | { |
212 | x86_io_apic_ops.modify(apic, reg, value); | 213 | x86_io_apic_ops.modify(apic, reg, value); |
213 | } | 214 | } |
215 | |||
216 | extern void io_apic_eoi(unsigned int apic, unsigned int vector); | ||
217 | |||
214 | #else /* !CONFIG_X86_IO_APIC */ | 218 | #else /* !CONFIG_X86_IO_APIC */ |
215 | 219 | ||
216 | #define io_apic_assign_pci_irqs 0 | 220 | #define io_apic_assign_pci_irqs 0 |
@@ -246,6 +250,7 @@ static inline void disable_ioapic_support(void) { } | |||
246 | #define native_ioapic_set_affinity NULL | 250 | #define native_ioapic_set_affinity NULL |
247 | #define native_setup_ioapic_entry NULL | 251 | #define native_setup_ioapic_entry NULL |
248 | #define native_compose_msi_msg NULL | 252 | #define native_compose_msi_msg NULL |
253 | #define native_eoi_ioapic_pin NULL | ||
249 | #endif | 254 | #endif |
250 | 255 | ||
251 | #endif /* _ASM_X86_IO_APIC_H */ | 256 | #endif /* _ASM_X86_IO_APIC_H */ |
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h index c9f87be84b0f..7669941cc9d2 100644 --- a/arch/x86/include/asm/x86_init.h +++ b/arch/x86/include/asm/x86_init.h | |||
@@ -212,6 +212,7 @@ struct x86_io_apic_ops { | |||
212 | int (*setup_entry)(int irq, struct IO_APIC_route_entry *entry, | 212 | int (*setup_entry)(int irq, struct IO_APIC_route_entry *entry, |
213 | unsigned int destination, int vector, | 213 | unsigned int destination, int vector, |
214 | struct io_apic_irq_attr *attr); | 214 | struct io_apic_irq_attr *attr); |
215 | void (*eoi_ioapic_pin)(int apic, int pin, int vector); | ||
215 | }; | 216 | }; |
216 | 217 | ||
217 | extern struct x86_init_ops x86_init; | 218 | extern struct x86_init_ops x86_init; |
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index b832810d28f0..9ed796ccc32c 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c | |||
@@ -310,7 +310,7 @@ static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx) | |||
310 | + (mpc_ioapic_addr(idx) & ~PAGE_MASK); | 310 | + (mpc_ioapic_addr(idx) & ~PAGE_MASK); |
311 | } | 311 | } |
312 | 312 | ||
313 | static inline void io_apic_eoi(unsigned int apic, unsigned int vector) | 313 | void io_apic_eoi(unsigned int apic, unsigned int vector) |
314 | { | 314 | { |
315 | struct io_apic __iomem *io_apic = io_apic_base(apic); | 315 | struct io_apic __iomem *io_apic = io_apic_base(apic); |
316 | writel(vector, &io_apic->eoi); | 316 | writel(vector, &io_apic->eoi); |
@@ -557,19 +557,10 @@ static void unmask_ioapic_irq(struct irq_data *data) | |||
557 | * Otherwise, we simulate the EOI message manually by changing the trigger | 557 | * Otherwise, we simulate the EOI message manually by changing the trigger |
558 | * mode to edge and then back to level, with RTE being masked during this. | 558 | * mode to edge and then back to level, with RTE being masked during this. |
559 | */ | 559 | */ |
560 | static void __eoi_ioapic_pin(int apic, int pin, int vector, struct irq_cfg *cfg) | 560 | void native_eoi_ioapic_pin(int apic, int pin, int vector) |
561 | { | 561 | { |
562 | if (mpc_ioapic_ver(apic) >= 0x20) { | 562 | if (mpc_ioapic_ver(apic) >= 0x20) { |
563 | /* | 563 | io_apic_eoi(apic, vector); |
564 | * Intr-remapping uses pin number as the virtual vector | ||
565 | * in the RTE. Actual vector is programmed in | ||
566 | * intr-remapping table entry. Hence for the io-apic | ||
567 | * EOI we use the pin number. | ||
568 | */ | ||
569 | if (cfg && irq_remapped(cfg)) | ||
570 | io_apic_eoi(apic, pin); | ||
571 | else | ||
572 | io_apic_eoi(apic, vector); | ||
573 | } else { | 564 | } else { |
574 | struct IO_APIC_route_entry entry, entry1; | 565 | struct IO_APIC_route_entry entry, entry1; |
575 | 566 | ||
@@ -597,7 +588,8 @@ void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg) | |||
597 | 588 | ||
598 | raw_spin_lock_irqsave(&ioapic_lock, flags); | 589 | raw_spin_lock_irqsave(&ioapic_lock, flags); |
599 | for_each_irq_pin(entry, cfg->irq_2_pin) | 590 | for_each_irq_pin(entry, cfg->irq_2_pin) |
600 | __eoi_ioapic_pin(entry->apic, entry->pin, cfg->vector, cfg); | 591 | x86_io_apic_ops.eoi_ioapic_pin(entry->apic, entry->pin, |
592 | cfg->vector); | ||
601 | raw_spin_unlock_irqrestore(&ioapic_lock, flags); | 593 | raw_spin_unlock_irqrestore(&ioapic_lock, flags); |
602 | } | 594 | } |
603 | 595 | ||
@@ -634,7 +626,7 @@ static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin) | |||
634 | } | 626 | } |
635 | 627 | ||
636 | raw_spin_lock_irqsave(&ioapic_lock, flags); | 628 | raw_spin_lock_irqsave(&ioapic_lock, flags); |
637 | __eoi_ioapic_pin(apic, pin, entry.vector, NULL); | 629 | x86_io_apic_ops.eoi_ioapic_pin(apic, pin, entry.vector); |
638 | raw_spin_unlock_irqrestore(&ioapic_lock, flags); | 630 | raw_spin_unlock_irqrestore(&ioapic_lock, flags); |
639 | } | 631 | } |
640 | 632 | ||
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c index ee4a17c22569..d065d67c2672 100644 --- a/arch/x86/kernel/x86_init.c +++ b/arch/x86/kernel/x86_init.c | |||
@@ -129,4 +129,5 @@ struct x86_io_apic_ops x86_io_apic_ops = { | |||
129 | .print_entries = native_io_apic_print_entries, | 129 | .print_entries = native_io_apic_print_entries, |
130 | .set_affinity = native_ioapic_set_affinity, | 130 | .set_affinity = native_ioapic_set_affinity, |
131 | .setup_entry = native_setup_ioapic_entry, | 131 | .setup_entry = native_setup_ioapic_entry, |
132 | .eoi_ioapic_pin = native_eoi_ioapic_pin, | ||
132 | }; | 133 | }; |