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-rw-r--r--arch/arm/mach-netx/include/mach/netx-regs.h22
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/mach-netx/include/mach/netx-regs.h b/arch/arm/mach-netx/include/mach/netx-regs.h
index 5104a00d40f4..08c60ff227be 100644
--- a/arch/arm/mach-netx/include/mach/netx-regs.h
+++ b/arch/arm/mach-netx/include/mach/netx-regs.h
@@ -328,6 +328,28 @@
328#define NETX_PFIFO_FILL_LEVEL(pfifo) NETX_PFIFO_REG(0x180 + ((pfifo)<<2)) 328#define NETX_PFIFO_FILL_LEVEL(pfifo) NETX_PFIFO_REG(0x180 + ((pfifo)<<2))
329#define NETX_PFIFO_XPEC_ISR(xpec) NETX_PFIFO_REG(0x400 + ((xpec) << 2)) 329#define NETX_PFIFO_XPEC_ISR(xpec) NETX_PFIFO_REG(0x400 + ((xpec) << 2))
330 330
331
332/*******************************
333 * Memory Controller *
334 *******************************/
335
336/* Registers */
337#define NETX_MEMCR_REG(ofs) __io(NETX_VA_MEMCR + (ofs))
338#define NETX_MEMCR_SRAM_CTRL(cs) NETX_MEMCR_REG(0x0 + 4 * (cs)) /* SRAM for CS 0..2 */
339#define NETX_MEMCR_SDRAM_CFG_CTRL NETX_MEMCR_REG(0x40)
340#define NETX_MEMCR_SDRAM_TIMING_CTRL NETX_MEMCR_REG(0x44)
341#define NETX_MEMCR_SDRAM_MODE NETX_MEMCR_REG(0x48)
342#define NETX_MEMCR_SDRAM_EXT_MODE NETX_MEMCR_REG(0x4c)
343#define NETX_MEMCR_PRIO_TIMESLOT_CTRL NETX_MEMCR_REG(0x80)
344#define NETX_MEMCR_PRIO_ACCESS_CTRL NETX_MEMCR_REG(0x84)
345
346/* Bits */
347#define NETX_MEMCR_SRAM_CTRL_WIDTHEXTMEM(x) (((x) & 0x3) << 24)
348#define NETX_MEMCR_SRAM_CTRL_WSPOSTPAUSEEXTMEM(x) (((x) & 0x3) << 16)
349#define NETX_MEMCR_SRAM_CTRL_WSPREPASEEXTMEM(x) (((x) & 0x3) << 8)
350#define NETX_MEMCR_SRAM_CTRL_WSEXTMEM(x) (((x) & 0x1f) << 0)
351
352
331/******************************* 353/*******************************
332 * Dual Port Memory * 354 * Dual Port Memory *
333 *******************************/ 355 *******************************/