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-rw-r--r--arch/arm/mach-omap2/cclock33xx_data.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/cclock33xx_data.c b/arch/arm/mach-omap2/cclock33xx_data.c
index ba6534d7f155..865d30ee812f 100644
--- a/arch/arm/mach-omap2/cclock33xx_data.c
+++ b/arch/arm/mach-omap2/cclock33xx_data.c
@@ -421,6 +421,10 @@ static struct clk aes0_fck;
421DEFINE_STRUCT_CLK_HW_OMAP(aes0_fck, NULL); 421DEFINE_STRUCT_CLK_HW_OMAP(aes0_fck, NULL);
422DEFINE_STRUCT_CLK(aes0_fck, dpll_core_ck_parents, clk_ops_null); 422DEFINE_STRUCT_CLK(aes0_fck, dpll_core_ck_parents, clk_ops_null);
423 423
424static struct clk rng_fck;
425DEFINE_STRUCT_CLK_HW_OMAP(rng_fck, NULL);
426DEFINE_STRUCT_CLK(rng_fck, dpll_core_ck_parents, clk_ops_null);
427
424/* 428/*
425 * Modules clock nodes 429 * Modules clock nodes
426 * 430 *
@@ -966,6 +970,7 @@ static struct omap_clk am33xx_clks[] = {
966 CLK(NULL, "smartreflex1_fck", &smartreflex1_fck), 970 CLK(NULL, "smartreflex1_fck", &smartreflex1_fck),
967 CLK(NULL, "sha0_fck", &sha0_fck), 971 CLK(NULL, "sha0_fck", &sha0_fck),
968 CLK(NULL, "aes0_fck", &aes0_fck), 972 CLK(NULL, "aes0_fck", &aes0_fck),
973 CLK(NULL, "rng_fck", &rng_fck),
969 CLK(NULL, "timer1_fck", &timer1_fck), 974 CLK(NULL, "timer1_fck", &timer1_fck),
970 CLK(NULL, "timer2_fck", &timer2_fck), 975 CLK(NULL, "timer2_fck", &timer2_fck),
971 CLK(NULL, "timer3_fck", &timer3_fck), 976 CLK(NULL, "timer3_fck", &timer3_fck),