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-rw-r--r--arch/arm/Kconfig11
-rw-r--r--arch/arm/Kconfig.debug8
-rw-r--r--arch/arm/configs/cns3420vb_defconfig3
-rw-r--r--arch/arm/include/debug/cns3xxx.S (renamed from arch/arm/mach-cns3xxx/include/mach/debug-macro.S)0
-rw-r--r--arch/arm/mach-cns3xxx/Kconfig12
-rw-r--r--arch/arm/mach-cns3xxx/Makefile8
-rw-r--r--arch/arm/mach-cns3xxx/cns3420vb.c6
-rw-r--r--arch/arm/mach-cns3xxx/cns3xxx.h (renamed from arch/arm/mach-cns3xxx/include/mach/cns3xxx.h)7
-rw-r--r--arch/arm/mach-cns3xxx/core.c121
-rw-r--r--arch/arm/mach-cns3xxx/devices.c5
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/irqs.h24
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/timex.h12
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/uncompress.h53
-rw-r--r--arch/arm/mach-cns3xxx/pcie.c2
-rw-r--r--arch/arm/mach-cns3xxx/pm.c4
-rw-r--r--arch/arm/mach-cns3xxx/pm.h (renamed from arch/arm/mach-cns3xxx/include/mach/pm.h)0
16 files changed, 158 insertions, 118 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a5ddc3660479..9a95f7897baa 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -382,17 +382,6 @@ config ARCH_BCM2835
382 This enables support for the Broadcom BCM2835 SoC. This SoC is 382 This enables support for the Broadcom BCM2835 SoC. This SoC is
383 use in the Raspberry Pi, and Roku 2 devices. 383 use in the Raspberry Pi, and Roku 2 devices.
384 384
385config ARCH_CNS3XXX
386 bool "Cavium Networks CNS3XXX family"
387 select ARM_GIC
388 select CPU_V6K
389 select GENERIC_CLOCKEVENTS
390 select MIGHT_HAVE_CACHE_L2X0
391 select MIGHT_HAVE_PCI
392 select PCI_DOMAINS if PCI
393 help
394 Support for Cavium Networks CNS3XXX platform.
395
396config ARCH_CLPS711X 385config ARCH_CLPS711X
397 bool "Cirrus Logic CLPS711x/EP721x/EP731x-based" 386 bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
398 select ARCH_REQUIRE_GPIOLIB 387 select ARCH_REQUIRE_GPIOLIB
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 7d4b96daad44..5115ff9e8a2a 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -103,6 +103,13 @@ choice
103 Say Y here if you want the debug print routines to direct 103 Say Y here if you want the debug print routines to direct
104 their output to the second serial port on these devices. 104 their output to the second serial port on these devices.
105 105
106 config DEBUG_CNS3XXX
107 bool "Kernel Kernel low-level debugging on Cavium Networks CNS3xxx"
108 depends on ARCH_CNS3XXX
109 help
110 Say Y here if you want the debug print routines to direct
111 their output to the CNS3xxx UART0.
112
106 config DEBUG_DAVINCI_DA8XX_UART1 113 config DEBUG_DAVINCI_DA8XX_UART1
107 bool "Kernel low-level debugging on DaVinci DA8XX using UART1" 114 bool "Kernel low-level debugging on DaVinci DA8XX using UART1"
108 depends on ARCH_DAVINCI_DA8XX 115 depends on ARCH_DAVINCI_DA8XX
@@ -586,6 +593,7 @@ endchoice
586 593
587config DEBUG_LL_INCLUDE 594config DEBUG_LL_INCLUDE
588 string 595 string
596 default "debug/cns3xxx.S" if DEBUG_CNS3XXX
589 default "debug/icedcc.S" if DEBUG_ICEDCC 597 default "debug/icedcc.S" if DEBUG_ICEDCC
590 default "debug/imx.S" if DEBUG_IMX1_UART || \ 598 default "debug/imx.S" if DEBUG_IMX1_UART || \
591 DEBUG_IMX25_UART || \ 599 DEBUG_IMX25_UART || \
diff --git a/arch/arm/configs/cns3420vb_defconfig b/arch/arm/configs/cns3420vb_defconfig
index 313627adf46c..b1ff5cdba9a1 100644
--- a/arch/arm/configs/cns3420vb_defconfig
+++ b/arch/arm/configs/cns3420vb_defconfig
@@ -19,8 +19,11 @@ CONFIG_MODULE_FORCE_UNLOAD=y
19CONFIG_MODVERSIONS=y 19CONFIG_MODVERSIONS=y
20# CONFIG_BLK_DEV_BSG is not set 20# CONFIG_BLK_DEV_BSG is not set
21CONFIG_IOSCHED_CFQ=m 21CONFIG_IOSCHED_CFQ=m
22CONFIG_ARCH_MULTI_V6=y
23#CONFIG_ARCH_MULTI_V7 is not set
22CONFIG_ARCH_CNS3XXX=y 24CONFIG_ARCH_CNS3XXX=y
23CONFIG_MACH_CNS3420VB=y 25CONFIG_MACH_CNS3420VB=y
26CONFIG_DEBUG_CNS3XXX=y
24CONFIG_AEABI=y 27CONFIG_AEABI=y
25CONFIG_ZBOOT_ROM_TEXT=0x0 28CONFIG_ZBOOT_ROM_TEXT=0x0
26CONFIG_ZBOOT_ROM_BSS=0x0 29CONFIG_ZBOOT_ROM_BSS=0x0
diff --git a/arch/arm/mach-cns3xxx/include/mach/debug-macro.S b/arch/arm/include/debug/cns3xxx.S
index d04c150baa1c..d04c150baa1c 100644
--- a/arch/arm/mach-cns3xxx/include/mach/debug-macro.S
+++ b/arch/arm/include/debug/cns3xxx.S
diff --git a/arch/arm/mach-cns3xxx/Kconfig b/arch/arm/mach-cns3xxx/Kconfig
index 9ebfcc46feb1..dbf0df8bb0ac 100644
--- a/arch/arm/mach-cns3xxx/Kconfig
+++ b/arch/arm/mach-cns3xxx/Kconfig
@@ -1,8 +1,20 @@
1config ARCH_CNS3XXX
2 bool "Cavium Networks CNS3XXX family" if ARCH_MULTI_V6
3 select ARM_GIC
4 select CPU_V6K
5 select GENERIC_CLOCKEVENTS
6 select MIGHT_HAVE_CACHE_L2X0
7 select MIGHT_HAVE_PCI
8 select PCI_DOMAINS if PCI
9 help
10 Support for Cavium Networks CNS3XXX platform.
11
1menu "CNS3XXX platform type" 12menu "CNS3XXX platform type"
2 depends on ARCH_CNS3XXX 13 depends on ARCH_CNS3XXX
3 14
4config MACH_CNS3420VB 15config MACH_CNS3420VB
5 bool "Support for CNS3420 Validation Board" 16 bool "Support for CNS3420 Validation Board"
17 depends on ATAGS
6 help 18 help
7 Include support for the Cavium Networks CNS3420 MPCore Platform 19 Include support for the Cavium Networks CNS3420 MPCore Platform
8 Baseboard. 20 Baseboard.
diff --git a/arch/arm/mach-cns3xxx/Makefile b/arch/arm/mach-cns3xxx/Makefile
index 11033f1c2e23..a1ff10848698 100644
--- a/arch/arm/mach-cns3xxx/Makefile
+++ b/arch/arm/mach-cns3xxx/Makefile
@@ -1,3 +1,5 @@
1obj-$(CONFIG_ARCH_CNS3XXX) += core.o pm.o devices.o 1obj-$(CONFIG_ARCH_CNS3XXX) += cns3xxx.o
2obj-$(CONFIG_PCI) += pcie.o 2cns3xxx-y += core.o pm.o
3obj-$(CONFIG_MACH_CNS3420VB) += cns3420vb.o 3cns3xxx-$(CONFIG_ATAGS) += devices.o
4cns3xxx-$(CONFIG_PCI) += pcie.o
5cns3xxx-$(CONFIG_MACH_CNS3420VB) += cns3420vb.o
diff --git a/arch/arm/mach-cns3xxx/cns3420vb.c b/arch/arm/mach-cns3xxx/cns3420vb.c
index a71867e1d8d6..ce096d678aa4 100644
--- a/arch/arm/mach-cns3xxx/cns3420vb.c
+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
@@ -31,9 +31,8 @@
31#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
32#include <asm/mach/map.h> 32#include <asm/mach/map.h>
33#include <asm/mach/time.h> 33#include <asm/mach/time.h>
34#include <mach/cns3xxx.h> 34#include "cns3xxx.h"
35#include <mach/irqs.h> 35#include "pm.h"
36#include <mach/pm.h>
37#include "core.h" 36#include "core.h"
38#include "devices.h" 37#include "devices.h"
39 38
@@ -247,6 +246,7 @@ static void __init cns3420_map_io(void)
247 246
248MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board") 247MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board")
249 .atag_offset = 0x100, 248 .atag_offset = 0x100,
249 .nr_irqs = NR_IRQS_CNS3XXX,
250 .map_io = cns3420_map_io, 250 .map_io = cns3420_map_io,
251 .init_irq = cns3xxx_init_irq, 251 .init_irq = cns3xxx_init_irq,
252 .init_time = cns3xxx_timer_init, 252 .init_time = cns3xxx_timer_init,
diff --git a/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h b/arch/arm/mach-cns3xxx/cns3xxx.h
index 191c8e57f289..d7d3a8d64282 100644
--- a/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h
+++ b/arch/arm/mach-cns3xxx/cns3xxx.h
@@ -553,6 +553,8 @@ int cns3xxx_cpu_clock(void);
553/* 553/*
554 * ARM11 MPCore interrupt sources (primary GIC) 554 * ARM11 MPCore interrupt sources (primary GIC)
555 */ 555 */
556#define IRQ_TC11MP_GIC_START 32
557
556#define IRQ_CNS3XXX_PMU (IRQ_TC11MP_GIC_START + 0) 558#define IRQ_CNS3XXX_PMU (IRQ_TC11MP_GIC_START + 0)
557#define IRQ_CNS3XXX_SDIO (IRQ_TC11MP_GIC_START + 1) 559#define IRQ_CNS3XXX_SDIO (IRQ_TC11MP_GIC_START + 1)
558#define IRQ_CNS3XXX_L2CC (IRQ_TC11MP_GIC_START + 2) 560#define IRQ_CNS3XXX_L2CC (IRQ_TC11MP_GIC_START + 2)
@@ -624,9 +626,4 @@ int cns3xxx_cpu_clock(void);
624 626
625#define NR_IRQS_CNS3XXX (IRQ_TC11MP_GIC_START + 64) 627#define NR_IRQS_CNS3XXX (IRQ_TC11MP_GIC_START + 64)
626 628
627#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_CNS3XXX)
628#undef NR_IRQS
629#define NR_IRQS NR_IRQS_CNS3XXX
630#endif
631
632#endif /* __MACH_BOARD_CNS3XXX_H */ 629#endif /* __MACH_BOARD_CNS3XXX_H */
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c
index e698f26cc0cb..49e657c15067 100644
--- a/arch/arm/mach-cns3xxx/core.c
+++ b/arch/arm/mach-cns3xxx/core.c
@@ -13,12 +13,18 @@
13#include <linux/clockchips.h> 13#include <linux/clockchips.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/irqchip/arm-gic.h> 15#include <linux/irqchip/arm-gic.h>
16#include <linux/of_platform.h>
17#include <linux/platform_device.h>
18#include <linux/usb/ehci_pdriver.h>
19#include <linux/usb/ohci_pdriver.h>
20#include <asm/mach/arch.h>
16#include <asm/mach/map.h> 21#include <asm/mach/map.h>
17#include <asm/mach/time.h> 22#include <asm/mach/time.h>
18#include <asm/mach/irq.h> 23#include <asm/mach/irq.h>
19#include <asm/hardware/cache-l2x0.h> 24#include <asm/hardware/cache-l2x0.h>
20#include <mach/cns3xxx.h> 25#include "cns3xxx.h"
21#include "core.h" 26#include "core.h"
27#include "pm.h"
22 28
23static struct map_desc cns3xxx_io_desc[] __initdata = { 29static struct map_desc cns3xxx_io_desc[] __initdata = {
24 { 30 {
@@ -276,3 +282,116 @@ void __init cns3xxx_l2x0_init(void)
276} 282}
277 283
278#endif /* CONFIG_CACHE_L2X0 */ 284#endif /* CONFIG_CACHE_L2X0 */
285
286static int csn3xxx_usb_power_on(struct platform_device *pdev)
287{
288 /*
289 * EHCI and OHCI share the same clock and power,
290 * resetting twice would cause the 1st controller been reset.
291 * Therefore only do power up at the first up device, and
292 * power down at the last down device.
293 *
294 * Set USB AHB INCR length to 16
295 */
296 if (atomic_inc_return(&usb_pwr_ref) == 1) {
297 cns3xxx_pwr_power_up(1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_PLL_USB);
298 cns3xxx_pwr_clk_en(1 << PM_CLK_GATE_REG_OFFSET_USB_HOST);
299 cns3xxx_pwr_soft_rst(1 << PM_SOFT_RST_REG_OFFST_USB_HOST);
300 __raw_writel((__raw_readl(MISC_CHIP_CONFIG_REG) | (0X2 << 24)),
301 MISC_CHIP_CONFIG_REG);
302 }
303
304 return 0;
305}
306
307static void csn3xxx_usb_power_off(struct platform_device *pdev)
308{
309 /*
310 * EHCI and OHCI share the same clock and power,
311 * resetting twice would cause the 1st controller been reset.
312 * Therefore only do power up at the first up device, and
313 * power down at the last down device.
314 */
315 if (atomic_dec_return(&usb_pwr_ref) == 0)
316 cns3xxx_pwr_clk_dis(1 << PM_CLK_GATE_REG_OFFSET_USB_HOST);
317}
318
319static struct usb_ehci_pdata cns3xxx_usb_ehci_pdata = {
320 .power_on = csn3xxx_usb_power_on,
321 .power_off = csn3xxx_usb_power_off,
322};
323
324static struct usb_ohci_pdata cns3xxx_usb_ohci_pdata = {
325 .num_ports = 1,
326 .power_on = csn3xxx_usb_power_on,
327 .power_off = csn3xxx_usb_power_off,
328};
329
330static struct of_dev_auxdata cns3xxx_auxdata[] __initconst = {
331 { "intel,usb-ehci", CNS3XXX_USB_BASE, "ehci-platform", &cns3xxx_usb_ehci_pdata },
332 { "intel,usb-ohci", CNS3XXX_USB_OHCI_BASE, "ohci-platform", &cns3xxx_usb_ohci_pdata },
333 { "cavium,cns3420-ahci", CNS3XXX_SATA2_BASE, "ahci", NULL },
334 { "cavium,cns3420-sdhci", CNS3XXX_SDIO_BASE, "ahci", NULL },
335 {},
336};
337
338static void __init cns3xxx_init(void)
339{
340 struct device_node *dn;
341
342 cns3xxx_l2x0_init();
343
344 dn = of_find_compatible_node(NULL, NULL, "cavium,cns3420-ahci");
345 if (of_device_is_available(dn)) {
346 u32 tmp;
347
348 tmp = __raw_readl(MISC_SATA_POWER_MODE);
349 tmp |= 0x1 << 16; /* Disable SATA PHY 0 from SLUMBER Mode */
350 tmp |= 0x1 << 17; /* Disable SATA PHY 1 from SLUMBER Mode */
351 __raw_writel(tmp, MISC_SATA_POWER_MODE);
352
353 /* Enable SATA PHY */
354 cns3xxx_pwr_power_up(0x1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_SATA_PHY0);
355 cns3xxx_pwr_power_up(0x1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_SATA_PHY1);
356
357 /* Enable SATA Clock */
358 cns3xxx_pwr_clk_en(0x1 << PM_CLK_GATE_REG_OFFSET_SATA);
359
360 /* De-Asscer SATA Reset */
361 cns3xxx_pwr_soft_rst(CNS3XXX_PWR_SOFTWARE_RST(SATA));
362 }
363
364 dn = of_find_compatible_node(NULL, NULL, "cavium,cns3420-sdhci");
365 if (of_device_is_available(dn)) {
366 u32 __iomem *gpioa = IOMEM(CNS3XXX_MISC_BASE_VIRT + 0x0014);
367 u32 gpioa_pins = __raw_readl(gpioa);
368
369 /* MMC/SD pins share with GPIOA */
370 gpioa_pins |= 0x1fff0004;
371 __raw_writel(gpioa_pins, gpioa);
372
373 cns3xxx_pwr_clk_en(CNS3XXX_PWR_CLK_EN(SDIO));
374 cns3xxx_pwr_soft_rst(CNS3XXX_PWR_SOFTWARE_RST(SDIO));
375 }
376
377 pm_power_off = cns3xxx_power_off;
378
379 of_platform_populate(NULL, of_default_bus_match_table,
380 cns3xxx_auxdata, NULL);
381}
382
383static const char *cns3xxx_dt_compat[] __initdata = {
384 "cavium,cns3410",
385 "cavium,cns3420",
386 NULL,
387};
388
389DT_MACHINE_START(CNS3XXX_DT, "Cavium Networks CNS3xxx")
390 .dt_compat = cns3xxx_dt_compat,
391 .nr_irqs = NR_IRQS_CNS3XXX,
392 .map_io = cns3xxx_map_io,
393 .init_irq = cns3xxx_init_irq,
394 .init_time = cns3xxx_timer_init,
395 .init_machine = cns3xxx_init,
396 .restart = cns3xxx_restart,
397MACHINE_END
diff --git a/arch/arm/mach-cns3xxx/devices.c b/arch/arm/mach-cns3xxx/devices.c
index 1e40c99b015f..7da78a2451f1 100644
--- a/arch/arm/mach-cns3xxx/devices.c
+++ b/arch/arm/mach-cns3xxx/devices.c
@@ -16,9 +16,8 @@
16#include <linux/compiler.h> 16#include <linux/compiler.h>
17#include <linux/dma-mapping.h> 17#include <linux/dma-mapping.h>
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19#include <mach/cns3xxx.h> 19#include "cns3xxx.h"
20#include <mach/irqs.h> 20#include "pm.h"
21#include <mach/pm.h>
22#include "core.h" 21#include "core.h"
23#include "devices.h" 22#include "devices.h"
24 23
diff --git a/arch/arm/mach-cns3xxx/include/mach/irqs.h b/arch/arm/mach-cns3xxx/include/mach/irqs.h
deleted file mode 100644
index 2ab96f8085c8..000000000000
--- a/arch/arm/mach-cns3xxx/include/mach/irqs.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * Copyright 2000 Deep Blue Solutions Ltd.
3 * Copyright 2003 ARM Limited
4 * Copyright 2008 Cavium Networks
5 *
6 * This file is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License, Version 2, as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __MACH_IRQS_H
12#define __MACH_IRQS_H
13
14#define IRQ_LOCALTIMER 29
15#define IRQ_LOCALWDOG 30
16#define IRQ_TC11MP_GIC_START 32
17
18#include <mach/cns3xxx.h>
19
20#ifndef NR_IRQS
21#error "NR_IRQS not defined by the board-specific files"
22#endif
23
24#endif
diff --git a/arch/arm/mach-cns3xxx/include/mach/timex.h b/arch/arm/mach-cns3xxx/include/mach/timex.h
deleted file mode 100644
index 1fd04217cacb..000000000000
--- a/arch/arm/mach-cns3xxx/include/mach/timex.h
+++ /dev/null
@@ -1,12 +0,0 @@
1/*
2 * Cavium Networks architecture timex specifications
3 *
4 * Copyright 2003 ARM Limited
5 * Copyright 2008 Cavium Networks
6 *
7 * This file is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License, Version 2, as
9 * published by the Free Software Foundation.
10 */
11
12#define CLOCK_TICK_RATE (50000000 / 16)
diff --git a/arch/arm/mach-cns3xxx/include/mach/uncompress.h b/arch/arm/mach-cns3xxx/include/mach/uncompress.h
deleted file mode 100644
index 7a030b99df84..000000000000
--- a/arch/arm/mach-cns3xxx/include/mach/uncompress.h
+++ /dev/null
@@ -1,53 +0,0 @@
1/*
2 * Copyright 2003 ARM Limited
3 * Copyright 2008 Cavium Networks
4 *
5 * This file is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, Version 2, as
7 * published by the Free Software Foundation.
8 */
9
10#include <asm/mach-types.h>
11#include <mach/cns3xxx.h>
12
13#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00))
14#define AMBA_UART_LCRH(base) (*(volatile unsigned char *)((base) + 0x2c))
15#define AMBA_UART_CR(base) (*(volatile unsigned char *)((base) + 0x30))
16#define AMBA_UART_FR(base) (*(volatile unsigned char *)((base) + 0x18))
17
18/*
19 * Return the UART base address
20 */
21static inline unsigned long get_uart_base(void)
22{
23 if (machine_is_cns3420vb())
24 return CNS3XXX_UART0_BASE;
25 else
26 return 0;
27}
28
29/*
30 * This does not append a newline
31 */
32static inline void putc(int c)
33{
34 unsigned long base = get_uart_base();
35
36 while (AMBA_UART_FR(base) & (1 << 5))
37 barrier();
38
39 AMBA_UART_DR(base) = c;
40}
41
42static inline void flush(void)
43{
44 unsigned long base = get_uart_base();
45
46 while (AMBA_UART_FR(base) & (1 << 3))
47 barrier();
48}
49
50/*
51 * nothing to do
52 */
53#define arch_decomp_setup()
diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c
index 311328314163..c7b204bff386 100644
--- a/arch/arm/mach-cns3xxx/pcie.c
+++ b/arch/arm/mach-cns3xxx/pcie.c
@@ -20,7 +20,7 @@
20#include <linux/interrupt.h> 20#include <linux/interrupt.h>
21#include <linux/ptrace.h> 21#include <linux/ptrace.h>
22#include <asm/mach/map.h> 22#include <asm/mach/map.h>
23#include <mach/cns3xxx.h> 23#include "cns3xxx.h"
24#include "core.h" 24#include "core.h"
25 25
26enum cns3xxx_access_type { 26enum cns3xxx_access_type {
diff --git a/arch/arm/mach-cns3xxx/pm.c b/arch/arm/mach-cns3xxx/pm.c
index 36458080332a..79e3d47aad65 100644
--- a/arch/arm/mach-cns3xxx/pm.c
+++ b/arch/arm/mach-cns3xxx/pm.c
@@ -11,8 +11,8 @@
11#include <linux/io.h> 11#include <linux/io.h>
12#include <linux/delay.h> 12#include <linux/delay.h>
13#include <linux/atomic.h> 13#include <linux/atomic.h>
14#include <mach/cns3xxx.h> 14#include "cns3xxx.h"
15#include <mach/pm.h> 15#include "pm.h"
16#include "core.h" 16#include "core.h"
17 17
18void cns3xxx_pwr_clk_en(unsigned int block) 18void cns3xxx_pwr_clk_en(unsigned int block)
diff --git a/arch/arm/mach-cns3xxx/include/mach/pm.h b/arch/arm/mach-cns3xxx/pm.h
index c2588cc991d1..c2588cc991d1 100644
--- a/arch/arm/mach-cns3xxx/include/mach/pm.h
+++ b/arch/arm/mach-cns3xxx/pm.h
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-09 10:13:47 -0500