Merge branch 'cns3xxx/multiplatform' into next/multiplatform

I've looked at all the platforms recently to see what their
state is. cns3xxx seems quite clean but not very actively
maintained. Since it is really easy to convert to multiplatform,
that's what I did here.

* cns3xxx/multiplatform:
  ARM: cns3xxx: initial DT support
  ARM: cns3xxx: enable multiplatform support
  ARM: cns3xxx: move debug_ll code to include/debug/
  ARM: cns3xxx: enable sparse IRQ support
  ARM: cns3xxx: make mach header files local

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

16 files changed, 158 insertions, 118 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a5ddc3660479..9a95f7897baa 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -382,17 +382,6 @@ config ARCH_BCM2835
           This enables support for the Broadcom BCM2835 SoC. This SoC is
           use in the Raspberry Pi, and Roku 2 devices.
 
-config ARCH_CNS3XXX
-        bool "Cavium Networks CNS3XXX family"
-        select ARM_GIC
-        select CPU_V6K
-        select GENERIC_CLOCKEVENTS
-        select MIGHT_HAVE_CACHE_L2X0
-        select MIGHT_HAVE_PCI
-        select PCI_DOMAINS if PCI
-        help
-          Support for Cavium Networks CNS3XXX platform.
-
 config ARCH_CLPS711X
         bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
         select ARCH_REQUIRE_GPIOLIB
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 7d4b96daad44..5115ff9e8a2a 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -103,6 +103,13 @@ choice
                   Say Y here if you want the debug print routines to direct
                   their output to the second serial port on these devices.
 
+        config DEBUG_CNS3XXX
+                bool "Kernel Kernel low-level debugging on Cavium Networks CNS3xxx"
+                depends on ARCH_CNS3XXX
+                help
+                  Say Y here if you want the debug print routines to direct
+                  their output to the CNS3xxx UART0.
+
         config DEBUG_DAVINCI_DA8XX_UART1
                 bool "Kernel low-level debugging on DaVinci DA8XX using UART1"
                 depends on ARCH_DAVINCI_DA8XX
@@ -586,6 +593,7 @@ endchoice
 
 config DEBUG_LL_INCLUDE
         string
+        default "debug/cns3xxx.S" if DEBUG_CNS3XXX
         default "debug/icedcc.S" if DEBUG_ICEDCC
         default "debug/imx.S" if DEBUG_IMX1_UART || \
                                  DEBUG_IMX25_UART || \
diff --git a/arch/arm/configs/cns3420vb_defconfig b/arch/arm/configs/cns3420vb_defconfig
index 313627adf46c..b1ff5cdba9a1 100644
--- a/arch/arm/configs/cns3420vb_defconfig
+++ b/arch/arm/configs/cns3420vb_defconfig
@@ -19,8 +19,11 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 CONFIG_MODVERSIONS=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_IOSCHED_CFQ=m
+CONFIG_ARCH_MULTI_V6=y
+#CONFIG_ARCH_MULTI_V7 is not set
 CONFIG_ARCH_CNS3XXX=y
 CONFIG_MACH_CNS3420VB=y
+CONFIG_DEBUG_CNS3XXX=y
 CONFIG_AEABI=y
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
diff --git a/arch/arm/mach-cns3xxx/include/mach/debug-macro.S b/arch/arm/include/debug/cns3xxx.S
index d04c150baa1c..d04c150baa1c 100644
--- a/arch/arm/mach-cns3xxx/include/mach/debug-macro.S
+++ b/arch/arm/include/debug/cns3xxx.S
diff --git a/arch/arm/mach-cns3xxx/Kconfig b/arch/arm/mach-cns3xxx/Kconfig
index 9ebfcc46feb1..dbf0df8bb0ac 100644
--- a/arch/arm/mach-cns3xxx/Kconfig
+++ b/arch/arm/mach-cns3xxx/Kconfig
@@ -1,8 +1,20 @@
+config ARCH_CNS3XXX
+        bool "Cavium Networks CNS3XXX family" if ARCH_MULTI_V6
+        select ARM_GIC
+        select CPU_V6K
+        select GENERIC_CLOCKEVENTS
+        select MIGHT_HAVE_CACHE_L2X0
+        select MIGHT_HAVE_PCI
+        select PCI_DOMAINS if PCI
+        help
+          Support for Cavium Networks CNS3XXX platform.
+
 menu "CNS3XXX platform type"
         depends on ARCH_CNS3XXX
 
 config MACH_CNS3420VB
         bool "Support for CNS3420 Validation Board"
+        depends on ATAGS
         help
           Include support for the Cavium Networks CNS3420 MPCore Platform
           Baseboard.
diff --git a/arch/arm/mach-cns3xxx/Makefile b/arch/arm/mach-cns3xxx/Makefile
index 11033f1c2e23..a1ff10848698 100644
--- a/arch/arm/mach-cns3xxx/Makefile
+++ b/arch/arm/mach-cns3xxx/Makefile
@@ -1,3 +1,5 @@
-obj-$(CONFIG_ARCH_CNS3XXX)              += core.o pm.o devices.o
-obj-$(CONFIG_PCI)                       += pcie.o
-obj-$(CONFIG_MACH_CNS3420VB)            += cns3420vb.o
+obj-$(CONFIG_ARCH_CNS3XXX)              += cns3xxx.o
+cns3xxx-y                               += core.o pm.o
+cns3xxx-$(CONFIG_ATAGS)                 += devices.o
+cns3xxx-$(CONFIG_PCI)                   += pcie.o
+cns3xxx-$(CONFIG_MACH_CNS3420VB)        += cns3420vb.o
diff --git a/arch/arm/mach-cns3xxx/cns3420vb.c b/arch/arm/mach-cns3xxx/cns3420vb.c
index a71867e1d8d6..ce096d678aa4 100644
--- a/arch/arm/mach-cns3xxx/cns3420vb.c
+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
@@ -31,9 +31,8 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
-#include <mach/cns3xxx.h>
-#include <mach/irqs.h>
-#include <mach/pm.h>
+#include "cns3xxx.h"
+#include "pm.h"
 #include "core.h"
 #include "devices.h"
 
@@ -247,6 +246,7 @@ static void __init cns3420_map_io(void)
 
 MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board")
         .atag_offset    = 0x100,
+        .nr_irqs        = NR_IRQS_CNS3XXX,
         .map_io         = cns3420_map_io,
         .init_irq       = cns3xxx_init_irq,
         .init_time      = cns3xxx_timer_init,
diff --git a/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h b/arch/arm/mach-cns3xxx/cns3xxx.h
index 191c8e57f289..d7d3a8d64282 100644
--- a/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h
+++ b/arch/arm/mach-cns3xxx/cns3xxx.h
@@ -553,6 +553,8 @@ int cns3xxx_cpu_clock(void);
 /*
  * ARM11 MPCore interrupt sources (primary GIC)
  */
+#define IRQ_TC11MP_GIC_START    32
+
 #define IRQ_CNS3XXX_PMU                 (IRQ_TC11MP_GIC_START + 0)
 #define IRQ_CNS3XXX_SDIO                (IRQ_TC11MP_GIC_START + 1)
 #define IRQ_CNS3XXX_L2CC                (IRQ_TC11MP_GIC_START + 2)
@@ -624,9 +626,4 @@ int cns3xxx_cpu_clock(void);
 
 #define NR_IRQS_CNS3XXX                 (IRQ_TC11MP_GIC_START + 64)
 
-#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_CNS3XXX)
-#undef NR_IRQS
-#define NR_IRQS                         NR_IRQS_CNS3XXX
-#endif
-
 #endif  /* __MACH_BOARD_CNS3XXX_H */
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c
index e698f26cc0cb..49e657c15067 100644
--- a/arch/arm/mach-cns3xxx/core.c
+++ b/arch/arm/mach-cns3xxx/core.c
@@ -13,12 +13,18 @@
 #include <linux/clockchips.h>
 #include <linux/io.h>
 #include <linux/irqchip/arm-gic.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include <linux/usb/ehci_pdriver.h>
+#include <linux/usb/ohci_pdriver.h>
+#include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
 #include <asm/mach/irq.h>
 #include <asm/hardware/cache-l2x0.h>
-#include <mach/cns3xxx.h>
+#include "cns3xxx.h"
 #include "core.h"
+#include "pm.h"
 
 static struct map_desc cns3xxx_io_desc[] __initdata = {
         {
@@ -276,3 +282,116 @@ void __init cns3xxx_l2x0_init(void)
 }
 
 #endif /* CONFIG_CACHE_L2X0 */
+
+static int csn3xxx_usb_power_on(struct platform_device *pdev)
+{
+        /*
+         * EHCI and OHCI share the same clock and power,
+         * resetting twice would cause the 1st controller been reset.
+         * Therefore only do power up  at the first up device, and
+         * power down at the last down device.
+         *
+         * Set USB AHB INCR length to 16
+         */
+        if (atomic_inc_return(&usb_pwr_ref) == 1) {
+                cns3xxx_pwr_power_up(1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_PLL_USB);
+                cns3xxx_pwr_clk_en(1 << PM_CLK_GATE_REG_OFFSET_USB_HOST);
+                cns3xxx_pwr_soft_rst(1 << PM_SOFT_RST_REG_OFFST_USB_HOST);
+                __raw_writel((__raw_readl(MISC_CHIP_CONFIG_REG) | (0X2 << 24)),
+                        MISC_CHIP_CONFIG_REG);
+        }
+
+        return 0;
+}
+
+static void csn3xxx_usb_power_off(struct platform_device *pdev)
+{
+        /*
+         * EHCI and OHCI share the same clock and power,
+         * resetting twice would cause the 1st controller been reset.
+         * Therefore only do power up  at the first up device, and
+         * power down at the last down device.
+         */
+        if (atomic_dec_return(&usb_pwr_ref) == 0)
+                cns3xxx_pwr_clk_dis(1 << PM_CLK_GATE_REG_OFFSET_USB_HOST);
+}
+
+static struct usb_ehci_pdata cns3xxx_usb_ehci_pdata = {
+        .power_on       = csn3xxx_usb_power_on,
+        .power_off      = csn3xxx_usb_power_off,
+};
+
+static struct usb_ohci_pdata cns3xxx_usb_ohci_pdata = {
+        .num_ports      = 1,
+        .power_on       = csn3xxx_usb_power_on,
+        .power_off      = csn3xxx_usb_power_off,
+};
+
+static struct of_dev_auxdata cns3xxx_auxdata[] __initconst = {
+        { "intel,usb-ehci", CNS3XXX_USB_BASE, "ehci-platform", &cns3xxx_usb_ehci_pdata },
+        { "intel,usb-ohci", CNS3XXX_USB_OHCI_BASE, "ohci-platform", &cns3xxx_usb_ohci_pdata },
+        { "cavium,cns3420-ahci", CNS3XXX_SATA2_BASE, "ahci", NULL },
+        { "cavium,cns3420-sdhci", CNS3XXX_SDIO_BASE, "ahci", NULL },
+        {},
+};
+
+static void __init cns3xxx_init(void)
+{
+        struct device_node *dn;
+
+        cns3xxx_l2x0_init();
+
+        dn = of_find_compatible_node(NULL, NULL, "cavium,cns3420-ahci");
+        if (of_device_is_available(dn)) {
+                u32 tmp;
+        
+                tmp = __raw_readl(MISC_SATA_POWER_MODE);
+                tmp |= 0x1 << 16; /* Disable SATA PHY 0 from SLUMBER Mode */
+                tmp |= 0x1 << 17; /* Disable SATA PHY 1 from SLUMBER Mode */
+                __raw_writel(tmp, MISC_SATA_POWER_MODE);
+        
+                /* Enable SATA PHY */
+                cns3xxx_pwr_power_up(0x1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_SATA_PHY0);
+                cns3xxx_pwr_power_up(0x1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_SATA_PHY1);
+        
+                /* Enable SATA Clock */
+                cns3xxx_pwr_clk_en(0x1 << PM_CLK_GATE_REG_OFFSET_SATA);
+        
+                /* De-Asscer SATA Reset */
+                cns3xxx_pwr_soft_rst(CNS3XXX_PWR_SOFTWARE_RST(SATA));
+        }
+
+        dn = of_find_compatible_node(NULL, NULL, "cavium,cns3420-sdhci");
+        if (of_device_is_available(dn)) {
+                u32 __iomem *gpioa = IOMEM(CNS3XXX_MISC_BASE_VIRT + 0x0014);
+                u32 gpioa_pins = __raw_readl(gpioa);
+        
+                /* MMC/SD pins share with GPIOA */
+                gpioa_pins |= 0x1fff0004;
+                __raw_writel(gpioa_pins, gpioa);
+        
+                cns3xxx_pwr_clk_en(CNS3XXX_PWR_CLK_EN(SDIO));
+                cns3xxx_pwr_soft_rst(CNS3XXX_PWR_SOFTWARE_RST(SDIO));
+        }
+
+        pm_power_off = cns3xxx_power_off;
+
+        of_platform_populate(NULL, of_default_bus_match_table,
+                        cns3xxx_auxdata, NULL);
+}
+
+static const char *cns3xxx_dt_compat[] __initdata = {
+        "cavium,cns3410",
+        "cavium,cns3420",
+        NULL,
+};
+
+DT_MACHINE_START(CNS3XXX_DT, "Cavium Networks CNS3xxx")
+        .dt_compat      = cns3xxx_dt_compat,
+        .nr_irqs        = NR_IRQS_CNS3XXX,
+        .map_io         = cns3xxx_map_io,
+        .init_irq       = cns3xxx_init_irq,
+        .init_time      = cns3xxx_timer_init,
+        .init_machine   = cns3xxx_init,
+        .restart        = cns3xxx_restart,
+MACHINE_END
diff --git a/arch/arm/mach-cns3xxx/devices.c b/arch/arm/mach-cns3xxx/devices.c
index 1e40c99b015f..7da78a2451f1 100644
--- a/arch/arm/mach-cns3xxx/devices.c
+++ b/arch/arm/mach-cns3xxx/devices.c
@@ -16,9 +16,8 @@
 #include <linux/compiler.h>
 #include <linux/dma-mapping.h>
 #include <linux/platform_device.h>
-#include <mach/cns3xxx.h>
-#include <mach/irqs.h>
-#include <mach/pm.h>
+#include "cns3xxx.h"
+#include "pm.h"
 #include "core.h"
 #include "devices.h"
 
diff --git a/arch/arm/mach-cns3xxx/include/mach/irqs.h b/arch/arm/mach-cns3xxx/include/mach/irqs.h
deleted file mode 100644
index 2ab96f8085c8..000000000000
--- a/arch/arm/mach-cns3xxx/include/mach/irqs.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * Copyright 2000 Deep Blue Solutions Ltd.
- * Copyright 2003 ARM Limited
- * Copyright 2008 Cavium Networks
- *
- * This file is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License, Version 2, as
- * published by the Free Software Foundation.
- */
-
-#ifndef __MACH_IRQS_H
-#define __MACH_IRQS_H
-
-#define IRQ_LOCALTIMER          29
-#define IRQ_LOCALWDOG           30
-#define IRQ_TC11MP_GIC_START    32
-
-#include <mach/cns3xxx.h>
-
-#ifndef NR_IRQS
-#error "NR_IRQS not defined by the board-specific files"
-#endif
-
-#endif
diff --git a/arch/arm/mach-cns3xxx/include/mach/timex.h b/arch/arm/mach-cns3xxx/include/mach/timex.h
deleted file mode 100644
index 1fd04217cacb..000000000000
--- a/arch/arm/mach-cns3xxx/include/mach/timex.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/*
- * Cavium Networks architecture timex specifications
- *
- * Copyright 2003 ARM Limited
- * Copyright 2008 Cavium Networks
- *
- * This file is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License, Version 2, as
- * published by the Free Software Foundation.
- */
-
-#define CLOCK_TICK_RATE         (50000000 / 16)
diff --git a/arch/arm/mach-cns3xxx/include/mach/uncompress.h b/arch/arm/mach-cns3xxx/include/mach/uncompress.h
deleted file mode 100644
index 7a030b99df84..000000000000
--- a/arch/arm/mach-cns3xxx/include/mach/uncompress.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * Copyright 2003 ARM Limited
- * Copyright 2008 Cavium Networks
- *
- * This file is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License, Version 2, as
- * published by the Free Software Foundation.
- */
-
-#include <asm/mach-types.h>
-#include <mach/cns3xxx.h>
-
-#define AMBA_UART_DR(base)      (*(volatile unsigned char *)((base) + 0x00))
-#define AMBA_UART_LCRH(base)    (*(volatile unsigned char *)((base) + 0x2c))
-#define AMBA_UART_CR(base)      (*(volatile unsigned char *)((base) + 0x30))
-#define AMBA_UART_FR(base)      (*(volatile unsigned char *)((base) + 0x18))
-
-/*
- * Return the UART base address
- */
-static inline unsigned long get_uart_base(void)
-{
-        if (machine_is_cns3420vb())
-                return CNS3XXX_UART0_BASE;
-        else
-                return 0;
-}
-
-/*
- * This does not append a newline
- */
-static inline void putc(int c)
-{
-        unsigned long base = get_uart_base();
-
-        while (AMBA_UART_FR(base) & (1 << 5))
-                barrier();
-
-        AMBA_UART_DR(base) = c;
-}
-
-static inline void flush(void)
-{
-        unsigned long base = get_uart_base();
-
-        while (AMBA_UART_FR(base) & (1 << 3))
-                barrier();
-}
-
-/*
- * nothing to do
- */
-#define arch_decomp_setup()
diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c
index 311328314163..c7b204bff386 100644
--- a/arch/arm/mach-cns3xxx/pcie.c
+++ b/arch/arm/mach-cns3xxx/pcie.c
@@ -20,7 +20,7 @@
 #include <linux/interrupt.h>
 #include <linux/ptrace.h>
 #include <asm/mach/map.h>
-#include <mach/cns3xxx.h>
+#include "cns3xxx.h"
 #include "core.h"
 
 enum cns3xxx_access_type {
diff --git a/arch/arm/mach-cns3xxx/pm.c b/arch/arm/mach-cns3xxx/pm.c
index 36458080332a..79e3d47aad65 100644
--- a/arch/arm/mach-cns3xxx/pm.c
+++ b/arch/arm/mach-cns3xxx/pm.c
@@ -11,8 +11,8 @@
 #include <linux/io.h>
 #include <linux/delay.h>
 #include <linux/atomic.h>
-#include <mach/cns3xxx.h>
-#include <mach/pm.h>
+#include "cns3xxx.h"
+#include "pm.h"
 #include "core.h"
 
 void cns3xxx_pwr_clk_en(unsigned int block)
diff --git a/arch/arm/mach-cns3xxx/include/mach/pm.h b/arch/arm/mach-cns3xxx/pm.h
index c2588cc991d1..c2588cc991d1 100644
--- a/arch/arm/mach-cns3xxx/include/mach/pm.h
+++ b/arch/arm/mach-cns3xxx/pm.h