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-rw-r--r--arch/arm/boot/dts/r8a7791.dtsi11
1 files changed, 7 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index ff49b95df0ec..1e593a2b55fa 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -909,7 +909,7 @@
909 #clock-cells = <1>; 909 #clock-cells = <1>;
910 clock-output-names = "main", "pll0", "pll1", "pll3", 910 clock-output-names = "main", "pll0", "pll1", "pll3",
911 "lb", "qspi", "sdh", "sd0", "z", 911 "lb", "qspi", "sdh", "sd0", "z",
912 "rcan"; 912 "rcan", "adsp";
913 }; 913 };
914 914
915 /* Variable factor clocks */ 915 /* Variable factor clocks */
@@ -1164,13 +1164,16 @@
1164 mstp5_clks: mstp5_clks@e6150144 { 1164 mstp5_clks: mstp5_clks@e6150144 {
1165 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; 1165 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1166 reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; 1166 reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
1167 clocks = <&hp_clk>, <&hp_clk>, <&extal_clk>, <&p_clk>; 1167 clocks = <&hp_clk>, <&hp_clk>, <&cpg_clocks R8A7791_CLK_ADSP>,
1168 <&extal_clk>, <&p_clk>;
1168 #clock-cells = <1>; 1169 #clock-cells = <1>;
1169 clock-indices = < 1170 clock-indices = <
1170 R8A7791_CLK_AUDIO_DMAC0 R8A7791_CLK_AUDIO_DMAC1 1171 R8A7791_CLK_AUDIO_DMAC0 R8A7791_CLK_AUDIO_DMAC1
1171 R8A7791_CLK_THERMAL R8A7791_CLK_PWM 1172 R8A7791_CLK_ADSP_MOD R8A7791_CLK_THERMAL
1173 R8A7791_CLK_PWM
1172 >; 1174 >;
1173 clock-output-names = "audmac0", "audmac1", "thermal", "pwm"; 1175 clock-output-names = "audmac0", "audmac1", "adsp_mod",
1176 "thermal", "pwm";
1174 }; 1177 };
1175 mstp7_clks: mstp7_clks@e615014c { 1178 mstp7_clks: mstp7_clks@e615014c {
1176 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; 1179 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";