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-rw-r--r--arch/arm/boot/dts/am33xx.dtsi2
-rw-r--r--arch/arm/boot/dts/am3517.dtsi16
-rw-r--r--arch/arm/boot/dts/am437x-gp-evm.dts5
-rw-r--r--arch/arm/boot/dts/armada-370-db.dts1
-rw-r--r--arch/arm/boot/dts/armada-375-db.dts5
-rw-r--r--arch/arm/boot/dts/armada-xp-db.dts2
-rw-r--r--arch/arm/boot/dts/armada-xp-gp.dts10
-rw-r--r--arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts2
-rw-r--r--arch/arm/boot/dts/at91-sama5d3_xplained.dts4
-rw-r--r--arch/arm/boot/dts/at91sam9261.dtsi2
-rw-r--r--arch/arm/boot/dts/at91sam9rl.dtsi2
-rw-r--r--arch/arm/boot/dts/imx53-mba53.dts2
-rw-r--r--arch/arm/boot/dts/imx53.dtsi2
-rw-r--r--arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts18
-rw-r--r--arch/arm/boot/dts/kirkwood-nsa310-common.dtsi18
-rw-r--r--arch/arm/boot/dts/kirkwood-t5325.dts5
-rw-r--r--arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi19
-rw-r--r--arch/arm/boot/dts/omap2.dtsi7
-rw-r--r--arch/arm/boot/dts/omap2420.dtsi8
-rw-r--r--arch/arm/boot/dts/omap2430.dtsi7
-rw-r--r--arch/arm/boot/dts/omap3-cm-t3x30.dtsi66
-rw-r--r--arch/arm/boot/dts/omap3-igep.dtsi2
-rw-r--r--arch/arm/boot/dts/omap3-igep0020.dts4
-rw-r--r--arch/arm/boot/dts/omap3-sb-t35.dtsi37
-rw-r--r--arch/arm/boot/dts/omap3-sbc-t3517.dts13
-rw-r--r--arch/arm/boot/dts/omap3.dtsi2
-rw-r--r--arch/arm/boot/dts/omap5.dtsi7
-rw-r--r--arch/arm/boot/dts/sama5d3.dtsi2
-rw-r--r--arch/arm/boot/dts/sama5d3_mci2.dtsi2
-rw-r--r--arch/arm/boot/dts/sama5d3_tcb1.dtsi2
-rw-r--r--arch/arm/boot/dts/sama5d3_uart.dtsi2
-rw-r--r--arch/arm/boot/dts/ste-ccu8540.dts1
-rw-r--r--arch/arm/boot/dts/sun7i-a20.dtsi14
-rw-r--r--arch/arm/common/edma.c48
-rw-r--r--arch/arm/configs/sunxi_defconfig2
-rw-r--r--arch/arm/include/asm/xen/page.h1
-rw-r--r--arch/arm/mach-omap2/omap-headsmp.S8
-rw-r--r--arch/arm/mach-orion5x/common.h2
-rw-r--r--arch/arm64/include/asm/memory.h1
-rw-r--r--arch/arm64/kernel/irq.c10
-rw-r--r--arch/arm64/mm/hugetlbpage.c4
-rw-r--r--arch/ia64/include/asm/unistd.h2
-rw-r--r--arch/ia64/include/uapi/asm/unistd.h1
-rw-r--r--arch/ia64/kernel/entry.S1
-rw-r--r--arch/m68k/include/asm/unistd.h2
-rw-r--r--arch/m68k/include/uapi/asm/unistd.h1
-rw-r--r--arch/m68k/kernel/syscalltable.S1
-rw-r--r--arch/metag/include/asm/barrier.h3
-rw-r--r--arch/metag/include/asm/processor.h2
-rw-r--r--arch/metag/include/uapi/asm/Kbuild2
-rw-r--r--arch/metag/include/uapi/asm/resource.h7
-rw-r--r--arch/mips/dec/ecc-berr.c1
-rw-r--r--arch/mips/dec/kn02xa-berr.c1
-rw-r--r--arch/mips/dec/prom/Makefile1
-rw-r--r--arch/mips/dec/prom/call_o32.S89
-rw-r--r--arch/mips/fw/lib/call_o32.S57
-rw-r--r--arch/mips/fw/sni/sniprom.c3
-rw-r--r--arch/mips/include/asm/dec/prom.h48
-rw-r--r--arch/mips/include/asm/rm9k-ocd.h56
-rw-r--r--arch/mips/include/asm/syscall.h2
-rw-r--r--arch/mips/include/uapi/asm/inst.h398
-rw-r--r--arch/mips/include/uapi/asm/unistd.h9
-rw-r--r--arch/mips/kernel/proc.c9
-rw-r--r--arch/mips/kernel/scall32-o32.S1
-rw-r--r--arch/mips/kernel/scall64-64.S1
-rw-r--r--arch/mips/kernel/scall64-n32.S1
-rw-r--r--arch/mips/kernel/scall64-o32.S1
-rw-r--r--arch/mips/lantiq/dts/easy50712.dts1
-rw-r--r--arch/mips/lib/csum_partial.S9
-rw-r--r--arch/mips/lib/delay.c14
-rw-r--r--arch/mips/lib/strncpy_user.S13
-rw-r--r--arch/mips/loongson/Kconfig1
-rw-r--r--arch/mips/loongson/lemote-2f/clock.c5
-rw-r--r--arch/mips/mm/tlb-funcs.S4
-rw-r--r--arch/mips/mm/tlbex.c7
-rw-r--r--arch/mips/ralink/dts/mt7620a_eval.dts1
-rw-r--r--arch/mips/ralink/dts/rt2880_eval.dts1
-rw-r--r--arch/mips/ralink/dts/rt3052_eval.dts1
-rw-r--r--arch/mips/ralink/dts/rt3883_eval.dts1
-rw-r--r--arch/parisc/Kconfig1
-rw-r--r--arch/parisc/include/asm/processor.h5
-rw-r--r--arch/parisc/include/uapi/asm/unistd.h3
-rw-r--r--arch/parisc/kernel/sys_parisc.c6
-rw-r--r--arch/parisc/kernel/syscall.S12
-rw-r--r--arch/parisc/kernel/syscall_table.S1
-rw-r--r--arch/parisc/kernel/traps.c54
-rw-r--r--arch/parisc/mm/fault.c44
-rw-r--r--arch/powerpc/kernel/time.c3
-rw-r--r--arch/powerpc/platforms/powernv/eeh-ioda.c3
-rw-r--r--arch/s390/crypto/aes_s390.c3
-rw-r--r--arch/s390/crypto/des_s390.c3
-rw-r--r--arch/x86/include/asm/hugetlb.h1
-rw-r--r--arch/x86/kernel/cpu/rdrand.c1
-rw-r--r--arch/x86/kernel/ldt.c4
-rw-r--r--arch/x86/vdso/vdso32-setup.c8
95 files changed, 608 insertions, 669 deletions
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index cb6811e5ae5a..7ad75b4e0663 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -144,7 +144,7 @@
144 compatible = "ti,edma3"; 144 compatible = "ti,edma3";
145 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2"; 145 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
146 reg = <0x49000000 0x10000>, 146 reg = <0x49000000 0x10000>,
147 <0x44e10f90 0x10>; 147 <0x44e10f90 0x40>;
148 interrupts = <12 13 14>; 148 interrupts = <12 13 14>;
149 #dma-cells = <1>; 149 #dma-cells = <1>;
150 dma-channels = <64>; 150 dma-channels = <64>;
diff --git a/arch/arm/boot/dts/am3517.dtsi b/arch/arm/boot/dts/am3517.dtsi
index 788391f91684..5a452fdd7c5d 100644
--- a/arch/arm/boot/dts/am3517.dtsi
+++ b/arch/arm/boot/dts/am3517.dtsi
@@ -62,5 +62,21 @@
62 }; 62 };
63}; 63};
64 64
65&iva {
66 status = "disabled";
67};
68
69&mailbox {
70 status = "disabled";
71};
72
73&mmu_isp {
74 status = "disabled";
75};
76
77&smartreflex_mpu_iva {
78 status = "disabled";
79};
80
65/include/ "am35xx-clocks.dtsi" 81/include/ "am35xx-clocks.dtsi"
66/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi" 82/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts
index df8798e8bd25..a055f7f0f14a 100644
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -117,6 +117,11 @@
117 status = "okay"; 117 status = "okay";
118}; 118};
119 119
120&gpio5 {
121 status = "okay";
122 ti,no-reset-on-init;
123};
124
120&mmc1 { 125&mmc1 {
121 status = "okay"; 126 status = "okay";
122 vmmc-supply = <&vmmcsd_fixed>; 127 vmmc-supply = <&vmmcsd_fixed>;
diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts
index 82f238a9063f..3383c4b66803 100644
--- a/arch/arm/boot/dts/armada-370-db.dts
+++ b/arch/arm/boot/dts/armada-370-db.dts
@@ -67,6 +67,7 @@
67 i2c@11000 { 67 i2c@11000 {
68 pinctrl-0 = <&i2c0_pins>; 68 pinctrl-0 = <&i2c0_pins>;
69 pinctrl-names = "default"; 69 pinctrl-names = "default";
70 clock-frequency = <100000>;
70 status = "okay"; 71 status = "okay";
71 audio_codec: audio-codec@4a { 72 audio_codec: audio-codec@4a {
72 compatible = "cirrus,cs42l51"; 73 compatible = "cirrus,cs42l51";
diff --git a/arch/arm/boot/dts/armada-375-db.dts b/arch/arm/boot/dts/armada-375-db.dts
index 9378d3136b41..0451124e8ebf 100644
--- a/arch/arm/boot/dts/armada-375-db.dts
+++ b/arch/arm/boot/dts/armada-375-db.dts
@@ -79,6 +79,11 @@
79 }; 79 };
80 }; 80 };
81 81
82 sata@a0000 {
83 status = "okay";
84 nr-ports = <2>;
85 };
86
82 nand: nand@d0000 { 87 nand: nand@d0000 {
83 pinctrl-0 = <&nand_pins>; 88 pinctrl-0 = <&nand_pins>;
84 pinctrl-names = "default"; 89 pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts
index 448373c4b0e5..90f0bf6f9271 100644
--- a/arch/arm/boot/dts/armada-xp-db.dts
+++ b/arch/arm/boot/dts/armada-xp-db.dts
@@ -49,7 +49,7 @@
49 /* Device Bus parameters are required */ 49 /* Device Bus parameters are required */
50 50
51 /* Read parameters */ 51 /* Read parameters */
52 devbus,bus-width = <8>; 52 devbus,bus-width = <16>;
53 devbus,turn-off-ps = <60000>; 53 devbus,turn-off-ps = <60000>;
54 devbus,badr-skew-ps = <0>; 54 devbus,badr-skew-ps = <0>;
55 devbus,acc-first-ps = <124000>; 55 devbus,acc-first-ps = <124000>;
diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts
index 61bda687f782..0c756421ae6a 100644
--- a/arch/arm/boot/dts/armada-xp-gp.dts
+++ b/arch/arm/boot/dts/armada-xp-gp.dts
@@ -59,7 +59,7 @@
59 /* Device Bus parameters are required */ 59 /* Device Bus parameters are required */
60 60
61 /* Read parameters */ 61 /* Read parameters */
62 devbus,bus-width = <8>; 62 devbus,bus-width = <16>;
63 devbus,turn-off-ps = <60000>; 63 devbus,turn-off-ps = <60000>;
64 devbus,badr-skew-ps = <0>; 64 devbus,badr-skew-ps = <0>;
65 devbus,acc-first-ps = <124000>; 65 devbus,acc-first-ps = <124000>;
@@ -146,22 +146,22 @@
146 ethernet@70000 { 146 ethernet@70000 {
147 status = "okay"; 147 status = "okay";
148 phy = <&phy0>; 148 phy = <&phy0>;
149 phy-mode = "rgmii-id"; 149 phy-mode = "qsgmii";
150 }; 150 };
151 ethernet@74000 { 151 ethernet@74000 {
152 status = "okay"; 152 status = "okay";
153 phy = <&phy1>; 153 phy = <&phy1>;
154 phy-mode = "rgmii-id"; 154 phy-mode = "qsgmii";
155 }; 155 };
156 ethernet@30000 { 156 ethernet@30000 {
157 status = "okay"; 157 status = "okay";
158 phy = <&phy2>; 158 phy = <&phy2>;
159 phy-mode = "rgmii-id"; 159 phy-mode = "qsgmii";
160 }; 160 };
161 ethernet@34000 { 161 ethernet@34000 {
162 status = "okay"; 162 status = "okay";
163 phy = <&phy3>; 163 phy = <&phy3>;
164 phy-mode = "rgmii-id"; 164 phy-mode = "qsgmii";
165 }; 165 };
166 166
167 /* Front-side USB slot */ 167 /* Front-side USB slot */
diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
index 985948ce67b3..5d42feb31049 100644
--- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
+++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
@@ -39,7 +39,7 @@
39 /* Device Bus parameters are required */ 39 /* Device Bus parameters are required */
40 40
41 /* Read parameters */ 41 /* Read parameters */
42 devbus,bus-width = <8>; 42 devbus,bus-width = <16>;
43 devbus,turn-off-ps = <60000>; 43 devbus,turn-off-ps = <60000>;
44 devbus,badr-skew-ps = <0>; 44 devbus,badr-skew-ps = <0>;
45 devbus,acc-first-ps = <124000>; 45 devbus,acc-first-ps = <124000>;
diff --git a/arch/arm/boot/dts/at91-sama5d3_xplained.dts b/arch/arm/boot/dts/at91-sama5d3_xplained.dts
index ce1375595e5f..4537259ce529 100644
--- a/arch/arm/boot/dts/at91-sama5d3_xplained.dts
+++ b/arch/arm/boot/dts/at91-sama5d3_xplained.dts
@@ -34,7 +34,7 @@
34 }; 34 };
35 35
36 spi0: spi@f0004000 { 36 spi0: spi@f0004000 {
37 cs-gpios = <&pioD 13 0>; 37 cs-gpios = <&pioD 13 0>, <0>, <0>, <&pioD 16 0>;
38 status = "okay"; 38 status = "okay";
39 }; 39 };
40 40
@@ -79,7 +79,7 @@
79 }; 79 };
80 80
81 spi1: spi@f8008000 { 81 spi1: spi@f8008000 {
82 cs-gpios = <&pioC 25 0>, <0>, <0>, <&pioD 16 0>; 82 cs-gpios = <&pioC 25 0>;
83 status = "okay"; 83 status = "okay";
84 }; 84 };
85 85
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index e21dda0e8986..3be973e9889a 100644
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -10,7 +10,7 @@
10#include <dt-bindings/pinctrl/at91.h> 10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h> 11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/clk/at91.h> 13#include <dt-bindings/clock/at91.h>
14 14
15/ { 15/ {
16 model = "Atmel AT91SAM9261 family SoC"; 16 model = "Atmel AT91SAM9261 family SoC";
diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi
index 63e1784d272c..92a52faebef7 100644
--- a/arch/arm/boot/dts/at91sam9rl.dtsi
+++ b/arch/arm/boot/dts/at91sam9rl.dtsi
@@ -8,7 +8,7 @@
8 8
9#include "skeleton.dtsi" 9#include "skeleton.dtsi"
10#include <dt-bindings/pinctrl/at91.h> 10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/clk/at91.h> 11#include <dt-bindings/clock/at91.h>
12#include <dt-bindings/interrupt-controller/irq.h> 12#include <dt-bindings/interrupt-controller/irq.h>
13#include <dt-bindings/gpio/gpio.h> 13#include <dt-bindings/gpio/gpio.h>
14 14
diff --git a/arch/arm/boot/dts/imx53-mba53.dts b/arch/arm/boot/dts/imx53-mba53.dts
index 7c8c12969892..a3431d784870 100644
--- a/arch/arm/boot/dts/imx53-mba53.dts
+++ b/arch/arm/boot/dts/imx53-mba53.dts
@@ -244,7 +244,7 @@
244&tve { 244&tve {
245 pinctrl-names = "default"; 245 pinctrl-names = "default";
246 pinctrl-0 = <&pinctrl_vga_sync_1>; 246 pinctrl-0 = <&pinctrl_vga_sync_1>;
247 i2c-ddc-bus = <&i2c3>; 247 ddc-i2c-bus = <&i2c3>;
248 fsl,tve-mode = "vga"; 248 fsl,tve-mode = "vga";
249 fsl,hsync-pin = <4>; 249 fsl,hsync-pin = <4>;
250 fsl,vsync-pin = <6>; 250 fsl,vsync-pin = <6>;
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 9c2bff2252d0..6a1bf4ff83d5 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -115,7 +115,7 @@
115 #address-cells = <1>; 115 #address-cells = <1>;
116 #size-cells = <0>; 116 #size-cells = <0>;
117 compatible = "fsl,imx53-ipu"; 117 compatible = "fsl,imx53-ipu";
118 reg = <0x18000000 0x080000000>; 118 reg = <0x18000000 0x08000000>;
119 interrupts = <11 10>; 119 interrupts = <11 10>;
120 clocks = <&clks IMX5_CLK_IPU_GATE>, 120 clocks = <&clks IMX5_CLK_IPU_GATE>,
121 <&clks IMX5_CLK_IPU_DI0_GATE>, 121 <&clks IMX5_CLK_IPU_DI0_GATE>,
diff --git a/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts b/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts
index 32c6fb4a1162..b939f4f52d16 100644
--- a/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts
+++ b/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts
@@ -30,6 +30,16 @@
30 bootargs = "console=ttyS0,115200n8 earlyprintk"; 30 bootargs = "console=ttyS0,115200n8 earlyprintk";
31 }; 31 };
32 32
33 mbus {
34 pcie-controller {
35 status = "okay";
36
37 pcie@1,0 {
38 status = "okay";
39 };
40 };
41 };
42
33 ocp@f1000000 { 43 ocp@f1000000 {
34 pinctrl@10000 { 44 pinctrl@10000 {
35 pmx_usb_led: pmx-usb-led { 45 pmx_usb_led: pmx-usb-led {
@@ -73,14 +83,6 @@
73 ehci@50000 { 83 ehci@50000 {
74 status = "okay"; 84 status = "okay";
75 }; 85 };
76
77 pcie-controller {
78 status = "okay";
79
80 pcie@1,0 {
81 status = "okay";
82 };
83 };
84 }; 86 };
85 87
86 gpio-leds { 88 gpio-leds {
diff --git a/arch/arm/boot/dts/kirkwood-nsa310-common.dtsi b/arch/arm/boot/dts/kirkwood-nsa310-common.dtsi
index aa78c2d11fe7..e2cc85cc3b87 100644
--- a/arch/arm/boot/dts/kirkwood-nsa310-common.dtsi
+++ b/arch/arm/boot/dts/kirkwood-nsa310-common.dtsi
@@ -4,6 +4,16 @@
4/ { 4/ {
5 model = "ZyXEL NSA310"; 5 model = "ZyXEL NSA310";
6 6
7 mbus {
8 pcie-controller {
9 status = "okay";
10
11 pcie@1,0 {
12 status = "okay";
13 };
14 };
15 };
16
7 ocp@f1000000 { 17 ocp@f1000000 {
8 pinctrl: pinctrl@10000 { 18 pinctrl: pinctrl@10000 {
9 19
@@ -26,14 +36,6 @@
26 status = "okay"; 36 status = "okay";
27 nr-ports = <2>; 37 nr-ports = <2>;
28 }; 38 };
29
30 pcie-controller {
31 status = "okay";
32
33 pcie@1,0 {
34 status = "okay";
35 };
36 };
37 }; 39 };
38 40
39 gpio_poweroff { 41 gpio_poweroff {
diff --git a/arch/arm/boot/dts/kirkwood-t5325.dts b/arch/arm/boot/dts/kirkwood-t5325.dts
index 7d1c7677a18f..0bd70d928c69 100644
--- a/arch/arm/boot/dts/kirkwood-t5325.dts
+++ b/arch/arm/boot/dts/kirkwood-t5325.dts
@@ -127,11 +127,6 @@
127 127
128 i2c@11000 { 128 i2c@11000 {
129 status = "okay"; 129 status = "okay";
130
131 alc5621: alc5621@1a {
132 compatible = "realtek,alc5621";
133 reg = <0x1a>;
134 };
135 }; 130 };
136 131
137 serial@12000 { 132 serial@12000 {
diff --git a/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi b/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
index f577b7df9a29..521c587acaee 100644
--- a/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
+++ b/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
@@ -24,11 +24,10 @@
24 compatible = "smsc,lan9221", "smsc,lan9115"; 24 compatible = "smsc,lan9221", "smsc,lan9115";
25 bank-width = <2>; 25 bank-width = <2>;
26 gpmc,mux-add-data; 26 gpmc,mux-add-data;
27 gpmc,cs-on-ns = <0>; 27 gpmc,cs-on-ns = <1>;
28 gpmc,cs-rd-off-ns = <186>; 28 gpmc,cs-rd-off-ns = <180>;
29 gpmc,cs-wr-off-ns = <186>; 29 gpmc,cs-wr-off-ns = <180>;
30 gpmc,adv-on-ns = <12>; 30 gpmc,adv-rd-off-ns = <18>;
31 gpmc,adv-rd-off-ns = <48>;
32 gpmc,adv-wr-off-ns = <48>; 31 gpmc,adv-wr-off-ns = <48>;
33 gpmc,oe-on-ns = <54>; 32 gpmc,oe-on-ns = <54>;
34 gpmc,oe-off-ns = <168>; 33 gpmc,oe-off-ns = <168>;
@@ -36,12 +35,10 @@
36 gpmc,we-off-ns = <168>; 35 gpmc,we-off-ns = <168>;
37 gpmc,rd-cycle-ns = <186>; 36 gpmc,rd-cycle-ns = <186>;
38 gpmc,wr-cycle-ns = <186>; 37 gpmc,wr-cycle-ns = <186>;
39 gpmc,access-ns = <114>; 38 gpmc,access-ns = <144>;
40 gpmc,page-burst-access-ns = <6>; 39 gpmc,page-burst-access-ns = <24>;
41 gpmc,bus-turnaround-ns = <12>; 40 gpmc,bus-turnaround-ns = <90>;
42 gpmc,cycle2cycle-delay-ns = <18>; 41 gpmc,cycle2cycle-delay-ns = <90>;
43 gpmc,wr-data-mux-bus-ns = <90>;
44 gpmc,wr-access-ns = <186>;
45 gpmc,cycle2cycle-samecsen; 42 gpmc,cycle2cycle-samecsen;
46 gpmc,cycle2cycle-diffcsen; 43 gpmc,cycle2cycle-diffcsen;
47 vddvario-supply = <&vddvario>; 44 vddvario-supply = <&vddvario>;
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi
index 22f35ea142c1..8f8c07da4ac1 100644
--- a/arch/arm/boot/dts/omap2.dtsi
+++ b/arch/arm/boot/dts/omap2.dtsi
@@ -71,13 +71,6 @@
71 interrupts = <58>; 71 interrupts = <58>;
72 }; 72 };
73 73
74 mailbox: mailbox@48094000 {
75 compatible = "ti,omap2-mailbox";
76 ti,hwmods = "mailbox";
77 reg = <0x48094000 0x200>;
78 interrupts = <26>;
79 };
80
81 intc: interrupt-controller@1 { 74 intc: interrupt-controller@1 {
82 compatible = "ti,omap2-intc"; 75 compatible = "ti,omap2-intc";
83 interrupt-controller; 76 interrupt-controller;
diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi
index 85b1fb014c43..2d9979835f24 100644
--- a/arch/arm/boot/dts/omap2420.dtsi
+++ b/arch/arm/boot/dts/omap2420.dtsi
@@ -125,6 +125,14 @@
125 dma-names = "tx", "rx"; 125 dma-names = "tx", "rx";
126 }; 126 };
127 127
128 mailbox: mailbox@48094000 {
129 compatible = "ti,omap2-mailbox";
130 reg = <0x48094000 0x200>;
131 interrupts = <26>, <34>;
132 interrupt-names = "dsp", "iva";
133 ti,hwmods = "mailbox";
134 };
135
128 timer1: timer@48028000 { 136 timer1: timer@48028000 {
129 compatible = "ti,omap2420-timer"; 137 compatible = "ti,omap2420-timer";
130 reg = <0x48028000 0x400>; 138 reg = <0x48028000 0x400>;
diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi
index d09697dab55e..42d2c61c9e2d 100644
--- a/arch/arm/boot/dts/omap2430.dtsi
+++ b/arch/arm/boot/dts/omap2430.dtsi
@@ -216,6 +216,13 @@
216 dma-names = "tx", "rx"; 216 dma-names = "tx", "rx";
217 }; 217 };
218 218
219 mailbox: mailbox@48094000 {
220 compatible = "ti,omap2-mailbox";
221 reg = <0x48094000 0x200>;
222 interrupts = <26>;
223 ti,hwmods = "mailbox";
224 };
225
219 timer1: timer@49018000 { 226 timer1: timer@49018000 {
220 compatible = "ti,omap2420-timer"; 227 compatible = "ti,omap2420-timer";
221 reg = <0x49018000 0x400>; 228 reg = <0x49018000 0x400>;
diff --git a/arch/arm/boot/dts/omap3-cm-t3x30.dtsi b/arch/arm/boot/dts/omap3-cm-t3x30.dtsi
index d00055809e31..25ba08331d88 100644
--- a/arch/arm/boot/dts/omap3-cm-t3x30.dtsi
+++ b/arch/arm/boot/dts/omap3-cm-t3x30.dtsi
@@ -10,18 +10,6 @@
10 cpu0-supply = <&vcc>; 10 cpu0-supply = <&vcc>;
11 }; 11 };
12 }; 12 };
13
14 vddvario: regulator-vddvario {
15 compatible = "regulator-fixed";
16 regulator-name = "vddvario";
17 regulator-always-on;
18 };
19
20 vdd33a: regulator-vdd33a {
21 compatible = "regulator-fixed";
22 regulator-name = "vdd33a";
23 regulator-always-on;
24 };
25}; 13};
26 14
27&omap3_pmx_core { 15&omap3_pmx_core {
@@ -35,58 +23,34 @@
35 23
36 hsusb0_pins: pinmux_hsusb0_pins { 24 hsusb0_pins: pinmux_hsusb0_pins {
37 pinctrl-single,pins = < 25 pinctrl-single,pins = <
38 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */ 26 OMAP3_CORE1_IOPAD(0x21a2, PIN_OUTPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
39 OMAP3_CORE1_IOPAD(0x21a2, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */ 27 OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
40 OMAP3_CORE1_IOPAD(0x21a4, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */ 28 OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
41 OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */ 29 OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
42 OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data0.hsusb2_data0 */ 30 OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data0.hsusb2_data0 */
43 OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */ 31 OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
44 OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */ 32 OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
45 OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data3 */ 33 OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data3 */
46 OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data4 */ 34 OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data4 */
47 OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data5 */ 35 OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data5 */
48 OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data6 */ 36 OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data6 */
49 OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */ 37 OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
50 >; 38 >;
51 }; 39 };
52}; 40};
53 41
42#include "omap-gpmc-smsc911x.dtsi"
43
54&gpmc { 44&gpmc {
55 ranges = <5 0 0x2c000000 0x01000000>; 45 ranges = <5 0 0x2c000000 0x01000000>;
56 46
57 smsc1: ethernet@5,0 { 47 smsc1: ethernet@gpmc {
58 compatible = "smsc,lan9221", "smsc,lan9115"; 48 compatible = "smsc,lan9221", "smsc,lan9115";
59 pinctrl-names = "default"; 49 pinctrl-names = "default";
60 pinctrl-0 = <&smsc1_pins>; 50 pinctrl-0 = <&smsc1_pins>;
61 interrupt-parent = <&gpio6>; 51 interrupt-parent = <&gpio6>;
62 interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 52 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
63 reg = <5 0 0xff>; 53 reg = <5 0 0xff>;
64 bank-width = <2>;
65 gpmc,mux-add-data;
66 gpmc,cs-on-ns = <0>;
67 gpmc,cs-rd-off-ns = <186>;
68 gpmc,cs-wr-off-ns = <186>;
69 gpmc,adv-on-ns = <12>;
70 gpmc,adv-rd-off-ns = <48>;
71 gpmc,adv-wr-off-ns = <48>;
72 gpmc,oe-on-ns = <54>;
73 gpmc,oe-off-ns = <168>;
74 gpmc,we-on-ns = <54>;
75 gpmc,we-off-ns = <168>;
76 gpmc,rd-cycle-ns = <186>;
77 gpmc,wr-cycle-ns = <186>;
78 gpmc,access-ns = <114>;
79 gpmc,page-burst-access-ns = <6>;
80 gpmc,bus-turnaround-ns = <12>;
81 gpmc,cycle2cycle-delay-ns = <18>;
82 gpmc,wr-data-mux-bus-ns = <90>;
83 gpmc,wr-access-ns = <186>;
84 gpmc,cycle2cycle-samecsen;
85 gpmc,cycle2cycle-diffcsen;
86 vddvario-supply = <&vddvario>;
87 vdd33a-supply = <&vdd33a>;
88 reg-io-width = <4>;
89 smsc,save-mac-address;
90 }; 54 };
91}; 55};
92 56
diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi
index b97736d98a64..e2d163bf0619 100644
--- a/arch/arm/boot/dts/omap3-igep.dtsi
+++ b/arch/arm/boot/dts/omap3-igep.dtsi
@@ -107,7 +107,7 @@
107 >; 107 >;
108 }; 108 };
109 109
110 smsc911x_pins: pinmux_smsc911x_pins { 110 smsc9221_pins: pinmux_smsc9221_pins {
111 pinctrl-single,pins = < 111 pinctrl-single,pins = <
112 0x1a2 (PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */ 112 0x1a2 (PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
113 >; 113 >;
diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts
index 7abd64f6ae21..b22caaaf774b 100644
--- a/arch/arm/boot/dts/omap3-igep0020.dts
+++ b/arch/arm/boot/dts/omap3-igep0020.dts
@@ -10,7 +10,7 @@
10 */ 10 */
11 11
12#include "omap3-igep.dtsi" 12#include "omap3-igep.dtsi"
13#include "omap-gpmc-smsc911x.dtsi" 13#include "omap-gpmc-smsc9221.dtsi"
14 14
15/ { 15/ {
16 model = "IGEPv2 (TI OMAP AM/DM37x)"; 16 model = "IGEPv2 (TI OMAP AM/DM37x)";
@@ -248,7 +248,7 @@
248 248
249 ethernet@gpmc { 249 ethernet@gpmc {
250 pinctrl-names = "default"; 250 pinctrl-names = "default";
251 pinctrl-0 = <&smsc911x_pins>; 251 pinctrl-0 = <&smsc9221_pins>;
252 reg = <5 0 0xff>; 252 reg = <5 0 0xff>;
253 interrupt-parent = <&gpio6>; 253 interrupt-parent = <&gpio6>;
254 interrupts = <16 IRQ_TYPE_LEVEL_LOW>; 254 interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
diff --git a/arch/arm/boot/dts/omap3-sb-t35.dtsi b/arch/arm/boot/dts/omap3-sb-t35.dtsi
index 7909c51b05a5..d59e3de1441e 100644
--- a/arch/arm/boot/dts/omap3-sb-t35.dtsi
+++ b/arch/arm/boot/dts/omap3-sb-t35.dtsi
@@ -2,20 +2,6 @@
2 * Common support for CompuLab SB-T35 used on SBC-T3530, SBC-T3517 and SBC-T3730 2 * Common support for CompuLab SB-T35 used on SBC-T3530, SBC-T3517 and SBC-T3730
3 */ 3 */
4 4
5/ {
6 vddvario_sb_t35: regulator-vddvario-sb-t35 {
7 compatible = "regulator-fixed";
8 regulator-name = "vddvario";
9 regulator-always-on;
10 };
11
12 vdd33a_sb_t35: regulator-vdd33a-sb-t35 {
13 compatible = "regulator-fixed";
14 regulator-name = "vdd33a";
15 regulator-always-on;
16 };
17};
18
19&omap3_pmx_core { 5&omap3_pmx_core {
20 smsc2_pins: pinmux_smsc2_pins { 6 smsc2_pins: pinmux_smsc2_pins {
21 pinctrl-single,pins = < 7 pinctrl-single,pins = <
@@ -37,11 +23,10 @@
37 reg = <4 0 0xff>; 23 reg = <4 0 0xff>;
38 bank-width = <2>; 24 bank-width = <2>;
39 gpmc,mux-add-data; 25 gpmc,mux-add-data;
40 gpmc,cs-on-ns = <0>; 26 gpmc,cs-on-ns = <1>;
41 gpmc,cs-rd-off-ns = <186>; 27 gpmc,cs-rd-off-ns = <180>;
42 gpmc,cs-wr-off-ns = <186>; 28 gpmc,cs-wr-off-ns = <180>;
43 gpmc,adv-on-ns = <12>; 29 gpmc,adv-rd-off-ns = <18>;
44 gpmc,adv-rd-off-ns = <48>;
45 gpmc,adv-wr-off-ns = <48>; 30 gpmc,adv-wr-off-ns = <48>;
46 gpmc,oe-on-ns = <54>; 31 gpmc,oe-on-ns = <54>;
47 gpmc,oe-off-ns = <168>; 32 gpmc,oe-off-ns = <168>;
@@ -49,16 +34,14 @@
49 gpmc,we-off-ns = <168>; 34 gpmc,we-off-ns = <168>;
50 gpmc,rd-cycle-ns = <186>; 35 gpmc,rd-cycle-ns = <186>;
51 gpmc,wr-cycle-ns = <186>; 36 gpmc,wr-cycle-ns = <186>;
52 gpmc,access-ns = <114>; 37 gpmc,access-ns = <144>;
53 gpmc,page-burst-access-ns = <6>; 38 gpmc,page-burst-access-ns = <24>;
54 gpmc,bus-turnaround-ns = <12>; 39 gpmc,bus-turnaround-ns = <90>;
55 gpmc,cycle2cycle-delay-ns = <18>; 40 gpmc,cycle2cycle-delay-ns = <90>;
56 gpmc,wr-data-mux-bus-ns = <90>;
57 gpmc,wr-access-ns = <186>;
58 gpmc,cycle2cycle-samecsen; 41 gpmc,cycle2cycle-samecsen;
59 gpmc,cycle2cycle-diffcsen; 42 gpmc,cycle2cycle-diffcsen;
60 vddvario-supply = <&vddvario_sb_t35>; 43 vddvario-supply = <&vddvario>;
61 vdd33a-supply = <&vdd33a_sb_t35>; 44 vdd33a-supply = <&vdd33a>;
62 reg-io-width = <4>; 45 reg-io-width = <4>;
63 smsc,save-mac-address; 46 smsc,save-mac-address;
64 }; 47 };
diff --git a/arch/arm/boot/dts/omap3-sbc-t3517.dts b/arch/arm/boot/dts/omap3-sbc-t3517.dts
index 024c9c6c682d..42189b65d393 100644
--- a/arch/arm/boot/dts/omap3-sbc-t3517.dts
+++ b/arch/arm/boot/dts/omap3-sbc-t3517.dts
@@ -8,6 +8,19 @@
8/ { 8/ {
9 model = "CompuLab SBC-T3517 with CM-T3517"; 9 model = "CompuLab SBC-T3517 with CM-T3517";
10 compatible = "compulab,omap3-sbc-t3517", "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3"; 10 compatible = "compulab,omap3-sbc-t3517", "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3";
11
12 /* Only one GPMC smsc9220 on SBC-T3517, CM-T3517 uses am35x Ethernet */
13 vddvario: regulator-vddvario-sb-t35 {
14 compatible = "regulator-fixed";
15 regulator-name = "vddvario";
16 regulator-always-on;
17 };
18
19 vdd33a: regulator-vdd33a-sb-t35 {
20 compatible = "regulator-fixed";
21 regulator-name = "vdd33a";
22 regulator-always-on;
23 };
11}; 24};
12 25
13&omap3_pmx_core { 26&omap3_pmx_core {
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index acb9019dc437..4231191ade06 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -61,7 +61,7 @@
61 ti,hwmods = "mpu"; 61 ti,hwmods = "mpu";
62 }; 62 };
63 63
64 iva { 64 iva: iva {
65 compatible = "ti,iva2.2"; 65 compatible = "ti,iva2.2";
66 ti,hwmods = "iva"; 66 ti,hwmods = "iva";
67 67
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index f8c9855ce587..36b4312a5e0d 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -630,6 +630,13 @@
630 status = "disabled"; 630 status = "disabled";
631 }; 631 };
632 632
633 mailbox: mailbox@4a0f4000 {
634 compatible = "ti,omap4-mailbox";
635 reg = <0x4a0f4000 0x200>;
636 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
637 ti,hwmods = "mailbox";
638 };
639
633 timer1: timer@4ae18000 { 640 timer1: timer@4ae18000 {
634 compatible = "ti,omap5430-timer"; 641 compatible = "ti,omap5430-timer";
635 reg = <0x4ae18000 0x80>; 642 reg = <0x4ae18000 0x80>;
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index eabcfdbb403a..a106b0872910 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -13,7 +13,7 @@
13#include <dt-bindings/pinctrl/at91.h> 13#include <dt-bindings/pinctrl/at91.h>
14#include <dt-bindings/interrupt-controller/irq.h> 14#include <dt-bindings/interrupt-controller/irq.h>
15#include <dt-bindings/gpio/gpio.h> 15#include <dt-bindings/gpio/gpio.h>
16#include <dt-bindings/clk/at91.h> 16#include <dt-bindings/clock/at91.h>
17 17
18/ { 18/ {
19 model = "Atmel SAMA5D3 family SoC"; 19 model = "Atmel SAMA5D3 family SoC";
diff --git a/arch/arm/boot/dts/sama5d3_mci2.dtsi b/arch/arm/boot/dts/sama5d3_mci2.dtsi
index b029fe7ef17a..1b02208ea6ff 100644
--- a/arch/arm/boot/dts/sama5d3_mci2.dtsi
+++ b/arch/arm/boot/dts/sama5d3_mci2.dtsi
@@ -9,7 +9,7 @@
9 9
10#include <dt-bindings/pinctrl/at91.h> 10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h> 11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/clk/at91.h> 12#include <dt-bindings/clock/at91.h>
13 13
14/ { 14/ {
15 ahb { 15 ahb {
diff --git a/arch/arm/boot/dts/sama5d3_tcb1.dtsi b/arch/arm/boot/dts/sama5d3_tcb1.dtsi
index 382b04431f66..02848453ca0c 100644
--- a/arch/arm/boot/dts/sama5d3_tcb1.dtsi
+++ b/arch/arm/boot/dts/sama5d3_tcb1.dtsi
@@ -9,7 +9,7 @@
9 9
10#include <dt-bindings/pinctrl/at91.h> 10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h> 11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/clk/at91.h> 12#include <dt-bindings/clock/at91.h>
13 13
14/ { 14/ {
15 aliases { 15 aliases {
diff --git a/arch/arm/boot/dts/sama5d3_uart.dtsi b/arch/arm/boot/dts/sama5d3_uart.dtsi
index a9fa75e41652..7a8d4c6115f7 100644
--- a/arch/arm/boot/dts/sama5d3_uart.dtsi
+++ b/arch/arm/boot/dts/sama5d3_uart.dtsi
@@ -9,7 +9,7 @@
9 9
10#include <dt-bindings/pinctrl/at91.h> 10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h> 11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/clk/at91.h> 12#include <dt-bindings/clock/at91.h>
13 13
14/ { 14/ {
15 aliases { 15 aliases {
diff --git a/arch/arm/boot/dts/ste-ccu8540.dts b/arch/arm/boot/dts/ste-ccu8540.dts
index 7f3baf51a3a9..32dd55e5f4e6 100644
--- a/arch/arm/boot/dts/ste-ccu8540.dts
+++ b/arch/arm/boot/dts/ste-ccu8540.dts
@@ -18,6 +18,7 @@
18 compatible = "st-ericsson,ccu8540", "st-ericsson,u8540"; 18 compatible = "st-ericsson,ccu8540", "st-ericsson,u8540";
19 19
20 memory@0 { 20 memory@0 {
21 device_type = "memory";
21 reg = <0x20000000 0x1f000000>, <0xc0000000 0x3f000000>; 22 reg = <0x20000000 0x1f000000>, <0xc0000000 0x3f000000>;
22 }; 23 };
23 24
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 32efc105df83..aba1c8a3f388 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -87,7 +87,7 @@
87 87
88 pll4: clk@01c20018 { 88 pll4: clk@01c20018 {
89 #clock-cells = <0>; 89 #clock-cells = <0>;
90 compatible = "allwinner,sun4i-a10-pll1-clk"; 90 compatible = "allwinner,sun7i-a20-pll4-clk";
91 reg = <0x01c20018 0x4>; 91 reg = <0x01c20018 0x4>;
92 clocks = <&osc24M>; 92 clocks = <&osc24M>;
93 clock-output-names = "pll4"; 93 clock-output-names = "pll4";
@@ -109,6 +109,14 @@
109 clock-output-names = "pll6_sata", "pll6_other", "pll6"; 109 clock-output-names = "pll6_sata", "pll6_other", "pll6";
110 }; 110 };
111 111
112 pll8: clk@01c20040 {
113 #clock-cells = <0>;
114 compatible = "allwinner,sun7i-a20-pll4-clk";
115 reg = <0x01c20040 0x4>;
116 clocks = <&osc24M>;
117 clock-output-names = "pll8";
118 };
119
112 cpu: cpu@01c20054 { 120 cpu: cpu@01c20054 {
113 #clock-cells = <0>; 121 #clock-cells = <0>;
114 compatible = "allwinner,sun4i-a10-cpu-clk"; 122 compatible = "allwinner,sun4i-a10-cpu-clk";
@@ -805,9 +813,9 @@
805 status = "disabled"; 813 status = "disabled";
806 }; 814 };
807 815
808 i2c4: i2c@01c2bc00 { 816 i2c4: i2c@01c2c000 {
809 compatible = "allwinner,sun4i-i2c"; 817 compatible = "allwinner,sun4i-i2c";
810 reg = <0x01c2bc00 0x400>; 818 reg = <0x01c2c000 0x400>;
811 interrupts = <0 89 4>; 819 interrupts = <0 89 4>;
812 clocks = <&apb1_gates 15>; 820 clocks = <&apb1_gates 15>;
813 clock-frequency = <100000>; 821 clock-frequency = <100000>;
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index 41bca32409fc..5339009b3c0c 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -1423,55 +1423,38 @@ EXPORT_SYMBOL(edma_clear_event);
1423 1423
1424#if IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_DMADEVICES) 1424#if IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_DMADEVICES)
1425 1425
1426static int edma_of_read_u32_to_s16_array(const struct device_node *np, 1426static int edma_xbar_event_map(struct device *dev, struct device_node *node,
1427 const char *propname, s16 *out_values, 1427 struct edma_soc_info *pdata, size_t sz)
1428 size_t sz)
1429{ 1428{
1430 int ret; 1429 const char pname[] = "ti,edma-xbar-event-map";
1431
1432 ret = of_property_read_u16_array(np, propname, out_values, sz);
1433 if (ret)
1434 return ret;
1435
1436 /* Terminate it */
1437 *out_values++ = -1;
1438 *out_values++ = -1;
1439
1440 return 0;
1441}
1442
1443static int edma_xbar_event_map(struct device *dev,
1444 struct device_node *node,
1445 struct edma_soc_info *pdata, int len)
1446{
1447 int ret, i;
1448 struct resource res; 1430 struct resource res;
1449 void __iomem *xbar; 1431 void __iomem *xbar;
1450 const s16 (*xbar_chans)[2]; 1432 s16 (*xbar_chans)[2];
1433 size_t nelm = sz / sizeof(s16);
1451 u32 shift, offset, mux; 1434 u32 shift, offset, mux;
1435 int ret, i;
1452 1436
1453 xbar_chans = devm_kzalloc(dev, 1437 xbar_chans = devm_kzalloc(dev, (nelm + 2) * sizeof(s16), GFP_KERNEL);
1454 len/sizeof(s16) + 2*sizeof(s16),
1455 GFP_KERNEL);
1456 if (!xbar_chans) 1438 if (!xbar_chans)
1457 return -ENOMEM; 1439 return -ENOMEM;
1458 1440
1459 ret = of_address_to_resource(node, 1, &res); 1441 ret = of_address_to_resource(node, 1, &res);
1460 if (ret) 1442 if (ret)
1461 return -EIO; 1443 return -ENOMEM;
1462 1444
1463 xbar = devm_ioremap(dev, res.start, resource_size(&res)); 1445 xbar = devm_ioremap(dev, res.start, resource_size(&res));
1464 if (!xbar) 1446 if (!xbar)
1465 return -ENOMEM; 1447 return -ENOMEM;
1466 1448
1467 ret = edma_of_read_u32_to_s16_array(node, 1449 ret = of_property_read_u16_array(node, pname, (u16 *)xbar_chans, nelm);
1468 "ti,edma-xbar-event-map",
1469 (s16 *)xbar_chans,
1470 len/sizeof(u32));
1471 if (ret) 1450 if (ret)
1472 return -EIO; 1451 return -EIO;
1473 1452
1474 for (i = 0; xbar_chans[i][0] != -1; i++) { 1453 /* Invalidate last entry for the other user of this mess */
1454 nelm >>= 1;
1455 xbar_chans[nelm][0] = xbar_chans[nelm][1] = -1;
1456
1457 for (i = 0; i < nelm; i++) {
1475 shift = (xbar_chans[i][1] & 0x03) << 3; 1458 shift = (xbar_chans[i][1] & 0x03) << 3;
1476 offset = xbar_chans[i][1] & 0xfffffffc; 1459 offset = xbar_chans[i][1] & 0xfffffffc;
1477 mux = readl(xbar + offset); 1460 mux = readl(xbar + offset);
@@ -1480,8 +1463,7 @@ static int edma_xbar_event_map(struct device *dev,
1480 writel(mux, (xbar + offset)); 1463 writel(mux, (xbar + offset));
1481 } 1464 }
1482 1465
1483 pdata->xbar_chans = xbar_chans; 1466 pdata->xbar_chans = (const s16 (*)[2]) xbar_chans;
1484
1485 return 0; 1467 return 0;
1486} 1468}
1487 1469
diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig
index b5df4a511b0a..81ba78eaf54a 100644
--- a/arch/arm/configs/sunxi_defconfig
+++ b/arch/arm/configs/sunxi_defconfig
@@ -37,7 +37,7 @@ CONFIG_SUN4I_EMAC=y
37# CONFIG_NET_VENDOR_NATSEMI is not set 37# CONFIG_NET_VENDOR_NATSEMI is not set
38# CONFIG_NET_VENDOR_SEEQ is not set 38# CONFIG_NET_VENDOR_SEEQ is not set
39# CONFIG_NET_VENDOR_SMSC is not set 39# CONFIG_NET_VENDOR_SMSC is not set
40# CONFIG_NET_VENDOR_STMICRO is not set 40CONFIG_STMMAC_ETH=y
41# CONFIG_NET_VENDOR_WIZNET is not set 41# CONFIG_NET_VENDOR_WIZNET is not set
42# CONFIG_WLAN is not set 42# CONFIG_WLAN is not set
43CONFIG_SERIAL_8250=y 43CONFIG_SERIAL_8250=y
diff --git a/arch/arm/include/asm/xen/page.h b/arch/arm/include/asm/xen/page.h
index cf4f3e867395..ded062f9b358 100644
--- a/arch/arm/include/asm/xen/page.h
+++ b/arch/arm/include/asm/xen/page.h
@@ -77,7 +77,6 @@ static inline xpaddr_t machine_to_phys(xmaddr_t machine)
77} 77}
78/* VIRT <-> MACHINE conversion */ 78/* VIRT <-> MACHINE conversion */
79#define virt_to_machine(v) (phys_to_machine(XPADDR(__pa(v)))) 79#define virt_to_machine(v) (phys_to_machine(XPADDR(__pa(v))))
80#define virt_to_pfn(v) (PFN_DOWN(__pa(v)))
81#define virt_to_mfn(v) (pfn_to_mfn(virt_to_pfn(v))) 80#define virt_to_mfn(v) (pfn_to_mfn(virt_to_pfn(v)))
82#define mfn_to_virt(m) (__va(mfn_to_pfn(m) << PAGE_SHIFT)) 81#define mfn_to_virt(m) (__va(mfn_to_pfn(m) << PAGE_SHIFT))
83 82
diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S
index 75e92952c18e..40c5d5f1451c 100644
--- a/arch/arm/mach-omap2/omap-headsmp.S
+++ b/arch/arm/mach-omap2/omap-headsmp.S
@@ -1,7 +1,7 @@
1/* 1/*
2 * Secondary CPU startup routine source file. 2 * Secondary CPU startup routine source file.
3 * 3 *
4 * Copyright (C) 2009 Texas Instruments, Inc. 4 * Copyright (C) 2009-2014 Texas Instruments, Inc.
5 * 5 *
6 * Author: 6 * Author:
7 * Santosh Shilimkar <santosh.shilimkar@ti.com> 7 * Santosh Shilimkar <santosh.shilimkar@ti.com>
@@ -28,9 +28,13 @@
28 * code. This routine also provides a holding flag into which 28 * code. This routine also provides a holding flag into which
29 * secondary core is held until we're ready for it to initialise. 29 * secondary core is held until we're ready for it to initialise.
30 * The primary core will update this flag using a hardware 30 * The primary core will update this flag using a hardware
31+ * register AuxCoreBoot0. 31 * register AuxCoreBoot0.
32 */ 32 */
33ENTRY(omap5_secondary_startup) 33ENTRY(omap5_secondary_startup)
34.arm
35THUMB( adr r9, BSYM(wait) ) @ CPU may be entered in ARM mode.
36THUMB( bx r9 ) @ If this is a Thumb-2 kernel,
37THUMB( .thumb ) @ switch to Thumb now.
34wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0 38wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0
35 ldr r0, [r2] 39 ldr r0, [r2]
36 mov r0, r0, lsr #5 40 mov r0, r0, lsr #5
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index f565f9944af2..7548db2bfb8a 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -21,7 +21,7 @@ struct mv_sata_platform_data;
21#define ORION_MBUS_DEVBUS_BOOT_ATTR 0x0f 21#define ORION_MBUS_DEVBUS_BOOT_ATTR 0x0f
22#define ORION_MBUS_DEVBUS_TARGET(cs) 0x01 22#define ORION_MBUS_DEVBUS_TARGET(cs) 0x01
23#define ORION_MBUS_DEVBUS_ATTR(cs) (~(1 << cs)) 23#define ORION_MBUS_DEVBUS_ATTR(cs) (~(1 << cs))
24#define ORION_MBUS_SRAM_TARGET 0x00 24#define ORION_MBUS_SRAM_TARGET 0x09
25#define ORION_MBUS_SRAM_ATTR 0x00 25#define ORION_MBUS_SRAM_ATTR 0x00
26 26
27/* 27/*
diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
index e94f9458aa6f..993bce527b85 100644
--- a/arch/arm64/include/asm/memory.h
+++ b/arch/arm64/include/asm/memory.h
@@ -138,6 +138,7 @@ static inline void *phys_to_virt(phys_addr_t x)
138#define __pa(x) __virt_to_phys((unsigned long)(x)) 138#define __pa(x) __virt_to_phys((unsigned long)(x))
139#define __va(x) ((void *)__phys_to_virt((phys_addr_t)(x))) 139#define __va(x) ((void *)__phys_to_virt((phys_addr_t)(x)))
140#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) 140#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
141#define virt_to_pfn(x) __phys_to_pfn(__virt_to_phys(x))
141 142
142/* 143/*
143 * virt_to_page(k) convert a _valid_ virtual address to struct page * 144 * virt_to_page(k) convert a _valid_ virtual address to struct page *
diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c
index 473e5dbf8f39..0f08dfd69ebc 100644
--- a/arch/arm64/kernel/irq.c
+++ b/arch/arm64/kernel/irq.c
@@ -97,11 +97,15 @@ static bool migrate_one_irq(struct irq_desc *desc)
97 if (irqd_is_per_cpu(d) || !cpumask_test_cpu(smp_processor_id(), affinity)) 97 if (irqd_is_per_cpu(d) || !cpumask_test_cpu(smp_processor_id(), affinity))
98 return false; 98 return false;
99 99
100 if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) { 100 if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids)
101 affinity = cpu_online_mask;
102 ret = true; 101 ret = true;
103 }
104 102
103 /*
104 * when using forced irq_set_affinity we must ensure that the cpu
105 * being offlined is not present in the affinity mask, it may be
106 * selected as the target CPU otherwise
107 */
108 affinity = cpu_online_mask;
105 c = irq_data_get_irq_chip(d); 109 c = irq_data_get_irq_chip(d);
106 if (!c->irq_set_affinity) 110 if (!c->irq_set_affinity)
107 pr_debug("IRQ%u: unable to set affinity\n", d->irq); 111 pr_debug("IRQ%u: unable to set affinity\n", d->irq);
diff --git a/arch/arm64/mm/hugetlbpage.c b/arch/arm64/mm/hugetlbpage.c
index 5e9aec358306..31eb959e9aa8 100644
--- a/arch/arm64/mm/hugetlbpage.c
+++ b/arch/arm64/mm/hugetlbpage.c
@@ -51,7 +51,11 @@ int pmd_huge(pmd_t pmd)
51 51
52int pud_huge(pud_t pud) 52int pud_huge(pud_t pud)
53{ 53{
54#ifndef __PAGETABLE_PMD_FOLDED
54 return !(pud_val(pud) & PUD_TABLE_BIT); 55 return !(pud_val(pud) & PUD_TABLE_BIT);
56#else
57 return 0;
58#endif
55} 59}
56 60
57int pmd_huge_support(void) 61int pmd_huge_support(void)
diff --git a/arch/ia64/include/asm/unistd.h b/arch/ia64/include/asm/unistd.h
index ae763d8bf55a..fb13dc5e8f8c 100644
--- a/arch/ia64/include/asm/unistd.h
+++ b/arch/ia64/include/asm/unistd.h
@@ -11,7 +11,7 @@
11 11
12 12
13 13
14#define NR_syscalls 314 /* length of syscall table */ 14#define NR_syscalls 315 /* length of syscall table */
15 15
16/* 16/*
17 * The following defines stop scripts/checksyscalls.sh from complaining about 17 * The following defines stop scripts/checksyscalls.sh from complaining about
diff --git a/arch/ia64/include/uapi/asm/unistd.h b/arch/ia64/include/uapi/asm/unistd.h
index 715e85f858de..7de0a2d65da4 100644
--- a/arch/ia64/include/uapi/asm/unistd.h
+++ b/arch/ia64/include/uapi/asm/unistd.h
@@ -327,5 +327,6 @@
327#define __NR_finit_module 1335 327#define __NR_finit_module 1335
328#define __NR_sched_setattr 1336 328#define __NR_sched_setattr 1336
329#define __NR_sched_getattr 1337 329#define __NR_sched_getattr 1337
330#define __NR_renameat2 1338
330 331
331#endif /* _UAPI_ASM_IA64_UNISTD_H */ 332#endif /* _UAPI_ASM_IA64_UNISTD_H */
diff --git a/arch/ia64/kernel/entry.S b/arch/ia64/kernel/entry.S
index fa8d61a312a7..ba3d03503e84 100644
--- a/arch/ia64/kernel/entry.S
+++ b/arch/ia64/kernel/entry.S
@@ -1775,6 +1775,7 @@ sys_call_table:
1775 data8 sys_finit_module // 1335 1775 data8 sys_finit_module // 1335
1776 data8 sys_sched_setattr 1776 data8 sys_sched_setattr
1777 data8 sys_sched_getattr 1777 data8 sys_sched_getattr
1778 data8 sys_renameat2
1778 1779
1779 .org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls 1780 .org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls
1780#endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */ 1781#endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */
diff --git a/arch/m68k/include/asm/unistd.h b/arch/m68k/include/asm/unistd.h
index 9d38b73989eb..33afa56ad47a 100644
--- a/arch/m68k/include/asm/unistd.h
+++ b/arch/m68k/include/asm/unistd.h
@@ -4,7 +4,7 @@
4#include <uapi/asm/unistd.h> 4#include <uapi/asm/unistd.h>
5 5
6 6
7#define NR_syscalls 351 7#define NR_syscalls 352
8 8
9#define __ARCH_WANT_OLD_READDIR 9#define __ARCH_WANT_OLD_READDIR
10#define __ARCH_WANT_OLD_STAT 10#define __ARCH_WANT_OLD_STAT
diff --git a/arch/m68k/include/uapi/asm/unistd.h b/arch/m68k/include/uapi/asm/unistd.h
index b932dd470041..9cd82fbc7817 100644
--- a/arch/m68k/include/uapi/asm/unistd.h
+++ b/arch/m68k/include/uapi/asm/unistd.h
@@ -356,5 +356,6 @@
356#define __NR_finit_module 348 356#define __NR_finit_module 348
357#define __NR_sched_setattr 349 357#define __NR_sched_setattr 349
358#define __NR_sched_getattr 350 358#define __NR_sched_getattr 350
359#define __NR_renameat2 351
359 360
360#endif /* _UAPI_ASM_M68K_UNISTD_H_ */ 361#endif /* _UAPI_ASM_M68K_UNISTD_H_ */
diff --git a/arch/m68k/kernel/syscalltable.S b/arch/m68k/kernel/syscalltable.S
index b6223dc41d82..501e10212789 100644
--- a/arch/m68k/kernel/syscalltable.S
+++ b/arch/m68k/kernel/syscalltable.S
@@ -371,4 +371,5 @@ ENTRY(sys_call_table)
371 .long sys_finit_module 371 .long sys_finit_module
372 .long sys_sched_setattr 372 .long sys_sched_setattr
373 .long sys_sched_getattr /* 350 */ 373 .long sys_sched_getattr /* 350 */
374 .long sys_renameat2
374 375
diff --git a/arch/metag/include/asm/barrier.h b/arch/metag/include/asm/barrier.h
index 5d6b4b407dda..2d6f0de77325 100644
--- a/arch/metag/include/asm/barrier.h
+++ b/arch/metag/include/asm/barrier.h
@@ -15,6 +15,7 @@ static inline void wr_fence(void)
15 volatile int *flushptr = (volatile int *) LINSYSEVENT_WR_FENCE; 15 volatile int *flushptr = (volatile int *) LINSYSEVENT_WR_FENCE;
16 barrier(); 16 barrier();
17 *flushptr = 0; 17 *flushptr = 0;
18 barrier();
18} 19}
19 20
20#else /* CONFIG_METAG_META21 */ 21#else /* CONFIG_METAG_META21 */
@@ -35,6 +36,7 @@ static inline void wr_fence(void)
35 *flushptr = 0; 36 *flushptr = 0;
36 *flushptr = 0; 37 *flushptr = 0;
37 *flushptr = 0; 38 *flushptr = 0;
39 barrier();
38} 40}
39 41
40#endif /* !CONFIG_METAG_META21 */ 42#endif /* !CONFIG_METAG_META21 */
@@ -68,6 +70,7 @@ static inline void fence(void)
68 volatile int *flushptr = (volatile int *) LINSYSEVENT_WR_ATOMIC_UNLOCK; 70 volatile int *flushptr = (volatile int *) LINSYSEVENT_WR_ATOMIC_UNLOCK;
69 barrier(); 71 barrier();
70 *flushptr = 0; 72 *flushptr = 0;
73 barrier();
71} 74}
72#define smp_mb() fence() 75#define smp_mb() fence()
73#define smp_rmb() fence() 76#define smp_rmb() fence()
diff --git a/arch/metag/include/asm/processor.h b/arch/metag/include/asm/processor.h
index f16477d1f571..a8a37477c66e 100644
--- a/arch/metag/include/asm/processor.h
+++ b/arch/metag/include/asm/processor.h
@@ -22,6 +22,8 @@
22/* Add an extra page of padding at the top of the stack for the guard page. */ 22/* Add an extra page of padding at the top of the stack for the guard page. */
23#define STACK_TOP (TASK_SIZE - PAGE_SIZE) 23#define STACK_TOP (TASK_SIZE - PAGE_SIZE)
24#define STACK_TOP_MAX STACK_TOP 24#define STACK_TOP_MAX STACK_TOP
25/* Maximum virtual space for stack */
26#define STACK_SIZE_MAX (CONFIG_MAX_STACK_SIZE_MB*1024*1024)
25 27
26/* This decides where the kernel will search for a free chunk of vm 28/* This decides where the kernel will search for a free chunk of vm
27 * space during mmap's. 29 * space during mmap's.
diff --git a/arch/metag/include/uapi/asm/Kbuild b/arch/metag/include/uapi/asm/Kbuild
index 84e09feb4d54..ab78be2b6eb0 100644
--- a/arch/metag/include/uapi/asm/Kbuild
+++ b/arch/metag/include/uapi/asm/Kbuild
@@ -4,11 +4,11 @@ include include/uapi/asm-generic/Kbuild.asm
4header-y += byteorder.h 4header-y += byteorder.h
5header-y += ech.h 5header-y += ech.h
6header-y += ptrace.h 6header-y += ptrace.h
7header-y += resource.h
8header-y += sigcontext.h 7header-y += sigcontext.h
9header-y += siginfo.h 8header-y += siginfo.h
10header-y += swab.h 9header-y += swab.h
11header-y += unistd.h 10header-y += unistd.h
12 11
13generic-y += mman.h 12generic-y += mman.h
13generic-y += resource.h
14generic-y += setup.h 14generic-y += setup.h
diff --git a/arch/metag/include/uapi/asm/resource.h b/arch/metag/include/uapi/asm/resource.h
deleted file mode 100644
index 526d23cc3054..000000000000
--- a/arch/metag/include/uapi/asm/resource.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef _UAPI_METAG_RESOURCE_H
2#define _UAPI_METAG_RESOURCE_H
3
4#define _STK_LIM_MAX (1 << 28)
5#include <asm-generic/resource.h>
6
7#endif /* _UAPI_METAG_RESOURCE_H */
diff --git a/arch/mips/dec/ecc-berr.c b/arch/mips/dec/ecc-berr.c
index 5abf4e894216..2a66e908f6a9 100644
--- a/arch/mips/dec/ecc-berr.c
+++ b/arch/mips/dec/ecc-berr.c
@@ -21,6 +21,7 @@
21#include <asm/addrspace.h> 21#include <asm/addrspace.h>
22#include <asm/bootinfo.h> 22#include <asm/bootinfo.h>
23#include <asm/cpu.h> 23#include <asm/cpu.h>
24#include <asm/cpu-type.h>
24#include <asm/irq_regs.h> 25#include <asm/irq_regs.h>
25#include <asm/processor.h> 26#include <asm/processor.h>
26#include <asm/ptrace.h> 27#include <asm/ptrace.h>
diff --git a/arch/mips/dec/kn02xa-berr.c b/arch/mips/dec/kn02xa-berr.c
index f434b759e3b9..ec606363b806 100644
--- a/arch/mips/dec/kn02xa-berr.c
+++ b/arch/mips/dec/kn02xa-berr.c
@@ -19,6 +19,7 @@
19#include <linux/types.h> 19#include <linux/types.h>
20 20
21#include <asm/addrspace.h> 21#include <asm/addrspace.h>
22#include <asm/cpu-type.h>
22#include <asm/irq_regs.h> 23#include <asm/irq_regs.h>
23#include <asm/ptrace.h> 24#include <asm/ptrace.h>
24#include <asm/traps.h> 25#include <asm/traps.h>
diff --git a/arch/mips/dec/prom/Makefile b/arch/mips/dec/prom/Makefile
index 064ae7a76bdc..ae73e42ac20b 100644
--- a/arch/mips/dec/prom/Makefile
+++ b/arch/mips/dec/prom/Makefile
@@ -6,4 +6,3 @@
6lib-y += init.o memory.o cmdline.o identify.o console.o 6lib-y += init.o memory.o cmdline.o identify.o console.o
7 7
8lib-$(CONFIG_32BIT) += locore.o 8lib-$(CONFIG_32BIT) += locore.o
9lib-$(CONFIG_64BIT) += call_o32.o
diff --git a/arch/mips/dec/prom/call_o32.S b/arch/mips/dec/prom/call_o32.S
deleted file mode 100644
index 8c8498159e43..000000000000
--- a/arch/mips/dec/prom/call_o32.S
+++ /dev/null
@@ -1,89 +0,0 @@
1/*
2 * O32 interface for the 64 (or N32) ABI.
3 *
4 * Copyright (C) 2002 Maciej W. Rozycki
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <asm/asm.h>
13#include <asm/regdef.h>
14
15/* Maximum number of arguments supported. Must be even! */
16#define O32_ARGC 32
17/* Number of static registers we save. */
18#define O32_STATC 11
19/* Frame size for both of the above. */
20#define O32_FRAMESZ (4 * O32_ARGC + SZREG * O32_STATC)
21
22 .text
23
24/*
25 * O32 function call dispatcher, for interfacing 32-bit ROM routines.
26 *
27 * The standard 64 (N32) calling sequence is supported, with a0
28 * holding a function pointer, a1-a7 -- its first seven arguments
29 * and the stack -- remaining ones (up to O32_ARGC, including a1-a7).
30 * Static registers, gp and fp are preserved, v0 holds a result.
31 * This code relies on the called o32 function for sp and ra
32 * restoration and thus both this dispatcher and the current stack
33 * have to be placed in a KSEGx (or KUSEG) address space. Any
34 * pointers passed have to point to addresses within one of these
35 * spaces as well.
36 */
37NESTED(call_o32, O32_FRAMESZ, ra)
38 REG_SUBU sp,O32_FRAMESZ
39
40 REG_S ra,O32_FRAMESZ-1*SZREG(sp)
41 REG_S fp,O32_FRAMESZ-2*SZREG(sp)
42 REG_S gp,O32_FRAMESZ-3*SZREG(sp)
43 REG_S s7,O32_FRAMESZ-4*SZREG(sp)
44 REG_S s6,O32_FRAMESZ-5*SZREG(sp)
45 REG_S s5,O32_FRAMESZ-6*SZREG(sp)
46 REG_S s4,O32_FRAMESZ-7*SZREG(sp)
47 REG_S s3,O32_FRAMESZ-8*SZREG(sp)
48 REG_S s2,O32_FRAMESZ-9*SZREG(sp)
49 REG_S s1,O32_FRAMESZ-10*SZREG(sp)
50 REG_S s0,O32_FRAMESZ-11*SZREG(sp)
51
52 move jp,a0
53
54 sll a0,a1,zero
55 sll a1,a2,zero
56 sll a2,a3,zero
57 sll a3,a4,zero
58 sw a5,0x10(sp)
59 sw a6,0x14(sp)
60 sw a7,0x18(sp)
61
62 PTR_LA t0,O32_FRAMESZ(sp)
63 PTR_LA t1,0x1c(sp)
64 li t2,O32_ARGC-7
651:
66 lw t3,(t0)
67 REG_ADDU t0,SZREG
68 sw t3,(t1)
69 REG_SUBU t2,1
70 REG_ADDU t1,4
71 bnez t2,1b
72
73 jalr jp
74
75 REG_L s0,O32_FRAMESZ-11*SZREG(sp)
76 REG_L s1,O32_FRAMESZ-10*SZREG(sp)
77 REG_L s2,O32_FRAMESZ-9*SZREG(sp)
78 REG_L s3,O32_FRAMESZ-8*SZREG(sp)
79 REG_L s4,O32_FRAMESZ-7*SZREG(sp)
80 REG_L s5,O32_FRAMESZ-6*SZREG(sp)
81 REG_L s6,O32_FRAMESZ-5*SZREG(sp)
82 REG_L s7,O32_FRAMESZ-4*SZREG(sp)
83 REG_L gp,O32_FRAMESZ-3*SZREG(sp)
84 REG_L fp,O32_FRAMESZ-2*SZREG(sp)
85 REG_L ra,O32_FRAMESZ-1*SZREG(sp)
86
87 REG_ADDU sp,O32_FRAMESZ
88 jr ra
89END(call_o32)
diff --git a/arch/mips/fw/lib/call_o32.S b/arch/mips/fw/lib/call_o32.S
index b308b2a0613e..4703fe4dbd9a 100644
--- a/arch/mips/fw/lib/call_o32.S
+++ b/arch/mips/fw/lib/call_o32.S
@@ -1,7 +1,7 @@
1/* 1/*
2 * O32 interface for the 64 (or N32) ABI. 2 * O32 interface for the 64 (or N32) ABI.
3 * 3 *
4 * Copyright (C) 2002 Maciej W. Rozycki 4 * Copyright (C) 2002, 2014 Maciej W. Rozycki
5 * 5 *
6 * This program is free software; you can redistribute it and/or 6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License 7 * modify it under the terms of the GNU General Public License
@@ -12,28 +12,37 @@
12#include <asm/asm.h> 12#include <asm/asm.h>
13#include <asm/regdef.h> 13#include <asm/regdef.h>
14 14
15/* O32 register size. */
16#define O32_SZREG 4
15/* Maximum number of arguments supported. Must be even! */ 17/* Maximum number of arguments supported. Must be even! */
16#define O32_ARGC 32 18#define O32_ARGC 32
17/* Number of static registers we save. */ 19/* Number of static registers we save. */
18#define O32_STATC 11 20#define O32_STATC 11
19/* Frame size for static register */ 21/* Argument area frame size. */
20#define O32_FRAMESZ (SZREG * O32_STATC) 22#define O32_ARGSZ (O32_SZREG * O32_ARGC)
21/* Frame size on new stack */ 23/* Static register save area frame size. */
22#define O32_FRAMESZ_NEW (SZREG + 4 * O32_ARGC) 24#define O32_STATSZ (SZREG * O32_STATC)
25/* Stack pointer register save area frame size. */
26#define O32_SPSZ SZREG
27/* Combined area frame size. */
28#define O32_FRAMESZ (O32_ARGSZ + O32_SPSZ + O32_STATSZ)
29/* Switched stack frame size. */
30#define O32_NFRAMESZ (O32_ARGSZ + O32_SPSZ)
23 31
24 .text 32 .text
25 33
26/* 34/*
27 * O32 function call dispatcher, for interfacing 32-bit ROM routines. 35 * O32 function call dispatcher, for interfacing 32-bit ROM routines.
28 * 36 *
29 * The standard 64 (N32) calling sequence is supported, with a0 37 * The standard 64 (N32) calling sequence is supported, with a0 holding
30 * holding a function pointer, a1 a new stack pointer, a2-a7 -- its 38 * a function pointer, a1 a pointer to the new stack to call the
31 * first six arguments and the stack -- remaining ones (up to O32_ARGC, 39 * function with or 0 if no stack switching is requested, a2-a7 -- the
32 * including a2-a7). Static registers, gp and fp are preserved, v0 holds 40 * function call's first six arguments, and the stack -- the remaining
33 * a result. This code relies on the called o32 function for sp and ra 41 * arguments (up to O32_ARGC, including a2-a7). Static registers, gp
34 * restoration and this dispatcher has to be placed in a KSEGx (or KUSEG) 42 * and fp are preserved, v0 holds the result. This code relies on the
35 * address space. Any pointers passed have to point to addresses within 43 * called o32 function for sp and ra restoration and this dispatcher has
36 * one of these spaces as well. 44 * to be placed in a KSEGx (or KUSEG) address space. Any pointers
45 * passed have to point to addresses within one of these spaces as well.
37 */ 46 */
38NESTED(call_o32, O32_FRAMESZ, ra) 47NESTED(call_o32, O32_FRAMESZ, ra)
39 REG_SUBU sp,O32_FRAMESZ 48 REG_SUBU sp,O32_FRAMESZ
@@ -51,32 +60,36 @@ NESTED(call_o32, O32_FRAMESZ, ra)
51 REG_S s0,O32_FRAMESZ-11*SZREG(sp) 60 REG_S s0,O32_FRAMESZ-11*SZREG(sp)
52 61
53 move jp,a0 62 move jp,a0
54 REG_SUBU s0,a1,O32_FRAMESZ_NEW 63
55 REG_S sp,O32_FRAMESZ_NEW-1*SZREG(s0) 64 move fp,sp
65 beqz a1,0f
66 REG_SUBU fp,a1,O32_NFRAMESZ
670:
68 REG_S sp,O32_NFRAMESZ-1*SZREG(fp)
56 69
57 sll a0,a2,zero 70 sll a0,a2,zero
58 sll a1,a3,zero 71 sll a1,a3,zero
59 sll a2,a4,zero 72 sll a2,a4,zero
60 sll a3,a5,zero 73 sll a3,a5,zero
61 sw a6,0x10(s0) 74 sw a6,4*O32_SZREG(fp)
62 sw a7,0x14(s0) 75 sw a7,5*O32_SZREG(fp)
63 76
64 PTR_LA t0,O32_FRAMESZ(sp) 77 PTR_LA t0,O32_FRAMESZ(sp)
65 PTR_LA t1,0x18(s0) 78 PTR_LA t1,6*O32_SZREG(fp)
66 li t2,O32_ARGC-6 79 li t2,O32_ARGC-6
671: 801:
68 lw t3,(t0) 81 lw t3,(t0)
69 REG_ADDU t0,SZREG 82 REG_ADDU t0,SZREG
70 sw t3,(t1) 83 sw t3,(t1)
71 REG_SUBU t2,1 84 REG_SUBU t2,1
72 REG_ADDU t1,4 85 REG_ADDU t1,O32_SZREG
73 bnez t2,1b 86 bnez t2,1b
74 87
75 move sp,s0 88 move sp,fp
76 89
77 jalr jp 90 jalr jp
78 91
79 REG_L sp,O32_FRAMESZ_NEW-1*SZREG(sp) 92 REG_L sp,O32_NFRAMESZ-1*SZREG(sp)
80 93
81 REG_L s0,O32_FRAMESZ-11*SZREG(sp) 94 REG_L s0,O32_FRAMESZ-11*SZREG(sp)
82 REG_L s1,O32_FRAMESZ-10*SZREG(sp) 95 REG_L s1,O32_FRAMESZ-10*SZREG(sp)
diff --git a/arch/mips/fw/sni/sniprom.c b/arch/mips/fw/sni/sniprom.c
index 2c2cb182af4e..6aa264b9856a 100644
--- a/arch/mips/fw/sni/sniprom.c
+++ b/arch/mips/fw/sni/sniprom.c
@@ -40,7 +40,8 @@
40 40
41#ifdef CONFIG_64BIT 41#ifdef CONFIG_64BIT
42 42
43static u8 o32_stk[16384]; 43/* O32 stack has to be 8-byte aligned. */
44static u64 o32_stk[4096];
44#define O32_STK &o32_stk[sizeof(o32_stk)] 45#define O32_STK &o32_stk[sizeof(o32_stk)]
45 46
46#define __PROM_O32(fun, arg) fun arg __asm__(#fun); \ 47#define __PROM_O32(fun, arg) fun arg __asm__(#fun); \
diff --git a/arch/mips/include/asm/dec/prom.h b/arch/mips/include/asm/dec/prom.h
index c0ead6313845..b59a2103b61a 100644
--- a/arch/mips/include/asm/dec/prom.h
+++ b/arch/mips/include/asm/dec/prom.h
@@ -113,31 +113,31 @@ extern int (*__pmax_close)(int);
113#define __DEC_PROM_O32(fun, arg) fun arg __asm__(#fun); \ 113#define __DEC_PROM_O32(fun, arg) fun arg __asm__(#fun); \
114 __asm__(#fun " = call_o32") 114 __asm__(#fun " = call_o32")
115 115
116int __DEC_PROM_O32(_rex_bootinit, (int (*)(void))); 116int __DEC_PROM_O32(_rex_bootinit, (int (*)(void), void *));
117int __DEC_PROM_O32(_rex_bootread, (int (*)(void))); 117int __DEC_PROM_O32(_rex_bootread, (int (*)(void), void *));
118int __DEC_PROM_O32(_rex_getbitmap, (int (*)(memmap *), memmap *)); 118int __DEC_PROM_O32(_rex_getbitmap, (int (*)(memmap *), void *, memmap *));
119unsigned long *__DEC_PROM_O32(_rex_slot_address, 119unsigned long *__DEC_PROM_O32(_rex_slot_address,
120 (unsigned long *(*)(int), int)); 120 (unsigned long *(*)(int), void *, int));
121void *__DEC_PROM_O32(_rex_gettcinfo, (void *(*)(void))); 121void *__DEC_PROM_O32(_rex_gettcinfo, (void *(*)(void), void *));
122int __DEC_PROM_O32(_rex_getsysid, (int (*)(void))); 122int __DEC_PROM_O32(_rex_getsysid, (int (*)(void), void *));
123void __DEC_PROM_O32(_rex_clear_cache, (void (*)(void))); 123void __DEC_PROM_O32(_rex_clear_cache, (void (*)(void), void *));
124 124
125int __DEC_PROM_O32(_prom_getchar, (int (*)(void))); 125int __DEC_PROM_O32(_prom_getchar, (int (*)(void), void *));
126char *__DEC_PROM_O32(_prom_getenv, (char *(*)(char *), char *)); 126char *__DEC_PROM_O32(_prom_getenv, (char *(*)(char *), void *, char *));
127int __DEC_PROM_O32(_prom_printf, (int (*)(char *, ...), char *, ...)); 127int __DEC_PROM_O32(_prom_printf, (int (*)(char *, ...), void *, char *, ...));
128 128
129 129
130#define rex_bootinit() _rex_bootinit(__rex_bootinit) 130#define rex_bootinit() _rex_bootinit(__rex_bootinit, NULL)
131#define rex_bootread() _rex_bootread(__rex_bootread) 131#define rex_bootread() _rex_bootread(__rex_bootread, NULL)
132#define rex_getbitmap(x) _rex_getbitmap(__rex_getbitmap, x) 132#define rex_getbitmap(x) _rex_getbitmap(__rex_getbitmap, NULL, x)
133#define rex_slot_address(x) _rex_slot_address(__rex_slot_address, x) 133#define rex_slot_address(x) _rex_slot_address(__rex_slot_address, NULL, x)
134#define rex_gettcinfo() _rex_gettcinfo(__rex_gettcinfo) 134#define rex_gettcinfo() _rex_gettcinfo(__rex_gettcinfo, NULL)
135#define rex_getsysid() _rex_getsysid(__rex_getsysid) 135#define rex_getsysid() _rex_getsysid(__rex_getsysid, NULL)
136#define rex_clear_cache() _rex_clear_cache(__rex_clear_cache) 136#define rex_clear_cache() _rex_clear_cache(__rex_clear_cache, NULL)
137 137
138#define prom_getchar() _prom_getchar(__prom_getchar) 138#define prom_getchar() _prom_getchar(__prom_getchar, NULL)
139#define prom_getenv(x) _prom_getenv(__prom_getenv, x) 139#define prom_getenv(x) _prom_getenv(__prom_getenv, NULL, x)
140#define prom_printf(x...) _prom_printf(__prom_printf, x) 140#define prom_printf(x...) _prom_printf(__prom_printf, NULL, x)
141 141
142#else /* !CONFIG_64BIT */ 142#else /* !CONFIG_64BIT */
143 143
diff --git a/arch/mips/include/asm/rm9k-ocd.h b/arch/mips/include/asm/rm9k-ocd.h
deleted file mode 100644
index b0b80d9ecf96..000000000000
--- a/arch/mips/include/asm/rm9k-ocd.h
+++ /dev/null
@@ -1,56 +0,0 @@
1/*
2 * Copyright (C) 2004 by Basler Vision Technologies AG
3 * Author: Thomas Koeller <thomas.koeller@baslerweb.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#if !defined(_ASM_RM9K_OCD_H)
21#define _ASM_RM9K_OCD_H
22
23#include <linux/types.h>
24#include <linux/spinlock.h>
25#include <asm/io.h>
26
27extern volatile void __iomem * const ocd_base;
28extern volatile void __iomem * const titan_base;
29
30#define ocd_addr(__x__) (ocd_base + (__x__))
31#define titan_addr(__x__) (titan_base + (__x__))
32#define scram_addr(__x__) (scram_base + (__x__))
33
34/* OCD register access */
35#define ocd_readl(__offs__) __raw_readl(ocd_addr(__offs__))
36#define ocd_readw(__offs__) __raw_readw(ocd_addr(__offs__))
37#define ocd_readb(__offs__) __raw_readb(ocd_addr(__offs__))
38#define ocd_writel(__val__, __offs__) \
39 __raw_writel((__val__), ocd_addr(__offs__))
40#define ocd_writew(__val__, __offs__) \
41 __raw_writew((__val__), ocd_addr(__offs__))
42#define ocd_writeb(__val__, __offs__) \
43 __raw_writeb((__val__), ocd_addr(__offs__))
44
45/* TITAN register access - 32 bit-wide only */
46#define titan_readl(__offs__) __raw_readl(titan_addr(__offs__))
47#define titan_writel(__val__, __offs__) \
48 __raw_writel((__val__), titan_addr(__offs__))
49
50/* Protect access to shared TITAN registers */
51extern spinlock_t titan_lock;
52extern int titan_irqflags;
53#define lock_titan_regs() spin_lock_irqsave(&titan_lock, titan_irqflags)
54#define unlock_titan_regs() spin_unlock_irqrestore(&titan_lock, titan_irqflags)
55
56#endif /* !defined(_ASM_RM9K_OCD_H) */
diff --git a/arch/mips/include/asm/syscall.h b/arch/mips/include/asm/syscall.h
index c6e9cd2bca8d..17960fe7a8ce 100644
--- a/arch/mips/include/asm/syscall.h
+++ b/arch/mips/include/asm/syscall.h
@@ -133,6 +133,8 @@ static inline int syscall_get_arch(void)
133#ifdef CONFIG_64BIT 133#ifdef CONFIG_64BIT
134 if (!test_thread_flag(TIF_32BIT_REGS)) 134 if (!test_thread_flag(TIF_32BIT_REGS))
135 arch |= __AUDIT_ARCH_64BIT; 135 arch |= __AUDIT_ARCH_64BIT;
136 if (test_thread_flag(TIF_32BIT_ADDR))
137 arch |= __AUDIT_ARCH_CONVENTION_MIPS64_N32;
136#endif 138#endif
137#if defined(__LITTLE_ENDIAN) 139#if defined(__LITTLE_ENDIAN)
138 arch |= __AUDIT_ARCH_LE; 140 arch |= __AUDIT_ARCH_LE;
diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h
index df6e775f3fef..3125797f2a88 100644
--- a/arch/mips/include/uapi/asm/inst.h
+++ b/arch/mips/include/uapi/asm/inst.h
@@ -484,13 +484,13 @@ enum MIPS6e_i8_func {
484 * Damn ... bitfields depend from byteorder :-( 484 * Damn ... bitfields depend from byteorder :-(
485 */ 485 */
486#ifdef __MIPSEB__ 486#ifdef __MIPSEB__
487#define BITFIELD_FIELD(field, more) \ 487#define __BITFIELD_FIELD(field, more) \
488 field; \ 488 field; \
489 more 489 more
490 490
491#elif defined(__MIPSEL__) 491#elif defined(__MIPSEL__)
492 492
493#define BITFIELD_FIELD(field, more) \ 493#define __BITFIELD_FIELD(field, more) \
494 more \ 494 more \
495 field; 495 field;
496 496
@@ -499,112 +499,112 @@ enum MIPS6e_i8_func {
499#endif 499#endif
500 500
501struct j_format { 501struct j_format {
502 BITFIELD_FIELD(unsigned int opcode : 6, /* Jump format */ 502 __BITFIELD_FIELD(unsigned int opcode : 6, /* Jump format */
503 BITFIELD_FIELD(unsigned int target : 26, 503 __BITFIELD_FIELD(unsigned int target : 26,
504 ;)) 504 ;))
505}; 505};
506 506
507struct i_format { /* signed immediate format */ 507struct i_format { /* signed immediate format */
508 BITFIELD_FIELD(unsigned int opcode : 6, 508 __BITFIELD_FIELD(unsigned int opcode : 6,
509 BITFIELD_FIELD(unsigned int rs : 5, 509 __BITFIELD_FIELD(unsigned int rs : 5,
510 BITFIELD_FIELD(unsigned int rt : 5, 510 __BITFIELD_FIELD(unsigned int rt : 5,
511 BITFIELD_FIELD(signed int simmediate : 16, 511 __BITFIELD_FIELD(signed int simmediate : 16,
512 ;)))) 512 ;))))
513}; 513};
514 514
515struct u_format { /* unsigned immediate format */ 515struct u_format { /* unsigned immediate format */
516 BITFIELD_FIELD(unsigned int opcode : 6, 516 __BITFIELD_FIELD(unsigned int opcode : 6,
517 BITFIELD_FIELD(unsigned int rs : 5, 517 __BITFIELD_FIELD(unsigned int rs : 5,
518 BITFIELD_FIELD(unsigned int rt : 5, 518 __BITFIELD_FIELD(unsigned int rt : 5,
519 BITFIELD_FIELD(unsigned int uimmediate : 16, 519 __BITFIELD_FIELD(unsigned int uimmediate : 16,
520 ;)))) 520 ;))))
521}; 521};
522 522
523struct c_format { /* Cache (>= R6000) format */ 523struct c_format { /* Cache (>= R6000) format */
524 BITFIELD_FIELD(unsigned int opcode : 6, 524 __BITFIELD_FIELD(unsigned int opcode : 6,
525 BITFIELD_FIELD(unsigned int rs : 5, 525 __BITFIELD_FIELD(unsigned int rs : 5,
526 BITFIELD_FIELD(unsigned int c_op : 3, 526 __BITFIELD_FIELD(unsigned int c_op : 3,
527 BITFIELD_FIELD(unsigned int cache : 2, 527 __BITFIELD_FIELD(unsigned int cache : 2,
528 BITFIELD_FIELD(unsigned int simmediate : 16, 528 __BITFIELD_FIELD(unsigned int simmediate : 16,
529 ;))))) 529 ;)))))
530}; 530};
531 531
532struct r_format { /* Register format */ 532struct r_format { /* Register format */
533 BITFIELD_FIELD(unsigned int opcode : 6, 533 __BITFIELD_FIELD(unsigned int opcode : 6,
534 BITFIELD_FIELD(unsigned int rs : 5, 534 __BITFIELD_FIELD(unsigned int rs : 5,
535 BITFIELD_FIELD(unsigned int rt : 5, 535 __BITFIELD_FIELD(unsigned int rt : 5,
536 BITFIELD_FIELD(unsigned int rd : 5, 536 __BITFIELD_FIELD(unsigned int rd : 5,
537 BITFIELD_FIELD(unsigned int re : 5, 537 __BITFIELD_FIELD(unsigned int re : 5,
538 BITFIELD_FIELD(unsigned int func : 6, 538 __BITFIELD_FIELD(unsigned int func : 6,
539 ;)))))) 539 ;))))))
540}; 540};
541 541
542struct p_format { /* Performance counter format (R10000) */ 542struct p_format { /* Performance counter format (R10000) */
543 BITFIELD_FIELD(unsigned int opcode : 6, 543 __BITFIELD_FIELD(unsigned int opcode : 6,
544 BITFIELD_FIELD(unsigned int rs : 5, 544 __BITFIELD_FIELD(unsigned int rs : 5,
545 BITFIELD_FIELD(unsigned int rt : 5, 545 __BITFIELD_FIELD(unsigned int rt : 5,
546 BITFIELD_FIELD(unsigned int rd : 5, 546 __BITFIELD_FIELD(unsigned int rd : 5,
547 BITFIELD_FIELD(unsigned int re : 5, 547 __BITFIELD_FIELD(unsigned int re : 5,
548 BITFIELD_FIELD(unsigned int func : 6, 548 __BITFIELD_FIELD(unsigned int func : 6,
549 ;)))))) 549 ;))))))
550}; 550};
551 551
552struct f_format { /* FPU register format */ 552struct f_format { /* FPU register format */
553 BITFIELD_FIELD(unsigned int opcode : 6, 553 __BITFIELD_FIELD(unsigned int opcode : 6,
554 BITFIELD_FIELD(unsigned int : 1, 554 __BITFIELD_FIELD(unsigned int : 1,
555 BITFIELD_FIELD(unsigned int fmt : 4, 555 __BITFIELD_FIELD(unsigned int fmt : 4,
556 BITFIELD_FIELD(unsigned int rt : 5, 556 __BITFIELD_FIELD(unsigned int rt : 5,
557 BITFIELD_FIELD(unsigned int rd : 5, 557 __BITFIELD_FIELD(unsigned int rd : 5,
558 BITFIELD_FIELD(unsigned int re : 5, 558 __BITFIELD_FIELD(unsigned int re : 5,
559 BITFIELD_FIELD(unsigned int func : 6, 559 __BITFIELD_FIELD(unsigned int func : 6,
560 ;))))))) 560 ;)))))))
561}; 561};
562 562
563struct ma_format { /* FPU multiply and add format (MIPS IV) */ 563struct ma_format { /* FPU multiply and add format (MIPS IV) */
564 BITFIELD_FIELD(unsigned int opcode : 6, 564 __BITFIELD_FIELD(unsigned int opcode : 6,
565 BITFIELD_FIELD(unsigned int fr : 5, 565 __BITFIELD_FIELD(unsigned int fr : 5,
566 BITFIELD_FIELD(unsigned int ft : 5, 566 __BITFIELD_FIELD(unsigned int ft : 5,
567 BITFIELD_FIELD(unsigned int fs : 5, 567 __BITFIELD_FIELD(unsigned int fs : 5,
568 BITFIELD_FIELD(unsigned int fd : 5, 568 __BITFIELD_FIELD(unsigned int fd : 5,
569 BITFIELD_FIELD(unsigned int func : 4, 569 __BITFIELD_FIELD(unsigned int func : 4,
570 BITFIELD_FIELD(unsigned int fmt : 2, 570 __BITFIELD_FIELD(unsigned int fmt : 2,
571 ;))))))) 571 ;)))))))
572}; 572};
573 573
574struct b_format { /* BREAK and SYSCALL */ 574struct b_format { /* BREAK and SYSCALL */
575 BITFIELD_FIELD(unsigned int opcode : 6, 575 __BITFIELD_FIELD(unsigned int opcode : 6,
576 BITFIELD_FIELD(unsigned int code : 20, 576 __BITFIELD_FIELD(unsigned int code : 20,
577 BITFIELD_FIELD(unsigned int func : 6, 577 __BITFIELD_FIELD(unsigned int func : 6,
578 ;))) 578 ;)))
579}; 579};
580 580
581struct ps_format { /* MIPS-3D / paired single format */ 581struct ps_format { /* MIPS-3D / paired single format */
582 BITFIELD_FIELD(unsigned int opcode : 6, 582 __BITFIELD_FIELD(unsigned int opcode : 6,
583 BITFIELD_FIELD(unsigned int rs : 5, 583 __BITFIELD_FIELD(unsigned int rs : 5,
584 BITFIELD_FIELD(unsigned int ft : 5, 584 __BITFIELD_FIELD(unsigned int ft : 5,
585 BITFIELD_FIELD(unsigned int fs : 5, 585 __BITFIELD_FIELD(unsigned int fs : 5,
586 BITFIELD_FIELD(unsigned int fd : 5, 586 __BITFIELD_FIELD(unsigned int fd : 5,
587 BITFIELD_FIELD(unsigned int func : 6, 587 __BITFIELD_FIELD(unsigned int func : 6,
588 ;)))))) 588 ;))))))
589}; 589};
590 590
591struct v_format { /* MDMX vector format */ 591struct v_format { /* MDMX vector format */
592 BITFIELD_FIELD(unsigned int opcode : 6, 592 __BITFIELD_FIELD(unsigned int opcode : 6,
593 BITFIELD_FIELD(unsigned int sel : 4, 593 __BITFIELD_FIELD(unsigned int sel : 4,
594 BITFIELD_FIELD(unsigned int fmt : 1, 594 __BITFIELD_FIELD(unsigned int fmt : 1,
595 BITFIELD_FIELD(unsigned int vt : 5, 595 __BITFIELD_FIELD(unsigned int vt : 5,
596 BITFIELD_FIELD(unsigned int vs : 5, 596 __BITFIELD_FIELD(unsigned int vs : 5,
597 BITFIELD_FIELD(unsigned int vd : 5, 597 __BITFIELD_FIELD(unsigned int vd : 5,
598 BITFIELD_FIELD(unsigned int func : 6, 598 __BITFIELD_FIELD(unsigned int func : 6,
599 ;))))))) 599 ;)))))))
600}; 600};
601 601
602struct spec3_format { /* SPEC3 */ 602struct spec3_format { /* SPEC3 */
603 BITFIELD_FIELD(unsigned int opcode:6, 603 __BITFIELD_FIELD(unsigned int opcode:6,
604 BITFIELD_FIELD(unsigned int rs:5, 604 __BITFIELD_FIELD(unsigned int rs:5,
605 BITFIELD_FIELD(unsigned int rt:5, 605 __BITFIELD_FIELD(unsigned int rt:5,
606 BITFIELD_FIELD(signed int simmediate:9, 606 __BITFIELD_FIELD(signed int simmediate:9,
607 BITFIELD_FIELD(unsigned int func:7, 607 __BITFIELD_FIELD(unsigned int func:7,
608 ;))))) 608 ;)))))
609}; 609};
610 610
@@ -616,141 +616,141 @@ struct spec3_format { /* SPEC3 */
616 * if it is MIPS32 instruction re-encoded for use in the microMIPS ASE. 616 * if it is MIPS32 instruction re-encoded for use in the microMIPS ASE.
617 */ 617 */
618struct fb_format { /* FPU branch format (MIPS32) */ 618struct fb_format { /* FPU branch format (MIPS32) */
619 BITFIELD_FIELD(unsigned int opcode : 6, 619 __BITFIELD_FIELD(unsigned int opcode : 6,
620 BITFIELD_FIELD(unsigned int bc : 5, 620 __BITFIELD_FIELD(unsigned int bc : 5,
621 BITFIELD_FIELD(unsigned int cc : 3, 621 __BITFIELD_FIELD(unsigned int cc : 3,
622 BITFIELD_FIELD(unsigned int flag : 2, 622 __BITFIELD_FIELD(unsigned int flag : 2,
623 BITFIELD_FIELD(signed int simmediate : 16, 623 __BITFIELD_FIELD(signed int simmediate : 16,
624 ;))))) 624 ;)))))
625}; 625};
626 626
627struct fp0_format { /* FPU multiply and add format (MIPS32) */ 627struct fp0_format { /* FPU multiply and add format (MIPS32) */
628 BITFIELD_FIELD(unsigned int opcode : 6, 628 __BITFIELD_FIELD(unsigned int opcode : 6,
629 BITFIELD_FIELD(unsigned int fmt : 5, 629 __BITFIELD_FIELD(unsigned int fmt : 5,
630 BITFIELD_FIELD(unsigned int ft : 5, 630 __BITFIELD_FIELD(unsigned int ft : 5,
631 BITFIELD_FIELD(unsigned int fs : 5, 631 __BITFIELD_FIELD(unsigned int fs : 5,
632 BITFIELD_FIELD(unsigned int fd : 5, 632 __BITFIELD_FIELD(unsigned int fd : 5,
633 BITFIELD_FIELD(unsigned int func : 6, 633 __BITFIELD_FIELD(unsigned int func : 6,
634 ;)))))) 634 ;))))))
635}; 635};
636 636
637struct mm_fp0_format { /* FPU multipy and add format (microMIPS) */ 637struct mm_fp0_format { /* FPU multipy and add format (microMIPS) */
638 BITFIELD_FIELD(unsigned int opcode : 6, 638 __BITFIELD_FIELD(unsigned int opcode : 6,
639 BITFIELD_FIELD(unsigned int ft : 5, 639 __BITFIELD_FIELD(unsigned int ft : 5,
640 BITFIELD_FIELD(unsigned int fs : 5, 640 __BITFIELD_FIELD(unsigned int fs : 5,
641 BITFIELD_FIELD(unsigned int fd : 5, 641 __BITFIELD_FIELD(unsigned int fd : 5,
642 BITFIELD_FIELD(unsigned int fmt : 3, 642 __BITFIELD_FIELD(unsigned int fmt : 3,
643 BITFIELD_FIELD(unsigned int op : 2, 643 __BITFIELD_FIELD(unsigned int op : 2,
644 BITFIELD_FIELD(unsigned int func : 6, 644 __BITFIELD_FIELD(unsigned int func : 6,
645 ;))))))) 645 ;)))))))
646}; 646};
647 647
648struct fp1_format { /* FPU mfc1 and cfc1 format (MIPS32) */ 648struct fp1_format { /* FPU mfc1 and cfc1 format (MIPS32) */
649 BITFIELD_FIELD(unsigned int opcode : 6, 649 __BITFIELD_FIELD(unsigned int opcode : 6,
650 BITFIELD_FIELD(unsigned int op : 5, 650 __BITFIELD_FIELD(unsigned int op : 5,
651 BITFIELD_FIELD(unsigned int rt : 5, 651 __BITFIELD_FIELD(unsigned int rt : 5,
652 BITFIELD_FIELD(unsigned int fs : 5, 652 __BITFIELD_FIELD(unsigned int fs : 5,
653 BITFIELD_FIELD(unsigned int fd : 5, 653 __BITFIELD_FIELD(unsigned int fd : 5,
654 BITFIELD_FIELD(unsigned int func : 6, 654 __BITFIELD_FIELD(unsigned int func : 6,
655 ;)))))) 655 ;))))))
656}; 656};
657 657
658struct mm_fp1_format { /* FPU mfc1 and cfc1 format (microMIPS) */ 658struct mm_fp1_format { /* FPU mfc1 and cfc1 format (microMIPS) */
659 BITFIELD_FIELD(unsigned int opcode : 6, 659 __BITFIELD_FIELD(unsigned int opcode : 6,
660 BITFIELD_FIELD(unsigned int rt : 5, 660 __BITFIELD_FIELD(unsigned int rt : 5,
661 BITFIELD_FIELD(unsigned int fs : 5, 661 __BITFIELD_FIELD(unsigned int fs : 5,
662 BITFIELD_FIELD(unsigned int fmt : 2, 662 __BITFIELD_FIELD(unsigned int fmt : 2,
663 BITFIELD_FIELD(unsigned int op : 8, 663 __BITFIELD_FIELD(unsigned int op : 8,
664 BITFIELD_FIELD(unsigned int func : 6, 664 __BITFIELD_FIELD(unsigned int func : 6,
665 ;)))))) 665 ;))))))
666}; 666};
667 667
668struct mm_fp2_format { /* FPU movt and movf format (microMIPS) */ 668struct mm_fp2_format { /* FPU movt and movf format (microMIPS) */
669 BITFIELD_FIELD(unsigned int opcode : 6, 669 __BITFIELD_FIELD(unsigned int opcode : 6,
670 BITFIELD_FIELD(unsigned int fd : 5, 670 __BITFIELD_FIELD(unsigned int fd : 5,
671 BITFIELD_FIELD(unsigned int fs : 5, 671 __BITFIELD_FIELD(unsigned int fs : 5,
672 BITFIELD_FIELD(unsigned int cc : 3, 672 __BITFIELD_FIELD(unsigned int cc : 3,
673 BITFIELD_FIELD(unsigned int zero : 2, 673 __BITFIELD_FIELD(unsigned int zero : 2,
674 BITFIELD_FIELD(unsigned int fmt : 2, 674 __BITFIELD_FIELD(unsigned int fmt : 2,
675 BITFIELD_FIELD(unsigned int op : 3, 675 __BITFIELD_FIELD(unsigned int op : 3,
676 BITFIELD_FIELD(unsigned int func : 6, 676 __BITFIELD_FIELD(unsigned int func : 6,
677 ;)))))))) 677 ;))))))))
678}; 678};
679 679
680struct mm_fp3_format { /* FPU abs and neg format (microMIPS) */ 680struct mm_fp3_format { /* FPU abs and neg format (microMIPS) */
681 BITFIELD_FIELD(unsigned int opcode : 6, 681 __BITFIELD_FIELD(unsigned int opcode : 6,
682 BITFIELD_FIELD(unsigned int rt : 5, 682 __BITFIELD_FIELD(unsigned int rt : 5,
683 BITFIELD_FIELD(unsigned int fs : 5, 683 __BITFIELD_FIELD(unsigned int fs : 5,
684 BITFIELD_FIELD(unsigned int fmt : 3, 684 __BITFIELD_FIELD(unsigned int fmt : 3,
685 BITFIELD_FIELD(unsigned int op : 7, 685 __BITFIELD_FIELD(unsigned int op : 7,
686 BITFIELD_FIELD(unsigned int func : 6, 686 __BITFIELD_FIELD(unsigned int func : 6,
687 ;)))))) 687 ;))))))
688}; 688};
689 689
690struct mm_fp4_format { /* FPU c.cond format (microMIPS) */ 690struct mm_fp4_format { /* FPU c.cond format (microMIPS) */
691 BITFIELD_FIELD(unsigned int opcode : 6, 691 __BITFIELD_FIELD(unsigned int opcode : 6,
692 BITFIELD_FIELD(unsigned int rt : 5, 692 __BITFIELD_FIELD(unsigned int rt : 5,
693 BITFIELD_FIELD(unsigned int fs : 5, 693 __BITFIELD_FIELD(unsigned int fs : 5,
694 BITFIELD_FIELD(unsigned int cc : 3, 694 __BITFIELD_FIELD(unsigned int cc : 3,
695 BITFIELD_FIELD(unsigned int fmt : 3, 695 __BITFIELD_FIELD(unsigned int fmt : 3,
696 BITFIELD_FIELD(unsigned int cond : 4, 696 __BITFIELD_FIELD(unsigned int cond : 4,
697 BITFIELD_FIELD(unsigned int func : 6, 697 __BITFIELD_FIELD(unsigned int func : 6,
698 ;))))))) 698 ;)))))))
699}; 699};
700 700
701struct mm_fp5_format { /* FPU lwxc1 and swxc1 format (microMIPS) */ 701struct mm_fp5_format { /* FPU lwxc1 and swxc1 format (microMIPS) */
702 BITFIELD_FIELD(unsigned int opcode : 6, 702 __BITFIELD_FIELD(unsigned int opcode : 6,
703 BITFIELD_FIELD(unsigned int index : 5, 703 __BITFIELD_FIELD(unsigned int index : 5,
704 BITFIELD_FIELD(unsigned int base : 5, 704 __BITFIELD_FIELD(unsigned int base : 5,
705 BITFIELD_FIELD(unsigned int fd : 5, 705 __BITFIELD_FIELD(unsigned int fd : 5,
706 BITFIELD_FIELD(unsigned int op : 5, 706 __BITFIELD_FIELD(unsigned int op : 5,
707 BITFIELD_FIELD(unsigned int func : 6, 707 __BITFIELD_FIELD(unsigned int func : 6,
708 ;)))))) 708 ;))))))
709}; 709};
710 710
711struct fp6_format { /* FPU madd and msub format (MIPS IV) */ 711struct fp6_format { /* FPU madd and msub format (MIPS IV) */
712 BITFIELD_FIELD(unsigned int opcode : 6, 712 __BITFIELD_FIELD(unsigned int opcode : 6,
713 BITFIELD_FIELD(unsigned int fr : 5, 713 __BITFIELD_FIELD(unsigned int fr : 5,
714 BITFIELD_FIELD(unsigned int ft : 5, 714 __BITFIELD_FIELD(unsigned int ft : 5,
715 BITFIELD_FIELD(unsigned int fs : 5, 715 __BITFIELD_FIELD(unsigned int fs : 5,
716 BITFIELD_FIELD(unsigned int fd : 5, 716 __BITFIELD_FIELD(unsigned int fd : 5,
717 BITFIELD_FIELD(unsigned int func : 6, 717 __BITFIELD_FIELD(unsigned int func : 6,
718 ;)))))) 718 ;))))))
719}; 719};
720 720
721struct mm_fp6_format { /* FPU madd and msub format (microMIPS) */ 721struct mm_fp6_format { /* FPU madd and msub format (microMIPS) */
722 BITFIELD_FIELD(unsigned int opcode : 6, 722 __BITFIELD_FIELD(unsigned int opcode : 6,
723 BITFIELD_FIELD(unsigned int ft : 5, 723 __BITFIELD_FIELD(unsigned int ft : 5,
724 BITFIELD_FIELD(unsigned int fs : 5, 724 __BITFIELD_FIELD(unsigned int fs : 5,
725 BITFIELD_FIELD(unsigned int fd : 5, 725 __BITFIELD_FIELD(unsigned int fd : 5,
726 BITFIELD_FIELD(unsigned int fr : 5, 726 __BITFIELD_FIELD(unsigned int fr : 5,
727 BITFIELD_FIELD(unsigned int func : 6, 727 __BITFIELD_FIELD(unsigned int func : 6,
728 ;)))))) 728 ;))))))
729}; 729};
730 730
731struct mm_i_format { /* Immediate format (microMIPS) */ 731struct mm_i_format { /* Immediate format (microMIPS) */
732 BITFIELD_FIELD(unsigned int opcode : 6, 732 __BITFIELD_FIELD(unsigned int opcode : 6,
733 BITFIELD_FIELD(unsigned int rt : 5, 733 __BITFIELD_FIELD(unsigned int rt : 5,
734 BITFIELD_FIELD(unsigned int rs : 5, 734 __BITFIELD_FIELD(unsigned int rs : 5,
735 BITFIELD_FIELD(signed int simmediate : 16, 735 __BITFIELD_FIELD(signed int simmediate : 16,
736 ;)))) 736 ;))))
737}; 737};
738 738
739struct mm_m_format { /* Multi-word load/store format (microMIPS) */ 739struct mm_m_format { /* Multi-word load/store format (microMIPS) */
740 BITFIELD_FIELD(unsigned int opcode : 6, 740 __BITFIELD_FIELD(unsigned int opcode : 6,
741 BITFIELD_FIELD(unsigned int rd : 5, 741 __BITFIELD_FIELD(unsigned int rd : 5,
742 BITFIELD_FIELD(unsigned int base : 5, 742 __BITFIELD_FIELD(unsigned int base : 5,
743 BITFIELD_FIELD(unsigned int func : 4, 743 __BITFIELD_FIELD(unsigned int func : 4,
744 BITFIELD_FIELD(signed int simmediate : 12, 744 __BITFIELD_FIELD(signed int simmediate : 12,
745 ;))))) 745 ;)))))
746}; 746};
747 747
748struct mm_x_format { /* Scaled indexed load format (microMIPS) */ 748struct mm_x_format { /* Scaled indexed load format (microMIPS) */
749 BITFIELD_FIELD(unsigned int opcode : 6, 749 __BITFIELD_FIELD(unsigned int opcode : 6,
750 BITFIELD_FIELD(unsigned int index : 5, 750 __BITFIELD_FIELD(unsigned int index : 5,
751 BITFIELD_FIELD(unsigned int base : 5, 751 __BITFIELD_FIELD(unsigned int base : 5,
752 BITFIELD_FIELD(unsigned int rd : 5, 752 __BITFIELD_FIELD(unsigned int rd : 5,
753 BITFIELD_FIELD(unsigned int func : 11, 753 __BITFIELD_FIELD(unsigned int func : 11,
754 ;))))) 754 ;)))))
755}; 755};
756 756
@@ -758,51 +758,51 @@ struct mm_x_format { /* Scaled indexed load format (microMIPS) */
758 * microMIPS instruction formats (16-bit length) 758 * microMIPS instruction formats (16-bit length)
759 */ 759 */
760struct mm_b0_format { /* Unconditional branch format (microMIPS) */ 760struct mm_b0_format { /* Unconditional branch format (microMIPS) */
761 BITFIELD_FIELD(unsigned int opcode : 6, 761 __BITFIELD_FIELD(unsigned int opcode : 6,
762 BITFIELD_FIELD(signed int simmediate : 10, 762 __BITFIELD_FIELD(signed int simmediate : 10,
763 BITFIELD_FIELD(unsigned int : 16, /* Ignored */ 763 __BITFIELD_FIELD(unsigned int : 16, /* Ignored */
764 ;))) 764 ;)))
765}; 765};
766 766
767struct mm_b1_format { /* Conditional branch format (microMIPS) */ 767struct mm_b1_format { /* Conditional branch format (microMIPS) */
768 BITFIELD_FIELD(unsigned int opcode : 6, 768 __BITFIELD_FIELD(unsigned int opcode : 6,
769 BITFIELD_FIELD(unsigned int rs : 3, 769 __BITFIELD_FIELD(unsigned int rs : 3,
770 BITFIELD_FIELD(signed int simmediate : 7, 770 __BITFIELD_FIELD(signed int simmediate : 7,
771 BITFIELD_FIELD(unsigned int : 16, /* Ignored */ 771 __BITFIELD_FIELD(unsigned int : 16, /* Ignored */
772 ;)))) 772 ;))))
773}; 773};
774 774
775struct mm16_m_format { /* Multi-word load/store format */ 775struct mm16_m_format { /* Multi-word load/store format */
776 BITFIELD_FIELD(unsigned int opcode : 6, 776 __BITFIELD_FIELD(unsigned int opcode : 6,
777 BITFIELD_FIELD(unsigned int func : 4, 777 __BITFIELD_FIELD(unsigned int func : 4,
778 BITFIELD_FIELD(unsigned int rlist : 2, 778 __BITFIELD_FIELD(unsigned int rlist : 2,
779 BITFIELD_FIELD(unsigned int imm : 4, 779 __BITFIELD_FIELD(unsigned int imm : 4,
780 BITFIELD_FIELD(unsigned int : 16, /* Ignored */ 780 __BITFIELD_FIELD(unsigned int : 16, /* Ignored */
781 ;))))) 781 ;)))))
782}; 782};
783 783
784struct mm16_rb_format { /* Signed immediate format */ 784struct mm16_rb_format { /* Signed immediate format */
785 BITFIELD_FIELD(unsigned int opcode : 6, 785 __BITFIELD_FIELD(unsigned int opcode : 6,
786 BITFIELD_FIELD(unsigned int rt : 3, 786 __BITFIELD_FIELD(unsigned int rt : 3,
787 BITFIELD_FIELD(unsigned int base : 3, 787 __BITFIELD_FIELD(unsigned int base : 3,
788 BITFIELD_FIELD(signed int simmediate : 4, 788 __BITFIELD_FIELD(signed int simmediate : 4,
789 BITFIELD_FIELD(unsigned int : 16, /* Ignored */ 789 __BITFIELD_FIELD(unsigned int : 16, /* Ignored */
790 ;))))) 790 ;)))))
791}; 791};
792 792
793struct mm16_r3_format { /* Load from global pointer format */ 793struct mm16_r3_format { /* Load from global pointer format */
794 BITFIELD_FIELD(unsigned int opcode : 6, 794 __BITFIELD_FIELD(unsigned int opcode : 6,
795 BITFIELD_FIELD(unsigned int rt : 3, 795 __BITFIELD_FIELD(unsigned int rt : 3,
796 BITFIELD_FIELD(signed int simmediate : 7, 796 __BITFIELD_FIELD(signed int simmediate : 7,
797 BITFIELD_FIELD(unsigned int : 16, /* Ignored */ 797 __BITFIELD_FIELD(unsigned int : 16, /* Ignored */
798 ;)))) 798 ;))))
799}; 799};
800 800
801struct mm16_r5_format { /* Load/store from stack pointer format */ 801struct mm16_r5_format { /* Load/store from stack pointer format */
802 BITFIELD_FIELD(unsigned int opcode : 6, 802 __BITFIELD_FIELD(unsigned int opcode : 6,
803 BITFIELD_FIELD(unsigned int rt : 5, 803 __BITFIELD_FIELD(unsigned int rt : 5,
804 BITFIELD_FIELD(signed int simmediate : 5, 804 __BITFIELD_FIELD(signed int simmediate : 5,
805 BITFIELD_FIELD(unsigned int : 16, /* Ignored */ 805 __BITFIELD_FIELD(unsigned int : 16, /* Ignored */
806 ;)))) 806 ;))))
807}; 807};
808 808
@@ -810,57 +810,57 @@ struct mm16_r5_format { /* Load/store from stack pointer format */
810 * MIPS16e instruction formats (16-bit length) 810 * MIPS16e instruction formats (16-bit length)
811 */ 811 */
812struct m16e_rr { 812struct m16e_rr {
813 BITFIELD_FIELD(unsigned int opcode : 5, 813 __BITFIELD_FIELD(unsigned int opcode : 5,
814 BITFIELD_FIELD(unsigned int rx : 3, 814 __BITFIELD_FIELD(unsigned int rx : 3,
815 BITFIELD_FIELD(unsigned int nd : 1, 815 __BITFIELD_FIELD(unsigned int nd : 1,
816 BITFIELD_FIELD(unsigned int l : 1, 816 __BITFIELD_FIELD(unsigned int l : 1,
817 BITFIELD_FIELD(unsigned int ra : 1, 817 __BITFIELD_FIELD(unsigned int ra : 1,
818 BITFIELD_FIELD(unsigned int func : 5, 818 __BITFIELD_FIELD(unsigned int func : 5,
819 ;)))))) 819 ;))))))
820}; 820};
821 821
822struct m16e_jal { 822struct m16e_jal {
823 BITFIELD_FIELD(unsigned int opcode : 5, 823 __BITFIELD_FIELD(unsigned int opcode : 5,
824 BITFIELD_FIELD(unsigned int x : 1, 824 __BITFIELD_FIELD(unsigned int x : 1,
825 BITFIELD_FIELD(unsigned int imm20_16 : 5, 825 __BITFIELD_FIELD(unsigned int imm20_16 : 5,
826 BITFIELD_FIELD(signed int imm25_21 : 5, 826 __BITFIELD_FIELD(signed int imm25_21 : 5,
827 ;)))) 827 ;))))
828}; 828};
829 829
830struct m16e_i64 { 830struct m16e_i64 {
831 BITFIELD_FIELD(unsigned int opcode : 5, 831 __BITFIELD_FIELD(unsigned int opcode : 5,
832 BITFIELD_FIELD(unsigned int func : 3, 832 __BITFIELD_FIELD(unsigned int func : 3,
833 BITFIELD_FIELD(unsigned int imm : 8, 833 __BITFIELD_FIELD(unsigned int imm : 8,
834 ;))) 834 ;)))
835}; 835};
836 836
837struct m16e_ri64 { 837struct m16e_ri64 {
838 BITFIELD_FIELD(unsigned int opcode : 5, 838 __BITFIELD_FIELD(unsigned int opcode : 5,
839 BITFIELD_FIELD(unsigned int func : 3, 839 __BITFIELD_FIELD(unsigned int func : 3,
840 BITFIELD_FIELD(unsigned int ry : 3, 840 __BITFIELD_FIELD(unsigned int ry : 3,
841 BITFIELD_FIELD(unsigned int imm : 5, 841 __BITFIELD_FIELD(unsigned int imm : 5,
842 ;)))) 842 ;))))
843}; 843};
844 844
845struct m16e_ri { 845struct m16e_ri {
846 BITFIELD_FIELD(unsigned int opcode : 5, 846 __BITFIELD_FIELD(unsigned int opcode : 5,
847 BITFIELD_FIELD(unsigned int rx : 3, 847 __BITFIELD_FIELD(unsigned int rx : 3,
848 BITFIELD_FIELD(unsigned int imm : 8, 848 __BITFIELD_FIELD(unsigned int imm : 8,
849 ;))) 849 ;)))
850}; 850};
851 851
852struct m16e_rri { 852struct m16e_rri {
853 BITFIELD_FIELD(unsigned int opcode : 5, 853 __BITFIELD_FIELD(unsigned int opcode : 5,
854 BITFIELD_FIELD(unsigned int rx : 3, 854 __BITFIELD_FIELD(unsigned int rx : 3,
855 BITFIELD_FIELD(unsigned int ry : 3, 855 __BITFIELD_FIELD(unsigned int ry : 3,
856 BITFIELD_FIELD(unsigned int imm : 5, 856 __BITFIELD_FIELD(unsigned int imm : 5,
857 ;)))) 857 ;))))
858}; 858};
859 859
860struct m16e_i8 { 860struct m16e_i8 {
861 BITFIELD_FIELD(unsigned int opcode : 5, 861 __BITFIELD_FIELD(unsigned int opcode : 5,
862 BITFIELD_FIELD(unsigned int func : 3, 862 __BITFIELD_FIELD(unsigned int func : 3,
863 BITFIELD_FIELD(unsigned int imm : 8, 863 __BITFIELD_FIELD(unsigned int imm : 8,
864 ;))) 864 ;)))
865}; 865};
866 866
diff --git a/arch/mips/include/uapi/asm/unistd.h b/arch/mips/include/uapi/asm/unistd.h
index d6e154a9e6a5..2692abb28e36 100644
--- a/arch/mips/include/uapi/asm/unistd.h
+++ b/arch/mips/include/uapi/asm/unistd.h
@@ -371,11 +371,12 @@
371#define __NR_finit_module (__NR_Linux + 348) 371#define __NR_finit_module (__NR_Linux + 348)
372#define __NR_sched_setattr (__NR_Linux + 349) 372#define __NR_sched_setattr (__NR_Linux + 349)
373#define __NR_sched_getattr (__NR_Linux + 350) 373#define __NR_sched_getattr (__NR_Linux + 350)
374#define __NR_renameat2 (__NR_Linux + 351)
374 375
375/* 376/*
376 * Offset of the last Linux o32 flavoured syscall 377 * Offset of the last Linux o32 flavoured syscall
377 */ 378 */
378#define __NR_Linux_syscalls 350 379#define __NR_Linux_syscalls 351
379 380
380#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ 381#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
381 382
@@ -699,11 +700,12 @@
699#define __NR_getdents64 (__NR_Linux + 308) 700#define __NR_getdents64 (__NR_Linux + 308)
700#define __NR_sched_setattr (__NR_Linux + 309) 701#define __NR_sched_setattr (__NR_Linux + 309)
701#define __NR_sched_getattr (__NR_Linux + 310) 702#define __NR_sched_getattr (__NR_Linux + 310)
703#define __NR_renameat2 (__NR_Linux + 311)
702 704
703/* 705/*
704 * Offset of the last Linux 64-bit flavoured syscall 706 * Offset of the last Linux 64-bit flavoured syscall
705 */ 707 */
706#define __NR_Linux_syscalls 310 708#define __NR_Linux_syscalls 311
707 709
708#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ 710#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
709 711
@@ -1031,11 +1033,12 @@
1031#define __NR_finit_module (__NR_Linux + 312) 1033#define __NR_finit_module (__NR_Linux + 312)
1032#define __NR_sched_setattr (__NR_Linux + 313) 1034#define __NR_sched_setattr (__NR_Linux + 313)
1033#define __NR_sched_getattr (__NR_Linux + 314) 1035#define __NR_sched_getattr (__NR_Linux + 314)
1036#define __NR_renameat2 (__NR_Linux + 315)
1034 1037
1035/* 1038/*
1036 * Offset of the last N32 flavoured syscall 1039 * Offset of the last N32 flavoured syscall
1037 */ 1040 */
1038#define __NR_Linux_syscalls 314 1041#define __NR_Linux_syscalls 315
1039 1042
1040#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ 1043#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
1041 1044
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index e40971b51d2f..037a44d962f3 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -124,14 +124,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
124 seq_printf(m, "kscratch registers\t: %d\n", 124 seq_printf(m, "kscratch registers\t: %d\n",
125 hweight8(cpu_data[n].kscratch_mask)); 125 hweight8(cpu_data[n].kscratch_mask));
126 seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core); 126 seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core);
127#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC) 127
128 if (cpu_has_mipsmt) {
129 seq_printf(m, "VPE\t\t\t: %d\n", cpu_data[n].vpe_id);
130#if defined(CONFIG_MIPS_MT_SMTC)
131 seq_printf(m, "TC\t\t\t: %d\n", cpu_data[n].tc_id);
132#endif
133 }
134#endif
135 sprintf(fmt, "VCE%%c exceptions\t\t: %s\n", 128 sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
136 cpu_has_vce ? "%u" : "not available"); 129 cpu_has_vce ? "%u" : "not available");
137 seq_printf(m, fmt, 'D', vced_count); 130 seq_printf(m, fmt, 'D', vced_count);
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index fdc70b400442..3245474f19d5 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -577,3 +577,4 @@ EXPORT(sys_call_table)
577 PTR sys_finit_module 577 PTR sys_finit_module
578 PTR sys_sched_setattr 578 PTR sys_sched_setattr
579 PTR sys_sched_getattr /* 4350 */ 579 PTR sys_sched_getattr /* 4350 */
580 PTR sys_renameat2
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index dd99c3285aea..be2fedd4ae33 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -430,4 +430,5 @@ EXPORT(sys_call_table)
430 PTR sys_getdents64 430 PTR sys_getdents64
431 PTR sys_sched_setattr 431 PTR sys_sched_setattr
432 PTR sys_sched_getattr /* 5310 */ 432 PTR sys_sched_getattr /* 5310 */
433 PTR sys_renameat2
433 .size sys_call_table,.-sys_call_table 434 .size sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index f68d2f4f0090..c1dbcda4b816 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -423,4 +423,5 @@ EXPORT(sysn32_call_table)
423 PTR sys_finit_module 423 PTR sys_finit_module
424 PTR sys_sched_setattr 424 PTR sys_sched_setattr
425 PTR sys_sched_getattr 425 PTR sys_sched_getattr
426 PTR sys_renameat2 /* 6315 */
426 .size sysn32_call_table,.-sysn32_call_table 427 .size sysn32_call_table,.-sysn32_call_table
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 70f6acecd928..f1343ccd7ed7 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -556,4 +556,5 @@ EXPORT(sys32_call_table)
556 PTR sys_finit_module 556 PTR sys_finit_module
557 PTR sys_sched_setattr 557 PTR sys_sched_setattr
558 PTR sys_sched_getattr /* 4350 */ 558 PTR sys_sched_getattr /* 4350 */
559 PTR sys_renameat2
559 .size sys32_call_table,.-sys32_call_table 560 .size sys32_call_table,.-sys32_call_table
diff --git a/arch/mips/lantiq/dts/easy50712.dts b/arch/mips/lantiq/dts/easy50712.dts
index fac1f5b178eb..143b8a37b5e4 100644
--- a/arch/mips/lantiq/dts/easy50712.dts
+++ b/arch/mips/lantiq/dts/easy50712.dts
@@ -8,6 +8,7 @@
8 }; 8 };
9 9
10 memory@0 { 10 memory@0 {
11 device_type = "memory";
11 reg = <0x0 0x2000000>; 12 reg = <0x0 0x2000000>;
12 }; 13 };
13 14
diff --git a/arch/mips/lib/csum_partial.S b/arch/mips/lib/csum_partial.S
index 2e4825e48388..9901237563c5 100644
--- a/arch/mips/lib/csum_partial.S
+++ b/arch/mips/lib/csum_partial.S
@@ -56,14 +56,20 @@
56#define UNIT(unit) ((unit)*NBYTES) 56#define UNIT(unit) ((unit)*NBYTES)
57 57
58#define ADDC(sum,reg) \ 58#define ADDC(sum,reg) \
59 .set push; \
60 .set noat; \
59 ADD sum, reg; \ 61 ADD sum, reg; \
60 sltu v1, sum, reg; \ 62 sltu v1, sum, reg; \
61 ADD sum, v1; \ 63 ADD sum, v1; \
64 .set pop
62 65
63#define ADDC32(sum,reg) \ 66#define ADDC32(sum,reg) \
67 .set push; \
68 .set noat; \
64 addu sum, reg; \ 69 addu sum, reg; \
65 sltu v1, sum, reg; \ 70 sltu v1, sum, reg; \
66 addu sum, v1; \ 71 addu sum, v1; \
72 .set pop
67 73
68#define CSUM_BIGCHUNK1(src, offset, sum, _t0, _t1, _t2, _t3) \ 74#define CSUM_BIGCHUNK1(src, offset, sum, _t0, _t1, _t2, _t3) \
69 LOAD _t0, (offset + UNIT(0))(src); \ 75 LOAD _t0, (offset + UNIT(0))(src); \
@@ -710,6 +716,8 @@ LEAF(csum_partial)
710 ADDC(sum, t2) 716 ADDC(sum, t2)
711.Ldone\@: 717.Ldone\@:
712 /* fold checksum */ 718 /* fold checksum */
719 .set push
720 .set noat
713#ifdef USE_DOUBLE 721#ifdef USE_DOUBLE
714 dsll32 v1, sum, 0 722 dsll32 v1, sum, 0
715 daddu sum, v1 723 daddu sum, v1
@@ -732,6 +740,7 @@ LEAF(csum_partial)
732 or sum, sum, t0 740 or sum, sum, t0
7331: 7411:
734#endif 742#endif
743 .set pop
735 .set reorder 744 .set reorder
736 ADDC32(sum, psum) 745 ADDC32(sum, psum)
737 jr ra 746 jr ra
diff --git a/arch/mips/lib/delay.c b/arch/mips/lib/delay.c
index 44713af15a62..705cfb7c1a74 100644
--- a/arch/mips/lib/delay.c
+++ b/arch/mips/lib/delay.c
@@ -6,7 +6,7 @@
6 * Copyright (C) 1994 by Waldorf Electronics 6 * Copyright (C) 1994 by Waldorf Electronics
7 * Copyright (C) 1995 - 2000, 01, 03 by Ralf Baechle 7 * Copyright (C) 1995 - 2000, 01, 03 by Ralf Baechle
8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
9 * Copyright (C) 2007 Maciej W. Rozycki 9 * Copyright (C) 2007, 2014 Maciej W. Rozycki
10 */ 10 */
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/param.h> 12#include <linux/param.h>
@@ -15,6 +15,12 @@
15#include <asm/compiler.h> 15#include <asm/compiler.h>
16#include <asm/war.h> 16#include <asm/war.h>
17 17
18#ifndef CONFIG_CPU_DADDI_WORKAROUNDS
19#define GCC_DADDI_IMM_ASM() "I"
20#else
21#define GCC_DADDI_IMM_ASM() "r"
22#endif
23
18void __delay(unsigned long loops) 24void __delay(unsigned long loops)
19{ 25{
20 __asm__ __volatile__ ( 26 __asm__ __volatile__ (
@@ -22,13 +28,13 @@ void __delay(unsigned long loops)
22 " .align 3 \n" 28 " .align 3 \n"
23 "1: bnez %0, 1b \n" 29 "1: bnez %0, 1b \n"
24#if BITS_PER_LONG == 32 30#if BITS_PER_LONG == 32
25 " subu %0, 1 \n" 31 " subu %0, %1 \n"
26#else 32#else
27 " dsubu %0, 1 \n" 33 " dsubu %0, %1 \n"
28#endif 34#endif
29 " .set reorder \n" 35 " .set reorder \n"
30 : "=r" (loops) 36 : "=r" (loops)
31 : "0" (loops)); 37 : GCC_DADDI_IMM_ASM() (1), "0" (loops));
32} 38}
33EXPORT_SYMBOL(__delay); 39EXPORT_SYMBOL(__delay);
34 40
diff --git a/arch/mips/lib/strncpy_user.S b/arch/mips/lib/strncpy_user.S
index d3301cd1e9a5..3c32baf8b494 100644
--- a/arch/mips/lib/strncpy_user.S
+++ b/arch/mips/lib/strncpy_user.S
@@ -35,7 +35,6 @@ LEAF(__strncpy_from_\func\()_asm)
35 bnez v0, .Lfault\@ 35 bnez v0, .Lfault\@
36 36
37FEXPORT(__strncpy_from_\func\()_nocheck_asm) 37FEXPORT(__strncpy_from_\func\()_nocheck_asm)
38 .set noreorder
39 move t0, zero 38 move t0, zero
40 move v1, a1 39 move v1, a1
41.ifeqs "\func","kernel" 40.ifeqs "\func","kernel"
@@ -45,21 +44,21 @@ FEXPORT(__strncpy_from_\func\()_nocheck_asm)
45.endif 44.endif
46 PTR_ADDIU v1, 1 45 PTR_ADDIU v1, 1
47 R10KCBARRIER(0(ra)) 46 R10KCBARRIER(0(ra))
47 sb v0, (a0)
48 beqz v0, 2f 48 beqz v0, 2f
49 sb v0, (a0)
50 PTR_ADDIU t0, 1 49 PTR_ADDIU t0, 1
50 PTR_ADDIU a0, 1
51 bne t0, a2, 1b 51 bne t0, a2, 1b
52 PTR_ADDIU a0, 1
532: PTR_ADDU v0, a1, t0 522: PTR_ADDU v0, a1, t0
54 xor v0, a1 53 xor v0, a1
55 bltz v0, .Lfault\@ 54 bltz v0, .Lfault\@
56 nop 55 move v0, t0
57 jr ra # return n 56 jr ra # return n
58 move v0, t0
59 END(__strncpy_from_\func\()_asm) 57 END(__strncpy_from_\func\()_asm)
60 58
61.Lfault\@: jr ra 59.Lfault\@:
62 li v0, -EFAULT 60 li v0, -EFAULT
61 jr ra
63 62
64 .section __ex_table,"a" 63 .section __ex_table,"a"
65 PTR 1b, .Lfault\@ 64 PTR 1b, .Lfault\@
diff --git a/arch/mips/loongson/Kconfig b/arch/mips/loongson/Kconfig
index 7397be226a06..603d79a95f47 100644
--- a/arch/mips/loongson/Kconfig
+++ b/arch/mips/loongson/Kconfig
@@ -64,7 +64,6 @@ config LEMOTE_MACH3A
64 bool "Lemote Loongson 3A family machines" 64 bool "Lemote Loongson 3A family machines"
65 select ARCH_SPARSEMEM_ENABLE 65 select ARCH_SPARSEMEM_ENABLE
66 select GENERIC_ISA_DMA_SUPPORT_BROKEN 66 select GENERIC_ISA_DMA_SUPPORT_BROKEN
67 select GENERIC_HARDIRQS_NO__DO_IRQ
68 select BOOT_ELF32 67 select BOOT_ELF32
69 select BOARD_SCACHE 68 select BOARD_SCACHE
70 select CSRC_R4K 69 select CSRC_R4K
diff --git a/arch/mips/loongson/lemote-2f/clock.c b/arch/mips/loongson/lemote-2f/clock.c
index e1f427f4f5f3..67dd94ef28e6 100644
--- a/arch/mips/loongson/lemote-2f/clock.c
+++ b/arch/mips/loongson/lemote-2f/clock.c
@@ -91,6 +91,7 @@ EXPORT_SYMBOL(clk_put);
91 91
92int clk_set_rate(struct clk *clk, unsigned long rate) 92int clk_set_rate(struct clk *clk, unsigned long rate)
93{ 93{
94 unsigned int rate_khz = rate / 1000;
94 int ret = 0; 95 int ret = 0;
95 int regval; 96 int regval;
96 int i; 97 int i;
@@ -111,10 +112,10 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
111 if (loongson2_clockmod_table[i].frequency == 112 if (loongson2_clockmod_table[i].frequency ==
112 CPUFREQ_ENTRY_INVALID) 113 CPUFREQ_ENTRY_INVALID)
113 continue; 114 continue;
114 if (rate == loongson2_clockmod_table[i].frequency) 115 if (rate_khz == loongson2_clockmod_table[i].frequency)
115 break; 116 break;
116 } 117 }
117 if (rate != loongson2_clockmod_table[i].frequency) 118 if (rate_khz != loongson2_clockmod_table[i].frequency)
118 return -ENOTSUPP; 119 return -ENOTSUPP;
119 120
120 clk->rate = rate; 121 clk->rate = rate;
diff --git a/arch/mips/mm/tlb-funcs.S b/arch/mips/mm/tlb-funcs.S
index 30a494db99c2..a5427c6e9757 100644
--- a/arch/mips/mm/tlb-funcs.S
+++ b/arch/mips/mm/tlb-funcs.S
@@ -16,8 +16,10 @@
16 16
17#define FASTPATH_SIZE 128 17#define FASTPATH_SIZE 128
18 18
19EXPORT(tlbmiss_handler_setup_pgd_start)
19LEAF(tlbmiss_handler_setup_pgd) 20LEAF(tlbmiss_handler_setup_pgd)
20 .space 16 * 4 211: j 1b /* Dummy, will be replaced. */
22 .space 64
21END(tlbmiss_handler_setup_pgd) 23END(tlbmiss_handler_setup_pgd)
22EXPORT(tlbmiss_handler_setup_pgd_end) 24EXPORT(tlbmiss_handler_setup_pgd_end)
23 25
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index ee88367ab3ad..f99ec587b151 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -1422,16 +1422,17 @@ static void build_r4000_tlb_refill_handler(void)
1422extern u32 handle_tlbl[], handle_tlbl_end[]; 1422extern u32 handle_tlbl[], handle_tlbl_end[];
1423extern u32 handle_tlbs[], handle_tlbs_end[]; 1423extern u32 handle_tlbs[], handle_tlbs_end[];
1424extern u32 handle_tlbm[], handle_tlbm_end[]; 1424extern u32 handle_tlbm[], handle_tlbm_end[];
1425extern u32 tlbmiss_handler_setup_pgd[], tlbmiss_handler_setup_pgd_end[]; 1425extern u32 tlbmiss_handler_setup_pgd_start[], tlbmiss_handler_setup_pgd[];
1426extern u32 tlbmiss_handler_setup_pgd_end[];
1426 1427
1427static void build_setup_pgd(void) 1428static void build_setup_pgd(void)
1428{ 1429{
1429 const int a0 = 4; 1430 const int a0 = 4;
1430 const int __maybe_unused a1 = 5; 1431 const int __maybe_unused a1 = 5;
1431 const int __maybe_unused a2 = 6; 1432 const int __maybe_unused a2 = 6;
1432 u32 *p = tlbmiss_handler_setup_pgd; 1433 u32 *p = tlbmiss_handler_setup_pgd_start;
1433 const int tlbmiss_handler_setup_pgd_size = 1434 const int tlbmiss_handler_setup_pgd_size =
1434 tlbmiss_handler_setup_pgd_end - tlbmiss_handler_setup_pgd; 1435 tlbmiss_handler_setup_pgd_end - tlbmiss_handler_setup_pgd_start;
1435#ifndef CONFIG_MIPS_PGD_C0_CONTEXT 1436#ifndef CONFIG_MIPS_PGD_C0_CONTEXT
1436 long pgdc = (long)pgd_current; 1437 long pgdc = (long)pgd_current;
1437#endif 1438#endif
diff --git a/arch/mips/ralink/dts/mt7620a_eval.dts b/arch/mips/ralink/dts/mt7620a_eval.dts
index 35eb874ab7f1..709f58132f5c 100644
--- a/arch/mips/ralink/dts/mt7620a_eval.dts
+++ b/arch/mips/ralink/dts/mt7620a_eval.dts
@@ -7,6 +7,7 @@
7 model = "Ralink MT7620A evaluation board"; 7 model = "Ralink MT7620A evaluation board";
8 8
9 memory@0 { 9 memory@0 {
10 device_type = "memory";
10 reg = <0x0 0x2000000>; 11 reg = <0x0 0x2000000>;
11 }; 12 };
12 13
diff --git a/arch/mips/ralink/dts/rt2880_eval.dts b/arch/mips/ralink/dts/rt2880_eval.dts
index 322d7002595b..0a685db093d4 100644
--- a/arch/mips/ralink/dts/rt2880_eval.dts
+++ b/arch/mips/ralink/dts/rt2880_eval.dts
@@ -7,6 +7,7 @@
7 model = "Ralink RT2880 evaluation board"; 7 model = "Ralink RT2880 evaluation board";
8 8
9 memory@0 { 9 memory@0 {
10 device_type = "memory";
10 reg = <0x8000000 0x2000000>; 11 reg = <0x8000000 0x2000000>;
11 }; 12 };
12 13
diff --git a/arch/mips/ralink/dts/rt3052_eval.dts b/arch/mips/ralink/dts/rt3052_eval.dts
index 0ac73ea28198..ec9e9a035541 100644
--- a/arch/mips/ralink/dts/rt3052_eval.dts
+++ b/arch/mips/ralink/dts/rt3052_eval.dts
@@ -7,6 +7,7 @@
7 model = "Ralink RT3052 evaluation board"; 7 model = "Ralink RT3052 evaluation board";
8 8
9 memory@0 { 9 memory@0 {
10 device_type = "memory";
10 reg = <0x0 0x2000000>; 11 reg = <0x0 0x2000000>;
11 }; 12 };
12 13
diff --git a/arch/mips/ralink/dts/rt3883_eval.dts b/arch/mips/ralink/dts/rt3883_eval.dts
index 2fa6b330bf4f..e8df21a5d10d 100644
--- a/arch/mips/ralink/dts/rt3883_eval.dts
+++ b/arch/mips/ralink/dts/rt3883_eval.dts
@@ -7,6 +7,7 @@
7 model = "Ralink RT3883 evaluation board"; 7 model = "Ralink RT3883 evaluation board";
8 8
9 memory@0 { 9 memory@0 {
10 device_type = "memory";
10 reg = <0x0 0x2000000>; 11 reg = <0x0 0x2000000>;
11 }; 12 };
12 13
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index 1faefed32749..108d48e652af 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -22,6 +22,7 @@ config PARISC
22 select GENERIC_SMP_IDLE_THREAD 22 select GENERIC_SMP_IDLE_THREAD
23 select GENERIC_STRNCPY_FROM_USER 23 select GENERIC_STRNCPY_FROM_USER
24 select SYSCTL_ARCH_UNALIGN_ALLOW 24 select SYSCTL_ARCH_UNALIGN_ALLOW
25 select SYSCTL_EXCEPTION_TRACE
25 select HAVE_MOD_ARCH_SPECIFIC 26 select HAVE_MOD_ARCH_SPECIFIC
26 select VIRT_TO_BUS 27 select VIRT_TO_BUS
27 select MODULES_USE_ELF_RELA 28 select MODULES_USE_ELF_RELA
diff --git a/arch/parisc/include/asm/processor.h b/arch/parisc/include/asm/processor.h
index 198a86feb574..d951c9681ab3 100644
--- a/arch/parisc/include/asm/processor.h
+++ b/arch/parisc/include/asm/processor.h
@@ -55,6 +55,11 @@
55#define STACK_TOP TASK_SIZE 55#define STACK_TOP TASK_SIZE
56#define STACK_TOP_MAX DEFAULT_TASK_SIZE 56#define STACK_TOP_MAX DEFAULT_TASK_SIZE
57 57
58/* Allow bigger stacks for 64-bit processes */
59#define STACK_SIZE_MAX (USER_WIDE_MODE \
60 ? (1 << 30) /* 1 GB */ \
61 : (CONFIG_MAX_STACK_SIZE_MB*1024*1024))
62
58#endif 63#endif
59 64
60#ifndef __ASSEMBLY__ 65#ifndef __ASSEMBLY__
diff --git a/arch/parisc/include/uapi/asm/unistd.h b/arch/parisc/include/uapi/asm/unistd.h
index 265ae5190b0a..47e0e21d2272 100644
--- a/arch/parisc/include/uapi/asm/unistd.h
+++ b/arch/parisc/include/uapi/asm/unistd.h
@@ -829,8 +829,9 @@
829#define __NR_sched_setattr (__NR_Linux + 334) 829#define __NR_sched_setattr (__NR_Linux + 334)
830#define __NR_sched_getattr (__NR_Linux + 335) 830#define __NR_sched_getattr (__NR_Linux + 335)
831#define __NR_utimes (__NR_Linux + 336) 831#define __NR_utimes (__NR_Linux + 336)
832#define __NR_renameat2 (__NR_Linux + 337)
832 833
833#define __NR_Linux_syscalls (__NR_utimes + 1) 834#define __NR_Linux_syscalls (__NR_renameat2 + 1)
834 835
835 836
836#define __IGNORE_select /* newselect */ 837#define __IGNORE_select /* newselect */
diff --git a/arch/parisc/kernel/sys_parisc.c b/arch/parisc/kernel/sys_parisc.c
index 31ffa9b55322..e1ffea2f9a0b 100644
--- a/arch/parisc/kernel/sys_parisc.c
+++ b/arch/parisc/kernel/sys_parisc.c
@@ -72,10 +72,10 @@ static unsigned long mmap_upper_limit(void)
72{ 72{
73 unsigned long stack_base; 73 unsigned long stack_base;
74 74
75 /* Limit stack size to 1GB - see setup_arg_pages() in fs/exec.c */ 75 /* Limit stack size - see setup_arg_pages() in fs/exec.c */
76 stack_base = rlimit_max(RLIMIT_STACK); 76 stack_base = rlimit_max(RLIMIT_STACK);
77 if (stack_base > (1 << 30)) 77 if (stack_base > STACK_SIZE_MAX)
78 stack_base = 1 << 30; 78 stack_base = STACK_SIZE_MAX;
79 79
80 return PAGE_ALIGN(STACK_TOP - stack_base); 80 return PAGE_ALIGN(STACK_TOP - stack_base);
81} 81}
diff --git a/arch/parisc/kernel/syscall.S b/arch/parisc/kernel/syscall.S
index a63bb179f79a..838786011037 100644
--- a/arch/parisc/kernel/syscall.S
+++ b/arch/parisc/kernel/syscall.S
@@ -589,10 +589,13 @@ cas_nocontend:
589# endif 589# endif
590/* ENABLE_LWS_DEBUG */ 590/* ENABLE_LWS_DEBUG */
591 591
592 rsm PSW_SM_I, %r0 /* Disable interrupts */
593 /* COW breaks can cause contention on UP systems */
592 LDCW 0(%sr2,%r20), %r28 /* Try to acquire the lock */ 594 LDCW 0(%sr2,%r20), %r28 /* Try to acquire the lock */
593 cmpb,<>,n %r0, %r28, cas_action /* Did we get it? */ 595 cmpb,<>,n %r0, %r28, cas_action /* Did we get it? */
594cas_wouldblock: 596cas_wouldblock:
595 ldo 2(%r0), %r28 /* 2nd case */ 597 ldo 2(%r0), %r28 /* 2nd case */
598 ssm PSW_SM_I, %r0
596 b lws_exit /* Contended... */ 599 b lws_exit /* Contended... */
597 ldo -EAGAIN(%r0), %r21 /* Spin in userspace */ 600 ldo -EAGAIN(%r0), %r21 /* Spin in userspace */
598 601
@@ -619,15 +622,17 @@ cas_action:
619 stw %r1, 4(%sr2,%r20) 622 stw %r1, 4(%sr2,%r20)
620#endif 623#endif
621 /* The load and store could fail */ 624 /* The load and store could fail */
6221: ldw 0(%sr3,%r26), %r28 6251: ldw,ma 0(%sr3,%r26), %r28
623 sub,<> %r28, %r25, %r0 626 sub,<> %r28, %r25, %r0
6242: stw %r24, 0(%sr3,%r26) 6272: stw,ma %r24, 0(%sr3,%r26)
625 /* Free lock */ 628 /* Free lock */
626 stw %r20, 0(%sr2,%r20) 629 stw,ma %r20, 0(%sr2,%r20)
627#if ENABLE_LWS_DEBUG 630#if ENABLE_LWS_DEBUG
628 /* Clear thread register indicator */ 631 /* Clear thread register indicator */
629 stw %r0, 4(%sr2,%r20) 632 stw %r0, 4(%sr2,%r20)
630#endif 633#endif
634 /* Enable interrupts */
635 ssm PSW_SM_I, %r0
631 /* Return to userspace, set no error */ 636 /* Return to userspace, set no error */
632 b lws_exit 637 b lws_exit
633 copy %r0, %r21 638 copy %r0, %r21
@@ -639,6 +644,7 @@ cas_action:
639#if ENABLE_LWS_DEBUG 644#if ENABLE_LWS_DEBUG
640 stw %r0, 4(%sr2,%r20) 645 stw %r0, 4(%sr2,%r20)
641#endif 646#endif
647 ssm PSW_SM_I, %r0
642 b lws_exit 648 b lws_exit
643 ldo -EFAULT(%r0),%r21 /* set errno */ 649 ldo -EFAULT(%r0),%r21 /* set errno */
644 nop 650 nop
diff --git a/arch/parisc/kernel/syscall_table.S b/arch/parisc/kernel/syscall_table.S
index 83ead0ea127d..f1432da7b4c0 100644
--- a/arch/parisc/kernel/syscall_table.S
+++ b/arch/parisc/kernel/syscall_table.S
@@ -432,6 +432,7 @@
432 ENTRY_SAME(sched_setattr) 432 ENTRY_SAME(sched_setattr)
433 ENTRY_SAME(sched_getattr) /* 335 */ 433 ENTRY_SAME(sched_getattr) /* 335 */
434 ENTRY_COMP(utimes) 434 ENTRY_COMP(utimes)
435 ENTRY_COMP(renameat2)
435 436
436 /* Nothing yet */ 437 /* Nothing yet */
437 438
diff --git a/arch/parisc/kernel/traps.c b/arch/parisc/kernel/traps.c
index 1cd1d0c83b6d..47ee620d15d2 100644
--- a/arch/parisc/kernel/traps.c
+++ b/arch/parisc/kernel/traps.c
@@ -25,6 +25,7 @@
25#include <linux/interrupt.h> 25#include <linux/interrupt.h>
26#include <linux/console.h> 26#include <linux/console.h>
27#include <linux/bug.h> 27#include <linux/bug.h>
28#include <linux/ratelimit.h>
28 29
29#include <asm/assembly.h> 30#include <asm/assembly.h>
30#include <asm/uaccess.h> 31#include <asm/uaccess.h>
@@ -42,9 +43,6 @@
42 43
43#include "../math-emu/math-emu.h" /* for handle_fpe() */ 44#include "../math-emu/math-emu.h" /* for handle_fpe() */
44 45
45#define PRINT_USER_FAULTS /* (turn this on if you want user faults to be */
46 /* dumped to the console via printk) */
47
48#if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK) 46#if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK)
49DEFINE_SPINLOCK(pa_dbit_lock); 47DEFINE_SPINLOCK(pa_dbit_lock);
50#endif 48#endif
@@ -160,6 +158,17 @@ void show_regs(struct pt_regs *regs)
160 } 158 }
161} 159}
162 160
161static DEFINE_RATELIMIT_STATE(_hppa_rs,
162 DEFAULT_RATELIMIT_INTERVAL, DEFAULT_RATELIMIT_BURST);
163
164#define parisc_printk_ratelimited(critical, regs, fmt, ...) { \
165 if ((critical || show_unhandled_signals) && __ratelimit(&_hppa_rs)) { \
166 printk(fmt, ##__VA_ARGS__); \
167 show_regs(regs); \
168 } \
169}
170
171
163static void do_show_stack(struct unwind_frame_info *info) 172static void do_show_stack(struct unwind_frame_info *info)
164{ 173{
165 int i = 1; 174 int i = 1;
@@ -229,12 +238,10 @@ void die_if_kernel(char *str, struct pt_regs *regs, long err)
229 if (err == 0) 238 if (err == 0)
230 return; /* STFU */ 239 return; /* STFU */
231 240
232 printk(KERN_CRIT "%s (pid %d): %s (code %ld) at " RFMT "\n", 241 parisc_printk_ratelimited(1, regs,
242 KERN_CRIT "%s (pid %d): %s (code %ld) at " RFMT "\n",
233 current->comm, task_pid_nr(current), str, err, regs->iaoq[0]); 243 current->comm, task_pid_nr(current), str, err, regs->iaoq[0]);
234#ifdef PRINT_USER_FAULTS 244
235 /* XXX for debugging only */
236 show_regs(regs);
237#endif
238 return; 245 return;
239 } 246 }
240 247
@@ -321,14 +328,11 @@ static void handle_break(struct pt_regs *regs)
321 (tt == BUG_TRAP_TYPE_NONE) ? 9 : 0); 328 (tt == BUG_TRAP_TYPE_NONE) ? 9 : 0);
322 } 329 }
323 330
324#ifdef PRINT_USER_FAULTS 331 if (unlikely(iir != GDB_BREAK_INSN))
325 if (unlikely(iir != GDB_BREAK_INSN)) { 332 parisc_printk_ratelimited(0, regs,
326 printk(KERN_DEBUG "break %d,%d: pid=%d command='%s'\n", 333 KERN_DEBUG "break %d,%d: pid=%d command='%s'\n",
327 iir & 31, (iir>>13) & ((1<<13)-1), 334 iir & 31, (iir>>13) & ((1<<13)-1),
328 task_pid_nr(current), current->comm); 335 task_pid_nr(current), current->comm);
329 show_regs(regs);
330 }
331#endif
332 336
333 /* send standard GDB signal */ 337 /* send standard GDB signal */
334 handle_gdb_break(regs, TRAP_BRKPT); 338 handle_gdb_break(regs, TRAP_BRKPT);
@@ -758,11 +762,9 @@ void notrace handle_interruption(int code, struct pt_regs *regs)
758 762
759 default: 763 default:
760 if (user_mode(regs)) { 764 if (user_mode(regs)) {
761#ifdef PRINT_USER_FAULTS 765 parisc_printk_ratelimited(0, regs, KERN_DEBUG
762 printk(KERN_DEBUG "\nhandle_interruption() pid=%d command='%s'\n", 766 "handle_interruption() pid=%d command='%s'\n",
763 task_pid_nr(current), current->comm); 767 task_pid_nr(current), current->comm);
764 show_regs(regs);
765#endif
766 /* SIGBUS, for lack of a better one. */ 768 /* SIGBUS, for lack of a better one. */
767 si.si_signo = SIGBUS; 769 si.si_signo = SIGBUS;
768 si.si_code = BUS_OBJERR; 770 si.si_code = BUS_OBJERR;
@@ -779,16 +781,10 @@ void notrace handle_interruption(int code, struct pt_regs *regs)
779 781
780 if (user_mode(regs)) { 782 if (user_mode(regs)) {
781 if ((fault_space >> SPACEID_SHIFT) != (regs->sr[7] >> SPACEID_SHIFT)) { 783 if ((fault_space >> SPACEID_SHIFT) != (regs->sr[7] >> SPACEID_SHIFT)) {
782#ifdef PRINT_USER_FAULTS 784 parisc_printk_ratelimited(0, regs, KERN_DEBUG
783 if (fault_space == 0) 785 "User fault %d on space 0x%08lx, pid=%d command='%s'\n",
784 printk(KERN_DEBUG "User Fault on Kernel Space "); 786 code, fault_space,
785 else 787 task_pid_nr(current), current->comm);
786 printk(KERN_DEBUG "User Fault (long pointer) (fault %d) ",
787 code);
788 printk(KERN_CONT "pid=%d command='%s'\n",
789 task_pid_nr(current), current->comm);
790 show_regs(regs);
791#endif
792 si.si_signo = SIGSEGV; 788 si.si_signo = SIGSEGV;
793 si.si_errno = 0; 789 si.si_errno = 0;
794 si.si_code = SEGV_MAPERR; 790 si.si_code = SEGV_MAPERR;
diff --git a/arch/parisc/mm/fault.c b/arch/parisc/mm/fault.c
index 747550762f3c..3ca9c1131cfe 100644
--- a/arch/parisc/mm/fault.c
+++ b/arch/parisc/mm/fault.c
@@ -19,10 +19,6 @@
19#include <asm/uaccess.h> 19#include <asm/uaccess.h>
20#include <asm/traps.h> 20#include <asm/traps.h>
21 21
22#define PRINT_USER_FAULTS /* (turn this on if you want user faults to be */
23 /* dumped to the console via printk) */
24
25
26/* Various important other fields */ 22/* Various important other fields */
27#define bit22set(x) (x & 0x00000200) 23#define bit22set(x) (x & 0x00000200)
28#define bits23_25set(x) (x & 0x000001c0) 24#define bits23_25set(x) (x & 0x000001c0)
@@ -34,6 +30,8 @@
34 30
35DEFINE_PER_CPU(struct exception_data, exception_data); 31DEFINE_PER_CPU(struct exception_data, exception_data);
36 32
33int show_unhandled_signals = 1;
34
37/* 35/*
38 * parisc_acctyp(unsigned int inst) -- 36 * parisc_acctyp(unsigned int inst) --
39 * Given a PA-RISC memory access instruction, determine if the 37 * Given a PA-RISC memory access instruction, determine if the
@@ -173,6 +171,32 @@ int fixup_exception(struct pt_regs *regs)
173 return 0; 171 return 0;
174} 172}
175 173
174/*
175 * Print out info about fatal segfaults, if the show_unhandled_signals
176 * sysctl is set:
177 */
178static inline void
179show_signal_msg(struct pt_regs *regs, unsigned long code,
180 unsigned long address, struct task_struct *tsk,
181 struct vm_area_struct *vma)
182{
183 if (!unhandled_signal(tsk, SIGSEGV))
184 return;
185
186 if (!printk_ratelimit())
187 return;
188
189 pr_warn("\n");
190 pr_warn("do_page_fault() command='%s' type=%lu address=0x%08lx",
191 tsk->comm, code, address);
192 print_vma_addr(KERN_CONT " in ", regs->iaoq[0]);
193 if (vma)
194 pr_warn(" vm_start = 0x%08lx, vm_end = 0x%08lx\n",
195 vma->vm_start, vma->vm_end);
196
197 show_regs(regs);
198}
199
176void do_page_fault(struct pt_regs *regs, unsigned long code, 200void do_page_fault(struct pt_regs *regs, unsigned long code,
177 unsigned long address) 201 unsigned long address)
178{ 202{
@@ -270,16 +294,8 @@ bad_area:
270 if (user_mode(regs)) { 294 if (user_mode(regs)) {
271 struct siginfo si; 295 struct siginfo si;
272 296
273#ifdef PRINT_USER_FAULTS 297 show_signal_msg(regs, code, address, tsk, vma);
274 printk(KERN_DEBUG "\n"); 298
275 printk(KERN_DEBUG "do_page_fault() pid=%d command='%s' type=%lu address=0x%08lx\n",
276 task_pid_nr(tsk), tsk->comm, code, address);
277 if (vma) {
278 printk(KERN_DEBUG "vm_start = 0x%08lx, vm_end = 0x%08lx\n",
279 vma->vm_start, vma->vm_end);
280 }
281 show_regs(regs);
282#endif
283 switch (code) { 299 switch (code) {
284 case 15: /* Data TLB miss fault/Data page fault */ 300 case 15: /* Data TLB miss fault/Data page fault */
285 /* send SIGSEGV when outside of vma */ 301 /* send SIGSEGV when outside of vma */
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index 122a580f7322..7e711bdcc6da 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -813,9 +813,6 @@ static void __init clocksource_init(void)
813static int decrementer_set_next_event(unsigned long evt, 813static int decrementer_set_next_event(unsigned long evt,
814 struct clock_event_device *dev) 814 struct clock_event_device *dev)
815{ 815{
816 /* Don't adjust the decrementer if some irq work is pending */
817 if (test_irq_work_pending())
818 return 0;
819 __get_cpu_var(decrementers_next_tb) = get_tb_or_rtc() + evt; 816 __get_cpu_var(decrementers_next_tb) = get_tb_or_rtc() + evt;
820 set_dec(evt); 817 set_dec(evt);
821 818
diff --git a/arch/powerpc/platforms/powernv/eeh-ioda.c b/arch/powerpc/platforms/powernv/eeh-ioda.c
index 253fefe3d1a0..5b51079f3e3b 100644
--- a/arch/powerpc/platforms/powernv/eeh-ioda.c
+++ b/arch/powerpc/platforms/powernv/eeh-ioda.c
@@ -549,7 +549,8 @@ static int ioda_eeh_reset(struct eeh_pe *pe, int option)
549 ret = ioda_eeh_phb_reset(hose, option); 549 ret = ioda_eeh_phb_reset(hose, option);
550 } else { 550 } else {
551 bus = eeh_pe_bus_get(pe); 551 bus = eeh_pe_bus_get(pe);
552 if (pci_is_root_bus(bus)) 552 if (pci_is_root_bus(bus) ||
553 pci_is_root_bus(bus->parent))
553 ret = ioda_eeh_root_reset(hose, option); 554 ret = ioda_eeh_root_reset(hose, option);
554 else 555 else
555 ret = ioda_eeh_bridge_reset(hose, bus->self, option); 556 ret = ioda_eeh_bridge_reset(hose, bus->self, option);
diff --git a/arch/s390/crypto/aes_s390.c b/arch/s390/crypto/aes_s390.c
index cf3c0089bef2..23223cd63e54 100644
--- a/arch/s390/crypto/aes_s390.c
+++ b/arch/s390/crypto/aes_s390.c
@@ -820,6 +820,9 @@ static int ctr_aes_crypt(struct blkcipher_desc *desc, long func,
820 else 820 else
821 memcpy(walk->iv, ctrptr, AES_BLOCK_SIZE); 821 memcpy(walk->iv, ctrptr, AES_BLOCK_SIZE);
822 spin_unlock(&ctrblk_lock); 822 spin_unlock(&ctrblk_lock);
823 } else {
824 if (!nbytes)
825 memcpy(walk->iv, ctrptr, AES_BLOCK_SIZE);
823 } 826 }
824 /* 827 /*
825 * final block may be < AES_BLOCK_SIZE, copy only nbytes 828 * final block may be < AES_BLOCK_SIZE, copy only nbytes
diff --git a/arch/s390/crypto/des_s390.c b/arch/s390/crypto/des_s390.c
index 0a5aac8a9412..7acb77f7ef1a 100644
--- a/arch/s390/crypto/des_s390.c
+++ b/arch/s390/crypto/des_s390.c
@@ -429,6 +429,9 @@ static int ctr_desall_crypt(struct blkcipher_desc *desc, long func,
429 else 429 else
430 memcpy(walk->iv, ctrptr, DES_BLOCK_SIZE); 430 memcpy(walk->iv, ctrptr, DES_BLOCK_SIZE);
431 spin_unlock(&ctrblk_lock); 431 spin_unlock(&ctrblk_lock);
432 } else {
433 if (!nbytes)
434 memcpy(walk->iv, ctrptr, DES_BLOCK_SIZE);
432 } 435 }
433 /* final block may be < DES_BLOCK_SIZE, copy only nbytes */ 436 /* final block may be < DES_BLOCK_SIZE, copy only nbytes */
434 if (nbytes) { 437 if (nbytes) {
diff --git a/arch/x86/include/asm/hugetlb.h b/arch/x86/include/asm/hugetlb.h
index a8091216963b..68c05398bba9 100644
--- a/arch/x86/include/asm/hugetlb.h
+++ b/arch/x86/include/asm/hugetlb.h
@@ -52,6 +52,7 @@ static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
52static inline void huge_ptep_clear_flush(struct vm_area_struct *vma, 52static inline void huge_ptep_clear_flush(struct vm_area_struct *vma,
53 unsigned long addr, pte_t *ptep) 53 unsigned long addr, pte_t *ptep)
54{ 54{
55 ptep_clear_flush(vma, addr, ptep);
55} 56}
56 57
57static inline int huge_pte_none(pte_t pte) 58static inline int huge_pte_none(pte_t pte)
diff --git a/arch/x86/kernel/cpu/rdrand.c b/arch/x86/kernel/cpu/rdrand.c
index 384df5105fbc..136ac74dee82 100644
--- a/arch/x86/kernel/cpu/rdrand.c
+++ b/arch/x86/kernel/cpu/rdrand.c
@@ -27,6 +27,7 @@
27static int __init x86_rdrand_setup(char *s) 27static int __init x86_rdrand_setup(char *s)
28{ 28{
29 setup_clear_cpu_cap(X86_FEATURE_RDRAND); 29 setup_clear_cpu_cap(X86_FEATURE_RDRAND);
30 setup_clear_cpu_cap(X86_FEATURE_RDSEED);
30 return 1; 31 return 1;
31} 32}
32__setup("nordrand", x86_rdrand_setup); 33__setup("nordrand", x86_rdrand_setup);
diff --git a/arch/x86/kernel/ldt.c b/arch/x86/kernel/ldt.c
index af1d14a9ebda..dcbbaa165bde 100644
--- a/arch/x86/kernel/ldt.c
+++ b/arch/x86/kernel/ldt.c
@@ -20,6 +20,8 @@
20#include <asm/mmu_context.h> 20#include <asm/mmu_context.h>
21#include <asm/syscalls.h> 21#include <asm/syscalls.h>
22 22
23int sysctl_ldt16 = 0;
24
23#ifdef CONFIG_SMP 25#ifdef CONFIG_SMP
24static void flush_ldt(void *current_mm) 26static void flush_ldt(void *current_mm)
25{ 27{
@@ -234,7 +236,7 @@ static int write_ldt(void __user *ptr, unsigned long bytecount, int oldmode)
234 * IRET leaking the high bits of the kernel stack address. 236 * IRET leaking the high bits of the kernel stack address.
235 */ 237 */
236#ifdef CONFIG_X86_64 238#ifdef CONFIG_X86_64
237 if (!ldt_info.seg_32bit) { 239 if (!ldt_info.seg_32bit && !sysctl_ldt16) {
238 error = -EINVAL; 240 error = -EINVAL;
239 goto out_unlock; 241 goto out_unlock;
240 } 242 }
diff --git a/arch/x86/vdso/vdso32-setup.c b/arch/x86/vdso/vdso32-setup.c
index 00348980a3a6..e1f220e3ca68 100644
--- a/arch/x86/vdso/vdso32-setup.c
+++ b/arch/x86/vdso/vdso32-setup.c
@@ -39,6 +39,7 @@
39#ifdef CONFIG_X86_64 39#ifdef CONFIG_X86_64
40#define vdso_enabled sysctl_vsyscall32 40#define vdso_enabled sysctl_vsyscall32
41#define arch_setup_additional_pages syscall32_setup_pages 41#define arch_setup_additional_pages syscall32_setup_pages
42extern int sysctl_ldt16;
42#endif 43#endif
43 44
44/* 45/*
@@ -249,6 +250,13 @@ static struct ctl_table abi_table2[] = {
249 .mode = 0644, 250 .mode = 0644,
250 .proc_handler = proc_dointvec 251 .proc_handler = proc_dointvec
251 }, 252 },
253 {
254 .procname = "ldt16",
255 .data = &sysctl_ldt16,
256 .maxlen = sizeof(int),
257 .mode = 0644,
258 .proc_handler = proc_dointvec
259 },
252 {} 260 {}
253}; 261};
254 262
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-24 19:09:50 -0500