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-rw-r--r--arch/h8300/kernel/process.c2
-rw-r--r--arch/i386/kernel/cpu/cpufreq/Kconfig14
-rw-r--r--arch/i386/kernel/cpu/cpufreq/Makefile1
-rw-r--r--arch/i386/kernel/cpu/cpufreq/longhaul.c58
-rw-r--r--arch/i386/kernel/cpu/cpufreq/powernow-k7.c11
-rw-r--r--arch/i386/kernel/cpu/cpufreq/powernow-k8.c113
-rw-r--r--arch/i386/kernel/cpu/cpufreq/powernow-k8.h15
-rw-r--r--arch/i386/kernel/cpu/cpufreq/sc520_freq.c186
-rw-r--r--arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c6
-rw-r--r--arch/i386/kernel/cpu/cpufreq/speedstep-lib.c6
-rw-r--r--arch/i386/kernel/cpu/cpufreq/speedstep-smi.c3
-rw-r--r--arch/i386/kernel/cpu/intel_cacheinfo.c2
-rw-r--r--arch/i386/kernel/setup.c2
-rw-r--r--arch/i386/kernel/smpboot.c4
-rw-r--r--arch/i386/kernel/timers/common.c6
-rw-r--r--arch/i386/kernel/timers/timer_tsc.c20
-rw-r--r--arch/ia64/kernel/entry.S4
-rw-r--r--arch/ia64/kernel/mca.c4
-rw-r--r--arch/ia64/kernel/minstate.h3
-rw-r--r--arch/ia64/kernel/perfmon.c175
-rw-r--r--arch/ia64/kernel/ptrace.c20
-rw-r--r--arch/ia64/kernel/smpboot.c2
-rw-r--r--arch/ia64/kernel/sys_ia64.c7
-rw-r--r--arch/ia64/sn/kernel/setup.c2
-rw-r--r--arch/ppc/Kconfig4
-rw-r--r--arch/ppc/boot/images/Makefile3
-rw-r--r--arch/ppc/configs/mpc8555_cds_defconfig117
-rw-r--r--arch/ppc/kernel/head_fsl_booke.S15
-rw-r--r--arch/ppc/kernel/traps.c7
-rw-r--r--arch/ppc/platforms/83xx/mpc834x_sys.c1
-rw-r--r--arch/ppc/platforms/83xx/mpc834x_sys.h7
-rw-r--r--arch/ppc/platforms/85xx/mpc8540_ads.c3
-rw-r--r--arch/ppc/platforms/85xx/mpc85xx_cds_common.c143
-rw-r--r--arch/ppc/platforms/85xx/mpc85xx_cds_common.h3
-rw-r--r--arch/ppc/platforms/85xx/sbc8560.c3
-rw-r--r--arch/ppc/platforms/pmac_cpufreq.c36
-rw-r--r--arch/ppc/platforms/pq2ads.h41
-rw-r--r--arch/ppc/syslib/Makefile4
-rw-r--r--arch/ppc/syslib/m8260_pci.c193
-rw-r--r--arch/ppc/syslib/m8260_pci.h76
-rw-r--r--arch/ppc/syslib/m8260_pci_erratum9.c10
-rw-r--r--arch/ppc/syslib/m8260_setup.c11
-rw-r--r--arch/ppc/syslib/m82xx_pci.c383
-rw-r--r--arch/ppc/syslib/m82xx_pci.h92
-rw-r--r--arch/ppc/syslib/open_pic.c4
-rw-r--r--arch/ppc/syslib/ppc83xx_setup.c28
-rw-r--r--arch/ppc/syslib/ppc85xx_setup.c16
-rw-r--r--arch/ppc64/kernel/prom_init.c6
-rw-r--r--arch/ppc64/kernel/time.c2
-rw-r--r--arch/um/Kconfig.debug4
-rw-r--r--arch/um/drivers/random.c16
-rw-r--r--arch/um/drivers/ssl.c1
-rw-r--r--arch/um/drivers/stdio_console.c1
-rw-r--r--arch/um/drivers/ubd_kern.c7
-rw-r--r--arch/um/include/2_5compat.h24
-rw-r--r--arch/um/include/sysrq.h3
-rw-r--r--arch/um/kernel/exec_kern.c1
-rw-r--r--arch/um/kernel/initrd_kern.c59
-rw-r--r--arch/um/kernel/initrd_user.c46
-rw-r--r--arch/um/kernel/main.c40
-rw-r--r--arch/um/kernel/process_kern.c36
-rw-r--r--arch/um/kernel/ptrace.c19
-rw-r--r--arch/um/kernel/sysrq.c21
-rw-r--r--arch/um/kernel/trap_kern.c1
-rw-r--r--arch/um/kernel/tt/process_kern.c8
-rw-r--r--arch/um/kernel/um_arch.c6
-rw-r--r--arch/um/sys-i386/sysrq.c80
-rw-r--r--arch/um/sys-ppc/sysrq.c14
-rw-r--r--arch/um/sys-x86_64/syscalls.c16
-rw-r--r--arch/um/sys-x86_64/sysrq.c11
-rw-r--r--arch/x86_64/Kconfig1
-rw-r--r--arch/x86_64/kernel/io_apic.c1
-rw-r--r--arch/x86_64/kernel/mpparse.c1
-rw-r--r--arch/x86_64/kernel/signal.c1
-rw-r--r--arch/x86_64/kernel/time.c2
75 files changed, 1581 insertions, 713 deletions
diff --git a/arch/h8300/kernel/process.c b/arch/h8300/kernel/process.c
index 134aec1c6d19..b5f83e9f04db 100644
--- a/arch/h8300/kernel/process.c
+++ b/arch/h8300/kernel/process.c
@@ -54,7 +54,7 @@ asmlinkage void ret_from_fork(void);
54void default_idle(void) 54void default_idle(void)
55{ 55{
56 while(1) { 56 while(1) {
57 if (need_resched()) { 57 if (!need_resched()) {
58 local_irq_enable(); 58 local_irq_enable();
59 __asm__("sleep"); 59 __asm__("sleep");
60 local_irq_disable(); 60 local_irq_disable();
diff --git a/arch/i386/kernel/cpu/cpufreq/Kconfig b/arch/i386/kernel/cpu/cpufreq/Kconfig
index f25ffd74235c..0f1eb507233b 100644
--- a/arch/i386/kernel/cpu/cpufreq/Kconfig
+++ b/arch/i386/kernel/cpu/cpufreq/Kconfig
@@ -23,7 +23,7 @@ config X86_ACPI_CPUFREQ
23 If in doubt, say N. 23 If in doubt, say N.
24 24
25config ELAN_CPUFREQ 25config ELAN_CPUFREQ
26 tristate "AMD Elan" 26 tristate "AMD Elan SC400 and SC410"
27 select CPU_FREQ_TABLE 27 select CPU_FREQ_TABLE
28 depends on X86_ELAN 28 depends on X86_ELAN
29 ---help--- 29 ---help---
@@ -38,6 +38,18 @@ config ELAN_CPUFREQ
38 38
39 If in doubt, say N. 39 If in doubt, say N.
40 40
41config SC520_CPUFREQ
42 tristate "AMD Elan SC520"
43 select CPU_FREQ_TABLE
44 depends on X86_ELAN
45 ---help---
46 This adds the CPUFreq driver for AMD Elan SC520 processor.
47
48 For details, take a look at <file:Documentation/cpu-freq/>.
49
50 If in doubt, say N.
51
52
41config X86_POWERNOW_K6 53config X86_POWERNOW_K6
42 tristate "AMD Mobile K6-2/K6-3 PowerNow!" 54 tristate "AMD Mobile K6-2/K6-3 PowerNow!"
43 select CPU_FREQ_TABLE 55 select CPU_FREQ_TABLE
diff --git a/arch/i386/kernel/cpu/cpufreq/Makefile b/arch/i386/kernel/cpu/cpufreq/Makefile
index a922e97aeedd..2e894f1c8910 100644
--- a/arch/i386/kernel/cpu/cpufreq/Makefile
+++ b/arch/i386/kernel/cpu/cpufreq/Makefile
@@ -3,6 +3,7 @@ obj-$(CONFIG_X86_POWERNOW_K7) += powernow-k7.o
3obj-$(CONFIG_X86_POWERNOW_K8) += powernow-k8.o 3obj-$(CONFIG_X86_POWERNOW_K8) += powernow-k8.o
4obj-$(CONFIG_X86_LONGHAUL) += longhaul.o 4obj-$(CONFIG_X86_LONGHAUL) += longhaul.o
5obj-$(CONFIG_ELAN_CPUFREQ) += elanfreq.o 5obj-$(CONFIG_ELAN_CPUFREQ) += elanfreq.o
6obj-$(CONFIG_SC520_CPUFREQ) += sc520_freq.o
6obj-$(CONFIG_X86_LONGRUN) += longrun.o 7obj-$(CONFIG_X86_LONGRUN) += longrun.o
7obj-$(CONFIG_X86_GX_SUSPMOD) += gx-suspmod.o 8obj-$(CONFIG_X86_GX_SUSPMOD) += gx-suspmod.o
8obj-$(CONFIG_X86_SPEEDSTEP_ICH) += speedstep-ich.o 9obj-$(CONFIG_X86_SPEEDSTEP_ICH) += speedstep-ich.o
diff --git a/arch/i386/kernel/cpu/cpufreq/longhaul.c b/arch/i386/kernel/cpu/cpufreq/longhaul.c
index ab0f9f5aac11..04e3563da4fe 100644
--- a/arch/i386/kernel/cpu/cpufreq/longhaul.c
+++ b/arch/i386/kernel/cpu/cpufreq/longhaul.c
@@ -29,6 +29,7 @@
29#include <linux/cpufreq.h> 29#include <linux/cpufreq.h>
30#include <linux/slab.h> 30#include <linux/slab.h>
31#include <linux/string.h> 31#include <linux/string.h>
32#include <linux/pci.h>
32 33
33#include <asm/msr.h> 34#include <asm/msr.h>
34#include <asm/timex.h> 35#include <asm/timex.h>
@@ -119,7 +120,13 @@ static int longhaul_get_cpu_mult(void)
119static void do_powersaver(union msr_longhaul *longhaul, 120static void do_powersaver(union msr_longhaul *longhaul,
120 unsigned int clock_ratio_index) 121 unsigned int clock_ratio_index)
121{ 122{
123 struct pci_dev *dev;
124 unsigned long flags;
125 unsigned int tmp_mask;
122 int version; 126 int version;
127 int i;
128 u16 pci_cmd;
129 u16 cmd_state[64];
123 130
124 switch (cpu_model) { 131 switch (cpu_model) {
125 case CPU_EZRA_T: 132 case CPU_EZRA_T:
@@ -137,17 +144,58 @@ static void do_powersaver(union msr_longhaul *longhaul,
137 longhaul->bits.SoftBusRatio4 = (clock_ratio_index & 0x10) >> 4; 144 longhaul->bits.SoftBusRatio4 = (clock_ratio_index & 0x10) >> 4;
138 longhaul->bits.EnableSoftBusRatio = 1; 145 longhaul->bits.EnableSoftBusRatio = 1;
139 longhaul->bits.RevisionKey = 0; 146 longhaul->bits.RevisionKey = 0;
140 local_irq_disable(); 147
141 wrmsrl(MSR_VIA_LONGHAUL, longhaul->val); 148 preempt_disable();
149 local_irq_save(flags);
150
151 /*
152 * get current pci bus master state for all devices
153 * and clear bus master bit
154 */
155 dev = NULL;
156 i = 0;
157 do {
158 dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
159 if (dev != NULL) {
160 pci_read_config_word(dev, PCI_COMMAND, &pci_cmd);
161 cmd_state[i++] = pci_cmd;
162 pci_cmd &= ~PCI_COMMAND_MASTER;
163 pci_write_config_word(dev, PCI_COMMAND, pci_cmd);
164 }
165 } while (dev != NULL);
166
167 tmp_mask=inb(0x21); /* works on C3. save mask. */
168 outb(0xFE,0x21); /* TMR0 only */
169 outb(0xFF,0x80); /* delay */
170
142 local_irq_enable(); 171 local_irq_enable();
172
173 __hlt();
174 wrmsrl(MSR_VIA_LONGHAUL, longhaul->val);
143 __hlt(); 175 __hlt();
144 176
177 local_irq_disable();
178
179 outb(tmp_mask,0x21); /* restore mask */
180
181 /* restore pci bus master state for all devices */
182 dev = NULL;
183 i = 0;
184 do {
185 dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
186 if (dev != NULL) {
187 pci_cmd = cmd_state[i++];
188 pci_write_config_byte(dev, PCI_COMMAND, pci_cmd);
189 }
190 } while (dev != NULL);
191 local_irq_restore(flags);
192 preempt_enable();
193
194 /* disable bus ratio bit */
145 rdmsrl(MSR_VIA_LONGHAUL, longhaul->val); 195 rdmsrl(MSR_VIA_LONGHAUL, longhaul->val);
146 longhaul->bits.EnableSoftBusRatio = 0; 196 longhaul->bits.EnableSoftBusRatio = 0;
147 longhaul->bits.RevisionKey = version; 197 longhaul->bits.RevisionKey = version;
148 local_irq_disable();
149 wrmsrl(MSR_VIA_LONGHAUL, longhaul->val); 198 wrmsrl(MSR_VIA_LONGHAUL, longhaul->val);
150 local_irq_enable();
151} 199}
152 200
153/** 201/**
@@ -578,7 +626,7 @@ static int __init longhaul_cpu_init(struct cpufreq_policy *policy)
578 longhaul_setup_voltagescaling(); 626 longhaul_setup_voltagescaling();
579 627
580 policy->governor = CPUFREQ_DEFAULT_GOVERNOR; 628 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
581 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 629 policy->cpuinfo.transition_latency = 200000; /* nsec */
582 policy->cur = calc_speed(longhaul_get_cpu_mult()); 630 policy->cur = calc_speed(longhaul_get_cpu_mult());
583 631
584 ret = cpufreq_frequency_table_cpuinfo(policy, longhaul_table); 632 ret = cpufreq_frequency_table_cpuinfo(policy, longhaul_table);
diff --git a/arch/i386/kernel/cpu/cpufreq/powernow-k7.c b/arch/i386/kernel/cpu/cpufreq/powernow-k7.c
index 913f652623d9..5c530064eb74 100644
--- a/arch/i386/kernel/cpu/cpufreq/powernow-k7.c
+++ b/arch/i386/kernel/cpu/cpufreq/powernow-k7.c
@@ -23,6 +23,7 @@
23#include <linux/dmi.h> 23#include <linux/dmi.h>
24 24
25#include <asm/msr.h> 25#include <asm/msr.h>
26#include <asm/timer.h>
26#include <asm/timex.h> 27#include <asm/timex.h>
27#include <asm/io.h> 28#include <asm/io.h>
28#include <asm/system.h> 29#include <asm/system.h>
@@ -586,13 +587,17 @@ static int __init powernow_cpu_init (struct cpufreq_policy *policy)
586 587
587 rdmsrl (MSR_K7_FID_VID_STATUS, fidvidstatus.val); 588 rdmsrl (MSR_K7_FID_VID_STATUS, fidvidstatus.val);
588 589
589 /* A K7 with powernow technology is set to max frequency by BIOS */ 590 /* recalibrate cpu_khz */
590 fsb = (10 * cpu_khz) / fid_codes[fidvidstatus.bits.MFID]; 591 result = recalibrate_cpu_khz();
592 if (result)
593 return result;
594
595 fsb = (10 * cpu_khz) / fid_codes[fidvidstatus.bits.CFID];
591 if (!fsb) { 596 if (!fsb) {
592 printk(KERN_WARNING PFX "can not determine bus frequency\n"); 597 printk(KERN_WARNING PFX "can not determine bus frequency\n");
593 return -EINVAL; 598 return -EINVAL;
594 } 599 }
595 dprintk("FSB: %3d.%03d MHz\n", fsb/1000, fsb%1000); 600 dprintk("FSB: %3dMHz\n", fsb/1000);
596 601
597 if (dmi_check_system(powernow_dmi_table) || acpi_force) { 602 if (dmi_check_system(powernow_dmi_table) || acpi_force) {
598 printk (KERN_INFO PFX "PSB/PST known to be broken. Trying ACPI instead\n"); 603 printk (KERN_INFO PFX "PSB/PST known to be broken. Trying ACPI instead\n");
diff --git a/arch/i386/kernel/cpu/cpufreq/powernow-k8.c b/arch/i386/kernel/cpu/cpufreq/powernow-k8.c
index a65ff7e32e5d..10cc096c0ade 100644
--- a/arch/i386/kernel/cpu/cpufreq/powernow-k8.c
+++ b/arch/i386/kernel/cpu/cpufreq/powernow-k8.c
@@ -4,7 +4,7 @@
4 * GNU general public license version 2. See "COPYING" or 4 * GNU general public license version 2. See "COPYING" or
5 * http://www.gnu.org/licenses/gpl.html 5 * http://www.gnu.org/licenses/gpl.html
6 * 6 *
7 * Support : paul.devriendt@amd.com 7 * Support : mark.langsdorf@amd.com
8 * 8 *
9 * Based on the powernow-k7.c module written by Dave Jones. 9 * Based on the powernow-k7.c module written by Dave Jones.
10 * (C) 2003 Dave Jones <davej@codemonkey.org.uk> on behalf of SuSE Labs 10 * (C) 2003 Dave Jones <davej@codemonkey.org.uk> on behalf of SuSE Labs
@@ -15,12 +15,13 @@
15 * 15 *
16 * Valuable input gratefully received from Dave Jones, Pavel Machek, 16 * Valuable input gratefully received from Dave Jones, Pavel Machek,
17 * Dominik Brodowski, and others. 17 * Dominik Brodowski, and others.
18 * Originally developed by Paul Devriendt.
18 * Processor information obtained from Chapter 9 (Power and Thermal Management) 19 * Processor information obtained from Chapter 9 (Power and Thermal Management)
19 * of the "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD 20 * of the "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD
20 * Opteron Processors" available for download from www.amd.com 21 * Opteron Processors" available for download from www.amd.com
21 * 22 *
22 * Tables for specific CPUs can be infrerred from 23 * Tables for specific CPUs can be infrerred from
23 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/30430.pdf 24 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/30430.pdf
24 */ 25 */
25 26
26#include <linux/kernel.h> 27#include <linux/kernel.h>
@@ -30,6 +31,7 @@
30#include <linux/cpufreq.h> 31#include <linux/cpufreq.h>
31#include <linux/slab.h> 32#include <linux/slab.h>
32#include <linux/string.h> 33#include <linux/string.h>
34#include <linux/cpumask.h>
33 35
34#include <asm/msr.h> 36#include <asm/msr.h>
35#include <asm/io.h> 37#include <asm/io.h>
@@ -42,7 +44,7 @@
42 44
43#define PFX "powernow-k8: " 45#define PFX "powernow-k8: "
44#define BFX PFX "BIOS error: " 46#define BFX PFX "BIOS error: "
45#define VERSION "version 1.00.09e" 47#define VERSION "version 1.40.2"
46#include "powernow-k8.h" 48#include "powernow-k8.h"
47 49
48/* serialize freq changes */ 50/* serialize freq changes */
@@ -50,6 +52,10 @@ static DECLARE_MUTEX(fidvid_sem);
50 52
51static struct powernow_k8_data *powernow_data[NR_CPUS]; 53static struct powernow_k8_data *powernow_data[NR_CPUS];
52 54
55#ifndef CONFIG_SMP
56static cpumask_t cpu_core_map[1];
57#endif
58
53/* Return a frequency in MHz, given an input fid */ 59/* Return a frequency in MHz, given an input fid */
54static u32 find_freq_from_fid(u32 fid) 60static u32 find_freq_from_fid(u32 fid)
55{ 61{
@@ -274,11 +280,18 @@ static int core_voltage_pre_transition(struct powernow_k8_data *data, u32 reqvid
274{ 280{
275 u32 rvosteps = data->rvo; 281 u32 rvosteps = data->rvo;
276 u32 savefid = data->currfid; 282 u32 savefid = data->currfid;
283 u32 maxvid, lo;
277 284
278 dprintk("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, reqvid 0x%x, rvo 0x%x\n", 285 dprintk("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, reqvid 0x%x, rvo 0x%x\n",
279 smp_processor_id(), 286 smp_processor_id(),
280 data->currfid, data->currvid, reqvid, data->rvo); 287 data->currfid, data->currvid, reqvid, data->rvo);
281 288
289 rdmsr(MSR_FIDVID_STATUS, lo, maxvid);
290 maxvid = 0x1f & (maxvid >> 16);
291 dprintk("ph1 maxvid=0x%x\n", maxvid);
292 if (reqvid < maxvid) /* lower numbers are higher voltages */
293 reqvid = maxvid;
294
282 while (data->currvid > reqvid) { 295 while (data->currvid > reqvid) {
283 dprintk("ph1: curr 0x%x, req vid 0x%x\n", 296 dprintk("ph1: curr 0x%x, req vid 0x%x\n",
284 data->currvid, reqvid); 297 data->currvid, reqvid);
@@ -286,8 +299,8 @@ static int core_voltage_pre_transition(struct powernow_k8_data *data, u32 reqvid
286 return 1; 299 return 1;
287 } 300 }
288 301
289 while ((rvosteps > 0) && ((data->rvo + data->currvid) > reqvid)) { 302 while ((rvosteps > 0) && ((data->rvo + data->currvid) > reqvid)) {
290 if (data->currvid == 0) { 303 if (data->currvid == maxvid) {
291 rvosteps = 0; 304 rvosteps = 0;
292 } else { 305 } else {
293 dprintk("ph1: changing vid for rvo, req 0x%x\n", 306 dprintk("ph1: changing vid for rvo, req 0x%x\n",
@@ -671,7 +684,7 @@ static int find_psb_table(struct powernow_k8_data *data)
671 * BIOS and Kernel Developer's Guide, which is available on 684 * BIOS and Kernel Developer's Guide, which is available on
672 * www.amd.com 685 * www.amd.com
673 */ 686 */
674 printk(KERN_ERR PFX "BIOS error - no PSB\n"); 687 printk(KERN_INFO PFX "BIOS error - no PSB or ACPI _PSS objects\n");
675 return -ENODEV; 688 return -ENODEV;
676} 689}
677 690
@@ -695,7 +708,7 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
695 struct cpufreq_frequency_table *powernow_table; 708 struct cpufreq_frequency_table *powernow_table;
696 709
697 if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) { 710 if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) {
698 dprintk("register performance failed\n"); 711 dprintk("register performance failed: bad ACPI data\n");
699 return -EIO; 712 return -EIO;
700 } 713 }
701 714
@@ -746,22 +759,23 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
746 continue; 759 continue;
747 } 760 }
748 761
749 if (fid < HI_FID_TABLE_BOTTOM) { 762 /* verify only 1 entry from the lo frequency table */
750 if (cntlofreq) { 763 if (fid < HI_FID_TABLE_BOTTOM) {
751 /* if both entries are the same, ignore this 764 if (cntlofreq) {
752 * one... 765 /* if both entries are the same, ignore this
753 */ 766 * one...
754 if ((powernow_table[i].frequency != powernow_table[cntlofreq].frequency) || 767 */
755 (powernow_table[i].index != powernow_table[cntlofreq].index)) { 768 if ((powernow_table[i].frequency != powernow_table[cntlofreq].frequency) ||
756 printk(KERN_ERR PFX "Too many lo freq table entries\n"); 769 (powernow_table[i].index != powernow_table[cntlofreq].index)) {
757 goto err_out_mem; 770 printk(KERN_ERR PFX "Too many lo freq table entries\n");
758 } 771 goto err_out_mem;
759 772 }
760 dprintk("double low frequency table entry, ignoring it.\n"); 773
761 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID; 774 dprintk("double low frequency table entry, ignoring it.\n");
762 continue; 775 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
763 } else 776 continue;
764 cntlofreq = i; 777 } else
778 cntlofreq = i;
765 } 779 }
766 780
767 if (powernow_table[i].frequency != (data->acpi_data.states[i].core_frequency * 1000)) { 781 if (powernow_table[i].frequency != (data->acpi_data.states[i].core_frequency * 1000)) {
@@ -816,7 +830,7 @@ static int transition_frequency(struct powernow_k8_data *data, unsigned int inde
816{ 830{
817 u32 fid; 831 u32 fid;
818 u32 vid; 832 u32 vid;
819 int res; 833 int res, i;
820 struct cpufreq_freqs freqs; 834 struct cpufreq_freqs freqs;
821 835
822 dprintk("cpu %d transition to index %u\n", smp_processor_id(), index); 836 dprintk("cpu %d transition to index %u\n", smp_processor_id(), index);
@@ -841,7 +855,8 @@ static int transition_frequency(struct powernow_k8_data *data, unsigned int inde
841 } 855 }
842 856
843 if ((fid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) { 857 if ((fid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) {
844 printk("ignoring illegal change in lo freq table-%x to 0x%x\n", 858 printk(KERN_ERR PFX
859 "ignoring illegal change in lo freq table-%x to 0x%x\n",
845 data->currfid, fid); 860 data->currfid, fid);
846 return 1; 861 return 1;
847 } 862 }
@@ -850,18 +865,20 @@ static int transition_frequency(struct powernow_k8_data *data, unsigned int inde
850 smp_processor_id(), fid, vid); 865 smp_processor_id(), fid, vid);
851 866
852 freqs.cpu = data->cpu; 867 freqs.cpu = data->cpu;
853
854 freqs.old = find_khz_freq_from_fid(data->currfid); 868 freqs.old = find_khz_freq_from_fid(data->currfid);
855 freqs.new = find_khz_freq_from_fid(fid); 869 freqs.new = find_khz_freq_from_fid(fid);
856 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); 870 for_each_cpu_mask(i, cpu_core_map[data->cpu]) {
871 freqs.cpu = i;
872 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
873 }
857 874
858 down(&fidvid_sem);
859 res = transition_fid_vid(data, fid, vid); 875 res = transition_fid_vid(data, fid, vid);
860 up(&fidvid_sem);
861 876
862 freqs.new = find_khz_freq_from_fid(data->currfid); 877 freqs.new = find_khz_freq_from_fid(data->currfid);
863 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); 878 for_each_cpu_mask(i, cpu_core_map[data->cpu]) {
864 879 freqs.cpu = i;
880 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
881 }
865 return res; 882 return res;
866} 883}
867 884
@@ -874,6 +891,7 @@ static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsi
874 u32 checkvid = data->currvid; 891 u32 checkvid = data->currvid;
875 unsigned int newstate; 892 unsigned int newstate;
876 int ret = -EIO; 893 int ret = -EIO;
894 int i;
877 895
878 /* only run on specific CPU from here on */ 896 /* only run on specific CPU from here on */
879 oldmask = current->cpus_allowed; 897 oldmask = current->cpus_allowed;
@@ -902,22 +920,41 @@ static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsi
902 data->currfid, data->currvid); 920 data->currfid, data->currvid);
903 921
904 if ((checkvid != data->currvid) || (checkfid != data->currfid)) { 922 if ((checkvid != data->currvid) || (checkfid != data->currfid)) {
905 printk(KERN_ERR PFX 923 printk(KERN_INFO PFX
906 "error - out of sync, fid 0x%x 0x%x, vid 0x%x 0x%x\n", 924 "error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n",
907 checkfid, data->currfid, checkvid, data->currvid); 925 checkfid, data->currfid, checkvid, data->currvid);
908 } 926 }
909 927
910 if (cpufreq_frequency_table_target(pol, data->powernow_table, targfreq, relation, &newstate)) 928 if (cpufreq_frequency_table_target(pol, data->powernow_table, targfreq, relation, &newstate))
911 goto err_out; 929 goto err_out;
912 930
931 down(&fidvid_sem);
932
933 for_each_cpu_mask(i, cpu_core_map[pol->cpu]) {
934 /* make sure the sibling is initialized */
935 if (!powernow_data[i]) {
936 ret = 0;
937 up(&fidvid_sem);
938 goto err_out;
939 }
940 }
941
913 powernow_k8_acpi_pst_values(data, newstate); 942 powernow_k8_acpi_pst_values(data, newstate);
914 943
915 if (transition_frequency(data, newstate)) { 944 if (transition_frequency(data, newstate)) {
916 printk(KERN_ERR PFX "transition frequency failed\n"); 945 printk(KERN_ERR PFX "transition frequency failed\n");
917 ret = 1; 946 ret = 1;
947 up(&fidvid_sem);
918 goto err_out; 948 goto err_out;
919 } 949 }
920 950
951 /* Update all the fid/vids of our siblings */
952 for_each_cpu_mask(i, cpu_core_map[pol->cpu]) {
953 powernow_data[i]->currvid = data->currvid;
954 powernow_data[i]->currfid = data->currfid;
955 }
956 up(&fidvid_sem);
957
921 pol->cur = find_khz_freq_from_fid(data->currfid); 958 pol->cur = find_khz_freq_from_fid(data->currfid);
922 ret = 0; 959 ret = 0;
923 960
@@ -962,7 +999,7 @@ static int __init powernowk8_cpu_init(struct cpufreq_policy *pol)
962 */ 999 */
963 1000
964 if ((num_online_cpus() != 1) || (num_possible_cpus() != 1)) { 1001 if ((num_online_cpus() != 1) || (num_possible_cpus() != 1)) {
965 printk(KERN_INFO PFX "MP systems not supported by PSB BIOS structure\n"); 1002 printk(KERN_ERR PFX "MP systems not supported by PSB BIOS structure\n");
966 kfree(data); 1003 kfree(data);
967 return -ENODEV; 1004 return -ENODEV;
968 } 1005 }
@@ -1003,6 +1040,7 @@ static int __init powernowk8_cpu_init(struct cpufreq_policy *pol)
1003 schedule(); 1040 schedule();
1004 1041
1005 pol->governor = CPUFREQ_DEFAULT_GOVERNOR; 1042 pol->governor = CPUFREQ_DEFAULT_GOVERNOR;
1043 pol->cpus = cpu_core_map[pol->cpu];
1006 1044
1007 /* Take a crude guess here. 1045 /* Take a crude guess here.
1008 * That guess was in microseconds, so multiply with 1000 */ 1046 * That guess was in microseconds, so multiply with 1000 */
@@ -1069,7 +1107,7 @@ static unsigned int powernowk8_get (unsigned int cpu)
1069 return 0; 1107 return 0;
1070 } 1108 }
1071 preempt_disable(); 1109 preempt_disable();
1072 1110
1073 if (query_current_values_with_pending_wait(data)) 1111 if (query_current_values_with_pending_wait(data))
1074 goto out; 1112 goto out;
1075 1113
@@ -1127,9 +1165,10 @@ static void __exit powernowk8_exit(void)
1127 cpufreq_unregister_driver(&cpufreq_amd64_driver); 1165 cpufreq_unregister_driver(&cpufreq_amd64_driver);
1128} 1166}
1129 1167
1130MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com>"); 1168MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and Mark Langsdorf <mark.langsdorf@amd.com.");
1131MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver."); 1169MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver.");
1132MODULE_LICENSE("GPL"); 1170MODULE_LICENSE("GPL");
1133 1171
1134late_initcall(powernowk8_init); 1172late_initcall(powernowk8_init);
1135module_exit(powernowk8_exit); 1173module_exit(powernowk8_exit);
1174
diff --git a/arch/i386/kernel/cpu/cpufreq/powernow-k8.h b/arch/i386/kernel/cpu/cpufreq/powernow-k8.h
index 63ebc8470f52..9ed5bf221cb7 100644
--- a/arch/i386/kernel/cpu/cpufreq/powernow-k8.h
+++ b/arch/i386/kernel/cpu/cpufreq/powernow-k8.h
@@ -174,3 +174,18 @@ static int core_voltage_post_transition(struct powernow_k8_data *data, u32 reqvi
174static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid); 174static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid);
175 175
176static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index); 176static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index);
177
178#ifndef for_each_cpu_mask
179#define for_each_cpu_mask(i,mask) for (i=0;i<1;i++)
180#endif
181
182#ifdef CONFIG_SMP
183static inline void define_siblings(int cpu, cpumask_t cpu_sharedcore_mask[])
184{
185}
186#else
187static inline void define_siblings(int cpu, cpumask_t cpu_sharedcore_mask[])
188{
189 cpu_set(0, cpu_sharedcore_mask[0]);
190}
191#endif
diff --git a/arch/i386/kernel/cpu/cpufreq/sc520_freq.c b/arch/i386/kernel/cpu/cpufreq/sc520_freq.c
new file mode 100644
index 000000000000..ef457d50f4ac
--- /dev/null
+++ b/arch/i386/kernel/cpu/cpufreq/sc520_freq.c
@@ -0,0 +1,186 @@
1/*
2 * sc520_freq.c: cpufreq driver for the AMD Elan sc520
3 *
4 * Copyright (C) 2005 Sean Young <sean@mess.org>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * Based on elanfreq.c
12 *
13 * 2005-03-30: - initial revision
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/init.h>
19
20#include <linux/delay.h>
21#include <linux/cpufreq.h>
22
23#include <asm/msr.h>
24#include <asm/timex.h>
25#include <asm/io.h>
26
27#define MMCR_BASE 0xfffef000 /* The default base address */
28#define OFFS_CPUCTL 0x2 /* CPU Control Register */
29
30static __u8 __iomem *cpuctl;
31
32#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "sc520_freq", msg)
33
34static struct cpufreq_frequency_table sc520_freq_table[] = {
35 {0x01, 100000},
36 {0x02, 133000},
37 {0, CPUFREQ_TABLE_END},
38};
39
40static unsigned int sc520_freq_get_cpu_frequency(unsigned int cpu)
41{
42 u8 clockspeed_reg = *cpuctl;
43
44 switch (clockspeed_reg & 0x03) {
45 default:
46 printk(KERN_ERR "sc520_freq: error: cpuctl register has unexpected value %02x\n", clockspeed_reg);
47 case 0x01:
48 return 100000;
49 case 0x02:
50 return 133000;
51 }
52}
53
54static void sc520_freq_set_cpu_state (unsigned int state)
55{
56
57 struct cpufreq_freqs freqs;
58 u8 clockspeed_reg;
59
60 freqs.old = sc520_freq_get_cpu_frequency(0);
61 freqs.new = sc520_freq_table[state].frequency;
62 freqs.cpu = 0; /* AMD Elan is UP */
63
64 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
65
66 dprintk("attempting to set frequency to %i kHz\n",
67 sc520_freq_table[state].frequency);
68
69 local_irq_disable();
70
71 clockspeed_reg = *cpuctl & ~0x03;
72 *cpuctl = clockspeed_reg | sc520_freq_table[state].index;
73
74 local_irq_enable();
75
76 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
77};
78
79static int sc520_freq_verify (struct cpufreq_policy *policy)
80{
81 return cpufreq_frequency_table_verify(policy, &sc520_freq_table[0]);
82}
83
84static int sc520_freq_target (struct cpufreq_policy *policy,
85 unsigned int target_freq,
86 unsigned int relation)
87{
88 unsigned int newstate = 0;
89
90 if (cpufreq_frequency_table_target(policy, sc520_freq_table, target_freq, relation, &newstate))
91 return -EINVAL;
92
93 sc520_freq_set_cpu_state(newstate);
94
95 return 0;
96}
97
98
99/*
100 * Module init and exit code
101 */
102
103static int sc520_freq_cpu_init(struct cpufreq_policy *policy)
104{
105 struct cpuinfo_x86 *c = cpu_data;
106 int result;
107
108 /* capability check */
109 if (c->x86_vendor != X86_VENDOR_AMD ||
110 c->x86 != 4 || c->x86_model != 9)
111 return -ENODEV;
112
113 /* cpuinfo and default policy values */
114 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
115 policy->cpuinfo.transition_latency = 1000000; /* 1ms */
116 policy->cur = sc520_freq_get_cpu_frequency(0);
117
118 result = cpufreq_frequency_table_cpuinfo(policy, sc520_freq_table);
119 if (result)
120 return (result);
121
122 cpufreq_frequency_table_get_attr(sc520_freq_table, policy->cpu);
123
124 return 0;
125}
126
127
128static int sc520_freq_cpu_exit(struct cpufreq_policy *policy)
129{
130 cpufreq_frequency_table_put_attr(policy->cpu);
131 return 0;
132}
133
134
135static struct freq_attr* sc520_freq_attr[] = {
136 &cpufreq_freq_attr_scaling_available_freqs,
137 NULL,
138};
139
140
141static struct cpufreq_driver sc520_freq_driver = {
142 .get = sc520_freq_get_cpu_frequency,
143 .verify = sc520_freq_verify,
144 .target = sc520_freq_target,
145 .init = sc520_freq_cpu_init,
146 .exit = sc520_freq_cpu_exit,
147 .name = "sc520_freq",
148 .owner = THIS_MODULE,
149 .attr = sc520_freq_attr,
150};
151
152
153static int __init sc520_freq_init(void)
154{
155 struct cpuinfo_x86 *c = cpu_data;
156
157 /* Test if we have the right hardware */
158 if(c->x86_vendor != X86_VENDOR_AMD ||
159 c->x86 != 4 || c->x86_model != 9) {
160 dprintk("no Elan SC520 processor found!\n");
161 return -ENODEV;
162 }
163 cpuctl = ioremap((unsigned long)(MMCR_BASE + OFFS_CPUCTL), 1);
164 if(!cpuctl) {
165 printk(KERN_ERR "sc520_freq: error: failed to remap memory\n");
166 return -ENOMEM;
167 }
168
169 return cpufreq_register_driver(&sc520_freq_driver);
170}
171
172
173static void __exit sc520_freq_exit(void)
174{
175 cpufreq_unregister_driver(&sc520_freq_driver);
176 iounmap(cpuctl);
177}
178
179
180MODULE_LICENSE("GPL");
181MODULE_AUTHOR("Sean Young <sean@mess.org>");
182MODULE_DESCRIPTION("cpufreq driver for AMD's Elan sc520 CPU");
183
184module_init(sc520_freq_init);
185module_exit(sc520_freq_exit);
186
diff --git a/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c b/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c
index 07d5612dc00f..7dcbf70fc16f 100644
--- a/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c
+++ b/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c
@@ -54,6 +54,8 @@ enum {
54 CPU_DOTHAN_A1, 54 CPU_DOTHAN_A1,
55 CPU_DOTHAN_A2, 55 CPU_DOTHAN_A2,
56 CPU_DOTHAN_B0, 56 CPU_DOTHAN_B0,
57 CPU_MP4HT_D0,
58 CPU_MP4HT_E0,
57}; 59};
58 60
59static const struct cpu_id cpu_ids[] = { 61static const struct cpu_id cpu_ids[] = {
@@ -61,6 +63,8 @@ static const struct cpu_id cpu_ids[] = {
61 [CPU_DOTHAN_A1] = { 6, 13, 1 }, 63 [CPU_DOTHAN_A1] = { 6, 13, 1 },
62 [CPU_DOTHAN_A2] = { 6, 13, 2 }, 64 [CPU_DOTHAN_A2] = { 6, 13, 2 },
63 [CPU_DOTHAN_B0] = { 6, 13, 6 }, 65 [CPU_DOTHAN_B0] = { 6, 13, 6 },
66 [CPU_MP4HT_D0] = {15, 3, 4 },
67 [CPU_MP4HT_E0] = {15, 4, 1 },
64}; 68};
65#define N_IDS (sizeof(cpu_ids)/sizeof(cpu_ids[0])) 69#define N_IDS (sizeof(cpu_ids)/sizeof(cpu_ids[0]))
66 70
@@ -226,6 +230,8 @@ static struct cpu_model models[] =
226 { &cpu_ids[CPU_DOTHAN_A1], NULL, 0, NULL }, 230 { &cpu_ids[CPU_DOTHAN_A1], NULL, 0, NULL },
227 { &cpu_ids[CPU_DOTHAN_A2], NULL, 0, NULL }, 231 { &cpu_ids[CPU_DOTHAN_A2], NULL, 0, NULL },
228 { &cpu_ids[CPU_DOTHAN_B0], NULL, 0, NULL }, 232 { &cpu_ids[CPU_DOTHAN_B0], NULL, 0, NULL },
233 { &cpu_ids[CPU_MP4HT_D0], NULL, 0, NULL },
234 { &cpu_ids[CPU_MP4HT_E0], NULL, 0, NULL },
229 235
230 { NULL, } 236 { NULL, }
231}; 237};
diff --git a/arch/i386/kernel/cpu/cpufreq/speedstep-lib.c b/arch/i386/kernel/cpu/cpufreq/speedstep-lib.c
index 8ba430a9c3a2..d368b3f5fce8 100644
--- a/arch/i386/kernel/cpu/cpufreq/speedstep-lib.c
+++ b/arch/i386/kernel/cpu/cpufreq/speedstep-lib.c
@@ -336,7 +336,7 @@ unsigned int speedstep_get_freqs(unsigned int processor,
336 if (!prev_speed) 336 if (!prev_speed)
337 return -EIO; 337 return -EIO;
338 338
339 dprintk("previous seped is %u\n", prev_speed); 339 dprintk("previous speed is %u\n", prev_speed);
340 340
341 local_irq_save(flags); 341 local_irq_save(flags);
342 342
@@ -348,7 +348,7 @@ unsigned int speedstep_get_freqs(unsigned int processor,
348 goto out; 348 goto out;
349 } 349 }
350 350
351 dprintk("low seped is %u\n", *low_speed); 351 dprintk("low speed is %u\n", *low_speed);
352 352
353 /* switch to high state */ 353 /* switch to high state */
354 set_state(SPEEDSTEP_HIGH); 354 set_state(SPEEDSTEP_HIGH);
@@ -358,7 +358,7 @@ unsigned int speedstep_get_freqs(unsigned int processor,
358 goto out; 358 goto out;
359 } 359 }
360 360
361 dprintk("high seped is %u\n", *high_speed); 361 dprintk("high speed is %u\n", *high_speed);
362 362
363 if (*low_speed == *high_speed) { 363 if (*low_speed == *high_speed) {
364 ret = -ENODEV; 364 ret = -ENODEV;
diff --git a/arch/i386/kernel/cpu/cpufreq/speedstep-smi.c b/arch/i386/kernel/cpu/cpufreq/speedstep-smi.c
index 79440b3f087e..b25fb6b635ae 100644
--- a/arch/i386/kernel/cpu/cpufreq/speedstep-smi.c
+++ b/arch/i386/kernel/cpu/cpufreq/speedstep-smi.c
@@ -357,6 +357,9 @@ static int __init speedstep_init(void)
357 case SPEEDSTEP_PROCESSOR_PIII_C: 357 case SPEEDSTEP_PROCESSOR_PIII_C:
358 case SPEEDSTEP_PROCESSOR_PIII_C_EARLY: 358 case SPEEDSTEP_PROCESSOR_PIII_C_EARLY:
359 break; 359 break;
360 case SPEEDSTEP_PROCESSOR_P4M:
361 printk(KERN_INFO "speedstep-smi: you're trying to use this cpufreq driver on a Pentium 4-based CPU. Most likely it will not work.\n");
362 break;
360 default: 363 default:
361 speedstep_processor = 0; 364 speedstep_processor = 0;
362 } 365 }
diff --git a/arch/i386/kernel/cpu/intel_cacheinfo.c b/arch/i386/kernel/cpu/intel_cacheinfo.c
index aeb5b4ef8c8b..a710dc4eb20e 100644
--- a/arch/i386/kernel/cpu/intel_cacheinfo.c
+++ b/arch/i386/kernel/cpu/intel_cacheinfo.c
@@ -118,7 +118,7 @@ struct _cpuid4_info {
118}; 118};
119 119
120#define MAX_CACHE_LEAVES 4 120#define MAX_CACHE_LEAVES 4
121static unsigned short __devinitdata num_cache_leaves; 121static unsigned short num_cache_leaves;
122 122
123static int __devinit cpuid4_cache_lookup(int index, struct _cpuid4_info *this_leaf) 123static int __devinit cpuid4_cache_lookup(int index, struct _cpuid4_info *this_leaf)
124{ 124{
diff --git a/arch/i386/kernel/setup.c b/arch/i386/kernel/setup.c
index 945ec73163c8..2bfbddebdbf8 100644
--- a/arch/i386/kernel/setup.c
+++ b/arch/i386/kernel/setup.c
@@ -1502,11 +1502,13 @@ void __init setup_arch(char **cmdline_p)
1502 if (efi_enabled) 1502 if (efi_enabled)
1503 efi_map_memmap(); 1503 efi_map_memmap();
1504 1504
1505#ifdef CONFIG_ACPI_BOOT
1505 /* 1506 /*
1506 * Parse the ACPI tables for possible boot-time SMP configuration. 1507 * Parse the ACPI tables for possible boot-time SMP configuration.
1507 */ 1508 */
1508 acpi_boot_table_init(); 1509 acpi_boot_table_init();
1509 acpi_boot_init(); 1510 acpi_boot_init();
1511#endif
1510 1512
1511#ifdef CONFIG_X86_LOCAL_APIC 1513#ifdef CONFIG_X86_LOCAL_APIC
1512 if (smp_found_config) 1514 if (smp_found_config)
diff --git a/arch/i386/kernel/smpboot.c b/arch/i386/kernel/smpboot.c
index 35bfe138cb1a..bc1bb6919e6a 100644
--- a/arch/i386/kernel/smpboot.c
+++ b/arch/i386/kernel/smpboot.c
@@ -1074,8 +1074,10 @@ static void __init smp_boot_cpus(unsigned int max_cpus)
1074 cpu_set(cpu, cpu_sibling_map[cpu]); 1074 cpu_set(cpu, cpu_sibling_map[cpu]);
1075 } 1075 }
1076 1076
1077 if (siblings != smp_num_siblings) 1077 if (siblings != smp_num_siblings) {
1078 printk(KERN_WARNING "WARNING: %d siblings found for CPU%d, should be %d\n", siblings, cpu, smp_num_siblings); 1078 printk(KERN_WARNING "WARNING: %d siblings found for CPU%d, should be %d\n", siblings, cpu, smp_num_siblings);
1079 smp_num_siblings = siblings;
1080 }
1079 1081
1080 if (c->x86_num_cores > 1) { 1082 if (c->x86_num_cores > 1) {
1081 for (i = 0; i < NR_CPUS; i++) { 1083 for (i = 0; i < NR_CPUS; i++) {
diff --git a/arch/i386/kernel/timers/common.c b/arch/i386/kernel/timers/common.c
index f7f90005e22e..8e201219f525 100644
--- a/arch/i386/kernel/timers/common.c
+++ b/arch/i386/kernel/timers/common.c
@@ -6,6 +6,7 @@
6#include <linux/timex.h> 6#include <linux/timex.h>
7#include <linux/errno.h> 7#include <linux/errno.h>
8#include <linux/jiffies.h> 8#include <linux/jiffies.h>
9#include <linux/module.h>
9 10
10#include <asm/io.h> 11#include <asm/io.h>
11#include <asm/timer.h> 12#include <asm/timer.h>
@@ -24,7 +25,7 @@
24 25
25#define CALIBRATE_TIME (5 * 1000020/HZ) 26#define CALIBRATE_TIME (5 * 1000020/HZ)
26 27
27unsigned long __init calibrate_tsc(void) 28unsigned long calibrate_tsc(void)
28{ 29{
29 mach_prepare_counter(); 30 mach_prepare_counter();
30 31
@@ -139,7 +140,7 @@ bad_calibration:
139#endif 140#endif
140 141
141/* calculate cpu_khz */ 142/* calculate cpu_khz */
142void __init init_cpu_khz(void) 143void init_cpu_khz(void)
143{ 144{
144 if (cpu_has_tsc) { 145 if (cpu_has_tsc) {
145 unsigned long tsc_quotient = calibrate_tsc(); 146 unsigned long tsc_quotient = calibrate_tsc();
@@ -158,3 +159,4 @@ void __init init_cpu_khz(void)
158 } 159 }
159 } 160 }
160} 161}
162
diff --git a/arch/i386/kernel/timers/timer_tsc.c b/arch/i386/kernel/timers/timer_tsc.c
index 7926d967be00..180444d87824 100644
--- a/arch/i386/kernel/timers/timer_tsc.c
+++ b/arch/i386/kernel/timers/timer_tsc.c
@@ -320,6 +320,26 @@ core_initcall(cpufreq_tsc);
320static inline void cpufreq_delayed_get(void) { return; } 320static inline void cpufreq_delayed_get(void) { return; }
321#endif 321#endif
322 322
323int recalibrate_cpu_khz(void)
324{
325#ifndef CONFIG_SMP
326 unsigned long cpu_khz_old = cpu_khz;
327
328 if (cpu_has_tsc) {
329 init_cpu_khz();
330 cpu_data[0].loops_per_jiffy =
331 cpufreq_scale(cpu_data[0].loops_per_jiffy,
332 cpu_khz_old,
333 cpu_khz);
334 return 0;
335 } else
336 return -ENODEV;
337#else
338 return -ENODEV;
339#endif
340}
341EXPORT_SYMBOL(recalibrate_cpu_khz);
342
323static void mark_offset_tsc(void) 343static void mark_offset_tsc(void)
324{ 344{
325 unsigned long lost,delay; 345 unsigned long lost,delay;
diff --git a/arch/ia64/kernel/entry.S b/arch/ia64/kernel/entry.S
index 81c45d447394..d99316c9be28 100644
--- a/arch/ia64/kernel/entry.S
+++ b/arch/ia64/kernel/entry.S
@@ -1182,7 +1182,7 @@ ENTRY(notify_resume_user)
1182 ;; 1182 ;;
1183(pNonSys) mov out2=0 // out2==0 => not a syscall 1183(pNonSys) mov out2=0 // out2==0 => not a syscall
1184 .fframe 16 1184 .fframe 16
1185 .spillpsp ar.unat, 16 // (note that offset is relative to psp+0x10!) 1185 .spillsp ar.unat, 16
1186 st8 [sp]=r9,-16 // allocate space for ar.unat and save it 1186 st8 [sp]=r9,-16 // allocate space for ar.unat and save it
1187 st8 [out1]=loc1,-8 // save ar.pfs, out1=&sigscratch 1187 st8 [out1]=loc1,-8 // save ar.pfs, out1=&sigscratch
1188 .body 1188 .body
@@ -1208,7 +1208,7 @@ GLOBAL_ENTRY(sys_rt_sigsuspend)
1208 adds out2=8,sp // out2=&sigscratch->ar_pfs 1208 adds out2=8,sp // out2=&sigscratch->ar_pfs
1209 ;; 1209 ;;
1210 .fframe 16 1210 .fframe 16
1211 .spillpsp ar.unat, 16 // (note that offset is relative to psp+0x10!) 1211 .spillsp ar.unat, 16
1212 st8 [sp]=r9,-16 // allocate space for ar.unat and save it 1212 st8 [sp]=r9,-16 // allocate space for ar.unat and save it
1213 st8 [out2]=loc1,-8 // save ar.pfs, out2=&sigscratch 1213 st8 [out2]=loc1,-8 // save ar.pfs, out2=&sigscratch
1214 .body 1214 .body
diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c
index 4d6c7b8f667b..2c75741dcc66 100644
--- a/arch/ia64/kernel/mca.c
+++ b/arch/ia64/kernel/mca.c
@@ -1390,8 +1390,7 @@ ia64_mca_init(void)
1390 register_percpu_irq(IA64_MCA_WAKEUP_VECTOR, &mca_wkup_irqaction); 1390 register_percpu_irq(IA64_MCA_WAKEUP_VECTOR, &mca_wkup_irqaction);
1391 1391
1392#ifdef CONFIG_ACPI 1392#ifdef CONFIG_ACPI
1393 /* Setup the CPEI/P vector and handler */ 1393 /* Setup the CPEI/P handler */
1394 cpe_vector = acpi_request_vector(ACPI_INTERRUPT_CPEI);
1395 register_percpu_irq(IA64_CPEP_VECTOR, &mca_cpep_irqaction); 1394 register_percpu_irq(IA64_CPEP_VECTOR, &mca_cpep_irqaction);
1396#endif 1395#endif
1397 1396
@@ -1436,6 +1435,7 @@ ia64_mca_late_init(void)
1436 1435
1437#ifdef CONFIG_ACPI 1436#ifdef CONFIG_ACPI
1438 /* Setup the CPEI/P vector and handler */ 1437 /* Setup the CPEI/P vector and handler */
1438 cpe_vector = acpi_request_vector(ACPI_INTERRUPT_CPEI);
1439 init_timer(&cpe_poll_timer); 1439 init_timer(&cpe_poll_timer);
1440 cpe_poll_timer.function = ia64_mca_cpe_poll; 1440 cpe_poll_timer.function = ia64_mca_cpe_poll;
1441 1441
diff --git a/arch/ia64/kernel/minstate.h b/arch/ia64/kernel/minstate.h
index 1dbc7b2497c9..f6d8a010d99b 100644
--- a/arch/ia64/kernel/minstate.h
+++ b/arch/ia64/kernel/minstate.h
@@ -41,7 +41,7 @@
41(pKStk) addl r3=THIS_CPU(ia64_mca_data),r3;; \ 41(pKStk) addl r3=THIS_CPU(ia64_mca_data),r3;; \
42(pKStk) ld8 r3 = [r3];; \ 42(pKStk) ld8 r3 = [r3];; \
43(pKStk) addl r3=IA64_MCA_CPU_INIT_STACK_OFFSET,r3;; \ 43(pKStk) addl r3=IA64_MCA_CPU_INIT_STACK_OFFSET,r3;; \
44(pKStk) addl sp=IA64_STK_OFFSET-IA64_PT_REGS_SIZE,r3; \ 44(pKStk) addl r1=IA64_STK_OFFSET-IA64_PT_REGS_SIZE,r3; \
45(pUStk) mov ar.rsc=0; /* set enforced lazy mode, pl 0, little-endian, loadrs=0 */ \ 45(pUStk) mov ar.rsc=0; /* set enforced lazy mode, pl 0, little-endian, loadrs=0 */ \
46(pUStk) addl r22=IA64_RBS_OFFSET,r1; /* compute base of register backing store */ \ 46(pUStk) addl r22=IA64_RBS_OFFSET,r1; /* compute base of register backing store */ \
47 ;; \ 47 ;; \
@@ -50,7 +50,6 @@
50(pUStk) mov r23=ar.bspstore; /* save ar.bspstore */ \ 50(pUStk) mov r23=ar.bspstore; /* save ar.bspstore */ \
51(pUStk) dep r22=-1,r22,61,3; /* compute kernel virtual addr of RBS */ \ 51(pUStk) dep r22=-1,r22,61,3; /* compute kernel virtual addr of RBS */ \
52 ;; \ 52 ;; \
53(pKStk) addl r1=-IA64_PT_REGS_SIZE,r1; /* if in kernel mode, use sp (r12) */ \
54(pUStk) mov ar.bspstore=r22; /* switch to kernel RBS */ \ 53(pUStk) mov ar.bspstore=r22; /* switch to kernel RBS */ \
55 ;; \ 54 ;; \
56(pUStk) mov r18=ar.bsp; \ 55(pUStk) mov r18=ar.bsp; \
diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c
index 71c101601e3e..6407bff6bfd7 100644
--- a/arch/ia64/kernel/perfmon.c
+++ b/arch/ia64/kernel/perfmon.c
@@ -11,7 +11,7 @@
11 * Version Perfmon-2.x is a rewrite of perfmon-1.x 11 * Version Perfmon-2.x is a rewrite of perfmon-1.x
12 * by Stephane Eranian, Hewlett Packard Co. 12 * by Stephane Eranian, Hewlett Packard Co.
13 * 13 *
14 * Copyright (C) 1999-2003, 2005 Hewlett Packard Co 14 * Copyright (C) 1999-2005 Hewlett Packard Co
15 * Stephane Eranian <eranian@hpl.hp.com> 15 * Stephane Eranian <eranian@hpl.hp.com>
16 * David Mosberger-Tang <davidm@hpl.hp.com> 16 * David Mosberger-Tang <davidm@hpl.hp.com>
17 * 17 *
@@ -497,6 +497,9 @@ typedef struct {
497static pfm_stats_t pfm_stats[NR_CPUS]; 497static pfm_stats_t pfm_stats[NR_CPUS];
498static pfm_session_t pfm_sessions; /* global sessions information */ 498static pfm_session_t pfm_sessions; /* global sessions information */
499 499
500static spinlock_t pfm_alt_install_check = SPIN_LOCK_UNLOCKED;
501static pfm_intr_handler_desc_t *pfm_alt_intr_handler;
502
500static struct proc_dir_entry *perfmon_dir; 503static struct proc_dir_entry *perfmon_dir;
501static pfm_uuid_t pfm_null_uuid = {0,}; 504static pfm_uuid_t pfm_null_uuid = {0,};
502 505
@@ -606,6 +609,7 @@ DEFINE_PER_CPU(unsigned long, pfm_syst_info);
606DEFINE_PER_CPU(struct task_struct *, pmu_owner); 609DEFINE_PER_CPU(struct task_struct *, pmu_owner);
607DEFINE_PER_CPU(pfm_context_t *, pmu_ctx); 610DEFINE_PER_CPU(pfm_context_t *, pmu_ctx);
608DEFINE_PER_CPU(unsigned long, pmu_activation_number); 611DEFINE_PER_CPU(unsigned long, pmu_activation_number);
612EXPORT_PER_CPU_SYMBOL_GPL(pfm_syst_info);
609 613
610 614
611/* forward declaration */ 615/* forward declaration */
@@ -1325,7 +1329,7 @@ pfm_reserve_session(struct task_struct *task, int is_syswide, unsigned int cpu)
1325error_conflict: 1329error_conflict:
1326 DPRINT(("system wide not possible, conflicting session [%d] on CPU%d\n", 1330 DPRINT(("system wide not possible, conflicting session [%d] on CPU%d\n",
1327 pfm_sessions.pfs_sys_session[cpu]->pid, 1331 pfm_sessions.pfs_sys_session[cpu]->pid,
1328 smp_processor_id())); 1332 cpu));
1329abort: 1333abort:
1330 UNLOCK_PFS(flags); 1334 UNLOCK_PFS(flags);
1331 1335
@@ -5555,26 +5559,32 @@ pfm_interrupt_handler(int irq, void *arg, struct pt_regs *regs)
5555 int ret; 5559 int ret;
5556 5560
5557 this_cpu = get_cpu(); 5561 this_cpu = get_cpu();
5558 min = pfm_stats[this_cpu].pfm_ovfl_intr_cycles_min; 5562 if (likely(!pfm_alt_intr_handler)) {
5559 max = pfm_stats[this_cpu].pfm_ovfl_intr_cycles_max; 5563 min = pfm_stats[this_cpu].pfm_ovfl_intr_cycles_min;
5564 max = pfm_stats[this_cpu].pfm_ovfl_intr_cycles_max;
5560 5565
5561 start_cycles = ia64_get_itc(); 5566 start_cycles = ia64_get_itc();
5562 5567
5563 ret = pfm_do_interrupt_handler(irq, arg, regs); 5568 ret = pfm_do_interrupt_handler(irq, arg, regs);
5564 5569
5565 total_cycles = ia64_get_itc(); 5570 total_cycles = ia64_get_itc();
5566 5571
5567 /* 5572 /*
5568 * don't measure spurious interrupts 5573 * don't measure spurious interrupts
5569 */ 5574 */
5570 if (likely(ret == 0)) { 5575 if (likely(ret == 0)) {
5571 total_cycles -= start_cycles; 5576 total_cycles -= start_cycles;
5572 5577
5573 if (total_cycles < min) pfm_stats[this_cpu].pfm_ovfl_intr_cycles_min = total_cycles; 5578 if (total_cycles < min) pfm_stats[this_cpu].pfm_ovfl_intr_cycles_min = total_cycles;
5574 if (total_cycles > max) pfm_stats[this_cpu].pfm_ovfl_intr_cycles_max = total_cycles; 5579 if (total_cycles > max) pfm_stats[this_cpu].pfm_ovfl_intr_cycles_max = total_cycles;
5575 5580
5576 pfm_stats[this_cpu].pfm_ovfl_intr_cycles += total_cycles; 5581 pfm_stats[this_cpu].pfm_ovfl_intr_cycles += total_cycles;
5582 }
5583 }
5584 else {
5585 (*pfm_alt_intr_handler->handler)(irq, arg, regs);
5577 } 5586 }
5587
5578 put_cpu_no_resched(); 5588 put_cpu_no_resched();
5579 return IRQ_HANDLED; 5589 return IRQ_HANDLED;
5580} 5590}
@@ -6425,6 +6435,141 @@ static struct irqaction perfmon_irqaction = {
6425 .name = "perfmon" 6435 .name = "perfmon"
6426}; 6436};
6427 6437
6438static void
6439pfm_alt_save_pmu_state(void *data)
6440{
6441 struct pt_regs *regs;
6442
6443 regs = ia64_task_regs(current);
6444
6445 DPRINT(("called\n"));
6446
6447 /*
6448 * should not be necessary but
6449 * let's take not risk
6450 */
6451 pfm_clear_psr_up();
6452 pfm_clear_psr_pp();
6453 ia64_psr(regs)->pp = 0;
6454
6455 /*
6456 * This call is required
6457 * May cause a spurious interrupt on some processors
6458 */
6459 pfm_freeze_pmu();
6460
6461 ia64_srlz_d();
6462}
6463
6464void
6465pfm_alt_restore_pmu_state(void *data)
6466{
6467 struct pt_regs *regs;
6468
6469 regs = ia64_task_regs(current);
6470
6471 DPRINT(("called\n"));
6472
6473 /*
6474 * put PMU back in state expected
6475 * by perfmon
6476 */
6477 pfm_clear_psr_up();
6478 pfm_clear_psr_pp();
6479 ia64_psr(regs)->pp = 0;
6480
6481 /*
6482 * perfmon runs with PMU unfrozen at all times
6483 */
6484 pfm_unfreeze_pmu();
6485
6486 ia64_srlz_d();
6487}
6488
6489int
6490pfm_install_alt_pmu_interrupt(pfm_intr_handler_desc_t *hdl)
6491{
6492 int ret, i;
6493 int reserve_cpu;
6494
6495 /* some sanity checks */
6496 if (hdl == NULL || hdl->handler == NULL) return -EINVAL;
6497
6498 /* do the easy test first */
6499 if (pfm_alt_intr_handler) return -EBUSY;
6500
6501 /* one at a time in the install or remove, just fail the others */
6502 if (!spin_trylock(&pfm_alt_install_check)) {
6503 return -EBUSY;
6504 }
6505
6506 /* reserve our session */
6507 for_each_online_cpu(reserve_cpu) {
6508 ret = pfm_reserve_session(NULL, 1, reserve_cpu);
6509 if (ret) goto cleanup_reserve;
6510 }
6511
6512 /* save the current system wide pmu states */
6513 ret = on_each_cpu(pfm_alt_save_pmu_state, NULL, 0, 1);
6514 if (ret) {
6515 DPRINT(("on_each_cpu() failed: %d\n", ret));
6516 goto cleanup_reserve;
6517 }
6518
6519 /* officially change to the alternate interrupt handler */
6520 pfm_alt_intr_handler = hdl;
6521
6522 spin_unlock(&pfm_alt_install_check);
6523
6524 return 0;
6525
6526cleanup_reserve:
6527 for_each_online_cpu(i) {
6528 /* don't unreserve more than we reserved */
6529 if (i >= reserve_cpu) break;
6530
6531 pfm_unreserve_session(NULL, 1, i);
6532 }
6533
6534 spin_unlock(&pfm_alt_install_check);
6535
6536 return ret;
6537}
6538EXPORT_SYMBOL_GPL(pfm_install_alt_pmu_interrupt);
6539
6540int
6541pfm_remove_alt_pmu_interrupt(pfm_intr_handler_desc_t *hdl)
6542{
6543 int i;
6544 int ret;
6545
6546 if (hdl == NULL) return -EINVAL;
6547
6548 /* cannot remove someone else's handler! */
6549 if (pfm_alt_intr_handler != hdl) return -EINVAL;
6550
6551 /* one at a time in the install or remove, just fail the others */
6552 if (!spin_trylock(&pfm_alt_install_check)) {
6553 return -EBUSY;
6554 }
6555
6556 pfm_alt_intr_handler = NULL;
6557
6558 ret = on_each_cpu(pfm_alt_restore_pmu_state, NULL, 0, 1);
6559 if (ret) {
6560 DPRINT(("on_each_cpu() failed: %d\n", ret));
6561 }
6562
6563 for_each_online_cpu(i) {
6564 pfm_unreserve_session(NULL, 1, i);
6565 }
6566
6567 spin_unlock(&pfm_alt_install_check);
6568
6569 return 0;
6570}
6571EXPORT_SYMBOL_GPL(pfm_remove_alt_pmu_interrupt);
6572
6428/* 6573/*
6429 * perfmon initialization routine, called from the initcall() table 6574 * perfmon initialization routine, called from the initcall() table
6430 */ 6575 */
diff --git a/arch/ia64/kernel/ptrace.c b/arch/ia64/kernel/ptrace.c
index 907464ee7273..08c8a5eb25ab 100644
--- a/arch/ia64/kernel/ptrace.c
+++ b/arch/ia64/kernel/ptrace.c
@@ -692,16 +692,30 @@ convert_to_non_syscall (struct task_struct *child, struct pt_regs *pt,
692 unsigned long cfm) 692 unsigned long cfm)
693{ 693{
694 struct unw_frame_info info, prev_info; 694 struct unw_frame_info info, prev_info;
695 unsigned long ip, pr; 695 unsigned long ip, sp, pr;
696 696
697 unw_init_from_blocked_task(&info, child); 697 unw_init_from_blocked_task(&info, child);
698 while (1) { 698 while (1) {
699 prev_info = info; 699 prev_info = info;
700 if (unw_unwind(&info) < 0) 700 if (unw_unwind(&info) < 0)
701 return; 701 return;
702 if (unw_get_rp(&info, &ip) < 0) 702
703 unw_get_sp(&info, &sp);
704 if ((long)((unsigned long)child + IA64_STK_OFFSET - sp)
705 < IA64_PT_REGS_SIZE) {
706 dprintk("ptrace.%s: ran off the top of the kernel "
707 "stack\n", __FUNCTION__);
708 return;
709 }
710 if (unw_get_pr (&prev_info, &pr) < 0) {
711 unw_get_rp(&prev_info, &ip);
712 dprintk("ptrace.%s: failed to read "
713 "predicate register (ip=0x%lx)\n",
714 __FUNCTION__, ip);
703 return; 715 return;
704 if (ip < FIXADDR_USER_END) 716 }
717 if (unw_is_intr_frame(&info)
718 && (pr & (1UL << PRED_USER_STACK)))
705 break; 719 break;
706 } 720 }
707 721
diff --git a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c
index 0d5ee57c9865..3865f088ffa2 100644
--- a/arch/ia64/kernel/smpboot.c
+++ b/arch/ia64/kernel/smpboot.c
@@ -624,7 +624,7 @@ static struct {
624 __u16 thread_id; 624 __u16 thread_id;
625 __u16 proc_fixed_addr; 625 __u16 proc_fixed_addr;
626 __u8 valid; 626 __u8 valid;
627}mt_info[NR_CPUS] __devinit; 627} mt_info[NR_CPUS] __devinitdata;
628 628
629#ifdef CONFIG_HOTPLUG_CPU 629#ifdef CONFIG_HOTPLUG_CPU
630static inline void 630static inline void
diff --git a/arch/ia64/kernel/sys_ia64.c b/arch/ia64/kernel/sys_ia64.c
index a8cf6d8a509c..770fab37928e 100644
--- a/arch/ia64/kernel/sys_ia64.c
+++ b/arch/ia64/kernel/sys_ia64.c
@@ -182,13 +182,6 @@ do_mmap2 (unsigned long addr, unsigned long len, int prot, int flags, int fd, un
182 } 182 }
183 } 183 }
184 184
185 /*
186 * A zero mmap always succeeds in Linux, independent of whether or not the
187 * remaining arguments are valid.
188 */
189 if (len == 0)
190 goto out;
191
192 /* Careful about overflows.. */ 185 /* Careful about overflows.. */
193 len = PAGE_ALIGN(len); 186 len = PAGE_ALIGN(len);
194 if (!len || len > TASK_SIZE) { 187 if (!len || len > TASK_SIZE) {
diff --git a/arch/ia64/sn/kernel/setup.c b/arch/ia64/sn/kernel/setup.c
index 4fb44984afe6..e64cb8175f7a 100644
--- a/arch/ia64/sn/kernel/setup.c
+++ b/arch/ia64/sn/kernel/setup.c
@@ -271,6 +271,8 @@ void __init sn_setup(char **cmdline_p)
271 int major = sn_sal_rev_major(), minor = sn_sal_rev_minor(); 271 int major = sn_sal_rev_major(), minor = sn_sal_rev_minor();
272 extern void sn_cpu_init(void); 272 extern void sn_cpu_init(void);
273 273
274 ia64_sn_plat_set_error_handling_features();
275
274 /* 276 /*
275 * If the generic code has enabled vga console support - lets 277 * If the generic code has enabled vga console support - lets
276 * get rid of it again. This is a kludge for the fact that ACPI 278 * get rid of it again. This is a kludge for the fact that ACPI
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig
index 600f23d7fd33..6e6377a69d5b 100644
--- a/arch/ppc/Kconfig
+++ b/arch/ppc/Kconfig
@@ -1143,12 +1143,12 @@ config PCI_QSPAN
1143 1143
1144config PCI_8260 1144config PCI_8260
1145 bool 1145 bool
1146 depends on PCI && 8260 && !8272 1146 depends on PCI && 8260
1147 default y 1147 default y
1148 1148
1149config 8260_PCI9 1149config 8260_PCI9
1150 bool " Enable workaround for MPC826x erratum PCI 9" 1150 bool " Enable workaround for MPC826x erratum PCI 9"
1151 depends on PCI_8260 1151 depends on PCI_8260 && !ADS8272
1152 default y 1152 default y
1153 1153
1154choice 1154choice
diff --git a/arch/ppc/boot/images/Makefile b/arch/ppc/boot/images/Makefile
index f850fb0fb511..c9ac5f5fa9e4 100644
--- a/arch/ppc/boot/images/Makefile
+++ b/arch/ppc/boot/images/Makefile
@@ -22,7 +22,8 @@ targets += uImage
22$(obj)/uImage: $(obj)/vmlinux.gz 22$(obj)/uImage: $(obj)/vmlinux.gz
23 $(Q)rm -f $@ 23 $(Q)rm -f $@
24 $(call if_changed,uimage) 24 $(call if_changed,uimage)
25 @echo ' Image: $@' $(if $(wildcard $@),'is ready','not made') 25 @echo -n ' Image: $@ '
26 @if [ -f $@ ]; then echo 'is ready' ; else echo 'not made'; fi
26 27
27# Files generated that shall be removed upon make clean 28# Files generated that shall be removed upon make clean
28clean-files := sImage vmapus vmlinux* miboot* zImage* uImage 29clean-files := sImage vmapus vmlinux* miboot* zImage* uImage
diff --git a/arch/ppc/configs/mpc8555_cds_defconfig b/arch/ppc/configs/mpc8555_cds_defconfig
index 728bd9e1a8fa..15abebf46b96 100644
--- a/arch/ppc/configs/mpc8555_cds_defconfig
+++ b/arch/ppc/configs/mpc8555_cds_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc1 3# Linux kernel version: 2.6.12-rc4
4# Thu Jan 20 01:25:35 2005 4# Tue May 17 11:56:01 2005
5# 5#
6CONFIG_MMU=y 6CONFIG_MMU=y
7CONFIG_GENERIC_HARDIRQS=y 7CONFIG_GENERIC_HARDIRQS=y
@@ -11,6 +11,7 @@ CONFIG_HAVE_DEC_LOCK=y
11CONFIG_PPC=y 11CONFIG_PPC=y
12CONFIG_PPC32=y 12CONFIG_PPC32=y
13CONFIG_GENERIC_NVRAM=y 13CONFIG_GENERIC_NVRAM=y
14CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
14 15
15# 16#
16# Code maturity level options 17# Code maturity level options
@@ -18,6 +19,7 @@ CONFIG_GENERIC_NVRAM=y
18CONFIG_EXPERIMENTAL=y 19CONFIG_EXPERIMENTAL=y
19CONFIG_CLEAN_COMPILE=y 20CONFIG_CLEAN_COMPILE=y
20CONFIG_BROKEN_ON_SMP=y 21CONFIG_BROKEN_ON_SMP=y
22CONFIG_INIT_ENV_ARG_LIMIT=32
21 23
22# 24#
23# General setup 25# General setup
@@ -29,12 +31,14 @@ CONFIG_SYSVIPC=y
29# CONFIG_BSD_PROCESS_ACCT is not set 31# CONFIG_BSD_PROCESS_ACCT is not set
30CONFIG_SYSCTL=y 32CONFIG_SYSCTL=y
31# CONFIG_AUDIT is not set 33# CONFIG_AUDIT is not set
32CONFIG_LOG_BUF_SHIFT=14
33# CONFIG_HOTPLUG is not set 34# CONFIG_HOTPLUG is not set
34CONFIG_KOBJECT_UEVENT=y 35CONFIG_KOBJECT_UEVENT=y
35# CONFIG_IKCONFIG is not set 36# CONFIG_IKCONFIG is not set
36CONFIG_EMBEDDED=y 37CONFIG_EMBEDDED=y
37# CONFIG_KALLSYMS is not set 38# CONFIG_KALLSYMS is not set
39CONFIG_PRINTK=y
40CONFIG_BUG=y
41CONFIG_BASE_FULL=y
38CONFIG_FUTEX=y 42CONFIG_FUTEX=y
39# CONFIG_EPOLL is not set 43# CONFIG_EPOLL is not set
40# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 44# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -44,6 +48,7 @@ CONFIG_CC_ALIGN_LABELS=0
44CONFIG_CC_ALIGN_LOOPS=0 48CONFIG_CC_ALIGN_LOOPS=0
45CONFIG_CC_ALIGN_JUMPS=0 49CONFIG_CC_ALIGN_JUMPS=0
46# CONFIG_TINY_SHMEM is not set 50# CONFIG_TINY_SHMEM is not set
51CONFIG_BASE_SMALL=0
47 52
48# 53#
49# Loadable module support 54# Loadable module support
@@ -62,10 +67,12 @@ CONFIG_CC_ALIGN_JUMPS=0
62CONFIG_E500=y 67CONFIG_E500=y
63CONFIG_BOOKE=y 68CONFIG_BOOKE=y
64CONFIG_FSL_BOOKE=y 69CONFIG_FSL_BOOKE=y
70# CONFIG_PHYS_64BIT is not set
65CONFIG_SPE=y 71CONFIG_SPE=y
66CONFIG_MATH_EMULATION=y 72CONFIG_MATH_EMULATION=y
67# CONFIG_CPU_FREQ is not set 73# CONFIG_CPU_FREQ is not set
68CONFIG_PPC_GEN550=y 74CONFIG_PPC_GEN550=y
75# CONFIG_PM is not set
69CONFIG_85xx=y 76CONFIG_85xx=y
70CONFIG_PPC_INDIRECT_PCI_BE=y 77CONFIG_PPC_INDIRECT_PCI_BE=y
71 78
@@ -76,6 +83,7 @@ CONFIG_PPC_INDIRECT_PCI_BE=y
76CONFIG_MPC8555_CDS=y 83CONFIG_MPC8555_CDS=y
77# CONFIG_MPC8560_ADS is not set 84# CONFIG_MPC8560_ADS is not set
78# CONFIG_SBC8560 is not set 85# CONFIG_SBC8560 is not set
86# CONFIG_STX_GP3 is not set
79CONFIG_MPC8555=y 87CONFIG_MPC8555=y
80CONFIG_85xx_PCI2=y 88CONFIG_85xx_PCI2=y
81 89
@@ -90,6 +98,7 @@ CONFIG_CPM2=y
90CONFIG_BINFMT_ELF=y 98CONFIG_BINFMT_ELF=y
91# CONFIG_BINFMT_MISC is not set 99# CONFIG_BINFMT_MISC is not set
92# CONFIG_CMDLINE_BOOL is not set 100# CONFIG_CMDLINE_BOOL is not set
101CONFIG_ISA_DMA_API=y
93 102
94# 103#
95# Bus options 104# Bus options
@@ -105,10 +114,6 @@ CONFIG_PCI_NAMES=y
105# CONFIG_PCCARD is not set 114# CONFIG_PCCARD is not set
106 115
107# 116#
108# PC-card bridges
109#
110
111#
112# Advanced setup 117# Advanced setup
113# 118#
114# CONFIG_ADVANCED_OPTIONS is not set 119# CONFIG_ADVANCED_OPTIONS is not set
@@ -180,7 +185,59 @@ CONFIG_IOSCHED_CFQ=y
180# 185#
181# ATA/ATAPI/MFM/RLL support 186# ATA/ATAPI/MFM/RLL support
182# 187#
183# CONFIG_IDE is not set 188CONFIG_IDE=y
189CONFIG_BLK_DEV_IDE=y
190
191#
192# Please see Documentation/ide.txt for help/info on IDE drives
193#
194# CONFIG_BLK_DEV_IDE_SATA is not set
195CONFIG_BLK_DEV_IDEDISK=y
196# CONFIG_IDEDISK_MULTI_MODE is not set
197# CONFIG_BLK_DEV_IDECD is not set
198# CONFIG_BLK_DEV_IDETAPE is not set
199# CONFIG_BLK_DEV_IDEFLOPPY is not set
200# CONFIG_IDE_TASK_IOCTL is not set
201
202#
203# IDE chipset support/bugfixes
204#
205CONFIG_IDE_GENERIC=y
206CONFIG_BLK_DEV_IDEPCI=y
207CONFIG_IDEPCI_SHARE_IRQ=y
208# CONFIG_BLK_DEV_OFFBOARD is not set
209CONFIG_BLK_DEV_GENERIC=y
210# CONFIG_BLK_DEV_OPTI621 is not set
211# CONFIG_BLK_DEV_SL82C105 is not set
212CONFIG_BLK_DEV_IDEDMA_PCI=y
213# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
214CONFIG_IDEDMA_PCI_AUTO=y
215# CONFIG_IDEDMA_ONLYDISK is not set
216# CONFIG_BLK_DEV_AEC62XX is not set
217# CONFIG_BLK_DEV_ALI15X3 is not set
218# CONFIG_BLK_DEV_AMD74XX is not set
219# CONFIG_BLK_DEV_CMD64X is not set
220# CONFIG_BLK_DEV_TRIFLEX is not set
221# CONFIG_BLK_DEV_CY82C693 is not set
222# CONFIG_BLK_DEV_CS5520 is not set
223# CONFIG_BLK_DEV_CS5530 is not set
224# CONFIG_BLK_DEV_HPT34X is not set
225# CONFIG_BLK_DEV_HPT366 is not set
226# CONFIG_BLK_DEV_SC1200 is not set
227# CONFIG_BLK_DEV_PIIX is not set
228# CONFIG_BLK_DEV_NS87415 is not set
229# CONFIG_BLK_DEV_PDC202XX_OLD is not set
230# CONFIG_BLK_DEV_PDC202XX_NEW is not set
231# CONFIG_BLK_DEV_SVWKS is not set
232# CONFIG_BLK_DEV_SIIMAGE is not set
233# CONFIG_BLK_DEV_SLC90E66 is not set
234# CONFIG_BLK_DEV_TRM290 is not set
235CONFIG_BLK_DEV_VIA82CXXX=y
236# CONFIG_IDE_ARM is not set
237CONFIG_BLK_DEV_IDEDMA=y
238# CONFIG_IDEDMA_IVB is not set
239CONFIG_IDEDMA_AUTO=y
240# CONFIG_BLK_DEV_HD is not set
184 241
185# 242#
186# SCSI device support 243# SCSI device support
@@ -220,7 +277,6 @@ CONFIG_NET=y
220# 277#
221CONFIG_PACKET=y 278CONFIG_PACKET=y
222# CONFIG_PACKET_MMAP is not set 279# CONFIG_PACKET_MMAP is not set
223# CONFIG_NETLINK_DEV is not set
224CONFIG_UNIX=y 280CONFIG_UNIX=y
225# CONFIG_NET_KEY is not set 281# CONFIG_NET_KEY is not set
226CONFIG_INET=y 282CONFIG_INET=y
@@ -370,14 +426,6 @@ CONFIG_INPUT=y
370# CONFIG_INPUT_EVBUG is not set 426# CONFIG_INPUT_EVBUG is not set
371 427
372# 428#
373# Input I/O drivers
374#
375# CONFIG_GAMEPORT is not set
376CONFIG_SOUND_GAMEPORT=y
377# CONFIG_SERIO is not set
378# CONFIG_SERIO_I8042 is not set
379
380#
381# Input Device Drivers 429# Input Device Drivers
382# 430#
383# CONFIG_INPUT_KEYBOARD is not set 431# CONFIG_INPUT_KEYBOARD is not set
@@ -387,6 +435,13 @@ CONFIG_SOUND_GAMEPORT=y
387# CONFIG_INPUT_MISC is not set 435# CONFIG_INPUT_MISC is not set
388 436
389# 437#
438# Hardware I/O ports
439#
440# CONFIG_SERIO is not set
441# CONFIG_GAMEPORT is not set
442CONFIG_SOUND_GAMEPORT=y
443
444#
390# Character devices 445# Character devices
391# 446#
392# CONFIG_VT is not set 447# CONFIG_VT is not set
@@ -406,6 +461,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4
406CONFIG_SERIAL_CORE=y 461CONFIG_SERIAL_CORE=y
407CONFIG_SERIAL_CORE_CONSOLE=y 462CONFIG_SERIAL_CORE_CONSOLE=y
408# CONFIG_SERIAL_CPM is not set 463# CONFIG_SERIAL_CPM is not set
464# CONFIG_SERIAL_JSM is not set
409CONFIG_UNIX98_PTYS=y 465CONFIG_UNIX98_PTYS=y
410CONFIG_LEGACY_PTYS=y 466CONFIG_LEGACY_PTYS=y
411CONFIG_LEGACY_PTY_COUNT=256 467CONFIG_LEGACY_PTY_COUNT=256
@@ -434,6 +490,11 @@ CONFIG_GEN_RTC=y
434# CONFIG_RAW_DRIVER is not set 490# CONFIG_RAW_DRIVER is not set
435 491
436# 492#
493# TPM devices
494#
495# CONFIG_TCG_TPM is not set
496
497#
437# I2C support 498# I2C support
438# 499#
439CONFIG_I2C=y 500CONFIG_I2C=y
@@ -456,11 +517,11 @@ CONFIG_I2C_CHARDEV=y
456# CONFIG_I2C_AMD8111 is not set 517# CONFIG_I2C_AMD8111 is not set
457# CONFIG_I2C_I801 is not set 518# CONFIG_I2C_I801 is not set
458# CONFIG_I2C_I810 is not set 519# CONFIG_I2C_I810 is not set
520# CONFIG_I2C_PIIX4 is not set
459# CONFIG_I2C_ISA is not set 521# CONFIG_I2C_ISA is not set
460CONFIG_I2C_MPC=y 522CONFIG_I2C_MPC=y
461# CONFIG_I2C_NFORCE2 is not set 523# CONFIG_I2C_NFORCE2 is not set
462# CONFIG_I2C_PARPORT_LIGHT is not set 524# CONFIG_I2C_PARPORT_LIGHT is not set
463# CONFIG_I2C_PIIX4 is not set
464# CONFIG_I2C_PROSAVAGE is not set 525# CONFIG_I2C_PROSAVAGE is not set
465# CONFIG_I2C_SAVAGE4 is not set 526# CONFIG_I2C_SAVAGE4 is not set
466# CONFIG_SCx200_ACB is not set 527# CONFIG_SCx200_ACB is not set
@@ -483,7 +544,9 @@ CONFIG_I2C_MPC=y
483# CONFIG_SENSORS_ASB100 is not set 544# CONFIG_SENSORS_ASB100 is not set
484# CONFIG_SENSORS_DS1621 is not set 545# CONFIG_SENSORS_DS1621 is not set
485# CONFIG_SENSORS_FSCHER is not set 546# CONFIG_SENSORS_FSCHER is not set
547# CONFIG_SENSORS_FSCPOS is not set
486# CONFIG_SENSORS_GL518SM is not set 548# CONFIG_SENSORS_GL518SM is not set
549# CONFIG_SENSORS_GL520SM is not set
487# CONFIG_SENSORS_IT87 is not set 550# CONFIG_SENSORS_IT87 is not set
488# CONFIG_SENSORS_LM63 is not set 551# CONFIG_SENSORS_LM63 is not set
489# CONFIG_SENSORS_LM75 is not set 552# CONFIG_SENSORS_LM75 is not set
@@ -494,9 +557,11 @@ CONFIG_I2C_MPC=y
494# CONFIG_SENSORS_LM85 is not set 557# CONFIG_SENSORS_LM85 is not set
495# CONFIG_SENSORS_LM87 is not set 558# CONFIG_SENSORS_LM87 is not set
496# CONFIG_SENSORS_LM90 is not set 559# CONFIG_SENSORS_LM90 is not set
560# CONFIG_SENSORS_LM92 is not set
497# CONFIG_SENSORS_MAX1619 is not set 561# CONFIG_SENSORS_MAX1619 is not set
498# CONFIG_SENSORS_PC87360 is not set 562# CONFIG_SENSORS_PC87360 is not set
499# CONFIG_SENSORS_SMSC47B397 is not set 563# CONFIG_SENSORS_SMSC47B397 is not set
564# CONFIG_SENSORS_SIS5595 is not set
500# CONFIG_SENSORS_SMSC47M1 is not set 565# CONFIG_SENSORS_SMSC47M1 is not set
501# CONFIG_SENSORS_VIA686A is not set 566# CONFIG_SENSORS_VIA686A is not set
502# CONFIG_SENSORS_W83781D is not set 567# CONFIG_SENSORS_W83781D is not set
@@ -506,10 +571,12 @@ CONFIG_I2C_MPC=y
506# 571#
507# Other I2C Chip support 572# Other I2C Chip support
508# 573#
574# CONFIG_SENSORS_DS1337 is not set
509# CONFIG_SENSORS_EEPROM is not set 575# CONFIG_SENSORS_EEPROM is not set
510# CONFIG_SENSORS_PCF8574 is not set 576# CONFIG_SENSORS_PCF8574 is not set
511# CONFIG_SENSORS_PCF8591 is not set 577# CONFIG_SENSORS_PCF8591 is not set
512# CONFIG_SENSORS_RTC8564 is not set 578# CONFIG_SENSORS_RTC8564 is not set
579# CONFIG_SENSORS_M41T00 is not set
513# CONFIG_I2C_DEBUG_CORE is not set 580# CONFIG_I2C_DEBUG_CORE is not set
514# CONFIG_I2C_DEBUG_ALGO is not set 581# CONFIG_I2C_DEBUG_ALGO is not set
515# CONFIG_I2C_DEBUG_BUS is not set 582# CONFIG_I2C_DEBUG_BUS is not set
@@ -538,7 +605,6 @@ CONFIG_I2C_MPC=y
538# Graphics support 605# Graphics support
539# 606#
540# CONFIG_FB is not set 607# CONFIG_FB is not set
541# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
542 608
543# 609#
544# Sound 610# Sound
@@ -548,13 +614,9 @@ CONFIG_I2C_MPC=y
548# 614#
549# USB support 615# USB support
550# 616#
551# CONFIG_USB is not set
552CONFIG_USB_ARCH_HAS_HCD=y 617CONFIG_USB_ARCH_HAS_HCD=y
553CONFIG_USB_ARCH_HAS_OHCI=y 618CONFIG_USB_ARCH_HAS_OHCI=y
554 619# CONFIG_USB is not set
555#
556# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
557#
558 620
559# 621#
560# USB Gadget Support 622# USB Gadget Support
@@ -585,6 +647,10 @@ CONFIG_JBD=y
585CONFIG_FS_MBCACHE=y 647CONFIG_FS_MBCACHE=y
586# CONFIG_REISERFS_FS is not set 648# CONFIG_REISERFS_FS is not set
587# CONFIG_JFS_FS is not set 649# CONFIG_JFS_FS is not set
650
651#
652# XFS support
653#
588# CONFIG_XFS_FS is not set 654# CONFIG_XFS_FS is not set
589# CONFIG_MINIX_FS is not set 655# CONFIG_MINIX_FS is not set
590# CONFIG_ROMFS_FS is not set 656# CONFIG_ROMFS_FS is not set
@@ -646,7 +712,6 @@ CONFIG_NFS_FS=y
646# CONFIG_NFSD is not set 712# CONFIG_NFSD is not set
647CONFIG_ROOT_NFS=y 713CONFIG_ROOT_NFS=y
648CONFIG_LOCKD=y 714CONFIG_LOCKD=y
649# CONFIG_EXPORTFS is not set
650CONFIG_SUNRPC=y 715CONFIG_SUNRPC=y
651# CONFIG_RPCSEC_GSS_KRB5 is not set 716# CONFIG_RPCSEC_GSS_KRB5 is not set
652# CONFIG_RPCSEC_GSS_SPKM3 is not set 717# CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -698,7 +763,9 @@ CONFIG_CRC32=y
698# 763#
699# Kernel hacking 764# Kernel hacking
700# 765#
766# CONFIG_PRINTK_TIME is not set
701# CONFIG_DEBUG_KERNEL is not set 767# CONFIG_DEBUG_KERNEL is not set
768CONFIG_LOG_BUF_SHIFT=14
702# CONFIG_KGDB_CONSOLE is not set 769# CONFIG_KGDB_CONSOLE is not set
703# CONFIG_SERIAL_TEXT_DEBUG is not set 770# CONFIG_SERIAL_TEXT_DEBUG is not set
704 771
diff --git a/arch/ppc/kernel/head_fsl_booke.S b/arch/ppc/kernel/head_fsl_booke.S
index f22ddce36135..ce36e88ba627 100644
--- a/arch/ppc/kernel/head_fsl_booke.S
+++ b/arch/ppc/kernel/head_fsl_booke.S
@@ -232,7 +232,8 @@ skpinv: addi r6,r6,1 /* Increment */
232 tlbwe 232 tlbwe
233 233
234/* 7. Jump to KERNELBASE mapping */ 234/* 7. Jump to KERNELBASE mapping */
235 li r7,0 235 lis r7,MSR_KERNEL@h
236 ori r7,r7,MSR_KERNEL@l
236 bl 1f /* Find our address */ 237 bl 1f /* Find our address */
2371: mflr r9 2381: mflr r9
238 rlwimi r6,r9,0,20,31 239 rlwimi r6,r9,0,20,31
@@ -293,6 +294,18 @@ skpinv: addi r6,r6,1 /* Increment */
293 mtspr SPRN_HID0, r2 294 mtspr SPRN_HID0, r2
294#endif 295#endif
295 296
297#if !defined(CONFIG_BDI_SWITCH)
298 /*
299 * The Abatron BDI JTAG debugger does not tolerate others
300 * mucking with the debug registers.
301 */
302 lis r2,DBCR0_IDM@h
303 mtspr SPRN_DBCR0,r2
304 /* clear any residual debug events */
305 li r2,-1
306 mtspr SPRN_DBSR,r2
307#endif
308
296 /* 309 /*
297 * This is where the main kernel code starts. 310 * This is where the main kernel code starts.
298 */ 311 */
diff --git a/arch/ppc/kernel/traps.c b/arch/ppc/kernel/traps.c
index f8e7e324a173..c65731e8bc65 100644
--- a/arch/ppc/kernel/traps.c
+++ b/arch/ppc/kernel/traps.c
@@ -408,12 +408,7 @@ static int emulate_string_inst(struct pt_regs *regs, u32 instword)
408 408
409 /* Early out if we are an invalid form of lswx */ 409 /* Early out if we are an invalid form of lswx */
410 if ((instword & INST_STRING_MASK) == INST_LSWX) 410 if ((instword & INST_STRING_MASK) == INST_LSWX)
411 if ((rA >= rT) || (NB_RB >= rT) || (rT == rA) || (rT == NB_RB)) 411 if ((rT == rA) || (rT == NB_RB))
412 return -EINVAL;
413
414 /* Early out if we are an invalid form of lswi */
415 if ((instword & INST_STRING_MASK) == INST_LSWI)
416 if ((rA >= rT) || (rT == rA))
417 return -EINVAL; 412 return -EINVAL;
418 413
419 EA = (rA == 0) ? 0 : regs->gpr[rA]; 414 EA = (rA == 0) ? 0 : regs->gpr[rA];
diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.c b/arch/ppc/platforms/83xx/mpc834x_sys.c
index b3b0f51979d2..e6348b5a1ddc 100644
--- a/arch/ppc/platforms/83xx/mpc834x_sys.c
+++ b/arch/ppc/platforms/83xx/mpc834x_sys.c
@@ -127,7 +127,6 @@ mpc834x_sys_map_io(void)
127{ 127{
128 /* we steal the lowest ioremap addr for virt space */ 128 /* we steal the lowest ioremap addr for virt space */
129 io_block_mapping(VIRT_IMMRBAR, immrbar, 1024*1024, _PAGE_IO); 129 io_block_mapping(VIRT_IMMRBAR, immrbar, 1024*1024, _PAGE_IO);
130 io_block_mapping(BCSR_VIRT_ADDR, BCSR_PHYS_ADDR, BCSR_SIZE, _PAGE_IO);
131} 130}
132 131
133int 132int
diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.h b/arch/ppc/platforms/83xx/mpc834x_sys.h
index f4d055ae19c1..a2f6e49d7151 100644
--- a/arch/ppc/platforms/83xx/mpc834x_sys.h
+++ b/arch/ppc/platforms/83xx/mpc834x_sys.h
@@ -26,9 +26,14 @@
26#define VIRT_IMMRBAR ((uint)0xfe000000) 26#define VIRT_IMMRBAR ((uint)0xfe000000)
27 27
28#define BCSR_PHYS_ADDR ((uint)0xf8000000) 28#define BCSR_PHYS_ADDR ((uint)0xf8000000)
29#define BCSR_VIRT_ADDR ((uint)0xfe100000)
30#define BCSR_SIZE ((uint)(32 * 1024)) 29#define BCSR_SIZE ((uint)(32 * 1024))
31 30
31#define BCSR_MISC_REG2_OFF 0x07
32#define BCSR_MISC_REG2_PORESET 0x01
33
34#define BCSR_MISC_REG3_OFF 0x08
35#define BCSR_MISC_REG3_CNFLOCK 0x80
36
32#ifdef CONFIG_PCI 37#ifdef CONFIG_PCI
33/* PCI interrupt controller */ 38/* PCI interrupt controller */
34#define PIRQA MPC83xx_IRQ_IRQ4 39#define PIRQA MPC83xx_IRQ_IRQ4
diff --git a/arch/ppc/platforms/85xx/mpc8540_ads.c b/arch/ppc/platforms/85xx/mpc8540_ads.c
index 4d857d6d633d..583838ab02d8 100644
--- a/arch/ppc/platforms/85xx/mpc8540_ads.c
+++ b/arch/ppc/platforms/85xx/mpc8540_ads.c
@@ -210,6 +210,9 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
210#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG) 210#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
211 ppc_md.progress = gen550_progress; 211 ppc_md.progress = gen550_progress;
212#endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */ 212#endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
213#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_KGDB)
214 ppc_md.early_serial_map = mpc85xx_early_serial_map;
215#endif /* CONFIG_SERIAL_8250 && CONFIG_KGDB */
213 216
214 if (ppc_md.progress) 217 if (ppc_md.progress)
215 ppc_md.progress("mpc8540ads_init(): exit", 0); 218 ppc_md.progress("mpc8540ads_init(): exit", 0);
diff --git a/arch/ppc/platforms/85xx/mpc85xx_cds_common.c b/arch/ppc/platforms/85xx/mpc85xx_cds_common.c
index 6c020d67ad70..e7cfa498568c 100644
--- a/arch/ppc/platforms/85xx/mpc85xx_cds_common.c
+++ b/arch/ppc/platforms/85xx/mpc85xx_cds_common.c
@@ -44,6 +44,7 @@
44#include <asm/machdep.h> 44#include <asm/machdep.h>
45#include <asm/prom.h> 45#include <asm/prom.h>
46#include <asm/open_pic.h> 46#include <asm/open_pic.h>
47#include <asm/i8259.h>
47#include <asm/bootinfo.h> 48#include <asm/bootinfo.h>
48#include <asm/pci-bridge.h> 49#include <asm/pci-bridge.h>
49#include <asm/mpc85xx.h> 50#include <asm/mpc85xx.h>
@@ -181,6 +182,7 @@ void __init
181mpc85xx_cds_init_IRQ(void) 182mpc85xx_cds_init_IRQ(void)
182{ 183{
183 bd_t *binfo = (bd_t *) __res; 184 bd_t *binfo = (bd_t *) __res;
185 int i;
184 186
185 /* Determine the Physical Address of the OpenPIC regs */ 187 /* Determine the Physical Address of the OpenPIC regs */
186 phys_addr_t OpenPIC_PAddr = binfo->bi_immr_base + MPC85xx_OPENPIC_OFFSET; 188 phys_addr_t OpenPIC_PAddr = binfo->bi_immr_base + MPC85xx_OPENPIC_OFFSET;
@@ -198,6 +200,15 @@ mpc85xx_cds_init_IRQ(void)
198 */ 200 */
199 openpic_init(MPC85xx_OPENPIC_IRQ_OFFSET); 201 openpic_init(MPC85xx_OPENPIC_IRQ_OFFSET);
200 202
203#ifdef CONFIG_PCI
204 openpic_hookup_cascade(PIRQ0A, "82c59 cascade", i8259_irq);
205
206 for (i = 0; i < NUM_8259_INTERRUPTS; i++)
207 irq_desc[i].handler = &i8259_pic;
208
209 i8259_init(0);
210#endif
211
201#ifdef CONFIG_CPM2 212#ifdef CONFIG_CPM2
202 /* Setup CPM2 PIC */ 213 /* Setup CPM2 PIC */
203 cpm2_init_IRQ(); 214 cpm2_init_IRQ();
@@ -231,7 +242,7 @@ mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
231 * interrupt on slot */ 242 * interrupt on slot */
232 { 243 {
233 { 0, 1, 2, 3 }, /* 16 - PMC */ 244 { 0, 1, 2, 3 }, /* 16 - PMC */
234 { 3, 0, 0, 0 }, /* 17 P2P (Tsi320) */ 245 { 0, 1, 2, 3 }, /* 17 P2P (Tsi320) */
235 { 0, 1, 2, 3 }, /* 18 - Slot 1 */ 246 { 0, 1, 2, 3 }, /* 18 - Slot 1 */
236 { 1, 2, 3, 0 }, /* 19 - Slot 2 */ 247 { 1, 2, 3, 0 }, /* 19 - Slot 2 */
237 { 2, 3, 0, 1 }, /* 20 - Slot 3 */ 248 { 2, 3, 0, 1 }, /* 20 - Slot 3 */
@@ -280,13 +291,135 @@ mpc85xx_exclude_device(u_char bus, u_char devfn)
280 return PCIBIOS_DEVICE_NOT_FOUND; 291 return PCIBIOS_DEVICE_NOT_FOUND;
281#endif 292#endif
282 /* We explicitly do not go past the Tundra 320 Bridge */ 293 /* We explicitly do not go past the Tundra 320 Bridge */
283 if (bus == 1) 294 if ((bus == 1) && (PCI_SLOT(devfn) == ARCADIA_2ND_BRIDGE_IDSEL))
284 return PCIBIOS_DEVICE_NOT_FOUND; 295 return PCIBIOS_DEVICE_NOT_FOUND;
285 if ((bus == 0) && (PCI_SLOT(devfn) == ARCADIA_2ND_BRIDGE_IDSEL)) 296 if ((bus == 0) && (PCI_SLOT(devfn) == ARCADIA_2ND_BRIDGE_IDSEL))
286 return PCIBIOS_DEVICE_NOT_FOUND; 297 return PCIBIOS_DEVICE_NOT_FOUND;
287 else 298 else
288 return PCIBIOS_SUCCESSFUL; 299 return PCIBIOS_SUCCESSFUL;
289} 300}
301
302void __init
303mpc85xx_cds_enable_via(struct pci_controller *hose)
304{
305 u32 pci_class;
306 u16 vid, did;
307
308 early_read_config_dword(hose, 0, 0x88, PCI_CLASS_REVISION, &pci_class);
309 if ((pci_class >> 16) != PCI_CLASS_BRIDGE_PCI)
310 return;
311
312 /* Configure P2P so that we can reach bus 1 */
313 early_write_config_byte(hose, 0, 0x88, PCI_PRIMARY_BUS, 0);
314 early_write_config_byte(hose, 0, 0x88, PCI_SECONDARY_BUS, 1);
315 early_write_config_byte(hose, 0, 0x88, PCI_SUBORDINATE_BUS, 0xff);
316
317 early_read_config_word(hose, 1, 0x10, PCI_VENDOR_ID, &vid);
318 early_read_config_word(hose, 1, 0x10, PCI_DEVICE_ID, &did);
319
320 if ((vid != PCI_VENDOR_ID_VIA) ||
321 (did != PCI_DEVICE_ID_VIA_82C686))
322 return;
323
324 /* Enable USB and IDE functions */
325 early_write_config_byte(hose, 1, 0x10, 0x48, 0x08);
326}
327
328void __init
329mpc85xx_cds_fixup_via(struct pci_controller *hose)
330{
331 u32 pci_class;
332 u16 vid, did;
333
334 early_read_config_dword(hose, 0, 0x88, PCI_CLASS_REVISION, &pci_class);
335 if ((pci_class >> 16) != PCI_CLASS_BRIDGE_PCI)
336 return;
337
338 /*
339 * Force the backplane P2P bridge to have a window
340 * open from 0x00000000-0x00001fff in PCI I/O space.
341 * This allows legacy I/O (i8259, etc) on the VIA
342 * southbridge to be accessed.
343 */
344 early_write_config_byte(hose, 0, 0x88, PCI_IO_BASE, 0x00);
345 early_write_config_word(hose, 0, 0x88, PCI_IO_BASE_UPPER16, 0x0000);
346 early_write_config_byte(hose, 0, 0x88, PCI_IO_LIMIT, 0x10);
347 early_write_config_word(hose, 0, 0x88, PCI_IO_LIMIT_UPPER16, 0x0000);
348
349 early_read_config_word(hose, 1, 0x10, PCI_VENDOR_ID, &vid);
350 early_read_config_word(hose, 1, 0x10, PCI_DEVICE_ID, &did);
351 if ((vid != PCI_VENDOR_ID_VIA) ||
352 (did != PCI_DEVICE_ID_VIA_82C686))
353 return;
354
355 /*
356 * Since the P2P window was forced to cover the fixed
357 * legacy I/O addresses, it is necessary to manually
358 * place the base addresses for the IDE and USB functions
359 * within this window.
360 */
361 /* Function 1, IDE */
362 early_write_config_dword(hose, 1, 0x11, PCI_BASE_ADDRESS_0, 0x1ff8);
363 early_write_config_dword(hose, 1, 0x11, PCI_BASE_ADDRESS_1, 0x1ff4);
364 early_write_config_dword(hose, 1, 0x11, PCI_BASE_ADDRESS_2, 0x1fe8);
365 early_write_config_dword(hose, 1, 0x11, PCI_BASE_ADDRESS_3, 0x1fe4);
366 early_write_config_dword(hose, 1, 0x11, PCI_BASE_ADDRESS_4, 0x1fd0);
367
368 /* Function 2, USB ports 0-1 */
369 early_write_config_dword(hose, 1, 0x12, PCI_BASE_ADDRESS_4, 0x1fa0);
370
371 /* Function 3, USB ports 2-3 */
372 early_write_config_dword(hose, 1, 0x13, PCI_BASE_ADDRESS_4, 0x1f80);
373
374 /* Function 5, Power Management */
375 early_write_config_dword(hose, 1, 0x15, PCI_BASE_ADDRESS_0, 0x1e00);
376 early_write_config_dword(hose, 1, 0x15, PCI_BASE_ADDRESS_1, 0x1dfc);
377 early_write_config_dword(hose, 1, 0x15, PCI_BASE_ADDRESS_2, 0x1df8);
378
379 /* Function 6, AC97 Interface */
380 early_write_config_dword(hose, 1, 0x16, PCI_BASE_ADDRESS_0, 0x1c00);
381}
382
383void __init
384mpc85xx_cds_pcibios_fixup(void)
385{
386 struct pci_dev *dev = NULL;
387 u_char c;
388
389 if ((dev = pci_find_device(PCI_VENDOR_ID_VIA,
390 PCI_DEVICE_ID_VIA_82C586_1, NULL))) {
391 /*
392 * U-Boot does not set the enable bits
393 * for the IDE device. Force them on here.
394 */
395 pci_read_config_byte(dev, 0x40, &c);
396 c |= 0x03; /* IDE: Chip Enable Bits */
397 pci_write_config_byte(dev, 0x40, c);
398
399 /*
400 * Since only primary interface works, force the
401 * IDE function to standard primary IDE interrupt
402 * w/ 8259 offset
403 */
404 dev->irq = 14;
405 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
406 }
407
408 /*
409 * Force legacy USB interrupt routing
410 */
411 if ((dev = pci_find_device(PCI_VENDOR_ID_VIA,
412 PCI_DEVICE_ID_VIA_82C586_2, NULL))) {
413 dev->irq = 10;
414 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 10);
415 }
416
417 if ((dev = pci_find_device(PCI_VENDOR_ID_VIA,
418 PCI_DEVICE_ID_VIA_82C586_2, dev))) {
419 dev->irq = 11;
420 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11);
421 }
422}
290#endif /* CONFIG_PCI */ 423#endif /* CONFIG_PCI */
291 424
292TODC_ALLOC(); 425TODC_ALLOC();
@@ -328,6 +461,9 @@ mpc85xx_cds_setup_arch(void)
328 loops_per_jiffy = freq / HZ; 461 loops_per_jiffy = freq / HZ;
329 462
330#ifdef CONFIG_PCI 463#ifdef CONFIG_PCI
464 /* VIA IDE configuration */
465 ppc_md.pcibios_fixup = mpc85xx_cds_pcibios_fixup;
466
331 /* setup PCI host bridges */ 467 /* setup PCI host bridges */
332 mpc85xx_setup_hose(); 468 mpc85xx_setup_hose();
333#endif 469#endif
@@ -459,6 +595,9 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
459#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG) 595#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
460 ppc_md.progress = gen550_progress; 596 ppc_md.progress = gen550_progress;
461#endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */ 597#endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
598#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_KGDB)
599 ppc_md.early_serial_map = mpc85xx_early_serial_map;
600#endif /* CONFIG_SERIAL_8250 && CONFIG_KGDB */
462 601
463 if (ppc_md.progress) 602 if (ppc_md.progress)
464 ppc_md.progress("mpc85xx_cds_init(): exit", 0); 603 ppc_md.progress("mpc85xx_cds_init(): exit", 0);
diff --git a/arch/ppc/platforms/85xx/mpc85xx_cds_common.h b/arch/ppc/platforms/85xx/mpc85xx_cds_common.h
index 7627d77504bd..12b292c6ae32 100644
--- a/arch/ppc/platforms/85xx/mpc85xx_cds_common.h
+++ b/arch/ppc/platforms/85xx/mpc85xx_cds_common.h
@@ -77,4 +77,7 @@
77 77
78#define MPC85XX_PCI2_IO_SIZE 0x01000000 78#define MPC85XX_PCI2_IO_SIZE 0x01000000
79 79
80#define NR_8259_INTS 16
81#define CPM_IRQ_OFFSET NR_8259_INTS
82
80#endif /* __MACH_MPC85XX_CDS_H__ */ 83#endif /* __MACH_MPC85XX_CDS_H__ */
diff --git a/arch/ppc/platforms/85xx/sbc8560.c b/arch/ppc/platforms/85xx/sbc8560.c
index 9ab05e590c3e..7b9e1543e175 100644
--- a/arch/ppc/platforms/85xx/sbc8560.c
+++ b/arch/ppc/platforms/85xx/sbc8560.c
@@ -221,6 +221,9 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
221#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG) 221#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
222 ppc_md.progress = gen550_progress; 222 ppc_md.progress = gen550_progress;
223#endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */ 223#endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
224#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_KGDB)
225 ppc_md.early_serial_map = sbc8560_early_serial_map;
226#endif /* CONFIG_SERIAL_8250 && CONFIG_KGDB */
224 227
225 if (ppc_md.progress) 228 if (ppc_md.progress)
226 ppc_md.progress("sbc8560_init(): exit", 0); 229 ppc_md.progress("sbc8560_init(): exit", 0);
diff --git a/arch/ppc/platforms/pmac_cpufreq.c b/arch/ppc/platforms/pmac_cpufreq.c
index f7fb2786cd50..937f46df711e 100644
--- a/arch/ppc/platforms/pmac_cpufreq.c
+++ b/arch/ppc/platforms/pmac_cpufreq.c
@@ -85,14 +85,11 @@ static int no_schedule;
85static int has_cpu_l2lve; 85static int has_cpu_l2lve;
86 86
87 87
88#define PMAC_CPU_LOW_SPEED 1
89#define PMAC_CPU_HIGH_SPEED 0
90
91/* There are only two frequency states for each processor. Values 88/* There are only two frequency states for each processor. Values
92 * are in kHz for the time being. 89 * are in kHz for the time being.
93 */ 90 */
94#define CPUFREQ_HIGH PMAC_CPU_HIGH_SPEED 91#define CPUFREQ_HIGH 0
95#define CPUFREQ_LOW PMAC_CPU_LOW_SPEED 92#define CPUFREQ_LOW 1
96 93
97static struct cpufreq_frequency_table pmac_cpu_freqs[] = { 94static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
98 {CPUFREQ_HIGH, 0}, 95 {CPUFREQ_HIGH, 0},
@@ -100,6 +97,11 @@ static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
100 {0, CPUFREQ_TABLE_END}, 97 {0, CPUFREQ_TABLE_END},
101}; 98};
102 99
100static struct freq_attr* pmac_cpu_freqs_attr[] = {
101 &cpufreq_freq_attr_scaling_available_freqs,
102 NULL,
103};
104
103static inline void local_delay(unsigned long ms) 105static inline void local_delay(unsigned long ms)
104{ 106{
105 if (no_schedule) 107 if (no_schedule)
@@ -269,6 +271,8 @@ static int __pmac pmu_set_cpu_speed(int low_speed)
269#ifdef DEBUG_FREQ 271#ifdef DEBUG_FREQ
270 printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1)); 272 printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
271#endif 273#endif
274 pmu_suspend();
275
272 /* Disable all interrupt sources on openpic */ 276 /* Disable all interrupt sources on openpic */
273 pic_prio = openpic_get_priority(); 277 pic_prio = openpic_get_priority();
274 openpic_set_priority(0xf); 278 openpic_set_priority(0xf);
@@ -343,6 +347,8 @@ static int __pmac pmu_set_cpu_speed(int low_speed)
343 debug_calc_bogomips(); 347 debug_calc_bogomips();
344#endif 348#endif
345 349
350 pmu_resume();
351
346 preempt_enable(); 352 preempt_enable();
347 353
348 return 0; 354 return 0;
@@ -355,7 +361,7 @@ static int __pmac do_set_cpu_speed(int speed_mode, int notify)
355 static unsigned long prev_l3cr; 361 static unsigned long prev_l3cr;
356 362
357 freqs.old = cur_freq; 363 freqs.old = cur_freq;
358 freqs.new = (speed_mode == PMAC_CPU_HIGH_SPEED) ? hi_freq : low_freq; 364 freqs.new = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
359 freqs.cpu = smp_processor_id(); 365 freqs.cpu = smp_processor_id();
360 366
361 if (freqs.old == freqs.new) 367 if (freqs.old == freqs.new)
@@ -363,7 +369,7 @@ static int __pmac do_set_cpu_speed(int speed_mode, int notify)
363 369
364 if (notify) 370 if (notify)
365 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); 371 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
366 if (speed_mode == PMAC_CPU_LOW_SPEED && 372 if (speed_mode == CPUFREQ_LOW &&
367 cpu_has_feature(CPU_FTR_L3CR)) { 373 cpu_has_feature(CPU_FTR_L3CR)) {
368 l3cr = _get_L3CR(); 374 l3cr = _get_L3CR();
369 if (l3cr & L3CR_L3E) { 375 if (l3cr & L3CR_L3E) {
@@ -371,8 +377,8 @@ static int __pmac do_set_cpu_speed(int speed_mode, int notify)
371 _set_L3CR(0); 377 _set_L3CR(0);
372 } 378 }
373 } 379 }
374 set_speed_proc(speed_mode == PMAC_CPU_LOW_SPEED); 380 set_speed_proc(speed_mode == CPUFREQ_LOW);
375 if (speed_mode == PMAC_CPU_HIGH_SPEED && 381 if (speed_mode == CPUFREQ_HIGH &&
376 cpu_has_feature(CPU_FTR_L3CR)) { 382 cpu_has_feature(CPU_FTR_L3CR)) {
377 l3cr = _get_L3CR(); 383 l3cr = _get_L3CR();
378 if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr) 384 if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
@@ -380,7 +386,7 @@ static int __pmac do_set_cpu_speed(int speed_mode, int notify)
380 } 386 }
381 if (notify) 387 if (notify)
382 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); 388 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
383 cur_freq = (speed_mode == PMAC_CPU_HIGH_SPEED) ? hi_freq : low_freq; 389 cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
384 390
385 return 0; 391 return 0;
386} 392}
@@ -423,7 +429,8 @@ static int __pmac pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
423 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 429 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
424 policy->cur = cur_freq; 430 policy->cur = cur_freq;
425 431
426 return cpufreq_frequency_table_cpuinfo(policy, &pmac_cpu_freqs[0]); 432 cpufreq_frequency_table_get_attr(pmac_cpu_freqs, policy->cpu);
433 return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs);
427} 434}
428 435
429static u32 __pmac read_gpio(struct device_node *np) 436static u32 __pmac read_gpio(struct device_node *np)
@@ -457,7 +464,7 @@ static int __pmac pmac_cpufreq_suspend(struct cpufreq_policy *policy, u32 state)
457 no_schedule = 1; 464 no_schedule = 1;
458 sleep_freq = cur_freq; 465 sleep_freq = cur_freq;
459 if (cur_freq == low_freq) 466 if (cur_freq == low_freq)
460 do_set_cpu_speed(PMAC_CPU_HIGH_SPEED, 0); 467 do_set_cpu_speed(CPUFREQ_HIGH, 0);
461 return 0; 468 return 0;
462} 469}
463 470
@@ -473,8 +480,8 @@ static int __pmac pmac_cpufreq_resume(struct cpufreq_policy *policy)
473 * is that we force a switch to whatever it was, which is 480 * is that we force a switch to whatever it was, which is
474 * probably high speed due to our suspend() routine 481 * probably high speed due to our suspend() routine
475 */ 482 */
476 do_set_cpu_speed(sleep_freq == low_freq ? PMAC_CPU_LOW_SPEED 483 do_set_cpu_speed(sleep_freq == low_freq ?
477 : PMAC_CPU_HIGH_SPEED, 0); 484 CPUFREQ_LOW : CPUFREQ_HIGH, 0);
478 485
479 no_schedule = 0; 486 no_schedule = 0;
480 return 0; 487 return 0;
@@ -488,6 +495,7 @@ static struct cpufreq_driver pmac_cpufreq_driver = {
488 .suspend = pmac_cpufreq_suspend, 495 .suspend = pmac_cpufreq_suspend,
489 .resume = pmac_cpufreq_resume, 496 .resume = pmac_cpufreq_resume,
490 .flags = CPUFREQ_PM_NO_WARN, 497 .flags = CPUFREQ_PM_NO_WARN,
498 .attr = pmac_cpu_freqs_attr,
491 .name = "powermac", 499 .name = "powermac",
492 .owner = THIS_MODULE, 500 .owner = THIS_MODULE,
493}; 501};
diff --git a/arch/ppc/platforms/pq2ads.h b/arch/ppc/platforms/pq2ads.h
index cf5e5dd06d63..067d9a5aebc1 100644
--- a/arch/ppc/platforms/pq2ads.h
+++ b/arch/ppc/platforms/pq2ads.h
@@ -49,10 +49,10 @@
49/* PCI interrupt controller */ 49/* PCI interrupt controller */
50#define PCI_INT_STAT_REG 0xF8200000 50#define PCI_INT_STAT_REG 0xF8200000
51#define PCI_INT_MASK_REG 0xF8200004 51#define PCI_INT_MASK_REG 0xF8200004
52#define PIRQA (NR_SIU_INTS + 0) 52#define PIRQA (NR_CPM_INTS + 0)
53#define PIRQB (NR_SIU_INTS + 1) 53#define PIRQB (NR_CPM_INTS + 1)
54#define PIRQC (NR_SIU_INTS + 2) 54#define PIRQC (NR_CPM_INTS + 2)
55#define PIRQD (NR_SIU_INTS + 3) 55#define PIRQD (NR_CPM_INTS + 3)
56 56
57/* 57/*
58 * PCI memory map definitions for MPC8266ADS-PCI. 58 * PCI memory map definitions for MPC8266ADS-PCI.
@@ -68,28 +68,23 @@
68 * 0x00000000-0x1FFFFFFF 0x00000000-0x1FFFFFFF MPC8266 local memory 68 * 0x00000000-0x1FFFFFFF 0x00000000-0x1FFFFFFF MPC8266 local memory
69 */ 69 */
70 70
71/* window for a PCI master to access MPC8266 memory */ 71/* All the other PCI memory map definitions reside at syslib/m82xx_pci.h
72#define PCI_SLV_MEM_LOCAL 0x00000000 /* Local base */ 72 Here we should redefine what is unique for this board */
73#define PCI_SLV_MEM_BUS 0x00000000 /* PCI base */ 73#define M82xx_PCI_SLAVE_MEM_LOCAL 0x00000000 /* Local base */
74#define M82xx_PCI_SLAVE_MEM_BUS 0x00000000 /* PCI base */
75#define M82xx_PCI_SLAVE_MEM_SIZE 0x10000000 /* 256 Mb */
74 76
75/* window for the processor to access PCI memory with prefetching */ 77#define M82xx_PCI_SLAVE_SEC_WND_SIZE ~(0x40000000 - 1U) /* 2 x 512Mb */
76#define PCI_MSTR_MEM_LOCAL 0x80000000 /* Local base */ 78#define M82xx_PCI_SLAVE_SEC_WND_BASE 0x80000000 /* PCI Memory base */
77#define PCI_MSTR_MEM_BUS 0x80000000 /* PCI base */
78#define PCI_MSTR_MEM_SIZE 0x20000000 /* 512MB */
79 79
80/* window for the processor to access PCI memory without prefetching */ 80#if defined(CONFIG_ADS8272)
81#define PCI_MSTR_MEMIO_LOCAL 0xA0000000 /* Local base */ 81#define PCI_INT_TO_SIU SIU_INT_IRQ2
82#define PCI_MSTR_MEMIO_BUS 0xA0000000 /* PCI base */ 82#elif defined(CONFIG_PQ2FADS)
83#define PCI_MSTR_MEMIO_SIZE 0x20000000 /* 512MB */ 83#define PCI_INT_TO_SIU SIU_INT_IRQ6
84#else
85#warning PCI Bridge will be without interrupts support
86#endif
84 87
85/* window for the processor to access PCI I/O */
86#define PCI_MSTR_IO_LOCAL 0xF4000000 /* Local base */
87#define PCI_MSTR_IO_BUS 0x00000000 /* PCI base */
88#define PCI_MSTR_IO_SIZE 0x04000000 /* 64MB */
89
90#define _IO_BASE PCI_MSTR_IO_LOCAL
91#define _ISA_MEM_BASE PCI_MSTR_MEMIO_LOCAL
92#define PCI_DRAM_OFFSET PCI_SLV_MEM_BUS
93#endif /* CONFIG_PCI */ 88#endif /* CONFIG_PCI */
94 89
95#endif /* __MACH_ADS8260_DEFS */ 90#endif /* __MACH_ADS8260_DEFS */
diff --git a/arch/ppc/syslib/Makefile b/arch/ppc/syslib/Makefile
index dd418ea3426c..96acf85800d4 100644
--- a/arch/ppc/syslib/Makefile
+++ b/arch/ppc/syslib/Makefile
@@ -81,7 +81,7 @@ obj-$(CONFIG_SBC82xx) += todc_time.o
81obj-$(CONFIG_SPRUCE) += cpc700_pic.o indirect_pci.o pci_auto.o \ 81obj-$(CONFIG_SPRUCE) += cpc700_pic.o indirect_pci.o pci_auto.o \
82 todc_time.o 82 todc_time.o
83obj-$(CONFIG_8260) += m8260_setup.o 83obj-$(CONFIG_8260) += m8260_setup.o
84obj-$(CONFIG_PCI_8260) += m8260_pci.o indirect_pci.o 84obj-$(CONFIG_PCI_8260) += m82xx_pci.o indirect_pci.o pci_auto.o
85obj-$(CONFIG_8260_PCI9) += m8260_pci_erratum9.o 85obj-$(CONFIG_8260_PCI9) += m8260_pci_erratum9.o
86obj-$(CONFIG_CPM2) += cpm2_common.o cpm2_pic.o 86obj-$(CONFIG_CPM2) += cpm2_common.o cpm2_pic.o
87ifeq ($(CONFIG_PPC_GEN550),y) 87ifeq ($(CONFIG_PPC_GEN550),y)
@@ -97,7 +97,7 @@ obj-$(CONFIG_MPC10X_OPENPIC) += open_pic.o
97obj-$(CONFIG_40x) += dcr.o 97obj-$(CONFIG_40x) += dcr.o
98obj-$(CONFIG_BOOKE) += dcr.o 98obj-$(CONFIG_BOOKE) += dcr.o
99obj-$(CONFIG_85xx) += open_pic.o ppc85xx_common.o ppc85xx_setup.o \ 99obj-$(CONFIG_85xx) += open_pic.o ppc85xx_common.o ppc85xx_setup.o \
100 ppc_sys.o mpc85xx_sys.o \ 100 ppc_sys.o i8259.o mpc85xx_sys.o \
101 mpc85xx_devices.o 101 mpc85xx_devices.o
102ifeq ($(CONFIG_85xx),y) 102ifeq ($(CONFIG_85xx),y)
103obj-$(CONFIG_PCI) += indirect_pci.o pci_auto.o 103obj-$(CONFIG_PCI) += indirect_pci.o pci_auto.o
diff --git a/arch/ppc/syslib/m8260_pci.c b/arch/ppc/syslib/m8260_pci.c
deleted file mode 100644
index 057cc3f8ff37..000000000000
--- a/arch/ppc/syslib/m8260_pci.c
+++ /dev/null
@@ -1,193 +0,0 @@
1/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * (C) Copyright 2004 Red Hat, Inc.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <linux/kernel.h>
27#include <linux/init.h>
28#include <linux/pci.h>
29#include <linux/slab.h>
30#include <linux/delay.h>
31
32#include <asm/byteorder.h>
33#include <asm/io.h>
34#include <asm/irq.h>
35#include <asm/uaccess.h>
36#include <asm/machdep.h>
37#include <asm/pci-bridge.h>
38#include <asm/immap_cpm2.h>
39#include <asm/mpc8260.h>
40
41#include "m8260_pci.h"
42
43
44/* PCI bus configuration registers.
45 */
46
47static void __init m8260_setup_pci(struct pci_controller *hose)
48{
49 volatile cpm2_map_t *immap = cpm2_immr;
50 unsigned long pocmr;
51 u16 tempShort;
52
53#ifndef CONFIG_ATC /* already done in U-Boot */
54 /*
55 * Setting required to enable IRQ1-IRQ7 (SIUMCR [DPPC]),
56 * and local bus for PCI (SIUMCR [LBPC]).
57 */
58 immap->im_siu_conf.siu_82xx.sc_siumcr = 0x00640000;
59#endif
60
61 /* Make PCI lowest priority */
62 /* Each 4 bits is a device bus request and the MS 4bits
63 is highest priority */
64 /* Bus 4bit value
65 --- ----------
66 CPM high 0b0000
67 CPM middle 0b0001
68 CPM low 0b0010
69 PCI reguest 0b0011
70 Reserved 0b0100
71 Reserved 0b0101
72 Internal Core 0b0110
73 External Master 1 0b0111
74 External Master 2 0b1000
75 External Master 3 0b1001
76 The rest are reserved */
77 immap->im_siu_conf.siu_82xx.sc_ppc_alrh = 0x61207893;
78
79 /* Park bus on core while modifying PCI Bus accesses */
80 immap->im_siu_conf.siu_82xx.sc_ppc_acr = 0x6;
81
82 /*
83 * Set up master window that allows the CPU to access PCI space. This
84 * window is set up using the first SIU PCIBR registers.
85 */
86 immap->im_memctl.memc_pcimsk0 = MPC826x_PCI_MASK;
87 immap->im_memctl.memc_pcibr0 = MPC826x_PCI_BASE | PCIBR_ENABLE;
88
89 /* Disable machine check on no response or target abort */
90 immap->im_pci.pci_emr = cpu_to_le32(0x1fe7);
91 /* Release PCI RST (by default the PCI RST signal is held low) */
92 immap->im_pci.pci_gcr = cpu_to_le32(PCIGCR_PCI_BUS_EN);
93
94 /* give it some time */
95 mdelay(1);
96
97 /*
98 * Set up master window that allows the CPU to access PCI Memory (prefetch)
99 * space. This window is set up using the first set of Outbound ATU registers.
100 */
101 immap->im_pci.pci_potar0 = cpu_to_le32(MPC826x_PCI_LOWER_MEM >> 12);
102 immap->im_pci.pci_pobar0 = cpu_to_le32((MPC826x_PCI_LOWER_MEM - MPC826x_PCI_MEM_OFFSET) >> 12);
103 pocmr = ((MPC826x_PCI_UPPER_MEM - MPC826x_PCI_LOWER_MEM) >> 12) ^ 0xfffff;
104 immap->im_pci.pci_pocmr0 = cpu_to_le32(pocmr | POCMR_ENABLE | POCMR_PREFETCH_EN);
105
106 /*
107 * Set up master window that allows the CPU to access PCI Memory (non-prefetch)
108 * space. This window is set up using the second set of Outbound ATU registers.
109 */
110 immap->im_pci.pci_potar1 = cpu_to_le32(MPC826x_PCI_LOWER_MMIO >> 12);
111 immap->im_pci.pci_pobar1 = cpu_to_le32((MPC826x_PCI_LOWER_MMIO - MPC826x_PCI_MMIO_OFFSET) >> 12);
112 pocmr = ((MPC826x_PCI_UPPER_MMIO - MPC826x_PCI_LOWER_MMIO) >> 12) ^ 0xfffff;
113 immap->im_pci.pci_pocmr1 = cpu_to_le32(pocmr | POCMR_ENABLE);
114
115 /*
116 * Set up master window that allows the CPU to access PCI IO space. This window
117 * is set up using the third set of Outbound ATU registers.
118 */
119 immap->im_pci.pci_potar2 = cpu_to_le32(MPC826x_PCI_IO_BASE >> 12);
120 immap->im_pci.pci_pobar2 = cpu_to_le32(MPC826x_PCI_LOWER_IO >> 12);
121 pocmr = ((MPC826x_PCI_UPPER_IO - MPC826x_PCI_LOWER_IO) >> 12) ^ 0xfffff;
122 immap->im_pci.pci_pocmr2 = cpu_to_le32(pocmr | POCMR_ENABLE | POCMR_PCI_IO);
123
124 /*
125 * Set up slave window that allows PCI masters to access MPC826x local memory.
126 * This window is set up using the first set of Inbound ATU registers
127 */
128
129 immap->im_pci.pci_pitar0 = cpu_to_le32(MPC826x_PCI_SLAVE_MEM_LOCAL >> 12);
130 immap->im_pci.pci_pibar0 = cpu_to_le32(MPC826x_PCI_SLAVE_MEM_BUS >> 12);
131 pocmr = ((MPC826x_PCI_SLAVE_MEM_SIZE-1) >> 12) ^ 0xfffff;
132 immap->im_pci.pci_picmr0 = cpu_to_le32(pocmr | PICMR_ENABLE | PICMR_PREFETCH_EN);
133
134 /* See above for description - puts PCI request as highest priority */
135 immap->im_siu_conf.siu_82xx.sc_ppc_alrh = 0x03124567;
136
137 /* Park the bus on the PCI */
138 immap->im_siu_conf.siu_82xx.sc_ppc_acr = PPC_ACR_BUS_PARK_PCI;
139
140 /* Host mode - specify the bridge as a host-PCI bridge */
141 early_write_config_word(hose, 0, 0, PCI_CLASS_DEVICE, PCI_CLASS_BRIDGE_HOST);
142
143 /* Enable the host bridge to be a master on the PCI bus, and to act as a PCI memory target */
144 early_read_config_word(hose, 0, 0, PCI_COMMAND, &tempShort);
145 early_write_config_word(hose, 0, 0, PCI_COMMAND,
146 tempShort | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
147}
148
149void __init m8260_find_bridges(void)
150{
151 extern int pci_assign_all_busses;
152 struct pci_controller * hose;
153
154 pci_assign_all_busses = 1;
155
156 hose = pcibios_alloc_controller();
157
158 if (!hose)
159 return;
160
161 ppc_md.pci_swizzle = common_swizzle;
162
163 hose->first_busno = 0;
164 hose->bus_offset = 0;
165 hose->last_busno = 0xff;
166
167 setup_m8260_indirect_pci(hose,
168 (unsigned long)&cpm2_immr->im_pci.pci_cfg_addr,
169 (unsigned long)&cpm2_immr->im_pci.pci_cfg_data);
170
171 m8260_setup_pci(hose);
172 hose->pci_mem_offset = MPC826x_PCI_MEM_OFFSET;
173
174 hose->io_base_virt = ioremap(MPC826x_PCI_IO_BASE,
175 MPC826x_PCI_IO_SIZE);
176 isa_io_base = (unsigned long) hose->io_base_virt;
177
178 /* setup resources */
179 pci_init_resource(&hose->mem_resources[0],
180 MPC826x_PCI_LOWER_MEM,
181 MPC826x_PCI_UPPER_MEM,
182 IORESOURCE_MEM|IORESOURCE_PREFETCH, "PCI prefetchable memory");
183
184 pci_init_resource(&hose->mem_resources[1],
185 MPC826x_PCI_LOWER_MMIO,
186 MPC826x_PCI_UPPER_MMIO,
187 IORESOURCE_MEM, "PCI memory");
188
189 pci_init_resource(&hose->io_resource,
190 MPC826x_PCI_LOWER_IO,
191 MPC826x_PCI_UPPER_IO,
192 IORESOURCE_IO, "PCI I/O");
193}
diff --git a/arch/ppc/syslib/m8260_pci.h b/arch/ppc/syslib/m8260_pci.h
deleted file mode 100644
index d1352120acd7..000000000000
--- a/arch/ppc/syslib/m8260_pci.h
+++ /dev/null
@@ -1,76 +0,0 @@
1
2#ifndef _PPC_KERNEL_M8260_PCI_H
3#define _PPC_KERNEL_M8260_PCI_H
4
5#include <asm/m8260_pci.h>
6
7/*
8 * Local->PCI map (from CPU) controlled by
9 * MPC826x master window
10 *
11 * 0x80000000 - 0xBFFFFFFF Total CPU2PCI space PCIBR0
12 *
13 * 0x80000000 - 0x9FFFFFFF PCI Mem with prefetch (Outbound ATU #1)
14 * 0xA0000000 - 0xAFFFFFFF PCI Mem w/o prefetch (Outbound ATU #2)
15 * 0xB0000000 - 0xB0FFFFFF 32-bit PCI IO (Outbound ATU #3)
16 *
17 * PCI->Local map (from PCI)
18 * MPC826x slave window controlled by
19 *
20 * 0x00000000 - 0x07FFFFFF MPC826x local memory (Inbound ATU #1)
21 */
22
23/*
24 * Slave window that allows PCI masters to access MPC826x local memory.
25 * This window is set up using the first set of Inbound ATU registers
26 */
27
28#ifndef MPC826x_PCI_SLAVE_MEM_LOCAL
29#define MPC826x_PCI_SLAVE_MEM_LOCAL (((struct bd_info *)__res)->bi_memstart)
30#define MPC826x_PCI_SLAVE_MEM_BUS (((struct bd_info *)__res)->bi_memstart)
31#define MPC826x_PCI_SLAVE_MEM_SIZE (((struct bd_info *)__res)->bi_memsize)
32#endif
33
34/*
35 * This is the window that allows the CPU to access PCI address space.
36 * It will be setup with the SIU PCIBR0 register. All three PCI master
37 * windows, which allow the CPU to access PCI prefetch, non prefetch,
38 * and IO space (see below), must all fit within this window.
39 */
40#ifndef MPC826x_PCI_BASE
41#define MPC826x_PCI_BASE 0x80000000
42#define MPC826x_PCI_MASK 0xc0000000
43#endif
44
45#ifndef MPC826x_PCI_LOWER_MEM
46#define MPC826x_PCI_LOWER_MEM 0x80000000
47#define MPC826x_PCI_UPPER_MEM 0x9fffffff
48#define MPC826x_PCI_MEM_OFFSET 0x00000000
49#endif
50
51#ifndef MPC826x_PCI_LOWER_MMIO
52#define MPC826x_PCI_LOWER_MMIO 0xa0000000
53#define MPC826x_PCI_UPPER_MMIO 0xafffffff
54#define MPC826x_PCI_MMIO_OFFSET 0x00000000
55#endif
56
57#ifndef MPC826x_PCI_LOWER_IO
58#define MPC826x_PCI_LOWER_IO 0x00000000
59#define MPC826x_PCI_UPPER_IO 0x00ffffff
60#define MPC826x_PCI_IO_BASE 0xb0000000
61#define MPC826x_PCI_IO_SIZE 0x01000000
62#endif
63
64#ifndef _IO_BASE
65#define _IO_BASE isa_io_base
66#endif
67
68#ifdef CONFIG_8260_PCI9
69struct pci_controller;
70extern void setup_m8260_indirect_pci(struct pci_controller* hose,
71 u32 cfg_addr, u32 cfg_data);
72#else
73#define setup_m8260_indirect_pci setup_indirect_pci
74#endif
75
76#endif /* _PPC_KERNEL_M8260_PCI_H */
diff --git a/arch/ppc/syslib/m8260_pci_erratum9.c b/arch/ppc/syslib/m8260_pci_erratum9.c
index 9c0582d639e0..1dc7e4e1d491 100644
--- a/arch/ppc/syslib/m8260_pci_erratum9.c
+++ b/arch/ppc/syslib/m8260_pci_erratum9.c
@@ -31,7 +31,7 @@
31#include <asm/immap_cpm2.h> 31#include <asm/immap_cpm2.h>
32#include <asm/cpm2.h> 32#include <asm/cpm2.h>
33 33
34#include "m8260_pci.h" 34#include "m82xx_pci.h"
35 35
36#ifdef CONFIG_8260_PCI9 36#ifdef CONFIG_8260_PCI9
37/*#include <asm/mpc8260_pci9.h>*/ /* included in asm/io.h */ 37/*#include <asm/mpc8260_pci9.h>*/ /* included in asm/io.h */
@@ -248,11 +248,11 @@ EXPORT_SYMBOL(idma_pci9_read_le);
248 248
249static inline int is_pci_mem(unsigned long addr) 249static inline int is_pci_mem(unsigned long addr)
250{ 250{
251 if (addr >= MPC826x_PCI_LOWER_MMIO && 251 if (addr >= M82xx_PCI_LOWER_MMIO &&
252 addr <= MPC826x_PCI_UPPER_MMIO) 252 addr <= M82xx_PCI_UPPER_MMIO)
253 return 1; 253 return 1;
254 if (addr >= MPC826x_PCI_LOWER_MEM && 254 if (addr >= M82xx_PCI_LOWER_MEM &&
255 addr <= MPC826x_PCI_UPPER_MEM) 255 addr <= M82xx_PCI_UPPER_MEM)
256 return 1; 256 return 1;
257 return 0; 257 return 0;
258} 258}
diff --git a/arch/ppc/syslib/m8260_setup.c b/arch/ppc/syslib/m8260_setup.c
index 23ea3f694de2..fda75d79050c 100644
--- a/arch/ppc/syslib/m8260_setup.c
+++ b/arch/ppc/syslib/m8260_setup.c
@@ -34,7 +34,8 @@
34unsigned char __res[sizeof(bd_t)]; 34unsigned char __res[sizeof(bd_t)];
35 35
36extern void cpm2_reset(void); 36extern void cpm2_reset(void);
37extern void m8260_find_bridges(void); 37extern void pq2_find_bridges(void);
38extern void pq2pci_init_irq(void);
38extern void idma_pci9_init(void); 39extern void idma_pci9_init(void);
39 40
40/* Place-holder for board-specific init */ 41/* Place-holder for board-specific init */
@@ -56,7 +57,7 @@ m8260_setup_arch(void)
56 idma_pci9_init(); 57 idma_pci9_init();
57#endif 58#endif
58#ifdef CONFIG_PCI_8260 59#ifdef CONFIG_PCI_8260
59 m8260_find_bridges(); 60 pq2_find_bridges();
60#endif 61#endif
61#ifdef CONFIG_BLK_DEV_INITRD 62#ifdef CONFIG_BLK_DEV_INITRD
62 if (initrd_start) 63 if (initrd_start)
@@ -173,6 +174,12 @@ m8260_init_IRQ(void)
173 * in case the boot rom changed something on us. 174 * in case the boot rom changed something on us.
174 */ 175 */
175 cpm2_immr->im_intctl.ic_siprr = 0x05309770; 176 cpm2_immr->im_intctl.ic_siprr = 0x05309770;
177
178#if defined(CONFIG_PCI) && (defined(CONFIG_ADS8272) || defined(CONFIG_PQ2FADS))
179 /* Initialize stuff for the 82xx CPLD IC and install demux */
180 pq2pci_init_irq();
181#endif
182
176} 183}
177 184
178/* 185/*
diff --git a/arch/ppc/syslib/m82xx_pci.c b/arch/ppc/syslib/m82xx_pci.c
new file mode 100644
index 000000000000..5e7a7edcea74
--- /dev/null
+++ b/arch/ppc/syslib/m82xx_pci.c
@@ -0,0 +1,383 @@
1/*
2 *
3 * (C) Copyright 2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * (C) Copyright 2004 Red Hat, Inc.
7 *
8 * 2005 (c) MontaVista Software, Inc.
9 * Vitaly Bordug <vbordug@ru.mvista.com>
10 *
11 * See file CREDITS for list of people who contributed to this
12 * project.
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 * MA 02111-1307 USA
28 */
29
30#include <linux/kernel.h>
31#include <linux/init.h>
32#include <linux/pci.h>
33#include <linux/slab.h>
34#include <linux/delay.h>
35#include <linux/irq.h>
36#include <linux/interrupt.h>
37
38#include <asm/byteorder.h>
39#include <asm/io.h>
40#include <asm/irq.h>
41#include <asm/uaccess.h>
42#include <asm/machdep.h>
43#include <asm/pci-bridge.h>
44#include <asm/immap_cpm2.h>
45#include <asm/mpc8260.h>
46#include <asm/cpm2.h>
47
48#include "m82xx_pci.h"
49
50/*
51 * Interrupt routing
52 */
53
54static inline int
55pq2pci_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
56{
57 static char pci_irq_table[][4] =
58 /*
59 * PCI IDSEL/INTPIN->INTLINE
60 * A B C D
61 */
62 {
63 { PIRQA, PIRQB, PIRQC, PIRQD }, /* IDSEL 22 - PCI slot 0 */
64 { PIRQD, PIRQA, PIRQB, PIRQC }, /* IDSEL 23 - PCI slot 1 */
65 { PIRQC, PIRQD, PIRQA, PIRQB }, /* IDSEL 24 - PCI slot 2 */
66 };
67
68 const long min_idsel = 22, max_idsel = 24, irqs_per_slot = 4;
69 return PCI_IRQ_TABLE_LOOKUP;
70}
71
72static void
73pq2pci_mask_irq(unsigned int irq)
74{
75 int bit = irq - NR_CPM_INTS;
76
77 *(volatile unsigned long *) PCI_INT_MASK_REG |= (1 << (31 - bit));
78 return;
79}
80
81static void
82pq2pci_unmask_irq(unsigned int irq)
83{
84 int bit = irq - NR_CPM_INTS;
85
86 *(volatile unsigned long *) PCI_INT_MASK_REG &= ~(1 << (31 - bit));
87 return;
88}
89
90static void
91pq2pci_mask_and_ack(unsigned int irq)
92{
93 int bit = irq - NR_CPM_INTS;
94
95 *(volatile unsigned long *) PCI_INT_MASK_REG |= (1 << (31 - bit));
96 return;
97}
98
99static void
100pq2pci_end_irq(unsigned int irq)
101{
102 int bit = irq - NR_CPM_INTS;
103
104 *(volatile unsigned long *) PCI_INT_MASK_REG &= ~(1 << (31 - bit));
105 return;
106}
107
108struct hw_interrupt_type pq2pci_ic = {
109 "PQ2 PCI",
110 NULL,
111 NULL,
112 pq2pci_unmask_irq,
113 pq2pci_mask_irq,
114 pq2pci_mask_and_ack,
115 pq2pci_end_irq,
116 0
117};
118
119static irqreturn_t
120pq2pci_irq_demux(int irq, void *dev_id, struct pt_regs *regs)
121{
122 unsigned long stat, mask, pend;
123 int bit;
124
125 for(;;) {
126 stat = *(volatile unsigned long *) PCI_INT_STAT_REG;
127 mask = *(volatile unsigned long *) PCI_INT_MASK_REG;
128 pend = stat & ~mask & 0xf0000000;
129 if (!pend)
130 break;
131 for (bit = 0; pend != 0; ++bit, pend <<= 1) {
132 if (pend & 0x80000000)
133 __do_IRQ(NR_CPM_INTS + bit, regs);
134 }
135 }
136
137 return IRQ_HANDLED;
138}
139
140static struct irqaction pq2pci_irqaction = {
141 .handler = pq2pci_irq_demux,
142 .flags = SA_INTERRUPT,
143 .mask = CPU_MASK_NONE,
144 .name = "PQ2 PCI cascade",
145};
146
147
148void
149pq2pci_init_irq(void)
150{
151 int irq;
152 volatile cpm2_map_t *immap = cpm2_immr;
153#if defined CONFIG_ADS8272
154 /* configure chip select for PCI interrupt controller */
155 immap->im_memctl.memc_br3 = PCI_INT_STAT_REG | 0x00001801;
156 immap->im_memctl.memc_or3 = 0xffff8010;
157#elif defined CONFIG_PQ2FADS
158 immap->im_memctl.memc_br8 = PCI_INT_STAT_REG | 0x00001801;
159 immap->im_memctl.memc_or8 = 0xffff8010;
160#endif
161 for (irq = NR_CPM_INTS; irq < NR_CPM_INTS + 4; irq++)
162 irq_desc[irq].handler = &pq2pci_ic;
163
164 /* make PCI IRQ level sensitive */
165 immap->im_intctl.ic_siexr &=
166 ~(1 << (14 - (PCI_INT_TO_SIU - SIU_INT_IRQ1)));
167
168 /* mask all PCI interrupts */
169 *(volatile unsigned long *) PCI_INT_MASK_REG |= 0xfff00000;
170
171 /* install the demultiplexer for the PCI cascade interrupt */
172 setup_irq(PCI_INT_TO_SIU, &pq2pci_irqaction);
173 return;
174}
175
176static int
177pq2pci_exclude_device(u_char bus, u_char devfn)
178{
179 return PCIBIOS_SUCCESSFUL;
180}
181
182/* PCI bus configuration registers.
183 */
184static void
185pq2ads_setup_pci(struct pci_controller *hose)
186{
187 __u32 val;
188 volatile cpm2_map_t *immap = cpm2_immr;
189 bd_t* binfo = (bd_t*) __res;
190 u32 sccr = immap->im_clkrst.car_sccr;
191 uint pci_div,freq,time;
192 /* PCI int lowest prio */
193 /* Each 4 bits is a device bus request and the MS 4bits
194 is highest priority */
195 /* Bus 4bit value
196 --- ----------
197 CPM high 0b0000
198 CPM middle 0b0001
199 CPM low 0b0010
200 PCI reguest 0b0011
201 Reserved 0b0100
202 Reserved 0b0101
203 Internal Core 0b0110
204 External Master 1 0b0111
205 External Master 2 0b1000
206 External Master 3 0b1001
207 The rest are reserved
208 */
209 immap->im_siu_conf.siu_82xx.sc_ppc_alrh = 0x61207893;
210 /* park bus on core */
211 immap->im_siu_conf.siu_82xx.sc_ppc_acr = PPC_ACR_BUS_PARK_CORE;
212 /*
213 * Set up master windows that allow the CPU to access PCI space. These
214 * windows are set up using the two SIU PCIBR registers.
215 */
216
217 immap->im_memctl.memc_pcimsk0 = M82xx_PCI_PRIM_WND_SIZE;
218 immap->im_memctl.memc_pcibr0 = M82xx_PCI_PRIM_WND_BASE | PCIBR_ENABLE;
219
220#ifdef M82xx_PCI_SEC_WND_SIZE
221 immap->im_memctl.memc_pcimsk1 = M82xx_PCI_SEC_WND_SIZE;
222 immap->im_memctl.memc_pcibr1 = M82xx_PCI_SEC_WND_BASE | PCIBR_ENABLE;
223#endif
224
225#if defined CONFIG_ADS8272
226 immap->im_siu_conf.siu_82xx.sc_siumcr =
227 (immap->im_siu_conf.siu_82xx.sc_siumcr &
228 ~(SIUMCR_BBD | SIUMCR_ESE | SIUMCR_PBSE |
229 SIUMCR_CDIS | SIUMCR_DPPC11 | SIUMCR_L2CPC11 |
230 SIUMCR_LBPC11 | SIUMCR_APPC11 |
231 SIUMCR_CS10PC11 | SIUMCR_BCTLC11 | SIUMCR_MMR11)) |
232 SIUMCR_DPPC11 | SIUMCR_L2CPC01 | SIUMCR_LBPC00 |
233 SIUMCR_APPC10 | SIUMCR_CS10PC00 |
234 SIUMCR_BCTLC00 | SIUMCR_MMR11 ;
235
236#elif defined CONFIG_PQ2FADS
237 /*
238 * Setting required to enable IRQ1-IRQ7 (SIUMCR [DPPC]),
239 * and local bus for PCI (SIUMCR [LBPC]).
240 */
241 immap->im_siu_conf.siu_82xx.sc_siumcr = (immap->im_siu_conf.sc_siumcr &
242 ~(SIUMCR_L2PC11 | SIUMCR_LBPC11 | SIUMCR_CS10PC11 | SIUMCR_APPC11) |
243 SIUMCR_BBD | SIUMCR_LBPC01 | SIUMCR_DPPC11 | SIUMCR_APPC10;
244#endif
245 /* Enable PCI */
246 immap->im_pci.pci_gcr = cpu_to_le32(PCIGCR_PCI_BUS_EN);
247
248 pci_div = ( (sccr & SCCR_PCI_MODCK) ? 2 : 1) *
249 ( ( (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT) + 1);
250 freq = (uint)((2*binfo->bi_cpmfreq)/(pci_div));
251 time = (int)666666/freq;
252 /* due to PCI Local Bus spec, some devices needs to wait such a long
253 time after RST deassertion. More specifically, 0.508s for 66MHz & twice more for 33 */
254 printk("%s: The PCI bus is %d Mhz.\nWaiting %s after deasserting RST...\n",__FILE__,freq,
255 (time==1) ? "0.5 seconds":"1 second" );
256
257 {
258 int i;
259 for(i=0;i<(500*time);i++)
260 udelay(1000);
261 }
262
263 /* setup ATU registers */
264 immap->im_pci.pci_pocmr0 = cpu_to_le32(POCMR_ENABLE | POCMR_PCI_IO |
265 ((~(M82xx_PCI_IO_SIZE - 1U)) >> POTA_ADDR_SHIFT));
266 immap->im_pci.pci_potar0 = cpu_to_le32(M82xx_PCI_LOWER_IO >> POTA_ADDR_SHIFT);
267 immap->im_pci.pci_pobar0 = cpu_to_le32(M82xx_PCI_IO_BASE >> POTA_ADDR_SHIFT);
268
269 /* Set-up non-prefetchable window */
270 immap->im_pci.pci_pocmr1 = cpu_to_le32(POCMR_ENABLE | ((~(M82xx_PCI_MMIO_SIZE-1U)) >> POTA_ADDR_SHIFT));
271 immap->im_pci.pci_potar1 = cpu_to_le32(M82xx_PCI_LOWER_MMIO >> POTA_ADDR_SHIFT);
272 immap->im_pci.pci_pobar1 = cpu_to_le32((M82xx_PCI_LOWER_MMIO - M82xx_PCI_MMIO_OFFSET) >> POTA_ADDR_SHIFT);
273
274 /* Set-up prefetchable window */
275 immap->im_pci.pci_pocmr2 = cpu_to_le32(POCMR_ENABLE |POCMR_PREFETCH_EN |
276 (~(M82xx_PCI_MEM_SIZE-1U) >> POTA_ADDR_SHIFT));
277 immap->im_pci.pci_potar2 = cpu_to_le32(M82xx_PCI_LOWER_MEM >> POTA_ADDR_SHIFT);
278 immap->im_pci.pci_pobar2 = cpu_to_le32((M82xx_PCI_LOWER_MEM - M82xx_PCI_MEM_OFFSET) >> POTA_ADDR_SHIFT);
279
280 /* Inbound transactions from PCI memory space */
281 immap->im_pci.pci_picmr0 = cpu_to_le32(PICMR_ENABLE | PICMR_PREFETCH_EN |
282 ((~(M82xx_PCI_SLAVE_MEM_SIZE-1U)) >> PITA_ADDR_SHIFT));
283 immap->im_pci.pci_pibar0 = cpu_to_le32(M82xx_PCI_SLAVE_MEM_BUS >> PITA_ADDR_SHIFT);
284 immap->im_pci.pci_pitar0 = cpu_to_le32(M82xx_PCI_SLAVE_MEM_LOCAL>> PITA_ADDR_SHIFT);
285
286#if defined CONFIG_ADS8272
287 /* PCI int highest prio */
288 immap->im_siu_conf.siu_82xx.sc_ppc_alrh = 0x01236745;
289#elif defined CONFIG_PQ2FADS
290 immap->im_siu_conf.siu_82xx.sc_ppc_alrh = 0x03124567;
291#endif
292 /* park bus on PCI */
293 immap->im_siu_conf.siu_82xx.sc_ppc_acr = PPC_ACR_BUS_PARK_PCI;
294
295 /* Enable bus mastering and inbound memory transactions */
296 early_read_config_dword(hose, hose->first_busno, 0, PCI_COMMAND, &val);
297 val &= 0xffff0000;
298 val |= PCI_COMMAND_MEMORY|PCI_COMMAND_MASTER;
299 early_write_config_dword(hose, hose->first_busno, 0, PCI_COMMAND, val);
300
301}
302
303void __init pq2_find_bridges(void)
304{
305 extern int pci_assign_all_busses;
306 struct pci_controller * hose;
307 int host_bridge;
308
309 pci_assign_all_busses = 1;
310
311 hose = pcibios_alloc_controller();
312
313 if (!hose)
314 return;
315
316 ppc_md.pci_swizzle = common_swizzle;
317
318 hose->first_busno = 0;
319 hose->bus_offset = 0;
320 hose->last_busno = 0xff;
321
322#ifdef CONFIG_ADS8272
323 hose->set_cfg_type = 1;
324#endif
325
326 setup_m8260_indirect_pci(hose,
327 (unsigned long)&cpm2_immr->im_pci.pci_cfg_addr,
328 (unsigned long)&cpm2_immr->im_pci.pci_cfg_data);
329
330 /* Make sure it is a supported bridge */
331 early_read_config_dword(hose,
332 0,
333 PCI_DEVFN(0,0),
334 PCI_VENDOR_ID,
335 &host_bridge);
336 switch (host_bridge) {
337 case PCI_DEVICE_ID_MPC8265:
338 break;
339 case PCI_DEVICE_ID_MPC8272:
340 break;
341 default:
342 printk("Attempting to use unrecognized host bridge ID"
343 " 0x%08x.\n", host_bridge);
344 break;
345 }
346
347 pq2ads_setup_pci(hose);
348
349 hose->io_space.start = M82xx_PCI_LOWER_IO;
350 hose->io_space.end = M82xx_PCI_UPPER_IO;
351 hose->mem_space.start = M82xx_PCI_LOWER_MEM;
352 hose->mem_space.end = M82xx_PCI_UPPER_MMIO;
353 hose->pci_mem_offset = M82xx_PCI_MEM_OFFSET;
354
355 isa_io_base =
356 (unsigned long) ioremap(M82xx_PCI_IO_BASE,
357 M82xx_PCI_IO_SIZE);
358 hose->io_base_virt = (void *) isa_io_base;
359
360 /* setup resources */
361 pci_init_resource(&hose->mem_resources[0],
362 M82xx_PCI_LOWER_MEM,
363 M82xx_PCI_UPPER_MEM,
364 IORESOURCE_MEM|IORESOURCE_PREFETCH, "PCI prefetchable memory");
365
366 pci_init_resource(&hose->mem_resources[1],
367 M82xx_PCI_LOWER_MMIO,
368 M82xx_PCI_UPPER_MMIO,
369 IORESOURCE_MEM, "PCI memory");
370
371 pci_init_resource(&hose->io_resource,
372 M82xx_PCI_LOWER_IO,
373 M82xx_PCI_UPPER_IO,
374 IORESOURCE_IO | 1, "PCI I/O");
375
376 ppc_md.pci_exclude_device = pq2pci_exclude_device;
377 hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
378
379 ppc_md.pci_map_irq = pq2pci_map_irq;
380 ppc_md.pcibios_fixup = NULL;
381 ppc_md.pcibios_fixup_bus = NULL;
382
383}
diff --git a/arch/ppc/syslib/m82xx_pci.h b/arch/ppc/syslib/m82xx_pci.h
new file mode 100644
index 000000000000..924f73f8e595
--- /dev/null
+++ b/arch/ppc/syslib/m82xx_pci.h
@@ -0,0 +1,92 @@
1
2#ifndef _PPC_KERNEL_M82XX_PCI_H
3#define _PPC_KERNEL_M82XX_PCI_H
4
5#include <asm/m8260_pci.h>
6/*
7 * Local->PCI map (from CPU) controlled by
8 * MPC826x master window
9 *
10 * 0xF6000000 - 0xF7FFFFFF IO space
11 * 0x80000000 - 0xBFFFFFFF CPU2PCI memory space PCIBR0
12 *
13 * 0x80000000 - 0x9FFFFFFF PCI Mem with prefetch (Outbound ATU #1)
14 * 0xA0000000 - 0xBFFFFFFF PCI Mem w/o prefetch (Outbound ATU #2)
15 * 0xF6000000 - 0xF7FFFFFF 32-bit PCI IO (Outbound ATU #3)
16 *
17 * PCI->Local map (from PCI)
18 * MPC826x slave window controlled by
19 *
20 * 0x00000000 - 0x07FFFFFF MPC826x local memory (Inbound ATU #1)
21 */
22
23/*
24 * Slave window that allows PCI masters to access MPC826x local memory.
25 * This window is set up using the first set of Inbound ATU registers
26 */
27
28#ifndef M82xx_PCI_SLAVE_MEM_LOCAL
29#define M82xx_PCI_SLAVE_MEM_LOCAL (((struct bd_info *)__res)->bi_memstart)
30#define M82xx_PCI_SLAVE_MEM_BUS (((struct bd_info *)__res)->bi_memstart)
31#define M82xx_PCI_SLAVE_MEM_SIZE (((struct bd_info *)__res)->bi_memsize)
32#endif
33
34/*
35 * This is the window that allows the CPU to access PCI address space.
36 * It will be setup with the SIU PCIBR0 register. All three PCI master
37 * windows, which allow the CPU to access PCI prefetch, non prefetch,
38 * and IO space (see below), must all fit within this window.
39 */
40
41#ifndef M82xx_PCI_LOWER_MEM
42#define M82xx_PCI_LOWER_MEM 0x80000000
43#define M82xx_PCI_UPPER_MEM 0x9fffffff
44#define M82xx_PCI_MEM_OFFSET 0x00000000
45#define M82xx_PCI_MEM_SIZE 0x20000000
46#endif
47
48#ifndef M82xx_PCI_LOWER_MMIO
49#define M82xx_PCI_LOWER_MMIO 0xa0000000
50#define M82xx_PCI_UPPER_MMIO 0xafffffff
51#define M82xx_PCI_MMIO_OFFSET 0x00000000
52#define M82xx_PCI_MMIO_SIZE 0x20000000
53#endif
54
55#ifndef M82xx_PCI_LOWER_IO
56#define M82xx_PCI_LOWER_IO 0x00000000
57#define M82xx_PCI_UPPER_IO 0x01ffffff
58#define M82xx_PCI_IO_BASE 0xf6000000
59#define M82xx_PCI_IO_SIZE 0x02000000
60#endif
61
62#ifndef M82xx_PCI_PRIM_WND_SIZE
63#define M82xx_PCI_PRIM_WND_SIZE ~(M82xx_PCI_IO_SIZE - 1U)
64#define M82xx_PCI_PRIM_WND_BASE (M82xx_PCI_IO_BASE)
65#endif
66
67#ifndef M82xx_PCI_SEC_WND_SIZE
68#define M82xx_PCI_SEC_WND_SIZE ~(M82xx_PCI_MEM_SIZE + M82xx_PCI_MMIO_SIZE - 1U)
69#define M82xx_PCI_SEC_WND_BASE (M82xx_PCI_LOWER_MEM)
70#endif
71
72#ifndef POTA_ADDR_SHIFT
73#define POTA_ADDR_SHIFT 12
74#endif
75
76#ifndef PITA_ADDR_SHIFT
77#define PITA_ADDR_SHIFT 12
78#endif
79
80#ifndef _IO_BASE
81#define _IO_BASE isa_io_base
82#endif
83
84#ifdef CONFIG_8260_PCI9
85struct pci_controller;
86extern void setup_m8260_indirect_pci(struct pci_controller* hose,
87 u32 cfg_addr, u32 cfg_data);
88#else
89#define setup_m8260_indirect_pci setup_indirect_pci
90#endif
91
92#endif /* _PPC_KERNEL_M8260_PCI_H */
diff --git a/arch/ppc/syslib/open_pic.c b/arch/ppc/syslib/open_pic.c
index 9d4ed68b5804..000ba47c67cb 100644
--- a/arch/ppc/syslib/open_pic.c
+++ b/arch/ppc/syslib/open_pic.c
@@ -275,7 +275,7 @@ static void __init openpic_enable_sie(void)
275} 275}
276#endif 276#endif
277 277
278#if defined(CONFIG_EPIC_SERIAL_MODE) || defined(CONFIG_PM) 278#if defined(CONFIG_EPIC_SERIAL_MODE)
279static void openpic_reset(void) 279static void openpic_reset(void)
280{ 280{
281 openpic_setfield(&OpenPIC->Global.Global_Configuration0, 281 openpic_setfield(&OpenPIC->Global.Global_Configuration0,
@@ -993,8 +993,6 @@ int openpic_resume(struct sys_device *sysdev)
993 return 0; 993 return 0;
994 } 994 }
995 995
996 openpic_reset();
997
998 /* OpenPIC sometimes seem to need some time to be fully back up... */ 996 /* OpenPIC sometimes seem to need some time to be fully back up... */
999 do { 997 do {
1000 openpic_set_spurious(OPENPIC_VEC_SPURIOUS); 998 openpic_set_spurious(OPENPIC_VEC_SPURIOUS);
diff --git a/arch/ppc/syslib/ppc83xx_setup.c b/arch/ppc/syslib/ppc83xx_setup.c
index c28f9d679484..843cf8873e60 100644
--- a/arch/ppc/syslib/ppc83xx_setup.c
+++ b/arch/ppc/syslib/ppc83xx_setup.c
@@ -29,6 +29,7 @@
29#include <asm/mmu.h> 29#include <asm/mmu.h>
30#include <asm/ppc_sys.h> 30#include <asm/ppc_sys.h>
31#include <asm/kgdb.h> 31#include <asm/kgdb.h>
32#include <asm/delay.h>
32 33
33#include <syslib/ppc83xx_setup.h> 34#include <syslib/ppc83xx_setup.h>
34 35
@@ -117,7 +118,34 @@ mpc83xx_early_serial_map(void)
117void 118void
118mpc83xx_restart(char *cmd) 119mpc83xx_restart(char *cmd)
119{ 120{
121 volatile unsigned char __iomem *reg;
122 unsigned char tmp;
123
124 reg = ioremap(BCSR_PHYS_ADDR, BCSR_SIZE);
125
120 local_irq_disable(); 126 local_irq_disable();
127
128 /*
129 * Unlock the BCSR bits so a PRST will update the contents.
130 * Otherwise the reset asserts but doesn't clear.
131 */
132 tmp = in_8(reg + BCSR_MISC_REG3_OFF);
133 tmp |= BCSR_MISC_REG3_CNFLOCK; /* low true, high false */
134 out_8(reg + BCSR_MISC_REG3_OFF, tmp);
135
136 /*
137 * Trigger a reset via a low->high transition of the
138 * PORESET bit.
139 */
140 tmp = in_8(reg + BCSR_MISC_REG2_OFF);
141 tmp &= ~BCSR_MISC_REG2_PORESET;
142 out_8(reg + BCSR_MISC_REG2_OFF, tmp);
143
144 udelay(1);
145
146 tmp |= BCSR_MISC_REG2_PORESET;
147 out_8(reg + BCSR_MISC_REG2_OFF, tmp);
148
121 for(;;); 149 for(;;);
122} 150}
123 151
diff --git a/arch/ppc/syslib/ppc85xx_setup.c b/arch/ppc/syslib/ppc85xx_setup.c
index 152c3ef1312a..f3277f469e78 100644
--- a/arch/ppc/syslib/ppc85xx_setup.c
+++ b/arch/ppc/syslib/ppc85xx_setup.c
@@ -132,6 +132,12 @@ mpc85xx_halt(void)
132} 132}
133 133
134#ifdef CONFIG_PCI 134#ifdef CONFIG_PCI
135
136#if defined(CONFIG_MPC8555_CDS)
137extern void mpc85xx_cds_enable_via(struct pci_controller *hose);
138extern void mpc85xx_cds_fixup_via(struct pci_controller *hose);
139#endif
140
135static void __init 141static void __init
136mpc85xx_setup_pci1(struct pci_controller *hose) 142mpc85xx_setup_pci1(struct pci_controller *hose)
137{ 143{
@@ -302,8 +308,18 @@ mpc85xx_setup_hose(void)
302 308
303 ppc_md.pci_exclude_device = mpc85xx_exclude_device; 309 ppc_md.pci_exclude_device = mpc85xx_exclude_device;
304 310
311#if defined(CONFIG_MPC8555_CDS)
312 /* Pre pciauto_bus_scan VIA init */
313 mpc85xx_cds_enable_via(hose_a);
314#endif
315
305 hose_a->last_busno = pciauto_bus_scan(hose_a, hose_a->first_busno); 316 hose_a->last_busno = pciauto_bus_scan(hose_a, hose_a->first_busno);
306 317
318#if defined(CONFIG_MPC8555_CDS)
319 /* Post pciauto_bus_scan VIA fixup */
320 mpc85xx_cds_fixup_via(hose_a);
321#endif
322
307#ifdef CONFIG_85xx_PCI2 323#ifdef CONFIG_85xx_PCI2
308 hose_b = pcibios_alloc_controller(); 324 hose_b = pcibios_alloc_controller();
309 325
diff --git a/arch/ppc64/kernel/prom_init.c b/arch/ppc64/kernel/prom_init.c
index 6f79b7b9b445..bc53967a8643 100644
--- a/arch/ppc64/kernel/prom_init.c
+++ b/arch/ppc64/kernel/prom_init.c
@@ -1881,6 +1881,12 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4, unsigned long
1881 &getprop_rval, sizeof(getprop_rval)); 1881 &getprop_rval, sizeof(getprop_rval));
1882 1882
1883 /* 1883 /*
1884 * On pSeries, inform the firmware about our capabilities
1885 */
1886 if (RELOC(of_platform) & PLATFORM_PSERIES)
1887 prom_send_capabilities();
1888
1889 /*
1884 * On pSeries, copy the CPU hold code 1890 * On pSeries, copy the CPU hold code
1885 */ 1891 */
1886 if (RELOC(of_platform) & PLATFORM_PSERIES) 1892 if (RELOC(of_platform) & PLATFORM_PSERIES)
diff --git a/arch/ppc64/kernel/time.c b/arch/ppc64/kernel/time.c
index 3d54745108c7..33364a7d2cd2 100644
--- a/arch/ppc64/kernel/time.c
+++ b/arch/ppc64/kernel/time.c
@@ -325,9 +325,7 @@ int timer_interrupt(struct pt_regs * regs)
325 325
326 irq_enter(); 326 irq_enter();
327 327
328#ifndef CONFIG_PPC_ISERIES
329 profile_tick(CPU_PROFILING, regs); 328 profile_tick(CPU_PROFILING, regs);
330#endif
331 329
332 lpaca->lppaca.int_dword.fields.decr_int = 0; 330 lpaca->lppaca.int_dword.fields.decr_int = 0;
333 331
diff --git a/arch/um/Kconfig.debug b/arch/um/Kconfig.debug
index b89989de364d..bd41e4286d0d 100644
--- a/arch/um/Kconfig.debug
+++ b/arch/um/Kconfig.debug
@@ -2,10 +2,6 @@ menu "Kernel hacking"
2 2
3source "lib/Kconfig.debug" 3source "lib/Kconfig.debug"
4 4
5config FRAME_POINTER
6 bool
7 default y if DEBUG_INFO
8
9config PT_PROXY 5config PT_PROXY
10 bool "Enable ptrace proxy" 6 bool "Enable ptrace proxy"
11 depends on XTERM_CHAN && DEBUG_INFO && MODE_TT 7 depends on XTERM_CHAN && DEBUG_INFO && MODE_TT
diff --git a/arch/um/drivers/random.c b/arch/um/drivers/random.c
index d43e9fab05a7..f9e22198e011 100644
--- a/arch/um/drivers/random.c
+++ b/arch/um/drivers/random.c
@@ -1,5 +1,10 @@
1/* Much of this ripped from hw_random.c */ 1/* Copyright (C) 2005 Jeff Dike <jdike@addtoit.com> */
2 2/* Much of this ripped from drivers/char/hw_random.c, see there for other
3 * copyright.
4 *
5 * This software may be used and distributed according to the terms
6 * of the GNU General Public License, incorporated herein by reference.
7 */
3#include <linux/module.h> 8#include <linux/module.h>
4#include <linux/fs.h> 9#include <linux/fs.h>
5#include <linux/miscdevice.h> 10#include <linux/miscdevice.h>
@@ -12,8 +17,6 @@
12 */ 17 */
13#define RNG_VERSION "1.0.0" 18#define RNG_VERSION "1.0.0"
14#define RNG_MODULE_NAME "random" 19#define RNG_MODULE_NAME "random"
15#define RNG_DRIVER_NAME RNG_MODULE_NAME " virtual driver " RNG_VERSION
16#define PFX RNG_MODULE_NAME ": "
17 20
18#define RNG_MISCDEV_MINOR 183 /* official */ 21#define RNG_MISCDEV_MINOR 183 /* official */
19 22
@@ -98,7 +101,7 @@ static int __init rng_init (void)
98 101
99 err = misc_register (&rng_miscdev); 102 err = misc_register (&rng_miscdev);
100 if (err) { 103 if (err) {
101 printk (KERN_ERR PFX "misc device register failed\n"); 104 printk (KERN_ERR RNG_MODULE_NAME ": misc device register failed\n");
102 goto err_out_cleanup_hw; 105 goto err_out_cleanup_hw;
103 } 106 }
104 107
@@ -120,3 +123,6 @@ static void __exit rng_cleanup (void)
120 123
121module_init (rng_init); 124module_init (rng_init);
122module_exit (rng_cleanup); 125module_exit (rng_cleanup);
126
127MODULE_DESCRIPTION("UML Host Random Number Generator (RNG) driver");
128MODULE_LICENSE("GPL");
diff --git a/arch/um/drivers/ssl.c b/arch/um/drivers/ssl.c
index a2bac429f3d4..b32a77010fbe 100644
--- a/arch/um/drivers/ssl.c
+++ b/arch/um/drivers/ssl.c
@@ -22,7 +22,6 @@
22#include "init.h" 22#include "init.h"
23#include "irq_user.h" 23#include "irq_user.h"
24#include "mconsole_kern.h" 24#include "mconsole_kern.h"
25#include "2_5compat.h"
26 25
27static int ssl_version = 1; 26static int ssl_version = 1;
28 27
diff --git a/arch/um/drivers/stdio_console.c b/arch/um/drivers/stdio_console.c
index 361d0be342b3..afbe1e71ed83 100644
--- a/arch/um/drivers/stdio_console.c
+++ b/arch/um/drivers/stdio_console.c
@@ -28,7 +28,6 @@
28#include "irq_user.h" 28#include "irq_user.h"
29#include "mconsole_kern.h" 29#include "mconsole_kern.h"
30#include "init.h" 30#include "init.h"
31#include "2_5compat.h"
32 31
33#define MAX_TTYS (16) 32#define MAX_TTYS (16)
34 33
diff --git a/arch/um/drivers/ubd_kern.c b/arch/um/drivers/ubd_kern.c
index 88f956c34fed..2a7f6892c55c 100644
--- a/arch/um/drivers/ubd_kern.c
+++ b/arch/um/drivers/ubd_kern.c
@@ -49,7 +49,6 @@
49#include "irq_user.h" 49#include "irq_user.h"
50#include "irq_kern.h" 50#include "irq_kern.h"
51#include "ubd_user.h" 51#include "ubd_user.h"
52#include "2_5compat.h"
53#include "os.h" 52#include "os.h"
54#include "mem.h" 53#include "mem.h"
55#include "mem_kern.h" 54#include "mem_kern.h"
@@ -440,9 +439,9 @@ static int udb_setup(char *str)
440__setup("udb", udb_setup); 439__setup("udb", udb_setup);
441__uml_help(udb_setup, 440__uml_help(udb_setup,
442"udb\n" 441"udb\n"
443" This option is here solely to catch ubd -> udb typos, which can be\n\n" 442" This option is here solely to catch ubd -> udb typos, which can be\n"
444" to impossible to catch visually unless you specifically look for\n\n" 443" to impossible to catch visually unless you specifically look for\n"
445" them. The only result of any option starting with 'udb' is an error\n\n" 444" them. The only result of any option starting with 'udb' is an error\n"
446" in the boot output.\n\n" 445" in the boot output.\n\n"
447); 446);
448 447
diff --git a/arch/um/include/2_5compat.h b/arch/um/include/2_5compat.h
deleted file mode 100644
index abdb015a4d71..000000000000
--- a/arch/um/include/2_5compat.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * Copyright (C) 2001 Jeff Dike (jdike@karaya.com)
3 * Licensed under the GPL
4 */
5
6#ifndef __2_5_COMPAT_H__
7#define __2_5_COMPAT_H__
8
9#define INIT_HARDSECT(arr, maj, sizes)
10
11#define SET_PRI(task) do ; while(0)
12
13#endif
14
15/*
16 * Overrides for Emacs so that we follow Linus's tabbing style.
17 * Emacs will notice this stuff at the end of the file and automatically
18 * adjust the settings for this buffer only. This must remain at the end
19 * of the file.
20 * ---------------------------------------------------------------------------
21 * Local variables:
22 * c-file-style: "linux"
23 * End:
24 */
diff --git a/arch/um/include/sysrq.h b/arch/um/include/sysrq.h
index 2ce9423460b3..c8d332b56b98 100644
--- a/arch/um/include/sysrq.h
+++ b/arch/um/include/sysrq.h
@@ -1,6 +1,7 @@
1#ifndef __UM_SYSRQ_H 1#ifndef __UM_SYSRQ_H
2#define __UM_SYSRQ_H 2#define __UM_SYSRQ_H
3 3
4extern void show_trace(unsigned long *stack); 4struct task_struct;
5extern void show_trace(struct task_struct* task, unsigned long *stack);
5 6
6#endif 7#endif
diff --git a/arch/um/kernel/exec_kern.c b/arch/um/kernel/exec_kern.c
index 49ddabe69be7..efd222ffe20e 100644
--- a/arch/um/kernel/exec_kern.c
+++ b/arch/um/kernel/exec_kern.c
@@ -16,7 +16,6 @@
16#include "kern.h" 16#include "kern.h"
17#include "irq_user.h" 17#include "irq_user.h"
18#include "tlb.h" 18#include "tlb.h"
19#include "2_5compat.h"
20#include "os.h" 19#include "os.h"
21#include "time_user.h" 20#include "time_user.h"
22#include "choose-mode.h" 21#include "choose-mode.h"
diff --git a/arch/um/kernel/initrd_kern.c b/arch/um/kernel/initrd_kern.c
deleted file mode 100644
index fc568af468b9..000000000000
--- a/arch/um/kernel/initrd_kern.c
+++ /dev/null
@@ -1,59 +0,0 @@
1/*
2 * Copyright (C) 2000, 2001, 2002 Jeff Dike (jdike@karaya.com)
3 * Licensed under the GPL
4 */
5
6#include "linux/init.h"
7#include "linux/bootmem.h"
8#include "linux/initrd.h"
9#include "asm/types.h"
10#include "user_util.h"
11#include "kern_util.h"
12#include "initrd.h"
13#include "init.h"
14#include "os.h"
15
16/* Changed by uml_initrd_setup, which is a setup */
17static char *initrd __initdata = NULL;
18
19static int __init read_initrd(void)
20{
21 void *area;
22 long long size;
23 int err;
24
25 if(initrd == NULL) return 0;
26 err = os_file_size(initrd, &size);
27 if(err) return 0;
28 area = alloc_bootmem(size);
29 if(area == NULL) return 0;
30 if(load_initrd(initrd, area, size) == -1) return 0;
31 initrd_start = (unsigned long) area;
32 initrd_end = initrd_start + size;
33 return 0;
34}
35
36__uml_postsetup(read_initrd);
37
38static int __init uml_initrd_setup(char *line, int *add)
39{
40 initrd = line;
41 return 0;
42}
43
44__uml_setup("initrd=", uml_initrd_setup,
45"initrd=<initrd image>\n"
46" This is used to boot UML from an initrd image. The argument is the\n"
47" name of the file containing the image.\n\n"
48);
49
50/*
51 * Overrides for Emacs so that we follow Linus's tabbing style.
52 * Emacs will notice this stuff at the end of the file and automatically
53 * adjust the settings for this buffer only. This must remain at the end
54 * of the file.
55 * ---------------------------------------------------------------------------
56 * Local variables:
57 * c-file-style: "linux"
58 * End:
59 */
diff --git a/arch/um/kernel/initrd_user.c b/arch/um/kernel/initrd_user.c
deleted file mode 100644
index cb90681e151c..000000000000
--- a/arch/um/kernel/initrd_user.c
+++ /dev/null
@@ -1,46 +0,0 @@
1/*
2 * Copyright (C) 2000, 2001 Jeff Dike (jdike@karaya.com)
3 * Licensed under the GPL
4 */
5
6#include <unistd.h>
7#include <sys/types.h>
8#include <sys/stat.h>
9#include <errno.h>
10
11#include "user_util.h"
12#include "kern_util.h"
13#include "user.h"
14#include "initrd.h"
15#include "os.h"
16
17int load_initrd(char *filename, void *buf, int size)
18{
19 int fd, n;
20
21 fd = os_open_file(filename, of_read(OPENFLAGS()), 0);
22 if(fd < 0){
23 printk("Opening '%s' failed - err = %d\n", filename, -fd);
24 return(-1);
25 }
26 n = os_read_file(fd, buf, size);
27 if(n != size){
28 printk("Read of %d bytes from '%s' failed, err = %d\n", size,
29 filename, -n);
30 return(-1);
31 }
32
33 os_close_file(fd);
34 return(0);
35}
36
37/*
38 * Overrides for Emacs so that we follow Linus's tabbing style.
39 * Emacs will notice this stuff at the end of the file and automatically
40 * adjust the settings for this buffer only. This must remain at the end
41 * of the file.
42 * ---------------------------------------------------------------------------
43 * Local variables:
44 * c-file-style: "linux"
45 * End:
46 */
diff --git a/arch/um/kernel/main.c b/arch/um/kernel/main.c
index a17c49703f9b..e42e6364ca13 100644
--- a/arch/um/kernel/main.c
+++ b/arch/um/kernel/main.c
@@ -71,7 +71,7 @@ static __init void do_uml_initcalls(void)
71 71
72static void last_ditch_exit(int sig) 72static void last_ditch_exit(int sig)
73{ 73{
74 CHOOSE_MODE(kmalloc_ok = 0, (void) 0); 74 kmalloc_ok = 0;
75 signal(SIGINT, SIG_DFL); 75 signal(SIGINT, SIG_DFL);
76 signal(SIGTERM, SIG_DFL); 76 signal(SIGTERM, SIG_DFL);
77 signal(SIGHUP, SIG_DFL); 77 signal(SIGHUP, SIG_DFL);
@@ -87,7 +87,7 @@ int main(int argc, char **argv, char **envp)
87{ 87{
88 char **new_argv; 88 char **new_argv;
89 sigset_t mask; 89 sigset_t mask;
90 int ret, i; 90 int ret, i, err;
91 91
92 /* Enable all signals except SIGIO - in some environments, we can 92 /* Enable all signals except SIGIO - in some environments, we can
93 * enter with some signals blocked 93 * enter with some signals blocked
@@ -160,27 +160,29 @@ int main(int argc, char **argv, char **envp)
160 */ 160 */
161 change_sig(SIGPROF, 0); 161 change_sig(SIGPROF, 0);
162 162
163 /* Reboot */ 163 /* This signal stuff used to be in the reboot case. However,
164 if(ret){ 164 * sometimes a SIGVTALRM can come in when we're halting (reproducably
165 int err; 165 * when writing out gcov information, presumably because that takes
166 166 * some time) and cause a segfault.
167 printf("\n"); 167 */
168 168
169 /* stop timers and set SIG*ALRM to be ignored */ 169 /* stop timers and set SIG*ALRM to be ignored */
170 disable_timer(); 170 disable_timer();
171 171
172 /* disable SIGIO for the fds and set SIGIO to be ignored */ 172 /* disable SIGIO for the fds and set SIGIO to be ignored */
173 err = deactivate_all_fds(); 173 err = deactivate_all_fds();
174 if(err) 174 if(err)
175 printf("deactivate_all_fds failed, errno = %d\n", 175 printf("deactivate_all_fds failed, errno = %d\n", -err);
176 -err);
177 176
178 /* Let any pending signals fire now. This ensures 177 /* Let any pending signals fire now. This ensures
179 * that they won't be delivered after the exec, when 178 * that they won't be delivered after the exec, when
180 * they are definitely not expected. 179 * they are definitely not expected.
181 */ 180 */
182 unblock_signals(); 181 unblock_signals();
183 182
183 /* Reboot */
184 if(ret){
185 printf("\n");
184 execvp(new_argv[0], new_argv); 186 execvp(new_argv[0], new_argv);
185 perror("Failed to exec kernel"); 187 perror("Failed to exec kernel");
186 ret = 1; 188 ret = 1;
diff --git a/arch/um/kernel/process_kern.c b/arch/um/kernel/process_kern.c
index c1adf7ba3fd1..804c6bbdf67c 100644
--- a/arch/um/kernel/process_kern.c
+++ b/arch/um/kernel/process_kern.c
@@ -43,7 +43,6 @@
43#include "tlb.h" 43#include "tlb.h"
44#include "frame_kern.h" 44#include "frame_kern.h"
45#include "sigcontext.h" 45#include "sigcontext.h"
46#include "2_5compat.h"
47#include "os.h" 46#include "os.h"
48#include "mode.h" 47#include "mode.h"
49#include "mode_kern.h" 48#include "mode_kern.h"
@@ -55,18 +54,6 @@
55 */ 54 */
56struct cpu_task cpu_tasks[NR_CPUS] = { [0 ... NR_CPUS - 1] = { -1, NULL } }; 55struct cpu_task cpu_tasks[NR_CPUS] = { [0 ... NR_CPUS - 1] = { -1, NULL } };
57 56
58struct task_struct *get_task(int pid, int require)
59{
60 struct task_struct *ret;
61
62 read_lock(&tasklist_lock);
63 ret = find_task_by_pid(pid);
64 read_unlock(&tasklist_lock);
65
66 if(require && (ret == NULL)) panic("get_task couldn't find a task\n");
67 return(ret);
68}
69
70int external_pid(void *t) 57int external_pid(void *t)
71{ 58{
72 struct task_struct *task = t ? t : current; 59 struct task_struct *task = t ? t : current;
@@ -189,7 +176,6 @@ void default_idle(void)
189 176
190 while(1){ 177 while(1){
191 /* endless idle loop with no priority at all */ 178 /* endless idle loop with no priority at all */
192 SET_PRI(current);
193 179
194 /* 180 /*
195 * although we are an idle CPU, we do not want to 181 * although we are an idle CPU, we do not want to
@@ -212,11 +198,6 @@ int page_size(void)
212 return(PAGE_SIZE); 198 return(PAGE_SIZE);
213} 199}
214 200
215unsigned long page_mask(void)
216{
217 return(PAGE_MASK);
218}
219
220void *um_virt_to_phys(struct task_struct *task, unsigned long addr, 201void *um_virt_to_phys(struct task_struct *task, unsigned long addr,
221 pte_t *pte_out) 202 pte_t *pte_out)
222{ 203{
@@ -349,11 +330,6 @@ char *uml_strdup(char *string)
349 return(new); 330 return(new);
350} 331}
351 332
352void *get_init_task(void)
353{
354 return(&init_thread_union.thread_info.task);
355}
356
357int copy_to_user_proc(void __user *to, void *from, int size) 333int copy_to_user_proc(void __user *to, void *from, int size)
358{ 334{
359 return(copy_to_user(to, from, size)); 335 return(copy_to_user(to, from, size));
@@ -480,15 +456,3 @@ unsigned long arch_align_stack(unsigned long sp)
480 return sp & ~0xf; 456 return sp & ~0xf;
481} 457}
482#endif 458#endif
483
484
485/*
486 * Overrides for Emacs so that we follow Linus's tabbing style.
487 * Emacs will notice this stuff at the end of the file and automatically
488 * adjust the settings for this buffer only. This must remain at the end
489 * of the file.
490 * ---------------------------------------------------------------------------
491 * Local variables:
492 * c-file-style: "linux"
493 * End:
494 */
diff --git a/arch/um/kernel/ptrace.c b/arch/um/kernel/ptrace.c
index 2925e15324de..71af4d503899 100644
--- a/arch/um/kernel/ptrace.c
+++ b/arch/um/kernel/ptrace.c
@@ -322,11 +322,9 @@ void syscall_trace(union uml_pt_regs *regs, int entryexit)
322 UPT_SYSCALL_ARG2(regs), 322 UPT_SYSCALL_ARG2(regs),
323 UPT_SYSCALL_ARG3(regs), 323 UPT_SYSCALL_ARG3(regs),
324 UPT_SYSCALL_ARG4(regs)); 324 UPT_SYSCALL_ARG4(regs));
325 else { 325 else audit_syscall_exit(current,
326 int res = UPT_SYSCALL_RET(regs); 326 AUDITSC_RESULT(UPT_SYSCALL_RET(regs)),
327 audit_syscall_exit(current, AUDITSC_RESULT(res), 327 UPT_SYSCALL_RET(regs));
328 res);
329 }
330 } 328 }
331 329
332 /* Fake a debug trap */ 330 /* Fake a debug trap */
@@ -356,14 +354,3 @@ void syscall_trace(union uml_pt_regs *regs, int entryexit)
356 current->exit_code = 0; 354 current->exit_code = 0;
357 } 355 }
358} 356}
359
360/*
361 * Overrides for Emacs so that we follow Linus's tabbing style.
362 * Emacs will notice this stuff at the end of the file and automatically
363 * adjust the settings for this buffer only. This must remain at the end
364 * of the file.
365 * ---------------------------------------------------------------------------
366 * Local variables:
367 * c-file-style: "linux"
368 * End:
369 */
diff --git a/arch/um/kernel/sysrq.c b/arch/um/kernel/sysrq.c
index e630438f9e73..f80850091e79 100644
--- a/arch/um/kernel/sysrq.c
+++ b/arch/um/kernel/sysrq.c
@@ -3,6 +3,7 @@
3 * Licensed under the GPL 3 * Licensed under the GPL
4 */ 4 */
5 5
6#include "linux/config.h"
6#include "linux/sched.h" 7#include "linux/sched.h"
7#include "linux/kernel.h" 8#include "linux/kernel.h"
8#include "linux/module.h" 9#include "linux/module.h"
@@ -12,14 +13,14 @@
12#include "sysrq.h" 13#include "sysrq.h"
13#include "user_util.h" 14#include "user_util.h"
14 15
15void show_trace(unsigned long * stack) 16/* Catch non-i386 SUBARCH's. */
17#if !defined(CONFIG_UML_X86) || defined(CONFIG_64BIT)
18void show_trace(struct task_struct *task, unsigned long * stack)
16{ 19{
17 /* XXX: Copy the CONFIG_FRAME_POINTER stack-walking backtrace from
18 * arch/i386/kernel/traps.c, and then move this to sys-i386/sysrq.c.*/
19 unsigned long addr; 20 unsigned long addr;
20 21
21 if (!stack) { 22 if (!stack) {
22 stack = (unsigned long*) &stack; 23 stack = (unsigned long*) &stack;
23 WARN_ON(1); 24 WARN_ON(1);
24 } 25 }
25 26
@@ -35,6 +36,7 @@ void show_trace(unsigned long * stack)
35 } 36 }
36 printk("\n"); 37 printk("\n");
37} 38}
39#endif
38 40
39/* 41/*
40 * stack dumps generator - this is used by arch-independent code. 42 * stack dumps generator - this is used by arch-independent code.
@@ -44,7 +46,7 @@ void dump_stack(void)
44{ 46{
45 unsigned long stack; 47 unsigned long stack;
46 48
47 show_trace(&stack); 49 show_trace(current, &stack);
48} 50}
49EXPORT_SYMBOL(dump_stack); 51EXPORT_SYMBOL(dump_stack);
50 52
@@ -59,7 +61,11 @@ void show_stack(struct task_struct *task, unsigned long *esp)
59 int i; 61 int i;
60 62
61 if (esp == NULL) { 63 if (esp == NULL) {
62 if (task != current) { 64 if (task != current && task != NULL) {
65 /* XXX: Isn't this bogus? I.e. isn't this the
66 * *userspace* stack of this task? If not so, use this
67 * even when task == current (as in i386).
68 */
63 esp = (unsigned long *) KSTK_ESP(task); 69 esp = (unsigned long *) KSTK_ESP(task);
64 /* Which one? No actual difference - just coding style.*/ 70 /* Which one? No actual difference - just coding style.*/
65 //esp = (unsigned long *) PT_REGS_IP(&task->thread.regs); 71 //esp = (unsigned long *) PT_REGS_IP(&task->thread.regs);
@@ -77,5 +83,6 @@ void show_stack(struct task_struct *task, unsigned long *esp)
77 printk("%08lx ", *stack++); 83 printk("%08lx ", *stack++);
78 } 84 }
79 85
80 show_trace(esp); 86 printk("Call Trace: \n");
87 show_trace(current, esp);
81} 88}
diff --git a/arch/um/kernel/trap_kern.c b/arch/um/kernel/trap_kern.c
index 1de22d8a313a..c20aef120598 100644
--- a/arch/um/kernel/trap_kern.c
+++ b/arch/um/kernel/trap_kern.c
@@ -23,7 +23,6 @@
23#include "kern.h" 23#include "kern.h"
24#include "chan_kern.h" 24#include "chan_kern.h"
25#include "mconsole_kern.h" 25#include "mconsole_kern.h"
26#include "2_5compat.h"
27#include "mem.h" 26#include "mem.h"
28#include "mem_kern.h" 27#include "mem_kern.h"
29 28
diff --git a/arch/um/kernel/tt/process_kern.c b/arch/um/kernel/tt/process_kern.c
index df810ca8fc12..776310fd5b8b 100644
--- a/arch/um/kernel/tt/process_kern.c
+++ b/arch/um/kernel/tt/process_kern.c
@@ -32,10 +32,6 @@ void *switch_to_tt(void *prev, void *next, void *last)
32 unsigned long flags; 32 unsigned long flags;
33 int err, vtalrm, alrm, prof, cpu; 33 int err, vtalrm, alrm, prof, cpu;
34 char c; 34 char c;
35 /* jailing and SMP are incompatible, so this doesn't need to be
36 * made per-cpu
37 */
38 static int reading;
39 35
40 from = prev; 36 from = prev;
41 to = next; 37 to = next;
@@ -59,13 +55,11 @@ void *switch_to_tt(void *prev, void *next, void *last)
59 c = 0; 55 c = 0;
60 set_current(to); 56 set_current(to);
61 57
62 reading = 0;
63 err = os_write_file(to->thread.mode.tt.switch_pipe[1], &c, sizeof(c)); 58 err = os_write_file(to->thread.mode.tt.switch_pipe[1], &c, sizeof(c));
64 if(err != sizeof(c)) 59 if(err != sizeof(c))
65 panic("write of switch_pipe failed, err = %d", -err); 60 panic("write of switch_pipe failed, err = %d", -err);
66 61
67 reading = 1; 62 if(from->thread.mode.tt.switch_pipe[0] == -1)
68 if(from->thread.mode.tt.switch_pipe[0] == -1)
69 os_kill_process(os_getpid(), 0); 63 os_kill_process(os_getpid(), 0);
70 64
71 err = os_read_file(from->thread.mode.tt.switch_pipe[0], &c, sizeof(c)); 65 err = os_read_file(from->thread.mode.tt.switch_pipe[0], &c, sizeof(c));
diff --git a/arch/um/kernel/um_arch.c b/arch/um/kernel/um_arch.c
index 4d10ec372a67..418427107b29 100644
--- a/arch/um/kernel/um_arch.c
+++ b/arch/um/kernel/um_arch.c
@@ -111,12 +111,6 @@ struct seq_operations cpuinfo_op = {
111 .show = show_cpuinfo, 111 .show = show_cpuinfo,
112}; 112};
113 113
114pte_t * __bad_pagetable(void)
115{
116 panic("Someone should implement __bad_pagetable");
117 return(NULL);
118}
119
120/* Set in linux_main */ 114/* Set in linux_main */
121unsigned long host_task_size; 115unsigned long host_task_size;
122unsigned long task_size; 116unsigned long task_size;
diff --git a/arch/um/sys-i386/sysrq.c b/arch/um/sys-i386/sysrq.c
index 281fc7b8ca00..e3706d15c4f5 100644
--- a/arch/um/sys-i386/sysrq.c
+++ b/arch/um/sys-i386/sysrq.c
@@ -3,12 +3,15 @@
3 * Licensed under the GPL 3 * Licensed under the GPL
4 */ 4 */
5 5
6#include "linux/config.h"
6#include "linux/kernel.h" 7#include "linux/kernel.h"
7#include "linux/smp.h" 8#include "linux/smp.h"
8#include "linux/sched.h" 9#include "linux/sched.h"
10#include "linux/kallsyms.h"
9#include "asm/ptrace.h" 11#include "asm/ptrace.h"
10#include "sysrq.h" 12#include "sysrq.h"
11 13
14/* This is declared by <linux/sched.h> */
12void show_regs(struct pt_regs *regs) 15void show_regs(struct pt_regs *regs)
13{ 16{
14 printk("\n"); 17 printk("\n");
@@ -31,5 +34,80 @@ void show_regs(struct pt_regs *regs)
31 0xffff & PT_REGS_DS(regs), 34 0xffff & PT_REGS_DS(regs),
32 0xffff & PT_REGS_ES(regs)); 35 0xffff & PT_REGS_ES(regs));
33 36
34 show_trace((unsigned long *) &regs); 37 show_trace(NULL, (unsigned long *) &regs);
35} 38}
39
40/* Copied from i386. */
41static inline int valid_stack_ptr(struct thread_info *tinfo, void *p)
42{
43 return p > (void *)tinfo &&
44 p < (void *)tinfo + THREAD_SIZE - 3;
45}
46
47/* Adapted from i386 (we also print the address we read from). */
48static inline unsigned long print_context_stack(struct thread_info *tinfo,
49 unsigned long *stack, unsigned long ebp)
50{
51 unsigned long addr;
52
53#ifdef CONFIG_FRAME_POINTER
54 while (valid_stack_ptr(tinfo, (void *)ebp)) {
55 addr = *(unsigned long *)(ebp + 4);
56 printk("%08lx: [<%08lx>]", ebp + 4, addr);
57 print_symbol(" %s", addr);
58 printk("\n");
59 ebp = *(unsigned long *)ebp;
60 }
61#else
62 while (valid_stack_ptr(tinfo, stack)) {
63 addr = *stack;
64 if (__kernel_text_address(addr)) {
65 printk("%08lx: [<%08lx>]", (unsigned long) stack, addr);
66 print_symbol(" %s", addr);
67 printk("\n");
68 }
69 stack++;
70 }
71#endif
72 return ebp;
73}
74
75void show_trace(struct task_struct* task, unsigned long * stack)
76{
77 unsigned long ebp;
78 struct thread_info *context;
79
80 /* Turn this into BUG_ON if possible. */
81 if (!stack) {
82 stack = (unsigned long*) &stack;
83 printk("show_trace: got NULL stack, implicit assumption task == current");
84 WARN_ON(1);
85 }
86
87 if (!task)
88 task = current;
89
90 if (task != current) {
91 //ebp = (unsigned long) KSTK_EBP(task);
92 /* Which one? No actual difference - just coding style.*/
93 ebp = (unsigned long) PT_REGS_EBP(&task->thread.regs);
94 } else {
95 asm ("movl %%ebp, %0" : "=r" (ebp) : );
96 }
97
98 context = (struct thread_info *)
99 ((unsigned long)stack & (~(THREAD_SIZE - 1)));
100 print_context_stack(context, stack, ebp);
101
102 /*while (((long) stack & (THREAD_SIZE-1)) != 0) {
103 addr = *stack;
104 if (__kernel_text_address(addr)) {
105 printk("%08lx: [<%08lx>]", (unsigned long) stack, addr);
106 print_symbol(" %s", addr);
107 printk("\n");
108 }
109 stack++;
110 }*/
111 printk("\n");
112}
113
diff --git a/arch/um/sys-ppc/sysrq.c b/arch/um/sys-ppc/sysrq.c
index 82d6e9335bb6..2f816f1a0ff4 100644
--- a/arch/um/sys-ppc/sysrq.c
+++ b/arch/um/sys-ppc/sysrq.c
@@ -27,17 +27,5 @@ void show_regs(struct pt_regs_subarch *regs)
27 0xffff & regs->xds, 0xffff & regs->xes); 27 0xffff & regs->xds, 0xffff & regs->xes);
28#endif 28#endif
29 29
30 show_trace(&regs->gpr[1]); 30 show_trace(current, &regs->gpr[1]);
31} 31}
32
33
34/*
35 * Overrides for Emacs so that we follow Linus's tabbing style.
36 * Emacs will notice this stuff at the end of the file and automatically
37 * adjust the settings for this buffer only. This must remain at the end
38 * of the file.
39 * ---------------------------------------------------------------------------
40 * Local variables:
41 * c-file-style: "linux"
42 * End:
43 */
diff --git a/arch/um/sys-x86_64/syscalls.c b/arch/um/sys-x86_64/syscalls.c
index d4a59657fb99..6f44f40204ed 100644
--- a/arch/um/sys-x86_64/syscalls.c
+++ b/arch/um/sys-x86_64/syscalls.c
@@ -133,23 +133,27 @@ static long arch_prctl_tt(int code, unsigned long addr)
133 133
134#ifdef CONFIG_MODE_SKAS 134#ifdef CONFIG_MODE_SKAS
135 135
136/* XXX: Must also call arch_prctl in the host, beside saving the segment bases! */
136static long arch_prctl_skas(int code, unsigned long addr) 137static long arch_prctl_skas(int code, unsigned long addr)
137{ 138{
138 long ret = 0; 139 long ret = 0;
139 140
140 switch(code){ 141 switch(code){
141 case ARCH_SET_GS:
142 current->thread.regs.regs.skas.regs[GS_BASE / sizeof(unsigned long)] = addr;
143 break;
144 case ARCH_SET_FS: 142 case ARCH_SET_FS:
145 current->thread.regs.regs.skas.regs[FS_BASE / sizeof(unsigned long)] = addr; 143 current->thread.regs.regs.skas.regs[FS_BASE / sizeof(unsigned long)] = addr;
146 break; 144 break;
145 case ARCH_SET_GS:
146 current->thread.regs.regs.skas.regs[GS_BASE / sizeof(unsigned long)] = addr;
147 break;
147 case ARCH_GET_FS: 148 case ARCH_GET_FS:
148 ret = put_user(current->thread.regs.regs.skas.regs[GS / sizeof(unsigned long)], &addr); 149 ret = put_user(current->thread.regs.regs.skas.
150 regs[FS_BASE / sizeof(unsigned long)],
151 (unsigned long __user *)addr);
149 break; 152 break;
150 case ARCH_GET_GS: 153 case ARCH_GET_GS:
151 ret = put_user(current->thread.regs.regs.skas.regs[FS / sizeof(unsigned \ 154 ret = put_user(current->thread.regs.regs.skas.
152long)], &addr); 155 regs[GS_BASE / sizeof(unsigned long)],
156 (unsigned long __user *)addr);
153 break; 157 break;
154 default: 158 default:
155 ret = -EINVAL; 159 ret = -EINVAL;
diff --git a/arch/um/sys-x86_64/sysrq.c b/arch/um/sys-x86_64/sysrq.c
index ddf74691a610..d0a25af19a5b 100644
--- a/arch/um/sys-x86_64/sysrq.c
+++ b/arch/um/sys-x86_64/sysrq.c
@@ -36,14 +36,5 @@ void __show_regs(struct pt_regs * regs)
36void show_regs(struct pt_regs *regs) 36void show_regs(struct pt_regs *regs)
37{ 37{
38 __show_regs(regs); 38 __show_regs(regs);
39 show_trace((unsigned long *) &regs); 39 show_trace(current, (unsigned long *) &regs);
40} 40}
41
42/* Emacs will notice this stuff at the end of the file and automatically
43 * adjust the settings for this buffer only. This must remain at the end
44 * of the file.
45 * ---------------------------------------------------------------------------
46 * Local variables:
47 * c-file-style: "linux"
48 * End:
49 */
diff --git a/arch/x86_64/Kconfig b/arch/x86_64/Kconfig
index 0f430d9d3632..289f448ac89c 100644
--- a/arch/x86_64/Kconfig
+++ b/arch/x86_64/Kconfig
@@ -305,6 +305,7 @@ config HPET_TIMER
305 305
306config X86_PM_TIMER 306config X86_PM_TIMER
307 bool "PM timer" 307 bool "PM timer"
308 depends on ACPI
308 default y 309 default y
309 help 310 help
310 Support the ACPI PM timer for time keeping. This is slow, 311 Support the ACPI PM timer for time keeping. This is slow,
diff --git a/arch/x86_64/kernel/io_apic.c b/arch/x86_64/kernel/io_apic.c
index 80e9b498c443..afd87e64d0a8 100644
--- a/arch/x86_64/kernel/io_apic.c
+++ b/arch/x86_64/kernel/io_apic.c
@@ -37,6 +37,7 @@
37#include <asm/desc.h> 37#include <asm/desc.h>
38#include <asm/proto.h> 38#include <asm/proto.h>
39#include <asm/mach_apic.h> 39#include <asm/mach_apic.h>
40#include <asm/acpi.h>
40 41
41#define __apicdebuginit __init 42#define __apicdebuginit __init
42 43
diff --git a/arch/x86_64/kernel/mpparse.c b/arch/x86_64/kernel/mpparse.c
index f86d9db94bfc..61a63be6b294 100644
--- a/arch/x86_64/kernel/mpparse.c
+++ b/arch/x86_64/kernel/mpparse.c
@@ -30,6 +30,7 @@
30#include <asm/pgalloc.h> 30#include <asm/pgalloc.h>
31#include <asm/io_apic.h> 31#include <asm/io_apic.h>
32#include <asm/proto.h> 32#include <asm/proto.h>
33#include <asm/acpi.h>
33 34
34/* Have we found an MP table */ 35/* Have we found an MP table */
35int smp_found_config; 36int smp_found_config;
diff --git a/arch/x86_64/kernel/signal.c b/arch/x86_64/kernel/signal.c
index 3fdcdba0fec5..429c0269dc4e 100644
--- a/arch/x86_64/kernel/signal.c
+++ b/arch/x86_64/kernel/signal.c
@@ -28,6 +28,7 @@
28#include <asm/uaccess.h> 28#include <asm/uaccess.h>
29#include <asm/i387.h> 29#include <asm/i387.h>
30#include <asm/proto.h> 30#include <asm/proto.h>
31#include <asm/ia32_unistd.h>
31 32
32/* #define DEBUG_SIG 1 */ 33/* #define DEBUG_SIG 1 */
33 34
diff --git a/arch/x86_64/kernel/time.c b/arch/x86_64/kernel/time.c
index 735b6767c8ed..fb8c809b4cd9 100644
--- a/arch/x86_64/kernel/time.c
+++ b/arch/x86_64/kernel/time.c
@@ -27,7 +27,9 @@
27#include <linux/bcd.h> 27#include <linux/bcd.h>
28#include <linux/kallsyms.h> 28#include <linux/kallsyms.h>
29#include <linux/acpi.h> 29#include <linux/acpi.h>
30#ifdef CONFIG_ACPI
30#include <acpi/achware.h> /* for PM timer frequency */ 31#include <acpi/achware.h> /* for PM timer frequency */
32#endif
31#include <asm/8253pit.h> 33#include <asm/8253pit.h>
32#include <asm/pgtable.h> 34#include <asm/pgtable.h>
33#include <asm/vsyscall.h> 35#include <asm/vsyscall.h>
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-04 00:27:34 -0400