diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/powerpc/platforms/85xx/p1022_ds.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c b/arch/powerpc/platforms/85xx/p1022_ds.c index e083e1f4a6f4..266b3aadfe5e 100644 --- a/arch/powerpc/platforms/85xx/p1022_ds.c +++ b/arch/powerpc/platforms/85xx/p1022_ds.c | |||
@@ -195,8 +195,13 @@ void p1022ds_set_pixel_clock(unsigned int pixclock) | |||
195 | do_div(temp, pixclock); | 195 | do_div(temp, pixclock); |
196 | freq = temp; | 196 | freq = temp; |
197 | 197 | ||
198 | /* pixclk is the ratio of the platform clock to the pixel clock */ | 198 | /* |
199 | * 'pxclk' is the ratio of the platform clock to the pixel clock. | ||
200 | * This number is programmed into the CLKDVDR register, and the valid | ||
201 | * range of values is 2-255. | ||
202 | */ | ||
199 | pxclk = DIV_ROUND_CLOSEST(fsl_get_sys_freq(), freq); | 203 | pxclk = DIV_ROUND_CLOSEST(fsl_get_sys_freq(), freq); |
204 | pxclk = clamp_t(u32, pxclk, 2, 255); | ||
200 | 205 | ||
201 | /* Disable the pixel clock, and set it to non-inverted and no delay */ | 206 | /* Disable the pixel clock, and set it to non-inverted and no delay */ |
202 | clrbits32(&guts->clkdvdr, | 207 | clrbits32(&guts->clkdvdr, |