diff options
Diffstat (limited to 'arch')
187 files changed, 2468 insertions, 1645 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 233a222752c0..c2238cd474c7 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -18,6 +18,8 @@ config ARM | |||
18 | select HAVE_KRETPROBES if (HAVE_KPROBES) | 18 | select HAVE_KRETPROBES if (HAVE_KPROBES) |
19 | select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) | 19 | select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) |
20 | select HAVE_GENERIC_DMA_COHERENT | 20 | select HAVE_GENERIC_DMA_COHERENT |
21 | select HAVE_KERNEL_GZIP | ||
22 | select HAVE_KERNEL_LZO | ||
21 | help | 23 | help |
22 | The ARM series is a line of low-power-consumption RISC chip designs | 24 | The ARM series is a line of low-power-consumption RISC chip designs |
23 | licensed by ARM Ltd and targeted at embedded applications and | 25 | licensed by ARM Ltd and targeted at embedded applications and |
@@ -688,6 +690,7 @@ config ARCH_DAVINCI | |||
688 | select HAVE_IDE | 690 | select HAVE_IDE |
689 | select COMMON_CLKDEV | 691 | select COMMON_CLKDEV |
690 | select GENERIC_ALLOCATOR | 692 | select GENERIC_ALLOCATOR |
693 | select ARCH_HAS_HOLES_MEMORYMODEL | ||
691 | help | 694 | help |
692 | Support for TI's DaVinci platform. | 695 | Support for TI's DaVinci platform. |
693 | 696 | ||
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index ce39dc540085..2d4d88ba73bf 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile | |||
@@ -63,8 +63,12 @@ endif | |||
63 | 63 | ||
64 | SEDFLAGS = s/TEXT_START/$(ZTEXTADDR)/;s/BSS_START/$(ZBSSADDR)/ | 64 | SEDFLAGS = s/TEXT_START/$(ZTEXTADDR)/;s/BSS_START/$(ZBSSADDR)/ |
65 | 65 | ||
66 | targets := vmlinux vmlinux.lds piggy.gz piggy.o font.o font.c \ | 66 | suffix_$(CONFIG_KERNEL_GZIP) = gzip |
67 | head.o misc.o $(OBJS) | 67 | suffix_$(CONFIG_KERNEL_LZO) = lzo |
68 | |||
69 | targets := vmlinux vmlinux.lds \ | ||
70 | piggy.$(suffix_y) piggy.$(suffix_y).o \ | ||
71 | font.o font.c head.o misc.o $(OBJS) | ||
68 | 72 | ||
69 | ifeq ($(CONFIG_FUNCTION_TRACER),y) | 73 | ifeq ($(CONFIG_FUNCTION_TRACER),y) |
70 | ORIG_CFLAGS := $(KBUILD_CFLAGS) | 74 | ORIG_CFLAGS := $(KBUILD_CFLAGS) |
@@ -87,22 +91,34 @@ endif | |||
87 | ifneq ($(PARAMS_PHYS),) | 91 | ifneq ($(PARAMS_PHYS),) |
88 | LDFLAGS_vmlinux += --defsym params_phys=$(PARAMS_PHYS) | 92 | LDFLAGS_vmlinux += --defsym params_phys=$(PARAMS_PHYS) |
89 | endif | 93 | endif |
90 | LDFLAGS_vmlinux += -p --no-undefined -X \ | 94 | # ? |
91 | $(shell $(CC) $(KBUILD_CFLAGS) --print-libgcc-file-name) -T | 95 | LDFLAGS_vmlinux += -p |
96 | # Report unresolved symbol references | ||
97 | LDFLAGS_vmlinux += --no-undefined | ||
98 | # Delete all temporary local symbols | ||
99 | LDFLAGS_vmlinux += -X | ||
100 | # Next argument is a linker script | ||
101 | LDFLAGS_vmlinux += -T | ||
102 | |||
103 | # For __aeabi_uidivmod | ||
104 | lib1funcs = $(obj)/lib1funcs.o | ||
105 | |||
106 | $(obj)/lib1funcs.S: $(srctree)/arch/$(SRCARCH)/lib/lib1funcs.S FORCE | ||
107 | $(call cmd,shipped) | ||
92 | 108 | ||
93 | # Don't allow any static data in misc.o, which | 109 | # Don't allow any static data in misc.o, which |
94 | # would otherwise mess up our GOT table | 110 | # would otherwise mess up our GOT table |
95 | CFLAGS_misc.o := -Dstatic= | 111 | CFLAGS_misc.o := -Dstatic= |
96 | 112 | ||
97 | $(obj)/vmlinux: $(obj)/vmlinux.lds $(obj)/$(HEAD) $(obj)/piggy.o \ | 113 | $(obj)/vmlinux: $(obj)/vmlinux.lds $(obj)/$(HEAD) $(obj)/piggy.$(suffix_y).o \ |
98 | $(addprefix $(obj)/, $(OBJS)) FORCE | 114 | $(addprefix $(obj)/, $(OBJS)) $(lib1funcs) FORCE |
99 | $(call if_changed,ld) | 115 | $(call if_changed,ld) |
100 | @: | 116 | @: |
101 | 117 | ||
102 | $(obj)/piggy.gz: $(obj)/../Image FORCE | 118 | $(obj)/piggy.$(suffix_y): $(obj)/../Image FORCE |
103 | $(call if_changed,gzip) | 119 | $(call if_changed,$(suffix_y)) |
104 | 120 | ||
105 | $(obj)/piggy.o: $(obj)/piggy.gz FORCE | 121 | $(obj)/piggy.$(suffix_y).o: $(obj)/piggy.$(suffix_y) FORCE |
106 | 122 | ||
107 | CFLAGS_font.o := -Dstatic= | 123 | CFLAGS_font.o := -Dstatic= |
108 | 124 | ||
diff --git a/arch/arm/boot/compressed/misc.c b/arch/arm/boot/compressed/misc.c index 17153b54613b..7e0fe4d42c7b 100644 --- a/arch/arm/boot/compressed/misc.c +++ b/arch/arm/boot/compressed/misc.c | |||
@@ -18,10 +18,15 @@ | |||
18 | 18 | ||
19 | unsigned int __machine_arch_type; | 19 | unsigned int __machine_arch_type; |
20 | 20 | ||
21 | #define _LINUX_STRING_H_ | ||
22 | |||
21 | #include <linux/compiler.h> /* for inline */ | 23 | #include <linux/compiler.h> /* for inline */ |
22 | #include <linux/types.h> /* for size_t */ | 24 | #include <linux/types.h> /* for size_t */ |
23 | #include <linux/stddef.h> /* for NULL */ | 25 | #include <linux/stddef.h> /* for NULL */ |
24 | #include <asm/string.h> | 26 | #include <asm/string.h> |
27 | #include <linux/linkage.h> | ||
28 | |||
29 | #include <asm/unaligned.h> | ||
25 | 30 | ||
26 | #ifdef STANDALONE_DEBUG | 31 | #ifdef STANDALONE_DEBUG |
27 | #define putstr printf | 32 | #define putstr printf |
@@ -188,34 +193,8 @@ static inline __ptr_t memcpy(__ptr_t __dest, __const __ptr_t __src, | |||
188 | /* | 193 | /* |
189 | * gzip delarations | 194 | * gzip delarations |
190 | */ | 195 | */ |
191 | #define OF(args) args | ||
192 | #define STATIC static | 196 | #define STATIC static |
193 | 197 | ||
194 | typedef unsigned char uch; | ||
195 | typedef unsigned short ush; | ||
196 | typedef unsigned long ulg; | ||
197 | |||
198 | #define WSIZE 0x8000 /* Window size must be at least 32k, */ | ||
199 | /* and a power of two */ | ||
200 | |||
201 | static uch *inbuf; /* input buffer */ | ||
202 | static uch window[WSIZE]; /* Sliding window buffer */ | ||
203 | |||
204 | static unsigned insize; /* valid bytes in inbuf */ | ||
205 | static unsigned inptr; /* index of next byte to be processed in inbuf */ | ||
206 | static unsigned outcnt; /* bytes in output buffer */ | ||
207 | |||
208 | /* gzip flag byte */ | ||
209 | #define ASCII_FLAG 0x01 /* bit 0 set: file probably ascii text */ | ||
210 | #define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */ | ||
211 | #define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */ | ||
212 | #define ORIG_NAME 0x08 /* bit 3 set: original file name present */ | ||
213 | #define COMMENT 0x10 /* bit 4 set: file comment present */ | ||
214 | #define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */ | ||
215 | #define RESERVED 0xC0 /* bit 6,7: reserved */ | ||
216 | |||
217 | #define get_byte() (inptr < insize ? inbuf[inptr++] : fill_inbuf()) | ||
218 | |||
219 | /* Diagnostic functions */ | 198 | /* Diagnostic functions */ |
220 | #ifdef DEBUG | 199 | #ifdef DEBUG |
221 | # define Assert(cond,msg) {if(!(cond)) error(msg);} | 200 | # define Assert(cond,msg) {if(!(cond)) error(msg);} |
@@ -233,24 +212,20 @@ static unsigned outcnt; /* bytes in output buffer */ | |||
233 | # define Tracecv(c,x) | 212 | # define Tracecv(c,x) |
234 | #endif | 213 | #endif |
235 | 214 | ||
236 | static int fill_inbuf(void); | ||
237 | static void flush_window(void); | ||
238 | static void error(char *m); | 215 | static void error(char *m); |
239 | 216 | ||
240 | extern char input_data[]; | 217 | extern char input_data[]; |
241 | extern char input_data_end[]; | 218 | extern char input_data_end[]; |
242 | 219 | ||
243 | static uch *output_data; | 220 | static unsigned char *output_data; |
244 | static ulg output_ptr; | 221 | static unsigned long output_ptr; |
245 | static ulg bytes_out; | ||
246 | 222 | ||
247 | static void error(char *m); | 223 | static void error(char *m); |
248 | 224 | ||
249 | static void putstr(const char *); | 225 | static void putstr(const char *); |
250 | 226 | ||
251 | extern int end; | 227 | static unsigned long free_mem_ptr; |
252 | static ulg free_mem_ptr; | 228 | static unsigned long free_mem_end_ptr; |
253 | static ulg free_mem_end_ptr; | ||
254 | 229 | ||
255 | #ifdef STANDALONE_DEBUG | 230 | #ifdef STANDALONE_DEBUG |
256 | #define NO_INFLATE_MALLOC | 231 | #define NO_INFLATE_MALLOC |
@@ -258,46 +233,13 @@ static ulg free_mem_end_ptr; | |||
258 | 233 | ||
259 | #define ARCH_HAS_DECOMP_WDOG | 234 | #define ARCH_HAS_DECOMP_WDOG |
260 | 235 | ||
261 | #include "../../../../lib/inflate.c" | 236 | #ifdef CONFIG_KERNEL_GZIP |
262 | 237 | #include "../../../../lib/decompress_inflate.c" | |
263 | /* =========================================================================== | 238 | #endif |
264 | * Fill the input buffer. This is called only when the buffer is empty | ||
265 | * and at least one byte is really needed. | ||
266 | */ | ||
267 | int fill_inbuf(void) | ||
268 | { | ||
269 | if (insize != 0) | ||
270 | error("ran out of input data"); | ||
271 | |||
272 | inbuf = input_data; | ||
273 | insize = &input_data_end[0] - &input_data[0]; | ||
274 | |||
275 | inptr = 1; | ||
276 | return inbuf[0]; | ||
277 | } | ||
278 | 239 | ||
279 | /* =========================================================================== | 240 | #ifdef CONFIG_KERNEL_LZO |
280 | * Write the output window window[0..outcnt-1] and update crc and bytes_out. | 241 | #include "../../../../lib/decompress_unlzo.c" |
281 | * (Used for the decompressed data only.) | 242 | #endif |
282 | */ | ||
283 | void flush_window(void) | ||
284 | { | ||
285 | ulg c = crc; | ||
286 | unsigned n; | ||
287 | uch *in, *out, ch; | ||
288 | |||
289 | in = window; | ||
290 | out = &output_data[output_ptr]; | ||
291 | for (n = 0; n < outcnt; n++) { | ||
292 | ch = *out++ = *in++; | ||
293 | c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8); | ||
294 | } | ||
295 | crc = c; | ||
296 | bytes_out += (ulg)outcnt; | ||
297 | output_ptr += (ulg)outcnt; | ||
298 | outcnt = 0; | ||
299 | putstr("."); | ||
300 | } | ||
301 | 243 | ||
302 | #ifndef arch_error | 244 | #ifndef arch_error |
303 | #define arch_error(x) | 245 | #define arch_error(x) |
@@ -314,22 +256,33 @@ static void error(char *x) | |||
314 | while(1); /* Halt */ | 256 | while(1); /* Halt */ |
315 | } | 257 | } |
316 | 258 | ||
259 | asmlinkage void __div0(void) | ||
260 | { | ||
261 | error("Attempting division by 0!"); | ||
262 | } | ||
263 | |||
317 | #ifndef STANDALONE_DEBUG | 264 | #ifndef STANDALONE_DEBUG |
318 | 265 | ||
319 | ulg | 266 | unsigned long |
320 | decompress_kernel(ulg output_start, ulg free_mem_ptr_p, ulg free_mem_ptr_end_p, | 267 | decompress_kernel(unsigned long output_start, unsigned long free_mem_ptr_p, |
321 | int arch_id) | 268 | unsigned long free_mem_ptr_end_p, |
269 | int arch_id) | ||
322 | { | 270 | { |
323 | output_data = (uch *)output_start; /* Points to kernel start */ | 271 | unsigned char *tmp; |
272 | |||
273 | output_data = (unsigned char *)output_start; | ||
324 | free_mem_ptr = free_mem_ptr_p; | 274 | free_mem_ptr = free_mem_ptr_p; |
325 | free_mem_end_ptr = free_mem_ptr_end_p; | 275 | free_mem_end_ptr = free_mem_ptr_end_p; |
326 | __machine_arch_type = arch_id; | 276 | __machine_arch_type = arch_id; |
327 | 277 | ||
328 | arch_decomp_setup(); | 278 | arch_decomp_setup(); |
329 | 279 | ||
330 | makecrc(); | 280 | tmp = (unsigned char *) (((unsigned long)input_data_end) - 4); |
281 | output_ptr = get_unaligned_le32(tmp); | ||
282 | |||
331 | putstr("Uncompressing Linux..."); | 283 | putstr("Uncompressing Linux..."); |
332 | gunzip(); | 284 | decompress(input_data, input_data_end - input_data, |
285 | NULL, NULL, output_data, NULL, error); | ||
333 | putstr(" done, booting the kernel.\n"); | 286 | putstr(" done, booting the kernel.\n"); |
334 | return output_ptr; | 287 | return output_ptr; |
335 | } | 288 | } |
@@ -341,11 +294,10 @@ int main() | |||
341 | { | 294 | { |
342 | output_data = output_buffer; | 295 | output_data = output_buffer; |
343 | 296 | ||
344 | makecrc(); | ||
345 | putstr("Uncompressing Linux..."); | 297 | putstr("Uncompressing Linux..."); |
346 | gunzip(); | 298 | decompress(input_data, input_data_end - input_data, |
299 | NULL, NULL, output_data, NULL, error); | ||
347 | putstr("done.\n"); | 300 | putstr("done.\n"); |
348 | return 0; | 301 | return 0; |
349 | } | 302 | } |
350 | #endif | 303 | #endif |
351 | |||
diff --git a/arch/arm/boot/compressed/piggy.gzip.S b/arch/arm/boot/compressed/piggy.gzip.S new file mode 100644 index 000000000000..a68adf91a165 --- /dev/null +++ b/arch/arm/boot/compressed/piggy.gzip.S | |||
@@ -0,0 +1,6 @@ | |||
1 | .section .piggydata,#alloc | ||
2 | .globl input_data | ||
3 | input_data: | ||
4 | .incbin "arch/arm/boot/compressed/piggy.gzip" | ||
5 | .globl input_data_end | ||
6 | input_data_end: | ||
diff --git a/arch/arm/boot/compressed/piggy.S b/arch/arm/boot/compressed/piggy.lzo.S index 54c951800ebd..a425ad95959a 100644 --- a/arch/arm/boot/compressed/piggy.S +++ b/arch/arm/boot/compressed/piggy.lzo.S | |||
@@ -1,6 +1,6 @@ | |||
1 | .section .piggydata,#alloc | 1 | .section .piggydata,#alloc |
2 | .globl input_data | 2 | .globl input_data |
3 | input_data: | 3 | input_data: |
4 | .incbin "arch/arm/boot/compressed/piggy.gz" | 4 | .incbin "arch/arm/boot/compressed/piggy.lzo" |
5 | .globl input_data_end | 5 | .globl input_data_end |
6 | input_data_end: | 6 | input_data_end: |
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c index a9b650dcc172..077ecf4fecda 100644 --- a/arch/arm/mach-davinci/board-dm355-evm.c +++ b/arch/arm/mach-davinci/board-dm355-evm.c | |||
@@ -236,6 +236,7 @@ static struct vpfe_subdev_info vpfe_sub_devs[] = { | |||
236 | 236 | ||
237 | static struct vpfe_config vpfe_cfg = { | 237 | static struct vpfe_config vpfe_cfg = { |
238 | .num_subdevs = ARRAY_SIZE(vpfe_sub_devs), | 238 | .num_subdevs = ARRAY_SIZE(vpfe_sub_devs), |
239 | .i2c_adapter_id = 1, | ||
239 | .sub_devs = vpfe_sub_devs, | 240 | .sub_devs = vpfe_sub_devs, |
240 | .card_name = "DM355 EVM", | 241 | .card_name = "DM355 EVM", |
241 | .ccdc = "DM355 CCDC", | 242 | .ccdc = "DM355 CCDC", |
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c index 289fe1b7d25a..b476395d2cd4 100644 --- a/arch/arm/mach-davinci/board-dm365-evm.c +++ b/arch/arm/mach-davinci/board-dm365-evm.c | |||
@@ -192,7 +192,11 @@ static struct davinci_i2c_platform_data i2c_pdata = { | |||
192 | .bus_delay = 0 /* usec */, | 192 | .bus_delay = 0 /* usec */, |
193 | }; | 193 | }; |
194 | 194 | ||
195 | #ifdef CONFIG_KEYBOARD_DAVINCI | 195 | static int dm365evm_keyscan_enable(struct device *dev) |
196 | { | ||
197 | return davinci_cfg_reg(DM365_KEYSCAN); | ||
198 | } | ||
199 | |||
196 | static unsigned short dm365evm_keymap[] = { | 200 | static unsigned short dm365evm_keymap[] = { |
197 | KEY_KP2, | 201 | KEY_KP2, |
198 | KEY_LEFT, | 202 | KEY_LEFT, |
@@ -214,6 +218,7 @@ static unsigned short dm365evm_keymap[] = { | |||
214 | }; | 218 | }; |
215 | 219 | ||
216 | static struct davinci_ks_platform_data dm365evm_ks_data = { | 220 | static struct davinci_ks_platform_data dm365evm_ks_data = { |
221 | .device_enable = dm365evm_keyscan_enable, | ||
217 | .keymap = dm365evm_keymap, | 222 | .keymap = dm365evm_keymap, |
218 | .keymapsize = ARRAY_SIZE(dm365evm_keymap), | 223 | .keymapsize = ARRAY_SIZE(dm365evm_keymap), |
219 | .rep = 1, | 224 | .rep = 1, |
@@ -222,7 +227,6 @@ static struct davinci_ks_platform_data dm365evm_ks_data = { | |||
222 | .interval = 0x2, | 227 | .interval = 0x2, |
223 | .matrix_type = DAVINCI_KEYSCAN_MATRIX_4X4, | 228 | .matrix_type = DAVINCI_KEYSCAN_MATRIX_4X4, |
224 | }; | 229 | }; |
225 | #endif | ||
226 | 230 | ||
227 | static int cpld_mmc_get_cd(int module) | 231 | static int cpld_mmc_get_cd(int module) |
228 | { | 232 | { |
@@ -511,10 +515,7 @@ static __init void dm365_evm_init(void) | |||
511 | 515 | ||
512 | dm365_init_asp(&dm365_evm_snd_data); | 516 | dm365_init_asp(&dm365_evm_snd_data); |
513 | dm365_init_rtc(); | 517 | dm365_init_rtc(); |
514 | |||
515 | #ifdef CONFIG_KEYBOARD_DAVINCI | ||
516 | dm365_init_ks(&dm365evm_ks_data); | 518 | dm365_init_ks(&dm365evm_ks_data); |
517 | #endif | ||
518 | } | 519 | } |
519 | 520 | ||
520 | static __init void dm365_evm_irq_init(void) | 521 | static __init void dm365_evm_irq_init(void) |
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c index fd0398bc6db3..e9612cf727b7 100644 --- a/arch/arm/mach-davinci/board-dm644x-evm.c +++ b/arch/arm/mach-davinci/board-dm644x-evm.c | |||
@@ -247,6 +247,7 @@ static struct vpfe_subdev_info vpfe_sub_devs[] = { | |||
247 | 247 | ||
248 | static struct vpfe_config vpfe_cfg = { | 248 | static struct vpfe_config vpfe_cfg = { |
249 | .num_subdevs = ARRAY_SIZE(vpfe_sub_devs), | 249 | .num_subdevs = ARRAY_SIZE(vpfe_sub_devs), |
250 | .i2c_adapter_id = 1, | ||
250 | .sub_devs = vpfe_sub_devs, | 251 | .sub_devs = vpfe_sub_devs, |
251 | .card_name = "DM6446 EVM", | 252 | .card_name = "DM6446 EVM", |
252 | .ccdc = "DM6446 CCDC", | 253 | .ccdc = "DM6446 CCDC", |
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c index 52b287cf3a42..37311d1830eb 100644 --- a/arch/arm/mach-davinci/cp_intc.c +++ b/arch/arm/mach-davinci/cp_intc.c | |||
@@ -81,12 +81,23 @@ static int cp_intc_set_irq_type(unsigned int irq, unsigned int flow_type) | |||
81 | return 0; | 81 | return 0; |
82 | } | 82 | } |
83 | 83 | ||
84 | /* | ||
85 | * Faking this allows us to to work with suspend functions of | ||
86 | * generic drivers which call {enable|disable}_irq_wake for | ||
87 | * wake up interrupt sources (eg RTC on DA850). | ||
88 | */ | ||
89 | static int cp_intc_set_wake(unsigned int irq, unsigned int on) | ||
90 | { | ||
91 | return 0; | ||
92 | } | ||
93 | |||
84 | static struct irq_chip cp_intc_irq_chip = { | 94 | static struct irq_chip cp_intc_irq_chip = { |
85 | .name = "cp_intc", | 95 | .name = "cp_intc", |
86 | .ack = cp_intc_ack_irq, | 96 | .ack = cp_intc_ack_irq, |
87 | .mask = cp_intc_mask_irq, | 97 | .mask = cp_intc_mask_irq, |
88 | .unmask = cp_intc_unmask_irq, | 98 | .unmask = cp_intc_unmask_irq, |
89 | .set_type = cp_intc_set_irq_type, | 99 | .set_type = cp_intc_set_irq_type, |
100 | .set_wake = cp_intc_set_wake, | ||
90 | }; | 101 | }; |
91 | 102 | ||
92 | void __init cp_intc_init(void __iomem *base, unsigned short num_irq, | 103 | void __init cp_intc_init(void __iomem *base, unsigned short num_irq, |
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index dd2d32c4ce86..a5105f03fd86 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c | |||
@@ -481,11 +481,18 @@ static struct platform_device da8xx_rtc_device = { | |||
481 | 481 | ||
482 | int da8xx_register_rtc(void) | 482 | int da8xx_register_rtc(void) |
483 | { | 483 | { |
484 | int ret; | ||
485 | |||
484 | /* Unlock the rtc's registers */ | 486 | /* Unlock the rtc's registers */ |
485 | __raw_writel(0x83e70b13, IO_ADDRESS(DA8XX_RTC_BASE + 0x6c)); | 487 | __raw_writel(0x83e70b13, IO_ADDRESS(DA8XX_RTC_BASE + 0x6c)); |
486 | __raw_writel(0x95a4f1e0, IO_ADDRESS(DA8XX_RTC_BASE + 0x70)); | 488 | __raw_writel(0x95a4f1e0, IO_ADDRESS(DA8XX_RTC_BASE + 0x70)); |
487 | 489 | ||
488 | return platform_device_register(&da8xx_rtc_device); | 490 | ret = platform_device_register(&da8xx_rtc_device); |
491 | if (!ret) | ||
492 | /* Atleast on DA850, RTC is a wakeup source */ | ||
493 | device_init_wakeup(&da8xx_rtc_device.dev, true); | ||
494 | |||
495 | return ret; | ||
489 | } | 496 | } |
490 | 497 | ||
491 | static struct resource da8xx_cpuidle_resources[] = { | 498 | static struct resource da8xx_cpuidle_resources[] = { |
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 2ec619ec1657..f53735cb922e 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c | |||
@@ -993,7 +993,6 @@ void __init dm365_init_asp(struct snd_platform_data *pdata) | |||
993 | 993 | ||
994 | void __init dm365_init_ks(struct davinci_ks_platform_data *pdata) | 994 | void __init dm365_init_ks(struct davinci_ks_platform_data *pdata) |
995 | { | 995 | { |
996 | davinci_cfg_reg(DM365_KEYSCAN); | ||
997 | dm365_ks_device.dev.platform_data = pdata; | 996 | dm365_ks_device.dev.platform_data = pdata; |
998 | platform_device_register(&dm365_ks_device); | 997 | platform_device_register(&dm365_ks_device); |
999 | } | 998 | } |
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c index 8f49b2b12608..b22dec4abf78 100644 --- a/arch/arm/mach-mmp/ttc_dkb.c +++ b/arch/arm/mach-mmp/ttc_dkb.c | |||
@@ -24,8 +24,6 @@ | |||
24 | 24 | ||
25 | #include "common.h" | 25 | #include "common.h" |
26 | 26 | ||
27 | #define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) | ||
28 | |||
29 | static unsigned long ttc_dkb_pin_config[] __initdata = { | 27 | static unsigned long ttc_dkb_pin_config[] __initdata = { |
30 | /* UART2 */ | 28 | /* UART2 */ |
31 | GPIO47_UART2_RXD, | 29 | GPIO47_UART2_RXD, |
diff --git a/arch/arm/mach-mx2/mxt_td60.c b/arch/arm/mach-mx2/mxt_td60.c index 03dbbdc98955..8bcc1a5b8829 100644 --- a/arch/arm/mach-mx2/mxt_td60.c +++ b/arch/arm/mach-mx2/mxt_td60.c | |||
@@ -58,21 +58,6 @@ static unsigned int mxt_td60_pins[] __initdata = { | |||
58 | PE9_PF_UART3_RXD, | 58 | PE9_PF_UART3_RXD, |
59 | PE10_PF_UART3_CTS, | 59 | PE10_PF_UART3_CTS, |
60 | PE11_PF_UART3_RTS, | 60 | PE11_PF_UART3_RTS, |
61 | /* UART3 */ | ||
62 | PB26_AF_UART4_RTS, | ||
63 | PB28_AF_UART4_TXD, | ||
64 | PB29_AF_UART4_CTS, | ||
65 | PB31_AF_UART4_RXD, | ||
66 | /* UART4 */ | ||
67 | PB18_AF_UART5_TXD, | ||
68 | PB19_AF_UART5_RXD, | ||
69 | PB20_AF_UART5_CTS, | ||
70 | PB21_AF_UART5_RTS, | ||
71 | /* UART5 */ | ||
72 | PB10_AF_UART6_TXD, | ||
73 | PB12_AF_UART6_CTS, | ||
74 | PB11_AF_UART6_RXD, | ||
75 | PB13_AF_UART6_RTS, | ||
76 | /* FEC */ | 61 | /* FEC */ |
77 | PD0_AIN_FEC_TXD0, | 62 | PD0_AIN_FEC_TXD0, |
78 | PD1_AIN_FEC_TXD1, | 63 | PD1_AIN_FEC_TXD1, |
@@ -261,12 +246,6 @@ static struct imxuart_platform_data uart_pdata[] = { | |||
261 | .flags = IMXUART_HAVE_RTSCTS, | 246 | .flags = IMXUART_HAVE_RTSCTS, |
262 | }, { | 247 | }, { |
263 | .flags = IMXUART_HAVE_RTSCTS, | 248 | .flags = IMXUART_HAVE_RTSCTS, |
264 | }, { | ||
265 | .flags = IMXUART_HAVE_RTSCTS, | ||
266 | }, { | ||
267 | .flags = IMXUART_HAVE_RTSCTS, | ||
268 | }, { | ||
269 | .flags = IMXUART_HAVE_RTSCTS, | ||
270 | }, | 249 | }, |
271 | }; | 250 | }; |
272 | 251 | ||
@@ -278,9 +257,6 @@ static void __init mxt_td60_board_init(void) | |||
278 | mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); | 257 | mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); |
279 | mxc_register_device(&mxc_uart_device1, &uart_pdata[1]); | 258 | mxc_register_device(&mxc_uart_device1, &uart_pdata[1]); |
280 | mxc_register_device(&mxc_uart_device2, &uart_pdata[2]); | 259 | mxc_register_device(&mxc_uart_device2, &uart_pdata[2]); |
281 | mxc_register_device(&mxc_uart_device3, &uart_pdata[3]); | ||
282 | mxc_register_device(&mxc_uart_device4, &uart_pdata[4]); | ||
283 | mxc_register_device(&mxc_uart_device5, &uart_pdata[5]); | ||
284 | mxc_register_device(&mxc_nand_device, &mxt_td60_nand_board_info); | 260 | mxc_register_device(&mxc_nand_device, &mxt_td60_nand_board_info); |
285 | 261 | ||
286 | i2c_register_board_info(0, mxt_td60_i2c_devices, | 262 | i2c_register_board_info(0, mxt_td60_i2c_devices, |
diff --git a/arch/arm/mach-mx25/clock.c b/arch/arm/mach-mx25/clock.c index ef26951a5275..6e838b857712 100644 --- a/arch/arm/mach-mx25/clock.c +++ b/arch/arm/mach-mx25/clock.c | |||
@@ -173,6 +173,7 @@ DEFINE_CLOCK(pwm4_clk, 0, CCM_CGCR2, 2, get_rate_ipg, NULL); | |||
173 | DEFINE_CLOCK(kpp_clk, 0, CCM_CGCR1, 28, get_rate_ipg, NULL); | 173 | DEFINE_CLOCK(kpp_clk, 0, CCM_CGCR1, 28, get_rate_ipg, NULL); |
174 | DEFINE_CLOCK(tsc_clk, 0, CCM_CGCR2, 13, get_rate_ipg, NULL); | 174 | DEFINE_CLOCK(tsc_clk, 0, CCM_CGCR2, 13, get_rate_ipg, NULL); |
175 | DEFINE_CLOCK(i2c_clk, 0, CCM_CGCR0, 6, get_rate_i2c, NULL); | 175 | DEFINE_CLOCK(i2c_clk, 0, CCM_CGCR0, 6, get_rate_i2c, NULL); |
176 | DEFINE_CLOCK(fec_clk, 0, CCM_CGCR0, 23, get_rate_ipg, NULL); | ||
176 | 177 | ||
177 | #define _REGISTER_CLOCK(d, n, c) \ | 178 | #define _REGISTER_CLOCK(d, n, c) \ |
178 | { \ | 179 | { \ |
@@ -204,6 +205,7 @@ static struct clk_lookup lookups[] = { | |||
204 | _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk) | 205 | _REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk) |
205 | _REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk) | 206 | _REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk) |
206 | _REGISTER_CLOCK("imx-i2c.2", NULL, i2c_clk) | 207 | _REGISTER_CLOCK("imx-i2c.2", NULL, i2c_clk) |
208 | _REGISTER_CLOCK("fec.0", NULL, fec_clk) | ||
207 | }; | 209 | }; |
208 | 210 | ||
209 | int __init mx25_clocks_init(unsigned long fref) | 211 | int __init mx25_clocks_init(unsigned long fref) |
diff --git a/arch/arm/mach-mx25/devices.c b/arch/arm/mach-mx25/devices.c index 63511de3a559..9fdeea1c083b 100644 --- a/arch/arm/mach-mx25/devices.c +++ b/arch/arm/mach-mx25/devices.c | |||
@@ -419,3 +419,22 @@ int __init mxc_register_gpios(void) | |||
419 | return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports)); | 419 | return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports)); |
420 | } | 420 | } |
421 | 421 | ||
422 | static struct resource mx25_fec_resources[] = { | ||
423 | { | ||
424 | .start = MX25_FEC_BASE_ADDR, | ||
425 | .end = MX25_FEC_BASE_ADDR + 0xfff, | ||
426 | .flags = IORESOURCE_MEM, | ||
427 | }, | ||
428 | { | ||
429 | .start = MX25_INT_FEC, | ||
430 | .end = MX25_INT_FEC, | ||
431 | .flags = IORESOURCE_IRQ, | ||
432 | }, | ||
433 | }; | ||
434 | |||
435 | struct platform_device mx25_fec_device = { | ||
436 | .name = "fec", | ||
437 | .id = 0, | ||
438 | .num_resources = ARRAY_SIZE(mx25_fec_resources), | ||
439 | .resource = mx25_fec_resources, | ||
440 | }; | ||
diff --git a/arch/arm/mach-mx25/devices.h b/arch/arm/mach-mx25/devices.h index fe6bf88ad1dd..fe5420fcd11f 100644 --- a/arch/arm/mach-mx25/devices.h +++ b/arch/arm/mach-mx25/devices.h | |||
@@ -17,3 +17,4 @@ extern struct platform_device mxc_keypad_device; | |||
17 | extern struct platform_device mxc_i2c_device0; | 17 | extern struct platform_device mxc_i2c_device0; |
18 | extern struct platform_device mxc_i2c_device1; | 18 | extern struct platform_device mxc_i2c_device1; |
19 | extern struct platform_device mxc_i2c_device2; | 19 | extern struct platform_device mxc_i2c_device2; |
20 | extern struct platform_device mx25_fec_device; | ||
diff --git a/arch/arm/mach-mx25/mx25pdk.c b/arch/arm/mach-mx25/mx25pdk.c index d23ae571c03f..921bc99ea231 100644 --- a/arch/arm/mach-mx25/mx25pdk.c +++ b/arch/arm/mach-mx25/mx25pdk.c | |||
@@ -18,10 +18,11 @@ | |||
18 | 18 | ||
19 | #include <linux/types.h> | 19 | #include <linux/types.h> |
20 | #include <linux/init.h> | 20 | #include <linux/init.h> |
21 | #include <linux/delay.h> | ||
21 | #include <linux/clk.h> | 22 | #include <linux/clk.h> |
22 | #include <linux/irq.h> | 23 | #include <linux/irq.h> |
23 | #include <linux/gpio.h> | 24 | #include <linux/gpio.h> |
24 | #include <linux/smsc911x.h> | 25 | #include <linux/fec.h> |
25 | #include <linux/platform_device.h> | 26 | #include <linux/platform_device.h> |
26 | 27 | ||
27 | #include <mach/hardware.h> | 28 | #include <mach/hardware.h> |
@@ -35,16 +36,57 @@ | |||
35 | #include <mach/mx25.h> | 36 | #include <mach/mx25.h> |
36 | #include <mach/mxc_nand.h> | 37 | #include <mach/mxc_nand.h> |
37 | #include "devices.h" | 38 | #include "devices.h" |
38 | #include <mach/iomux-v3.h> | 39 | #include <mach/iomux.h> |
39 | 40 | ||
40 | static struct imxuart_platform_data uart_pdata = { | 41 | static struct imxuart_platform_data uart_pdata = { |
41 | .flags = IMXUART_HAVE_RTSCTS, | 42 | .flags = IMXUART_HAVE_RTSCTS, |
42 | }; | 43 | }; |
43 | 44 | ||
45 | static struct pad_desc mx25pdk_pads[] = { | ||
46 | MX25_PAD_FEC_MDC__FEC_MDC, | ||
47 | MX25_PAD_FEC_MDIO__FEC_MDIO, | ||
48 | MX25_PAD_FEC_TDATA0__FEC_TDATA0, | ||
49 | MX25_PAD_FEC_TDATA1__FEC_TDATA1, | ||
50 | MX25_PAD_FEC_TX_EN__FEC_TX_EN, | ||
51 | MX25_PAD_FEC_RDATA0__FEC_RDATA0, | ||
52 | MX25_PAD_FEC_RDATA1__FEC_RDATA1, | ||
53 | MX25_PAD_FEC_RX_DV__FEC_RX_DV, | ||
54 | MX25_PAD_FEC_TX_CLK__FEC_TX_CLK, | ||
55 | MX25_PAD_A17__GPIO_2_3, /* FEC_EN, GPIO 35 */ | ||
56 | MX25_PAD_D12__GPIO_4_8, /* FEC_RESET_B, GPIO 104 */ | ||
57 | }; | ||
58 | |||
59 | static struct fec_platform_data mx25_fec_pdata = { | ||
60 | .phy = PHY_INTERFACE_MODE_RMII, | ||
61 | }; | ||
62 | |||
63 | #define FEC_ENABLE_GPIO 35 | ||
64 | #define FEC_RESET_B_GPIO 104 | ||
65 | |||
66 | static void __init mx25pdk_fec_reset(void) | ||
67 | { | ||
68 | gpio_request(FEC_ENABLE_GPIO, "FEC PHY enable"); | ||
69 | gpio_request(FEC_RESET_B_GPIO, "FEC PHY reset"); | ||
70 | |||
71 | gpio_direction_output(FEC_ENABLE_GPIO, 0); /* drop PHY power */ | ||
72 | gpio_direction_output(FEC_RESET_B_GPIO, 0); /* assert reset */ | ||
73 | udelay(2); | ||
74 | |||
75 | /* turn on PHY power and lift reset */ | ||
76 | gpio_set_value(FEC_ENABLE_GPIO, 1); | ||
77 | gpio_set_value(FEC_RESET_B_GPIO, 1); | ||
78 | } | ||
79 | |||
44 | static void __init mx25pdk_init(void) | 80 | static void __init mx25pdk_init(void) |
45 | { | 81 | { |
82 | mxc_iomux_v3_setup_multiple_pads(mx25pdk_pads, | ||
83 | ARRAY_SIZE(mx25pdk_pads)); | ||
84 | |||
46 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | 85 | mxc_register_device(&mxc_uart_device0, &uart_pdata); |
47 | mxc_register_device(&mxc_usbh2, NULL); | 86 | mxc_register_device(&mxc_usbh2, NULL); |
87 | |||
88 | mx25pdk_fec_reset(); | ||
89 | mxc_register_device(&mx25_fec_device, &mx25_fec_pdata); | ||
48 | } | 90 | } |
49 | 91 | ||
50 | static void __init mx25pdk_timer_init(void) | 92 | static void __init mx25pdk_timer_init(void) |
diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig index ea8ed109a7c2..28294416b0af 100644 --- a/arch/arm/mach-mx3/Kconfig +++ b/arch/arm/mach-mx3/Kconfig | |||
@@ -49,6 +49,7 @@ config MACH_PCM037_EET | |||
49 | config MACH_MX31LITE | 49 | config MACH_MX31LITE |
50 | bool "Support MX31 LITEKIT (LogicPD)" | 50 | bool "Support MX31 LITEKIT (LogicPD)" |
51 | select ARCH_MX31 | 51 | select ARCH_MX31 |
52 | select MXC_ULPI if USB_ULPI | ||
52 | help | 53 | help |
53 | Include support for MX31 LITEKIT platform. This includes specific | 54 | Include support for MX31 LITEKIT platform. This includes specific |
54 | configurations for the board and its peripherals. | 55 | configurations for the board and its peripherals. |
@@ -63,7 +64,7 @@ config MACH_MX31_3DS | |||
63 | config MACH_MX31MOBOARD | 64 | config MACH_MX31MOBOARD |
64 | bool "Support mx31moboard platforms (EPFL Mobots group)" | 65 | bool "Support mx31moboard platforms (EPFL Mobots group)" |
65 | select ARCH_MX31 | 66 | select ARCH_MX31 |
66 | select MXC_ULPI | 67 | select MXC_ULPI if USB_ULPI |
67 | help | 68 | help |
68 | Include support for mx31moboard platform. This includes specific | 69 | Include support for mx31moboard platform. This includes specific |
69 | configurations for the board and its peripherals. | 70 | configurations for the board and its peripherals. |
diff --git a/arch/arm/mach-mx3/mm.c b/arch/arm/mach-mx3/mm.c index bedf5b8d976a..6858a4f9806c 100644 --- a/arch/arm/mach-mx3/mm.c +++ b/arch/arm/mach-mx3/mm.c | |||
@@ -65,6 +65,11 @@ static struct map_desc mxc_io_desc[] __initdata = { | |||
65 | .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), | 65 | .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), |
66 | .length = AIPS2_SIZE, | 66 | .length = AIPS2_SIZE, |
67 | .type = MT_DEVICE_NONSHARED | 67 | .type = MT_DEVICE_NONSHARED |
68 | }, { | ||
69 | .virtual = SPBA0_BASE_ADDR_VIRT, | ||
70 | .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), | ||
71 | .length = SPBA0_SIZE, | ||
72 | .type = MT_DEVICE_NONSHARED | ||
68 | }, | 73 | }, |
69 | }; | 74 | }; |
70 | 75 | ||
diff --git a/arch/arm/mach-mx3/mx31ads.c b/arch/arm/mach-mx3/mx31ads.c index 0497c152be18..3e7bafa2ddbb 100644 --- a/arch/arm/mach-mx3/mx31ads.c +++ b/arch/arm/mach-mx3/mx31ads.c | |||
@@ -494,11 +494,6 @@ static void mxc_init_i2c(void) | |||
494 | */ | 494 | */ |
495 | static struct map_desc mx31ads_io_desc[] __initdata = { | 495 | static struct map_desc mx31ads_io_desc[] __initdata = { |
496 | { | 496 | { |
497 | .virtual = SPBA0_BASE_ADDR_VIRT, | ||
498 | .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), | ||
499 | .length = SPBA0_SIZE, | ||
500 | .type = MT_DEVICE_NONSHARED | ||
501 | }, { | ||
502 | .virtual = CS4_BASE_ADDR_VIRT, | 497 | .virtual = CS4_BASE_ADDR_VIRT, |
503 | .pfn = __phys_to_pfn(CS4_BASE_ADDR), | 498 | .pfn = __phys_to_pfn(CS4_BASE_ADDR), |
504 | .length = CS4_SIZE / 2, | 499 | .length = CS4_SIZE / 2, |
diff --git a/arch/arm/mach-mx3/mx31lite.c b/arch/arm/mach-mx3/mx31lite.c index def6b6736594..789b20d1730f 100644 --- a/arch/arm/mach-mx3/mx31lite.c +++ b/arch/arm/mach-mx3/mx31lite.c | |||
@@ -135,6 +135,7 @@ static struct spi_board_info mc13783_spi_dev __initdata = { | |||
135 | * USB | 135 | * USB |
136 | */ | 136 | */ |
137 | 137 | ||
138 | #if defined(CONFIG_USB_ULPI) | ||
138 | #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ | 139 | #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ |
139 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) | 140 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) |
140 | 141 | ||
@@ -180,6 +181,7 @@ static struct mxc_usbh_platform_data usbh2_pdata = { | |||
180 | .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, | 181 | .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, |
181 | .flags = MXC_EHCI_POWER_PINS_ENABLED, | 182 | .flags = MXC_EHCI_POWER_PINS_ENABLED, |
182 | }; | 183 | }; |
184 | #endif | ||
183 | 185 | ||
184 | /* | 186 | /* |
185 | * NOR flash | 187 | * NOR flash |
@@ -212,11 +214,6 @@ static struct platform_device physmap_flash_device = { | |||
212 | */ | 214 | */ |
213 | static struct map_desc mx31lite_io_desc[] __initdata = { | 215 | static struct map_desc mx31lite_io_desc[] __initdata = { |
214 | { | 216 | { |
215 | .virtual = SPBA0_BASE_ADDR_VIRT, | ||
216 | .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), | ||
217 | .length = SPBA0_SIZE, | ||
218 | .type = MT_DEVICE_NONSHARED | ||
219 | }, { | ||
220 | .virtual = CS4_BASE_ADDR_VIRT, | 217 | .virtual = CS4_BASE_ADDR_VIRT, |
221 | .pfn = __phys_to_pfn(CS4_BASE_ADDR), | 218 | .pfn = __phys_to_pfn(CS4_BASE_ADDR), |
222 | .length = CS4_SIZE, | 219 | .length = CS4_SIZE, |
@@ -261,11 +258,13 @@ static void __init mxc_board_init(void) | |||
261 | mxc_register_device(&mxc_spi_device1, &spi1_pdata); | 258 | mxc_register_device(&mxc_spi_device1, &spi1_pdata); |
262 | spi_register_board_info(&mc13783_spi_dev, 1); | 259 | spi_register_board_info(&mc13783_spi_dev, 1); |
263 | 260 | ||
261 | #if defined(CONFIG_USB_ULPI) | ||
264 | /* USB */ | 262 | /* USB */ |
265 | usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, | 263 | usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, |
266 | USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); | 264 | USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); |
267 | 265 | ||
268 | mxc_register_device(&mxc_usbh2, &usbh2_pdata); | 266 | mxc_register_device(&mxc_usbh2, &usbh2_pdata); |
267 | #endif | ||
269 | 268 | ||
270 | /* SMSC9117 IRQ pin */ | 269 | /* SMSC9117 IRQ pin */ |
271 | ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq"); | 270 | ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq"); |
diff --git a/arch/arm/mach-mx3/mx31moboard-devboard.c b/arch/arm/mach-mx3/mx31moboard-devboard.c index 8fc624f141cb..438428eaf769 100644 --- a/arch/arm/mach-mx3/mx31moboard-devboard.c +++ b/arch/arm/mach-mx3/mx31moboard-devboard.c | |||
@@ -179,7 +179,7 @@ static int __init devboard_usbh1_init(void) | |||
179 | 179 | ||
180 | usbh1_pdata.otg = otg; | 180 | usbh1_pdata.otg = otg; |
181 | 181 | ||
182 | return mxc_register_device(&mx31_usbh1, &usbh1_pdata); | 182 | return mxc_register_device(&mxc_usbh1, &usbh1_pdata); |
183 | } | 183 | } |
184 | 184 | ||
185 | /* | 185 | /* |
diff --git a/arch/arm/mach-mx3/mx31moboard-marxbot.c b/arch/arm/mach-mx3/mx31moboard-marxbot.c index 85184a35e674..1f44b9ccbb0f 100644 --- a/arch/arm/mach-mx3/mx31moboard-marxbot.c +++ b/arch/arm/mach-mx3/mx31moboard-marxbot.c | |||
@@ -294,7 +294,7 @@ static int __init marxbot_usbh1_init(void) | |||
294 | 294 | ||
295 | usbh1_pdata.otg = otg; | 295 | usbh1_pdata.otg = otg; |
296 | 296 | ||
297 | return mxc_register_device(&mx31_usbh1, &usbh1_pdata); | 297 | return mxc_register_device(&mxc_usbh1, &usbh1_pdata); |
298 | } | 298 | } |
299 | 299 | ||
300 | /* | 300 | /* |
diff --git a/arch/arm/mach-mx3/mx31moboard.c b/arch/arm/mach-mx3/mx31moboard.c index b70529145936..cfd605d078ec 100644 --- a/arch/arm/mach-mx3/mx31moboard.c +++ b/arch/arm/mach-mx3/mx31moboard.c | |||
@@ -346,6 +346,8 @@ static struct fsl_usb2_platform_data usb_pdata = { | |||
346 | .phy_mode = FSL_USB2_PHY_ULPI, | 346 | .phy_mode = FSL_USB2_PHY_ULPI, |
347 | }; | 347 | }; |
348 | 348 | ||
349 | #if defined(CONFIG_USB_ULPI) | ||
350 | |||
349 | #define USBH2_EN_B IOMUX_TO_GPIO(MX31_PIN_SCK6) | 351 | #define USBH2_EN_B IOMUX_TO_GPIO(MX31_PIN_SCK6) |
350 | 352 | ||
351 | static int moboard_usbh2_hw_init(struct platform_device *pdev) | 353 | static int moboard_usbh2_hw_init(struct platform_device *pdev) |
@@ -392,8 +394,11 @@ static int __init moboard_usbh2_init(void) | |||
392 | usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, | 394 | usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, |
393 | USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); | 395 | USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); |
394 | 396 | ||
395 | return mxc_register_device(&mx31_usbh2, &usbh2_pdata); | 397 | return mxc_register_device(&mxc_usbh2, &usbh2_pdata); |
396 | } | 398 | } |
399 | #else | ||
400 | static inline int moboard_usbh2_init(void) { return 0; } | ||
401 | #endif | ||
397 | 402 | ||
398 | 403 | ||
399 | static struct gpio_led mx31moboard_leds[] = { | 404 | static struct gpio_led mx31moboard_leds[] = { |
diff --git a/arch/arm/mach-mx3/mx31pdk.c b/arch/arm/mach-mx3/mx31pdk.c index 0f7a2f06bc2d..18715f1aa7eb 100644 --- a/arch/arm/mach-mx3/mx31pdk.c +++ b/arch/arm/mach-mx3/mx31pdk.c | |||
@@ -211,11 +211,6 @@ static int __init mx31pdk_init_expio(void) | |||
211 | */ | 211 | */ |
212 | static struct map_desc mx31pdk_io_desc[] __initdata = { | 212 | static struct map_desc mx31pdk_io_desc[] __initdata = { |
213 | { | 213 | { |
214 | .virtual = SPBA0_BASE_ADDR_VIRT, | ||
215 | .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), | ||
216 | .length = SPBA0_SIZE, | ||
217 | .type = MT_DEVICE_NONSHARED, | ||
218 | }, { | ||
219 | .virtual = CS5_BASE_ADDR_VIRT, | 214 | .virtual = CS5_BASE_ADDR_VIRT, |
220 | .pfn = __phys_to_pfn(CS5_BASE_ADDR), | 215 | .pfn = __phys_to_pfn(CS5_BASE_ADDR), |
221 | .length = CS5_SIZE, | 216 | .length = CS5_SIZE, |
diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/pcm037.c index 6cbaabedf386..5be396917c99 100644 --- a/arch/arm/mach-mx3/pcm037.c +++ b/arch/arm/mach-mx3/pcm037.c | |||
@@ -322,16 +322,25 @@ static int pcm037_camera_power(struct device *dev, int on) | |||
322 | return 0; | 322 | return 0; |
323 | } | 323 | } |
324 | 324 | ||
325 | static struct i2c_board_info pcm037_i2c_2_devices[] = { | 325 | static struct i2c_board_info pcm037_i2c_camera[] = { |
326 | { | 326 | { |
327 | I2C_BOARD_INFO("mt9t031", 0x5d), | 327 | I2C_BOARD_INFO("mt9t031", 0x5d), |
328 | }, { | ||
329 | I2C_BOARD_INFO("mt9v022", 0x48), | ||
328 | }, | 330 | }, |
329 | }; | 331 | }; |
330 | 332 | ||
331 | static struct soc_camera_link iclink = { | 333 | static struct soc_camera_link iclink_mt9v022 = { |
334 | .bus_id = 0, /* Must match with the camera ID */ | ||
335 | .board_info = &pcm037_i2c_camera[1], | ||
336 | .i2c_adapter_id = 2, | ||
337 | .module_name = "mt9v022", | ||
338 | }; | ||
339 | |||
340 | static struct soc_camera_link iclink_mt9t031 = { | ||
332 | .bus_id = 0, /* Must match with the camera ID */ | 341 | .bus_id = 0, /* Must match with the camera ID */ |
333 | .power = pcm037_camera_power, | 342 | .power = pcm037_camera_power, |
334 | .board_info = &pcm037_i2c_2_devices[0], | 343 | .board_info = &pcm037_i2c_camera[0], |
335 | .i2c_adapter_id = 2, | 344 | .i2c_adapter_id = 2, |
336 | .module_name = "mt9t031", | 345 | .module_name = "mt9t031", |
337 | }; | 346 | }; |
@@ -345,11 +354,19 @@ static struct i2c_board_info pcm037_i2c_devices[] = { | |||
345 | } | 354 | } |
346 | }; | 355 | }; |
347 | 356 | ||
348 | static struct platform_device pcm037_camera = { | 357 | static struct platform_device pcm037_mt9t031 = { |
349 | .name = "soc-camera-pdrv", | 358 | .name = "soc-camera-pdrv", |
350 | .id = 0, | 359 | .id = 0, |
351 | .dev = { | 360 | .dev = { |
352 | .platform_data = &iclink, | 361 | .platform_data = &iclink_mt9t031, |
362 | }, | ||
363 | }; | ||
364 | |||
365 | static struct platform_device pcm037_mt9v022 = { | ||
366 | .name = "soc-camera-pdrv", | ||
367 | .id = 1, | ||
368 | .dev = { | ||
369 | .platform_data = &iclink_mt9v022, | ||
353 | }, | 370 | }, |
354 | }; | 371 | }; |
355 | 372 | ||
@@ -449,7 +466,8 @@ static int __init pcm037_camera_alloc_dma(const size_t buf_size) | |||
449 | static struct platform_device *devices[] __initdata = { | 466 | static struct platform_device *devices[] __initdata = { |
450 | &pcm037_flash, | 467 | &pcm037_flash, |
451 | &pcm037_sram_device, | 468 | &pcm037_sram_device, |
452 | &pcm037_camera, | 469 | &pcm037_mt9t031, |
470 | &pcm037_mt9v022, | ||
453 | }; | 471 | }; |
454 | 472 | ||
455 | static struct ipu_platform_data mx3_ipu_data = { | 473 | static struct ipu_platform_data mx3_ipu_data = { |
@@ -599,7 +617,7 @@ static void __init mxc_board_init(void) | |||
599 | if (!ret) | 617 | if (!ret) |
600 | gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), 1); | 618 | gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), 1); |
601 | else | 619 | else |
602 | iclink.power = NULL; | 620 | iclink_mt9t031.power = NULL; |
603 | 621 | ||
604 | if (!pcm037_camera_alloc_dma(4 * 1024 * 1024)) | 622 | if (!pcm037_camera_alloc_dma(4 * 1024 * 1024)) |
605 | mxc_register_device(&mx3_camera, &camera_pdata); | 623 | mxc_register_device(&mx3_camera, &camera_pdata); |
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c index ab995a9c606c..65e7b5b85d83 100644 --- a/arch/arm/mach-omap1/clock_data.c +++ b/arch/arm/mach-omap1/clock_data.c | |||
@@ -599,7 +599,7 @@ static struct clk i2c_ick = { | |||
599 | static struct omap_clk omap_clks[] = { | 599 | static struct omap_clk omap_clks[] = { |
600 | /* non-ULPD clocks */ | 600 | /* non-ULPD clocks */ |
601 | CLK(NULL, "ck_ref", &ck_ref, CK_16XX | CK_1510 | CK_310 | CK_7XX), | 601 | CLK(NULL, "ck_ref", &ck_ref, CK_16XX | CK_1510 | CK_310 | CK_7XX), |
602 | CLK(NULL, "ck_dpll1", &ck_dpll1, CK_16XX | CK_1510 | CK_310), | 602 | CLK(NULL, "ck_dpll1", &ck_dpll1, CK_16XX | CK_1510 | CK_310 | CK_7XX), |
603 | /* CK_GEN1 clocks */ | 603 | /* CK_GEN1 clocks */ |
604 | CLK(NULL, "ck_dpll1out", &ck_dpll1out.clk, CK_16XX), | 604 | CLK(NULL, "ck_dpll1out", &ck_dpll1out.clk, CK_16XX), |
605 | CLK(NULL, "ck_sossi", &sossi_ck, CK_16XX), | 605 | CLK(NULL, "ck_sossi", &sossi_ck, CK_16XX), |
@@ -627,7 +627,7 @@ static struct omap_clk omap_clks[] = { | |||
627 | CLK(NULL, "tc2_ck", &tc2_ck, CK_16XX), | 627 | CLK(NULL, "tc2_ck", &tc2_ck, CK_16XX), |
628 | CLK(NULL, "dma_ck", &dma_ck, CK_16XX | CK_1510 | CK_310), | 628 | CLK(NULL, "dma_ck", &dma_ck, CK_16XX | CK_1510 | CK_310), |
629 | CLK(NULL, "dma_lcdfree_ck", &dma_lcdfree_ck, CK_16XX), | 629 | CLK(NULL, "dma_lcdfree_ck", &dma_lcdfree_ck, CK_16XX), |
630 | CLK(NULL, "api_ck", &api_ck.clk, CK_16XX | CK_1510 | CK_310), | 630 | CLK(NULL, "api_ck", &api_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX), |
631 | CLK(NULL, "lb_ck", &lb_ck.clk, CK_1510 | CK_310), | 631 | CLK(NULL, "lb_ck", &lb_ck.clk, CK_1510 | CK_310), |
632 | CLK(NULL, "rhea1_ck", &rhea1_ck, CK_16XX), | 632 | CLK(NULL, "rhea1_ck", &rhea1_ck, CK_16XX), |
633 | CLK(NULL, "rhea2_ck", &rhea2_ck, CK_16XX), | 633 | CLK(NULL, "rhea2_ck", &rhea2_ck, CK_16XX), |
@@ -658,6 +658,10 @@ static struct omap_clk omap_clks[] = { | |||
658 | CLK("i2c_omap.1", "fck", &i2c_fck, CK_16XX | CK_1510 | CK_310 | CK_7XX), | 658 | CLK("i2c_omap.1", "fck", &i2c_fck, CK_16XX | CK_1510 | CK_310 | CK_7XX), |
659 | CLK("i2c_omap.1", "ick", &i2c_ick, CK_16XX), | 659 | CLK("i2c_omap.1", "ick", &i2c_ick, CK_16XX), |
660 | CLK("i2c_omap.1", "ick", &dummy_ck, CK_1510 | CK_310 | CK_7XX), | 660 | CLK("i2c_omap.1", "ick", &dummy_ck, CK_1510 | CK_310 | CK_7XX), |
661 | CLK("omap1_spi100k.1", "fck", &dummy_ck, CK_7XX), | ||
662 | CLK("omap1_spi100k.1", "ick", &dummy_ck, CK_7XX), | ||
663 | CLK("omap1_spi100k.2", "fck", &dummy_ck, CK_7XX), | ||
664 | CLK("omap1_spi100k.2", "ick", &dummy_ck, CK_7XX), | ||
661 | CLK("omap_uwire", "fck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310), | 665 | CLK("omap_uwire", "fck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310), |
662 | CLK("omap-mcbsp.1", "ick", &dspper_ck, CK_16XX), | 666 | CLK("omap-mcbsp.1", "ick", &dspper_ck, CK_16XX), |
663 | CLK("omap-mcbsp.1", "ick", &dummy_ck, CK_1510 | CK_310), | 667 | CLK("omap-mcbsp.1", "ick", &dummy_ck, CK_1510 | CK_310), |
@@ -674,7 +678,7 @@ static struct omap_clk omap_clks[] = { | |||
674 | * init | 678 | * init |
675 | */ | 679 | */ |
676 | 680 | ||
677 | static struct clk_functions omap1_clk_functions __initdata = { | 681 | static struct clk_functions omap1_clk_functions = { |
678 | .clk_enable = omap1_clk_enable, | 682 | .clk_enable = omap1_clk_enable, |
679 | .clk_disable = omap1_clk_disable, | 683 | .clk_disable = omap1_clk_disable, |
680 | .clk_round_rate = omap1_clk_round_rate, | 684 | .clk_round_rate = omap1_clk_round_rate, |
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index 23ded2d49600..a2d07aa75c9e 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/platform_device.h> | 15 | #include <linux/platform_device.h> |
16 | #include <linux/io.h> | 16 | #include <linux/io.h> |
17 | #include <linux/spi/spi.h> | ||
17 | 18 | ||
18 | #include <mach/hardware.h> | 19 | #include <mach/hardware.h> |
19 | #include <asm/mach/map.h> | 20 | #include <asm/mach/map.h> |
@@ -23,6 +24,7 @@ | |||
23 | #include <plat/mux.h> | 24 | #include <plat/mux.h> |
24 | #include <mach/gpio.h> | 25 | #include <mach/gpio.h> |
25 | #include <plat/mmc.h> | 26 | #include <plat/mmc.h> |
27 | #include <plat/omap7xx.h> | ||
26 | 28 | ||
27 | /*-------------------------------------------------------------------------*/ | 29 | /*-------------------------------------------------------------------------*/ |
28 | 30 | ||
@@ -196,6 +198,38 @@ void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, | |||
196 | 198 | ||
197 | /*-------------------------------------------------------------------------*/ | 199 | /*-------------------------------------------------------------------------*/ |
198 | 200 | ||
201 | /* OMAP7xx SPI support */ | ||
202 | #if defined(CONFIG_SPI_OMAP_100K) || defined(CONFIG_SPI_OMAP_100K_MODULE) | ||
203 | |||
204 | struct platform_device omap_spi1 = { | ||
205 | .name = "omap1_spi100k", | ||
206 | .id = 1, | ||
207 | }; | ||
208 | |||
209 | struct platform_device omap_spi2 = { | ||
210 | .name = "omap1_spi100k", | ||
211 | .id = 2, | ||
212 | }; | ||
213 | |||
214 | static void omap_init_spi100k(void) | ||
215 | { | ||
216 | omap_spi1.dev.platform_data = ioremap(OMAP7XX_SPI1_BASE, 0x7ff); | ||
217 | if (omap_spi1.dev.platform_data) | ||
218 | platform_device_register(&omap_spi1); | ||
219 | |||
220 | omap_spi2.dev.platform_data = ioremap(OMAP7XX_SPI2_BASE, 0x7ff); | ||
221 | if (omap_spi2.dev.platform_data) | ||
222 | platform_device_register(&omap_spi2); | ||
223 | } | ||
224 | |||
225 | #else | ||
226 | static inline void omap_init_spi100k(void) | ||
227 | { | ||
228 | } | ||
229 | #endif | ||
230 | |||
231 | /*-------------------------------------------------------------------------*/ | ||
232 | |||
199 | #if defined(CONFIG_OMAP_STI) | 233 | #if defined(CONFIG_OMAP_STI) |
200 | 234 | ||
201 | #define OMAP1_STI_BASE 0xfffea000 | 235 | #define OMAP1_STI_BASE 0xfffea000 |
@@ -263,6 +297,7 @@ static int __init omap1_init_devices(void) | |||
263 | 297 | ||
264 | omap_init_mbox(); | 298 | omap_init_mbox(); |
265 | omap_init_rtc(); | 299 | omap_init_rtc(); |
300 | omap_init_spi100k(); | ||
266 | omap_init_sti(); | 301 | omap_init_sti(); |
267 | 302 | ||
268 | return 0; | 303 | return 0; |
diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c index 07212cc621ae..84341377232d 100644 --- a/arch/arm/mach-omap1/mux.c +++ b/arch/arm/mach-omap1/mux.c | |||
@@ -62,6 +62,14 @@ MUX_CFG_7XX("MMC_7XX_DAT0", 2, 17, 0, 16, 1, 0) | |||
62 | /* I2C interface */ | 62 | /* I2C interface */ |
63 | MUX_CFG_7XX("I2C_7XX_SCL", 5, 1, 0, 0, 1, 0) | 63 | MUX_CFG_7XX("I2C_7XX_SCL", 5, 1, 0, 0, 1, 0) |
64 | MUX_CFG_7XX("I2C_7XX_SDA", 5, 5, 0, 0, 1, 0) | 64 | MUX_CFG_7XX("I2C_7XX_SDA", 5, 5, 0, 0, 1, 0) |
65 | |||
66 | /* SPI pins */ | ||
67 | MUX_CFG_7XX("SPI_7XX_1", 6, 5, 4, 4, 1, 0) | ||
68 | MUX_CFG_7XX("SPI_7XX_2", 6, 9, 4, 8, 1, 0) | ||
69 | MUX_CFG_7XX("SPI_7XX_3", 6, 13, 4, 12, 1, 0) | ||
70 | MUX_CFG_7XX("SPI_7XX_4", 6, 17, 4, 16, 1, 0) | ||
71 | MUX_CFG_7XX("SPI_7XX_5", 8, 25, 0, 24, 0, 0) | ||
72 | MUX_CFG_7XX("SPI_7XX_6", 9, 5, 0, 4, 0, 0) | ||
65 | }; | 73 | }; |
66 | #define OMAP7XX_PINS_SZ ARRAY_SIZE(omap7xx_pins) | 74 | #define OMAP7XX_PINS_SZ ARRAY_SIZE(omap7xx_pins) |
67 | #else | 75 | #else |
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 10eafa70a909..606bf04f51b6 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig | |||
@@ -80,6 +80,7 @@ config MACH_OVERO | |||
80 | config MACH_OMAP3EVM | 80 | config MACH_OMAP3EVM |
81 | bool "OMAP 3530 EVM board" | 81 | bool "OMAP 3530 EVM board" |
82 | depends on ARCH_OMAP3 && ARCH_OMAP34XX | 82 | depends on ARCH_OMAP3 && ARCH_OMAP34XX |
83 | select OMAP_PACKAGE_CBB | ||
83 | 84 | ||
84 | config MACH_OMAP3517EVM | 85 | config MACH_OMAP3517EVM |
85 | bool "OMAP3517/ AM3517 EVM board" | 86 | bool "OMAP3517/ AM3517 EVM board" |
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c index 8dd277c36661..1e3dfb652acc 100755 --- a/arch/arm/mach-omap2/board-zoom-peripherals.c +++ b/arch/arm/mach-omap2/board-zoom-peripherals.c | |||
@@ -63,21 +63,21 @@ static int board_keymap[] = { | |||
63 | KEY(5, 1, KEY_H), | 63 | KEY(5, 1, KEY_H), |
64 | KEY(5, 2, KEY_J), | 64 | KEY(5, 2, KEY_J), |
65 | KEY(5, 3, KEY_F3), | 65 | KEY(5, 3, KEY_F3), |
66 | KEY(5, 4, KEY_UNKNOWN), | ||
66 | KEY(5, 5, KEY_VOLUMEDOWN), | 67 | KEY(5, 5, KEY_VOLUMEDOWN), |
67 | KEY(5, 6, KEY_M), | 68 | KEY(5, 6, KEY_M), |
68 | KEY(5, 7, KEY_ENTER), | 69 | KEY(5, 7, KEY_RIGHT), |
69 | KEY(6, 0, KEY_Q), | 70 | KEY(6, 0, KEY_Q), |
70 | KEY(6, 1, KEY_A), | 71 | KEY(6, 1, KEY_A), |
71 | KEY(6, 2, KEY_N), | 72 | KEY(6, 2, KEY_N), |
72 | KEY(6, 3, KEY_BACKSPACE), | 73 | KEY(6, 3, KEY_BACKSPACE), |
73 | KEY(6, 6, KEY_P), | 74 | KEY(6, 6, KEY_P), |
74 | KEY(6, 7, KEY_SELECT), | 75 | KEY(6, 7, KEY_UP), |
75 | KEY(7, 0, KEY_PROG1), /*MACRO 1 <User defined> */ | 76 | KEY(7, 0, KEY_PROG1), /*MACRO 1 <User defined> */ |
76 | KEY(7, 1, KEY_PROG2), /*MACRO 2 <User defined> */ | 77 | KEY(7, 1, KEY_PROG2), /*MACRO 2 <User defined> */ |
77 | KEY(7, 2, KEY_PROG3), /*MACRO 3 <User defined> */ | 78 | KEY(7, 2, KEY_PROG3), /*MACRO 3 <User defined> */ |
78 | KEY(7, 3, KEY_PROG4), /*MACRO 4 <User defined> */ | 79 | KEY(7, 3, KEY_PROG4), /*MACRO 4 <User defined> */ |
79 | KEY(7, 5, KEY_RIGHT), | 80 | KEY(7, 6, KEY_SELECT), |
80 | KEY(7, 6, KEY_UP), | ||
81 | KEY(7, 7, KEY_DOWN) | 81 | KEY(7, 7, KEY_DOWN) |
82 | }; | 82 | }; |
83 | 83 | ||
diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c index d0e3fb7f9298..5420356eb407 100644 --- a/arch/arm/mach-omap2/clock2xxx.c +++ b/arch/arm/mach-omap2/clock2xxx.c | |||
@@ -449,40 +449,78 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate) | |||
449 | #ifdef CONFIG_CPU_FREQ | 449 | #ifdef CONFIG_CPU_FREQ |
450 | /* | 450 | /* |
451 | * Walk PRCM rate table and fillout cpufreq freq_table | 451 | * Walk PRCM rate table and fillout cpufreq freq_table |
452 | * XXX This should be replaced by an OPP layer in the near future | ||
452 | */ | 453 | */ |
453 | static struct cpufreq_frequency_table freq_table[ARRAY_SIZE(rate_table)]; | 454 | static struct cpufreq_frequency_table *freq_table; |
454 | 455 | ||
455 | void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table) | 456 | void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table) |
456 | { | 457 | { |
457 | struct prcm_config *prcm; | 458 | const struct prcm_config *prcm; |
459 | long sys_ck_rate; | ||
458 | int i = 0; | 460 | int i = 0; |
461 | int tbl_sz = 0; | ||
462 | |||
463 | sys_ck_rate = clk_get_rate(sclk); | ||
459 | 464 | ||
460 | for (prcm = rate_table; prcm->mpu_speed; prcm++) { | 465 | for (prcm = rate_table; prcm->mpu_speed; prcm++) { |
461 | if (!(prcm->flags & cpu_mask)) | 466 | if (!(prcm->flags & cpu_mask)) |
462 | continue; | 467 | continue; |
463 | if (prcm->xtal_speed != sys_ck.rate) | 468 | if (prcm->xtal_speed != sys_ck_rate) |
464 | continue; | 469 | continue; |
465 | 470 | ||
466 | /* don't put bypass rates in table */ | 471 | /* don't put bypass rates in table */ |
467 | if (prcm->dpll_speed == prcm->xtal_speed) | 472 | if (prcm->dpll_speed == prcm->xtal_speed) |
468 | continue; | 473 | continue; |
469 | 474 | ||
470 | freq_table[i].index = i; | 475 | tbl_sz++; |
471 | freq_table[i].frequency = prcm->mpu_speed / 1000; | ||
472 | i++; | ||
473 | } | 476 | } |
474 | 477 | ||
475 | if (i == 0) { | 478 | /* |
476 | printk(KERN_WARNING "%s: failed to initialize frequency " | 479 | * XXX Ensure that we're doing what CPUFreq expects for this error |
477 | "table\n", __func__); | 480 | * case and the following one |
481 | */ | ||
482 | if (tbl_sz == 0) { | ||
483 | pr_warning("%s: no matching entries in rate_table\n", | ||
484 | __func__); | ||
485 | return; | ||
486 | } | ||
487 | |||
488 | /* Include the CPUFREQ_TABLE_END terminator entry */ | ||
489 | tbl_sz++; | ||
490 | |||
491 | freq_table = kzalloc(sizeof(struct cpufreq_frequency_table) * tbl_sz, | ||
492 | GFP_ATOMIC); | ||
493 | if (!freq_table) { | ||
494 | pr_err("%s: could not kzalloc frequency table\n", __func__); | ||
478 | return; | 495 | return; |
479 | } | 496 | } |
480 | 497 | ||
498 | for (prcm = rate_table; prcm->mpu_speed; prcm++) { | ||
499 | if (!(prcm->flags & cpu_mask)) | ||
500 | continue; | ||
501 | if (prcm->xtal_speed != sys_ck_rate) | ||
502 | continue; | ||
503 | |||
504 | /* don't put bypass rates in table */ | ||
505 | if (prcm->dpll_speed == prcm->xtal_speed) | ||
506 | continue; | ||
507 | |||
508 | freq_table[i].index = i; | ||
509 | freq_table[i].frequency = prcm->mpu_speed / 1000; | ||
510 | i++; | ||
511 | } | ||
512 | |||
481 | freq_table[i].index = i; | 513 | freq_table[i].index = i; |
482 | freq_table[i].frequency = CPUFREQ_TABLE_END; | 514 | freq_table[i].frequency = CPUFREQ_TABLE_END; |
483 | 515 | ||
484 | *table = &freq_table[0]; | 516 | *table = &freq_table[0]; |
485 | } | 517 | } |
518 | |||
519 | void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table) | ||
520 | { | ||
521 | kfree(freq_table); | ||
522 | } | ||
523 | |||
486 | #endif | 524 | #endif |
487 | 525 | ||
488 | struct clk_functions omap2_clk_functions = { | 526 | struct clk_functions omap2_clk_functions = { |
@@ -494,6 +532,7 @@ struct clk_functions omap2_clk_functions = { | |||
494 | .clk_disable_unused = omap2_clk_disable_unused, | 532 | .clk_disable_unused = omap2_clk_disable_unused, |
495 | #ifdef CONFIG_CPU_FREQ | 533 | #ifdef CONFIG_CPU_FREQ |
496 | .clk_init_cpufreq_table = omap2_clk_init_cpufreq_table, | 534 | .clk_init_cpufreq_table = omap2_clk_init_cpufreq_table, |
535 | .clk_exit_cpufreq_table = omap2_clk_exit_cpufreq_table, | ||
497 | #endif | 536 | #endif |
498 | }; | 537 | }; |
499 | 538 | ||
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index ded32364f32b..d4217b93e10b 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c | |||
@@ -34,7 +34,6 @@ | |||
34 | #include <asm/div64.h> | 34 | #include <asm/div64.h> |
35 | #include <asm/clkdev.h> | 35 | #include <asm/clkdev.h> |
36 | 36 | ||
37 | #include <plat/sdrc.h> | ||
38 | #include "clock.h" | 37 | #include "clock.h" |
39 | #include "clock34xx.h" | 38 | #include "clock34xx.h" |
40 | #include "sdrc.h" | 39 | #include "sdrc.h" |
diff --git a/arch/arm/mach-omap2/clock34xx_data.c b/arch/arm/mach-omap2/clock34xx_data.c index 8bdcc9cc7f9a..c6031d74d6f6 100644 --- a/arch/arm/mach-omap2/clock34xx_data.c +++ b/arch/arm/mach-omap2/clock34xx_data.c | |||
@@ -776,6 +776,8 @@ static struct clk dpll4_m5_ck = { | |||
776 | .clksel_mask = OMAP3430_CLKSEL_CAM_MASK, | 776 | .clksel_mask = OMAP3430_CLKSEL_CAM_MASK, |
777 | .clksel = div16_dpll4_clksel, | 777 | .clksel = div16_dpll4_clksel, |
778 | .clkdm_name = "dpll4_clkdm", | 778 | .clkdm_name = "dpll4_clkdm", |
779 | .set_rate = &omap2_clksel_set_rate, | ||
780 | .round_rate = &omap2_clksel_round_rate, | ||
779 | .recalc = &omap2_clksel_recalc, | 781 | .recalc = &omap2_clksel_recalc, |
780 | }; | 782 | }; |
781 | 783 | ||
@@ -1500,6 +1502,7 @@ static struct clk uart2_fck = { | |||
1500 | .parent = &core_48m_fck, | 1502 | .parent = &core_48m_fck, |
1501 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), | 1503 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), |
1502 | .enable_bit = OMAP3430_EN_UART2_SHIFT, | 1504 | .enable_bit = OMAP3430_EN_UART2_SHIFT, |
1505 | .clkdm_name = "core_l4_clkdm", | ||
1503 | .recalc = &followparent_recalc, | 1506 | .recalc = &followparent_recalc, |
1504 | }; | 1507 | }; |
1505 | 1508 | ||
@@ -1509,6 +1512,7 @@ static struct clk uart1_fck = { | |||
1509 | .parent = &core_48m_fck, | 1512 | .parent = &core_48m_fck, |
1510 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), | 1513 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), |
1511 | .enable_bit = OMAP3430_EN_UART1_SHIFT, | 1514 | .enable_bit = OMAP3430_EN_UART1_SHIFT, |
1515 | .clkdm_name = "core_l4_clkdm", | ||
1512 | .recalc = &followparent_recalc, | 1516 | .recalc = &followparent_recalc, |
1513 | }; | 1517 | }; |
1514 | 1518 | ||
@@ -2745,7 +2749,7 @@ static struct clk mcbsp4_ick = { | |||
2745 | }; | 2749 | }; |
2746 | 2750 | ||
2747 | static const struct clksel mcbsp_234_clksel[] = { | 2751 | static const struct clksel mcbsp_234_clksel[] = { |
2748 | { .parent = &core_96m_fck, .rates = common_mcbsp_96m_rates }, | 2752 | { .parent = &per_96m_fck, .rates = common_mcbsp_96m_rates }, |
2749 | { .parent = &mcbsp_clks, .rates = common_mcbsp_mcbsp_rates }, | 2753 | { .parent = &mcbsp_clks, .rates = common_mcbsp_mcbsp_rates }, |
2750 | { .parent = NULL } | 2754 | { .parent = NULL } |
2751 | }; | 2755 | }; |
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 1a45ed1e8ba1..dd285f001467 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c | |||
@@ -559,7 +559,7 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) | |||
559 | * downstream clocks for debugging purposes? | 559 | * downstream clocks for debugging purposes? |
560 | */ | 560 | */ |
561 | 561 | ||
562 | if (!clkdm || !clk) | 562 | if (!clkdm || !clk || !clkdm->clktrctrl_mask) |
563 | return -EINVAL; | 563 | return -EINVAL; |
564 | 564 | ||
565 | if (atomic_inc_return(&clkdm->usecount) > 1) | 565 | if (atomic_inc_return(&clkdm->usecount) > 1) |
@@ -610,7 +610,7 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk) | |||
610 | * downstream clocks for debugging purposes? | 610 | * downstream clocks for debugging purposes? |
611 | */ | 611 | */ |
612 | 612 | ||
613 | if (!clkdm || !clk) | 613 | if (!clkdm || !clk || !clkdm->clktrctrl_mask) |
614 | return -EINVAL; | 614 | return -EINVAL; |
615 | 615 | ||
616 | #ifdef DEBUG | 616 | #ifdef DEBUG |
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index a8749e8017b9..5a7996402c53 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c | |||
@@ -33,7 +33,6 @@ | |||
33 | #include <plat/sdrc.h> | 33 | #include <plat/sdrc.h> |
34 | #include <plat/gpmc.h> | 34 | #include <plat/gpmc.h> |
35 | #include <plat/serial.h> | 35 | #include <plat/serial.h> |
36 | #include <plat/mux.h> | ||
37 | #include <plat/vram.h> | 36 | #include <plat/vram.h> |
38 | 37 | ||
39 | #include "clock.h" | 38 | #include "clock.h" |
@@ -73,21 +72,21 @@ static struct map_desc omap24xx_io_desc[] __initdata = { | |||
73 | #ifdef CONFIG_ARCH_OMAP2420 | 72 | #ifdef CONFIG_ARCH_OMAP2420 |
74 | static struct map_desc omap242x_io_desc[] __initdata = { | 73 | static struct map_desc omap242x_io_desc[] __initdata = { |
75 | { | 74 | { |
76 | .virtual = DSP_MEM_24XX_VIRT, | 75 | .virtual = DSP_MEM_2420_VIRT, |
77 | .pfn = __phys_to_pfn(DSP_MEM_24XX_PHYS), | 76 | .pfn = __phys_to_pfn(DSP_MEM_2420_PHYS), |
78 | .length = DSP_MEM_24XX_SIZE, | 77 | .length = DSP_MEM_2420_SIZE, |
79 | .type = MT_DEVICE | 78 | .type = MT_DEVICE |
80 | }, | 79 | }, |
81 | { | 80 | { |
82 | .virtual = DSP_IPI_24XX_VIRT, | 81 | .virtual = DSP_IPI_2420_VIRT, |
83 | .pfn = __phys_to_pfn(DSP_IPI_24XX_PHYS), | 82 | .pfn = __phys_to_pfn(DSP_IPI_2420_PHYS), |
84 | .length = DSP_IPI_24XX_SIZE, | 83 | .length = DSP_IPI_2420_SIZE, |
85 | .type = MT_DEVICE | 84 | .type = MT_DEVICE |
86 | }, | 85 | }, |
87 | { | 86 | { |
88 | .virtual = DSP_MMU_24XX_VIRT, | 87 | .virtual = DSP_MMU_2420_VIRT, |
89 | .pfn = __phys_to_pfn(DSP_MMU_24XX_PHYS), | 88 | .pfn = __phys_to_pfn(DSP_MMU_2420_PHYS), |
90 | .length = DSP_MMU_24XX_SIZE, | 89 | .length = DSP_MMU_2420_SIZE, |
91 | .type = MT_DEVICE | 90 | .type = MT_DEVICE |
92 | }, | 91 | }, |
93 | }; | 92 | }; |
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index e071b3fd1878..459ef23ab8a8 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c | |||
@@ -994,8 +994,10 @@ int __init omap_mux_init(u32 mux_pbase, u32 mux_size, | |||
994 | } | 994 | } |
995 | 995 | ||
996 | #ifdef CONFIG_OMAP_MUX | 996 | #ifdef CONFIG_OMAP_MUX |
997 | omap_mux_package_fixup(package_subset, superset); | 997 | if (package_subset) |
998 | omap_mux_package_init_balls(package_balls, superset); | 998 | omap_mux_package_fixup(package_subset, superset); |
999 | if (package_balls) | ||
1000 | omap_mux_package_init_balls(package_balls, superset); | ||
999 | omap_mux_set_cmdline_signals(); | 1001 | omap_mux_set_cmdline_signals(); |
1000 | omap_mux_set_board_signals(board_mux); | 1002 | omap_mux_set_board_signals(board_mux); |
1001 | #endif | 1003 | #endif |
diff --git a/arch/arm/mach-omap2/opp2420_data.c b/arch/arm/mach-omap2/opp2420_data.c index 126a9396b3a8..e6dda694fd5c 100644 --- a/arch/arm/mach-omap2/opp2420_data.c +++ b/arch/arm/mach-omap2/opp2420_data.c | |||
@@ -9,45 +9,47 @@ | |||
9 | * The OMAP2 processor can be run at several discrete 'PRCM configurations'. | 9 | * The OMAP2 processor can be run at several discrete 'PRCM configurations'. |
10 | * These configurations are characterized by voltage and speed for clocks. | 10 | * These configurations are characterized by voltage and speed for clocks. |
11 | * The device is only validated for certain combinations. One way to express | 11 | * The device is only validated for certain combinations. One way to express |
12 | * these combinations is via the 'ratio's' which the clocks operate with | 12 | * these combinations is via the 'ratios' which the clocks operate with |
13 | * respect to each other. These ratio sets are for a given voltage/DPLL | 13 | * respect to each other. These ratio sets are for a given voltage/DPLL |
14 | * setting. All configurations can be described by a DPLL setting and a ratio | 14 | * setting. All configurations can be described by a DPLL setting and a ratio. |
15 | * There are 3 ratio sets for the 2430 and X ratio sets for 2420. | ||
16 | * | ||
17 | * 2430 differs from 2420 in that there are no more phase synchronizers used. | ||
18 | * They both have a slightly different clock domain setup. 2420(iva1,dsp) vs | ||
19 | * 2430 (iva2.1, NOdsp, mdm) | ||
20 | * | 15 | * |
21 | * XXX Missing voltage data. | 16 | * XXX Missing voltage data. |
17 | * XXX Missing 19.2MHz sys_clk rate sets (needed for N800/N810) | ||
22 | * | 18 | * |
23 | * THe format described in this file is deprecated. Once a reasonable | 19 | * THe format described in this file is deprecated. Once a reasonable |
24 | * OPP API exists, the data in this file should be converted to use it. | 20 | * OPP API exists, the data in this file should be converted to use it. |
25 | * | 21 | * |
26 | * This is technically part of the OMAP2xxx clock code. | 22 | * This is technically part of the OMAP2xxx clock code. |
23 | * | ||
24 | * Considerable work is still needed to fully support dynamic frequency | ||
25 | * changes on OMAP2xxx-series chips. Readers interested in such a | ||
26 | * project are encouraged to review the Maemo Diablo RX-34 and RX-44 | ||
27 | * kernel source at: | ||
28 | * http://repository.maemo.org/pool/diablo/free/k/kernel-source-diablo/ | ||
27 | */ | 29 | */ |
28 | 30 | ||
29 | #include "opp2xxx.h" | 31 | #include "opp2xxx.h" |
30 | #include "sdrc.h" | 32 | #include "sdrc.h" |
31 | #include "clock.h" | 33 | #include "clock.h" |
32 | 34 | ||
33 | /*------------------------------------------------------------------------- | 35 | /* |
34 | * Key dividers which make up a PRCM set. Ratio's for a PRCM are mandated. | 36 | * Key dividers which make up a PRCM set. Ratios for a PRCM are mandated. |
35 | * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU, | 37 | * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU, |
36 | * CM_CLKSEL_DSP, CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL, | 38 | * CM_CLKSEL_DSP, CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL, |
37 | * CM_CLKSEL2_PLL, CM_CLKSEL_MDM | 39 | * CM_CLKSEL2_PLL, CM_CLKSEL_MDM |
38 | * | 40 | * |
39 | * Filling in table based on H4 boards and 2430-SDPs variants available. | 41 | * Filling in table based on H4 boards available. There are quite a |
40 | * There are quite a few more rates combinations which could be defined. | 42 | * few more rate combinations which could be defined. |
41 | * | 43 | * |
42 | * When multiple values are defined the start up will try and choose the | 44 | * When multiple values are defined the start up will try and choose |
43 | * fastest one. If a 'fast' value is defined, then automatically, the /2 | 45 | * the fastest one. If a 'fast' value is defined, then automatically, |
44 | * one should be included as it can be used. Generally having more that | 46 | * the /2 one should be included as it can be used. Generally having |
45 | * one fast set does not make sense, as static timings need to be changed | 47 | * more than one fast set does not make sense, as static timings need |
46 | * to change the set. The exception is the bypass setting which is | 48 | * to be changed to change the set. The exception is the bypass |
47 | * availble for low power bypass. | 49 | * setting which is available for low power bypass. |
48 | * | 50 | * |
49 | * Note: This table needs to be sorted, fastest to slowest. | 51 | * Note: This table needs to be sorted, fastest to slowest. |
50 | *-------------------------------------------------------------------------*/ | 52 | **/ |
51 | const struct prcm_config omap2420_rate_table[] = { | 53 | const struct prcm_config omap2420_rate_table[] = { |
52 | /* PRCM I - FAST */ | 54 | /* PRCM I - FAST */ |
53 | {S12M, S660M, S330M, RI_CM_CLKSEL_MPU_VAL, /* 330MHz ARM */ | 55 | {S12M, S660M, S330M, RI_CM_CLKSEL_MPU_VAL, /* 330MHz ARM */ |
diff --git a/arch/arm/mach-omap2/opp2430_data.c b/arch/arm/mach-omap2/opp2430_data.c index edb81672c844..1b9596ae201e 100644 --- a/arch/arm/mach-omap2/opp2430_data.c +++ b/arch/arm/mach-omap2/opp2430_data.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * opp2420_data.c - old-style "OPP" table for OMAP2420 | 2 | * opp2430_data.c - old-style "OPP" table for OMAP2430 |
3 | * | 3 | * |
4 | * Copyright (C) 2005-2009 Texas Instruments, Inc. | 4 | * Copyright (C) 2005-2009 Texas Instruments, Inc. |
5 | * Copyright (C) 2004-2009 Nokia Corporation | 5 | * Copyright (C) 2004-2009 Nokia Corporation |
@@ -9,16 +9,16 @@ | |||
9 | * The OMAP2 processor can be run at several discrete 'PRCM configurations'. | 9 | * The OMAP2 processor can be run at several discrete 'PRCM configurations'. |
10 | * These configurations are characterized by voltage and speed for clocks. | 10 | * These configurations are characterized by voltage and speed for clocks. |
11 | * The device is only validated for certain combinations. One way to express | 11 | * The device is only validated for certain combinations. One way to express |
12 | * these combinations is via the 'ratio's' which the clocks operate with | 12 | * these combinations is via the 'ratios' which the clocks operate with |
13 | * respect to each other. These ratio sets are for a given voltage/DPLL | 13 | * respect to each other. These ratio sets are for a given voltage/DPLL |
14 | * setting. All configurations can be described by a DPLL setting and a ratio | 14 | * setting. All configurations can be described by a DPLL setting and a ratio. |
15 | * There are 3 ratio sets for the 2430 and X ratio sets for 2420. | ||
16 | * | 15 | * |
17 | * 2430 differs from 2420 in that there are no more phase synchronizers used. | 16 | * 2430 differs from 2420 in that there are no more phase synchronizers used. |
18 | * They both have a slightly different clock domain setup. 2420(iva1,dsp) vs | 17 | * They both have a slightly different clock domain setup. 2420(iva1,dsp) vs |
19 | * 2430 (iva2.1, NOdsp, mdm) | 18 | * 2430 (iva2.1, NOdsp, mdm) |
20 | * | 19 | * |
21 | * XXX Missing voltage data. | 20 | * XXX Missing voltage data. |
21 | * XXX Missing 19.2MHz sys_clk rate sets. | ||
22 | * | 22 | * |
23 | * THe format described in this file is deprecated. Once a reasonable | 23 | * THe format described in this file is deprecated. Once a reasonable |
24 | * OPP API exists, the data in this file should be converted to use it. | 24 | * OPP API exists, the data in this file should be converted to use it. |
@@ -30,24 +30,24 @@ | |||
30 | #include "sdrc.h" | 30 | #include "sdrc.h" |
31 | #include "clock.h" | 31 | #include "clock.h" |
32 | 32 | ||
33 | /*------------------------------------------------------------------------- | 33 | /* |
34 | * Key dividers which make up a PRCM set. Ratio's for a PRCM are mandated. | 34 | * Key dividers which make up a PRCM set. Ratios for a PRCM are mandated. |
35 | * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU, | 35 | * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU, |
36 | * CM_CLKSEL_DSP, CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL, | 36 | * CM_CLKSEL_DSP, CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL, |
37 | * CM_CLKSEL2_PLL, CM_CLKSEL_MDM | 37 | * CM_CLKSEL2_PLL, CM_CLKSEL_MDM |
38 | * | 38 | * |
39 | * Filling in table based on H4 boards and 2430-SDPs variants available. | 39 | * Filling in table based on 2430-SDPs variants available. There are |
40 | * There are quite a few more rates combinations which could be defined. | 40 | * quite a few more rate combinations which could be defined. |
41 | * | 41 | * |
42 | * When multiple values are defined the start up will try and choose the | 42 | * When multiple values are defined the start up will try and choose |
43 | * fastest one. If a 'fast' value is defined, then automatically, the /2 | 43 | * the fastest one. If a 'fast' value is defined, then automatically, |
44 | * one should be included as it can be used. Generally having more that | 44 | * the /2 one should be included as it can be used. Generally having |
45 | * one fast set does not make sense, as static timings need to be changed | 45 | * more than one fast set does not make sense, as static timings need |
46 | * to change the set. The exception is the bypass setting which is | 46 | * to be changed to change the set. The exception is the bypass |
47 | * availble for low power bypass. | 47 | * setting which is available for low power bypass. |
48 | * | 48 | * |
49 | * Note: This table needs to be sorted, fastest to slowest. | 49 | * Note: This table needs to be sorted, fastest to slowest. |
50 | *-------------------------------------------------------------------------*/ | 50 | */ |
51 | const struct prcm_config omap2430_rate_table[] = { | 51 | const struct prcm_config omap2430_rate_table[] = { |
52 | /* PRCM #4 - ratio2 (ES2.1) - FAST */ | 52 | /* PRCM #4 - ratio2 (ES2.1) - FAST */ |
53 | {S13M, S798M, S399M, R2_CM_CLKSEL_MPU_VAL, /* 399MHz ARM */ | 53 | {S13M, S798M, S399M, R2_CM_CLKSEL_MPU_VAL, /* 399MHz ARM */ |
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 81ed252a0f8a..c6cc809afb79 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c | |||
@@ -124,8 +124,8 @@ static void omap3_core_save_context(void) | |||
124 | control_padconf_off |= START_PADCONF_SAVE; | 124 | control_padconf_off |= START_PADCONF_SAVE; |
125 | omap_ctrl_writel(control_padconf_off, OMAP343X_CONTROL_PADCONF_OFF); | 125 | omap_ctrl_writel(control_padconf_off, OMAP343X_CONTROL_PADCONF_OFF); |
126 | /* wait for the save to complete */ | 126 | /* wait for the save to complete */ |
127 | while (!omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS) | 127 | while (!(omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS) |
128 | & PADCONF_SAVE_DONE) | 128 | & PADCONF_SAVE_DONE)) |
129 | ; | 129 | ; |
130 | /* Save the Interrupt controller context */ | 130 | /* Save the Interrupt controller context */ |
131 | omap_intc_save_context(); | 131 | omap_intc_save_context(); |
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 19805a7de06c..8c964bec8159 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c | |||
@@ -125,6 +125,13 @@ static struct plat_serial8250_port serial_platform_data3[] = { | |||
125 | } | 125 | } |
126 | }; | 126 | }; |
127 | #endif | 127 | #endif |
128 | static inline unsigned int __serial_read_reg(struct uart_port *up, | ||
129 | int offset) | ||
130 | { | ||
131 | offset <<= up->regshift; | ||
132 | return (unsigned int)__raw_readb(up->membase + offset); | ||
133 | } | ||
134 | |||
128 | static inline unsigned int serial_read_reg(struct plat_serial8250_port *up, | 135 | static inline unsigned int serial_read_reg(struct plat_serial8250_port *up, |
129 | int offset) | 136 | int offset) |
130 | { | 137 | { |
@@ -583,11 +590,12 @@ static unsigned int serial_in_override(struct uart_port *up, int offset) | |||
583 | { | 590 | { |
584 | if (UART_RX == offset) { | 591 | if (UART_RX == offset) { |
585 | unsigned int lsr; | 592 | unsigned int lsr; |
586 | lsr = serial_read_reg(omap_uart[up->line].p, UART_LSR); | 593 | lsr = __serial_read_reg(up, UART_LSR); |
587 | if (!(lsr & UART_LSR_DR)) | 594 | if (!(lsr & UART_LSR_DR)) |
588 | return -EPERM; | 595 | return -EPERM; |
589 | } | 596 | } |
590 | return serial_read_reg(omap_uart[up->line].p, offset); | 597 | |
598 | return __serial_read_reg(up, offset); | ||
591 | } | 599 | } |
592 | 600 | ||
593 | void __init omap_serial_early_init(void) | 601 | void __init omap_serial_early_init(void) |
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index 8a0837ea0294..dee92182749b 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig | |||
@@ -37,6 +37,8 @@ config MACH_ZYLONITE320 | |||
37 | config MACH_LITTLETON | 37 | config MACH_LITTLETON |
38 | bool "PXA3xx Form Factor Platform (aka Littleton)" | 38 | bool "PXA3xx Form Factor Platform (aka Littleton)" |
39 | select PXA3xx | 39 | select PXA3xx |
40 | select CPU_PXA300 | ||
41 | select CPU_PXA310 | ||
40 | select PXA_SSP | 42 | select PXA_SSP |
41 | 43 | ||
42 | config MACH_TAVOREVB | 44 | config MACH_TAVOREVB |
diff --git a/arch/arm/mach-pxa/include/mach/zylonite.h b/arch/arm/mach-pxa/include/mach/zylonite.h index bf6785adccf4..9edf645368d6 100644 --- a/arch/arm/mach-pxa/include/mach/zylonite.h +++ b/arch/arm/mach-pxa/include/mach/zylonite.h | |||
@@ -8,13 +8,6 @@ | |||
8 | /* the following variables are processor specific and initialized | 8 | /* the following variables are processor specific and initialized |
9 | * by the corresponding zylonite_pxa3xx_init() | 9 | * by the corresponding zylonite_pxa3xx_init() |
10 | */ | 10 | */ |
11 | struct platform_mmc_slot { | ||
12 | int gpio_cd; | ||
13 | int gpio_wp; | ||
14 | }; | ||
15 | |||
16 | extern struct platform_mmc_slot zylonite_mmc_slot[]; | ||
17 | |||
18 | extern int gpio_eth_irq; | 11 | extern int gpio_eth_irq; |
19 | extern int gpio_debug_led1; | 12 | extern int gpio_debug_led1; |
20 | extern int gpio_debug_led2; | 13 | extern int gpio_debug_led2; |
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c index f28c1715b910..fa527b258d61 100644 --- a/arch/arm/mach-pxa/littleton.c +++ b/arch/arm/mach-pxa/littleton.c | |||
@@ -110,6 +110,12 @@ static mfp_cfg_t littleton_mfp_cfg[] __initdata = { | |||
110 | GPIO7_MMC1_CLK, | 110 | GPIO7_MMC1_CLK, |
111 | GPIO8_MMC1_CMD, | 111 | GPIO8_MMC1_CMD, |
112 | GPIO15_GPIO, /* card detect */ | 112 | GPIO15_GPIO, /* card detect */ |
113 | |||
114 | /* UART3 */ | ||
115 | GPIO107_UART3_CTS, | ||
116 | GPIO108_UART3_RTS, | ||
117 | GPIO109_UART3_TXD, | ||
118 | GPIO110_UART3_RXD, | ||
113 | }; | 119 | }; |
114 | 120 | ||
115 | static struct resource smc91x_resources[] = { | 121 | static struct resource smc91x_resources[] = { |
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c index e5eeb3a62d01..c2b938a4d5c9 100644 --- a/arch/arm/mach-pxa/poodle.c +++ b/arch/arm/mach-pxa/poodle.c | |||
@@ -293,7 +293,7 @@ static struct pxamci_platform_data poodle_mci_platform_data = { | |||
293 | .init = poodle_mci_init, | 293 | .init = poodle_mci_init, |
294 | .setpower = poodle_mci_setpower, | 294 | .setpower = poodle_mci_setpower, |
295 | .exit = poodle_mci_exit, | 295 | .exit = poodle_mci_exit, |
296 | .gpio_card_detect = POODLE_IRQ_GPIO_nSD_DETECT, | 296 | .gpio_card_detect = POODLE_GPIO_nSD_DETECT, |
297 | .gpio_card_ro = POODLE_GPIO_nSD_WP, | 297 | .gpio_card_ro = POODLE_GPIO_nSD_WP, |
298 | .gpio_power = -1, | 298 | .gpio_power = -1, |
299 | }; | 299 | }; |
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c index 5b986a8bd9e6..75f2a37f945d 100644 --- a/arch/arm/mach-pxa/zeus.c +++ b/arch/arm/mach-pxa/zeus.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/mtd/physmap.h> | 25 | #include <linux/mtd/physmap.h> |
26 | #include <linux/i2c.h> | 26 | #include <linux/i2c.h> |
27 | #include <linux/i2c/pca953x.h> | 27 | #include <linux/i2c/pca953x.h> |
28 | #include <linux/apm-emulation.h> | ||
28 | 29 | ||
29 | #include <asm/mach-types.h> | 30 | #include <asm/mach-types.h> |
30 | #include <asm/mach/arch.h> | 31 | #include <asm/mach/arch.h> |
@@ -626,8 +627,27 @@ static void zeus_power_off(void) | |||
626 | pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP); | 627 | pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP); |
627 | } | 628 | } |
628 | 629 | ||
629 | int zeus_get_pcb_info(struct i2c_client *client, unsigned gpio, | 630 | #ifdef CONFIG_APM_EMULATION |
630 | unsigned ngpio, void *context) | 631 | static void zeus_get_power_status(struct apm_power_info *info) |
632 | { | ||
633 | /* Power supply is always present */ | ||
634 | info->ac_line_status = APM_AC_ONLINE; | ||
635 | info->battery_status = APM_BATTERY_STATUS_NOT_PRESENT; | ||
636 | info->battery_flag = APM_BATTERY_FLAG_NOT_PRESENT; | ||
637 | } | ||
638 | |||
639 | static inline void zeus_setup_apm(void) | ||
640 | { | ||
641 | apm_get_power_status = zeus_get_power_status; | ||
642 | } | ||
643 | #else | ||
644 | static inline void zeus_setup_apm(void) | ||
645 | { | ||
646 | } | ||
647 | #endif | ||
648 | |||
649 | static int zeus_get_pcb_info(struct i2c_client *client, unsigned gpio, | ||
650 | unsigned ngpio, void *context) | ||
631 | { | 651 | { |
632 | int i; | 652 | int i; |
633 | u8 pcb_info = 0; | 653 | u8 pcb_info = 0; |
@@ -726,9 +746,18 @@ static mfp_cfg_t zeus_pin_config[] __initdata = { | |||
726 | GPIO99_GPIO, /* CF RDY */ | 746 | GPIO99_GPIO, /* CF RDY */ |
727 | }; | 747 | }; |
728 | 748 | ||
749 | /* | ||
750 | * DM9k MSCx settings: SRAM, 16 bits | ||
751 | * 17 cycles delay first access | ||
752 | * 5 cycles delay next access | ||
753 | * 13 cycles recovery time | ||
754 | * faster device | ||
755 | */ | ||
756 | #define DM9K_MSC_VALUE 0xe4c9 | ||
757 | |||
729 | static void __init zeus_init(void) | 758 | static void __init zeus_init(void) |
730 | { | 759 | { |
731 | u16 dm9000_msc = 0xe279; | 760 | u16 dm9000_msc = DM9K_MSC_VALUE; |
732 | 761 | ||
733 | system_rev = __raw_readw(ZEUS_CPLD_VERSION); | 762 | system_rev = __raw_readw(ZEUS_CPLD_VERSION); |
734 | pr_info("Zeus CPLD V%dI%d\n", (system_rev & 0xf0) >> 4, (system_rev & 0x0f)); | 763 | pr_info("Zeus CPLD V%dI%d\n", (system_rev & 0xf0) >> 4, (system_rev & 0x0f)); |
@@ -738,6 +767,7 @@ static void __init zeus_init(void) | |||
738 | MSC1 = (MSC1 & 0xffff0000) | dm9000_msc; | 767 | MSC1 = (MSC1 & 0xffff0000) | dm9000_msc; |
739 | 768 | ||
740 | pm_power_off = zeus_power_off; | 769 | pm_power_off = zeus_power_off; |
770 | zeus_setup_apm(); | ||
741 | 771 | ||
742 | pxa2xx_mfp_config(ARRAY_AND_SIZE(zeus_pin_config)); | 772 | pxa2xx_mfp_config(ARRAY_AND_SIZE(zeus_pin_config)); |
743 | 773 | ||
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c index b66e9e2d06e7..2b4043c04d0c 100644 --- a/arch/arm/mach-pxa/zylonite.c +++ b/arch/arm/mach-pxa/zylonite.c | |||
@@ -36,9 +36,6 @@ | |||
36 | #include "devices.h" | 36 | #include "devices.h" |
37 | #include "generic.h" | 37 | #include "generic.h" |
38 | 38 | ||
39 | #define MAX_SLOTS 3 | ||
40 | struct platform_mmc_slot zylonite_mmc_slot[MAX_SLOTS]; | ||
41 | |||
42 | int gpio_eth_irq; | 39 | int gpio_eth_irq; |
43 | int gpio_debug_led1; | 40 | int gpio_debug_led1; |
44 | int gpio_debug_led2; | 41 | int gpio_debug_led2; |
@@ -220,84 +217,28 @@ static inline void zylonite_init_lcd(void) {} | |||
220 | #endif | 217 | #endif |
221 | 218 | ||
222 | #if defined(CONFIG_MMC) | 219 | #if defined(CONFIG_MMC) |
223 | static int zylonite_mci_ro(struct device *dev) | ||
224 | { | ||
225 | struct platform_device *pdev = to_platform_device(dev); | ||
226 | |||
227 | return gpio_get_value(zylonite_mmc_slot[pdev->id].gpio_wp); | ||
228 | } | ||
229 | |||
230 | static int zylonite_mci_init(struct device *dev, | ||
231 | irq_handler_t zylonite_detect_int, | ||
232 | void *data) | ||
233 | { | ||
234 | struct platform_device *pdev = to_platform_device(dev); | ||
235 | int err, cd_irq, gpio_cd, gpio_wp; | ||
236 | |||
237 | cd_irq = gpio_to_irq(zylonite_mmc_slot[pdev->id].gpio_cd); | ||
238 | gpio_cd = zylonite_mmc_slot[pdev->id].gpio_cd; | ||
239 | gpio_wp = zylonite_mmc_slot[pdev->id].gpio_wp; | ||
240 | |||
241 | /* | ||
242 | * setup GPIO for Zylonite MMC controller | ||
243 | */ | ||
244 | err = gpio_request(gpio_cd, "mmc card detect"); | ||
245 | if (err) | ||
246 | goto err_request_cd; | ||
247 | gpio_direction_input(gpio_cd); | ||
248 | |||
249 | err = gpio_request(gpio_wp, "mmc write protect"); | ||
250 | if (err) | ||
251 | goto err_request_wp; | ||
252 | gpio_direction_input(gpio_wp); | ||
253 | |||
254 | err = request_irq(cd_irq, zylonite_detect_int, | ||
255 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, | ||
256 | "MMC card detect", data); | ||
257 | if (err) { | ||
258 | printk(KERN_ERR "%s: MMC/SD/SDIO: " | ||
259 | "can't request card detect IRQ\n", __func__); | ||
260 | goto err_request_irq; | ||
261 | } | ||
262 | |||
263 | return 0; | ||
264 | |||
265 | err_request_irq: | ||
266 | gpio_free(gpio_wp); | ||
267 | err_request_wp: | ||
268 | gpio_free(gpio_cd); | ||
269 | err_request_cd: | ||
270 | return err; | ||
271 | } | ||
272 | |||
273 | static void zylonite_mci_exit(struct device *dev, void *data) | ||
274 | { | ||
275 | struct platform_device *pdev = to_platform_device(dev); | ||
276 | int cd_irq, gpio_cd, gpio_wp; | ||
277 | |||
278 | cd_irq = gpio_to_irq(zylonite_mmc_slot[pdev->id].gpio_cd); | ||
279 | gpio_cd = zylonite_mmc_slot[pdev->id].gpio_cd; | ||
280 | gpio_wp = zylonite_mmc_slot[pdev->id].gpio_wp; | ||
281 | |||
282 | free_irq(cd_irq, data); | ||
283 | gpio_free(gpio_cd); | ||
284 | gpio_free(gpio_wp); | ||
285 | } | ||
286 | |||
287 | static struct pxamci_platform_data zylonite_mci_platform_data = { | 220 | static struct pxamci_platform_data zylonite_mci_platform_data = { |
288 | .detect_delay = 20, | 221 | .detect_delay = 20, |
289 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | 222 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
290 | .init = zylonite_mci_init, | 223 | .gpio_card_detect = EXT_GPIO(0), |
291 | .exit = zylonite_mci_exit, | 224 | .gpio_card_ro = EXT_GPIO(2), |
292 | .get_ro = zylonite_mci_ro, | ||
293 | .gpio_card_detect = -1, | ||
294 | .gpio_card_ro = -1, | ||
295 | .gpio_power = -1, | 225 | .gpio_power = -1, |
296 | }; | 226 | }; |
297 | 227 | ||
298 | static struct pxamci_platform_data zylonite_mci2_platform_data = { | 228 | static struct pxamci_platform_data zylonite_mci2_platform_data = { |
299 | .detect_delay = 20, | 229 | .detect_delay = 20, |
300 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | 230 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
231 | .gpio_card_detect = EXT_GPIO(1), | ||
232 | .gpio_card_ro = EXT_GPIO(3), | ||
233 | .gpio_power = -1, | ||
234 | }; | ||
235 | |||
236 | static struct pxamci_platform_data zylonite_mci3_platform_data = { | ||
237 | .detect_delay = 20, | ||
238 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | ||
239 | .gpio_card_detect = EXT_GPIO(30), | ||
240 | .gpio_card_ro = EXT_GPIO(31), | ||
241 | .gpio_power = -1, | ||
301 | }; | 242 | }; |
302 | 243 | ||
303 | static void __init zylonite_init_mmc(void) | 244 | static void __init zylonite_init_mmc(void) |
@@ -305,7 +246,7 @@ static void __init zylonite_init_mmc(void) | |||
305 | pxa_set_mci_info(&zylonite_mci_platform_data); | 246 | pxa_set_mci_info(&zylonite_mci_platform_data); |
306 | pxa3xx_set_mci2_info(&zylonite_mci2_platform_data); | 247 | pxa3xx_set_mci2_info(&zylonite_mci2_platform_data); |
307 | if (cpu_is_pxa310()) | 248 | if (cpu_is_pxa310()) |
308 | pxa3xx_set_mci3_info(&zylonite_mci_platform_data); | 249 | pxa3xx_set_mci3_info(&zylonite_mci3_platform_data); |
309 | } | 250 | } |
310 | #else | 251 | #else |
311 | static inline void zylonite_init_mmc(void) {} | 252 | static inline void zylonite_init_mmc(void) {} |
diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c index 84095440a878..3aa73b3e33f2 100644 --- a/arch/arm/mach-pxa/zylonite_pxa300.c +++ b/arch/arm/mach-pxa/zylonite_pxa300.c | |||
@@ -129,8 +129,8 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = { | |||
129 | GPIO22_I2C_SDA, | 129 | GPIO22_I2C_SDA, |
130 | 130 | ||
131 | /* GPIO */ | 131 | /* GPIO */ |
132 | GPIO18_GPIO, /* GPIO Expander #0 INT_N */ | 132 | GPIO18_GPIO | MFP_PULL_HIGH, /* GPIO Expander #0 INT_N */ |
133 | GPIO19_GPIO, /* GPIO Expander #1 INT_N */ | 133 | GPIO19_GPIO | MFP_PULL_HIGH, /* GPIO Expander #1 INT_N */ |
134 | }; | 134 | }; |
135 | 135 | ||
136 | static mfp_cfg_t pxa300_mfp_cfg[] __initdata = { | 136 | static mfp_cfg_t pxa300_mfp_cfg[] __initdata = { |
@@ -258,10 +258,6 @@ void __init zylonite_pxa300_init(void) | |||
258 | /* detect LCD panel */ | 258 | /* detect LCD panel */ |
259 | zylonite_detect_lcd_panel(); | 259 | zylonite_detect_lcd_panel(); |
260 | 260 | ||
261 | /* MMC card detect & write protect for controller 0 */ | ||
262 | zylonite_mmc_slot[0].gpio_cd = EXT_GPIO(0); | ||
263 | zylonite_mmc_slot[0].gpio_wp = EXT_GPIO(2); | ||
264 | |||
265 | /* WM9713 IRQ */ | 261 | /* WM9713 IRQ */ |
266 | wm9713_irq = mfp_to_gpio(MFP_PIN_GPIO26); | 262 | wm9713_irq = mfp_to_gpio(MFP_PIN_GPIO26); |
267 | 263 | ||
@@ -276,10 +272,6 @@ void __init zylonite_pxa300_init(void) | |||
276 | if (cpu_is_pxa310()) { | 272 | if (cpu_is_pxa310()) { |
277 | pxa3xx_mfp_config(ARRAY_AND_SIZE(pxa310_mfp_cfg)); | 273 | pxa3xx_mfp_config(ARRAY_AND_SIZE(pxa310_mfp_cfg)); |
278 | gpio_eth_irq = mfp_to_gpio(MFP_PIN_GPIO102); | 274 | gpio_eth_irq = mfp_to_gpio(MFP_PIN_GPIO102); |
279 | |||
280 | /* MMC card detect & write protect for controller 2 */ | ||
281 | zylonite_mmc_slot[2].gpio_cd = EXT_GPIO(30); | ||
282 | zylonite_mmc_slot[2].gpio_wp = EXT_GPIO(31); | ||
283 | } | 275 | } |
284 | 276 | ||
285 | /* GPIOs for Debug LEDs */ | 277 | /* GPIOs for Debug LEDs */ |
diff --git a/arch/arm/mach-pxa/zylonite_pxa320.c b/arch/arm/mach-pxa/zylonite_pxa320.c index 60d08f23f5e4..9942bac4cf7d 100644 --- a/arch/arm/mach-pxa/zylonite_pxa320.c +++ b/arch/arm/mach-pxa/zylonite_pxa320.c | |||
@@ -209,10 +209,6 @@ void __init zylonite_pxa320_init(void) | |||
209 | gpio_debug_led1 = mfp_to_gpio(MFP_PIN_GPIO1_2); | 209 | gpio_debug_led1 = mfp_to_gpio(MFP_PIN_GPIO1_2); |
210 | gpio_debug_led2 = mfp_to_gpio(MFP_PIN_GPIO4_2); | 210 | gpio_debug_led2 = mfp_to_gpio(MFP_PIN_GPIO4_2); |
211 | 211 | ||
212 | /* MMC card detect & write protect for controller 0 */ | ||
213 | zylonite_mmc_slot[0].gpio_cd = mfp_to_gpio(MFP_PIN_GPIO1); | ||
214 | zylonite_mmc_slot[0].gpio_wp = mfp_to_gpio(MFP_PIN_GPIO5); | ||
215 | |||
216 | /* WM9713 IRQ */ | 212 | /* WM9713 IRQ */ |
217 | wm9713_irq = mfp_to_gpio(MFP_PIN_GPIO15); | 213 | wm9713_irq = mfp_to_gpio(MFP_PIN_GPIO15); |
218 | } | 214 | } |
diff --git a/arch/arm/mach-s3c2410/include/mach/ts.h b/arch/arm/mach-s3c2410/include/mach/ts.h new file mode 100644 index 000000000000..dc361700d695 --- /dev/null +++ b/arch/arm/mach-s3c2410/include/mach/ts.h | |||
@@ -0,0 +1,21 @@ | |||
1 | /* linux/include/asm/arch-s3c2410/ts.h | ||
2 | * | ||
3 | * Copyright (c) 2005 Arnaud Patard <arnaud.patard@rtp-net.org> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License version 2 as | ||
7 | * published by the Free Software Foundation. | ||
8 | */ | ||
9 | |||
10 | #ifndef __ASM_ARM_TS_H | ||
11 | #define __ASM_ARM_TS_H | ||
12 | |||
13 | struct s3c2410_ts_mach_info { | ||
14 | int delay; | ||
15 | int presc; | ||
16 | int oversampling_shift; | ||
17 | }; | ||
18 | |||
19 | extern void s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *); | ||
20 | |||
21 | #endif /* __ASM_ARM_TS_H */ | ||
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c index 4c79ac8a6c33..97162fdd0590 100644 --- a/arch/arm/mach-s3c2410/mach-bast.c +++ b/arch/arm/mach-s3c2410/mach-bast.c | |||
@@ -279,6 +279,7 @@ static struct s3c2410_nand_set __initdata bast_nand_sets[] = { | |||
279 | .name = "SmartMedia", | 279 | .name = "SmartMedia", |
280 | .nr_chips = 1, | 280 | .nr_chips = 1, |
281 | .nr_map = smartmedia_map, | 281 | .nr_map = smartmedia_map, |
282 | .options = NAND_SCAN_SILENT_NODEV, | ||
282 | .nr_partitions = ARRAY_SIZE(bast_default_nand_part), | 283 | .nr_partitions = ARRAY_SIZE(bast_default_nand_part), |
283 | .partitions = bast_default_nand_part, | 284 | .partitions = bast_default_nand_part, |
284 | }, | 285 | }, |
@@ -293,6 +294,7 @@ static struct s3c2410_nand_set __initdata bast_nand_sets[] = { | |||
293 | .name = "chip1", | 294 | .name = "chip1", |
294 | .nr_chips = 1, | 295 | .nr_chips = 1, |
295 | .nr_map = chip1_map, | 296 | .nr_map = chip1_map, |
297 | .options = NAND_SCAN_SILENT_NODEV, | ||
296 | .nr_partitions = ARRAY_SIZE(bast_default_nand_part), | 298 | .nr_partitions = ARRAY_SIZE(bast_default_nand_part), |
297 | .partitions = bast_default_nand_part, | 299 | .partitions = bast_default_nand_part, |
298 | }, | 300 | }, |
@@ -300,6 +302,7 @@ static struct s3c2410_nand_set __initdata bast_nand_sets[] = { | |||
300 | .name = "chip2", | 302 | .name = "chip2", |
301 | .nr_chips = 1, | 303 | .nr_chips = 1, |
302 | .nr_map = chip2_map, | 304 | .nr_map = chip2_map, |
305 | .options = NAND_SCAN_SILENT_NODEV, | ||
303 | .nr_partitions = ARRAY_SIZE(bast_default_nand_part), | 306 | .nr_partitions = ARRAY_SIZE(bast_default_nand_part), |
304 | .partitions = bast_default_nand_part, | 307 | .partitions = bast_default_nand_part, |
305 | } | 308 | } |
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c index 49053254c98d..1e34abe1a19e 100644 --- a/arch/arm/mach-s3c2410/mach-h1940.c +++ b/arch/arm/mach-s3c2410/mach-h1940.c | |||
@@ -46,6 +46,7 @@ | |||
46 | #include <mach/h1940.h> | 46 | #include <mach/h1940.h> |
47 | #include <mach/h1940-latch.h> | 47 | #include <mach/h1940-latch.h> |
48 | #include <mach/fb.h> | 48 | #include <mach/fb.h> |
49 | #include <mach/ts.h> | ||
49 | #include <plat/udc.h> | 50 | #include <plat/udc.h> |
50 | #include <plat/iic.h> | 51 | #include <plat/iic.h> |
51 | 52 | ||
@@ -140,6 +141,11 @@ static struct s3c2410_udc_mach_info h1940_udc_cfg __initdata = { | |||
140 | .vbus_pin_inverted = 1, | 141 | .vbus_pin_inverted = 1, |
141 | }; | 142 | }; |
142 | 143 | ||
144 | static struct s3c2410_ts_mach_info h1940_ts_cfg __initdata = { | ||
145 | .delay = 10000, | ||
146 | .presc = 49, | ||
147 | .oversampling_shift = 2, | ||
148 | }; | ||
143 | 149 | ||
144 | /** | 150 | /** |
145 | * Set lcd on or off | 151 | * Set lcd on or off |
@@ -265,6 +271,7 @@ static struct platform_device h1940_lcd_powerdev = { | |||
265 | }; | 271 | }; |
266 | 272 | ||
267 | static struct platform_device *h1940_devices[] __initdata = { | 273 | static struct platform_device *h1940_devices[] __initdata = { |
274 | &s3c_device_ts, | ||
268 | &s3c_device_usb, | 275 | &s3c_device_usb, |
269 | &s3c_device_lcd, | 276 | &s3c_device_lcd, |
270 | &s3c_device_wdt, | 277 | &s3c_device_wdt, |
@@ -305,6 +312,7 @@ static void __init h1940_init(void) | |||
305 | 312 | ||
306 | s3c24xx_fb_set_platdata(&h1940_fb_info); | 313 | s3c24xx_fb_set_platdata(&h1940_fb_info); |
307 | s3c24xx_udc_set_platdata(&h1940_udc_cfg); | 314 | s3c24xx_udc_set_platdata(&h1940_udc_cfg); |
315 | s3c24xx_ts_set_platdata(&h1940_ts_cfg); | ||
308 | s3c_i2c0_set_platdata(NULL); | 316 | s3c_i2c0_set_platdata(NULL); |
309 | 317 | ||
310 | s3c_device_sdi.dev.platform_data = &h1940_mmc_cfg; | 318 | s3c_device_sdi.dev.platform_data = &h1940_mmc_cfg; |
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c index 015dfb2a80da..f35371db33f5 100644 --- a/arch/arm/mach-s3c2440/mach-osiris.c +++ b/arch/arm/mach-s3c2440/mach-osiris.c | |||
@@ -208,6 +208,7 @@ static struct s3c2410_nand_set __initdata osiris_nand_sets[] = { | |||
208 | .name = "External", | 208 | .name = "External", |
209 | .nr_chips = 1, | 209 | .nr_chips = 1, |
210 | .nr_map = external_map, | 210 | .nr_map = external_map, |
211 | .options = NAND_SCAN_SILENT_NODEV, | ||
211 | .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), | 212 | .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), |
212 | .partitions = osiris_default_nand_part, | 213 | .partitions = osiris_default_nand_part, |
213 | }, | 214 | }, |
@@ -222,6 +223,7 @@ static struct s3c2410_nand_set __initdata osiris_nand_sets[] = { | |||
222 | .name = "chip1", | 223 | .name = "chip1", |
223 | .nr_chips = 1, | 224 | .nr_chips = 1, |
224 | .nr_map = chip1_map, | 225 | .nr_map = chip1_map, |
226 | .options = NAND_SCAN_SILENT_NODEV, | ||
225 | .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), | 227 | .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), |
226 | .partitions = osiris_default_nand_part, | 228 | .partitions = osiris_default_nand_part, |
227 | }, | 229 | }, |
diff --git a/arch/arm/mach-w90x900/include/mach/system.h b/arch/arm/mach-w90x900/include/mach/system.h index 940640066857..ce228bdc66dd 100644 --- a/arch/arm/mach-w90x900/include/mach/system.h +++ b/arch/arm/mach-w90x900/include/mach/system.h | |||
@@ -15,7 +15,15 @@ | |||
15 | * | 15 | * |
16 | */ | 16 | */ |
17 | 17 | ||
18 | #include <linux/io.h> | ||
18 | #include <asm/proc-fns.h> | 19 | #include <asm/proc-fns.h> |
20 | #include <mach/map.h> | ||
21 | #include <mach/regs-timer.h> | ||
22 | |||
23 | #define WTCR (TMR_BA + 0x1C) | ||
24 | #define WTCLK (1 << 10) | ||
25 | #define WTE (1 << 7) | ||
26 | #define WTRE (1 << 1) | ||
19 | 27 | ||
20 | static void arch_idle(void) | 28 | static void arch_idle(void) |
21 | { | 29 | { |
@@ -23,6 +31,11 @@ static void arch_idle(void) | |||
23 | 31 | ||
24 | static void arch_reset(char mode, const char *cmd) | 32 | static void arch_reset(char mode, const char *cmd) |
25 | { | 33 | { |
26 | cpu_reset(0); | 34 | if (mode == 's') { |
35 | /* Jump into ROM at address 0 */ | ||
36 | cpu_reset(0); | ||
37 | } else { | ||
38 | __raw_writel(WTE | WTRE | WTCLK, WTCR); | ||
39 | } | ||
27 | } | 40 | } |
28 | 41 | ||
diff --git a/arch/arm/mach-w90x900/time.c b/arch/arm/mach-w90x900/time.c index 4128af870b41..b80f769bc135 100644 --- a/arch/arm/mach-w90x900/time.c +++ b/arch/arm/mach-w90x900/time.c | |||
@@ -42,7 +42,10 @@ | |||
42 | #define TICKS_PER_SEC 100 | 42 | #define TICKS_PER_SEC 100 |
43 | #define PRESCALE 0x63 /* Divider = prescale + 1 */ | 43 | #define PRESCALE 0x63 /* Divider = prescale + 1 */ |
44 | 44 | ||
45 | unsigned int timer0_load; | 45 | #define TDR_SHIFT 24 |
46 | #define TDR_MASK ((1 << TDR_SHIFT) - 1) | ||
47 | |||
48 | static unsigned int timer0_load; | ||
46 | 49 | ||
47 | static void nuc900_clockevent_setmode(enum clock_event_mode mode, | 50 | static void nuc900_clockevent_setmode(enum clock_event_mode mode, |
48 | struct clock_event_device *clk) | 51 | struct clock_event_device *clk) |
@@ -88,7 +91,7 @@ static int nuc900_clockevent_setnextevent(unsigned long evt, | |||
88 | static struct clock_event_device nuc900_clockevent_device = { | 91 | static struct clock_event_device nuc900_clockevent_device = { |
89 | .name = "nuc900-timer0", | 92 | .name = "nuc900-timer0", |
90 | .shift = 32, | 93 | .shift = 32, |
91 | .features = CLOCK_EVT_MODE_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | 94 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, |
92 | .set_mode = nuc900_clockevent_setmode, | 95 | .set_mode = nuc900_clockevent_setmode, |
93 | .set_next_event = nuc900_clockevent_setnextevent, | 96 | .set_next_event = nuc900_clockevent_setnextevent, |
94 | .rating = 300, | 97 | .rating = 300, |
@@ -112,8 +115,23 @@ static struct irqaction nuc900_timer0_irq = { | |||
112 | .handler = nuc900_timer0_interrupt, | 115 | .handler = nuc900_timer0_interrupt, |
113 | }; | 116 | }; |
114 | 117 | ||
115 | static void __init nuc900_clockevents_init(unsigned int rate) | 118 | static void __init nuc900_clockevents_init(void) |
116 | { | 119 | { |
120 | unsigned int rate; | ||
121 | struct clk *clk = clk_get(NULL, "timer0"); | ||
122 | |||
123 | BUG_ON(IS_ERR(clk)); | ||
124 | |||
125 | __raw_writel(0x00, REG_TCSR0); | ||
126 | |||
127 | clk_enable(clk); | ||
128 | rate = clk_get_rate(clk) / (PRESCALE + 1); | ||
129 | |||
130 | timer0_load = (rate / TICKS_PER_SEC); | ||
131 | |||
132 | __raw_writel(RESETINT, REG_TISR); | ||
133 | setup_irq(IRQ_TIMER0, &nuc900_timer0_irq); | ||
134 | |||
117 | nuc900_clockevent_device.mult = div_sc(rate, NSEC_PER_SEC, | 135 | nuc900_clockevent_device.mult = div_sc(rate, NSEC_PER_SEC, |
118 | nuc900_clockevent_device.shift); | 136 | nuc900_clockevent_device.shift); |
119 | nuc900_clockevent_device.max_delta_ns = clockevent_delta2ns(0xffffffff, | 137 | nuc900_clockevent_device.max_delta_ns = clockevent_delta2ns(0xffffffff, |
@@ -127,26 +145,35 @@ static void __init nuc900_clockevents_init(unsigned int rate) | |||
127 | 145 | ||
128 | static cycle_t nuc900_get_cycles(struct clocksource *cs) | 146 | static cycle_t nuc900_get_cycles(struct clocksource *cs) |
129 | { | 147 | { |
130 | return ~__raw_readl(REG_TDR1); | 148 | return (~__raw_readl(REG_TDR1)) & TDR_MASK; |
131 | } | 149 | } |
132 | 150 | ||
133 | static struct clocksource clocksource_nuc900 = { | 151 | static struct clocksource clocksource_nuc900 = { |
134 | .name = "nuc900-timer1", | 152 | .name = "nuc900-timer1", |
135 | .rating = 200, | 153 | .rating = 200, |
136 | .read = nuc900_get_cycles, | 154 | .read = nuc900_get_cycles, |
137 | .mask = CLOCKSOURCE_MASK(32), | 155 | .mask = CLOCKSOURCE_MASK(TDR_SHIFT), |
138 | .shift = 20, | 156 | .shift = 10, |
139 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 157 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
140 | }; | 158 | }; |
141 | 159 | ||
142 | static void __init nuc900_clocksource_init(unsigned int rate) | 160 | static void __init nuc900_clocksource_init(void) |
143 | { | 161 | { |
144 | unsigned int val; | 162 | unsigned int val; |
163 | unsigned int rate; | ||
164 | struct clk *clk = clk_get(NULL, "timer1"); | ||
165 | |||
166 | BUG_ON(IS_ERR(clk)); | ||
167 | |||
168 | __raw_writel(0x00, REG_TCSR1); | ||
169 | |||
170 | clk_enable(clk); | ||
171 | rate = clk_get_rate(clk) / (PRESCALE + 1); | ||
145 | 172 | ||
146 | __raw_writel(0xffffffff, REG_TICR1); | 173 | __raw_writel(0xffffffff, REG_TICR1); |
147 | 174 | ||
148 | val = __raw_readl(REG_TCSR1); | 175 | val = __raw_readl(REG_TCSR1); |
149 | val |= (COUNTEN | PERIOD); | 176 | val |= (COUNTEN | PERIOD | PRESCALE); |
150 | __raw_writel(val, REG_TCSR1); | 177 | __raw_writel(val, REG_TCSR1); |
151 | 178 | ||
152 | clocksource_nuc900.mult = | 179 | clocksource_nuc900.mult = |
@@ -156,25 +183,8 @@ static void __init nuc900_clocksource_init(unsigned int rate) | |||
156 | 183 | ||
157 | static void __init nuc900_timer_init(void) | 184 | static void __init nuc900_timer_init(void) |
158 | { | 185 | { |
159 | struct clk *ck_ext = clk_get(NULL, "ext"); | 186 | nuc900_clocksource_init(); |
160 | unsigned int rate; | 187 | nuc900_clockevents_init(); |
161 | |||
162 | BUG_ON(IS_ERR(ck_ext)); | ||
163 | |||
164 | rate = clk_get_rate(ck_ext); | ||
165 | clk_put(ck_ext); | ||
166 | rate = rate / (PRESCALE + 0x01); | ||
167 | |||
168 | /* set a known state */ | ||
169 | __raw_writel(0x00, REG_TCSR0); | ||
170 | __raw_writel(0x00, REG_TCSR1); | ||
171 | __raw_writel(RESETINT, REG_TISR); | ||
172 | timer0_load = (rate / TICKS_PER_SEC); | ||
173 | |||
174 | setup_irq(IRQ_TIMER0, &nuc900_timer0_irq); | ||
175 | |||
176 | nuc900_clocksource_init(rate); | ||
177 | nuc900_clockevents_init(rate); | ||
178 | } | 188 | } |
179 | 189 | ||
180 | struct sys_timer nuc900_timer = { | 190 | struct sys_timer nuc900_timer = { |
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index 52c40d155672..a04ffbbbe253 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c | |||
@@ -616,7 +616,7 @@ void __init mem_init(void) | |||
616 | "%dK data, %dK init, %luK highmem)\n", | 616 | "%dK data, %dK init, %luK highmem)\n", |
617 | nr_free_pages() << (PAGE_SHIFT-10), codesize >> 10, | 617 | nr_free_pages() << (PAGE_SHIFT-10), codesize >> 10, |
618 | datasize >> 10, initsize >> 10, | 618 | datasize >> 10, initsize >> 10, |
619 | (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10))); | 619 | totalhigh_pages << (PAGE_SHIFT-10)); |
620 | 620 | ||
621 | if (PAGE_SIZE >= 16384 && num_physpages <= 128) { | 621 | if (PAGE_SIZE >= 16384 && num_physpages <= 128) { |
622 | extern int sysctl_overcommit_memory; | 622 | extern int sysctl_overcommit_memory; |
diff --git a/arch/arm/mm/tlb-v7.S b/arch/arm/mm/tlb-v7.S index a26a605b73bd..0cb1848bd876 100644 --- a/arch/arm/mm/tlb-v7.S +++ b/arch/arm/mm/tlb-v7.S | |||
@@ -40,7 +40,6 @@ ENTRY(v7wbi_flush_user_tlb_range) | |||
40 | asid r3, r3 @ mask ASID | 40 | asid r3, r3 @ mask ASID |
41 | orr r0, r3, r0, lsl #PAGE_SHIFT @ Create initial MVA | 41 | orr r0, r3, r0, lsl #PAGE_SHIFT @ Create initial MVA |
42 | mov r1, r1, lsl #PAGE_SHIFT | 42 | mov r1, r1, lsl #PAGE_SHIFT |
43 | vma_vm_flags r2, r2 @ get vma->vm_flags | ||
44 | 1: | 43 | 1: |
45 | #ifdef CONFIG_SMP | 44 | #ifdef CONFIG_SMP |
46 | mcr p15, 0, r0, c8, c3, 1 @ TLB invalidate U MVA (shareable) | 45 | mcr p15, 0, r0, c8, c3, 1 @ TLB invalidate U MVA (shareable) |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx25.h b/arch/arm/plat-mxc/include/mach/iomux-mx25.h index 810c47f56e77..9af494f0ab3d 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx25.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx25.h | |||
@@ -58,19 +58,19 @@ | |||
58 | 58 | ||
59 | #define MX25_PAD_A18__A18 IOMUX_PAD(0x23c, 0x020, 0x10, 0, 0, NO_PAD_CTRL) | 59 | #define MX25_PAD_A18__A18 IOMUX_PAD(0x23c, 0x020, 0x10, 0, 0, NO_PAD_CTRL) |
60 | #define MX25_PAD_A18__GPIO_2_4 IOMUX_PAD(0x23c, 0x020, 0x15, 0, 0, NO_PAD_CTRL) | 60 | #define MX25_PAD_A18__GPIO_2_4 IOMUX_PAD(0x23c, 0x020, 0x15, 0, 0, NO_PAD_CTRL) |
61 | #define MX25_PAD_A18__FEC_COL IOMUX_PAD(0x23c, 0x020, 0x17, 0x504, 0, NO_PAD_CTL) | 61 | #define MX25_PAD_A18__FEC_COL IOMUX_PAD(0x23c, 0x020, 0x17, 0x504, 0, NO_PAD_CTRL) |
62 | 62 | ||
63 | #define MX25_PAD_A19__A19 IOMUX_PAD(0x240, 0x024, 0x10, 0, 0, NO_PAD_CTRL) | 63 | #define MX25_PAD_A19__A19 IOMUX_PAD(0x240, 0x024, 0x10, 0, 0, NO_PAD_CTRL) |
64 | #define MX25_PAD_A19__FEC_RX_ER IOMUX_PAD(0x240, 0x024, 0x17, 0x518, 0, NO_PAD_CTL) | 64 | #define MX25_PAD_A19__FEC_RX_ER IOMUX_PAD(0x240, 0x024, 0x17, 0x518, 0, NO_PAD_CTRL) |
65 | #define MX25_PAD_A19__GPIO_2_5 IOMUX_PAD(0x240, 0x024, 0x15, 0, 0, NO_PAD_CTRL) | 65 | #define MX25_PAD_A19__GPIO_2_5 IOMUX_PAD(0x240, 0x024, 0x15, 0, 0, NO_PAD_CTRL) |
66 | 66 | ||
67 | #define MX25_PAD_A20__A20 IOMUX_PAD(0x244, 0x028, 0x10, 0, 0, NO_PAD_CTRL) | 67 | #define MX25_PAD_A20__A20 IOMUX_PAD(0x244, 0x028, 0x10, 0, 0, NO_PAD_CTRL) |
68 | #define MX25_PAD_A20__GPIO_2_6 IOMUX_PAD(0x244, 0x028, 0x15, 0, 0, NO_PAD_CTRL) | 68 | #define MX25_PAD_A20__GPIO_2_6 IOMUX_PAD(0x244, 0x028, 0x15, 0, 0, NO_PAD_CTRL) |
69 | #define MX25_PAD_A20__FEC_RDATA2 IOMUX_PAD(0x244, 0x028, 0x17, 0x50c, 0, NO_PAD_CTL) | 69 | #define MX25_PAD_A20__FEC_RDATA2 IOMUX_PAD(0x244, 0x028, 0x17, 0x50c, 0, NO_PAD_CTRL) |
70 | 70 | ||
71 | #define MX25_PAD_A21__A21 IOMUX_PAD(0x248, 0x02c, 0x10, 0, 0, NO_PAD_CTRL) | 71 | #define MX25_PAD_A21__A21 IOMUX_PAD(0x248, 0x02c, 0x10, 0, 0, NO_PAD_CTRL) |
72 | #define MX25_PAD_A21__GPIO_2_7 IOMUX_PAD(0x248, 0x02c, 0x15, 0, 0, NO_PAD_CTRL) | 72 | #define MX25_PAD_A21__GPIO_2_7 IOMUX_PAD(0x248, 0x02c, 0x15, 0, 0, NO_PAD_CTRL) |
73 | #define MX25_PAD_A21__FEC_RDATA3 IOMUX_PAD(0x248, 0x02c, 0x17, 0x510, 0, NO_PAD_CTL) | 73 | #define MX25_PAD_A21__FEC_RDATA3 IOMUX_PAD(0x248, 0x02c, 0x17, 0x510, 0, NO_PAD_CTRL) |
74 | 74 | ||
75 | #define MX25_PAD_A22__A22 IOMUX_PAD(0x000, 0x030, 0x10, 0, 0, NO_PAD_CTRL) | 75 | #define MX25_PAD_A22__A22 IOMUX_PAD(0x000, 0x030, 0x10, 0, 0, NO_PAD_CTRL) |
76 | #define MX25_PAD_A22__GPIO_2_8 IOMUX_PAD(0x000, 0x030, 0x15, 0, 0, NO_PAD_CTRL) | 76 | #define MX25_PAD_A22__GPIO_2_8 IOMUX_PAD(0x000, 0x030, 0x15, 0, 0, NO_PAD_CTRL) |
@@ -80,11 +80,11 @@ | |||
80 | 80 | ||
81 | #define MX25_PAD_A24__A24 IOMUX_PAD(0x250, 0x038, 0x10, 0, 0, NO_PAD_CTRL) | 81 | #define MX25_PAD_A24__A24 IOMUX_PAD(0x250, 0x038, 0x10, 0, 0, NO_PAD_CTRL) |
82 | #define MX25_PAD_A24__GPIO_2_10 IOMUX_PAD(0x250, 0x038, 0x15, 0, 0, NO_PAD_CTRL) | 82 | #define MX25_PAD_A24__GPIO_2_10 IOMUX_PAD(0x250, 0x038, 0x15, 0, 0, NO_PAD_CTRL) |
83 | #define MX25_PAD_A24__FEC_RX_CLK IOMUX_PAD(0x250, 0x038, 0x17, 0x514, 0, NO_PAD_CTL) | 83 | #define MX25_PAD_A24__FEC_RX_CLK IOMUX_PAD(0x250, 0x038, 0x17, 0x514, 0, NO_PAD_CTRL) |
84 | 84 | ||
85 | #define MX25_PAD_A25__A25 IOMUX_PAD(0x254, 0x03c, 0x10, 0, 0, NO_PAD_CTRL) | 85 | #define MX25_PAD_A25__A25 IOMUX_PAD(0x254, 0x03c, 0x10, 0, 0, NO_PAD_CTRL) |
86 | #define MX25_PAD_A25__GPIO_2_11 IOMUX_PAD(0x254, 0x03c, 0x15, 0, 0, NO_PAD_CTRL) | 86 | #define MX25_PAD_A25__GPIO_2_11 IOMUX_PAD(0x254, 0x03c, 0x15, 0, 0, NO_PAD_CTRL) |
87 | #define MX25_PAD_A25__FEC_CRS IOMUX_PAD(0x254, 0x03c, 0x17, 0x508, 0, NO_PAD_CTL) | 87 | #define MX25_PAD_A25__FEC_CRS IOMUX_PAD(0x254, 0x03c, 0x17, 0x508, 0, NO_PAD_CTRL) |
88 | 88 | ||
89 | #define MX25_PAD_EB0__EB0 IOMUX_PAD(0x258, 0x040, 0x10, 0, 0, NO_PAD_CTRL) | 89 | #define MX25_PAD_EB0__EB0 IOMUX_PAD(0x258, 0x040, 0x10, 0, 0, NO_PAD_CTRL) |
90 | #define MX25_PAD_EB0__AUD4_TXD IOMUX_PAD(0x258, 0x040, 0x14, 0x464, 0, NO_PAD_CTRL) | 90 | #define MX25_PAD_EB0__AUD4_TXD IOMUX_PAD(0x258, 0x040, 0x14, 0x464, 0, NO_PAD_CTRL) |
@@ -112,7 +112,7 @@ | |||
112 | #define MX25_PAD_CS5__UART5_RTS IOMUX_PAD(0x268, 0x058, 0x13, 0x574, 0, NO_PAD_CTRL) | 112 | #define MX25_PAD_CS5__UART5_RTS IOMUX_PAD(0x268, 0x058, 0x13, 0x574, 0, NO_PAD_CTRL) |
113 | #define MX25_PAD_CS5__GPIO_3_21 IOMUX_PAD(0x268, 0x058, 0x15, 0, 0, NO_PAD_CTRL) | 113 | #define MX25_PAD_CS5__GPIO_3_21 IOMUX_PAD(0x268, 0x058, 0x15, 0, 0, NO_PAD_CTRL) |
114 | 114 | ||
115 | #define MX25_PAD_NF_CE0__NF_CE0 IOMUX_PAD(0x26c, 0x05c, 0x10, 0, 0, NO_PAD_CTL) | 115 | #define MX25_PAD_NF_CE0__NF_CE0 IOMUX_PAD(0x26c, 0x05c, 0x10, 0, 0, NO_PAD_CTRL) |
116 | #define MX25_PAD_NF_CE0__GPIO_3_22 IOMUX_PAD(0x26c, 0x05c, 0x15, 0, 0, NO_PAD_CTRL) | 116 | #define MX25_PAD_NF_CE0__GPIO_3_22 IOMUX_PAD(0x26c, 0x05c, 0x15, 0, 0, NO_PAD_CTRL) |
117 | 117 | ||
118 | #define MX25_PAD_ECB__ECB IOMUX_PAD(0x270, 0x060, 0x10, 0, 0, NO_PAD_CTRL) | 118 | #define MX25_PAD_ECB__ECB IOMUX_PAD(0x270, 0x060, 0x10, 0, 0, NO_PAD_CTRL) |
@@ -229,28 +229,28 @@ | |||
229 | #define MX25_PAD_LD7__GPIO_1_21 IOMUX_PAD(0x2dc, 0x0e4, 0x15, 0, 0, NO_PAD_CTRL) | 229 | #define MX25_PAD_LD7__GPIO_1_21 IOMUX_PAD(0x2dc, 0x0e4, 0x15, 0, 0, NO_PAD_CTRL) |
230 | 230 | ||
231 | #define MX25_PAD_LD8__LD8 IOMUX_PAD(0x2e0, 0x0e8, 0x10, 0, 0, NO_PAD_CTRL) | 231 | #define MX25_PAD_LD8__LD8 IOMUX_PAD(0x2e0, 0x0e8, 0x10, 0, 0, NO_PAD_CTRL) |
232 | #define MX25_PAD_LD8__FEC_TX_ERR IOMUX_PAD(0x2e0, 0x0e8, 0x15, 0, 0, NO_PAD_CTL) | 232 | #define MX25_PAD_LD8__FEC_TX_ERR IOMUX_PAD(0x2e0, 0x0e8, 0x15, 0, 0, NO_PAD_CTRL) |
233 | 233 | ||
234 | #define MX25_PAD_LD9__LD9 IOMUX_PAD(0x2e4, 0x0ec, 0x10, 0, 0, NO_PAD_CTRL) | 234 | #define MX25_PAD_LD9__LD9 IOMUX_PAD(0x2e4, 0x0ec, 0x10, 0, 0, NO_PAD_CTRL) |
235 | #define MX25_PAD_LD9__FEC_COL IOMUX_PAD(0x2e4, 0x0ec, 0x15, 0x504, 1, NO_PAD_CTL) | 235 | #define MX25_PAD_LD9__FEC_COL IOMUX_PAD(0x2e4, 0x0ec, 0x15, 0x504, 1, NO_PAD_CTRL) |
236 | 236 | ||
237 | #define MX25_PAD_LD10__LD10 IOMUX_PAD(0x2e8, 0x0f0, 0x10, 0, 0, NO_PAD_CTRL) | 237 | #define MX25_PAD_LD10__LD10 IOMUX_PAD(0x2e8, 0x0f0, 0x10, 0, 0, NO_PAD_CTRL) |
238 | #define MX25_PAD_LD10__FEC_RX_ER IOMUX_PAD(0x2e8, 0x0f0, 0x15, 0x518, 1, NO_PAD_CTL) | 238 | #define MX25_PAD_LD10__FEC_RX_ER IOMUX_PAD(0x2e8, 0x0f0, 0x15, 0x518, 1, NO_PAD_CTRL) |
239 | 239 | ||
240 | #define MX25_PAD_LD11__LD11 IOMUX_PAD(0x2ec, 0x0f4, 0x10, 0, 0, NO_PAD_CTRL) | 240 | #define MX25_PAD_LD11__LD11 IOMUX_PAD(0x2ec, 0x0f4, 0x10, 0, 0, NO_PAD_CTRL) |
241 | #define MX25_PAD_LD11__FEC_RDATA2 IOMUX_PAD(0x2ec, 0x0f4, 0x15, 0x50c, 1, NO_PAD_CTL) | 241 | #define MX25_PAD_LD11__FEC_RDATA2 IOMUX_PAD(0x2ec, 0x0f4, 0x15, 0x50c, 1, NO_PAD_CTRL) |
242 | 242 | ||
243 | #define MX25_PAD_LD12__LD12 IOMUX_PAD(0x2f0, 0x0f8, 0x10, 0, 0, NO_PAD_CTRL) | 243 | #define MX25_PAD_LD12__LD12 IOMUX_PAD(0x2f0, 0x0f8, 0x10, 0, 0, NO_PAD_CTRL) |
244 | #define MX25_PAD_LD12__FEC_RDATA3 IOMUX_PAD(0x2f0, 0x0f8, 0x15, 0x510, 1, NO_PAD_CTL) | 244 | #define MX25_PAD_LD12__FEC_RDATA3 IOMUX_PAD(0x2f0, 0x0f8, 0x15, 0x510, 1, NO_PAD_CTRL) |
245 | 245 | ||
246 | #define MX25_PAD_LD13__LD13 IOMUX_PAD(0x2f4, 0x0fc, 0x10, 0, 0, NO_PAD_CTRL) | 246 | #define MX25_PAD_LD13__LD13 IOMUX_PAD(0x2f4, 0x0fc, 0x10, 0, 0, NO_PAD_CTRL) |
247 | #define MX25_PAD_LD13__FEC_TDATA2 IOMUX_PAD(0x2f4, 0x0fc, 0x15, 0, 0, NO_PAD_CTL) | 247 | #define MX25_PAD_LD13__FEC_TDATA2 IOMUX_PAD(0x2f4, 0x0fc, 0x15, 0, 0, NO_PAD_CTRL) |
248 | 248 | ||
249 | #define MX25_PAD_LD14__LD14 IOMUX_PAD(0x2f8, 0x100, 0x10, 0, 0, NO_PAD_CTRL) | 249 | #define MX25_PAD_LD14__LD14 IOMUX_PAD(0x2f8, 0x100, 0x10, 0, 0, NO_PAD_CTRL) |
250 | #define MX25_PAD_LD14__FEC_TDATA3 IOMUX_PAD(0x2f8, 0x100, 0x15, 0, 0, NO_PAD_CTL) | 250 | #define MX25_PAD_LD14__FEC_TDATA3 IOMUX_PAD(0x2f8, 0x100, 0x15, 0, 0, NO_PAD_CTRL) |
251 | 251 | ||
252 | #define MX25_PAD_LD15__LD15 IOMUX_PAD(0x2fc, 0x104, 0x10, 0, 0, NO_PAD_CTRL) | 252 | #define MX25_PAD_LD15__LD15 IOMUX_PAD(0x2fc, 0x104, 0x10, 0, 0, NO_PAD_CTRL) |
253 | #define MX25_PAD_LD15__FEC_RX_CLK IOMUX_PAD(0x2fc, 0x104, 0x15, 0x514, 1, NO_PAD_CTL) | 253 | #define MX25_PAD_LD15__FEC_RX_CLK IOMUX_PAD(0x2fc, 0x104, 0x15, 0x514, 1, NO_PAD_CTRL) |
254 | 254 | ||
255 | #define MX25_PAD_HSYNC__HSYNC IOMUX_PAD(0x300, 0x108, 0x10, 0, 0, NO_PAD_CTRL) | 255 | #define MX25_PAD_HSYNC__HSYNC IOMUX_PAD(0x300, 0x108, 0x10, 0, 0, NO_PAD_CTRL) |
256 | #define MX25_PAD_HSYNC__GPIO_1_22 IOMUX_PAD(0x300, 0x108, 0x15, 0, 0, NO_PAD_CTRL) | 256 | #define MX25_PAD_HSYNC__GPIO_1_22 IOMUX_PAD(0x300, 0x108, 0x15, 0, 0, NO_PAD_CTRL) |
@@ -265,7 +265,7 @@ | |||
265 | #define MX25_PAD_OE_ACD__GPIO_1_25 IOMUX_PAD(0x30c, 0x114, 0x15, 0, 0, NO_PAD_CTRL) | 265 | #define MX25_PAD_OE_ACD__GPIO_1_25 IOMUX_PAD(0x30c, 0x114, 0x15, 0, 0, NO_PAD_CTRL) |
266 | 266 | ||
267 | #define MX25_PAD_CONTRAST__CONTRAST IOMUX_PAD(0x310, 0x118, 0x10, 0, 0, NO_PAD_CTRL) | 267 | #define MX25_PAD_CONTRAST__CONTRAST IOMUX_PAD(0x310, 0x118, 0x10, 0, 0, NO_PAD_CTRL) |
268 | #define MX25_PAD_CONTRAST__FEC_CRS IOMUX_PAD(0x310, 0x118, 0x15, 0x508, 1, NO_PAD_CTL) | 268 | #define MX25_PAD_CONTRAST__FEC_CRS IOMUX_PAD(0x310, 0x118, 0x15, 0x508, 1, NO_PAD_CTRL) |
269 | 269 | ||
270 | #define MX25_PAD_PWM__PWM IOMUX_PAD(0x314, 0x11c, 0x10, 0, 0, NO_PAD_CTRL) | 270 | #define MX25_PAD_PWM__PWM IOMUX_PAD(0x314, 0x11c, 0x10, 0, 0, NO_PAD_CTRL) |
271 | #define MX25_PAD_PWM__GPIO_1_26 IOMUX_PAD(0x314, 0x11c, 0x15, 0, 0, NO_PAD_CTRL) | 271 | #define MX25_PAD_PWM__GPIO_1_26 IOMUX_PAD(0x314, 0x11c, 0x15, 0, 0, NO_PAD_CTRL) |
@@ -354,19 +354,19 @@ | |||
354 | #define MX25_PAD_UART2_TXD__GPIO_4_27 IOMUX_PAD(0x37c, 0x184, 0x15, 0, 0, NO_PAD_CTRL) | 354 | #define MX25_PAD_UART2_TXD__GPIO_4_27 IOMUX_PAD(0x37c, 0x184, 0x15, 0, 0, NO_PAD_CTRL) |
355 | 355 | ||
356 | #define MX25_PAD_UART2_RTS__UART2_RTS IOMUX_PAD(0x380, 0x188, 0x10, 0, 0, NO_PAD_CTRL) | 356 | #define MX25_PAD_UART2_RTS__UART2_RTS IOMUX_PAD(0x380, 0x188, 0x10, 0, 0, NO_PAD_CTRL) |
357 | #define MX25_PAD_UART2_RTS__FEC_COL IOMUX_PAD(0x380, 0x188, 0x12, 0x504, 2, NO_PAD_CTL) | 357 | #define MX25_PAD_UART2_RTS__FEC_COL IOMUX_PAD(0x380, 0x188, 0x12, 0x504, 2, NO_PAD_CTRL) |
358 | #define MX25_PAD_UART2_RTS__GPIO_4_28 IOMUX_PAD(0x380, 0x188, 0x15, 0, 0, NO_PAD_CTRL) | 358 | #define MX25_PAD_UART2_RTS__GPIO_4_28 IOMUX_PAD(0x380, 0x188, 0x15, 0, 0, NO_PAD_CTRL) |
359 | 359 | ||
360 | #define MX25_PAD_UART2_CTS__FEC_RX_ER IOMUX_PAD(0x384, 0x18c, 0x12, 0x518, 2, NO_PAD_CTL) | 360 | #define MX25_PAD_UART2_CTS__FEC_RX_ER IOMUX_PAD(0x384, 0x18c, 0x12, 0x518, 2, NO_PAD_CTRL) |
361 | #define MX25_PAD_UART2_CTS__UART2_CTS IOMUX_PAD(0x384, 0x18c, 0x10, 0, 0, NO_PAD_CTRL) | 361 | #define MX25_PAD_UART2_CTS__UART2_CTS IOMUX_PAD(0x384, 0x18c, 0x10, 0, 0, NO_PAD_CTRL) |
362 | #define MX25_PAD_UART2_CTS__GPIO_4_29 IOMUX_PAD(0x384, 0x18c, 0x15, 0, 0, NO_PAD_CTRL) | 362 | #define MX25_PAD_UART2_CTS__GPIO_4_29 IOMUX_PAD(0x384, 0x18c, 0x15, 0, 0, NO_PAD_CTRL) |
363 | 363 | ||
364 | #define MX25_PAD_SD1_CMD__SD1_CMD IOMUX_PAD(0x388, 0x190, 0x10, 0, 0, PAD_CTL_PUS_47K_UP) | 364 | #define MX25_PAD_SD1_CMD__SD1_CMD IOMUX_PAD(0x388, 0x190, 0x10, 0, 0, PAD_CTL_PUS_47K_UP) |
365 | #define MX25_PAD_SD1_CMD__FEC_RDATA2 IOMUX_PAD(0x388, 0x190, 0x12, 0x50c, 2, NO_PAD_CTL) | 365 | #define MX25_PAD_SD1_CMD__FEC_RDATA2 IOMUX_PAD(0x388, 0x190, 0x12, 0x50c, 2, NO_PAD_CTRL) |
366 | #define MX25_PAD_SD1_CMD__GPIO_2_23 IOMUX_PAD(0x388, 0x190, 0x15, 0, 0, NO_PAD_CTRL) | 366 | #define MX25_PAD_SD1_CMD__GPIO_2_23 IOMUX_PAD(0x388, 0x190, 0x15, 0, 0, NO_PAD_CTRL) |
367 | 367 | ||
368 | #define MX25_PAD_SD1_CLK__SD1_CLK IOMUX_PAD(0x38c, 0x194, 0x10, 0, 0, PAD_CTL_PUS_47K_UP) | 368 | #define MX25_PAD_SD1_CLK__SD1_CLK IOMUX_PAD(0x38c, 0x194, 0x10, 0, 0, PAD_CTL_PUS_47K_UP) |
369 | #define MX25_PAD_SD1_CLK__FEC_RDATA3 IOMUX_PAD(0x38c, 0x194, 0x12, 0x510, 2, NO_PAD_CTL) | 369 | #define MX25_PAD_SD1_CLK__FEC_RDATA3 IOMUX_PAD(0x38c, 0x194, 0x12, 0x510, 2, NO_PAD_CTRL) |
370 | #define MX25_PAD_SD1_CLK__GPIO_2_24 IOMUX_PAD(0x38c, 0x194, 0x15, 0, 0, NO_PAD_CTRL) | 370 | #define MX25_PAD_SD1_CLK__GPIO_2_24 IOMUX_PAD(0x38c, 0x194, 0x15, 0, 0, NO_PAD_CTRL) |
371 | 371 | ||
372 | #define MX25_PAD_SD1_DATA0__SD1_DATA0 IOMUX_PAD(0x390, 0x198, 0x10, 0, 0, PAD_CTL_PUS_47K_UP) | 372 | #define MX25_PAD_SD1_DATA0__SD1_DATA0 IOMUX_PAD(0x390, 0x198, 0x10, 0, 0, PAD_CTL_PUS_47K_UP) |
@@ -377,11 +377,11 @@ | |||
377 | #define MX25_PAD_SD1_DATA1__GPIO_2_26 IOMUX_PAD(0x394, 0x19c, 0x15, 0, 0, NO_PAD_CTRL) | 377 | #define MX25_PAD_SD1_DATA1__GPIO_2_26 IOMUX_PAD(0x394, 0x19c, 0x15, 0, 0, NO_PAD_CTRL) |
378 | 378 | ||
379 | #define MX25_PAD_SD1_DATA2__SD1_DATA2 IOMUX_PAD(0x398, 0x1a0, 0x10, 0, 0, PAD_CTL_PUS_47K_UP) | 379 | #define MX25_PAD_SD1_DATA2__SD1_DATA2 IOMUX_PAD(0x398, 0x1a0, 0x10, 0, 0, PAD_CTL_PUS_47K_UP) |
380 | #define MX25_PAD_SD1_DATA2__FEC_RX_CLK IOMUX_PAD(0x398, 0x1a0, 0x15, 0x514, 2, NO_PAD_CTL) | 380 | #define MX25_PAD_SD1_DATA2__FEC_RX_CLK IOMUX_PAD(0x398, 0x1a0, 0x15, 0x514, 2, NO_PAD_CTRL) |
381 | #define MX25_PAD_SD1_DATA2__GPIO_2_27 IOMUX_PAD(0x398, 0x1a0, 0x15, 0, 0, NO_PAD_CTRL) | 381 | #define MX25_PAD_SD1_DATA2__GPIO_2_27 IOMUX_PAD(0x398, 0x1a0, 0x15, 0, 0, NO_PAD_CTRL) |
382 | 382 | ||
383 | #define MX25_PAD_SD1_DATA3__SD1_DATA3 IOMUX_PAD(0x39c, 0x1a4, 0x10, 0, 0, PAD_CTL_PUS_47K_UP) | 383 | #define MX25_PAD_SD1_DATA3__SD1_DATA3 IOMUX_PAD(0x39c, 0x1a4, 0x10, 0, 0, PAD_CTL_PUS_47K_UP) |
384 | #define MX25_PAD_SD1_DATA3__FEC_CRS IOMUX_PAD(0x39c, 0x1a4, 0x10, 0x508, 2, NO_PAD_CTL) | 384 | #define MX25_PAD_SD1_DATA3__FEC_CRS IOMUX_PAD(0x39c, 0x1a4, 0x10, 0x508, 2, NO_PAD_CTRL) |
385 | #define MX25_PAD_SD1_DATA3__GPIO_2_28 IOMUX_PAD(0x39c, 0x1a4, 0x15, 0, 0, NO_PAD_CTRL) | 385 | #define MX25_PAD_SD1_DATA3__GPIO_2_28 IOMUX_PAD(0x39c, 0x1a4, 0x15, 0, 0, NO_PAD_CTRL) |
386 | 386 | ||
387 | #define MX25_PAD_KPP_ROW0__KPP_ROW0 IOMUX_PAD(0x3a0, 0x1a8, 0x10, 0, 0, PAD_CTL_PKE) | 387 | #define MX25_PAD_KPP_ROW0__KPP_ROW0 IOMUX_PAD(0x3a0, 0x1a8, 0x10, 0, 0, PAD_CTL_PKE) |
@@ -410,7 +410,7 @@ | |||
410 | #define MX25_PAD_KPP_COL3__KPP_COL3 IOMUX_PAD(0x3bc, 0x1c4, 0x10, 0, 0, PAD_CTL_PKE | PAD_CTL_ODE) | 410 | #define MX25_PAD_KPP_COL3__KPP_COL3 IOMUX_PAD(0x3bc, 0x1c4, 0x10, 0, 0, PAD_CTL_PKE | PAD_CTL_ODE) |
411 | #define MX25_PAD_KPP_COL3__GPIO_3_4 IOMUX_PAD(0x3bc, 0x1c4, 0x15, 0, 0, NO_PAD_CTRL) | 411 | #define MX25_PAD_KPP_COL3__GPIO_3_4 IOMUX_PAD(0x3bc, 0x1c4, 0x15, 0, 0, NO_PAD_CTRL) |
412 | 412 | ||
413 | #define MX25_PAD_FEC_MDC__FEC_MDC IOMUX_PAD(0x3c0, 0x1c8, 0x10, 0, 0, NO_PAD_CTL) | 413 | #define MX25_PAD_FEC_MDC__FEC_MDC IOMUX_PAD(0x3c0, 0x1c8, 0x10, 0, 0, NO_PAD_CTRL) |
414 | #define MX25_PAD_FEC_MDC__AUD4_TXD IOMUX_PAD(0x3c0, 0x1c8, 0x12, 0x464, 1, NO_PAD_CTRL) | 414 | #define MX25_PAD_FEC_MDC__AUD4_TXD IOMUX_PAD(0x3c0, 0x1c8, 0x12, 0x464, 1, NO_PAD_CTRL) |
415 | #define MX25_PAD_FEC_MDC__GPIO_3_5 IOMUX_PAD(0x3c0, 0x1c8, 0x15, 0, 0, NO_PAD_CTRL) | 415 | #define MX25_PAD_FEC_MDC__GPIO_3_5 IOMUX_PAD(0x3c0, 0x1c8, 0x15, 0, 0, NO_PAD_CTRL) |
416 | 416 | ||
@@ -418,23 +418,23 @@ | |||
418 | #define MX25_PAD_FEC_MDIO__AUD4_RXD IOMUX_PAD(0x3c4, 0x1cc, 0x12, 0x460, 1, NO_PAD_CTRL) | 418 | #define MX25_PAD_FEC_MDIO__AUD4_RXD IOMUX_PAD(0x3c4, 0x1cc, 0x12, 0x460, 1, NO_PAD_CTRL) |
419 | #define MX25_PAD_FEC_MDIO__GPIO_3_6 IOMUX_PAD(0x3c4, 0x1cc, 0x15, 0, 0, NO_PAD_CTRL) | 419 | #define MX25_PAD_FEC_MDIO__GPIO_3_6 IOMUX_PAD(0x3c4, 0x1cc, 0x15, 0, 0, NO_PAD_CTRL) |
420 | 420 | ||
421 | #define MX25_PAD_FEC_TDATA0__FEC_TDATA0 IOMUX_PAD(0x3c8, 0x1d0, 0x10, 0, 0, NO_PAD_CTL) | 421 | #define MX25_PAD_FEC_TDATA0__FEC_TDATA0 IOMUX_PAD(0x3c8, 0x1d0, 0x10, 0, 0, NO_PAD_CTRL) |
422 | #define MX25_PAD_FEC_TDATA0__GPIO_3_7 IOMUX_PAD(0x3c8, 0x1d0, 0x15, 0, 0, NO_PAD_CTRL) | 422 | #define MX25_PAD_FEC_TDATA0__GPIO_3_7 IOMUX_PAD(0x3c8, 0x1d0, 0x15, 0, 0, NO_PAD_CTRL) |
423 | 423 | ||
424 | #define MX25_PAD_FEC_TDATA1__FEC_TDATA1 IOMUX_PAD(0x3cc, 0x1d4, 0x10, 0, 0, NO_PAD_CTL) | 424 | #define MX25_PAD_FEC_TDATA1__FEC_TDATA1 IOMUX_PAD(0x3cc, 0x1d4, 0x10, 0, 0, NO_PAD_CTRL) |
425 | #define MX25_PAD_FEC_TDATA1__AUD4_TXFS IOMUX_PAD(0x3cc, 0x1d4, 0x12, 0x474, 1, NO_PAD_CTRL) | 425 | #define MX25_PAD_FEC_TDATA1__AUD4_TXFS IOMUX_PAD(0x3cc, 0x1d4, 0x12, 0x474, 1, NO_PAD_CTRL) |
426 | #define MX25_PAD_FEC_TDATA1__GPIO_3_8 IOMUX_PAD(0x3cc, 0x1d4, 0x15, 0, 0, NO_PAD_CTRL) | 426 | #define MX25_PAD_FEC_TDATA1__GPIO_3_8 IOMUX_PAD(0x3cc, 0x1d4, 0x15, 0, 0, NO_PAD_CTRL) |
427 | 427 | ||
428 | #define MX25_PAD_FEC_TX_EN__FEC_TX_EN IOMUX_PAD(0x3d0, 0x1d8, 0x10, 0, 0, NO_PAD_CTL) | 428 | #define MX25_PAD_FEC_TX_EN__FEC_TX_EN IOMUX_PAD(0x3d0, 0x1d8, 0x10, 0, 0, NO_PAD_CTRL) |
429 | #define MX25_PAD_FEC_TX_EN__GPIO_3_9 IOMUX_PAD(0x3d0, 0x1d8, 0x15, 0, 0, NO_PAD_CTRL) | 429 | #define MX25_PAD_FEC_TX_EN__GPIO_3_9 IOMUX_PAD(0x3d0, 0x1d8, 0x15, 0, 0, NO_PAD_CTRL) |
430 | 430 | ||
431 | #define MX25_PAD_FEC_RDATA0__FEC_RDATA0 IOMUX_PAD(0x3d4, 0x1dc, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTL) | 431 | #define MX25_PAD_FEC_RDATA0__FEC_RDATA0 IOMUX_PAD(0x3d4, 0x1dc, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL) |
432 | #define MX25_PAD_FEC_RDATA0__GPIO_3_10 IOMUX_PAD(0x3d4, 0x1dc, 0x15, 0, 0, NO_PAD_CTRL) | 432 | #define MX25_PAD_FEC_RDATA0__GPIO_3_10 IOMUX_PAD(0x3d4, 0x1dc, 0x15, 0, 0, NO_PAD_CTRL) |
433 | 433 | ||
434 | #define MX25_PAD_FEC_RDATA1__FEC_RDATA1 IOMUX_PAD(0x3d8, 0x1e0, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTL) | 434 | #define MX25_PAD_FEC_RDATA1__FEC_RDATA1 IOMUX_PAD(0x3d8, 0x1e0, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL) |
435 | #define MX25_PAD_FEC_RDATA1__GPIO_3_11 IOMUX_PAD(0x3d8, 0x1e0, 0x15, 0, 0, NO_PAD_CTRL) | 435 | #define MX25_PAD_FEC_RDATA1__GPIO_3_11 IOMUX_PAD(0x3d8, 0x1e0, 0x15, 0, 0, NO_PAD_CTRL) |
436 | 436 | ||
437 | #define MX25_PAD_FEC_RX_DV__FEC_RX_DV IOMUX_PAD(0x3dc, 0x1e4, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTL) | 437 | #define MX25_PAD_FEC_RX_DV__FEC_RX_DV IOMUX_PAD(0x3dc, 0x1e4, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL) |
438 | #define MX25_PAD_FEC_RX_DV__CAN2_RX IOMUX_PAD(0x3dc, 0x1e4, 0x14, 0x484, 0, PAD_CTL_PUS_22K_UP) | 438 | #define MX25_PAD_FEC_RX_DV__CAN2_RX IOMUX_PAD(0x3dc, 0x1e4, 0x14, 0x484, 0, PAD_CTL_PUS_22K_UP) |
439 | #define MX25_PAD_FEC_RX_DV__GPIO_3_12 IOMUX_PAD(0x3dc, 0x1e4, 0x15, 0, 0, NO_PAD_CTRL) | 439 | #define MX25_PAD_FEC_RX_DV__GPIO_3_12 IOMUX_PAD(0x3dc, 0x1e4, 0x15, 0, 0, NO_PAD_CTRL) |
440 | 440 | ||
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h index 91e738144804..854e2dc58481 100644 --- a/arch/arm/plat-mxc/include/mach/mx25.h +++ b/arch/arm/plat-mxc/include/mach/mx25.h | |||
@@ -41,4 +41,8 @@ | |||
41 | #define UART1_BASE_ADDR 0x43f90000 | 41 | #define UART1_BASE_ADDR 0x43f90000 |
42 | #define UART2_BASE_ADDR 0x43f94000 | 42 | #define UART2_BASE_ADDR 0x43f94000 |
43 | 43 | ||
44 | #define MX25_FEC_BASE_ADDR 0x50038000 | ||
45 | |||
46 | #define MX25_INT_FEC 57 | ||
47 | |||
44 | #endif /* __MACH_MX25_H__ */ | 48 | #endif /* __MACH_MX25_H__ */ |
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c index 89cafc937249..d9f8c844c385 100644 --- a/arch/arm/plat-omap/clock.c +++ b/arch/arm/plat-omap/clock.c | |||
@@ -36,10 +36,6 @@ static struct clk_functions *arch_clock; | |||
36 | * Standard clock functions defined in include/linux/clk.h | 36 | * Standard clock functions defined in include/linux/clk.h |
37 | *-------------------------------------------------------------------------*/ | 37 | *-------------------------------------------------------------------------*/ |
38 | 38 | ||
39 | /* This functions is moved to arch/arm/common/clkdev.c. For OMAP4 since | ||
40 | * clock framework is not up , it is defined here to avoid rework in | ||
41 | * every driver. Also dummy prcm reset function is added */ | ||
42 | |||
43 | int clk_enable(struct clk *clk) | 39 | int clk_enable(struct clk *clk) |
44 | { | 40 | { |
45 | unsigned long flags; | 41 | unsigned long flags; |
@@ -305,7 +301,6 @@ void clk_enable_init_clocks(void) | |||
305 | clk_enable(clkp); | 301 | clk_enable(clkp); |
306 | } | 302 | } |
307 | } | 303 | } |
308 | EXPORT_SYMBOL(clk_enable_init_clocks); | ||
309 | 304 | ||
310 | /* | 305 | /* |
311 | * Low level helpers | 306 | * Low level helpers |
@@ -334,7 +329,16 @@ void clk_init_cpufreq_table(struct cpufreq_frequency_table **table) | |||
334 | arch_clock->clk_init_cpufreq_table(table); | 329 | arch_clock->clk_init_cpufreq_table(table); |
335 | spin_unlock_irqrestore(&clockfw_lock, flags); | 330 | spin_unlock_irqrestore(&clockfw_lock, flags); |
336 | } | 331 | } |
337 | EXPORT_SYMBOL(clk_init_cpufreq_table); | 332 | |
333 | void clk_exit_cpufreq_table(struct cpufreq_frequency_table **table) | ||
334 | { | ||
335 | unsigned long flags; | ||
336 | |||
337 | spin_lock_irqsave(&clockfw_lock, flags); | ||
338 | if (arch_clock->clk_exit_cpufreq_table) | ||
339 | arch_clock->clk_exit_cpufreq_table(table); | ||
340 | spin_unlock_irqrestore(&clockfw_lock, flags); | ||
341 | } | ||
338 | #endif | 342 | #endif |
339 | 343 | ||
340 | /*-------------------------------------------------------------------------*/ | 344 | /*-------------------------------------------------------------------------*/ |
diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c index f8ddbdd8b076..6d3d33360056 100644 --- a/arch/arm/plat-omap/cpu-omap.c +++ b/arch/arm/plat-omap/cpu-omap.c | |||
@@ -134,6 +134,7 @@ static int __init omap_cpu_init(struct cpufreq_policy *policy) | |||
134 | 134 | ||
135 | static int omap_cpu_exit(struct cpufreq_policy *policy) | 135 | static int omap_cpu_exit(struct cpufreq_policy *policy) |
136 | { | 136 | { |
137 | clk_exit_cpufreq_table(&freq_table); | ||
137 | clk_put(mpu_clk); | 138 | clk_put(mpu_clk); |
138 | return 0; | 139 | return 0; |
139 | } | 140 | } |
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 04846811d0aa..d17620c50c28 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
@@ -192,6 +192,7 @@ struct gpio_bank { | |||
192 | u32 saved_risingdetect; | 192 | u32 saved_risingdetect; |
193 | #endif | 193 | #endif |
194 | u32 level_mask; | 194 | u32 level_mask; |
195 | u32 toggle_mask; | ||
195 | spinlock_t lock; | 196 | spinlock_t lock; |
196 | struct gpio_chip chip; | 197 | struct gpio_chip chip; |
197 | struct clk *dbck; | 198 | struct clk *dbck; |
@@ -749,6 +750,44 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, | |||
749 | } | 750 | } |
750 | #endif | 751 | #endif |
751 | 752 | ||
753 | /* | ||
754 | * This only applies to chips that can't do both rising and falling edge | ||
755 | * detection at once. For all other chips, this function is a noop. | ||
756 | */ | ||
757 | static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) | ||
758 | { | ||
759 | void __iomem *reg = bank->base; | ||
760 | u32 l = 0; | ||
761 | |||
762 | switch (bank->method) { | ||
763 | #ifdef CONFIG_ARCH_OMAP1 | ||
764 | case METHOD_MPUIO: | ||
765 | reg += OMAP_MPUIO_GPIO_INT_EDGE; | ||
766 | break; | ||
767 | #endif | ||
768 | #ifdef CONFIG_ARCH_OMAP15XX | ||
769 | case METHOD_GPIO_1510: | ||
770 | reg += OMAP1510_GPIO_INT_CONTROL; | ||
771 | break; | ||
772 | #endif | ||
773 | #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) | ||
774 | case METHOD_GPIO_7XX: | ||
775 | reg += OMAP7XX_GPIO_INT_CONTROL; | ||
776 | break; | ||
777 | #endif | ||
778 | default: | ||
779 | return; | ||
780 | } | ||
781 | |||
782 | l = __raw_readl(reg); | ||
783 | if ((l >> gpio) & 1) | ||
784 | l &= ~(1 << gpio); | ||
785 | else | ||
786 | l |= 1 << gpio; | ||
787 | |||
788 | __raw_writel(l, reg); | ||
789 | } | ||
790 | |||
752 | static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | 791 | static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) |
753 | { | 792 | { |
754 | void __iomem *reg = bank->base; | 793 | void __iomem *reg = bank->base; |
@@ -759,6 +798,8 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | |||
759 | case METHOD_MPUIO: | 798 | case METHOD_MPUIO: |
760 | reg += OMAP_MPUIO_GPIO_INT_EDGE; | 799 | reg += OMAP_MPUIO_GPIO_INT_EDGE; |
761 | l = __raw_readl(reg); | 800 | l = __raw_readl(reg); |
801 | if (trigger & IRQ_TYPE_EDGE_BOTH) | ||
802 | bank->toggle_mask |= 1 << gpio; | ||
762 | if (trigger & IRQ_TYPE_EDGE_RISING) | 803 | if (trigger & IRQ_TYPE_EDGE_RISING) |
763 | l |= 1 << gpio; | 804 | l |= 1 << gpio; |
764 | else if (trigger & IRQ_TYPE_EDGE_FALLING) | 805 | else if (trigger & IRQ_TYPE_EDGE_FALLING) |
@@ -771,6 +812,8 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | |||
771 | case METHOD_GPIO_1510: | 812 | case METHOD_GPIO_1510: |
772 | reg += OMAP1510_GPIO_INT_CONTROL; | 813 | reg += OMAP1510_GPIO_INT_CONTROL; |
773 | l = __raw_readl(reg); | 814 | l = __raw_readl(reg); |
815 | if (trigger & IRQ_TYPE_EDGE_BOTH) | ||
816 | bank->toggle_mask |= 1 << gpio; | ||
774 | if (trigger & IRQ_TYPE_EDGE_RISING) | 817 | if (trigger & IRQ_TYPE_EDGE_RISING) |
775 | l |= 1 << gpio; | 818 | l |= 1 << gpio; |
776 | else if (trigger & IRQ_TYPE_EDGE_FALLING) | 819 | else if (trigger & IRQ_TYPE_EDGE_FALLING) |
@@ -803,6 +846,8 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | |||
803 | case METHOD_GPIO_7XX: | 846 | case METHOD_GPIO_7XX: |
804 | reg += OMAP7XX_GPIO_INT_CONTROL; | 847 | reg += OMAP7XX_GPIO_INT_CONTROL; |
805 | l = __raw_readl(reg); | 848 | l = __raw_readl(reg); |
849 | if (trigger & IRQ_TYPE_EDGE_BOTH) | ||
850 | bank->toggle_mask |= 1 << gpio; | ||
806 | if (trigger & IRQ_TYPE_EDGE_RISING) | 851 | if (trigger & IRQ_TYPE_EDGE_RISING) |
807 | l |= 1 << gpio; | 852 | l |= 1 << gpio; |
808 | else if (trigger & IRQ_TYPE_EDGE_FALLING) | 853 | else if (trigger & IRQ_TYPE_EDGE_FALLING) |
@@ -1072,7 +1117,7 @@ static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int ena | |||
1072 | */ | 1117 | */ |
1073 | static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable) | 1118 | static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable) |
1074 | { | 1119 | { |
1075 | unsigned long flags; | 1120 | unsigned long uninitialized_var(flags); |
1076 | 1121 | ||
1077 | switch (bank->method) { | 1122 | switch (bank->method) { |
1078 | #ifdef CONFIG_ARCH_OMAP16XX | 1123 | #ifdef CONFIG_ARCH_OMAP16XX |
@@ -1217,7 +1262,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
1217 | { | 1262 | { |
1218 | void __iomem *isr_reg = NULL; | 1263 | void __iomem *isr_reg = NULL; |
1219 | u32 isr; | 1264 | u32 isr; |
1220 | unsigned int gpio_irq; | 1265 | unsigned int gpio_irq, gpio_index; |
1221 | struct gpio_bank *bank; | 1266 | struct gpio_bank *bank; |
1222 | u32 retrigger = 0; | 1267 | u32 retrigger = 0; |
1223 | int unmasked = 0; | 1268 | int unmasked = 0; |
@@ -1284,9 +1329,23 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
1284 | 1329 | ||
1285 | gpio_irq = bank->virtual_irq_start; | 1330 | gpio_irq = bank->virtual_irq_start; |
1286 | for (; isr != 0; isr >>= 1, gpio_irq++) { | 1331 | for (; isr != 0; isr >>= 1, gpio_irq++) { |
1332 | gpio_index = get_gpio_index(irq_to_gpio(gpio_irq)); | ||
1333 | |||
1287 | if (!(isr & 1)) | 1334 | if (!(isr & 1)) |
1288 | continue; | 1335 | continue; |
1289 | 1336 | ||
1337 | #ifdef CONFIG_ARCH_OMAP1 | ||
1338 | /* | ||
1339 | * Some chips can't respond to both rising and falling | ||
1340 | * at the same time. If this irq was requested with | ||
1341 | * both flags, we need to flip the ICR data for the IRQ | ||
1342 | * to respond to the IRQ for the opposite direction. | ||
1343 | * This will be indicated in the bank toggle_mask. | ||
1344 | */ | ||
1345 | if (bank->toggle_mask & (1 << gpio_index)) | ||
1346 | _toggle_gpio_edge_triggering(bank, gpio_index); | ||
1347 | #endif | ||
1348 | |||
1290 | generic_handle_irq(gpio_irq); | 1349 | generic_handle_irq(gpio_irq); |
1291 | } | 1350 | } |
1292 | } | 1351 | } |
diff --git a/arch/arm/plat-omap/include/plat/board.h b/arch/arm/plat-omap/include/plat/board.h index 376ce18216ff..5cd622039da0 100644 --- a/arch/arm/plat-omap/include/plat/board.h +++ b/arch/arm/plat-omap/include/plat/board.h | |||
@@ -99,7 +99,6 @@ struct fb_info; | |||
99 | struct omap_backlight_config { | 99 | struct omap_backlight_config { |
100 | int default_intensity; | 100 | int default_intensity; |
101 | int (*set_power)(struct device *dev, int state); | 101 | int (*set_power)(struct device *dev, int state); |
102 | int (*check_fb)(struct fb_info *fb); | ||
103 | }; | 102 | }; |
104 | 103 | ||
105 | struct omap_fbmem_config { | 104 | struct omap_fbmem_config { |
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h index 309b6d1dccdb..94fe2a0ce40a 100644 --- a/arch/arm/plat-omap/include/plat/clock.h +++ b/arch/arm/plat-omap/include/plat/clock.h | |||
@@ -119,6 +119,7 @@ struct clk_functions { | |||
119 | void (*clk_disable_unused)(struct clk *clk); | 119 | void (*clk_disable_unused)(struct clk *clk); |
120 | #ifdef CONFIG_CPU_FREQ | 120 | #ifdef CONFIG_CPU_FREQ |
121 | void (*clk_init_cpufreq_table)(struct cpufreq_frequency_table **); | 121 | void (*clk_init_cpufreq_table)(struct cpufreq_frequency_table **); |
122 | void (*clk_exit_cpufreq_table)(struct cpufreq_frequency_table **); | ||
122 | #endif | 123 | #endif |
123 | }; | 124 | }; |
124 | 125 | ||
@@ -135,6 +136,7 @@ extern unsigned long followparent_recalc(struct clk *clk); | |||
135 | extern void clk_enable_init_clocks(void); | 136 | extern void clk_enable_init_clocks(void); |
136 | #ifdef CONFIG_CPU_FREQ | 137 | #ifdef CONFIG_CPU_FREQ |
137 | extern void clk_init_cpufreq_table(struct cpufreq_frequency_table **table); | 138 | extern void clk_init_cpufreq_table(struct cpufreq_frequency_table **table); |
139 | extern void clk_exit_cpufreq_table(struct cpufreq_frequency_table **table); | ||
138 | #endif | 140 | #endif |
139 | 141 | ||
140 | extern const struct clkops clkops_null; | 142 | extern const struct clkops clkops_null; |
diff --git a/arch/arm/plat-omap/include/plat/control.h b/arch/arm/plat-omap/include/plat/control.h index 2ae884378638..a745d62fad0d 100644 --- a/arch/arm/plat-omap/include/plat/control.h +++ b/arch/arm/plat-omap/include/plat/control.h | |||
@@ -147,7 +147,7 @@ | |||
147 | #define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) | 147 | #define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) |
148 | #define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) | 148 | #define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) |
149 | #define OMAP343X_CONTROL_DEBOBS(i) (OMAP2_CONTROL_GENERAL + 0x01B0 \ | 149 | #define OMAP343X_CONTROL_DEBOBS(i) (OMAP2_CONTROL_GENERAL + 0x01B0 \ |
150 | + ((i) >> 1) * 4 + (!(i) & 1) * 2) | 150 | + ((i) >> 1) * 4 + (!((i) & 1)) * 2) |
151 | #define OMAP343X_CONTROL_PROG_IO0 (OMAP2_CONTROL_GENERAL + 0x01D4) | 151 | #define OMAP343X_CONTROL_PROG_IO0 (OMAP2_CONTROL_GENERAL + 0x01D4) |
152 | #define OMAP343X_CONTROL_PROG_IO1 (OMAP2_CONTROL_GENERAL + 0x01D8) | 152 | #define OMAP343X_CONTROL_PROG_IO1 (OMAP2_CONTROL_GENERAL + 0x01D8) |
153 | #define OMAP343X_CONTROL_DSS_DPLL_SPREADING (OMAP2_CONTROL_GENERAL + 0x01E0) | 153 | #define OMAP343X_CONTROL_DSS_DPLL_SPREADING (OMAP2_CONTROL_GENERAL + 0x01E0) |
diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h index 7e5319f907d1..a3e7b471bcba 100644 --- a/arch/arm/plat-omap/include/plat/io.h +++ b/arch/arm/plat-omap/include/plat/io.h | |||
@@ -122,16 +122,21 @@ | |||
122 | #define OMAP243X_SMS_VIRT (OMAP243X_SMS_PHYS + OMAP2_L3_IO_OFFSET) | 122 | #define OMAP243X_SMS_VIRT (OMAP243X_SMS_PHYS + OMAP2_L3_IO_OFFSET) |
123 | #define OMAP243X_SMS_SIZE SZ_1M | 123 | #define OMAP243X_SMS_SIZE SZ_1M |
124 | 124 | ||
125 | /* DSP */ | 125 | /* 2420 IVA */ |
126 | #define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */ | 126 | #define DSP_MEM_2420_PHYS OMAP2420_DSP_MEM_BASE |
127 | #define DSP_MEM_24XX_VIRT 0xe0000000 | 127 | /* 0x58000000 --> 0xfc100000 */ |
128 | #define DSP_MEM_24XX_SIZE 0x28000 | 128 | #define DSP_MEM_2420_VIRT 0xfc100000 |
129 | #define DSP_IPI_24XX_PHYS OMAP2420_DSP_IPI_BASE /* 0x59000000 */ | 129 | #define DSP_MEM_2420_SIZE 0x28000 |
130 | #define DSP_IPI_24XX_VIRT 0xe1000000 | 130 | #define DSP_IPI_2420_PHYS OMAP2420_DSP_IPI_BASE |
131 | #define DSP_IPI_24XX_SIZE SZ_4K | 131 | /* 0x59000000 --> 0xfc128000 */ |
132 | #define DSP_MMU_24XX_PHYS OMAP2420_DSP_MMU_BASE /* 0x5a000000 */ | 132 | #define DSP_IPI_2420_VIRT 0xfc128000 |
133 | #define DSP_MMU_24XX_VIRT 0xe2000000 | 133 | #define DSP_IPI_2420_SIZE SZ_4K |
134 | #define DSP_MMU_24XX_SIZE SZ_4K | 134 | #define DSP_MMU_2420_PHYS OMAP2420_DSP_MMU_BASE |
135 | /* 0x5a000000 --> 0xfc129000 */ | ||
136 | #define DSP_MMU_2420_VIRT 0xfc129000 | ||
137 | #define DSP_MMU_2420_SIZE SZ_4K | ||
138 | |||
139 | /* 2430 IVA2.1 - currently unmapped */ | ||
135 | 140 | ||
136 | /* | 141 | /* |
137 | * ---------------------------------------------------------------------------- | 142 | * ---------------------------------------------------------------------------- |
@@ -182,16 +187,7 @@ | |||
182 | #define OMAP343X_SDRC_VIRT (OMAP343X_SDRC_PHYS + OMAP2_L3_IO_OFFSET) | 187 | #define OMAP343X_SDRC_VIRT (OMAP343X_SDRC_PHYS + OMAP2_L3_IO_OFFSET) |
183 | #define OMAP343X_SDRC_SIZE SZ_1M | 188 | #define OMAP343X_SDRC_SIZE SZ_1M |
184 | 189 | ||
185 | /* DSP */ | 190 | /* 3430 IVA - currently unmapped */ |
186 | #define DSP_MEM_34XX_PHYS OMAP34XX_DSP_MEM_BASE /* 0x58000000 */ | ||
187 | #define DSP_MEM_34XX_VIRT 0xe0000000 | ||
188 | #define DSP_MEM_34XX_SIZE 0x28000 | ||
189 | #define DSP_IPI_34XX_PHYS OMAP34XX_DSP_IPI_BASE /* 0x59000000 */ | ||
190 | #define DSP_IPI_34XX_VIRT 0xe1000000 | ||
191 | #define DSP_IPI_34XX_SIZE SZ_4K | ||
192 | #define DSP_MMU_34XX_PHYS OMAP34XX_DSP_MMU_BASE /* 0x5a000000 */ | ||
193 | #define DSP_MMU_34XX_VIRT 0xe2000000 | ||
194 | #define DSP_MMU_34XX_SIZE SZ_4K | ||
195 | 191 | ||
196 | /* | 192 | /* |
197 | * ---------------------------------------------------------------------------- | 193 | * ---------------------------------------------------------------------------- |
diff --git a/arch/arm/plat-omap/include/plat/mux.h b/arch/arm/plat-omap/include/plat/mux.h index 8f069cc80350..692c90e89ac3 100644 --- a/arch/arm/plat-omap/include/plat/mux.h +++ b/arch/arm/plat-omap/include/plat/mux.h | |||
@@ -183,6 +183,14 @@ enum omap7xx_index { | |||
183 | /* I2C */ | 183 | /* I2C */ |
184 | I2C_7XX_SCL, | 184 | I2C_7XX_SCL, |
185 | I2C_7XX_SDA, | 185 | I2C_7XX_SDA, |
186 | |||
187 | /* SPI */ | ||
188 | SPI_7XX_1, | ||
189 | SPI_7XX_2, | ||
190 | SPI_7XX_3, | ||
191 | SPI_7XX_4, | ||
192 | SPI_7XX_5, | ||
193 | SPI_7XX_6, | ||
186 | }; | 194 | }; |
187 | 195 | ||
188 | enum omap1xxx_index { | 196 | enum omap1xxx_index { |
diff --git a/arch/arm/plat-omap/include/plat/omap7xx.h b/arch/arm/plat-omap/include/plat/omap7xx.h index 53f52414b0e9..48e4757e1e30 100644 --- a/arch/arm/plat-omap/include/plat/omap7xx.h +++ b/arch/arm/plat-omap/include/plat/omap7xx.h | |||
@@ -46,6 +46,9 @@ | |||
46 | #define OMAP7XX_DSPREG_SIZE SZ_128K | 46 | #define OMAP7XX_DSPREG_SIZE SZ_128K |
47 | #define OMAP7XX_DSPREG_START 0xE1000000 | 47 | #define OMAP7XX_DSPREG_START 0xE1000000 |
48 | 48 | ||
49 | #define OMAP7XX_SPI1_BASE 0xfffc0800 | ||
50 | #define OMAP7XX_SPI2_BASE 0xfffc1000 | ||
51 | |||
49 | /* | 52 | /* |
50 | * ---------------------------------------------------------------------------- | 53 | * ---------------------------------------------------------------------------- |
51 | * OMAP7XX specific configuration registers | 54 | * OMAP7XX specific configuration registers |
diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c index 11f5d7961c73..0cfd54f519c4 100644 --- a/arch/arm/plat-omap/io.c +++ b/arch/arm/plat-omap/io.c | |||
@@ -66,12 +66,12 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type) | |||
66 | return XLATE(p, L4_24XX_PHYS, L4_24XX_VIRT); | 66 | return XLATE(p, L4_24XX_PHYS, L4_24XX_VIRT); |
67 | } | 67 | } |
68 | if (cpu_is_omap2420()) { | 68 | if (cpu_is_omap2420()) { |
69 | if (BETWEEN(p, DSP_MEM_24XX_PHYS, DSP_MEM_24XX_SIZE)) | 69 | if (BETWEEN(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_SIZE)) |
70 | return XLATE(p, DSP_MEM_24XX_PHYS, DSP_MEM_24XX_VIRT); | 70 | return XLATE(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_VIRT); |
71 | if (BETWEEN(p, DSP_IPI_24XX_PHYS, DSP_IPI_24XX_SIZE)) | 71 | if (BETWEEN(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE)) |
72 | return XLATE(p, DSP_IPI_24XX_PHYS, DSP_IPI_24XX_SIZE); | 72 | return XLATE(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE); |
73 | if (BETWEEN(p, DSP_MMU_24XX_PHYS, DSP_MMU_24XX_SIZE)) | 73 | if (BETWEEN(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_SIZE)) |
74 | return XLATE(p, DSP_MMU_24XX_PHYS, DSP_MMU_24XX_VIRT); | 74 | return XLATE(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_VIRT); |
75 | } | 75 | } |
76 | if (cpu_is_omap2430()) { | 76 | if (cpu_is_omap2430()) { |
77 | if (BETWEEN(p, L4_WK_243X_PHYS, L4_WK_243X_SIZE)) | 77 | if (BETWEEN(p, L4_WK_243X_PHYS, L4_WK_243X_SIZE)) |
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c index c0ff1e39d893..463d6386aff2 100644 --- a/arch/arm/plat-omap/iommu.c +++ b/arch/arm/plat-omap/iommu.c | |||
@@ -827,7 +827,7 @@ EXPORT_SYMBOL_GPL(iommu_get); | |||
827 | **/ | 827 | **/ |
828 | void iommu_put(struct iommu *obj) | 828 | void iommu_put(struct iommu *obj) |
829 | { | 829 | { |
830 | if (!obj && IS_ERR(obj)) | 830 | if (!obj || IS_ERR(obj)) |
831 | return; | 831 | return; |
832 | 832 | ||
833 | mutex_lock(&obj->iommu_lock); | 833 | mutex_lock(&obj->iommu_lock); |
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 2cc1cc328bac..f75767278fc3 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c | |||
@@ -436,7 +436,7 @@ int omap_mcbsp_request(unsigned int id) | |||
436 | dev_err(mcbsp->dev, "Unable to request TX IRQ %d " | 436 | dev_err(mcbsp->dev, "Unable to request TX IRQ %d " |
437 | "for McBSP%d\n", mcbsp->tx_irq, | 437 | "for McBSP%d\n", mcbsp->tx_irq, |
438 | mcbsp->id); | 438 | mcbsp->id); |
439 | return err; | 439 | goto error; |
440 | } | 440 | } |
441 | 441 | ||
442 | init_completion(&mcbsp->rx_irq_completion); | 442 | init_completion(&mcbsp->rx_irq_completion); |
@@ -446,12 +446,26 @@ int omap_mcbsp_request(unsigned int id) | |||
446 | dev_err(mcbsp->dev, "Unable to request RX IRQ %d " | 446 | dev_err(mcbsp->dev, "Unable to request RX IRQ %d " |
447 | "for McBSP%d\n", mcbsp->rx_irq, | 447 | "for McBSP%d\n", mcbsp->rx_irq, |
448 | mcbsp->id); | 448 | mcbsp->id); |
449 | free_irq(mcbsp->tx_irq, (void *)mcbsp); | 449 | goto tx_irq; |
450 | return err; | ||
451 | } | 450 | } |
452 | } | 451 | } |
453 | 452 | ||
454 | return 0; | 453 | return 0; |
454 | tx_irq: | ||
455 | free_irq(mcbsp->tx_irq, (void *)mcbsp); | ||
456 | error: | ||
457 | if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free) | ||
458 | mcbsp->pdata->ops->free(id); | ||
459 | |||
460 | /* Do procedure specific to omap34xx arch, if applicable */ | ||
461 | omap34xx_mcbsp_free(mcbsp); | ||
462 | |||
463 | clk_disable(mcbsp->fclk); | ||
464 | clk_disable(mcbsp->iclk); | ||
465 | |||
466 | mcbsp->free = 1; | ||
467 | |||
468 | return err; | ||
455 | } | 469 | } |
456 | EXPORT_SYMBOL(omap_mcbsp_request); | 470 | EXPORT_SYMBOL(omap_mcbsp_request); |
457 | 471 | ||
diff --git a/arch/arm/plat-pxa/pwm.c b/arch/arm/plat-pxa/pwm.c index a9eabdcfa163..51dc5c8106c0 100644 --- a/arch/arm/plat-pxa/pwm.c +++ b/arch/arm/plat-pxa/pwm.c | |||
@@ -204,14 +204,14 @@ static int __devinit pwm_probe(struct platform_device *pdev) | |||
204 | goto err_free_clk; | 204 | goto err_free_clk; |
205 | } | 205 | } |
206 | 206 | ||
207 | r = request_mem_region(r->start, r->end - r->start + 1, pdev->name); | 207 | r = request_mem_region(r->start, resource_size(r), pdev->name); |
208 | if (r == NULL) { | 208 | if (r == NULL) { |
209 | dev_err(&pdev->dev, "failed to request memory resource\n"); | 209 | dev_err(&pdev->dev, "failed to request memory resource\n"); |
210 | ret = -EBUSY; | 210 | ret = -EBUSY; |
211 | goto err_free_clk; | 211 | goto err_free_clk; |
212 | } | 212 | } |
213 | 213 | ||
214 | pwm->mmio_base = ioremap(r->start, r->end - r->start + 1); | 214 | pwm->mmio_base = ioremap(r->start, resource_size(r)); |
215 | if (pwm->mmio_base == NULL) { | 215 | if (pwm->mmio_base == NULL) { |
216 | dev_err(&pdev->dev, "failed to ioremap() registers\n"); | 216 | dev_err(&pdev->dev, "failed to ioremap() registers\n"); |
217 | ret = -ENODEV; | 217 | ret = -ENODEV; |
@@ -241,7 +241,7 @@ static int __devinit pwm_probe(struct platform_device *pdev) | |||
241 | return 0; | 241 | return 0; |
242 | 242 | ||
243 | err_free_mem: | 243 | err_free_mem: |
244 | release_mem_region(r->start, r->end - r->start + 1); | 244 | release_mem_region(r->start, resource_size(r)); |
245 | err_free_clk: | 245 | err_free_clk: |
246 | clk_put(pwm->clk); | 246 | clk_put(pwm->clk); |
247 | err_free: | 247 | err_free: |
@@ -271,7 +271,7 @@ static int __devexit pwm_remove(struct platform_device *pdev) | |||
271 | iounmap(pwm->mmio_base); | 271 | iounmap(pwm->mmio_base); |
272 | 272 | ||
273 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 273 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
274 | release_mem_region(r->start, r->end - r->start + 1); | 274 | release_mem_region(r->start, resource_size(r)); |
275 | 275 | ||
276 | clk_put(pwm->clk); | 276 | clk_put(pwm->clk); |
277 | kfree(pwm); | 277 | kfree(pwm); |
diff --git a/arch/arm/plat-s3c/dev-nand.c b/arch/arm/plat-s3c/dev-nand.c index e771e77dcd54..84808ccda70e 100644 --- a/arch/arm/plat-s3c/dev-nand.c +++ b/arch/arm/plat-s3c/dev-nand.c | |||
@@ -114,7 +114,7 @@ void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand) | |||
114 | 114 | ||
115 | for (i = 0; i < npd->nr_sets; i++) { | 115 | for (i = 0; i < npd->nr_sets; i++) { |
116 | ret = s3c_nand_copy_set(to); | 116 | ret = s3c_nand_copy_set(to); |
117 | if (!ret) { | 117 | if (ret) { |
118 | printk(KERN_ERR "%s: failed to copy set %d\n", | 118 | printk(KERN_ERR "%s: failed to copy set %d\n", |
119 | __func__, i); | 119 | __func__, i); |
120 | return; | 120 | return; |
@@ -122,6 +122,8 @@ void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand) | |||
122 | to++; | 122 | to++; |
123 | } | 123 | } |
124 | } | 124 | } |
125 | |||
126 | s3c_device_nand.dev.platform_data = npd; | ||
125 | } | 127 | } |
126 | 128 | ||
127 | EXPORT_SYMBOL_GPL(s3c_nand_set_platdata); | 129 | EXPORT_SYMBOL_GPL(s3c_nand_set_platdata); |
diff --git a/arch/arm/plat-s3c/include/plat/devs.h b/arch/arm/plat-s3c/include/plat/devs.h index 932cbbbb4273..c1c20b023917 100644 --- a/arch/arm/plat-s3c/include/plat/devs.h +++ b/arch/arm/plat-s3c/include/plat/devs.h | |||
@@ -31,6 +31,7 @@ extern struct platform_device s3c64xx_device_iisv4; | |||
31 | extern struct platform_device s3c64xx_device_pcm0; | 31 | extern struct platform_device s3c64xx_device_pcm0; |
32 | extern struct platform_device s3c64xx_device_pcm1; | 32 | extern struct platform_device s3c64xx_device_pcm1; |
33 | 33 | ||
34 | extern struct platform_device s3c_device_ts; | ||
34 | extern struct platform_device s3c_device_fb; | 35 | extern struct platform_device s3c_device_fb; |
35 | extern struct platform_device s3c_device_usb; | 36 | extern struct platform_device s3c_device_usb; |
36 | extern struct platform_device s3c_device_lcd; | 37 | extern struct platform_device s3c_device_lcd; |
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c index f52a92ce8dda..7f686a31e672 100644 --- a/arch/arm/plat-s3c24xx/devs.c +++ b/arch/arm/plat-s3c24xx/devs.c | |||
@@ -37,6 +37,8 @@ | |||
37 | #include <plat/cpu.h> | 37 | #include <plat/cpu.h> |
38 | #include <plat/regs-spi.h> | 38 | #include <plat/regs-spi.h> |
39 | 39 | ||
40 | #include <mach/ts.h> | ||
41 | |||
40 | /* Serial port registrations */ | 42 | /* Serial port registrations */ |
41 | 43 | ||
42 | static struct resource s3c2410_uart0_resource[] = { | 44 | static struct resource s3c2410_uart0_resource[] = { |
@@ -182,6 +184,22 @@ void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd) | |||
182 | } | 184 | } |
183 | } | 185 | } |
184 | 186 | ||
187 | /* Touchscreen */ | ||
188 | struct platform_device s3c_device_ts = { | ||
189 | .name = "s3c2410-ts", | ||
190 | .id = -1, | ||
191 | }; | ||
192 | EXPORT_SYMBOL(s3c_device_ts); | ||
193 | |||
194 | static struct s3c2410_ts_mach_info s3c2410ts_info; | ||
195 | |||
196 | void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info) | ||
197 | { | ||
198 | memcpy(&s3c2410ts_info, hard_s3c2410ts_info, sizeof(struct s3c2410_ts_mach_info)); | ||
199 | s3c_device_ts.dev.platform_data = &s3c2410ts_info; | ||
200 | } | ||
201 | EXPORT_SYMBOL(s3c24xx_ts_set_platdata); | ||
202 | |||
185 | /* USB Device (Gadget)*/ | 203 | /* USB Device (Gadget)*/ |
186 | 204 | ||
187 | static struct resource s3c_usbgadget_resource[] = { | 205 | static struct resource s3c_usbgadget_resource[] = { |
diff --git a/arch/arm/plat-s3c24xx/s3c244x.c b/arch/arm/plat-s3c24xx/s3c244x.c index 1364317d421e..12623a474b54 100644 --- a/arch/arm/plat-s3c24xx/s3c244x.c +++ b/arch/arm/plat-s3c24xx/s3c244x.c | |||
@@ -70,6 +70,7 @@ void __init s3c244x_map_io(void) | |||
70 | s3c_device_sdi.name = "s3c2440-sdi"; | 70 | s3c_device_sdi.name = "s3c2440-sdi"; |
71 | s3c_device_i2c0.name = "s3c2440-i2c"; | 71 | s3c_device_i2c0.name = "s3c2440-i2c"; |
72 | s3c_device_nand.name = "s3c2440-nand"; | 72 | s3c_device_nand.name = "s3c2440-nand"; |
73 | s3c_device_ts.name = "s3c2440-ts"; | ||
73 | s3c_device_usbgadget.name = "s3c2440-usbgadget"; | 74 | s3c_device_usbgadget.name = "s3c2440-usbgadget"; |
74 | } | 75 | } |
75 | 76 | ||
diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/plat-s3c64xx/s3c6400-clock.c index 6ffa21eb1b91..ffd56deb9e81 100644 --- a/arch/arm/plat-s3c64xx/s3c6400-clock.c +++ b/arch/arm/plat-s3c64xx/s3c6400-clock.c | |||
@@ -46,6 +46,7 @@ static struct clk clk_ext_xtal_mux = { | |||
46 | #define clk_fin_epll clk_ext_xtal_mux | 46 | #define clk_fin_epll clk_ext_xtal_mux |
47 | 47 | ||
48 | #define clk_fout_mpll clk_mpll | 48 | #define clk_fout_mpll clk_mpll |
49 | #define clk_fout_epll clk_epll | ||
49 | 50 | ||
50 | struct clk_sources { | 51 | struct clk_sources { |
51 | unsigned int nr_sources; | 52 | unsigned int nr_sources; |
@@ -88,11 +89,6 @@ static struct clksrc_clk clk_mout_apll = { | |||
88 | .sources = &clk_src_apll, | 89 | .sources = &clk_src_apll, |
89 | }; | 90 | }; |
90 | 91 | ||
91 | static struct clk clk_fout_epll = { | ||
92 | .name = "fout_epll", | ||
93 | .id = -1, | ||
94 | }; | ||
95 | |||
96 | static struct clk *clk_src_epll_list[] = { | 92 | static struct clk *clk_src_epll_list[] = { |
97 | [0] = &clk_fin_epll, | 93 | [0] = &clk_fin_epll, |
98 | [1] = &clk_fout_epll, | 94 | [1] = &clk_fout_epll, |
@@ -715,7 +711,6 @@ static struct clk *clks[] __initdata = { | |||
715 | &clk_iis_cd1, | 711 | &clk_iis_cd1, |
716 | &clk_pcm_cd, | 712 | &clk_pcm_cd, |
717 | &clk_mout_epll.clk, | 713 | &clk_mout_epll.clk, |
718 | &clk_fout_epll, | ||
719 | &clk_mout_mpll.clk, | 714 | &clk_mout_mpll.clk, |
720 | &clk_dout_mpll, | 715 | &clk_dout_mpll, |
721 | &clk_mmc0.clk, | 716 | &clk_mmc0.clk, |
@@ -760,7 +755,4 @@ void __init s3c6400_register_clocks(unsigned armclk_divlimit) | |||
760 | clkp->name, ret); | 755 | clkp->name, ret); |
761 | } | 756 | } |
762 | } | 757 | } |
763 | |||
764 | clk_mpll.parent = &clk_mout_mpll.clk; | ||
765 | clk_epll.parent = &clk_mout_epll.clk; | ||
766 | } | 758 | } |
diff --git a/arch/blackfin/include/asm/page.h b/arch/blackfin/include/asm/page.h index 944a07c6cfd6..1d04e4078340 100644 --- a/arch/blackfin/include/asm/page.h +++ b/arch/blackfin/include/asm/page.h | |||
@@ -10,4 +10,9 @@ | |||
10 | #include <asm-generic/page.h> | 10 | #include <asm-generic/page.h> |
11 | #define MAP_NR(addr) (((unsigned long)(addr)-PAGE_OFFSET) >> PAGE_SHIFT) | 11 | #define MAP_NR(addr) (((unsigned long)(addr)-PAGE_OFFSET) >> PAGE_SHIFT) |
12 | 12 | ||
13 | #define VM_DATA_DEFAULT_FLAGS \ | ||
14 | (VM_READ | VM_WRITE | \ | ||
15 | ((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \ | ||
16 | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) | ||
17 | |||
13 | #endif | 18 | #endif |
diff --git a/arch/blackfin/kernel/kgdb.c b/arch/blackfin/kernel/kgdb.c index f1036b6b9293..34c7c3ed2c9c 100644 --- a/arch/blackfin/kernel/kgdb.c +++ b/arch/blackfin/kernel/kgdb.c | |||
@@ -6,23 +6,9 @@ | |||
6 | * Licensed under the GPL-2 or later. | 6 | * Licensed under the GPL-2 or later. |
7 | */ | 7 | */ |
8 | 8 | ||
9 | #include <linux/string.h> | ||
10 | #include <linux/kernel.h> | ||
11 | #include <linux/sched.h> | ||
12 | #include <linux/smp.h> | ||
13 | #include <linux/spinlock.h> | ||
14 | #include <linux/delay.h> | ||
15 | #include <linux/ptrace.h> /* for linux pt_regs struct */ | 9 | #include <linux/ptrace.h> /* for linux pt_regs struct */ |
16 | #include <linux/kgdb.h> | 10 | #include <linux/kgdb.h> |
17 | #include <linux/console.h> | ||
18 | #include <linux/init.h> | ||
19 | #include <linux/errno.h> | ||
20 | #include <linux/irq.h> | ||
21 | #include <linux/uaccess.h> | 11 | #include <linux/uaccess.h> |
22 | #include <asm/system.h> | ||
23 | #include <asm/traps.h> | ||
24 | #include <asm/blackfin.h> | ||
25 | #include <asm/dma.h> | ||
26 | 12 | ||
27 | void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs) | 13 | void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs) |
28 | { | 14 | { |
@@ -147,7 +133,7 @@ void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs) | |||
147 | regs->lb1 = gdb_regs[BFIN_LB1]; | 133 | regs->lb1 = gdb_regs[BFIN_LB1]; |
148 | regs->usp = gdb_regs[BFIN_USP]; | 134 | regs->usp = gdb_regs[BFIN_USP]; |
149 | regs->syscfg = gdb_regs[BFIN_SYSCFG]; | 135 | regs->syscfg = gdb_regs[BFIN_SYSCFG]; |
150 | regs->retx = gdb_regs[BFIN_PC]; | 136 | regs->retx = gdb_regs[BFIN_RETX]; |
151 | regs->retn = gdb_regs[BFIN_RETN]; | 137 | regs->retn = gdb_regs[BFIN_RETN]; |
152 | regs->rete = gdb_regs[BFIN_RETE]; | 138 | regs->rete = gdb_regs[BFIN_RETE]; |
153 | regs->pc = gdb_regs[BFIN_PC]; | 139 | regs->pc = gdb_regs[BFIN_PC]; |
@@ -424,182 +410,6 @@ struct kgdb_arch arch_kgdb_ops = { | |||
424 | .correct_hw_break = bfin_correct_hw_break, | 410 | .correct_hw_break = bfin_correct_hw_break, |
425 | }; | 411 | }; |
426 | 412 | ||
427 | static int hex(char ch) | ||
428 | { | ||
429 | if ((ch >= 'a') && (ch <= 'f')) | ||
430 | return ch - 'a' + 10; | ||
431 | if ((ch >= '0') && (ch <= '9')) | ||
432 | return ch - '0'; | ||
433 | if ((ch >= 'A') && (ch <= 'F')) | ||
434 | return ch - 'A' + 10; | ||
435 | return -1; | ||
436 | } | ||
437 | |||
438 | static int validate_memory_access_address(unsigned long addr, int size) | ||
439 | { | ||
440 | if (size < 0 || addr == 0) | ||
441 | return -EFAULT; | ||
442 | return bfin_mem_access_type(addr, size); | ||
443 | } | ||
444 | |||
445 | static int bfin_probe_kernel_read(char *dst, char *src, int size) | ||
446 | { | ||
447 | unsigned long lsrc = (unsigned long)src; | ||
448 | int mem_type; | ||
449 | |||
450 | mem_type = validate_memory_access_address(lsrc, size); | ||
451 | if (mem_type < 0) | ||
452 | return mem_type; | ||
453 | |||
454 | if (lsrc >= SYSMMR_BASE) { | ||
455 | if (size == 2 && lsrc % 2 == 0) { | ||
456 | u16 mmr = bfin_read16(src); | ||
457 | memcpy(dst, &mmr, sizeof(mmr)); | ||
458 | return 0; | ||
459 | } else if (size == 4 && lsrc % 4 == 0) { | ||
460 | u32 mmr = bfin_read32(src); | ||
461 | memcpy(dst, &mmr, sizeof(mmr)); | ||
462 | return 0; | ||
463 | } | ||
464 | } else { | ||
465 | switch (mem_type) { | ||
466 | case BFIN_MEM_ACCESS_CORE: | ||
467 | case BFIN_MEM_ACCESS_CORE_ONLY: | ||
468 | return probe_kernel_read(dst, src, size); | ||
469 | /* XXX: should support IDMA here with SMP */ | ||
470 | case BFIN_MEM_ACCESS_DMA: | ||
471 | if (dma_memcpy(dst, src, size)) | ||
472 | return 0; | ||
473 | break; | ||
474 | case BFIN_MEM_ACCESS_ITEST: | ||
475 | if (isram_memcpy(dst, src, size)) | ||
476 | return 0; | ||
477 | break; | ||
478 | } | ||
479 | } | ||
480 | |||
481 | return -EFAULT; | ||
482 | } | ||
483 | |||
484 | static int bfin_probe_kernel_write(char *dst, char *src, int size) | ||
485 | { | ||
486 | unsigned long ldst = (unsigned long)dst; | ||
487 | int mem_type; | ||
488 | |||
489 | mem_type = validate_memory_access_address(ldst, size); | ||
490 | if (mem_type < 0) | ||
491 | return mem_type; | ||
492 | |||
493 | if (ldst >= SYSMMR_BASE) { | ||
494 | if (size == 2 && ldst % 2 == 0) { | ||
495 | u16 mmr; | ||
496 | memcpy(&mmr, src, sizeof(mmr)); | ||
497 | bfin_write16(dst, mmr); | ||
498 | return 0; | ||
499 | } else if (size == 4 && ldst % 4 == 0) { | ||
500 | u32 mmr; | ||
501 | memcpy(&mmr, src, sizeof(mmr)); | ||
502 | bfin_write32(dst, mmr); | ||
503 | return 0; | ||
504 | } | ||
505 | } else { | ||
506 | switch (mem_type) { | ||
507 | case BFIN_MEM_ACCESS_CORE: | ||
508 | case BFIN_MEM_ACCESS_CORE_ONLY: | ||
509 | return probe_kernel_write(dst, src, size); | ||
510 | /* XXX: should support IDMA here with SMP */ | ||
511 | case BFIN_MEM_ACCESS_DMA: | ||
512 | if (dma_memcpy(dst, src, size)) | ||
513 | return 0; | ||
514 | break; | ||
515 | case BFIN_MEM_ACCESS_ITEST: | ||
516 | if (isram_memcpy(dst, src, size)) | ||
517 | return 0; | ||
518 | break; | ||
519 | } | ||
520 | } | ||
521 | |||
522 | return -EFAULT; | ||
523 | } | ||
524 | |||
525 | /* | ||
526 | * Convert the memory pointed to by mem into hex, placing result in buf. | ||
527 | * Return a pointer to the last char put in buf (null). May return an error. | ||
528 | */ | ||
529 | int kgdb_mem2hex(char *mem, char *buf, int count) | ||
530 | { | ||
531 | char *tmp; | ||
532 | int err; | ||
533 | |||
534 | /* | ||
535 | * We use the upper half of buf as an intermediate buffer for the | ||
536 | * raw memory copy. Hex conversion will work against this one. | ||
537 | */ | ||
538 | tmp = buf + count; | ||
539 | |||
540 | err = bfin_probe_kernel_read(tmp, mem, count); | ||
541 | if (!err) { | ||
542 | while (count > 0) { | ||
543 | buf = pack_hex_byte(buf, *tmp); | ||
544 | tmp++; | ||
545 | count--; | ||
546 | } | ||
547 | |||
548 | *buf = 0; | ||
549 | } | ||
550 | |||
551 | return err; | ||
552 | } | ||
553 | |||
554 | /* | ||
555 | * Copy the binary array pointed to by buf into mem. Fix $, #, and | ||
556 | * 0x7d escaped with 0x7d. Return a pointer to the character after | ||
557 | * the last byte written. | ||
558 | */ | ||
559 | int kgdb_ebin2mem(char *buf, char *mem, int count) | ||
560 | { | ||
561 | char *tmp_old, *tmp_new; | ||
562 | int size; | ||
563 | |||
564 | tmp_old = tmp_new = buf; | ||
565 | |||
566 | for (size = 0; size < count; ++size) { | ||
567 | if (*tmp_old == 0x7d) | ||
568 | *tmp_new = *(++tmp_old) ^ 0x20; | ||
569 | else | ||
570 | *tmp_new = *tmp_old; | ||
571 | tmp_new++; | ||
572 | tmp_old++; | ||
573 | } | ||
574 | |||
575 | return bfin_probe_kernel_write(mem, buf, count); | ||
576 | } | ||
577 | |||
578 | /* | ||
579 | * Convert the hex array pointed to by buf into binary to be placed in mem. | ||
580 | * Return a pointer to the character AFTER the last byte written. | ||
581 | * May return an error. | ||
582 | */ | ||
583 | int kgdb_hex2mem(char *buf, char *mem, int count) | ||
584 | { | ||
585 | char *tmp_raw, *tmp_hex; | ||
586 | |||
587 | /* | ||
588 | * We use the upper half of buf as an intermediate buffer for the | ||
589 | * raw memory that is converted from hex. | ||
590 | */ | ||
591 | tmp_raw = buf + count * 2; | ||
592 | |||
593 | tmp_hex = tmp_raw - 1; | ||
594 | while (tmp_hex >= buf) { | ||
595 | tmp_raw--; | ||
596 | *tmp_raw = hex(*tmp_hex--); | ||
597 | *tmp_raw |= hex(*tmp_hex--) << 4; | ||
598 | } | ||
599 | |||
600 | return bfin_probe_kernel_write(mem, tmp_raw, count); | ||
601 | } | ||
602 | |||
603 | #define IN_MEM(addr, size, l1_addr, l1_size) \ | 413 | #define IN_MEM(addr, size, l1_addr, l1_size) \ |
604 | ({ \ | 414 | ({ \ |
605 | unsigned long __addr = (unsigned long)(addr); \ | 415 | unsigned long __addr = (unsigned long)(addr); \ |
@@ -629,21 +439,6 @@ int kgdb_validate_break_address(unsigned long addr) | |||
629 | return -EFAULT; | 439 | return -EFAULT; |
630 | } | 440 | } |
631 | 441 | ||
632 | int kgdb_arch_set_breakpoint(unsigned long addr, char *saved_instr) | ||
633 | { | ||
634 | int err = bfin_probe_kernel_read(saved_instr, (char *)addr, | ||
635 | BREAK_INSTR_SIZE); | ||
636 | if (err) | ||
637 | return err; | ||
638 | return bfin_probe_kernel_write((char *)addr, arch_kgdb_ops.gdb_bpt_instr, | ||
639 | BREAK_INSTR_SIZE); | ||
640 | } | ||
641 | |||
642 | int kgdb_arch_remove_breakpoint(unsigned long addr, char *bundle) | ||
643 | { | ||
644 | return bfin_probe_kernel_write((char *)addr, bundle, BREAK_INSTR_SIZE); | ||
645 | } | ||
646 | |||
647 | int kgdb_arch_init(void) | 442 | int kgdb_arch_init(void) |
648 | { | 443 | { |
649 | kgdb_single_step = 0; | 444 | kgdb_single_step = 0; |
diff --git a/arch/blackfin/mm/Makefile b/arch/blackfin/mm/Makefile index d489f894f4b1..4c011b1f661f 100644 --- a/arch/blackfin/mm/Makefile +++ b/arch/blackfin/mm/Makefile | |||
@@ -2,4 +2,4 @@ | |||
2 | # arch/blackfin/mm/Makefile | 2 | # arch/blackfin/mm/Makefile |
3 | # | 3 | # |
4 | 4 | ||
5 | obj-y := sram-alloc.o isram-driver.o init.o | 5 | obj-y := sram-alloc.o isram-driver.o init.o maccess.o |
diff --git a/arch/blackfin/mm/maccess.c b/arch/blackfin/mm/maccess.c new file mode 100644 index 000000000000..b71cebc1f8a3 --- /dev/null +++ b/arch/blackfin/mm/maccess.c | |||
@@ -0,0 +1,97 @@ | |||
1 | /* | ||
2 | * safe read and write memory routines callable while atomic | ||
3 | * | ||
4 | * Copyright 2005-2008 Analog Devices Inc. | ||
5 | * | ||
6 | * Licensed under the GPL-2 or later. | ||
7 | */ | ||
8 | |||
9 | #include <linux/uaccess.h> | ||
10 | #include <asm/dma.h> | ||
11 | |||
12 | static int validate_memory_access_address(unsigned long addr, int size) | ||
13 | { | ||
14 | if (size < 0 || addr == 0) | ||
15 | return -EFAULT; | ||
16 | return bfin_mem_access_type(addr, size); | ||
17 | } | ||
18 | |||
19 | long probe_kernel_read(void *dst, void *src, size_t size) | ||
20 | { | ||
21 | unsigned long lsrc = (unsigned long)src; | ||
22 | int mem_type; | ||
23 | |||
24 | mem_type = validate_memory_access_address(lsrc, size); | ||
25 | if (mem_type < 0) | ||
26 | return mem_type; | ||
27 | |||
28 | if (lsrc >= SYSMMR_BASE) { | ||
29 | if (size == 2 && lsrc % 2 == 0) { | ||
30 | u16 mmr = bfin_read16(src); | ||
31 | memcpy(dst, &mmr, sizeof(mmr)); | ||
32 | return 0; | ||
33 | } else if (size == 4 && lsrc % 4 == 0) { | ||
34 | u32 mmr = bfin_read32(src); | ||
35 | memcpy(dst, &mmr, sizeof(mmr)); | ||
36 | return 0; | ||
37 | } | ||
38 | } else { | ||
39 | switch (mem_type) { | ||
40 | case BFIN_MEM_ACCESS_CORE: | ||
41 | case BFIN_MEM_ACCESS_CORE_ONLY: | ||
42 | return __probe_kernel_read(dst, src, size); | ||
43 | /* XXX: should support IDMA here with SMP */ | ||
44 | case BFIN_MEM_ACCESS_DMA: | ||
45 | if (dma_memcpy(dst, src, size)) | ||
46 | return 0; | ||
47 | break; | ||
48 | case BFIN_MEM_ACCESS_ITEST: | ||
49 | if (isram_memcpy(dst, src, size)) | ||
50 | return 0; | ||
51 | break; | ||
52 | } | ||
53 | } | ||
54 | |||
55 | return -EFAULT; | ||
56 | } | ||
57 | |||
58 | long probe_kernel_write(void *dst, void *src, size_t size) | ||
59 | { | ||
60 | unsigned long ldst = (unsigned long)dst; | ||
61 | int mem_type; | ||
62 | |||
63 | mem_type = validate_memory_access_address(ldst, size); | ||
64 | if (mem_type < 0) | ||
65 | return mem_type; | ||
66 | |||
67 | if (ldst >= SYSMMR_BASE) { | ||
68 | if (size == 2 && ldst % 2 == 0) { | ||
69 | u16 mmr; | ||
70 | memcpy(&mmr, src, sizeof(mmr)); | ||
71 | bfin_write16(dst, mmr); | ||
72 | return 0; | ||
73 | } else if (size == 4 && ldst % 4 == 0) { | ||
74 | u32 mmr; | ||
75 | memcpy(&mmr, src, sizeof(mmr)); | ||
76 | bfin_write32(dst, mmr); | ||
77 | return 0; | ||
78 | } | ||
79 | } else { | ||
80 | switch (mem_type) { | ||
81 | case BFIN_MEM_ACCESS_CORE: | ||
82 | case BFIN_MEM_ACCESS_CORE_ONLY: | ||
83 | return __probe_kernel_write(dst, src, size); | ||
84 | /* XXX: should support IDMA here with SMP */ | ||
85 | case BFIN_MEM_ACCESS_DMA: | ||
86 | if (dma_memcpy(dst, src, size)) | ||
87 | return 0; | ||
88 | break; | ||
89 | case BFIN_MEM_ACCESS_ITEST: | ||
90 | if (isram_memcpy(dst, src, size)) | ||
91 | return 0; | ||
92 | break; | ||
93 | } | ||
94 | } | ||
95 | |||
96 | return -EFAULT; | ||
97 | } | ||
diff --git a/arch/frv/include/asm/page.h b/arch/frv/include/asm/page.h index 25c6a5002355..8c97068ac8fc 100644 --- a/arch/frv/include/asm/page.h +++ b/arch/frv/include/asm/page.h | |||
@@ -63,12 +63,10 @@ extern unsigned long max_pfn; | |||
63 | #define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) | 63 | #define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) |
64 | 64 | ||
65 | 65 | ||
66 | #ifdef CONFIG_MMU | ||
67 | #define VM_DATA_DEFAULT_FLAGS \ | 66 | #define VM_DATA_DEFAULT_FLAGS \ |
68 | (VM_READ | VM_WRITE | \ | 67 | (VM_READ | VM_WRITE | \ |
69 | ((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \ | 68 | ((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \ |
70 | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) | 69 | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) |
71 | #endif | ||
72 | 70 | ||
73 | #endif /* __ASSEMBLY__ */ | 71 | #endif /* __ASSEMBLY__ */ |
74 | 72 | ||
diff --git a/arch/ia64/include/asm/ftrace.h b/arch/ia64/include/asm/ftrace.h index d20db3c2a656..fbd1a2470cae 100644 --- a/arch/ia64/include/asm/ftrace.h +++ b/arch/ia64/include/asm/ftrace.h | |||
@@ -8,7 +8,6 @@ | |||
8 | extern void _mcount(unsigned long pfs, unsigned long r1, unsigned long b0, unsigned long r0); | 8 | extern void _mcount(unsigned long pfs, unsigned long r1, unsigned long b0, unsigned long r0); |
9 | #define mcount _mcount | 9 | #define mcount _mcount |
10 | 10 | ||
11 | #include <asm/kprobes.h> | ||
12 | /* In IA64, MCOUNT_ADDR is set in link time, so it's not a constant at compile time */ | 11 | /* In IA64, MCOUNT_ADDR is set in link time, so it's not a constant at compile time */ |
13 | #define MCOUNT_ADDR (((struct fnptr *)mcount)->ip) | 12 | #define MCOUNT_ADDR (((struct fnptr *)mcount)->ip) |
14 | #define FTRACE_ADDR (((struct fnptr *)ftrace_caller)->ip) | 13 | #define FTRACE_ADDR (((struct fnptr *)ftrace_caller)->ip) |
diff --git a/arch/ia64/include/asm/kprobes.h b/arch/ia64/include/asm/kprobes.h index dbf83fb28db3..d5505d6f2382 100644 --- a/arch/ia64/include/asm/kprobes.h +++ b/arch/ia64/include/asm/kprobes.h | |||
@@ -103,11 +103,6 @@ typedef struct kprobe_opcode { | |||
103 | bundle_t bundle; | 103 | bundle_t bundle; |
104 | } kprobe_opcode_t; | 104 | } kprobe_opcode_t; |
105 | 105 | ||
106 | struct fnptr { | ||
107 | unsigned long ip; | ||
108 | unsigned long gp; | ||
109 | }; | ||
110 | |||
111 | /* Architecture specific copy of original instruction*/ | 106 | /* Architecture specific copy of original instruction*/ |
112 | struct arch_specific_insn { | 107 | struct arch_specific_insn { |
113 | /* copy of the instruction to be emulated */ | 108 | /* copy of the instruction to be emulated */ |
diff --git a/arch/ia64/include/asm/tlb.h b/arch/ia64/include/asm/tlb.h index 85d965cb19a0..23cce999eb1c 100644 --- a/arch/ia64/include/asm/tlb.h +++ b/arch/ia64/include/asm/tlb.h | |||
@@ -74,7 +74,7 @@ struct ia64_tr_entry { | |||
74 | extern int ia64_itr_entry(u64 target_mask, u64 va, u64 pte, u64 log_size); | 74 | extern int ia64_itr_entry(u64 target_mask, u64 va, u64 pte, u64 log_size); |
75 | extern void ia64_ptr_entry(u64 target_mask, int slot); | 75 | extern void ia64_ptr_entry(u64 target_mask, int slot); |
76 | 76 | ||
77 | extern struct ia64_tr_entry __per_cpu_idtrs[NR_CPUS][2][IA64_TR_ALLOC_MAX]; | 77 | extern struct ia64_tr_entry *ia64_idtrs[NR_CPUS]; |
78 | 78 | ||
79 | /* | 79 | /* |
80 | region register macros | 80 | region register macros |
diff --git a/arch/ia64/include/asm/topology.h b/arch/ia64/include/asm/topology.h index 3ddb4e709dba..d323071d0f91 100644 --- a/arch/ia64/include/asm/topology.h +++ b/arch/ia64/include/asm/topology.h | |||
@@ -33,7 +33,9 @@ | |||
33 | /* | 33 | /* |
34 | * Returns a bitmask of CPUs on Node 'node'. | 34 | * Returns a bitmask of CPUs on Node 'node'. |
35 | */ | 35 | */ |
36 | #define cpumask_of_node(node) (&node_to_cpu_mask[node]) | 36 | #define cpumask_of_node(node) ((node) == -1 ? \ |
37 | cpu_all_mask : \ | ||
38 | &node_to_cpu_mask[node]) | ||
37 | 39 | ||
38 | /* | 40 | /* |
39 | * Returns the number of the node containing Node 'nid'. | 41 | * Returns the number of the node containing Node 'nid'. |
diff --git a/arch/ia64/include/asm/types.h b/arch/ia64/include/asm/types.h index bcd260e597de..93773fd37be0 100644 --- a/arch/ia64/include/asm/types.h +++ b/arch/ia64/include/asm/types.h | |||
@@ -35,6 +35,11 @@ typedef unsigned int umode_t; | |||
35 | */ | 35 | */ |
36 | # ifdef __KERNEL__ | 36 | # ifdef __KERNEL__ |
37 | 37 | ||
38 | struct fnptr { | ||
39 | unsigned long ip; | ||
40 | unsigned long gp; | ||
41 | }; | ||
42 | |||
38 | /* DMA addresses are 64-bits wide, in general. */ | 43 | /* DMA addresses are 64-bits wide, in general. */ |
39 | typedef u64 dma_addr_t; | 44 | typedef u64 dma_addr_t; |
40 | 45 | ||
diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c index 32f2639e9b0a..378b4833024f 100644 --- a/arch/ia64/kernel/mca.c +++ b/arch/ia64/kernel/mca.c | |||
@@ -1225,9 +1225,12 @@ static void mca_insert_tr(u64 iord) | |||
1225 | unsigned long psr; | 1225 | unsigned long psr; |
1226 | int cpu = smp_processor_id(); | 1226 | int cpu = smp_processor_id(); |
1227 | 1227 | ||
1228 | if (!ia64_idtrs[cpu]) | ||
1229 | return; | ||
1230 | |||
1228 | psr = ia64_clear_ic(); | 1231 | psr = ia64_clear_ic(); |
1229 | for (i = IA64_TR_ALLOC_BASE; i < IA64_TR_ALLOC_MAX; i++) { | 1232 | for (i = IA64_TR_ALLOC_BASE; i < IA64_TR_ALLOC_MAX; i++) { |
1230 | p = &__per_cpu_idtrs[cpu][iord-1][i]; | 1233 | p = ia64_idtrs[cpu] + (iord - 1) * IA64_TR_ALLOC_MAX; |
1231 | if (p->pte & 0x1) { | 1234 | if (p->pte & 0x1) { |
1232 | old_rr = ia64_get_rr(p->ifa); | 1235 | old_rr = ia64_get_rr(p->ifa); |
1233 | if (old_rr != p->rr) { | 1236 | if (old_rr != p->rr) { |
diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c index 5246285a95fb..6bcbe215b9a4 100644 --- a/arch/ia64/kernel/perfmon.c +++ b/arch/ia64/kernel/perfmon.c | |||
@@ -2293,7 +2293,7 @@ pfm_smpl_buffer_alloc(struct task_struct *task, struct file *filp, pfm_context_t | |||
2293 | * if ((mm->total_vm << PAGE_SHIFT) + len> task->rlim[RLIMIT_AS].rlim_cur) | 2293 | * if ((mm->total_vm << PAGE_SHIFT) + len> task->rlim[RLIMIT_AS].rlim_cur) |
2294 | * return -ENOMEM; | 2294 | * return -ENOMEM; |
2295 | */ | 2295 | */ |
2296 | if (size > task->signal->rlim[RLIMIT_MEMLOCK].rlim_cur) | 2296 | if (size > task_rlimit(task, RLIMIT_MEMLOCK)) |
2297 | return -ENOMEM; | 2297 | return -ENOMEM; |
2298 | 2298 | ||
2299 | /* | 2299 | /* |
diff --git a/arch/ia64/kvm/vcpu.h b/arch/ia64/kvm/vcpu.h index 360724d3ae69..988911b4cc7a 100644 --- a/arch/ia64/kvm/vcpu.h +++ b/arch/ia64/kvm/vcpu.h | |||
@@ -388,6 +388,9 @@ static inline u64 __gpfn_is_io(u64 gpfn) | |||
388 | #define _vmm_raw_spin_lock(x) do {}while(0) | 388 | #define _vmm_raw_spin_lock(x) do {}while(0) |
389 | #define _vmm_raw_spin_unlock(x) do {}while(0) | 389 | #define _vmm_raw_spin_unlock(x) do {}while(0) |
390 | #else | 390 | #else |
391 | typedef struct { | ||
392 | volatile unsigned int lock; | ||
393 | } vmm_spinlock_t; | ||
391 | #define _vmm_raw_spin_lock(x) \ | 394 | #define _vmm_raw_spin_lock(x) \ |
392 | do { \ | 395 | do { \ |
393 | __u32 *ia64_spinlock_ptr = (__u32 *) (x); \ | 396 | __u32 *ia64_spinlock_ptr = (__u32 *) (x); \ |
@@ -405,12 +408,12 @@ static inline u64 __gpfn_is_io(u64 gpfn) | |||
405 | 408 | ||
406 | #define _vmm_raw_spin_unlock(x) \ | 409 | #define _vmm_raw_spin_unlock(x) \ |
407 | do { barrier(); \ | 410 | do { barrier(); \ |
408 | ((spinlock_t *)x)->raw_lock.lock = 0; } \ | 411 | ((vmm_spinlock_t *)x)->lock = 0; } \ |
409 | while (0) | 412 | while (0) |
410 | #endif | 413 | #endif |
411 | 414 | ||
412 | void vmm_spin_lock(spinlock_t *lock); | 415 | void vmm_spin_lock(vmm_spinlock_t *lock); |
413 | void vmm_spin_unlock(spinlock_t *lock); | 416 | void vmm_spin_unlock(vmm_spinlock_t *lock); |
414 | enum { | 417 | enum { |
415 | I_TLB = 1, | 418 | I_TLB = 1, |
416 | D_TLB = 2 | 419 | D_TLB = 2 |
diff --git a/arch/ia64/kvm/vmm.c b/arch/ia64/kvm/vmm.c index f4b4c899bb6c..7a62f75778c5 100644 --- a/arch/ia64/kvm/vmm.c +++ b/arch/ia64/kvm/vmm.c | |||
@@ -60,12 +60,12 @@ static void __exit kvm_vmm_exit(void) | |||
60 | return ; | 60 | return ; |
61 | } | 61 | } |
62 | 62 | ||
63 | void vmm_spin_lock(spinlock_t *lock) | 63 | void vmm_spin_lock(vmm_spinlock_t *lock) |
64 | { | 64 | { |
65 | _vmm_raw_spin_lock(lock); | 65 | _vmm_raw_spin_lock(lock); |
66 | } | 66 | } |
67 | 67 | ||
68 | void vmm_spin_unlock(spinlock_t *lock) | 68 | void vmm_spin_unlock(vmm_spinlock_t *lock) |
69 | { | 69 | { |
70 | _vmm_raw_spin_unlock(lock); | 70 | _vmm_raw_spin_unlock(lock); |
71 | } | 71 | } |
diff --git a/arch/ia64/kvm/vtlb.c b/arch/ia64/kvm/vtlb.c index 20b3852f7a6e..4332f7ee5203 100644 --- a/arch/ia64/kvm/vtlb.c +++ b/arch/ia64/kvm/vtlb.c | |||
@@ -182,7 +182,7 @@ void mark_pages_dirty(struct kvm_vcpu *v, u64 pte, u64 ps) | |||
182 | { | 182 | { |
183 | u64 i, dirty_pages = 1; | 183 | u64 i, dirty_pages = 1; |
184 | u64 base_gfn = (pte&_PAGE_PPN_MASK) >> PAGE_SHIFT; | 184 | u64 base_gfn = (pte&_PAGE_PPN_MASK) >> PAGE_SHIFT; |
185 | spinlock_t *lock = __kvm_va(v->arch.dirty_log_lock_pa); | 185 | vmm_spinlock_t *lock = __kvm_va(v->arch.dirty_log_lock_pa); |
186 | void *dirty_bitmap = (void *)KVM_MEM_DIRTY_LOG_BASE; | 186 | void *dirty_bitmap = (void *)KVM_MEM_DIRTY_LOG_BASE; |
187 | 187 | ||
188 | dirty_pages <<= ps <= PAGE_SHIFT ? 0 : ps - PAGE_SHIFT; | 188 | dirty_pages <<= ps <= PAGE_SHIFT ? 0 : ps - PAGE_SHIFT; |
diff --git a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c index b9609c69343a..7c0d4814a68d 100644 --- a/arch/ia64/mm/init.c +++ b/arch/ia64/mm/init.c | |||
@@ -91,7 +91,7 @@ dma_mark_clean(void *addr, size_t size) | |||
91 | inline void | 91 | inline void |
92 | ia64_set_rbs_bot (void) | 92 | ia64_set_rbs_bot (void) |
93 | { | 93 | { |
94 | unsigned long stack_size = current->signal->rlim[RLIMIT_STACK].rlim_max & -16; | 94 | unsigned long stack_size = rlimit_max(RLIMIT_STACK) & -16; |
95 | 95 | ||
96 | if (stack_size > MAX_USER_STACK_SIZE) | 96 | if (stack_size > MAX_USER_STACK_SIZE) |
97 | stack_size = MAX_USER_STACK_SIZE; | 97 | stack_size = MAX_USER_STACK_SIZE; |
diff --git a/arch/ia64/mm/tlb.c b/arch/ia64/mm/tlb.c index ee09d261f2e6..f3de9d7a98b4 100644 --- a/arch/ia64/mm/tlb.c +++ b/arch/ia64/mm/tlb.c | |||
@@ -48,7 +48,7 @@ DEFINE_PER_CPU(u8, ia64_need_tlb_flush); | |||
48 | DEFINE_PER_CPU(u8, ia64_tr_num); /*Number of TR slots in current processor*/ | 48 | DEFINE_PER_CPU(u8, ia64_tr_num); /*Number of TR slots in current processor*/ |
49 | DEFINE_PER_CPU(u8, ia64_tr_used); /*Max Slot number used by kernel*/ | 49 | DEFINE_PER_CPU(u8, ia64_tr_used); /*Max Slot number used by kernel*/ |
50 | 50 | ||
51 | struct ia64_tr_entry __per_cpu_idtrs[NR_CPUS][2][IA64_TR_ALLOC_MAX]; | 51 | struct ia64_tr_entry *ia64_idtrs[NR_CPUS]; |
52 | 52 | ||
53 | /* | 53 | /* |
54 | * Initializes the ia64_ctx.bitmap array based on max_ctx+1. | 54 | * Initializes the ia64_ctx.bitmap array based on max_ctx+1. |
@@ -429,10 +429,16 @@ int ia64_itr_entry(u64 target_mask, u64 va, u64 pte, u64 log_size) | |||
429 | struct ia64_tr_entry *p; | 429 | struct ia64_tr_entry *p; |
430 | int cpu = smp_processor_id(); | 430 | int cpu = smp_processor_id(); |
431 | 431 | ||
432 | if (!ia64_idtrs[cpu]) { | ||
433 | ia64_idtrs[cpu] = kmalloc(2 * IA64_TR_ALLOC_MAX * | ||
434 | sizeof (struct ia64_tr_entry), GFP_KERNEL); | ||
435 | if (!ia64_idtrs[cpu]) | ||
436 | return -ENOMEM; | ||
437 | } | ||
432 | r = -EINVAL; | 438 | r = -EINVAL; |
433 | /*Check overlap with existing TR entries*/ | 439 | /*Check overlap with existing TR entries*/ |
434 | if (target_mask & 0x1) { | 440 | if (target_mask & 0x1) { |
435 | p = &__per_cpu_idtrs[cpu][0][0]; | 441 | p = ia64_idtrs[cpu]; |
436 | for (i = IA64_TR_ALLOC_BASE; i <= per_cpu(ia64_tr_used, cpu); | 442 | for (i = IA64_TR_ALLOC_BASE; i <= per_cpu(ia64_tr_used, cpu); |
437 | i++, p++) { | 443 | i++, p++) { |
438 | if (p->pte & 0x1) | 444 | if (p->pte & 0x1) |
@@ -444,7 +450,7 @@ int ia64_itr_entry(u64 target_mask, u64 va, u64 pte, u64 log_size) | |||
444 | } | 450 | } |
445 | } | 451 | } |
446 | if (target_mask & 0x2) { | 452 | if (target_mask & 0x2) { |
447 | p = &__per_cpu_idtrs[cpu][1][0]; | 453 | p = ia64_idtrs[cpu] + IA64_TR_ALLOC_MAX; |
448 | for (i = IA64_TR_ALLOC_BASE; i <= per_cpu(ia64_tr_used, cpu); | 454 | for (i = IA64_TR_ALLOC_BASE; i <= per_cpu(ia64_tr_used, cpu); |
449 | i++, p++) { | 455 | i++, p++) { |
450 | if (p->pte & 0x1) | 456 | if (p->pte & 0x1) |
@@ -459,16 +465,16 @@ int ia64_itr_entry(u64 target_mask, u64 va, u64 pte, u64 log_size) | |||
459 | for (i = IA64_TR_ALLOC_BASE; i < per_cpu(ia64_tr_num, cpu); i++) { | 465 | for (i = IA64_TR_ALLOC_BASE; i < per_cpu(ia64_tr_num, cpu); i++) { |
460 | switch (target_mask & 0x3) { | 466 | switch (target_mask & 0x3) { |
461 | case 1: | 467 | case 1: |
462 | if (!(__per_cpu_idtrs[cpu][0][i].pte & 0x1)) | 468 | if (!((ia64_idtrs[cpu] + i)->pte & 0x1)) |
463 | goto found; | 469 | goto found; |
464 | continue; | 470 | continue; |
465 | case 2: | 471 | case 2: |
466 | if (!(__per_cpu_idtrs[cpu][1][i].pte & 0x1)) | 472 | if (!((ia64_idtrs[cpu] + IA64_TR_ALLOC_MAX + i)->pte & 0x1)) |
467 | goto found; | 473 | goto found; |
468 | continue; | 474 | continue; |
469 | case 3: | 475 | case 3: |
470 | if (!(__per_cpu_idtrs[cpu][0][i].pte & 0x1) && | 476 | if (!((ia64_idtrs[cpu] + i)->pte & 0x1) && |
471 | !(__per_cpu_idtrs[cpu][1][i].pte & 0x1)) | 477 | !((ia64_idtrs[cpu] + IA64_TR_ALLOC_MAX + i)->pte & 0x1)) |
472 | goto found; | 478 | goto found; |
473 | continue; | 479 | continue; |
474 | default: | 480 | default: |
@@ -488,7 +494,7 @@ found: | |||
488 | if (target_mask & 0x1) { | 494 | if (target_mask & 0x1) { |
489 | ia64_itr(0x1, i, va, pte, log_size); | 495 | ia64_itr(0x1, i, va, pte, log_size); |
490 | ia64_srlz_i(); | 496 | ia64_srlz_i(); |
491 | p = &__per_cpu_idtrs[cpu][0][i]; | 497 | p = ia64_idtrs[cpu] + i; |
492 | p->ifa = va; | 498 | p->ifa = va; |
493 | p->pte = pte; | 499 | p->pte = pte; |
494 | p->itir = log_size << 2; | 500 | p->itir = log_size << 2; |
@@ -497,7 +503,7 @@ found: | |||
497 | if (target_mask & 0x2) { | 503 | if (target_mask & 0x2) { |
498 | ia64_itr(0x2, i, va, pte, log_size); | 504 | ia64_itr(0x2, i, va, pte, log_size); |
499 | ia64_srlz_i(); | 505 | ia64_srlz_i(); |
500 | p = &__per_cpu_idtrs[cpu][1][i]; | 506 | p = ia64_idtrs[cpu] + IA64_TR_ALLOC_MAX + i; |
501 | p->ifa = va; | 507 | p->ifa = va; |
502 | p->pte = pte; | 508 | p->pte = pte; |
503 | p->itir = log_size << 2; | 509 | p->itir = log_size << 2; |
@@ -528,7 +534,7 @@ void ia64_ptr_entry(u64 target_mask, int slot) | |||
528 | return; | 534 | return; |
529 | 535 | ||
530 | if (target_mask & 0x1) { | 536 | if (target_mask & 0x1) { |
531 | p = &__per_cpu_idtrs[cpu][0][slot]; | 537 | p = ia64_idtrs[cpu] + slot; |
532 | if ((p->pte&0x1) && is_tr_overlap(p, p->ifa, p->itir>>2)) { | 538 | if ((p->pte&0x1) && is_tr_overlap(p, p->ifa, p->itir>>2)) { |
533 | p->pte = 0; | 539 | p->pte = 0; |
534 | ia64_ptr(0x1, p->ifa, p->itir>>2); | 540 | ia64_ptr(0x1, p->ifa, p->itir>>2); |
@@ -537,7 +543,7 @@ void ia64_ptr_entry(u64 target_mask, int slot) | |||
537 | } | 543 | } |
538 | 544 | ||
539 | if (target_mask & 0x2) { | 545 | if (target_mask & 0x2) { |
540 | p = &__per_cpu_idtrs[cpu][1][slot]; | 546 | p = ia64_idtrs[cpu] + IA64_TR_ALLOC_MAX + slot; |
541 | if ((p->pte & 0x1) && is_tr_overlap(p, p->ifa, p->itir>>2)) { | 547 | if ((p->pte & 0x1) && is_tr_overlap(p, p->ifa, p->itir>>2)) { |
542 | p->pte = 0; | 548 | p->pte = 0; |
543 | ia64_ptr(0x2, p->ifa, p->itir>>2); | 549 | ia64_ptr(0x2, p->ifa, p->itir>>2); |
@@ -546,8 +552,8 @@ void ia64_ptr_entry(u64 target_mask, int slot) | |||
546 | } | 552 | } |
547 | 553 | ||
548 | for (i = per_cpu(ia64_tr_used, cpu); i >= IA64_TR_ALLOC_BASE; i--) { | 554 | for (i = per_cpu(ia64_tr_used, cpu); i >= IA64_TR_ALLOC_BASE; i--) { |
549 | if ((__per_cpu_idtrs[cpu][0][i].pte & 0x1) || | 555 | if (((ia64_idtrs[cpu] + i)->pte & 0x1) || |
550 | (__per_cpu_idtrs[cpu][1][i].pte & 0x1)) | 556 | ((ia64_idtrs[cpu] + IA64_TR_ALLOC_MAX + i)->pte & 0x1)) |
551 | break; | 557 | break; |
552 | } | 558 | } |
553 | per_cpu(ia64_tr_used, cpu) = i; | 559 | per_cpu(ia64_tr_used, cpu) = i; |
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index 9e8d00389eef..1651942f7feb 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c | |||
@@ -424,7 +424,7 @@ void __init mem_init(void) | |||
424 | reservedpages << (PAGE_SHIFT-10), | 424 | reservedpages << (PAGE_SHIFT-10), |
425 | datasize >> 10, | 425 | datasize >> 10, |
426 | initsize >> 10, | 426 | initsize >> 10, |
427 | (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10))); | 427 | totalhigh_pages << (PAGE_SHIFT-10)); |
428 | } | 428 | } |
429 | #endif /* !CONFIG_NEED_MULTIPLE_NODES */ | 429 | #endif /* !CONFIG_NEED_MULTIPLE_NODES */ |
430 | 430 | ||
diff --git a/arch/mips/sgi-ip27/ip27-memory.c b/arch/mips/sgi-ip27/ip27-memory.c index f61c164d1e67..bc1297109cc5 100644 --- a/arch/mips/sgi-ip27/ip27-memory.c +++ b/arch/mips/sgi-ip27/ip27-memory.c | |||
@@ -505,5 +505,5 @@ void __init mem_init(void) | |||
505 | (num_physpages - tmp) << (PAGE_SHIFT-10), | 505 | (num_physpages - tmp) << (PAGE_SHIFT-10), |
506 | datasize >> 10, | 506 | datasize >> 10, |
507 | initsize >> 10, | 507 | initsize >> 10, |
508 | (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10))); | 508 | totalhigh_pages << (PAGE_SHIFT-10)); |
509 | } | 509 | } |
diff --git a/arch/mn10300/Makefile b/arch/mn10300/Makefile index dd0c8ff52a68..ac5c6bdb2f05 100644 --- a/arch/mn10300/Makefile +++ b/arch/mn10300/Makefile | |||
@@ -19,7 +19,7 @@ CCDIR := $(strip $(patsubst %/specs,%,$(CCSPECS))) | |||
19 | KBUILD_CPPFLAGS += -nostdinc -I$(CCDIR)/include | 19 | KBUILD_CPPFLAGS += -nostdinc -I$(CCDIR)/include |
20 | 20 | ||
21 | LDFLAGS := | 21 | LDFLAGS := |
22 | OBJCOPYFLAGS := -O binary -R .note -R .comment -S | 22 | OBJCOPYFLAGS := -O binary -R .note -R .comment -R .GCC-command-line -R .note.gnu.build-id -S |
23 | #LDFLAGS_vmlinux := -Map linkmap.txt | 23 | #LDFLAGS_vmlinux := -Map linkmap.txt |
24 | CHECKFLAGS += | 24 | CHECKFLAGS += |
25 | 25 | ||
diff --git a/arch/mn10300/configs/asb2303_defconfig b/arch/mn10300/configs/asb2303_defconfig index 3acce23708b0..441920d8ff58 100644 --- a/arch/mn10300/configs/asb2303_defconfig +++ b/arch/mn10300/configs/asb2303_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.30-rc2 | 3 | # Linux kernel version: 2.6.33-rc1 |
4 | # Sat Apr 18 11:13:22 2009 | 4 | # Tue Dec 22 19:26:25 2009 |
5 | # | 5 | # |
6 | CONFIG_MN10300=y | 6 | CONFIG_MN10300=y |
7 | CONFIG_AM33=y | 7 | CONFIG_AM33=y |
@@ -22,6 +22,7 @@ CONFIG_GENERIC_HARDIRQS=y | |||
22 | # CONFIG_HOTPLUG_CPU is not set | 22 | # CONFIG_HOTPLUG_CPU is not set |
23 | CONFIG_HZ=1000 | 23 | CONFIG_HZ=1000 |
24 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 24 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
25 | CONFIG_CONSTRUCTORS=y | ||
25 | 26 | ||
26 | # | 27 | # |
27 | # General setup | 28 | # General setup |
@@ -43,11 +44,10 @@ CONFIG_BSD_PROCESS_ACCT=y | |||
43 | # | 44 | # |
44 | # RCU Subsystem | 45 | # RCU Subsystem |
45 | # | 46 | # |
46 | CONFIG_CLASSIC_RCU=y | ||
47 | # CONFIG_TREE_RCU is not set | 47 | # CONFIG_TREE_RCU is not set |
48 | # CONFIG_PREEMPT_RCU is not set | 48 | # CONFIG_TREE_PREEMPT_RCU is not set |
49 | CONFIG_TINY_RCU=y | ||
49 | # CONFIG_TREE_RCU_TRACE is not set | 50 | # CONFIG_TREE_RCU_TRACE is not set |
50 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
51 | # CONFIG_IKCONFIG is not set | 51 | # CONFIG_IKCONFIG is not set |
52 | CONFIG_LOG_BUF_SHIFT=14 | 52 | CONFIG_LOG_BUF_SHIFT=14 |
53 | # CONFIG_GROUP_SCHED is not set | 53 | # CONFIG_GROUP_SCHED is not set |
@@ -62,7 +62,6 @@ CONFIG_ANON_INODES=y | |||
62 | CONFIG_EMBEDDED=y | 62 | CONFIG_EMBEDDED=y |
63 | CONFIG_SYSCTL_SYSCALL=y | 63 | CONFIG_SYSCTL_SYSCALL=y |
64 | # CONFIG_KALLSYMS is not set | 64 | # CONFIG_KALLSYMS is not set |
65 | CONFIG_STRIP_ASM_SYMS=y | ||
66 | # CONFIG_HOTPLUG is not set | 65 | # CONFIG_HOTPLUG is not set |
67 | CONFIG_PRINTK=y | 66 | CONFIG_PRINTK=y |
68 | CONFIG_BUG=y | 67 | CONFIG_BUG=y |
@@ -75,14 +74,22 @@ CONFIG_TIMERFD=y | |||
75 | CONFIG_EVENTFD=y | 74 | CONFIG_EVENTFD=y |
76 | CONFIG_SHMEM=y | 75 | CONFIG_SHMEM=y |
77 | CONFIG_AIO=y | 76 | CONFIG_AIO=y |
77 | |||
78 | # | ||
79 | # Kernel Performance Events And Counters | ||
80 | # | ||
78 | # CONFIG_VM_EVENT_COUNTERS is not set | 81 | # CONFIG_VM_EVENT_COUNTERS is not set |
79 | CONFIG_COMPAT_BRK=y | 82 | CONFIG_COMPAT_BRK=y |
80 | CONFIG_SLAB=y | 83 | CONFIG_SLAB=y |
81 | # CONFIG_SLUB is not set | 84 | # CONFIG_SLUB is not set |
82 | # CONFIG_SLOB is not set | 85 | # CONFIG_SLOB is not set |
83 | CONFIG_PROFILING=y | 86 | CONFIG_PROFILING=y |
84 | # CONFIG_MARKERS is not set | ||
85 | CONFIG_HAVE_OPROFILE=y | 87 | CONFIG_HAVE_OPROFILE=y |
88 | CONFIG_HAVE_ARCH_TRACEHOOK=y | ||
89 | |||
90 | # | ||
91 | # GCOV-based kernel profiling | ||
92 | # | ||
86 | # CONFIG_SLOW_WORK is not set | 93 | # CONFIG_SLOW_WORK is not set |
87 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | 94 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set |
88 | CONFIG_SLABINFO=y | 95 | CONFIG_SLABINFO=y |
@@ -90,6 +97,35 @@ CONFIG_RT_MUTEXES=y | |||
90 | CONFIG_BASE_SMALL=0 | 97 | CONFIG_BASE_SMALL=0 |
91 | # CONFIG_MODULES is not set | 98 | # CONFIG_MODULES is not set |
92 | # CONFIG_BLOCK is not set | 99 | # CONFIG_BLOCK is not set |
100 | # CONFIG_INLINE_SPIN_TRYLOCK is not set | ||
101 | # CONFIG_INLINE_SPIN_TRYLOCK_BH is not set | ||
102 | # CONFIG_INLINE_SPIN_LOCK is not set | ||
103 | # CONFIG_INLINE_SPIN_LOCK_BH is not set | ||
104 | # CONFIG_INLINE_SPIN_LOCK_IRQ is not set | ||
105 | # CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set | ||
106 | # CONFIG_INLINE_SPIN_UNLOCK is not set | ||
107 | # CONFIG_INLINE_SPIN_UNLOCK_BH is not set | ||
108 | # CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set | ||
109 | # CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set | ||
110 | # CONFIG_INLINE_READ_TRYLOCK is not set | ||
111 | # CONFIG_INLINE_READ_LOCK is not set | ||
112 | # CONFIG_INLINE_READ_LOCK_BH is not set | ||
113 | # CONFIG_INLINE_READ_LOCK_IRQ is not set | ||
114 | # CONFIG_INLINE_READ_LOCK_IRQSAVE is not set | ||
115 | # CONFIG_INLINE_READ_UNLOCK is not set | ||
116 | # CONFIG_INLINE_READ_UNLOCK_BH is not set | ||
117 | # CONFIG_INLINE_READ_UNLOCK_IRQ is not set | ||
118 | # CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set | ||
119 | # CONFIG_INLINE_WRITE_TRYLOCK is not set | ||
120 | # CONFIG_INLINE_WRITE_LOCK is not set | ||
121 | # CONFIG_INLINE_WRITE_LOCK_BH is not set | ||
122 | # CONFIG_INLINE_WRITE_LOCK_IRQ is not set | ||
123 | # CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set | ||
124 | # CONFIG_INLINE_WRITE_UNLOCK is not set | ||
125 | # CONFIG_INLINE_WRITE_UNLOCK_BH is not set | ||
126 | # CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set | ||
127 | # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | ||
128 | # CONFIG_MUTEX_SPIN_ON_OWNER is not set | ||
93 | # CONFIG_FREEZER is not set | 129 | # CONFIG_FREEZER is not set |
94 | 130 | ||
95 | # | 131 | # |
@@ -145,9 +181,8 @@ CONFIG_SPLIT_PTLOCK_CPUS=4 | |||
145 | CONFIG_ZONE_DMA_FLAG=0 | 181 | CONFIG_ZONE_DMA_FLAG=0 |
146 | CONFIG_NR_QUICK=1 | 182 | CONFIG_NR_QUICK=1 |
147 | CONFIG_VIRT_TO_BUS=y | 183 | CONFIG_VIRT_TO_BUS=y |
148 | CONFIG_UNEVICTABLE_LRU=y | 184 | # CONFIG_KSM is not set |
149 | CONFIG_HAVE_MLOCK=y | 185 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 |
150 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
151 | 186 | ||
152 | # | 187 | # |
153 | # Power management options | 188 | # Power management options |
@@ -202,6 +237,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
202 | # CONFIG_NETFILTER is not set | 237 | # CONFIG_NETFILTER is not set |
203 | # CONFIG_IP_DCCP is not set | 238 | # CONFIG_IP_DCCP is not set |
204 | # CONFIG_IP_SCTP is not set | 239 | # CONFIG_IP_SCTP is not set |
240 | # CONFIG_RDS is not set | ||
205 | # CONFIG_TIPC is not set | 241 | # CONFIG_TIPC is not set |
206 | # CONFIG_ATM is not set | 242 | # CONFIG_ATM is not set |
207 | # CONFIG_BRIDGE is not set | 243 | # CONFIG_BRIDGE is not set |
@@ -216,6 +252,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
216 | # CONFIG_ECONET is not set | 252 | # CONFIG_ECONET is not set |
217 | # CONFIG_WAN_ROUTER is not set | 253 | # CONFIG_WAN_ROUTER is not set |
218 | # CONFIG_PHONET is not set | 254 | # CONFIG_PHONET is not set |
255 | # CONFIG_IEEE802154 is not set | ||
219 | # CONFIG_NET_SCHED is not set | 256 | # CONFIG_NET_SCHED is not set |
220 | # CONFIG_DCB is not set | 257 | # CONFIG_DCB is not set |
221 | 258 | ||
@@ -341,7 +378,6 @@ CONFIG_MISC_DEVICES=y | |||
341 | # CONFIG_SCSI_DMA is not set | 378 | # CONFIG_SCSI_DMA is not set |
342 | # CONFIG_SCSI_NETLINK is not set | 379 | # CONFIG_SCSI_NETLINK is not set |
343 | CONFIG_NETDEVICES=y | 380 | CONFIG_NETDEVICES=y |
344 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
345 | # CONFIG_DUMMY is not set | 381 | # CONFIG_DUMMY is not set |
346 | # CONFIG_BONDING is not set | 382 | # CONFIG_BONDING is not set |
347 | # CONFIG_MACVLAN is not set | 383 | # CONFIG_MACVLAN is not set |
@@ -362,14 +398,11 @@ CONFIG_SMC91X=y | |||
362 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | 398 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set |
363 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | 399 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set |
364 | # CONFIG_B44 is not set | 400 | # CONFIG_B44 is not set |
401 | # CONFIG_KS8842 is not set | ||
402 | # CONFIG_KS8851_MLL is not set | ||
365 | # CONFIG_NETDEV_1000 is not set | 403 | # CONFIG_NETDEV_1000 is not set |
366 | # CONFIG_NETDEV_10000 is not set | 404 | # CONFIG_NETDEV_10000 is not set |
367 | 405 | # CONFIG_WLAN is not set | |
368 | # | ||
369 | # Wireless LAN | ||
370 | # | ||
371 | # CONFIG_WLAN_PRE80211 is not set | ||
372 | # CONFIG_WLAN_80211 is not set | ||
373 | 406 | ||
374 | # | 407 | # |
375 | # Enable WiMAX (Networking options) to see the WiMAX drivers | 408 | # Enable WiMAX (Networking options) to see the WiMAX drivers |
@@ -430,11 +463,15 @@ CONFIG_RTC=y | |||
430 | # CONFIG_TCG_TPM is not set | 463 | # CONFIG_TCG_TPM is not set |
431 | # CONFIG_I2C is not set | 464 | # CONFIG_I2C is not set |
432 | # CONFIG_SPI is not set | 465 | # CONFIG_SPI is not set |
466 | |||
467 | # | ||
468 | # PPS support | ||
469 | # | ||
470 | # CONFIG_PPS is not set | ||
433 | # CONFIG_W1 is not set | 471 | # CONFIG_W1 is not set |
434 | # CONFIG_POWER_SUPPLY is not set | 472 | # CONFIG_POWER_SUPPLY is not set |
435 | # CONFIG_HWMON is not set | 473 | # CONFIG_HWMON is not set |
436 | # CONFIG_THERMAL is not set | 474 | # CONFIG_THERMAL is not set |
437 | # CONFIG_THERMAL_HWMON is not set | ||
438 | # CONFIG_WATCHDOG is not set | 475 | # CONFIG_WATCHDOG is not set |
439 | CONFIG_SSB_POSSIBLE=y | 476 | CONFIG_SSB_POSSIBLE=y |
440 | 477 | ||
@@ -451,22 +488,7 @@ CONFIG_SSB_POSSIBLE=y | |||
451 | # CONFIG_HTC_PASIC3 is not set | 488 | # CONFIG_HTC_PASIC3 is not set |
452 | # CONFIG_MFD_TMIO is not set | 489 | # CONFIG_MFD_TMIO is not set |
453 | # CONFIG_REGULATOR is not set | 490 | # CONFIG_REGULATOR is not set |
454 | 491 | # CONFIG_MEDIA_SUPPORT is not set | |
455 | # | ||
456 | # Multimedia devices | ||
457 | # | ||
458 | |||
459 | # | ||
460 | # Multimedia core support | ||
461 | # | ||
462 | # CONFIG_VIDEO_DEV is not set | ||
463 | # CONFIG_DVB_CORE is not set | ||
464 | # CONFIG_VIDEO_MEDIA is not set | ||
465 | |||
466 | # | ||
467 | # Multimedia drivers | ||
468 | # | ||
469 | # CONFIG_DAB is not set | ||
470 | 492 | ||
471 | # | 493 | # |
472 | # Graphics support | 494 | # Graphics support |
@@ -490,11 +512,17 @@ CONFIG_SSB_POSSIBLE=y | |||
490 | # CONFIG_DMADEVICES is not set | 512 | # CONFIG_DMADEVICES is not set |
491 | # CONFIG_AUXDISPLAY is not set | 513 | # CONFIG_AUXDISPLAY is not set |
492 | # CONFIG_UIO is not set | 514 | # CONFIG_UIO is not set |
515 | |||
516 | # | ||
517 | # TI VLYNQ | ||
518 | # | ||
493 | # CONFIG_STAGING is not set | 519 | # CONFIG_STAGING is not set |
494 | 520 | ||
495 | # | 521 | # |
496 | # File systems | 522 | # File systems |
497 | # | 523 | # |
524 | CONFIG_FILE_LOCKING=y | ||
525 | CONFIG_FSNOTIFY=y | ||
498 | CONFIG_DNOTIFY=y | 526 | CONFIG_DNOTIFY=y |
499 | CONFIG_INOTIFY=y | 527 | CONFIG_INOTIFY=y |
500 | CONFIG_INOTIFY_USER=y | 528 | CONFIG_INOTIFY_USER=y |
@@ -539,6 +567,7 @@ CONFIG_NFS_V3=y | |||
539 | # CONFIG_NFS_V3_ACL is not set | 567 | # CONFIG_NFS_V3_ACL is not set |
540 | # CONFIG_NFS_V4 is not set | 568 | # CONFIG_NFS_V4 is not set |
541 | CONFIG_ROOT_NFS=y | 569 | CONFIG_ROOT_NFS=y |
570 | # CONFIG_NFSD is not set | ||
542 | CONFIG_LOCKD=y | 571 | CONFIG_LOCKD=y |
543 | CONFIG_LOCKD_V4=y | 572 | CONFIG_LOCKD_V4=y |
544 | CONFIG_NFS_COMMON=y | 573 | CONFIG_NFS_COMMON=y |
@@ -561,13 +590,13 @@ CONFIG_ENABLE_WARN_DEPRECATED=y | |||
561 | CONFIG_ENABLE_MUST_CHECK=y | 590 | CONFIG_ENABLE_MUST_CHECK=y |
562 | CONFIG_FRAME_WARN=1024 | 591 | CONFIG_FRAME_WARN=1024 |
563 | CONFIG_MAGIC_SYSRQ=y | 592 | CONFIG_MAGIC_SYSRQ=y |
593 | CONFIG_STRIP_ASM_SYMS=y | ||
564 | # CONFIG_UNUSED_SYMBOLS is not set | 594 | # CONFIG_UNUSED_SYMBOLS is not set |
565 | # CONFIG_DEBUG_FS is not set | 595 | # CONFIG_DEBUG_FS is not set |
566 | # CONFIG_HEADERS_CHECK is not set | 596 | # CONFIG_HEADERS_CHECK is not set |
567 | # CONFIG_DEBUG_KERNEL is not set | 597 | # CONFIG_DEBUG_KERNEL is not set |
568 | # CONFIG_DEBUG_BUGVERBOSE is not set | 598 | CONFIG_DEBUG_BUGVERBOSE=y |
569 | # CONFIG_DEBUG_MEMORY_INIT is not set | 599 | # CONFIG_DEBUG_MEMORY_INIT is not set |
570 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
571 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | 600 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set |
572 | # CONFIG_SAMPLES is not set | 601 | # CONFIG_SAMPLES is not set |
573 | 602 | ||
@@ -577,7 +606,11 @@ CONFIG_MAGIC_SYSRQ=y | |||
577 | # CONFIG_KEYS is not set | 606 | # CONFIG_KEYS is not set |
578 | # CONFIG_SECURITY is not set | 607 | # CONFIG_SECURITY is not set |
579 | # CONFIG_SECURITYFS is not set | 608 | # CONFIG_SECURITYFS is not set |
580 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | 609 | # CONFIG_DEFAULT_SECURITY_SELINUX is not set |
610 | # CONFIG_DEFAULT_SECURITY_SMACK is not set | ||
611 | # CONFIG_DEFAULT_SECURITY_TOMOYO is not set | ||
612 | CONFIG_DEFAULT_SECURITY_DAC=y | ||
613 | CONFIG_DEFAULT_SECURITY="" | ||
581 | # CONFIG_CRYPTO is not set | 614 | # CONFIG_CRYPTO is not set |
582 | # CONFIG_BINARY_PRINTF is not set | 615 | # CONFIG_BINARY_PRINTF is not set |
583 | 616 | ||
diff --git a/arch/mn10300/include/asm/bitops.h b/arch/mn10300/include/asm/bitops.h index 0b610f482abb..f49ac49e09ad 100644 --- a/arch/mn10300/include/asm/bitops.h +++ b/arch/mn10300/include/asm/bitops.h | |||
@@ -165,7 +165,7 @@ static inline __attribute__((const)) | |||
165 | unsigned long __ffs(unsigned long x) | 165 | unsigned long __ffs(unsigned long x) |
166 | { | 166 | { |
167 | int bit; | 167 | int bit; |
168 | asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(x & -x)); | 168 | asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(x & -x) : "cc"); |
169 | return bit; | 169 | return bit; |
170 | } | 170 | } |
171 | 171 | ||
@@ -177,7 +177,7 @@ static inline __attribute__((const)) | |||
177 | int __ilog2_u32(u32 n) | 177 | int __ilog2_u32(u32 n) |
178 | { | 178 | { |
179 | int bit; | 179 | int bit; |
180 | asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(n)); | 180 | asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(n) : "cc"); |
181 | return bit; | 181 | return bit; |
182 | } | 182 | } |
183 | 183 | ||
diff --git a/arch/mn10300/include/asm/div64.h b/arch/mn10300/include/asm/div64.h index 3a8329b3e869..34dcb8e68309 100644 --- a/arch/mn10300/include/asm/div64.h +++ b/arch/mn10300/include/asm/div64.h | |||
@@ -72,6 +72,7 @@ unsigned __muldiv64u(unsigned val, unsigned mult, unsigned div) | |||
72 | * MDR = MDR:val%div */ | 72 | * MDR = MDR:val%div */ |
73 | : "=r"(result) | 73 | : "=r"(result) |
74 | : "0"(val), "ir"(mult), "r"(div) | 74 | : "0"(val), "ir"(mult), "r"(div) |
75 | : "cc" | ||
75 | ); | 76 | ); |
76 | 77 | ||
77 | return result; | 78 | return result; |
@@ -92,6 +93,7 @@ signed __muldiv64s(signed val, signed mult, signed div) | |||
92 | * MDR = MDR:val%div */ | 93 | * MDR = MDR:val%div */ |
93 | : "=r"(result) | 94 | : "=r"(result) |
94 | : "0"(val), "ir"(mult), "r"(div) | 95 | : "0"(val), "ir"(mult), "r"(div) |
96 | : "cc" | ||
95 | ); | 97 | ); |
96 | 98 | ||
97 | return result; | 99 | return result; |
diff --git a/arch/mn10300/include/asm/system.h b/arch/mn10300/include/asm/system.h index 8214fb7e7fe4..3636c054dcd5 100644 --- a/arch/mn10300/include/asm/system.h +++ b/arch/mn10300/include/asm/system.h | |||
@@ -143,6 +143,7 @@ do { \ | |||
143 | " mov %0,epsw \n" \ | 143 | " mov %0,epsw \n" \ |
144 | : "=&d"(tmp) \ | 144 | : "=&d"(tmp) \ |
145 | : "i"(~EPSW_IM), "r"(__mn10300_irq_enabled_epsw) \ | 145 | : "i"(~EPSW_IM), "r"(__mn10300_irq_enabled_epsw) \ |
146 | : "cc" \ | ||
146 | ); \ | 147 | ); \ |
147 | } while (0) | 148 | } while (0) |
148 | 149 | ||
diff --git a/arch/mn10300/include/asm/tlbflush.h b/arch/mn10300/include/asm/tlbflush.h index e0239865abcb..1a7e29281c5d 100644 --- a/arch/mn10300/include/asm/tlbflush.h +++ b/arch/mn10300/include/asm/tlbflush.h | |||
@@ -22,7 +22,7 @@ do { \ | |||
22 | " mov %0,%1 \n" \ | 22 | " mov %0,%1 \n" \ |
23 | : "=d"(w) \ | 23 | : "=d"(w) \ |
24 | : "m"(MMUCTR), "i"(MMUCTR_IIV|MMUCTR_DIV) \ | 24 | : "m"(MMUCTR), "i"(MMUCTR_IIV|MMUCTR_DIV) \ |
25 | : "memory" \ | 25 | : "cc", "memory" \ |
26 | ); \ | 26 | ); \ |
27 | } while (0) | 27 | } while (0) |
28 | 28 | ||
diff --git a/arch/mn10300/include/asm/uaccess.h b/arch/mn10300/include/asm/uaccess.h index 167e10ff06d9..197a7af3dd8a 100644 --- a/arch/mn10300/include/asm/uaccess.h +++ b/arch/mn10300/include/asm/uaccess.h | |||
@@ -316,7 +316,7 @@ do { \ | |||
316 | " .previous\n" \ | 316 | " .previous\n" \ |
317 | : "=a"(__from), "=a"(__to), "=r"(size), "=&r"(w)\ | 317 | : "=a"(__from), "=a"(__to), "=r"(size), "=&r"(w)\ |
318 | : "0"(__from), "1"(__to), "2"(size) \ | 318 | : "0"(__from), "1"(__to), "2"(size) \ |
319 | : "memory"); \ | 319 | : "cc", "memory"); \ |
320 | } \ | 320 | } \ |
321 | } while (0) | 321 | } while (0) |
322 | 322 | ||
@@ -352,7 +352,7 @@ do { \ | |||
352 | " .previous\n" \ | 352 | " .previous\n" \ |
353 | : "=a"(__from), "=a"(__to), "=r"(size), "=&r"(w)\ | 353 | : "=a"(__from), "=a"(__to), "=r"(size), "=&r"(w)\ |
354 | : "0"(__from), "1"(__to), "2"(size) \ | 354 | : "0"(__from), "1"(__to), "2"(size) \ |
355 | : "memory"); \ | 355 | : "cc", "memory"); \ |
356 | } \ | 356 | } \ |
357 | } while (0) | 357 | } while (0) |
358 | 358 | ||
diff --git a/arch/mn10300/include/asm/unistd.h b/arch/mn10300/include/asm/unistd.h index 2a983931c11f..c05acb95c2a9 100644 --- a/arch/mn10300/include/asm/unistd.h +++ b/arch/mn10300/include/asm/unistd.h | |||
@@ -348,10 +348,11 @@ | |||
348 | #define __NR_pwritev 335 | 348 | #define __NR_pwritev 335 |
349 | #define __NR_rt_tgsigqueueinfo 336 | 349 | #define __NR_rt_tgsigqueueinfo 336 |
350 | #define __NR_perf_event_open 337 | 350 | #define __NR_perf_event_open 337 |
351 | #define __NR_recvmmsg 338 | ||
351 | 352 | ||
352 | #ifdef __KERNEL__ | 353 | #ifdef __KERNEL__ |
353 | 354 | ||
354 | #define NR_syscalls 338 | 355 | #define NR_syscalls 339 |
355 | 356 | ||
356 | /* | 357 | /* |
357 | * specify the deprecated syscalls we want to support on this arch | 358 | * specify the deprecated syscalls we want to support on this arch |
diff --git a/arch/mn10300/kernel/entry.S b/arch/mn10300/kernel/entry.S index c9ee6c009d79..88e3e1c3cc21 100644 --- a/arch/mn10300/kernel/entry.S +++ b/arch/mn10300/kernel/entry.S | |||
@@ -724,6 +724,7 @@ ENTRY(sys_call_table) | |||
724 | .long sys_pwritev /* 335 */ | 724 | .long sys_pwritev /* 335 */ |
725 | .long sys_rt_tgsigqueueinfo | 725 | .long sys_rt_tgsigqueueinfo |
726 | .long sys_perf_event_open | 726 | .long sys_perf_event_open |
727 | .long sys_recvmmsg | ||
727 | 728 | ||
728 | 729 | ||
729 | nr_syscalls=(.-sys_call_table)/4 | 730 | nr_syscalls=(.-sys_call_table)/4 |
diff --git a/arch/mn10300/kernel/mn10300-serial.c b/arch/mn10300/kernel/mn10300-serial.c index 229b710fc5d5..ef34d5a0f8bd 100644 --- a/arch/mn10300/kernel/mn10300-serial.c +++ b/arch/mn10300/kernel/mn10300-serial.c | |||
@@ -380,7 +380,8 @@ static int mask_test_and_clear(volatile u8 *ptr, u8 mask) | |||
380 | u32 epsw; | 380 | u32 epsw; |
381 | asm volatile(" bclr %1,(%2) \n" | 381 | asm volatile(" bclr %1,(%2) \n" |
382 | " mov epsw,%0 \n" | 382 | " mov epsw,%0 \n" |
383 | : "=d"(epsw) : "d"(mask), "a"(ptr)); | 383 | : "=d"(epsw) : "d"(mask), "a"(ptr) |
384 | : "cc", "memory"); | ||
384 | return !(epsw & EPSW_FLAG_Z); | 385 | return !(epsw & EPSW_FLAG_Z); |
385 | } | 386 | } |
386 | 387 | ||
diff --git a/arch/mn10300/kernel/signal.c b/arch/mn10300/kernel/signal.c index a21f43bc68e2..717db14c2cc3 100644 --- a/arch/mn10300/kernel/signal.c +++ b/arch/mn10300/kernel/signal.c | |||
@@ -264,7 +264,7 @@ static inline void __user *get_sigframe(struct k_sigaction *ka, | |||
264 | 264 | ||
265 | /* this is the X/Open sanctioned signal stack switching. */ | 265 | /* this is the X/Open sanctioned signal stack switching. */ |
266 | if (ka->sa.sa_flags & SA_ONSTACK) { | 266 | if (ka->sa.sa_flags & SA_ONSTACK) { |
267 | if (!on_sig_stack(sp)) | 267 | if (sas_ss_flags(sp) == 0) |
268 | sp = current->sas_ss_sp + current->sas_ss_size; | 268 | sp = current->sas_ss_sp + current->sas_ss_size; |
269 | } | 269 | } |
270 | 270 | ||
diff --git a/arch/mn10300/lib/checksum.c b/arch/mn10300/lib/checksum.c index 274f29ec33c1..b6580f5d89ee 100644 --- a/arch/mn10300/lib/checksum.c +++ b/arch/mn10300/lib/checksum.c | |||
@@ -22,6 +22,7 @@ static inline unsigned short from32to16(__wsum sum) | |||
22 | " addc 0xffff,%0 \n" | 22 | " addc 0xffff,%0 \n" |
23 | : "=r" (sum) | 23 | : "=r" (sum) |
24 | : "r" (sum << 16), "0" (sum & 0xffff0000) | 24 | : "r" (sum << 16), "0" (sum & 0xffff0000) |
25 | : "cc" | ||
25 | ); | 26 | ); |
26 | return sum >> 16; | 27 | return sum >> 16; |
27 | } | 28 | } |
diff --git a/arch/mn10300/lib/delay.c b/arch/mn10300/lib/delay.c index cce66bc0822d..fdf6f710f94e 100644 --- a/arch/mn10300/lib/delay.c +++ b/arch/mn10300/lib/delay.c | |||
@@ -28,7 +28,8 @@ void __delay(unsigned long loops) | |||
28 | "2: add -1,%0 \n" | 28 | "2: add -1,%0 \n" |
29 | " bne 2b \n" | 29 | " bne 2b \n" |
30 | : "=&d" (d0) | 30 | : "=&d" (d0) |
31 | : "0" (loops)); | 31 | : "0" (loops) |
32 | : "cc"); | ||
32 | } | 33 | } |
33 | EXPORT_SYMBOL(__delay); | 34 | EXPORT_SYMBOL(__delay); |
34 | 35 | ||
diff --git a/arch/mn10300/lib/usercopy.c b/arch/mn10300/lib/usercopy.c index a75b203059c1..7826e6c364e7 100644 --- a/arch/mn10300/lib/usercopy.c +++ b/arch/mn10300/lib/usercopy.c | |||
@@ -62,7 +62,7 @@ do { \ | |||
62 | " .previous" \ | 62 | " .previous" \ |
63 | :"=&r"(res), "=r"(count), "=&r"(w) \ | 63 | :"=&r"(res), "=r"(count), "=&r"(w) \ |
64 | :"i"(-EFAULT), "1"(count), "a"(src), "a"(dst) \ | 64 | :"i"(-EFAULT), "1"(count), "a"(src), "a"(dst) \ |
65 | :"memory"); \ | 65 | : "memory", "cc"); \ |
66 | } while (0) | 66 | } while (0) |
67 | 67 | ||
68 | long | 68 | long |
@@ -109,7 +109,7 @@ do { \ | |||
109 | ".previous\n" \ | 109 | ".previous\n" \ |
110 | : "+r"(size), "=&r"(w) \ | 110 | : "+r"(size), "=&r"(w) \ |
111 | : "a"(addr), "d"(0) \ | 111 | : "a"(addr), "d"(0) \ |
112 | : "memory"); \ | 112 | : "memory", "cc"); \ |
113 | } while (0) | 113 | } while (0) |
114 | 114 | ||
115 | unsigned long | 115 | unsigned long |
@@ -161,6 +161,6 @@ long strnlen_user(const char *s, long n) | |||
161 | ".previous\n" | 161 | ".previous\n" |
162 | :"=d"(res), "=&r"(w) | 162 | :"=d"(res), "=&r"(w) |
163 | :"0"(0), "a"(s), "r"(n) | 163 | :"0"(0), "a"(s), "r"(n) |
164 | :"memory"); | 164 | : "memory", "cc"); |
165 | return res; | 165 | return res; |
166 | } | 166 | } |
diff --git a/arch/mn10300/mm/dma-alloc.c b/arch/mn10300/mm/dma-alloc.c index f3649d8f50e3..ee82d624b3c6 100644 --- a/arch/mn10300/mm/dma-alloc.c +++ b/arch/mn10300/mm/dma-alloc.c | |||
@@ -16,12 +16,24 @@ | |||
16 | #include <linux/pci.h> | 16 | #include <linux/pci.h> |
17 | #include <asm/io.h> | 17 | #include <asm/io.h> |
18 | 18 | ||
19 | static unsigned long pci_sram_allocated = 0xbc000000; | ||
20 | |||
19 | void *dma_alloc_coherent(struct device *dev, size_t size, | 21 | void *dma_alloc_coherent(struct device *dev, size_t size, |
20 | dma_addr_t *dma_handle, int gfp) | 22 | dma_addr_t *dma_handle, int gfp) |
21 | { | 23 | { |
22 | unsigned long addr; | 24 | unsigned long addr; |
23 | void *ret; | 25 | void *ret; |
24 | 26 | ||
27 | printk("dma_alloc_coherent(%s,%zu,,%x)\n", dev_name(dev), size, gfp); | ||
28 | |||
29 | if (0xbe000000 - pci_sram_allocated >= size) { | ||
30 | size = (size + 255) & ~255; | ||
31 | addr = pci_sram_allocated; | ||
32 | pci_sram_allocated += size; | ||
33 | ret = (void *) addr; | ||
34 | goto done; | ||
35 | } | ||
36 | |||
25 | /* ignore region specifiers */ | 37 | /* ignore region specifiers */ |
26 | gfp &= ~(__GFP_DMA | __GFP_HIGHMEM); | 38 | gfp &= ~(__GFP_DMA | __GFP_HIGHMEM); |
27 | 39 | ||
@@ -41,7 +53,9 @@ void *dma_alloc_coherent(struct device *dev, size_t size, | |||
41 | /* write back and evict all cache lines covering this region */ | 53 | /* write back and evict all cache lines covering this region */ |
42 | mn10300_dcache_flush_inv_range2(virt_to_phys((void *) addr), PAGE_SIZE); | 54 | mn10300_dcache_flush_inv_range2(virt_to_phys((void *) addr), PAGE_SIZE); |
43 | 55 | ||
56 | done: | ||
44 | *dma_handle = virt_to_bus((void *) addr); | 57 | *dma_handle = virt_to_bus((void *) addr); |
58 | printk("dma_alloc_coherent() = %p [%x]\n", ret, *dma_handle); | ||
45 | return ret; | 59 | return ret; |
46 | } | 60 | } |
47 | EXPORT_SYMBOL(dma_alloc_coherent); | 61 | EXPORT_SYMBOL(dma_alloc_coherent); |
@@ -51,6 +65,9 @@ void dma_free_coherent(struct device *dev, size_t size, void *vaddr, | |||
51 | { | 65 | { |
52 | unsigned long addr = (unsigned long) vaddr & ~0x20000000; | 66 | unsigned long addr = (unsigned long) vaddr & ~0x20000000; |
53 | 67 | ||
68 | if (addr >= 0x9c000000) | ||
69 | return; | ||
70 | |||
54 | free_pages(addr, get_order(size)); | 71 | free_pages(addr, get_order(size)); |
55 | } | 72 | } |
56 | EXPORT_SYMBOL(dma_free_coherent); | 73 | EXPORT_SYMBOL(dma_free_coherent); |
diff --git a/arch/mn10300/mm/init.c b/arch/mn10300/mm/init.c index ec1420562dc7..dd27a9a35152 100644 --- a/arch/mn10300/mm/init.c +++ b/arch/mn10300/mm/init.c | |||
@@ -118,8 +118,7 @@ void __init mem_init(void) | |||
118 | reservedpages << (PAGE_SHIFT - 10), | 118 | reservedpages << (PAGE_SHIFT - 10), |
119 | datasize >> 10, | 119 | datasize >> 10, |
120 | initsize >> 10, | 120 | initsize >> 10, |
121 | (unsigned long) (totalhigh_pages << (PAGE_SHIFT - 10)) | 121 | totalhigh_pages << (PAGE_SHIFT - 10)); |
122 | ); | ||
123 | } | 122 | } |
124 | 123 | ||
125 | /* | 124 | /* |
diff --git a/arch/mn10300/mm/misalignment.c b/arch/mn10300/mm/misalignment.c index 30016251f658..6dffbf97ac26 100644 --- a/arch/mn10300/mm/misalignment.c +++ b/arch/mn10300/mm/misalignment.c | |||
@@ -633,13 +633,13 @@ static int misalignment_addr(unsigned long *registers, unsigned long sp, | |||
633 | goto displace_or_inc; | 633 | goto displace_or_inc; |
634 | case SD24: | 634 | case SD24: |
635 | tmp = disp << 8; | 635 | tmp = disp << 8; |
636 | asm("asr 8,%0" : "=r"(tmp) : "0"(tmp)); | 636 | asm("asr 8,%0" : "=r"(tmp) : "0"(tmp) : "cc"); |
637 | disp = (long) tmp; | 637 | disp = (long) tmp; |
638 | goto displace_or_inc; | 638 | goto displace_or_inc; |
639 | case SIMM4_2: | 639 | case SIMM4_2: |
640 | tmp = opcode >> 4 & 0x0f; | 640 | tmp = opcode >> 4 & 0x0f; |
641 | tmp <<= 28; | 641 | tmp <<= 28; |
642 | asm("asr 28,%0" : "=r"(tmp) : "0"(tmp)); | 642 | asm("asr 28,%0" : "=r"(tmp) : "0"(tmp) : "cc"); |
643 | disp = (long) tmp; | 643 | disp = (long) tmp; |
644 | goto displace_or_inc; | 644 | goto displace_or_inc; |
645 | case IMM8: | 645 | case IMM8: |
diff --git a/arch/mn10300/unit-asb2305/include/unit/serial.h b/arch/mn10300/unit-asb2305/include/unit/serial.h index 3bfc90938787..8086cc092cec 100644 --- a/arch/mn10300/unit-asb2305/include/unit/serial.h +++ b/arch/mn10300/unit-asb2305/include/unit/serial.h | |||
@@ -11,7 +11,7 @@ | |||
11 | #ifndef _ASM_UNIT_SERIAL_H | 11 | #ifndef _ASM_UNIT_SERIAL_H |
12 | #define _ASM_UNIT_SERIAL_H | 12 | #define _ASM_UNIT_SERIAL_H |
13 | 13 | ||
14 | #include <asm/cpu/cpu-regs.h> | 14 | #include <asm/cpu-regs.h> |
15 | #include <proc/irq.h> | 15 | #include <proc/irq.h> |
16 | #include <linux/serial_reg.h> | 16 | #include <linux/serial_reg.h> |
17 | 17 | ||
diff --git a/arch/mn10300/unit-asb2305/include/unit/timex.h b/arch/mn10300/unit-asb2305/include/unit/timex.h index a71c49aa85eb..d1c72d59fa9f 100644 --- a/arch/mn10300/unit-asb2305/include/unit/timex.h +++ b/arch/mn10300/unit-asb2305/include/unit/timex.h | |||
@@ -15,7 +15,7 @@ | |||
15 | #include <linux/irq.h> | 15 | #include <linux/irq.h> |
16 | #endif /* __ASSEMBLY__ */ | 16 | #endif /* __ASSEMBLY__ */ |
17 | 17 | ||
18 | #include <asm/cpu/timer-regs.h> | 18 | #include <asm/timer-regs.h> |
19 | #include <unit/clock.h> | 19 | #include <unit/clock.h> |
20 | 20 | ||
21 | /* | 21 | /* |
diff --git a/arch/mn10300/unit-asb2305/leds.c b/arch/mn10300/unit-asb2305/leds.c index d345ff9042d5..6f8de9954026 100644 --- a/arch/mn10300/unit-asb2305/leds.c +++ b/arch/mn10300/unit-asb2305/leds.c | |||
@@ -13,8 +13,8 @@ | |||
13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
14 | #include <asm/io.h> | 14 | #include <asm/io.h> |
15 | #include <asm/processor.h> | 15 | #include <asm/processor.h> |
16 | #include <asm/cpu/intctl-regs.h> | 16 | #include <asm/intctl-regs.h> |
17 | #include <asm/cpu/rtc-regs.h> | 17 | #include <asm/rtc-regs.h> |
18 | #include <unit/leds.h> | 18 | #include <unit/leds.h> |
19 | 19 | ||
20 | static const u8 asb2305_led_hex_tbl[16] = { | 20 | static const u8 asb2305_led_hex_tbl[16] = { |
diff --git a/arch/mn10300/unit-asb2305/pci-asb2305.c b/arch/mn10300/unit-asb2305/pci-asb2305.c index d100ca788468..78cd134ddf7d 100644 --- a/arch/mn10300/unit-asb2305/pci-asb2305.c +++ b/arch/mn10300/unit-asb2305/pci-asb2305.c | |||
@@ -218,45 +218,6 @@ void __init pcibios_resource_survey(void) | |||
218 | pcibios_allocate_resources(1); | 218 | pcibios_allocate_resources(1); |
219 | } | 219 | } |
220 | 220 | ||
221 | int pcibios_enable_resources(struct pci_dev *dev, int mask) | ||
222 | { | ||
223 | u16 cmd, old_cmd; | ||
224 | int idx; | ||
225 | struct resource *r; | ||
226 | |||
227 | pci_read_config_word(dev, PCI_COMMAND, &cmd); | ||
228 | old_cmd = cmd; | ||
229 | |||
230 | for (idx = 0; idx < 6; idx++) { | ||
231 | /* Only set up the requested stuff */ | ||
232 | if (!(mask & (1 << idx))) | ||
233 | continue; | ||
234 | |||
235 | r = &dev->resource[idx]; | ||
236 | |||
237 | if (!r->start && r->end) { | ||
238 | printk(KERN_ERR | ||
239 | "PCI: Device %s not available because of" | ||
240 | " resource collisions\n", | ||
241 | pci_name(dev)); | ||
242 | return -EINVAL; | ||
243 | } | ||
244 | |||
245 | if (r->flags & IORESOURCE_IO) | ||
246 | cmd |= PCI_COMMAND_IO; | ||
247 | if (r->flags & IORESOURCE_MEM) | ||
248 | cmd |= PCI_COMMAND_MEMORY; | ||
249 | } | ||
250 | |||
251 | if (dev->resource[PCI_ROM_RESOURCE].start) | ||
252 | cmd |= PCI_COMMAND_MEMORY; | ||
253 | |||
254 | if (cmd != old_cmd) | ||
255 | pci_write_config_word(dev, PCI_COMMAND, cmd); | ||
256 | |||
257 | return 0; | ||
258 | } | ||
259 | |||
260 | /* | 221 | /* |
261 | * If we set up a device for bus mastering, we need to check the latency | 222 | * If we set up a device for bus mastering, we need to check the latency |
262 | * timer as certain crappy BIOSes forget to set it properly. | 223 | * timer as certain crappy BIOSes forget to set it properly. |
diff --git a/arch/mn10300/unit-asb2305/pci-asb2305.h b/arch/mn10300/unit-asb2305/pci-asb2305.h index 9763d1ce343a..c3fa294b6e28 100644 --- a/arch/mn10300/unit-asb2305/pci-asb2305.h +++ b/arch/mn10300/unit-asb2305/pci-asb2305.h | |||
@@ -34,7 +34,6 @@ extern unsigned int pci_probe; | |||
34 | extern unsigned int pcibios_max_latency; | 34 | extern unsigned int pcibios_max_latency; |
35 | 35 | ||
36 | extern void pcibios_resource_survey(void); | 36 | extern void pcibios_resource_survey(void); |
37 | extern int pcibios_enable_resources(struct pci_dev *dev, int mask); | ||
38 | 37 | ||
39 | /* pci.c */ | 38 | /* pci.c */ |
40 | 39 | ||
diff --git a/arch/mn10300/unit-asb2305/pci.c b/arch/mn10300/unit-asb2305/pci.c index 07dbbcda3b2e..2cb7e75ba1c0 100644 --- a/arch/mn10300/unit-asb2305/pci.c +++ b/arch/mn10300/unit-asb2305/pci.c | |||
@@ -27,6 +27,29 @@ struct pci_bus *pci_root_bus; | |||
27 | struct pci_ops *pci_root_ops; | 27 | struct pci_ops *pci_root_ops; |
28 | 28 | ||
29 | /* | 29 | /* |
30 | * The accessible PCI window does not cover the entire CPU address space, but | ||
31 | * there are devices we want to access outside of that window, so we need to | ||
32 | * insert specific PCI bus resources instead of using the platform-level bus | ||
33 | * resources directly for the PCI root bus. | ||
34 | * | ||
35 | * These are configured and inserted by pcibios_init() and are attached to the | ||
36 | * root bus by pcibios_fixup_bus(). | ||
37 | */ | ||
38 | static struct resource pci_ioport_resource = { | ||
39 | .name = "PCI IO", | ||
40 | .start = 0xbe000000, | ||
41 | .end = 0xbe03ffff, | ||
42 | .flags = IORESOURCE_IO, | ||
43 | }; | ||
44 | |||
45 | static struct resource pci_iomem_resource = { | ||
46 | .name = "PCI mem", | ||
47 | .start = 0xb8000000, | ||
48 | .end = 0xbbffffff, | ||
49 | .flags = IORESOURCE_MEM, | ||
50 | }; | ||
51 | |||
52 | /* | ||
30 | * Functions for accessing PCI configuration space | 53 | * Functions for accessing PCI configuration space |
31 | */ | 54 | */ |
32 | 55 | ||
@@ -279,7 +302,7 @@ static int __init pci_sanity_check(struct pci_ops *o) | |||
279 | (x == PCI_VENDOR_ID_INTEL || x == PCI_VENDOR_ID_COMPAQ))) | 302 | (x == PCI_VENDOR_ID_INTEL || x == PCI_VENDOR_ID_COMPAQ))) |
280 | return 1; | 303 | return 1; |
281 | 304 | ||
282 | printk(KERN_ERROR "PCI: Sanity check failed\n"); | 305 | printk(KERN_ERR "PCI: Sanity check failed\n"); |
283 | return 0; | 306 | return 0; |
284 | } | 307 | } |
285 | 308 | ||
@@ -297,6 +320,7 @@ static int __init pci_check_direct(void) | |||
297 | printk(KERN_INFO "PCI: Using configuration ampci\n"); | 320 | printk(KERN_INFO "PCI: Using configuration ampci\n"); |
298 | request_mem_region(0xBE040000, 256, "AMPCI bridge"); | 321 | request_mem_region(0xBE040000, 256, "AMPCI bridge"); |
299 | request_mem_region(0xBFFFFFF4, 12, "PCI ampci"); | 322 | request_mem_region(0xBFFFFFF4, 12, "PCI ampci"); |
323 | request_mem_region(0xBC000000, 32 * 1024 * 1024, "PCI SRAM"); | ||
300 | return 0; | 324 | return 0; |
301 | } | 325 | } |
302 | 326 | ||
@@ -358,6 +382,11 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus) | |||
358 | { | 382 | { |
359 | struct pci_dev *dev; | 383 | struct pci_dev *dev; |
360 | 384 | ||
385 | if (bus->number == 0) { | ||
386 | bus->resource[0] = &pci_ioport_resource; | ||
387 | bus->resource[1] = &pci_iomem_resource; | ||
388 | } | ||
389 | |||
361 | if (bus->self) { | 390 | if (bus->self) { |
362 | pci_read_bridge_bases(bus); | 391 | pci_read_bridge_bases(bus); |
363 | pcibios_fixup_device_resources(bus->self); | 392 | pcibios_fixup_device_resources(bus->self); |
@@ -380,6 +409,11 @@ static int __init pcibios_init(void) | |||
380 | iomem_resource.start = 0xA0000000; | 409 | iomem_resource.start = 0xA0000000; |
381 | iomem_resource.end = 0xDFFFFFFF; | 410 | iomem_resource.end = 0xDFFFFFFF; |
382 | 411 | ||
412 | if (insert_resource(&iomem_resource, &pci_iomem_resource) < 0) | ||
413 | panic("Unable to insert PCI IOMEM resource\n"); | ||
414 | if (insert_resource(&ioport_resource, &pci_ioport_resource) < 0) | ||
415 | panic("Unable to insert PCI IOPORT resource\n"); | ||
416 | |||
383 | if (!pci_probe) | 417 | if (!pci_probe) |
384 | return 0; | 418 | return 0; |
385 | 419 | ||
@@ -391,32 +425,11 @@ static int __init pcibios_init(void) | |||
391 | printk(KERN_INFO "PCI: Probing PCI hardware [mempage %08x]\n", | 425 | printk(KERN_INFO "PCI: Probing PCI hardware [mempage %08x]\n", |
392 | MEM_PAGING_REG); | 426 | MEM_PAGING_REG); |
393 | 427 | ||
394 | { | 428 | pci_root_bus = pci_scan_bus(0, &pci_direct_ampci, NULL); |
395 | #if 0 | ||
396 | static struct pci_bus am33_root_bus = { | ||
397 | .children = LIST_HEAD_INIT(am33_root_bus.children), | ||
398 | .devices = LIST_HEAD_INIT(am33_root_bus.devices), | ||
399 | .number = 0, | ||
400 | .secondary = 0, | ||
401 | .resource = { &ioport_resource, &iomem_resource }, | ||
402 | }; | ||
403 | |||
404 | am33_root_bus.ops = pci_root_ops; | ||
405 | list_add_tail(&am33_root_bus.node, &pci_root_buses); | ||
406 | |||
407 | am33_root_bus.subordinate = pci_do_scan_bus(0); | ||
408 | |||
409 | pci_root_bus = &am33_root_bus; | ||
410 | #else | ||
411 | pci_root_bus = pci_scan_bus(0, &pci_direct_ampci, NULL); | ||
412 | #endif | ||
413 | } | ||
414 | 429 | ||
415 | pcibios_irq_init(); | 430 | pcibios_irq_init(); |
416 | pcibios_fixup_irqs(); | 431 | pcibios_fixup_irqs(); |
417 | #if 0 | ||
418 | pcibios_resource_survey(); | 432 | pcibios_resource_survey(); |
419 | #endif | ||
420 | return 0; | 433 | return 0; |
421 | } | 434 | } |
422 | 435 | ||
@@ -440,7 +453,7 @@ int pcibios_enable_device(struct pci_dev *dev, int mask) | |||
440 | { | 453 | { |
441 | int err; | 454 | int err; |
442 | 455 | ||
443 | err = pcibios_enable_resources(dev, mask); | 456 | err = pci_enable_resources(dev, mask); |
444 | if (err == 0) | 457 | if (err == 0) |
445 | pcibios_enable_irq(dev); | 458 | pcibios_enable_irq(dev); |
446 | return err; | 459 | return err; |
@@ -455,6 +468,7 @@ static void __init unit_disable_pcnet(struct pci_bus *bus, struct pci_ops *o) | |||
455 | 468 | ||
456 | bus->number = 0; | 469 | bus->number = 0; |
457 | 470 | ||
471 | o->read (bus, PCI_DEVFN(2, 0), PCI_VENDOR_ID, 4, &x); | ||
458 | o->read (bus, PCI_DEVFN(2, 0), PCI_COMMAND, 2, &x); | 472 | o->read (bus, PCI_DEVFN(2, 0), PCI_COMMAND, 2, &x); |
459 | x |= PCI_COMMAND_MASTER | | 473 | x |= PCI_COMMAND_MASTER | |
460 | PCI_COMMAND_IO | PCI_COMMAND_MEMORY | | 474 | PCI_COMMAND_IO | PCI_COMMAND_MEMORY | |
diff --git a/arch/mn10300/unit-asb2305/unit-init.c b/arch/mn10300/unit-asb2305/unit-init.c index 1c452cc3f6e9..a76c8e0ab90f 100644 --- a/arch/mn10300/unit-asb2305/unit-init.c +++ b/arch/mn10300/unit-asb2305/unit-init.c | |||
@@ -15,9 +15,8 @@ | |||
15 | #include <asm/io.h> | 15 | #include <asm/io.h> |
16 | #include <asm/setup.h> | 16 | #include <asm/setup.h> |
17 | #include <asm/processor.h> | 17 | #include <asm/processor.h> |
18 | #include <asm/cpu/intctl-regs.h> | 18 | #include <asm/intctl-regs.h> |
19 | #include <asm/cpu/rtc-regs.h> | 19 | #include <asm/serial-regs.h> |
20 | #include <asm/cpu/serial-regs.h> | ||
21 | #include <unit/serial.h> | 20 | #include <unit/serial.h> |
22 | 21 | ||
23 | /* | 22 | /* |
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile index bb2465bcb327..826a30a00f59 100644 --- a/arch/powerpc/boot/Makefile +++ b/arch/powerpc/boot/Makefile | |||
@@ -20,7 +20,7 @@ | |||
20 | all: $(obj)/zImage | 20 | all: $(obj)/zImage |
21 | 21 | ||
22 | BOOTCFLAGS := -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \ | 22 | BOOTCFLAGS := -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \ |
23 | -fno-strict-aliasing -Os -msoft-float -pipe \ | 23 | -fno-strict-aliasing -Os -msoft-float -pipe -D__KERNEL__\ |
24 | -fomit-frame-pointer -fno-builtin -fPIC -nostdinc \ | 24 | -fomit-frame-pointer -fno-builtin -fPIC -nostdinc \ |
25 | -isystem $(shell $(CROSS32CC) -print-file-name=include) | 25 | -isystem $(shell $(CROSS32CC) -print-file-name=include) |
26 | BOOTAFLAGS := -D__ASSEMBLY__ $(BOOTCFLAGS) -traditional -nostdinc | 26 | BOOTAFLAGS := -D__ASSEMBLY__ $(BOOTCFLAGS) -traditional -nostdinc |
@@ -34,6 +34,8 @@ BOOTCFLAGS += -fno-stack-protector | |||
34 | endif | 34 | endif |
35 | 35 | ||
36 | BOOTCFLAGS += -I$(obj) -I$(srctree)/$(obj) | 36 | BOOTCFLAGS += -I$(obj) -I$(srctree)/$(obj) |
37 | BOOTCFLAGS += -include include/linux/autoconf.h -Iarch/powerpc/include | ||
38 | BOOTCFLAGS += -Iinclude | ||
37 | 39 | ||
38 | DTS_FLAGS ?= -p 1024 | 40 | DTS_FLAGS ?= -p 1024 |
39 | 41 | ||
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c index e8dfdbd9327a..cadbed679fbb 100644 --- a/arch/powerpc/kernel/pci-common.c +++ b/arch/powerpc/kernel/pci-common.c | |||
@@ -1107,6 +1107,12 @@ void __devinit pcibios_setup_bus_devices(struct pci_bus *bus) | |||
1107 | list_for_each_entry(dev, &bus->devices, bus_list) { | 1107 | list_for_each_entry(dev, &bus->devices, bus_list) { |
1108 | struct dev_archdata *sd = &dev->dev.archdata; | 1108 | struct dev_archdata *sd = &dev->dev.archdata; |
1109 | 1109 | ||
1110 | /* Cardbus can call us to add new devices to a bus, so ignore | ||
1111 | * those who are already fully discovered | ||
1112 | */ | ||
1113 | if (dev->is_added) | ||
1114 | continue; | ||
1115 | |||
1110 | /* Setup OF node pointer in archdata */ | 1116 | /* Setup OF node pointer in archdata */ |
1111 | sd->of_node = pci_device_to_OF_node(dev); | 1117 | sd->of_node = pci_device_to_OF_node(dev); |
1112 | 1118 | ||
@@ -1147,6 +1153,13 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus) | |||
1147 | } | 1153 | } |
1148 | EXPORT_SYMBOL(pcibios_fixup_bus); | 1154 | EXPORT_SYMBOL(pcibios_fixup_bus); |
1149 | 1155 | ||
1156 | void __devinit pci_fixup_cardbus(struct pci_bus *bus) | ||
1157 | { | ||
1158 | /* Now fixup devices on that bus */ | ||
1159 | pcibios_setup_bus_devices(bus); | ||
1160 | } | ||
1161 | |||
1162 | |||
1150 | static int skip_isa_ioresource_align(struct pci_dev *dev) | 1163 | static int skip_isa_ioresource_align(struct pci_dev *dev) |
1151 | { | 1164 | { |
1152 | if ((ppc_pci_flags & PPC_PCI_CAN_SKIP_ISA_ALIGN) && | 1165 | if ((ppc_pci_flags & PPC_PCI_CAN_SKIP_ISA_ALIGN) && |
diff --git a/arch/powerpc/kvm/book3s_64_mmu.c b/arch/powerpc/kvm/book3s_64_mmu.c index 5598f88f142e..e4beeb371a73 100644 --- a/arch/powerpc/kvm/book3s_64_mmu.c +++ b/arch/powerpc/kvm/book3s_64_mmu.c | |||
@@ -390,6 +390,26 @@ static void kvmppc_mmu_book3s_64_mtsrin(struct kvm_vcpu *vcpu, u32 srnum, | |||
390 | { | 390 | { |
391 | u64 rb = 0, rs = 0; | 391 | u64 rb = 0, rs = 0; |
392 | 392 | ||
393 | /* | ||
394 | * According to Book3 2.01 mtsrin is implemented as: | ||
395 | * | ||
396 | * The SLB entry specified by (RB)32:35 is loaded from register | ||
397 | * RS, as follows. | ||
398 | * | ||
399 | * SLBE Bit Source SLB Field | ||
400 | * | ||
401 | * 0:31 0x0000_0000 ESID-0:31 | ||
402 | * 32:35 (RB)32:35 ESID-32:35 | ||
403 | * 36 0b1 V | ||
404 | * 37:61 0x00_0000|| 0b0 VSID-0:24 | ||
405 | * 62:88 (RS)37:63 VSID-25:51 | ||
406 | * 89:91 (RS)33:35 Ks Kp N | ||
407 | * 92 (RS)36 L ((RS)36 must be 0b0) | ||
408 | * 93 0b0 C | ||
409 | */ | ||
410 | |||
411 | dprintk("KVM MMU: mtsrin(0x%x, 0x%lx)\n", srnum, value); | ||
412 | |||
393 | /* ESID = srnum */ | 413 | /* ESID = srnum */ |
394 | rb |= (srnum & 0xf) << 28; | 414 | rb |= (srnum & 0xf) << 28; |
395 | /* Set the valid bit */ | 415 | /* Set the valid bit */ |
@@ -400,7 +420,7 @@ static void kvmppc_mmu_book3s_64_mtsrin(struct kvm_vcpu *vcpu, u32 srnum, | |||
400 | /* VSID = VSID */ | 420 | /* VSID = VSID */ |
401 | rs |= (value & 0xfffffff) << 12; | 421 | rs |= (value & 0xfffffff) << 12; |
402 | /* flags = flags */ | 422 | /* flags = flags */ |
403 | rs |= ((value >> 27) & 0xf) << 9; | 423 | rs |= ((value >> 28) & 0x7) << 9; |
404 | 424 | ||
405 | kvmppc_mmu_book3s_64_slbmte(vcpu, rs, rb); | 425 | kvmppc_mmu_book3s_64_slbmte(vcpu, rs, rb); |
406 | } | 426 | } |
diff --git a/arch/s390/defconfig b/arch/s390/defconfig index f4e53c6708dc..b416aa11b91e 100644 --- a/arch/s390/defconfig +++ b/arch/s390/defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.31 | 3 | # Linux kernel version: 2.6.33-rc2 |
4 | # Tue Sep 22 17:43:13 2009 | 4 | # Mon Jan 4 09:03:07 2010 |
5 | # | 5 | # |
6 | CONFIG_SCHED_MC=y | 6 | CONFIG_SCHED_MC=y |
7 | CONFIG_MMU=y | 7 | CONFIG_MMU=y |
@@ -51,6 +51,7 @@ CONFIG_AUDIT=y | |||
51 | # | 51 | # |
52 | CONFIG_TREE_RCU=y | 52 | CONFIG_TREE_RCU=y |
53 | # CONFIG_TREE_PREEMPT_RCU is not set | 53 | # CONFIG_TREE_PREEMPT_RCU is not set |
54 | # CONFIG_TINY_RCU is not set | ||
54 | # CONFIG_RCU_TRACE is not set | 55 | # CONFIG_RCU_TRACE is not set |
55 | CONFIG_RCU_FANOUT=64 | 56 | CONFIG_RCU_FANOUT=64 |
56 | # CONFIG_RCU_FANOUT_EXACT is not set | 57 | # CONFIG_RCU_FANOUT_EXACT is not set |
@@ -113,7 +114,6 @@ CONFIG_HAVE_PERF_EVENTS=y | |||
113 | # CONFIG_PERF_EVENTS is not set | 114 | # CONFIG_PERF_EVENTS is not set |
114 | # CONFIG_PERF_COUNTERS is not set | 115 | # CONFIG_PERF_COUNTERS is not set |
115 | CONFIG_VM_EVENT_COUNTERS=y | 116 | CONFIG_VM_EVENT_COUNTERS=y |
116 | # CONFIG_STRIP_ASM_SYMS is not set | ||
117 | # CONFIG_COMPAT_BRK is not set | 117 | # CONFIG_COMPAT_BRK is not set |
118 | CONFIG_SLAB=y | 118 | CONFIG_SLAB=y |
119 | # CONFIG_SLUB is not set | 119 | # CONFIG_SLUB is not set |
@@ -149,21 +149,78 @@ CONFIG_STOP_MACHINE=y | |||
149 | CONFIG_BLOCK=y | 149 | CONFIG_BLOCK=y |
150 | CONFIG_BLK_DEV_BSG=y | 150 | CONFIG_BLK_DEV_BSG=y |
151 | # CONFIG_BLK_DEV_INTEGRITY is not set | 151 | # CONFIG_BLK_DEV_INTEGRITY is not set |
152 | # CONFIG_BLK_CGROUP is not set | ||
152 | CONFIG_BLOCK_COMPAT=y | 153 | CONFIG_BLOCK_COMPAT=y |
153 | 154 | ||
154 | # | 155 | # |
155 | # IO Schedulers | 156 | # IO Schedulers |
156 | # | 157 | # |
157 | CONFIG_IOSCHED_NOOP=y | 158 | CONFIG_IOSCHED_NOOP=y |
158 | CONFIG_IOSCHED_AS=y | ||
159 | CONFIG_IOSCHED_DEADLINE=y | 159 | CONFIG_IOSCHED_DEADLINE=y |
160 | CONFIG_IOSCHED_CFQ=y | 160 | CONFIG_IOSCHED_CFQ=y |
161 | # CONFIG_DEFAULT_AS is not set | 161 | # CONFIG_CFQ_GROUP_IOSCHED is not set |
162 | CONFIG_DEFAULT_DEADLINE=y | 162 | CONFIG_DEFAULT_DEADLINE=y |
163 | # CONFIG_DEFAULT_CFQ is not set | 163 | # CONFIG_DEFAULT_CFQ is not set |
164 | # CONFIG_DEFAULT_NOOP is not set | 164 | # CONFIG_DEFAULT_NOOP is not set |
165 | CONFIG_DEFAULT_IOSCHED="deadline" | 165 | CONFIG_DEFAULT_IOSCHED="deadline" |
166 | CONFIG_PREEMPT_NOTIFIERS=y | 166 | CONFIG_PREEMPT_NOTIFIERS=y |
167 | CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y | ||
168 | CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y | ||
169 | CONFIG_ARCH_INLINE_SPIN_LOCK=y | ||
170 | CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y | ||
171 | CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y | ||
172 | CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y | ||
173 | CONFIG_ARCH_INLINE_SPIN_UNLOCK=y | ||
174 | CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y | ||
175 | CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y | ||
176 | CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y | ||
177 | CONFIG_ARCH_INLINE_READ_TRYLOCK=y | ||
178 | CONFIG_ARCH_INLINE_READ_LOCK=y | ||
179 | CONFIG_ARCH_INLINE_READ_LOCK_BH=y | ||
180 | CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y | ||
181 | CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y | ||
182 | CONFIG_ARCH_INLINE_READ_UNLOCK=y | ||
183 | CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y | ||
184 | CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y | ||
185 | CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y | ||
186 | CONFIG_ARCH_INLINE_WRITE_TRYLOCK=y | ||
187 | CONFIG_ARCH_INLINE_WRITE_LOCK=y | ||
188 | CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y | ||
189 | CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y | ||
190 | CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y | ||
191 | CONFIG_ARCH_INLINE_WRITE_UNLOCK=y | ||
192 | CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y | ||
193 | CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y | ||
194 | CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y | ||
195 | # CONFIG_INLINE_SPIN_TRYLOCK is not set | ||
196 | # CONFIG_INLINE_SPIN_TRYLOCK_BH is not set | ||
197 | # CONFIG_INLINE_SPIN_LOCK is not set | ||
198 | # CONFIG_INLINE_SPIN_LOCK_BH is not set | ||
199 | # CONFIG_INLINE_SPIN_LOCK_IRQ is not set | ||
200 | # CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set | ||
201 | # CONFIG_INLINE_SPIN_UNLOCK is not set | ||
202 | # CONFIG_INLINE_SPIN_UNLOCK_BH is not set | ||
203 | # CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set | ||
204 | # CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set | ||
205 | # CONFIG_INLINE_READ_TRYLOCK is not set | ||
206 | # CONFIG_INLINE_READ_LOCK is not set | ||
207 | # CONFIG_INLINE_READ_LOCK_BH is not set | ||
208 | # CONFIG_INLINE_READ_LOCK_IRQ is not set | ||
209 | # CONFIG_INLINE_READ_LOCK_IRQSAVE is not set | ||
210 | # CONFIG_INLINE_READ_UNLOCK is not set | ||
211 | # CONFIG_INLINE_READ_UNLOCK_BH is not set | ||
212 | # CONFIG_INLINE_READ_UNLOCK_IRQ is not set | ||
213 | # CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set | ||
214 | # CONFIG_INLINE_WRITE_TRYLOCK is not set | ||
215 | # CONFIG_INLINE_WRITE_LOCK is not set | ||
216 | # CONFIG_INLINE_WRITE_LOCK_BH is not set | ||
217 | # CONFIG_INLINE_WRITE_LOCK_IRQ is not set | ||
218 | # CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set | ||
219 | # CONFIG_INLINE_WRITE_UNLOCK is not set | ||
220 | # CONFIG_INLINE_WRITE_UNLOCK_BH is not set | ||
221 | # CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set | ||
222 | # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | ||
223 | # CONFIG_MUTEX_SPIN_ON_OWNER is not set | ||
167 | CONFIG_FREEZER=y | 224 | CONFIG_FREEZER=y |
168 | 225 | ||
169 | # | 226 | # |
@@ -227,14 +284,13 @@ CONFIG_MEMORY_HOTPLUG=y | |||
227 | CONFIG_MEMORY_HOTPLUG_SPARSE=y | 284 | CONFIG_MEMORY_HOTPLUG_SPARSE=y |
228 | CONFIG_MEMORY_HOTREMOVE=y | 285 | CONFIG_MEMORY_HOTREMOVE=y |
229 | CONFIG_PAGEFLAGS_EXTENDED=y | 286 | CONFIG_PAGEFLAGS_EXTENDED=y |
230 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 287 | CONFIG_SPLIT_PTLOCK_CPUS=999999 |
231 | CONFIG_MIGRATION=y | 288 | CONFIG_MIGRATION=y |
232 | CONFIG_PHYS_ADDR_T_64BIT=y | 289 | CONFIG_PHYS_ADDR_T_64BIT=y |
233 | CONFIG_ZONE_DMA_FLAG=1 | 290 | CONFIG_ZONE_DMA_FLAG=1 |
234 | CONFIG_BOUNCE=y | 291 | CONFIG_BOUNCE=y |
235 | CONFIG_VIRT_TO_BUS=y | 292 | CONFIG_VIRT_TO_BUS=y |
236 | CONFIG_HAVE_MLOCK=y | 293 | # CONFIG_KSM is not set |
237 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
238 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | 294 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 |
239 | 295 | ||
240 | # | 296 | # |
@@ -339,6 +395,7 @@ CONFIG_INET6_XFRM_MODE_TUNNEL=y | |||
339 | CONFIG_INET6_XFRM_MODE_BEET=y | 395 | CONFIG_INET6_XFRM_MODE_BEET=y |
340 | # CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set | 396 | # CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set |
341 | CONFIG_IPV6_SIT=y | 397 | CONFIG_IPV6_SIT=y |
398 | # CONFIG_IPV6_SIT_6RD is not set | ||
342 | CONFIG_IPV6_NDISC_NODETYPE=y | 399 | CONFIG_IPV6_NDISC_NODETYPE=y |
343 | # CONFIG_IPV6_TUNNEL is not set | 400 | # CONFIG_IPV6_TUNNEL is not set |
344 | # CONFIG_IPV6_MULTIPLE_TABLES is not set | 401 | # CONFIG_IPV6_MULTIPLE_TABLES is not set |
@@ -504,6 +561,10 @@ CONFIG_BLK_DEV=y | |||
504 | # CONFIG_BLK_DEV_COW_COMMON is not set | 561 | # CONFIG_BLK_DEV_COW_COMMON is not set |
505 | CONFIG_BLK_DEV_LOOP=m | 562 | CONFIG_BLK_DEV_LOOP=m |
506 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | 563 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set |
564 | |||
565 | # | ||
566 | # DRBD disabled because PROC_FS, INET or CONNECTOR not selected | ||
567 | # | ||
507 | CONFIG_BLK_DEV_NBD=m | 568 | CONFIG_BLK_DEV_NBD=m |
508 | # CONFIG_BLK_DEV_OSD is not set | 569 | # CONFIG_BLK_DEV_OSD is not set |
509 | CONFIG_BLK_DEV_RAM=y | 570 | CONFIG_BLK_DEV_RAM=y |
@@ -710,7 +771,6 @@ CONFIG_S390_VMUR=m | |||
710 | # CONFIG_PPS is not set | 771 | # CONFIG_PPS is not set |
711 | # CONFIG_POWER_SUPPLY is not set | 772 | # CONFIG_POWER_SUPPLY is not set |
712 | # CONFIG_THERMAL is not set | 773 | # CONFIG_THERMAL is not set |
713 | # CONFIG_THERMAL_HWMON is not set | ||
714 | # CONFIG_WATCHDOG is not set | 774 | # CONFIG_WATCHDOG is not set |
715 | # CONFIG_REGULATOR is not set | 775 | # CONFIG_REGULATOR is not set |
716 | # CONFIG_MEMSTICK is not set | 776 | # CONFIG_MEMSTICK is not set |
@@ -864,6 +924,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y | |||
864 | CONFIG_ENABLE_MUST_CHECK=y | 924 | CONFIG_ENABLE_MUST_CHECK=y |
865 | CONFIG_FRAME_WARN=2048 | 925 | CONFIG_FRAME_WARN=2048 |
866 | CONFIG_MAGIC_SYSRQ=y | 926 | CONFIG_MAGIC_SYSRQ=y |
927 | # CONFIG_STRIP_ASM_SYMS is not set | ||
867 | # CONFIG_UNUSED_SYMBOLS is not set | 928 | # CONFIG_UNUSED_SYMBOLS is not set |
868 | CONFIG_DEBUG_FS=y | 929 | CONFIG_DEBUG_FS=y |
869 | # CONFIG_HEADERS_CHECK is not set | 930 | # CONFIG_HEADERS_CHECK is not set |
@@ -931,7 +992,6 @@ CONFIG_BRANCH_PROFILE_NONE=y | |||
931 | CONFIG_SAMPLES=y | 992 | CONFIG_SAMPLES=y |
932 | # CONFIG_SAMPLE_KOBJECT is not set | 993 | # CONFIG_SAMPLE_KOBJECT is not set |
933 | # CONFIG_SAMPLE_KPROBES is not set | 994 | # CONFIG_SAMPLE_KPROBES is not set |
934 | # CONFIG_KMEMCHECK is not set | ||
935 | 995 | ||
936 | # | 996 | # |
937 | # Security options | 997 | # Security options |
@@ -939,7 +999,11 @@ CONFIG_SAMPLES=y | |||
939 | # CONFIG_KEYS is not set | 999 | # CONFIG_KEYS is not set |
940 | # CONFIG_SECURITY is not set | 1000 | # CONFIG_SECURITY is not set |
941 | # CONFIG_SECURITYFS is not set | 1001 | # CONFIG_SECURITYFS is not set |
942 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | 1002 | # CONFIG_DEFAULT_SECURITY_SELINUX is not set |
1003 | # CONFIG_DEFAULT_SECURITY_SMACK is not set | ||
1004 | # CONFIG_DEFAULT_SECURITY_TOMOYO is not set | ||
1005 | CONFIG_DEFAULT_SECURITY_DAC=y | ||
1006 | CONFIG_DEFAULT_SECURITY="" | ||
943 | CONFIG_CRYPTO=y | 1007 | CONFIG_CRYPTO=y |
944 | 1008 | ||
945 | # | 1009 | # |
diff --git a/arch/s390/include/asm/param.h b/arch/s390/include/asm/param.h index 34aaa4603347..c616821bf2ac 100644 --- a/arch/s390/include/asm/param.h +++ b/arch/s390/include/asm/param.h | |||
@@ -1,30 +1,6 @@ | |||
1 | /* | ||
2 | * include/asm-s390/param.h | ||
3 | * | ||
4 | * S390 version | ||
5 | * | ||
6 | * Derived from "include/asm-i386/param.h" | ||
7 | */ | ||
8 | |||
9 | #ifndef _ASMS390_PARAM_H | 1 | #ifndef _ASMS390_PARAM_H |
10 | #define _ASMS390_PARAM_H | 2 | #define _ASMS390_PARAM_H |
11 | 3 | ||
12 | #ifdef __KERNEL__ | 4 | #include <asm-generic/param.h> |
13 | # define HZ CONFIG_HZ /* Internal kernel timer frequency */ | ||
14 | # define USER_HZ 100 /* .. some user interfaces are in "ticks" */ | ||
15 | # define CLOCKS_PER_SEC (USER_HZ) /* like times() */ | ||
16 | #endif | ||
17 | |||
18 | #ifndef HZ | ||
19 | #define HZ 100 | ||
20 | #endif | ||
21 | |||
22 | #define EXEC_PAGESIZE 4096 | ||
23 | |||
24 | #ifndef NOGROUP | ||
25 | #define NOGROUP (-1) | ||
26 | #endif | ||
27 | |||
28 | #define MAXHOSTNAMELEN 64 /* max length of hostname */ | ||
29 | 5 | ||
30 | #endif | 6 | #endif /* _ASMS390_PARAM_H */ |
diff --git a/arch/score/mm/init.c b/arch/score/mm/init.c index 8c15b2c85d5a..dfaf458d6702 100644 --- a/arch/score/mm/init.c +++ b/arch/score/mm/init.c | |||
@@ -106,7 +106,7 @@ void __init mem_init(void) | |||
106 | ram << (PAGE_SHIFT-10), codesize >> 10, | 106 | ram << (PAGE_SHIFT-10), codesize >> 10, |
107 | reservedpages << (PAGE_SHIFT-10), datasize >> 10, | 107 | reservedpages << (PAGE_SHIFT-10), datasize >> 10, |
108 | initsize >> 10, | 108 | initsize >> 10, |
109 | (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10))); | 109 | totalhigh_pages << (PAGE_SHIFT-10)); |
110 | } | 110 | } |
111 | #endif /* !CONFIG_NEED_MULTIPLE_NODES */ | 111 | #endif /* !CONFIG_NEED_MULTIPLE_NODES */ |
112 | 112 | ||
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index ae6c73689036..4eaf3401a15e 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig | |||
@@ -42,6 +42,8 @@ config SUPERH32 | |||
42 | select HAVE_FTRACE_NMI_ENTER if DYNAMIC_FTRACE | 42 | select HAVE_FTRACE_NMI_ENTER if DYNAMIC_FTRACE |
43 | select HAVE_FUNCTION_GRAPH_TRACER | 43 | select HAVE_FUNCTION_GRAPH_TRACER |
44 | select HAVE_ARCH_KGDB | 44 | select HAVE_ARCH_KGDB |
45 | select HAVE_HW_BREAKPOINT | ||
46 | select PERF_EVENTS if HAVE_HW_BREAKPOINT | ||
45 | select ARCH_HIBERNATION_POSSIBLE if MMU | 47 | select ARCH_HIBERNATION_POSSIBLE if MMU |
46 | 48 | ||
47 | config SUPERH64 | 49 | config SUPERH64 |
diff --git a/arch/sh/include/asm/Kbuild b/arch/sh/include/asm/Kbuild index e121c30f797d..46cb93477bcb 100644 --- a/arch/sh/include/asm/Kbuild +++ b/arch/sh/include/asm/Kbuild | |||
@@ -1,6 +1,8 @@ | |||
1 | include include/asm-generic/Kbuild.asm | 1 | include include/asm-generic/Kbuild.asm |
2 | 2 | ||
3 | header-y += cachectl.h cpu-features.h | 3 | header-y += cachectl.h |
4 | header-y += cpu-features.h | ||
5 | header-y += hw_breakpoint.h | ||
4 | 6 | ||
5 | unifdef-y += unistd_32.h | 7 | unifdef-y += unistd_32.h |
6 | unifdef-y += unistd_64.h | 8 | unifdef-y += unistd_64.h |
diff --git a/arch/sh/include/asm/fpu.h b/arch/sh/include/asm/fpu.h index fb6bbb9b1cc8..06c4281aab65 100644 --- a/arch/sh/include/asm/fpu.h +++ b/arch/sh/include/asm/fpu.h | |||
@@ -2,8 +2,8 @@ | |||
2 | #define __ASM_SH_FPU_H | 2 | #define __ASM_SH_FPU_H |
3 | 3 | ||
4 | #ifndef __ASSEMBLY__ | 4 | #ifndef __ASSEMBLY__ |
5 | #include <linux/preempt.h> | 5 | |
6 | #include <asm/ptrace.h> | 6 | struct task_struct; |
7 | 7 | ||
8 | #ifdef CONFIG_SH_FPU | 8 | #ifdef CONFIG_SH_FPU |
9 | static inline void release_fpu(struct pt_regs *regs) | 9 | static inline void release_fpu(struct pt_regs *regs) |
@@ -16,22 +16,23 @@ static inline void grab_fpu(struct pt_regs *regs) | |||
16 | regs->sr &= ~SR_FD; | 16 | regs->sr &= ~SR_FD; |
17 | } | 17 | } |
18 | 18 | ||
19 | struct task_struct; | ||
20 | |||
21 | extern void save_fpu(struct task_struct *__tsk); | 19 | extern void save_fpu(struct task_struct *__tsk); |
22 | void fpu_state_restore(struct pt_regs *regs); | 20 | extern void restore_fpu(struct task_struct *__tsk); |
21 | extern void fpu_state_restore(struct pt_regs *regs); | ||
22 | extern void __fpu_state_restore(void); | ||
23 | #else | 23 | #else |
24 | 24 | #define save_fpu(tsk) do { } while (0) | |
25 | #define save_fpu(tsk) do { } while (0) | 25 | #define restore_fpu(tsk) do { } while (0) |
26 | #define release_fpu(regs) do { } while (0) | 26 | #define release_fpu(regs) do { } while (0) |
27 | #define grab_fpu(regs) do { } while (0) | 27 | #define grab_fpu(regs) do { } while (0) |
28 | #define fpu_state_restore(regs) do { } while (0) | 28 | #define fpu_state_restore(regs) do { } while (0) |
29 | 29 | #define __fpu_state_restore(regs) do { } while (0) | |
30 | #endif | 30 | #endif |
31 | 31 | ||
32 | struct user_regset; | 32 | struct user_regset; |
33 | 33 | ||
34 | extern int do_fpu_inst(unsigned short, struct pt_regs *); | 34 | extern int do_fpu_inst(unsigned short, struct pt_regs *); |
35 | extern int init_fpu(struct task_struct *); | ||
35 | 36 | ||
36 | extern int fpregs_get(struct task_struct *target, | 37 | extern int fpregs_get(struct task_struct *target, |
37 | const struct user_regset *regset, | 38 | const struct user_regset *regset, |
@@ -65,18 +66,6 @@ static inline void clear_fpu(struct task_struct *tsk, struct pt_regs *regs) | |||
65 | preempt_enable(); | 66 | preempt_enable(); |
66 | } | 67 | } |
67 | 68 | ||
68 | static inline int init_fpu(struct task_struct *tsk) | ||
69 | { | ||
70 | if (tsk_used_math(tsk)) { | ||
71 | if ((boot_cpu_data.flags & CPU_HAS_FPU) && tsk == current) | ||
72 | unlazy_fpu(tsk, task_pt_regs(tsk)); | ||
73 | return 0; | ||
74 | } | ||
75 | |||
76 | set_stopped_child_used_math(tsk); | ||
77 | return 0; | ||
78 | } | ||
79 | |||
80 | #endif /* __ASSEMBLY__ */ | 69 | #endif /* __ASSEMBLY__ */ |
81 | 70 | ||
82 | #endif /* __ASM_SH_FPU_H */ | 71 | #endif /* __ASM_SH_FPU_H */ |
diff --git a/arch/sh/include/asm/hw_breakpoint.h b/arch/sh/include/asm/hw_breakpoint.h new file mode 100644 index 000000000000..7295d6290249 --- /dev/null +++ b/arch/sh/include/asm/hw_breakpoint.h | |||
@@ -0,0 +1,67 @@ | |||
1 | #ifndef __ASM_SH_HW_BREAKPOINT_H | ||
2 | #define __ASM_SH_HW_BREAKPOINT_H | ||
3 | |||
4 | #include <linux/kdebug.h> | ||
5 | #include <linux/types.h> | ||
6 | |||
7 | #ifdef __KERNEL__ | ||
8 | #define __ARCH_HW_BREAKPOINT_H | ||
9 | |||
10 | struct arch_hw_breakpoint { | ||
11 | char *name; /* Contains name of the symbol to set bkpt */ | ||
12 | unsigned long address; | ||
13 | u16 len; | ||
14 | u16 type; | ||
15 | }; | ||
16 | |||
17 | enum { | ||
18 | SH_BREAKPOINT_READ = (1 << 1), | ||
19 | SH_BREAKPOINT_WRITE = (1 << 2), | ||
20 | SH_BREAKPOINT_RW = SH_BREAKPOINT_READ | SH_BREAKPOINT_WRITE, | ||
21 | |||
22 | SH_BREAKPOINT_LEN_1 = (1 << 12), | ||
23 | SH_BREAKPOINT_LEN_2 = (1 << 13), | ||
24 | SH_BREAKPOINT_LEN_4 = SH_BREAKPOINT_LEN_1 | SH_BREAKPOINT_LEN_2, | ||
25 | SH_BREAKPOINT_LEN_8 = (1 << 14), | ||
26 | }; | ||
27 | |||
28 | struct sh_ubc { | ||
29 | const char *name; | ||
30 | unsigned int num_events; | ||
31 | unsigned int trap_nr; | ||
32 | void (*enable)(struct arch_hw_breakpoint *, int); | ||
33 | void (*disable)(struct arch_hw_breakpoint *, int); | ||
34 | void (*enable_all)(unsigned long); | ||
35 | void (*disable_all)(void); | ||
36 | unsigned long (*active_mask)(void); | ||
37 | unsigned long (*triggered_mask)(void); | ||
38 | void (*clear_triggered_mask)(unsigned long); | ||
39 | struct clk *clk; /* optional interface clock / MSTP bit */ | ||
40 | }; | ||
41 | |||
42 | struct perf_event; | ||
43 | struct task_struct; | ||
44 | struct pmu; | ||
45 | |||
46 | /* Maximum number of UBC channels */ | ||
47 | #define HBP_NUM 2 | ||
48 | |||
49 | /* arch/sh/kernel/hw_breakpoint.c */ | ||
50 | extern int arch_check_va_in_userspace(unsigned long va, u16 hbp_len); | ||
51 | extern int arch_validate_hwbkpt_settings(struct perf_event *bp, | ||
52 | struct task_struct *tsk); | ||
53 | extern int hw_breakpoint_exceptions_notify(struct notifier_block *unused, | ||
54 | unsigned long val, void *data); | ||
55 | |||
56 | int arch_install_hw_breakpoint(struct perf_event *bp); | ||
57 | void arch_uninstall_hw_breakpoint(struct perf_event *bp); | ||
58 | void hw_breakpoint_pmu_read(struct perf_event *bp); | ||
59 | void hw_breakpoint_pmu_unthrottle(struct perf_event *bp); | ||
60 | |||
61 | extern void arch_fill_perf_breakpoint(struct perf_event *bp); | ||
62 | extern int register_sh_ubc(struct sh_ubc *); | ||
63 | |||
64 | extern struct pmu perf_ops_bp; | ||
65 | |||
66 | #endif /* __KERNEL__ */ | ||
67 | #endif /* __ASM_SH_HW_BREAKPOINT_H */ | ||
diff --git a/arch/sh/include/asm/kdebug.h b/arch/sh/include/asm/kdebug.h index 985219f9759e..5f6d2e9ccb7c 100644 --- a/arch/sh/include/asm/kdebug.h +++ b/arch/sh/include/asm/kdebug.h | |||
@@ -6,6 +6,8 @@ enum die_val { | |||
6 | DIE_TRAP, | 6 | DIE_TRAP, |
7 | DIE_NMI, | 7 | DIE_NMI, |
8 | DIE_OOPS, | 8 | DIE_OOPS, |
9 | DIE_BREAKPOINT, | ||
10 | DIE_SSTEP, | ||
9 | }; | 11 | }; |
10 | 12 | ||
11 | #endif /* __ASM_SH_KDEBUG_H */ | 13 | #endif /* __ASM_SH_KDEBUG_H */ |
diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h index 1f3d6fab660c..5fd83125fb89 100644 --- a/arch/sh/include/asm/processor_32.h +++ b/arch/sh/include/asm/processor_32.h | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <asm/page.h> | 14 | #include <asm/page.h> |
15 | #include <asm/types.h> | 15 | #include <asm/types.h> |
16 | #include <asm/ptrace.h> | 16 | #include <asm/ptrace.h> |
17 | #include <asm/hw_breakpoint.h> | ||
17 | 18 | ||
18 | /* | 19 | /* |
19 | * Default implementation of macro that returns current | 20 | * Default implementation of macro that returns current |
@@ -90,48 +91,40 @@ struct sh_fpu_soft_struct { | |||
90 | unsigned long entry_pc; | 91 | unsigned long entry_pc; |
91 | }; | 92 | }; |
92 | 93 | ||
93 | union sh_fpu_union { | 94 | union thread_xstate { |
94 | struct sh_fpu_hard_struct hard; | 95 | struct sh_fpu_hard_struct hardfpu; |
95 | struct sh_fpu_soft_struct soft; | 96 | struct sh_fpu_soft_struct softfpu; |
96 | }; | 97 | }; |
97 | 98 | ||
99 | extern unsigned int xstate_size; | ||
100 | extern void free_thread_xstate(struct task_struct *); | ||
101 | extern struct kmem_cache *task_xstate_cachep; | ||
102 | |||
98 | struct thread_struct { | 103 | struct thread_struct { |
99 | /* Saved registers when thread is descheduled */ | 104 | /* Saved registers when thread is descheduled */ |
100 | unsigned long sp; | 105 | unsigned long sp; |
101 | unsigned long pc; | 106 | unsigned long pc; |
102 | 107 | ||
103 | /* Hardware debugging registers */ | 108 | /* Save middle states of ptrace breakpoints */ |
104 | unsigned long ubc_pc; | 109 | struct perf_event *ptrace_bps[HBP_NUM]; |
105 | |||
106 | /* floating point info */ | ||
107 | union sh_fpu_union fpu; | ||
108 | 110 | ||
109 | #ifdef CONFIG_SH_DSP | 111 | #ifdef CONFIG_SH_DSP |
110 | /* Dsp status information */ | 112 | /* Dsp status information */ |
111 | struct sh_dsp_struct dsp_status; | 113 | struct sh_dsp_struct dsp_status; |
112 | #endif | 114 | #endif |
113 | }; | ||
114 | 115 | ||
115 | /* Count of active tasks with UBC settings */ | 116 | /* Extended processor state */ |
116 | extern int ubc_usercnt; | 117 | union thread_xstate *xstate; |
118 | }; | ||
117 | 119 | ||
118 | #define INIT_THREAD { \ | 120 | #define INIT_THREAD { \ |
119 | .sp = sizeof(init_stack) + (long) &init_stack, \ | 121 | .sp = sizeof(init_stack) + (long) &init_stack, \ |
120 | } | 122 | } |
121 | 123 | ||
122 | /* | ||
123 | * Do necessary setup to start up a newly executed thread. | ||
124 | */ | ||
125 | #define start_thread(_regs, new_pc, new_sp) \ | ||
126 | set_fs(USER_DS); \ | ||
127 | _regs->pr = 0; \ | ||
128 | _regs->sr = SR_FD; /* User mode. */ \ | ||
129 | _regs->pc = new_pc; \ | ||
130 | _regs->regs[15] = new_sp | ||
131 | |||
132 | /* Forward declaration, a strange C thing */ | 124 | /* Forward declaration, a strange C thing */ |
133 | struct task_struct; | 125 | struct task_struct; |
134 | struct mm_struct; | 126 | |
127 | extern void start_thread(struct pt_regs *regs, unsigned long new_pc, unsigned long new_sp); | ||
135 | 128 | ||
136 | /* Free all resources held by a thread. */ | 129 | /* Free all resources held by a thread. */ |
137 | extern void release_thread(struct task_struct *); | 130 | extern void release_thread(struct task_struct *); |
diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h index 1dc12cb44a2d..201d11ef211f 100644 --- a/arch/sh/include/asm/ptrace.h +++ b/arch/sh/include/asm/ptrace.h | |||
@@ -124,6 +124,12 @@ struct task_struct; | |||
124 | extern void user_enable_single_step(struct task_struct *); | 124 | extern void user_enable_single_step(struct task_struct *); |
125 | extern void user_disable_single_step(struct task_struct *); | 125 | extern void user_disable_single_step(struct task_struct *); |
126 | 126 | ||
127 | struct perf_event; | ||
128 | struct perf_sample_data; | ||
129 | |||
130 | extern void ptrace_triggered(struct perf_event *bp, int nmi, | ||
131 | struct perf_sample_data *data, struct pt_regs *regs); | ||
132 | |||
127 | #define task_pt_regs(task) \ | 133 | #define task_pt_regs(task) \ |
128 | ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE) - 1) | 134 | ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE) - 1) |
129 | 135 | ||
diff --git a/arch/sh/include/asm/system.h b/arch/sh/include/asm/system.h index b74d2532cc27..62e4fc1e4409 100644 --- a/arch/sh/include/asm/system.h +++ b/arch/sh/include/asm/system.h | |||
@@ -144,8 +144,6 @@ void per_cpu_trap_init(void); | |||
144 | void default_idle(void); | 144 | void default_idle(void); |
145 | void cpu_idle_wait(void); | 145 | void cpu_idle_wait(void); |
146 | 146 | ||
147 | asmlinkage void break_point_trap(void); | ||
148 | |||
149 | #ifdef CONFIG_SUPERH32 | 147 | #ifdef CONFIG_SUPERH32 |
150 | #define BUILD_TRAP_HANDLER(name) \ | 148 | #define BUILD_TRAP_HANDLER(name) \ |
151 | asmlinkage void name##_trap_handler(unsigned long r4, unsigned long r5, \ | 149 | asmlinkage void name##_trap_handler(unsigned long r4, unsigned long r5, \ |
diff --git a/arch/sh/include/asm/thread_info.h b/arch/sh/include/asm/thread_info.h index 1f3d927e2265..55a36fef6875 100644 --- a/arch/sh/include/asm/thread_info.h +++ b/arch/sh/include/asm/thread_info.h | |||
@@ -93,14 +93,16 @@ static inline struct thread_info *current_thread_info(void) | |||
93 | 93 | ||
94 | #define THREAD_SIZE_ORDER (THREAD_SHIFT - PAGE_SHIFT) | 94 | #define THREAD_SIZE_ORDER (THREAD_SHIFT - PAGE_SHIFT) |
95 | 95 | ||
96 | #else /* THREAD_SHIFT < PAGE_SHIFT */ | 96 | #endif |
97 | |||
98 | #define __HAVE_ARCH_THREAD_INFO_ALLOCATOR | ||
99 | 97 | ||
100 | extern struct thread_info *alloc_thread_info(struct task_struct *tsk); | 98 | extern struct thread_info *alloc_thread_info(struct task_struct *tsk); |
101 | extern void free_thread_info(struct thread_info *ti); | 99 | extern void free_thread_info(struct thread_info *ti); |
100 | extern void arch_task_cache_init(void); | ||
101 | #define arch_task_cache_init arch_task_cache_init | ||
102 | extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src); | ||
103 | extern void init_thread_xstate(void); | ||
102 | 104 | ||
103 | #endif /* THREAD_SHIFT < PAGE_SHIFT */ | 105 | #define __HAVE_ARCH_THREAD_INFO_ALLOCATOR |
104 | 106 | ||
105 | #endif /* __ASSEMBLY__ */ | 107 | #endif /* __ASSEMBLY__ */ |
106 | 108 | ||
diff --git a/arch/sh/include/asm/ubc.h b/arch/sh/include/asm/ubc.h deleted file mode 100644 index 9bf961684431..000000000000 --- a/arch/sh/include/asm/ubc.h +++ /dev/null | |||
@@ -1,64 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/ubc.h | ||
3 | * | ||
4 | * Copyright (C) 1999 Niibe Yutaka | ||
5 | * Copyright (C) 2002, 2003 Paul Mundt | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General Public | ||
8 | * License. See the file "COPYING" in the main directory of this archive | ||
9 | * for more details. | ||
10 | */ | ||
11 | #ifndef __ASM_SH_UBC_H | ||
12 | #define __ASM_SH_UBC_H | ||
13 | #ifdef __KERNEL__ | ||
14 | |||
15 | #include <cpu/ubc.h> | ||
16 | |||
17 | /* User Break Controller */ | ||
18 | #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) | ||
19 | #define UBC_TYPE_SH7729 (current_cpu_data.type == CPU_SH7729) | ||
20 | #else | ||
21 | #define UBC_TYPE_SH7729 0 | ||
22 | #endif | ||
23 | |||
24 | #define BAMR_ASID (1 << 2) | ||
25 | #define BAMR_NONE 0 | ||
26 | #define BAMR_10 0x1 | ||
27 | #define BAMR_12 0x2 | ||
28 | #define BAMR_ALL 0x3 | ||
29 | #define BAMR_16 0x8 | ||
30 | #define BAMR_20 0x9 | ||
31 | |||
32 | #define BBR_INST (1 << 4) | ||
33 | #define BBR_DATA (2 << 4) | ||
34 | #define BBR_READ (1 << 2) | ||
35 | #define BBR_WRITE (2 << 2) | ||
36 | #define BBR_BYTE 0x1 | ||
37 | #define BBR_HALF 0x2 | ||
38 | #define BBR_LONG 0x3 | ||
39 | #define BBR_QUAD (1 << 6) /* SH7750 */ | ||
40 | #define BBR_CPU (1 << 6) /* SH7709A,SH7729 */ | ||
41 | #define BBR_DMA (2 << 6) /* SH7709A,SH7729 */ | ||
42 | |||
43 | #define BRCR_CMFA (1 << 15) | ||
44 | #define BRCR_CMFB (1 << 14) | ||
45 | |||
46 | #if defined CONFIG_CPU_SH2A | ||
47 | #define BRCR_CMFCA (1 << 15) | ||
48 | #define BRCR_CMFCB (1 << 14) | ||
49 | #define BRCR_CMFDA (1 << 13) | ||
50 | #define BRCR_CMFDB (1 << 12) | ||
51 | #define BRCR_PCBB (1 << 6) /* 1: after execution */ | ||
52 | #define BRCR_PCBA (1 << 5) /* 1: after execution */ | ||
53 | #define BRCR_PCTE 0 | ||
54 | #else | ||
55 | #define BRCR_PCTE (1 << 11) | ||
56 | #define BRCR_PCBA (1 << 10) /* 1: after execution */ | ||
57 | #define BRCR_DBEB (1 << 7) | ||
58 | #define BRCR_PCBB (1 << 6) | ||
59 | #define BRCR_SEQ (1 << 3) | ||
60 | #define BRCR_UBDE (1 << 0) | ||
61 | #endif | ||
62 | |||
63 | #endif /* __KERNEL__ */ | ||
64 | #endif /* __ASM_SH_UBC_H */ | ||
diff --git a/arch/sh/include/cpu-sh2/cpu/ubc.h b/arch/sh/include/cpu-sh2/cpu/ubc.h deleted file mode 100644 index ba0e87f19c7a..000000000000 --- a/arch/sh/include/cpu-sh2/cpu/ubc.h +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh2/ubc.h | ||
3 | * | ||
4 | * Copyright (C) 2003 Paul Mundt | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef __ASM_CPU_SH2_UBC_H | ||
11 | #define __ASM_CPU_SH2_UBC_H | ||
12 | |||
13 | #define UBC_BARA 0xffffff40 | ||
14 | #define UBC_BAMRA 0xffffff44 | ||
15 | #define UBC_BBRA 0xffffff48 | ||
16 | #define UBC_BARB 0xffffff60 | ||
17 | #define UBC_BAMRB 0xffffff64 | ||
18 | #define UBC_BBRB 0xffffff68 | ||
19 | #define UBC_BDRB 0xffffff70 | ||
20 | #define UBC_BDMRB 0xffffff74 | ||
21 | #define UBC_BRCR 0xffffff78 | ||
22 | |||
23 | /* | ||
24 | * We don't have any ASID changes to make in the UBC on the SH-2. | ||
25 | * | ||
26 | * Make these purposely invalid to track misuse. | ||
27 | */ | ||
28 | #define UBC_BASRA 0x00000000 | ||
29 | #define UBC_BASRB 0x00000000 | ||
30 | |||
31 | #endif /* __ASM_CPU_SH2_UBC_H */ | ||
32 | |||
diff --git a/arch/sh/include/cpu-sh3/cpu/ubc.h b/arch/sh/include/cpu-sh3/cpu/ubc.h deleted file mode 100644 index 4e6381d5ff7a..000000000000 --- a/arch/sh/include/cpu-sh3/cpu/ubc.h +++ /dev/null | |||
@@ -1,42 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh3/ubc.h | ||
3 | * | ||
4 | * Copyright (C) 1999 Niibe Yutaka | ||
5 | * Copyright (C) 2003 Paul Mundt | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General Public | ||
8 | * License. See the file "COPYING" in the main directory of this archive | ||
9 | * for more details. | ||
10 | */ | ||
11 | #ifndef __ASM_CPU_SH3_UBC_H | ||
12 | #define __ASM_CPU_SH3_UBC_H | ||
13 | |||
14 | #if defined(CONFIG_CPU_SUBTYPE_SH7710) || \ | ||
15 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | ||
16 | defined(CONFIG_CPU_SUBTYPE_SH7721) | ||
17 | #define UBC_BARA 0xa4ffffb0 | ||
18 | #define UBC_BAMRA 0xa4ffffb4 | ||
19 | #define UBC_BBRA 0xa4ffffb8 | ||
20 | #define UBC_BASRA 0xffffffe4 | ||
21 | #define UBC_BARB 0xa4ffffa0 | ||
22 | #define UBC_BAMRB 0xa4ffffa4 | ||
23 | #define UBC_BBRB 0xa4ffffa8 | ||
24 | #define UBC_BASRB 0xffffffe8 | ||
25 | #define UBC_BDRB 0xa4ffff90 | ||
26 | #define UBC_BDMRB 0xa4ffff94 | ||
27 | #define UBC_BRCR 0xa4ffff98 | ||
28 | #else | ||
29 | #define UBC_BARA 0xffffffb0 | ||
30 | #define UBC_BAMRA 0xffffffb4 | ||
31 | #define UBC_BBRA 0xffffffb8 | ||
32 | #define UBC_BASRA 0xffffffe4 | ||
33 | #define UBC_BARB 0xffffffa0 | ||
34 | #define UBC_BAMRB 0xffffffa4 | ||
35 | #define UBC_BBRB 0xffffffa8 | ||
36 | #define UBC_BASRB 0xffffffe8 | ||
37 | #define UBC_BDRB 0xffffff90 | ||
38 | #define UBC_BDMRB 0xffffff94 | ||
39 | #define UBC_BRCR 0xffffff98 | ||
40 | #endif | ||
41 | |||
42 | #endif /* __ASM_CPU_SH3_UBC_H */ | ||
diff --git a/arch/sh/include/cpu-sh4/cpu/ubc.h b/arch/sh/include/cpu-sh4/cpu/ubc.h deleted file mode 100644 index c86e17050935..000000000000 --- a/arch/sh/include/cpu-sh4/cpu/ubc.h +++ /dev/null | |||
@@ -1,64 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh4/ubc.h | ||
3 | * | ||
4 | * Copyright (C) 1999 Niibe Yutaka | ||
5 | * Copyright (C) 2003 Paul Mundt | ||
6 | * Copyright (C) 2006 Lineo Solutions Inc. support SH4A UBC | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General Public | ||
9 | * License. See the file "COPYING" in the main directory of this archive | ||
10 | * for more details. | ||
11 | */ | ||
12 | #ifndef __ASM_CPU_SH4_UBC_H | ||
13 | #define __ASM_CPU_SH4_UBC_H | ||
14 | |||
15 | #if defined(CONFIG_CPU_SH4A) | ||
16 | #define UBC_CBR0 0xff200000 | ||
17 | #define UBC_CRR0 0xff200004 | ||
18 | #define UBC_CAR0 0xff200008 | ||
19 | #define UBC_CAMR0 0xff20000c | ||
20 | #define UBC_CBR1 0xff200020 | ||
21 | #define UBC_CRR1 0xff200024 | ||
22 | #define UBC_CAR1 0xff200028 | ||
23 | #define UBC_CAMR1 0xff20002c | ||
24 | #define UBC_CDR1 0xff200030 | ||
25 | #define UBC_CDMR1 0xff200034 | ||
26 | #define UBC_CETR1 0xff200038 | ||
27 | #define UBC_CCMFR 0xff200600 | ||
28 | #define UBC_CBCR 0xff200620 | ||
29 | |||
30 | /* CBR */ | ||
31 | #define UBC_CBR_AIE (0x01<<30) | ||
32 | #define UBC_CBR_ID_INST (0x01<<4) | ||
33 | #define UBC_CBR_RW_READ (0x01<<1) | ||
34 | #define UBC_CBR_CE (0x01) | ||
35 | |||
36 | #define UBC_CBR_AIV_MASK (0x00FF0000) | ||
37 | #define UBC_CBR_AIV_SHIFT (16) | ||
38 | #define UBC_CBR_AIV_SET(asid) (((asid)<<UBC_CBR_AIV_SHIFT) & UBC_CBR_AIV_MASK) | ||
39 | |||
40 | #define UBC_CBR_INIT 0x20000000 | ||
41 | |||
42 | /* CRR */ | ||
43 | #define UBC_CRR_RES (0x01<<13) | ||
44 | #define UBC_CRR_PCB (0x01<<1) | ||
45 | #define UBC_CRR_BIE (0x01) | ||
46 | |||
47 | #define UBC_CRR_INIT 0x00002000 | ||
48 | |||
49 | #else /* CONFIG_CPU_SH4 */ | ||
50 | #define UBC_BARA 0xff200000 | ||
51 | #define UBC_BAMRA 0xff200004 | ||
52 | #define UBC_BBRA 0xff200008 | ||
53 | #define UBC_BASRA 0xff000014 | ||
54 | #define UBC_BARB 0xff20000c | ||
55 | #define UBC_BAMRB 0xff200010 | ||
56 | #define UBC_BBRB 0xff200014 | ||
57 | #define UBC_BASRB 0xff000018 | ||
58 | #define UBC_BDRB 0xff200018 | ||
59 | #define UBC_BDMRB 0xff20001c | ||
60 | #define UBC_BRCR 0xff200020 | ||
61 | #endif /* CONFIG_CPU_SH4 */ | ||
62 | |||
63 | #endif /* __ASM_CPU_SH4_UBC_H */ | ||
64 | |||
diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile index 5bec10c8bd74..56704a6d723a 100644 --- a/arch/sh/kernel/Makefile +++ b/arch/sh/kernel/Makefile | |||
@@ -13,8 +13,8 @@ CFLAGS_REMOVE_return_address.o = -pg | |||
13 | 13 | ||
14 | obj-y := debugtraps.o dma-nommu.o dumpstack.o \ | 14 | obj-y := debugtraps.o dma-nommu.o dumpstack.o \ |
15 | idle.o io.o io_generic.o irq.o \ | 15 | idle.o io.o io_generic.o irq.o \ |
16 | irq_$(BITS).o machvec.o nmi_debug.o process_$(BITS).o \ | 16 | irq_$(BITS).o machvec.o nmi_debug.o process.o \ |
17 | ptrace_$(BITS).o return_address.o \ | 17 | process_$(BITS).o ptrace_$(BITS).o return_address.o \ |
18 | setup.o signal_$(BITS).o sys_sh.o sys_sh$(BITS).o \ | 18 | setup.o signal_$(BITS).o sys_sh.o sys_sh$(BITS).o \ |
19 | syscalls_$(BITS).o time.o topology.o traps.o \ | 19 | syscalls_$(BITS).o time.o topology.o traps.o \ |
20 | traps_$(BITS).o unwinder.o | 20 | traps_$(BITS).o unwinder.o |
@@ -39,6 +39,7 @@ obj-$(CONFIG_HIBERNATION) += swsusp.o | |||
39 | obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o | 39 | obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o |
40 | obj-$(CONFIG_PERF_EVENTS) += perf_event.o perf_callchain.o | 40 | obj-$(CONFIG_PERF_EVENTS) += perf_event.o perf_callchain.o |
41 | 41 | ||
42 | obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o | ||
42 | obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += localtimer.o | 43 | obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += localtimer.o |
43 | 44 | ||
44 | EXTRA_CFLAGS += -Werror | 45 | EXTRA_CFLAGS += -Werror |
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile index d97c803719ec..0e48bc61c272 100644 --- a/arch/sh/kernel/cpu/Makefile +++ b/arch/sh/kernel/cpu/Makefile | |||
@@ -17,5 +17,7 @@ obj-$(CONFIG_ARCH_SHMOBILE) += shmobile/ | |||
17 | 17 | ||
18 | obj-$(CONFIG_SH_ADC) += adc.o | 18 | obj-$(CONFIG_SH_ADC) += adc.o |
19 | obj-$(CONFIG_SH_CLK_CPG) += clock-cpg.o | 19 | obj-$(CONFIG_SH_CLK_CPG) += clock-cpg.o |
20 | obj-$(CONFIG_SH_FPU) += fpu.o | ||
21 | obj-$(CONFIG_SH_FPU_EMU) += fpu.o | ||
20 | 22 | ||
21 | obj-y += irq/ init.o clock.o hwblk.o | 23 | obj-y += irq/ init.o clock.o hwblk.o |
diff --git a/arch/sh/kernel/cpu/fpu.c b/arch/sh/kernel/cpu/fpu.c new file mode 100644 index 000000000000..c23e6727002a --- /dev/null +++ b/arch/sh/kernel/cpu/fpu.c | |||
@@ -0,0 +1,82 @@ | |||
1 | #include <linux/sched.h> | ||
2 | #include <asm/processor.h> | ||
3 | #include <asm/fpu.h> | ||
4 | |||
5 | int init_fpu(struct task_struct *tsk) | ||
6 | { | ||
7 | if (tsk_used_math(tsk)) { | ||
8 | if ((boot_cpu_data.flags & CPU_HAS_FPU) && tsk == current) | ||
9 | unlazy_fpu(tsk, task_pt_regs(tsk)); | ||
10 | return 0; | ||
11 | } | ||
12 | |||
13 | /* | ||
14 | * Memory allocation at the first usage of the FPU and other state. | ||
15 | */ | ||
16 | if (!tsk->thread.xstate) { | ||
17 | tsk->thread.xstate = kmem_cache_alloc(task_xstate_cachep, | ||
18 | GFP_KERNEL); | ||
19 | if (!tsk->thread.xstate) | ||
20 | return -ENOMEM; | ||
21 | } | ||
22 | |||
23 | if (boot_cpu_data.flags & CPU_HAS_FPU) { | ||
24 | struct sh_fpu_hard_struct *fp = &tsk->thread.xstate->hardfpu; | ||
25 | memset(fp, 0, xstate_size); | ||
26 | fp->fpscr = FPSCR_INIT; | ||
27 | } else { | ||
28 | struct sh_fpu_soft_struct *fp = &tsk->thread.xstate->softfpu; | ||
29 | memset(fp, 0, xstate_size); | ||
30 | fp->fpscr = FPSCR_INIT; | ||
31 | } | ||
32 | |||
33 | set_stopped_child_used_math(tsk); | ||
34 | return 0; | ||
35 | } | ||
36 | |||
37 | #ifdef CONFIG_SH_FPU | ||
38 | void __fpu_state_restore(void) | ||
39 | { | ||
40 | struct task_struct *tsk = current; | ||
41 | |||
42 | restore_fpu(tsk); | ||
43 | |||
44 | task_thread_info(tsk)->status |= TS_USEDFPU; | ||
45 | tsk->fpu_counter++; | ||
46 | } | ||
47 | |||
48 | void fpu_state_restore(struct pt_regs *regs) | ||
49 | { | ||
50 | struct task_struct *tsk = current; | ||
51 | |||
52 | if (unlikely(!user_mode(regs))) { | ||
53 | printk(KERN_ERR "BUG: FPU is used in kernel mode.\n"); | ||
54 | BUG(); | ||
55 | return; | ||
56 | } | ||
57 | |||
58 | if (!tsk_used_math(tsk)) { | ||
59 | /* | ||
60 | * does a slab alloc which can sleep | ||
61 | */ | ||
62 | if (init_fpu(tsk)) { | ||
63 | /* | ||
64 | * ran out of memory! | ||
65 | */ | ||
66 | do_group_exit(SIGKILL); | ||
67 | return; | ||
68 | } | ||
69 | } | ||
70 | |||
71 | grab_fpu(regs); | ||
72 | |||
73 | __fpu_state_restore(); | ||
74 | } | ||
75 | |||
76 | BUILD_TRAP_HANDLER(fpu_state_restore) | ||
77 | { | ||
78 | TRAP_HANDLER_DECL; | ||
79 | |||
80 | fpu_state_restore(regs); | ||
81 | } | ||
82 | #endif /* CONFIG_SH_FPU */ | ||
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c index 89b4b76c0d76..a5bb0550bbf3 100644 --- a/arch/sh/kernel/cpu/init.c +++ b/arch/sh/kernel/cpu/init.c | |||
@@ -24,22 +24,31 @@ | |||
24 | #include <asm/elf.h> | 24 | #include <asm/elf.h> |
25 | #include <asm/io.h> | 25 | #include <asm/io.h> |
26 | #include <asm/smp.h> | 26 | #include <asm/smp.h> |
27 | #ifdef CONFIG_SUPERH32 | 27 | |
28 | #include <asm/ubc.h> | 28 | #ifdef CONFIG_SH_FPU |
29 | #define cpu_has_fpu 1 | ||
30 | #else | ||
31 | #define cpu_has_fpu 0 | ||
32 | #endif | ||
33 | |||
34 | #ifdef CONFIG_SH_DSP | ||
35 | #define cpu_has_dsp 1 | ||
36 | #else | ||
37 | #define cpu_has_dsp 0 | ||
29 | #endif | 38 | #endif |
30 | 39 | ||
31 | /* | 40 | /* |
32 | * Generic wrapper for command line arguments to disable on-chip | 41 | * Generic wrapper for command line arguments to disable on-chip |
33 | * peripherals (nofpu, nodsp, and so forth). | 42 | * peripherals (nofpu, nodsp, and so forth). |
34 | */ | 43 | */ |
35 | #define onchip_setup(x) \ | 44 | #define onchip_setup(x) \ |
36 | static int x##_disabled __initdata = 0; \ | 45 | static int x##_disabled __initdata = !cpu_has_##x; \ |
37 | \ | 46 | \ |
38 | static int __init x##_setup(char *opts) \ | 47 | static int __init x##_setup(char *opts) \ |
39 | { \ | 48 | { \ |
40 | x##_disabled = 1; \ | 49 | x##_disabled = 1; \ |
41 | return 1; \ | 50 | return 1; \ |
42 | } \ | 51 | } \ |
43 | __setup("no" __stringify(x), x##_setup); | 52 | __setup("no" __stringify(x), x##_setup); |
44 | 53 | ||
45 | onchip_setup(fpu); | 54 | onchip_setup(fpu); |
@@ -207,6 +216,18 @@ static void detect_cache_shape(void) | |||
207 | l2_cache_shape = -1; /* No S-cache */ | 216 | l2_cache_shape = -1; /* No S-cache */ |
208 | } | 217 | } |
209 | 218 | ||
219 | static void __init fpu_init(void) | ||
220 | { | ||
221 | /* Disable the FPU */ | ||
222 | if (fpu_disabled && (current_cpu_data.flags & CPU_HAS_FPU)) { | ||
223 | printk("FPU Disabled\n"); | ||
224 | current_cpu_data.flags &= ~CPU_HAS_FPU; | ||
225 | } | ||
226 | |||
227 | disable_fpu(); | ||
228 | clear_used_math(); | ||
229 | } | ||
230 | |||
210 | #ifdef CONFIG_SH_DSP | 231 | #ifdef CONFIG_SH_DSP |
211 | static void __init release_dsp(void) | 232 | static void __init release_dsp(void) |
212 | { | 233 | { |
@@ -244,28 +265,35 @@ static void __init dsp_init(void) | |||
244 | if (sr & SR_DSP) | 265 | if (sr & SR_DSP) |
245 | current_cpu_data.flags |= CPU_HAS_DSP; | 266 | current_cpu_data.flags |= CPU_HAS_DSP; |
246 | 267 | ||
268 | /* Disable the DSP */ | ||
269 | if (dsp_disabled && (current_cpu_data.flags & CPU_HAS_DSP)) { | ||
270 | printk("DSP Disabled\n"); | ||
271 | current_cpu_data.flags &= ~CPU_HAS_DSP; | ||
272 | } | ||
273 | |||
247 | /* Now that we've determined the DSP status, clear the DSP bit. */ | 274 | /* Now that we've determined the DSP status, clear the DSP bit. */ |
248 | release_dsp(); | 275 | release_dsp(); |
249 | } | 276 | } |
277 | #else | ||
278 | static inline void __init dsp_init(void) { } | ||
250 | #endif /* CONFIG_SH_DSP */ | 279 | #endif /* CONFIG_SH_DSP */ |
251 | 280 | ||
252 | /** | 281 | /** |
253 | * sh_cpu_init | 282 | * sh_cpu_init |
254 | * | 283 | * |
255 | * This is our initial entry point for each CPU, and is invoked on the boot | 284 | * This is our initial entry point for each CPU, and is invoked on the |
256 | * CPU prior to calling start_kernel(). For SMP, a combination of this and | 285 | * boot CPU prior to calling start_kernel(). For SMP, a combination of |
257 | * start_secondary() will bring up each processor to a ready state prior | 286 | * this and start_secondary() will bring up each processor to a ready |
258 | * to hand forking the idle loop. | 287 | * state prior to hand forking the idle loop. |
259 | * | 288 | * |
260 | * We do all of the basic processor init here, including setting up the | 289 | * We do all of the basic processor init here, including setting up |
261 | * caches, FPU, DSP, kicking the UBC, etc. By the time start_kernel() is | 290 | * the caches, FPU, DSP, etc. By the time start_kernel() is hit (and |
262 | * hit (and subsequently platform_setup()) things like determining the | 291 | * subsequently platform_setup()) things like determining the CPU |
263 | * CPU subtype and initial configuration will all be done. | 292 | * subtype and initial configuration will all be done. |
264 | * | 293 | * |
265 | * Each processor family is still responsible for doing its own probing | 294 | * Each processor family is still responsible for doing its own probing |
266 | * and cache configuration in detect_cpu_and_cache_system(). | 295 | * and cache configuration in detect_cpu_and_cache_system(). |
267 | */ | 296 | */ |
268 | |||
269 | asmlinkage void __init sh_cpu_init(void) | 297 | asmlinkage void __init sh_cpu_init(void) |
270 | { | 298 | { |
271 | current_thread_info()->cpu = hard_smp_processor_id(); | 299 | current_thread_info()->cpu = hard_smp_processor_id(); |
@@ -302,18 +330,8 @@ asmlinkage void __init sh_cpu_init(void) | |||
302 | detect_cache_shape(); | 330 | detect_cache_shape(); |
303 | } | 331 | } |
304 | 332 | ||
305 | /* Disable the FPU */ | 333 | fpu_init(); |
306 | if (fpu_disabled) { | 334 | dsp_init(); |
307 | printk("FPU Disabled\n"); | ||
308 | current_cpu_data.flags &= ~CPU_HAS_FPU; | ||
309 | } | ||
310 | |||
311 | /* FPU initialization */ | ||
312 | disable_fpu(); | ||
313 | if ((current_cpu_data.flags & CPU_HAS_FPU)) { | ||
314 | current_thread_info()->status &= ~TS_USEDFPU; | ||
315 | clear_used_math(); | ||
316 | } | ||
317 | 335 | ||
318 | /* | 336 | /* |
319 | * Initialize the per-CPU ASID cache very early, since the | 337 | * Initialize the per-CPU ASID cache very early, since the |
@@ -321,18 +339,12 @@ asmlinkage void __init sh_cpu_init(void) | |||
321 | */ | 339 | */ |
322 | current_cpu_data.asid_cache = NO_CONTEXT; | 340 | current_cpu_data.asid_cache = NO_CONTEXT; |
323 | 341 | ||
324 | #ifdef CONFIG_SH_DSP | ||
325 | /* Probe for DSP */ | ||
326 | dsp_init(); | ||
327 | |||
328 | /* Disable the DSP */ | ||
329 | if (dsp_disabled) { | ||
330 | printk("DSP Disabled\n"); | ||
331 | current_cpu_data.flags &= ~CPU_HAS_DSP; | ||
332 | release_dsp(); | ||
333 | } | ||
334 | #endif | ||
335 | |||
336 | speculative_execution_init(); | 342 | speculative_execution_init(); |
337 | expmask_init(); | 343 | expmask_init(); |
344 | |||
345 | /* | ||
346 | * Boot processor to setup the FP and extended state context info. | ||
347 | */ | ||
348 | if (raw_smp_processor_id() == 0) | ||
349 | init_thread_xstate(); | ||
338 | } | 350 | } |
diff --git a/arch/sh/kernel/cpu/sh2a/fpu.c b/arch/sh/kernel/cpu/sh2a/fpu.c index d395ce5740e7..488d24e0cdf0 100644 --- a/arch/sh/kernel/cpu/sh2a/fpu.c +++ b/arch/sh/kernel/cpu/sh2a/fpu.c | |||
@@ -26,8 +26,7 @@ | |||
26 | /* | 26 | /* |
27 | * Save FPU registers onto task structure. | 27 | * Save FPU registers onto task structure. |
28 | */ | 28 | */ |
29 | void | 29 | void save_fpu(struct task_struct *tsk) |
30 | save_fpu(struct task_struct *tsk) | ||
31 | { | 30 | { |
32 | unsigned long dummy; | 31 | unsigned long dummy; |
33 | 32 | ||
@@ -52,7 +51,7 @@ save_fpu(struct task_struct *tsk) | |||
52 | "fmov.s fr0, @-%0\n\t" | 51 | "fmov.s fr0, @-%0\n\t" |
53 | "lds %3, fpscr\n\t" | 52 | "lds %3, fpscr\n\t" |
54 | : "=r" (dummy) | 53 | : "=r" (dummy) |
55 | : "0" ((char *)(&tsk->thread.fpu.hard.status)), | 54 | : "0" ((char *)(&tsk->thread.xstate->hardfpu.status)), |
56 | "r" (FPSCR_RCHG), | 55 | "r" (FPSCR_RCHG), |
57 | "r" (FPSCR_INIT) | 56 | "r" (FPSCR_INIT) |
58 | : "memory"); | 57 | : "memory"); |
@@ -60,8 +59,7 @@ save_fpu(struct task_struct *tsk) | |||
60 | disable_fpu(); | 59 | disable_fpu(); |
61 | } | 60 | } |
62 | 61 | ||
63 | static void | 62 | void restore_fpu(struct task_struct *tsk) |
64 | restore_fpu(struct task_struct *tsk) | ||
65 | { | 63 | { |
66 | unsigned long dummy; | 64 | unsigned long dummy; |
67 | 65 | ||
@@ -85,45 +83,12 @@ restore_fpu(struct task_struct *tsk) | |||
85 | "lds.l @%0+, fpscr\n\t" | 83 | "lds.l @%0+, fpscr\n\t" |
86 | "lds.l @%0+, fpul\n\t" | 84 | "lds.l @%0+, fpul\n\t" |
87 | : "=r" (dummy) | 85 | : "=r" (dummy) |
88 | : "0" (&tsk->thread.fpu), "r" (FPSCR_RCHG) | 86 | : "0" (tsk->thread.xstate), "r" (FPSCR_RCHG) |
89 | : "memory"); | 87 | : "memory"); |
90 | disable_fpu(); | 88 | disable_fpu(); |
91 | } | 89 | } |
92 | 90 | ||
93 | /* | 91 | /* |
94 | * Load the FPU with signalling NANS. This bit pattern we're using | ||
95 | * has the property that no matter wether considered as single or as | ||
96 | * double precission represents signaling NANS. | ||
97 | */ | ||
98 | |||
99 | static void | ||
100 | fpu_init(void) | ||
101 | { | ||
102 | enable_fpu(); | ||
103 | asm volatile("lds %0, fpul\n\t" | ||
104 | "fsts fpul, fr0\n\t" | ||
105 | "fsts fpul, fr1\n\t" | ||
106 | "fsts fpul, fr2\n\t" | ||
107 | "fsts fpul, fr3\n\t" | ||
108 | "fsts fpul, fr4\n\t" | ||
109 | "fsts fpul, fr5\n\t" | ||
110 | "fsts fpul, fr6\n\t" | ||
111 | "fsts fpul, fr7\n\t" | ||
112 | "fsts fpul, fr8\n\t" | ||
113 | "fsts fpul, fr9\n\t" | ||
114 | "fsts fpul, fr10\n\t" | ||
115 | "fsts fpul, fr11\n\t" | ||
116 | "fsts fpul, fr12\n\t" | ||
117 | "fsts fpul, fr13\n\t" | ||
118 | "fsts fpul, fr14\n\t" | ||
119 | "fsts fpul, fr15\n\t" | ||
120 | "lds %2, fpscr\n\t" | ||
121 | : /* no output */ | ||
122 | : "r" (0), "r" (FPSCR_RCHG), "r" (FPSCR_INIT)); | ||
123 | disable_fpu(); | ||
124 | } | ||
125 | |||
126 | /* | ||
127 | * Emulate arithmetic ops on denormalized number for some FPU insns. | 92 | * Emulate arithmetic ops on denormalized number for some FPU insns. |
128 | */ | 93 | */ |
129 | 94 | ||
@@ -490,9 +455,9 @@ ieee_fpe_handler (struct pt_regs *regs) | |||
490 | if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */ | 455 | if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */ |
491 | struct task_struct *tsk = current; | 456 | struct task_struct *tsk = current; |
492 | 457 | ||
493 | if ((tsk->thread.fpu.hard.fpscr & FPSCR_FPU_ERROR)) { | 458 | if ((tsk->thread.xstate->hardfpu.fpscr & FPSCR_FPU_ERROR)) { |
494 | /* FPU error */ | 459 | /* FPU error */ |
495 | denormal_to_double (&tsk->thread.fpu.hard, | 460 | denormal_to_double (&tsk->thread.xstate->hardfpu, |
496 | (finsn >> 8) & 0xf); | 461 | (finsn >> 8) & 0xf); |
497 | } else | 462 | } else |
498 | return 0; | 463 | return 0; |
@@ -507,9 +472,9 @@ ieee_fpe_handler (struct pt_regs *regs) | |||
507 | 472 | ||
508 | n = (finsn >> 8) & 0xf; | 473 | n = (finsn >> 8) & 0xf; |
509 | m = (finsn >> 4) & 0xf; | 474 | m = (finsn >> 4) & 0xf; |
510 | hx = tsk->thread.fpu.hard.fp_regs[n]; | 475 | hx = tsk->thread.xstate->hardfpu.fp_regs[n]; |
511 | hy = tsk->thread.fpu.hard.fp_regs[m]; | 476 | hy = tsk->thread.xstate->hardfpu.fp_regs[m]; |
512 | fpscr = tsk->thread.fpu.hard.fpscr; | 477 | fpscr = tsk->thread.xstate->hardfpu.fpscr; |
513 | prec = fpscr & (1 << 19); | 478 | prec = fpscr & (1 << 19); |
514 | 479 | ||
515 | if ((fpscr & FPSCR_FPU_ERROR) | 480 | if ((fpscr & FPSCR_FPU_ERROR) |
@@ -519,15 +484,15 @@ ieee_fpe_handler (struct pt_regs *regs) | |||
519 | 484 | ||
520 | /* FPU error because of denormal */ | 485 | /* FPU error because of denormal */ |
521 | llx = ((long long) hx << 32) | 486 | llx = ((long long) hx << 32) |
522 | | tsk->thread.fpu.hard.fp_regs[n+1]; | 487 | | tsk->thread.xstate->hardfpu.fp_regs[n+1]; |
523 | lly = ((long long) hy << 32) | 488 | lly = ((long long) hy << 32) |
524 | | tsk->thread.fpu.hard.fp_regs[m+1]; | 489 | | tsk->thread.xstate->hardfpu.fp_regs[m+1]; |
525 | if ((hx & 0x7fffffff) >= 0x00100000) | 490 | if ((hx & 0x7fffffff) >= 0x00100000) |
526 | llx = denormal_muld(lly, llx); | 491 | llx = denormal_muld(lly, llx); |
527 | else | 492 | else |
528 | llx = denormal_muld(llx, lly); | 493 | llx = denormal_muld(llx, lly); |
529 | tsk->thread.fpu.hard.fp_regs[n] = llx >> 32; | 494 | tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32; |
530 | tsk->thread.fpu.hard.fp_regs[n+1] = llx & 0xffffffff; | 495 | tsk->thread.xstate->hardfpu.fp_regs[n+1] = llx & 0xffffffff; |
531 | } else if ((fpscr & FPSCR_FPU_ERROR) | 496 | } else if ((fpscr & FPSCR_FPU_ERROR) |
532 | && (!prec && ((hx & 0x7fffffff) < 0x00800000 | 497 | && (!prec && ((hx & 0x7fffffff) < 0x00800000 |
533 | || (hy & 0x7fffffff) < 0x00800000))) { | 498 | || (hy & 0x7fffffff) < 0x00800000))) { |
@@ -536,7 +501,7 @@ ieee_fpe_handler (struct pt_regs *regs) | |||
536 | hx = denormal_mulf(hy, hx); | 501 | hx = denormal_mulf(hy, hx); |
537 | else | 502 | else |
538 | hx = denormal_mulf(hx, hy); | 503 | hx = denormal_mulf(hx, hy); |
539 | tsk->thread.fpu.hard.fp_regs[n] = hx; | 504 | tsk->thread.xstate->hardfpu.fp_regs[n] = hx; |
540 | } else | 505 | } else |
541 | return 0; | 506 | return 0; |
542 | 507 | ||
@@ -550,9 +515,9 @@ ieee_fpe_handler (struct pt_regs *regs) | |||
550 | 515 | ||
551 | n = (finsn >> 8) & 0xf; | 516 | n = (finsn >> 8) & 0xf; |
552 | m = (finsn >> 4) & 0xf; | 517 | m = (finsn >> 4) & 0xf; |
553 | hx = tsk->thread.fpu.hard.fp_regs[n]; | 518 | hx = tsk->thread.xstate->hardfpu.fp_regs[n]; |
554 | hy = tsk->thread.fpu.hard.fp_regs[m]; | 519 | hy = tsk->thread.xstate->hardfpu.fp_regs[m]; |
555 | fpscr = tsk->thread.fpu.hard.fpscr; | 520 | fpscr = tsk->thread.xstate->hardfpu.fpscr; |
556 | prec = fpscr & (1 << 19); | 521 | prec = fpscr & (1 << 19); |
557 | 522 | ||
558 | if ((fpscr & FPSCR_FPU_ERROR) | 523 | if ((fpscr & FPSCR_FPU_ERROR) |
@@ -562,15 +527,15 @@ ieee_fpe_handler (struct pt_regs *regs) | |||
562 | 527 | ||
563 | /* FPU error because of denormal */ | 528 | /* FPU error because of denormal */ |
564 | llx = ((long long) hx << 32) | 529 | llx = ((long long) hx << 32) |
565 | | tsk->thread.fpu.hard.fp_regs[n+1]; | 530 | | tsk->thread.xstate->hardfpu.fp_regs[n+1]; |
566 | lly = ((long long) hy << 32) | 531 | lly = ((long long) hy << 32) |
567 | | tsk->thread.fpu.hard.fp_regs[m+1]; | 532 | | tsk->thread.xstate->hardfpu.fp_regs[m+1]; |
568 | if ((finsn & 0xf00f) == 0xf000) | 533 | if ((finsn & 0xf00f) == 0xf000) |
569 | llx = denormal_addd(llx, lly); | 534 | llx = denormal_addd(llx, lly); |
570 | else | 535 | else |
571 | llx = denormal_addd(llx, lly ^ (1LL << 63)); | 536 | llx = denormal_addd(llx, lly ^ (1LL << 63)); |
572 | tsk->thread.fpu.hard.fp_regs[n] = llx >> 32; | 537 | tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32; |
573 | tsk->thread.fpu.hard.fp_regs[n+1] = llx & 0xffffffff; | 538 | tsk->thread.xstate->hardfpu.fp_regs[n+1] = llx & 0xffffffff; |
574 | } else if ((fpscr & FPSCR_FPU_ERROR) | 539 | } else if ((fpscr & FPSCR_FPU_ERROR) |
575 | && (!prec && ((hx & 0x7fffffff) < 0x00800000 | 540 | && (!prec && ((hx & 0x7fffffff) < 0x00800000 |
576 | || (hy & 0x7fffffff) < 0x00800000))) { | 541 | || (hy & 0x7fffffff) < 0x00800000))) { |
@@ -579,7 +544,7 @@ ieee_fpe_handler (struct pt_regs *regs) | |||
579 | hx = denormal_addf(hx, hy); | 544 | hx = denormal_addf(hx, hy); |
580 | else | 545 | else |
581 | hx = denormal_addf(hx, hy ^ 0x80000000); | 546 | hx = denormal_addf(hx, hy ^ 0x80000000); |
582 | tsk->thread.fpu.hard.fp_regs[n] = hx; | 547 | tsk->thread.xstate->hardfpu.fp_regs[n] = hx; |
583 | } else | 548 | } else |
584 | return 0; | 549 | return 0; |
585 | 550 | ||
@@ -597,7 +562,7 @@ BUILD_TRAP_HANDLER(fpu_error) | |||
597 | 562 | ||
598 | __unlazy_fpu(tsk, regs); | 563 | __unlazy_fpu(tsk, regs); |
599 | if (ieee_fpe_handler(regs)) { | 564 | if (ieee_fpe_handler(regs)) { |
600 | tsk->thread.fpu.hard.fpscr &= | 565 | tsk->thread.xstate->hardfpu.fpscr &= |
601 | ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK); | 566 | ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK); |
602 | grab_fpu(regs); | 567 | grab_fpu(regs); |
603 | restore_fpu(tsk); | 568 | restore_fpu(tsk); |
@@ -607,33 +572,3 @@ BUILD_TRAP_HANDLER(fpu_error) | |||
607 | 572 | ||
608 | force_sig(SIGFPE, tsk); | 573 | force_sig(SIGFPE, tsk); |
609 | } | 574 | } |
610 | |||
611 | void fpu_state_restore(struct pt_regs *regs) | ||
612 | { | ||
613 | struct task_struct *tsk = current; | ||
614 | |||
615 | grab_fpu(regs); | ||
616 | if (unlikely(!user_mode(regs))) { | ||
617 | printk(KERN_ERR "BUG: FPU is used in kernel mode.\n"); | ||
618 | BUG(); | ||
619 | return; | ||
620 | } | ||
621 | |||
622 | if (likely(used_math())) { | ||
623 | /* Using the FPU again. */ | ||
624 | restore_fpu(tsk); | ||
625 | } else { | ||
626 | /* First time FPU user. */ | ||
627 | fpu_init(); | ||
628 | set_used_math(); | ||
629 | } | ||
630 | task_thread_info(tsk)->status |= TS_USEDFPU; | ||
631 | tsk->fpu_counter++; | ||
632 | } | ||
633 | |||
634 | BUILD_TRAP_HANDLER(fpu_state_restore) | ||
635 | { | ||
636 | TRAP_HANDLER_DECL; | ||
637 | |||
638 | fpu_state_restore(regs); | ||
639 | } | ||
diff --git a/arch/sh/kernel/cpu/sh3/ex.S b/arch/sh/kernel/cpu/sh3/ex.S index 46610c35c232..99b4d020179a 100644 --- a/arch/sh/kernel/cpu/sh3/ex.S +++ b/arch/sh/kernel/cpu/sh3/ex.S | |||
@@ -49,7 +49,7 @@ ENTRY(exception_handling_table) | |||
49 | .long exception_error ! reserved_instruction (filled by trap_init) /* 180 */ | 49 | .long exception_error ! reserved_instruction (filled by trap_init) /* 180 */ |
50 | .long exception_error ! illegal_slot_instruction (filled by trap_init) /*1A0*/ | 50 | .long exception_error ! illegal_slot_instruction (filled by trap_init) /*1A0*/ |
51 | .long nmi_trap_handler /* 1C0 */ ! Allow trap to debugger | 51 | .long nmi_trap_handler /* 1C0 */ ! Allow trap to debugger |
52 | .long break_point_trap /* 1E0 */ | 52 | .long breakpoint_trap_handler /* 1E0 */ |
53 | 53 | ||
54 | /* | 54 | /* |
55 | * Pad the remainder of the table out, exceptions residing in far | 55 | * Pad the remainder of the table out, exceptions residing in far |
diff --git a/arch/sh/kernel/cpu/sh4/fpu.c b/arch/sh/kernel/cpu/sh4/fpu.c index e97857aec8a0..447482d7f65e 100644 --- a/arch/sh/kernel/cpu/sh4/fpu.c +++ b/arch/sh/kernel/cpu/sh4/fpu.c | |||
@@ -85,14 +85,14 @@ void save_fpu(struct task_struct *tsk) | |||
85 | "fmov.s fr1, @-%0\n\t" | 85 | "fmov.s fr1, @-%0\n\t" |
86 | "fmov.s fr0, @-%0\n\t" | 86 | "fmov.s fr0, @-%0\n\t" |
87 | "lds %3, fpscr\n\t":"=r" (dummy) | 87 | "lds %3, fpscr\n\t":"=r" (dummy) |
88 | :"0"((char *)(&tsk->thread.fpu.hard.status)), | 88 | :"0"((char *)(&tsk->thread.xstate->hardfpu.status)), |
89 | "r"(FPSCR_RCHG), "r"(FPSCR_INIT) | 89 | "r"(FPSCR_RCHG), "r"(FPSCR_INIT) |
90 | :"memory"); | 90 | :"memory"); |
91 | 91 | ||
92 | disable_fpu(); | 92 | disable_fpu(); |
93 | } | 93 | } |
94 | 94 | ||
95 | static void restore_fpu(struct task_struct *tsk) | 95 | void restore_fpu(struct task_struct *tsk) |
96 | { | 96 | { |
97 | unsigned long dummy; | 97 | unsigned long dummy; |
98 | 98 | ||
@@ -135,62 +135,11 @@ static void restore_fpu(struct task_struct *tsk) | |||
135 | "lds.l @%0+, fpscr\n\t" | 135 | "lds.l @%0+, fpscr\n\t" |
136 | "lds.l @%0+, fpul\n\t" | 136 | "lds.l @%0+, fpul\n\t" |
137 | :"=r" (dummy) | 137 | :"=r" (dummy) |
138 | :"0"(&tsk->thread.fpu), "r"(FPSCR_RCHG) | 138 | :"0" (tsk->thread.xstate), "r" (FPSCR_RCHG) |
139 | :"memory"); | 139 | :"memory"); |
140 | disable_fpu(); | 140 | disable_fpu(); |
141 | } | 141 | } |
142 | 142 | ||
143 | /* | ||
144 | * Load the FPU with signalling NANS. This bit pattern we're using | ||
145 | * has the property that no matter wether considered as single or as | ||
146 | * double precision represents signaling NANS. | ||
147 | */ | ||
148 | |||
149 | static void fpu_init(void) | ||
150 | { | ||
151 | enable_fpu(); | ||
152 | asm volatile ( "lds %0, fpul\n\t" | ||
153 | "lds %1, fpscr\n\t" | ||
154 | "fsts fpul, fr0\n\t" | ||
155 | "fsts fpul, fr1\n\t" | ||
156 | "fsts fpul, fr2\n\t" | ||
157 | "fsts fpul, fr3\n\t" | ||
158 | "fsts fpul, fr4\n\t" | ||
159 | "fsts fpul, fr5\n\t" | ||
160 | "fsts fpul, fr6\n\t" | ||
161 | "fsts fpul, fr7\n\t" | ||
162 | "fsts fpul, fr8\n\t" | ||
163 | "fsts fpul, fr9\n\t" | ||
164 | "fsts fpul, fr10\n\t" | ||
165 | "fsts fpul, fr11\n\t" | ||
166 | "fsts fpul, fr12\n\t" | ||
167 | "fsts fpul, fr13\n\t" | ||
168 | "fsts fpul, fr14\n\t" | ||
169 | "fsts fpul, fr15\n\t" | ||
170 | "frchg\n\t" | ||
171 | "fsts fpul, fr0\n\t" | ||
172 | "fsts fpul, fr1\n\t" | ||
173 | "fsts fpul, fr2\n\t" | ||
174 | "fsts fpul, fr3\n\t" | ||
175 | "fsts fpul, fr4\n\t" | ||
176 | "fsts fpul, fr5\n\t" | ||
177 | "fsts fpul, fr6\n\t" | ||
178 | "fsts fpul, fr7\n\t" | ||
179 | "fsts fpul, fr8\n\t" | ||
180 | "fsts fpul, fr9\n\t" | ||
181 | "fsts fpul, fr10\n\t" | ||
182 | "fsts fpul, fr11\n\t" | ||
183 | "fsts fpul, fr12\n\t" | ||
184 | "fsts fpul, fr13\n\t" | ||
185 | "fsts fpul, fr14\n\t" | ||
186 | "fsts fpul, fr15\n\t" | ||
187 | "frchg\n\t" | ||
188 | "lds %2, fpscr\n\t" | ||
189 | : /* no output */ | ||
190 | :"r" (0), "r"(FPSCR_RCHG), "r"(FPSCR_INIT)); | ||
191 | disable_fpu(); | ||
192 | } | ||
193 | |||
194 | /** | 143 | /** |
195 | * denormal_to_double - Given denormalized float number, | 144 | * denormal_to_double - Given denormalized float number, |
196 | * store double float | 145 | * store double float |
@@ -282,9 +231,9 @@ static int ieee_fpe_handler(struct pt_regs *regs) | |||
282 | /* fcnvsd */ | 231 | /* fcnvsd */ |
283 | struct task_struct *tsk = current; | 232 | struct task_struct *tsk = current; |
284 | 233 | ||
285 | if ((tsk->thread.fpu.hard.fpscr & FPSCR_CAUSE_ERROR)) | 234 | if ((tsk->thread.xstate->hardfpu.fpscr & FPSCR_CAUSE_ERROR)) |
286 | /* FPU error */ | 235 | /* FPU error */ |
287 | denormal_to_double(&tsk->thread.fpu.hard, | 236 | denormal_to_double(&tsk->thread.xstate->hardfpu, |
288 | (finsn >> 8) & 0xf); | 237 | (finsn >> 8) & 0xf); |
289 | else | 238 | else |
290 | return 0; | 239 | return 0; |
@@ -300,9 +249,9 @@ static int ieee_fpe_handler(struct pt_regs *regs) | |||
300 | 249 | ||
301 | n = (finsn >> 8) & 0xf; | 250 | n = (finsn >> 8) & 0xf; |
302 | m = (finsn >> 4) & 0xf; | 251 | m = (finsn >> 4) & 0xf; |
303 | hx = tsk->thread.fpu.hard.fp_regs[n]; | 252 | hx = tsk->thread.xstate->hardfpu.fp_regs[n]; |
304 | hy = tsk->thread.fpu.hard.fp_regs[m]; | 253 | hy = tsk->thread.xstate->hardfpu.fp_regs[m]; |
305 | fpscr = tsk->thread.fpu.hard.fpscr; | 254 | fpscr = tsk->thread.xstate->hardfpu.fpscr; |
306 | prec = fpscr & FPSCR_DBL_PRECISION; | 255 | prec = fpscr & FPSCR_DBL_PRECISION; |
307 | 256 | ||
308 | if ((fpscr & FPSCR_CAUSE_ERROR) | 257 | if ((fpscr & FPSCR_CAUSE_ERROR) |
@@ -312,18 +261,18 @@ static int ieee_fpe_handler(struct pt_regs *regs) | |||
312 | 261 | ||
313 | /* FPU error because of denormal (doubles) */ | 262 | /* FPU error because of denormal (doubles) */ |
314 | llx = ((long long)hx << 32) | 263 | llx = ((long long)hx << 32) |
315 | | tsk->thread.fpu.hard.fp_regs[n + 1]; | 264 | | tsk->thread.xstate->hardfpu.fp_regs[n + 1]; |
316 | lly = ((long long)hy << 32) | 265 | lly = ((long long)hy << 32) |
317 | | tsk->thread.fpu.hard.fp_regs[m + 1]; | 266 | | tsk->thread.xstate->hardfpu.fp_regs[m + 1]; |
318 | llx = float64_mul(llx, lly); | 267 | llx = float64_mul(llx, lly); |
319 | tsk->thread.fpu.hard.fp_regs[n] = llx >> 32; | 268 | tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32; |
320 | tsk->thread.fpu.hard.fp_regs[n + 1] = llx & 0xffffffff; | 269 | tsk->thread.xstate->hardfpu.fp_regs[n + 1] = llx & 0xffffffff; |
321 | } else if ((fpscr & FPSCR_CAUSE_ERROR) | 270 | } else if ((fpscr & FPSCR_CAUSE_ERROR) |
322 | && (!prec && ((hx & 0x7fffffff) < 0x00800000 | 271 | && (!prec && ((hx & 0x7fffffff) < 0x00800000 |
323 | || (hy & 0x7fffffff) < 0x00800000))) { | 272 | || (hy & 0x7fffffff) < 0x00800000))) { |
324 | /* FPU error because of denormal (floats) */ | 273 | /* FPU error because of denormal (floats) */ |
325 | hx = float32_mul(hx, hy); | 274 | hx = float32_mul(hx, hy); |
326 | tsk->thread.fpu.hard.fp_regs[n] = hx; | 275 | tsk->thread.xstate->hardfpu.fp_regs[n] = hx; |
327 | } else | 276 | } else |
328 | return 0; | 277 | return 0; |
329 | 278 | ||
@@ -338,9 +287,9 @@ static int ieee_fpe_handler(struct pt_regs *regs) | |||
338 | 287 | ||
339 | n = (finsn >> 8) & 0xf; | 288 | n = (finsn >> 8) & 0xf; |
340 | m = (finsn >> 4) & 0xf; | 289 | m = (finsn >> 4) & 0xf; |
341 | hx = tsk->thread.fpu.hard.fp_regs[n]; | 290 | hx = tsk->thread.xstate->hardfpu.fp_regs[n]; |
342 | hy = tsk->thread.fpu.hard.fp_regs[m]; | 291 | hy = tsk->thread.xstate->hardfpu.fp_regs[m]; |
343 | fpscr = tsk->thread.fpu.hard.fpscr; | 292 | fpscr = tsk->thread.xstate->hardfpu.fpscr; |
344 | prec = fpscr & FPSCR_DBL_PRECISION; | 293 | prec = fpscr & FPSCR_DBL_PRECISION; |
345 | 294 | ||
346 | if ((fpscr & FPSCR_CAUSE_ERROR) | 295 | if ((fpscr & FPSCR_CAUSE_ERROR) |
@@ -350,15 +299,15 @@ static int ieee_fpe_handler(struct pt_regs *regs) | |||
350 | 299 | ||
351 | /* FPU error because of denormal (doubles) */ | 300 | /* FPU error because of denormal (doubles) */ |
352 | llx = ((long long)hx << 32) | 301 | llx = ((long long)hx << 32) |
353 | | tsk->thread.fpu.hard.fp_regs[n + 1]; | 302 | | tsk->thread.xstate->hardfpu.fp_regs[n + 1]; |
354 | lly = ((long long)hy << 32) | 303 | lly = ((long long)hy << 32) |
355 | | tsk->thread.fpu.hard.fp_regs[m + 1]; | 304 | | tsk->thread.xstate->hardfpu.fp_regs[m + 1]; |
356 | if ((finsn & 0xf00f) == 0xf000) | 305 | if ((finsn & 0xf00f) == 0xf000) |
357 | llx = float64_add(llx, lly); | 306 | llx = float64_add(llx, lly); |
358 | else | 307 | else |
359 | llx = float64_sub(llx, lly); | 308 | llx = float64_sub(llx, lly); |
360 | tsk->thread.fpu.hard.fp_regs[n] = llx >> 32; | 309 | tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32; |
361 | tsk->thread.fpu.hard.fp_regs[n + 1] = llx & 0xffffffff; | 310 | tsk->thread.xstate->hardfpu.fp_regs[n + 1] = llx & 0xffffffff; |
362 | } else if ((fpscr & FPSCR_CAUSE_ERROR) | 311 | } else if ((fpscr & FPSCR_CAUSE_ERROR) |
363 | && (!prec && ((hx & 0x7fffffff) < 0x00800000 | 312 | && (!prec && ((hx & 0x7fffffff) < 0x00800000 |
364 | || (hy & 0x7fffffff) < 0x00800000))) { | 313 | || (hy & 0x7fffffff) < 0x00800000))) { |
@@ -367,7 +316,7 @@ static int ieee_fpe_handler(struct pt_regs *regs) | |||
367 | hx = float32_add(hx, hy); | 316 | hx = float32_add(hx, hy); |
368 | else | 317 | else |
369 | hx = float32_sub(hx, hy); | 318 | hx = float32_sub(hx, hy); |
370 | tsk->thread.fpu.hard.fp_regs[n] = hx; | 319 | tsk->thread.xstate->hardfpu.fp_regs[n] = hx; |
371 | } else | 320 | } else |
372 | return 0; | 321 | return 0; |
373 | 322 | ||
@@ -382,9 +331,9 @@ static int ieee_fpe_handler(struct pt_regs *regs) | |||
382 | 331 | ||
383 | n = (finsn >> 8) & 0xf; | 332 | n = (finsn >> 8) & 0xf; |
384 | m = (finsn >> 4) & 0xf; | 333 | m = (finsn >> 4) & 0xf; |
385 | hx = tsk->thread.fpu.hard.fp_regs[n]; | 334 | hx = tsk->thread.xstate->hardfpu.fp_regs[n]; |
386 | hy = tsk->thread.fpu.hard.fp_regs[m]; | 335 | hy = tsk->thread.xstate->hardfpu.fp_regs[m]; |
387 | fpscr = tsk->thread.fpu.hard.fpscr; | 336 | fpscr = tsk->thread.xstate->hardfpu.fpscr; |
388 | prec = fpscr & FPSCR_DBL_PRECISION; | 337 | prec = fpscr & FPSCR_DBL_PRECISION; |
389 | 338 | ||
390 | if ((fpscr & FPSCR_CAUSE_ERROR) | 339 | if ((fpscr & FPSCR_CAUSE_ERROR) |
@@ -394,20 +343,20 @@ static int ieee_fpe_handler(struct pt_regs *regs) | |||
394 | 343 | ||
395 | /* FPU error because of denormal (doubles) */ | 344 | /* FPU error because of denormal (doubles) */ |
396 | llx = ((long long)hx << 32) | 345 | llx = ((long long)hx << 32) |
397 | | tsk->thread.fpu.hard.fp_regs[n + 1]; | 346 | | tsk->thread.xstate->hardfpu.fp_regs[n + 1]; |
398 | lly = ((long long)hy << 32) | 347 | lly = ((long long)hy << 32) |
399 | | tsk->thread.fpu.hard.fp_regs[m + 1]; | 348 | | tsk->thread.xstate->hardfpu.fp_regs[m + 1]; |
400 | 349 | ||
401 | llx = float64_div(llx, lly); | 350 | llx = float64_div(llx, lly); |
402 | 351 | ||
403 | tsk->thread.fpu.hard.fp_regs[n] = llx >> 32; | 352 | tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32; |
404 | tsk->thread.fpu.hard.fp_regs[n + 1] = llx & 0xffffffff; | 353 | tsk->thread.xstate->hardfpu.fp_regs[n + 1] = llx & 0xffffffff; |
405 | } else if ((fpscr & FPSCR_CAUSE_ERROR) | 354 | } else if ((fpscr & FPSCR_CAUSE_ERROR) |
406 | && (!prec && ((hx & 0x7fffffff) < 0x00800000 | 355 | && (!prec && ((hx & 0x7fffffff) < 0x00800000 |
407 | || (hy & 0x7fffffff) < 0x00800000))) { | 356 | || (hy & 0x7fffffff) < 0x00800000))) { |
408 | /* FPU error because of denormal (floats) */ | 357 | /* FPU error because of denormal (floats) */ |
409 | hx = float32_div(hx, hy); | 358 | hx = float32_div(hx, hy); |
410 | tsk->thread.fpu.hard.fp_regs[n] = hx; | 359 | tsk->thread.xstate->hardfpu.fp_regs[n] = hx; |
411 | } else | 360 | } else |
412 | return 0; | 361 | return 0; |
413 | 362 | ||
@@ -420,17 +369,17 @@ static int ieee_fpe_handler(struct pt_regs *regs) | |||
420 | unsigned int hx; | 369 | unsigned int hx; |
421 | 370 | ||
422 | m = (finsn >> 8) & 0x7; | 371 | m = (finsn >> 8) & 0x7; |
423 | hx = tsk->thread.fpu.hard.fp_regs[m]; | 372 | hx = tsk->thread.xstate->hardfpu.fp_regs[m]; |
424 | 373 | ||
425 | if ((tsk->thread.fpu.hard.fpscr & FPSCR_CAUSE_ERROR) | 374 | if ((tsk->thread.xstate->hardfpu.fpscr & FPSCR_CAUSE_ERROR) |
426 | && ((hx & 0x7fffffff) < 0x00100000)) { | 375 | && ((hx & 0x7fffffff) < 0x00100000)) { |
427 | /* subnormal double to float conversion */ | 376 | /* subnormal double to float conversion */ |
428 | long long llx; | 377 | long long llx; |
429 | 378 | ||
430 | llx = ((long long)tsk->thread.fpu.hard.fp_regs[m] << 32) | 379 | llx = ((long long)tsk->thread.xstate->hardfpu.fp_regs[m] << 32) |
431 | | tsk->thread.fpu.hard.fp_regs[m + 1]; | 380 | | tsk->thread.xstate->hardfpu.fp_regs[m + 1]; |
432 | 381 | ||
433 | tsk->thread.fpu.hard.fpul = float64_to_float32(llx); | 382 | tsk->thread.xstate->hardfpu.fpul = float64_to_float32(llx); |
434 | } else | 383 | } else |
435 | return 0; | 384 | return 0; |
436 | 385 | ||
@@ -449,7 +398,7 @@ void float_raise(unsigned int flags) | |||
449 | int float_rounding_mode(void) | 398 | int float_rounding_mode(void) |
450 | { | 399 | { |
451 | struct task_struct *tsk = current; | 400 | struct task_struct *tsk = current; |
452 | int roundingMode = FPSCR_ROUNDING_MODE(tsk->thread.fpu.hard.fpscr); | 401 | int roundingMode = FPSCR_ROUNDING_MODE(tsk->thread.xstate->hardfpu.fpscr); |
453 | return roundingMode; | 402 | return roundingMode; |
454 | } | 403 | } |
455 | 404 | ||
@@ -461,16 +410,16 @@ BUILD_TRAP_HANDLER(fpu_error) | |||
461 | __unlazy_fpu(tsk, regs); | 410 | __unlazy_fpu(tsk, regs); |
462 | fpu_exception_flags = 0; | 411 | fpu_exception_flags = 0; |
463 | if (ieee_fpe_handler(regs)) { | 412 | if (ieee_fpe_handler(regs)) { |
464 | tsk->thread.fpu.hard.fpscr &= | 413 | tsk->thread.xstate->hardfpu.fpscr &= |
465 | ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK); | 414 | ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK); |
466 | tsk->thread.fpu.hard.fpscr |= fpu_exception_flags; | 415 | tsk->thread.xstate->hardfpu.fpscr |= fpu_exception_flags; |
467 | /* Set the FPSCR flag as well as cause bits - simply | 416 | /* Set the FPSCR flag as well as cause bits - simply |
468 | * replicate the cause */ | 417 | * replicate the cause */ |
469 | tsk->thread.fpu.hard.fpscr |= (fpu_exception_flags >> 10); | 418 | tsk->thread.xstate->hardfpu.fpscr |= (fpu_exception_flags >> 10); |
470 | grab_fpu(regs); | 419 | grab_fpu(regs); |
471 | restore_fpu(tsk); | 420 | restore_fpu(tsk); |
472 | task_thread_info(tsk)->status |= TS_USEDFPU; | 421 | task_thread_info(tsk)->status |= TS_USEDFPU; |
473 | if ((((tsk->thread.fpu.hard.fpscr & FPSCR_ENABLE_MASK) >> 7) & | 422 | if ((((tsk->thread.xstate->hardfpu.fpscr & FPSCR_ENABLE_MASK) >> 7) & |
474 | (fpu_exception_flags >> 2)) == 0) { | 423 | (fpu_exception_flags >> 2)) == 0) { |
475 | return; | 424 | return; |
476 | } | 425 | } |
@@ -478,33 +427,3 @@ BUILD_TRAP_HANDLER(fpu_error) | |||
478 | 427 | ||
479 | force_sig(SIGFPE, tsk); | 428 | force_sig(SIGFPE, tsk); |
480 | } | 429 | } |
481 | |||
482 | void fpu_state_restore(struct pt_regs *regs) | ||
483 | { | ||
484 | struct task_struct *tsk = current; | ||
485 | |||
486 | grab_fpu(regs); | ||
487 | if (unlikely(!user_mode(regs))) { | ||
488 | printk(KERN_ERR "BUG: FPU is used in kernel mode.\n"); | ||
489 | BUG(); | ||
490 | return; | ||
491 | } | ||
492 | |||
493 | if (likely(used_math())) { | ||
494 | /* Using the FPU again. */ | ||
495 | restore_fpu(tsk); | ||
496 | } else { | ||
497 | /* First time FPU user. */ | ||
498 | fpu_init(); | ||
499 | set_used_math(); | ||
500 | } | ||
501 | task_thread_info(tsk)->status |= TS_USEDFPU; | ||
502 | tsk->fpu_counter++; | ||
503 | } | ||
504 | |||
505 | BUILD_TRAP_HANDLER(fpu_state_restore) | ||
506 | { | ||
507 | TRAP_HANDLER_DECL; | ||
508 | |||
509 | fpu_state_restore(regs); | ||
510 | } | ||
diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile index 33bab477d2e2..b144e8af89dc 100644 --- a/arch/sh/kernel/cpu/sh4a/Makefile +++ b/arch/sh/kernel/cpu/sh4a/Makefile | |||
@@ -41,7 +41,8 @@ pinmux-$(CONFIG_CPU_SUBTYPE_SH7757) := pinmux-sh7757.o | |||
41 | pinmux-$(CONFIG_CPU_SUBTYPE_SH7785) := pinmux-sh7785.o | 41 | pinmux-$(CONFIG_CPU_SUBTYPE_SH7785) := pinmux-sh7785.o |
42 | pinmux-$(CONFIG_CPU_SUBTYPE_SH7786) := pinmux-sh7786.o | 42 | pinmux-$(CONFIG_CPU_SUBTYPE_SH7786) := pinmux-sh7786.o |
43 | 43 | ||
44 | obj-y += $(clock-y) | 44 | obj-y += $(clock-y) |
45 | obj-$(CONFIG_SMP) += $(smp-y) | 45 | obj-$(CONFIG_SMP) += $(smp-y) |
46 | obj-$(CONFIG_GENERIC_GPIO) += $(pinmux-y) | 46 | obj-$(CONFIG_GENERIC_GPIO) += $(pinmux-y) |
47 | obj-$(CONFIG_PERF_EVENTS) += perf_event.o | 47 | obj-$(CONFIG_PERF_EVENTS) += perf_event.o |
48 | obj-$(CONFIG_HAVE_HW_BREAKPOINT) += ubc.o | ||
diff --git a/arch/sh/kernel/cpu/sh4a/ubc.c b/arch/sh/kernel/cpu/sh4a/ubc.c new file mode 100644 index 000000000000..efb2745bcb36 --- /dev/null +++ b/arch/sh/kernel/cpu/sh4a/ubc.c | |||
@@ -0,0 +1,133 @@ | |||
1 | /* | ||
2 | * arch/sh/kernel/cpu/sh4a/ubc.c | ||
3 | * | ||
4 | * On-chip UBC support for SH-4A CPUs. | ||
5 | * | ||
6 | * Copyright (C) 2009 - 2010 Paul Mundt | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General Public | ||
9 | * License. See the file "COPYING" in the main directory of this archive | ||
10 | * for more details. | ||
11 | */ | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/err.h> | ||
14 | #include <linux/clk.h> | ||
15 | #include <linux/io.h> | ||
16 | #include <asm/hw_breakpoint.h> | ||
17 | |||
18 | #define UBC_CBR(idx) (0xff200000 + (0x20 * idx)) | ||
19 | #define UBC_CRR(idx) (0xff200004 + (0x20 * idx)) | ||
20 | #define UBC_CAR(idx) (0xff200008 + (0x20 * idx)) | ||
21 | #define UBC_CAMR(idx) (0xff20000c + (0x20 * idx)) | ||
22 | |||
23 | #define UBC_CCMFR 0xff200600 | ||
24 | #define UBC_CBCR 0xff200620 | ||
25 | |||
26 | /* CRR */ | ||
27 | #define UBC_CRR_PCB (1 << 1) | ||
28 | #define UBC_CRR_BIE (1 << 0) | ||
29 | |||
30 | /* CBR */ | ||
31 | #define UBC_CBR_CE (1 << 0) | ||
32 | |||
33 | static struct sh_ubc sh4a_ubc; | ||
34 | |||
35 | static void sh4a_ubc_enable(struct arch_hw_breakpoint *info, int idx) | ||
36 | { | ||
37 | __raw_writel(UBC_CBR_CE | info->len | info->type, UBC_CBR(idx)); | ||
38 | __raw_writel(info->address, UBC_CAR(idx)); | ||
39 | } | ||
40 | |||
41 | static void sh4a_ubc_disable(struct arch_hw_breakpoint *info, int idx) | ||
42 | { | ||
43 | __raw_writel(0, UBC_CBR(idx)); | ||
44 | __raw_writel(0, UBC_CAR(idx)); | ||
45 | } | ||
46 | |||
47 | static void sh4a_ubc_enable_all(unsigned long mask) | ||
48 | { | ||
49 | int i; | ||
50 | |||
51 | for (i = 0; i < sh4a_ubc.num_events; i++) | ||
52 | if (mask & (1 << i)) | ||
53 | __raw_writel(__raw_readl(UBC_CBR(i)) | UBC_CBR_CE, | ||
54 | UBC_CBR(i)); | ||
55 | } | ||
56 | |||
57 | static void sh4a_ubc_disable_all(void) | ||
58 | { | ||
59 | int i; | ||
60 | |||
61 | for (i = 0; i < sh4a_ubc.num_events; i++) | ||
62 | __raw_writel(__raw_readl(UBC_CBR(i)) & ~UBC_CBR_CE, | ||
63 | UBC_CBR(i)); | ||
64 | } | ||
65 | |||
66 | static unsigned long sh4a_ubc_active_mask(void) | ||
67 | { | ||
68 | unsigned long active = 0; | ||
69 | int i; | ||
70 | |||
71 | for (i = 0; i < sh4a_ubc.num_events; i++) | ||
72 | if (__raw_readl(UBC_CBR(i)) & UBC_CBR_CE) | ||
73 | active |= (1 << i); | ||
74 | |||
75 | return active; | ||
76 | } | ||
77 | |||
78 | static unsigned long sh4a_ubc_triggered_mask(void) | ||
79 | { | ||
80 | return __raw_readl(UBC_CCMFR); | ||
81 | } | ||
82 | |||
83 | static void sh4a_ubc_clear_triggered_mask(unsigned long mask) | ||
84 | { | ||
85 | __raw_writel(__raw_readl(UBC_CCMFR) & ~mask, UBC_CCMFR); | ||
86 | } | ||
87 | |||
88 | static struct sh_ubc sh4a_ubc = { | ||
89 | .name = "SH-4A", | ||
90 | .num_events = 2, | ||
91 | .trap_nr = 0x1e0, | ||
92 | .enable = sh4a_ubc_enable, | ||
93 | .disable = sh4a_ubc_disable, | ||
94 | .enable_all = sh4a_ubc_enable_all, | ||
95 | .disable_all = sh4a_ubc_disable_all, | ||
96 | .active_mask = sh4a_ubc_active_mask, | ||
97 | .triggered_mask = sh4a_ubc_triggered_mask, | ||
98 | .clear_triggered_mask = sh4a_ubc_clear_triggered_mask, | ||
99 | }; | ||
100 | |||
101 | static int __init sh4a_ubc_init(void) | ||
102 | { | ||
103 | struct clk *ubc_iclk = clk_get(NULL, "ubc0"); | ||
104 | int i; | ||
105 | |||
106 | /* | ||
107 | * The UBC MSTP bit is optional, as not all platforms will have | ||
108 | * it. Just ignore it if we can't find it. | ||
109 | */ | ||
110 | if (IS_ERR(ubc_iclk)) | ||
111 | ubc_iclk = NULL; | ||
112 | |||
113 | clk_enable(ubc_iclk); | ||
114 | |||
115 | __raw_writel(0, UBC_CBCR); | ||
116 | |||
117 | for (i = 0; i < sh4a_ubc.num_events; i++) { | ||
118 | __raw_writel(0, UBC_CAMR(i)); | ||
119 | __raw_writel(0, UBC_CBR(i)); | ||
120 | |||
121 | __raw_writel(UBC_CRR_BIE | UBC_CRR_PCB, UBC_CRR(i)); | ||
122 | |||
123 | /* dummy read for write posting */ | ||
124 | (void)__raw_readl(UBC_CRR(i)); | ||
125 | } | ||
126 | |||
127 | clk_disable(ubc_iclk); | ||
128 | |||
129 | sh4a_ubc.clk = ubc_iclk; | ||
130 | |||
131 | return register_sh_ubc(&sh4a_ubc); | ||
132 | } | ||
133 | arch_initcall(sh4a_ubc_init); | ||
diff --git a/arch/sh/kernel/debugtraps.S b/arch/sh/kernel/debugtraps.S index 591741383ee6..7a1b46fec0f4 100644 --- a/arch/sh/kernel/debugtraps.S +++ b/arch/sh/kernel/debugtraps.S | |||
@@ -13,7 +13,6 @@ | |||
13 | #include <linux/linkage.h> | 13 | #include <linux/linkage.h> |
14 | 14 | ||
15 | #if !defined(CONFIG_KGDB) | 15 | #if !defined(CONFIG_KGDB) |
16 | #define breakpoint_trap_handler debug_trap_handler | ||
17 | #define singlestep_trap_handler debug_trap_handler | 16 | #define singlestep_trap_handler debug_trap_handler |
18 | #endif | 17 | #endif |
19 | 18 | ||
diff --git a/arch/sh/kernel/hw_breakpoint.c b/arch/sh/kernel/hw_breakpoint.c new file mode 100644 index 000000000000..e2f1753d275c --- /dev/null +++ b/arch/sh/kernel/hw_breakpoint.c | |||
@@ -0,0 +1,463 @@ | |||
1 | /* | ||
2 | * arch/sh/kernel/hw_breakpoint.c | ||
3 | * | ||
4 | * Unified kernel/user-space hardware breakpoint facility for the on-chip UBC. | ||
5 | * | ||
6 | * Copyright (C) 2009 - 2010 Paul Mundt | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General Public | ||
9 | * License. See the file "COPYING" in the main directory of this archive | ||
10 | * for more details. | ||
11 | */ | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/perf_event.h> | ||
14 | #include <linux/hw_breakpoint.h> | ||
15 | #include <linux/percpu.h> | ||
16 | #include <linux/kallsyms.h> | ||
17 | #include <linux/notifier.h> | ||
18 | #include <linux/kprobes.h> | ||
19 | #include <linux/kdebug.h> | ||
20 | #include <linux/io.h> | ||
21 | #include <linux/clk.h> | ||
22 | #include <asm/hw_breakpoint.h> | ||
23 | #include <asm/mmu_context.h> | ||
24 | #include <asm/ptrace.h> | ||
25 | |||
26 | /* | ||
27 | * Stores the breakpoints currently in use on each breakpoint address | ||
28 | * register for each cpus | ||
29 | */ | ||
30 | static DEFINE_PER_CPU(struct perf_event *, bp_per_reg[HBP_NUM]); | ||
31 | |||
32 | /* | ||
33 | * A dummy placeholder for early accesses until the CPUs get a chance to | ||
34 | * register their UBCs later in the boot process. | ||
35 | */ | ||
36 | static struct sh_ubc ubc_dummy = { .num_events = 0 }; | ||
37 | |||
38 | static struct sh_ubc *sh_ubc __read_mostly = &ubc_dummy; | ||
39 | |||
40 | /* | ||
41 | * Install a perf counter breakpoint. | ||
42 | * | ||
43 | * We seek a free UBC channel and use it for this breakpoint. | ||
44 | * | ||
45 | * Atomic: we hold the counter->ctx->lock and we only handle variables | ||
46 | * and registers local to this cpu. | ||
47 | */ | ||
48 | int arch_install_hw_breakpoint(struct perf_event *bp) | ||
49 | { | ||
50 | struct arch_hw_breakpoint *info = counter_arch_bp(bp); | ||
51 | int i; | ||
52 | |||
53 | for (i = 0; i < sh_ubc->num_events; i++) { | ||
54 | struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]); | ||
55 | |||
56 | if (!*slot) { | ||
57 | *slot = bp; | ||
58 | break; | ||
59 | } | ||
60 | } | ||
61 | |||
62 | if (WARN_ONCE(i == sh_ubc->num_events, "Can't find any breakpoint slot")) | ||
63 | return -EBUSY; | ||
64 | |||
65 | clk_enable(sh_ubc->clk); | ||
66 | sh_ubc->enable(info, i); | ||
67 | |||
68 | return 0; | ||
69 | } | ||
70 | |||
71 | /* | ||
72 | * Uninstall the breakpoint contained in the given counter. | ||
73 | * | ||
74 | * First we search the debug address register it uses and then we disable | ||
75 | * it. | ||
76 | * | ||
77 | * Atomic: we hold the counter->ctx->lock and we only handle variables | ||
78 | * and registers local to this cpu. | ||
79 | */ | ||
80 | void arch_uninstall_hw_breakpoint(struct perf_event *bp) | ||
81 | { | ||
82 | struct arch_hw_breakpoint *info = counter_arch_bp(bp); | ||
83 | int i; | ||
84 | |||
85 | for (i = 0; i < sh_ubc->num_events; i++) { | ||
86 | struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]); | ||
87 | |||
88 | if (*slot == bp) { | ||
89 | *slot = NULL; | ||
90 | break; | ||
91 | } | ||
92 | } | ||
93 | |||
94 | if (WARN_ONCE(i == sh_ubc->num_events, "Can't find any breakpoint slot")) | ||
95 | return; | ||
96 | |||
97 | sh_ubc->disable(info, i); | ||
98 | clk_disable(sh_ubc->clk); | ||
99 | } | ||
100 | |||
101 | static int get_hbp_len(u16 hbp_len) | ||
102 | { | ||
103 | unsigned int len_in_bytes = 0; | ||
104 | |||
105 | switch (hbp_len) { | ||
106 | case SH_BREAKPOINT_LEN_1: | ||
107 | len_in_bytes = 1; | ||
108 | break; | ||
109 | case SH_BREAKPOINT_LEN_2: | ||
110 | len_in_bytes = 2; | ||
111 | break; | ||
112 | case SH_BREAKPOINT_LEN_4: | ||
113 | len_in_bytes = 4; | ||
114 | break; | ||
115 | case SH_BREAKPOINT_LEN_8: | ||
116 | len_in_bytes = 8; | ||
117 | break; | ||
118 | } | ||
119 | return len_in_bytes; | ||
120 | } | ||
121 | |||
122 | /* | ||
123 | * Check for virtual address in user space. | ||
124 | */ | ||
125 | int arch_check_va_in_userspace(unsigned long va, u16 hbp_len) | ||
126 | { | ||
127 | unsigned int len; | ||
128 | |||
129 | len = get_hbp_len(hbp_len); | ||
130 | |||
131 | return (va <= TASK_SIZE - len); | ||
132 | } | ||
133 | |||
134 | /* | ||
135 | * Check for virtual address in kernel space. | ||
136 | */ | ||
137 | static int arch_check_va_in_kernelspace(unsigned long va, u8 hbp_len) | ||
138 | { | ||
139 | unsigned int len; | ||
140 | |||
141 | len = get_hbp_len(hbp_len); | ||
142 | |||
143 | return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE); | ||
144 | } | ||
145 | |||
146 | /* | ||
147 | * Store a breakpoint's encoded address, length, and type. | ||
148 | */ | ||
149 | static int arch_store_info(struct perf_event *bp) | ||
150 | { | ||
151 | struct arch_hw_breakpoint *info = counter_arch_bp(bp); | ||
152 | |||
153 | /* | ||
154 | * User-space requests will always have the address field populated | ||
155 | * For kernel-addresses, either the address or symbol name can be | ||
156 | * specified. | ||
157 | */ | ||
158 | if (info->name) | ||
159 | info->address = (unsigned long)kallsyms_lookup_name(info->name); | ||
160 | if (info->address) | ||
161 | return 0; | ||
162 | |||
163 | return -EINVAL; | ||
164 | } | ||
165 | |||
166 | int arch_bp_generic_fields(int sh_len, int sh_type, | ||
167 | int *gen_len, int *gen_type) | ||
168 | { | ||
169 | /* Len */ | ||
170 | switch (sh_len) { | ||
171 | case SH_BREAKPOINT_LEN_1: | ||
172 | *gen_len = HW_BREAKPOINT_LEN_1; | ||
173 | break; | ||
174 | case SH_BREAKPOINT_LEN_2: | ||
175 | *gen_len = HW_BREAKPOINT_LEN_2; | ||
176 | break; | ||
177 | case SH_BREAKPOINT_LEN_4: | ||
178 | *gen_len = HW_BREAKPOINT_LEN_4; | ||
179 | break; | ||
180 | case SH_BREAKPOINT_LEN_8: | ||
181 | *gen_len = HW_BREAKPOINT_LEN_8; | ||
182 | break; | ||
183 | default: | ||
184 | return -EINVAL; | ||
185 | } | ||
186 | |||
187 | /* Type */ | ||
188 | switch (sh_type) { | ||
189 | case SH_BREAKPOINT_READ: | ||
190 | *gen_type = HW_BREAKPOINT_R; | ||
191 | case SH_BREAKPOINT_WRITE: | ||
192 | *gen_type = HW_BREAKPOINT_W; | ||
193 | break; | ||
194 | case SH_BREAKPOINT_RW: | ||
195 | *gen_type = HW_BREAKPOINT_W | HW_BREAKPOINT_R; | ||
196 | break; | ||
197 | default: | ||
198 | return -EINVAL; | ||
199 | } | ||
200 | |||
201 | return 0; | ||
202 | } | ||
203 | |||
204 | static int arch_build_bp_info(struct perf_event *bp) | ||
205 | { | ||
206 | struct arch_hw_breakpoint *info = counter_arch_bp(bp); | ||
207 | |||
208 | info->address = bp->attr.bp_addr; | ||
209 | |||
210 | /* Len */ | ||
211 | switch (bp->attr.bp_len) { | ||
212 | case HW_BREAKPOINT_LEN_1: | ||
213 | info->len = SH_BREAKPOINT_LEN_1; | ||
214 | break; | ||
215 | case HW_BREAKPOINT_LEN_2: | ||
216 | info->len = SH_BREAKPOINT_LEN_2; | ||
217 | break; | ||
218 | case HW_BREAKPOINT_LEN_4: | ||
219 | info->len = SH_BREAKPOINT_LEN_4; | ||
220 | break; | ||
221 | case HW_BREAKPOINT_LEN_8: | ||
222 | info->len = SH_BREAKPOINT_LEN_8; | ||
223 | break; | ||
224 | default: | ||
225 | return -EINVAL; | ||
226 | } | ||
227 | |||
228 | /* Type */ | ||
229 | switch (bp->attr.bp_type) { | ||
230 | case HW_BREAKPOINT_R: | ||
231 | info->type = SH_BREAKPOINT_READ; | ||
232 | break; | ||
233 | case HW_BREAKPOINT_W: | ||
234 | info->type = SH_BREAKPOINT_WRITE; | ||
235 | break; | ||
236 | case HW_BREAKPOINT_W | HW_BREAKPOINT_R: | ||
237 | info->type = SH_BREAKPOINT_RW; | ||
238 | break; | ||
239 | default: | ||
240 | return -EINVAL; | ||
241 | } | ||
242 | |||
243 | return 0; | ||
244 | } | ||
245 | |||
246 | /* | ||
247 | * Validate the arch-specific HW Breakpoint register settings | ||
248 | */ | ||
249 | int arch_validate_hwbkpt_settings(struct perf_event *bp, | ||
250 | struct task_struct *tsk) | ||
251 | { | ||
252 | struct arch_hw_breakpoint *info = counter_arch_bp(bp); | ||
253 | unsigned int align; | ||
254 | int ret; | ||
255 | |||
256 | ret = arch_build_bp_info(bp); | ||
257 | if (ret) | ||
258 | return ret; | ||
259 | |||
260 | ret = -EINVAL; | ||
261 | |||
262 | switch (info->len) { | ||
263 | case SH_BREAKPOINT_LEN_1: | ||
264 | align = 0; | ||
265 | break; | ||
266 | case SH_BREAKPOINT_LEN_2: | ||
267 | align = 1; | ||
268 | break; | ||
269 | case SH_BREAKPOINT_LEN_4: | ||
270 | align = 3; | ||
271 | break; | ||
272 | case SH_BREAKPOINT_LEN_8: | ||
273 | align = 7; | ||
274 | break; | ||
275 | default: | ||
276 | return ret; | ||
277 | } | ||
278 | |||
279 | ret = arch_store_info(bp); | ||
280 | |||
281 | if (ret < 0) | ||
282 | return ret; | ||
283 | |||
284 | /* | ||
285 | * Check that the low-order bits of the address are appropriate | ||
286 | * for the alignment implied by len. | ||
287 | */ | ||
288 | if (info->address & align) | ||
289 | return -EINVAL; | ||
290 | |||
291 | /* Check that the virtual address is in the proper range */ | ||
292 | if (tsk) { | ||
293 | if (!arch_check_va_in_userspace(info->address, info->len)) | ||
294 | return -EFAULT; | ||
295 | } else { | ||
296 | if (!arch_check_va_in_kernelspace(info->address, info->len)) | ||
297 | return -EFAULT; | ||
298 | } | ||
299 | |||
300 | return 0; | ||
301 | } | ||
302 | |||
303 | /* | ||
304 | * Release the user breakpoints used by ptrace | ||
305 | */ | ||
306 | void flush_ptrace_hw_breakpoint(struct task_struct *tsk) | ||
307 | { | ||
308 | int i; | ||
309 | struct thread_struct *t = &tsk->thread; | ||
310 | |||
311 | for (i = 0; i < sh_ubc->num_events; i++) { | ||
312 | unregister_hw_breakpoint(t->ptrace_bps[i]); | ||
313 | t->ptrace_bps[i] = NULL; | ||
314 | } | ||
315 | } | ||
316 | |||
317 | static int __kprobes hw_breakpoint_handler(struct die_args *args) | ||
318 | { | ||
319 | int cpu, i, rc = NOTIFY_STOP; | ||
320 | struct perf_event *bp; | ||
321 | unsigned int cmf, resume_mask; | ||
322 | |||
323 | /* | ||
324 | * Do an early return if none of the channels triggered. | ||
325 | */ | ||
326 | cmf = sh_ubc->triggered_mask(); | ||
327 | if (unlikely(!cmf)) | ||
328 | return NOTIFY_DONE; | ||
329 | |||
330 | /* | ||
331 | * By default, resume all of the active channels. | ||
332 | */ | ||
333 | resume_mask = sh_ubc->active_mask(); | ||
334 | |||
335 | /* | ||
336 | * Disable breakpoints during exception handling. | ||
337 | */ | ||
338 | sh_ubc->disable_all(); | ||
339 | |||
340 | cpu = get_cpu(); | ||
341 | for (i = 0; i < sh_ubc->num_events; i++) { | ||
342 | unsigned long event_mask = (1 << i); | ||
343 | |||
344 | if (likely(!(cmf & event_mask))) | ||
345 | continue; | ||
346 | |||
347 | /* | ||
348 | * The counter may be concurrently released but that can only | ||
349 | * occur from a call_rcu() path. We can then safely fetch | ||
350 | * the breakpoint, use its callback, touch its counter | ||
351 | * while we are in an rcu_read_lock() path. | ||
352 | */ | ||
353 | rcu_read_lock(); | ||
354 | |||
355 | bp = per_cpu(bp_per_reg[i], cpu); | ||
356 | if (bp) | ||
357 | rc = NOTIFY_DONE; | ||
358 | |||
359 | /* | ||
360 | * Reset the condition match flag to denote completion of | ||
361 | * exception handling. | ||
362 | */ | ||
363 | sh_ubc->clear_triggered_mask(event_mask); | ||
364 | |||
365 | /* | ||
366 | * bp can be NULL due to concurrent perf counter | ||
367 | * removing. | ||
368 | */ | ||
369 | if (!bp) { | ||
370 | rcu_read_unlock(); | ||
371 | break; | ||
372 | } | ||
373 | |||
374 | /* | ||
375 | * Don't restore the channel if the breakpoint is from | ||
376 | * ptrace, as it always operates in one-shot mode. | ||
377 | */ | ||
378 | if (bp->overflow_handler == ptrace_triggered) | ||
379 | resume_mask &= ~(1 << i); | ||
380 | |||
381 | perf_bp_event(bp, args->regs); | ||
382 | |||
383 | /* Deliver the signal to userspace */ | ||
384 | if (arch_check_va_in_userspace(bp->attr.bp_addr, | ||
385 | bp->attr.bp_len)) { | ||
386 | siginfo_t info; | ||
387 | |||
388 | info.si_signo = args->signr; | ||
389 | info.si_errno = notifier_to_errno(rc); | ||
390 | info.si_code = TRAP_HWBKPT; | ||
391 | |||
392 | force_sig_info(args->signr, &info, current); | ||
393 | } | ||
394 | |||
395 | rcu_read_unlock(); | ||
396 | } | ||
397 | |||
398 | if (cmf == 0) | ||
399 | rc = NOTIFY_DONE; | ||
400 | |||
401 | sh_ubc->enable_all(resume_mask); | ||
402 | |||
403 | put_cpu(); | ||
404 | |||
405 | return rc; | ||
406 | } | ||
407 | |||
408 | BUILD_TRAP_HANDLER(breakpoint) | ||
409 | { | ||
410 | unsigned long ex = lookup_exception_vector(); | ||
411 | TRAP_HANDLER_DECL; | ||
412 | |||
413 | notify_die(DIE_BREAKPOINT, "breakpoint", regs, 0, ex, SIGTRAP); | ||
414 | } | ||
415 | |||
416 | /* | ||
417 | * Handle debug exception notifications. | ||
418 | */ | ||
419 | int __kprobes hw_breakpoint_exceptions_notify(struct notifier_block *unused, | ||
420 | unsigned long val, void *data) | ||
421 | { | ||
422 | struct die_args *args = data; | ||
423 | |||
424 | if (val != DIE_BREAKPOINT) | ||
425 | return NOTIFY_DONE; | ||
426 | |||
427 | /* | ||
428 | * If the breakpoint hasn't been triggered by the UBC, it's | ||
429 | * probably from a debugger, so don't do anything more here. | ||
430 | * | ||
431 | * This also permits the UBC interface clock to remain off for | ||
432 | * non-UBC breakpoints, as we don't need to check the triggered | ||
433 | * or active channel masks. | ||
434 | */ | ||
435 | if (args->trapnr != sh_ubc->trap_nr) | ||
436 | return NOTIFY_DONE; | ||
437 | |||
438 | return hw_breakpoint_handler(data); | ||
439 | } | ||
440 | |||
441 | void hw_breakpoint_pmu_read(struct perf_event *bp) | ||
442 | { | ||
443 | /* TODO */ | ||
444 | } | ||
445 | |||
446 | void hw_breakpoint_pmu_unthrottle(struct perf_event *bp) | ||
447 | { | ||
448 | /* TODO */ | ||
449 | } | ||
450 | |||
451 | int register_sh_ubc(struct sh_ubc *ubc) | ||
452 | { | ||
453 | /* Bail if it's already assigned */ | ||
454 | if (sh_ubc != &ubc_dummy) | ||
455 | return -EBUSY; | ||
456 | sh_ubc = ubc; | ||
457 | |||
458 | pr_info("HW Breakpoints: %s UBC support registered\n", ubc->name); | ||
459 | |||
460 | WARN_ON(ubc->num_events > HBP_NUM); | ||
461 | |||
462 | return 0; | ||
463 | } | ||
diff --git a/arch/sh/kernel/kgdb.c b/arch/sh/kernel/kgdb.c index 3e532d0d4a5c..70c69659b846 100644 --- a/arch/sh/kernel/kgdb.c +++ b/arch/sh/kernel/kgdb.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * SuperH KGDB support | 2 | * SuperH KGDB support |
3 | * | 3 | * |
4 | * Copyright (C) 2008 Paul Mundt | 4 | * Copyright (C) 2008 - 2009 Paul Mundt |
5 | * | 5 | * |
6 | * Single stepping taken from the old stub by Henry Bell and Jeremy Siegel. | 6 | * Single stepping taken from the old stub by Henry Bell and Jeremy Siegel. |
7 | * | 7 | * |
@@ -251,24 +251,60 @@ BUILD_TRAP_HANDLER(singlestep) | |||
251 | local_irq_restore(flags); | 251 | local_irq_restore(flags); |
252 | } | 252 | } |
253 | 253 | ||
254 | static int __kgdb_notify(struct die_args *args, unsigned long cmd) | ||
255 | { | ||
256 | int ret; | ||
257 | |||
258 | switch (cmd) { | ||
259 | case DIE_BREAKPOINT: | ||
260 | /* | ||
261 | * This means a user thread is single stepping | ||
262 | * a system call which should be ignored | ||
263 | */ | ||
264 | if (test_thread_flag(TIF_SINGLESTEP)) | ||
265 | return NOTIFY_DONE; | ||
266 | |||
267 | ret = kgdb_handle_exception(args->trapnr & 0xff, args->signr, | ||
268 | args->err, args->regs); | ||
269 | if (ret) | ||
270 | return NOTIFY_DONE; | ||
271 | |||
272 | break; | ||
273 | } | ||
254 | 274 | ||
255 | BUILD_TRAP_HANDLER(breakpoint) | 275 | return NOTIFY_STOP; |
276 | } | ||
277 | |||
278 | static int | ||
279 | kgdb_notify(struct notifier_block *self, unsigned long cmd, void *ptr) | ||
256 | { | 280 | { |
257 | unsigned long flags; | 281 | unsigned long flags; |
258 | TRAP_HANDLER_DECL; | 282 | int ret; |
259 | 283 | ||
260 | local_irq_save(flags); | 284 | local_irq_save(flags); |
261 | kgdb_handle_exception(vec >> 2, SIGTRAP, 0, regs); | 285 | ret = __kgdb_notify(ptr, cmd); |
262 | local_irq_restore(flags); | 286 | local_irq_restore(flags); |
287 | |||
288 | return ret; | ||
263 | } | 289 | } |
264 | 290 | ||
291 | static struct notifier_block kgdb_notifier = { | ||
292 | .notifier_call = kgdb_notify, | ||
293 | |||
294 | /* | ||
295 | * Lowest-prio notifier priority, we want to be notified last: | ||
296 | */ | ||
297 | .priority = -INT_MAX, | ||
298 | }; | ||
299 | |||
265 | int kgdb_arch_init(void) | 300 | int kgdb_arch_init(void) |
266 | { | 301 | { |
267 | return 0; | 302 | return register_die_notifier(&kgdb_notifier); |
268 | } | 303 | } |
269 | 304 | ||
270 | void kgdb_arch_exit(void) | 305 | void kgdb_arch_exit(void) |
271 | { | 306 | { |
307 | unregister_die_notifier(&kgdb_notifier); | ||
272 | } | 308 | } |
273 | 309 | ||
274 | struct kgdb_arch arch_kgdb_ops = { | 310 | struct kgdb_arch arch_kgdb_ops = { |
diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c new file mode 100644 index 000000000000..81add9b9ea6e --- /dev/null +++ b/arch/sh/kernel/process.c | |||
@@ -0,0 +1,100 @@ | |||
1 | #include <linux/mm.h> | ||
2 | #include <linux/kernel.h> | ||
3 | #include <linux/sched.h> | ||
4 | |||
5 | struct kmem_cache *task_xstate_cachep = NULL; | ||
6 | unsigned int xstate_size; | ||
7 | |||
8 | int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) | ||
9 | { | ||
10 | *dst = *src; | ||
11 | |||
12 | if (src->thread.xstate) { | ||
13 | dst->thread.xstate = kmem_cache_alloc(task_xstate_cachep, | ||
14 | GFP_KERNEL); | ||
15 | if (!dst->thread.xstate) | ||
16 | return -ENOMEM; | ||
17 | memcpy(dst->thread.xstate, src->thread.xstate, xstate_size); | ||
18 | } | ||
19 | |||
20 | return 0; | ||
21 | } | ||
22 | |||
23 | void free_thread_xstate(struct task_struct *tsk) | ||
24 | { | ||
25 | if (tsk->thread.xstate) { | ||
26 | kmem_cache_free(task_xstate_cachep, tsk->thread.xstate); | ||
27 | tsk->thread.xstate = NULL; | ||
28 | } | ||
29 | } | ||
30 | |||
31 | #if THREAD_SHIFT < PAGE_SHIFT | ||
32 | static struct kmem_cache *thread_info_cache; | ||
33 | |||
34 | struct thread_info *alloc_thread_info(struct task_struct *tsk) | ||
35 | { | ||
36 | struct thread_info *ti; | ||
37 | |||
38 | ti = kmem_cache_alloc(thread_info_cache, GFP_KERNEL); | ||
39 | if (unlikely(ti == NULL)) | ||
40 | return NULL; | ||
41 | #ifdef CONFIG_DEBUG_STACK_USAGE | ||
42 | memset(ti, 0, THREAD_SIZE); | ||
43 | #endif | ||
44 | return ti; | ||
45 | } | ||
46 | |||
47 | void free_thread_info(struct thread_info *ti) | ||
48 | { | ||
49 | free_thread_xstate(ti->task); | ||
50 | kmem_cache_free(thread_info_cache, ti); | ||
51 | } | ||
52 | |||
53 | void thread_info_cache_init(void) | ||
54 | { | ||
55 | thread_info_cache = kmem_cache_create("thread_info", THREAD_SIZE, | ||
56 | THREAD_SIZE, SLAB_PANIC, NULL); | ||
57 | } | ||
58 | #else | ||
59 | struct thread_info *alloc_thread_info(struct task_struct *tsk) | ||
60 | { | ||
61 | #ifdef CONFIG_DEBUG_STACK_USAGE | ||
62 | gfp_t mask = GFP_KERNEL | __GFP_ZERO; | ||
63 | #else | ||
64 | gfp_t mask = GFP_KERNEL; | ||
65 | #endif | ||
66 | return (struct thread_info *)__get_free_pages(mask, THREAD_SIZE_ORDER); | ||
67 | } | ||
68 | |||
69 | void free_thread_info(struct thread_info *ti) | ||
70 | { | ||
71 | free_thread_xstate(ti->task); | ||
72 | free_pages((unsigned long)ti, THREAD_SIZE_ORDER); | ||
73 | } | ||
74 | #endif /* THREAD_SHIFT < PAGE_SHIFT */ | ||
75 | |||
76 | void arch_task_cache_init(void) | ||
77 | { | ||
78 | if (!xstate_size) | ||
79 | return; | ||
80 | |||
81 | task_xstate_cachep = kmem_cache_create("task_xstate", xstate_size, | ||
82 | __alignof__(union thread_xstate), | ||
83 | SLAB_PANIC | SLAB_NOTRACK, NULL); | ||
84 | } | ||
85 | |||
86 | #ifdef CONFIG_SH_FPU_EMU | ||
87 | # define HAVE_SOFTFP 1 | ||
88 | #else | ||
89 | # define HAVE_SOFTFP 0 | ||
90 | #endif | ||
91 | |||
92 | void init_thread_xstate(void) | ||
93 | { | ||
94 | if (boot_cpu_data.flags & CPU_HAS_FPU) | ||
95 | xstate_size = sizeof(struct sh_fpu_hard_struct); | ||
96 | else if (HAVE_SOFTFP) | ||
97 | xstate_size = sizeof(struct sh_fpu_soft_struct); | ||
98 | else | ||
99 | xstate_size = 0; | ||
100 | } | ||
diff --git a/arch/sh/kernel/process_32.c b/arch/sh/kernel/process_32.c index d8af889366a4..856010f9ebc9 100644 --- a/arch/sh/kernel/process_32.c +++ b/arch/sh/kernel/process_32.c | |||
@@ -25,17 +25,15 @@ | |||
25 | #include <linux/fs.h> | 25 | #include <linux/fs.h> |
26 | #include <linux/ftrace.h> | 26 | #include <linux/ftrace.h> |
27 | #include <linux/preempt.h> | 27 | #include <linux/preempt.h> |
28 | #include <linux/hw_breakpoint.h> | ||
28 | #include <asm/uaccess.h> | 29 | #include <asm/uaccess.h> |
29 | #include <asm/mmu_context.h> | 30 | #include <asm/mmu_context.h> |
30 | #include <asm/pgalloc.h> | 31 | #include <asm/pgalloc.h> |
31 | #include <asm/system.h> | 32 | #include <asm/system.h> |
32 | #include <asm/ubc.h> | ||
33 | #include <asm/fpu.h> | 33 | #include <asm/fpu.h> |
34 | #include <asm/syscalls.h> | 34 | #include <asm/syscalls.h> |
35 | #include <asm/watchdog.h> | 35 | #include <asm/watchdog.h> |
36 | 36 | ||
37 | int ubc_usercnt = 0; | ||
38 | |||
39 | #ifdef CONFIG_32BIT | 37 | #ifdef CONFIG_32BIT |
40 | static void watchdog_trigger_immediate(void) | 38 | static void watchdog_trigger_immediate(void) |
41 | { | 39 | { |
@@ -147,21 +145,34 @@ int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags) | |||
147 | } | 145 | } |
148 | EXPORT_SYMBOL(kernel_thread); | 146 | EXPORT_SYMBOL(kernel_thread); |
149 | 147 | ||
148 | void start_thread(struct pt_regs *regs, unsigned long new_pc, | ||
149 | unsigned long new_sp) | ||
150 | { | ||
151 | set_fs(USER_DS); | ||
152 | |||
153 | regs->pr = 0; | ||
154 | regs->sr = SR_FD; | ||
155 | regs->pc = new_pc; | ||
156 | regs->regs[15] = new_sp; | ||
157 | |||
158 | free_thread_xstate(current); | ||
159 | } | ||
160 | EXPORT_SYMBOL(start_thread); | ||
161 | |||
150 | /* | 162 | /* |
151 | * Free current thread data structures etc.. | 163 | * Free current thread data structures etc.. |
152 | */ | 164 | */ |
153 | void exit_thread(void) | 165 | void exit_thread(void) |
154 | { | 166 | { |
155 | if (current->thread.ubc_pc) { | ||
156 | current->thread.ubc_pc = 0; | ||
157 | ubc_usercnt -= 1; | ||
158 | } | ||
159 | } | 167 | } |
160 | 168 | ||
161 | void flush_thread(void) | 169 | void flush_thread(void) |
162 | { | 170 | { |
163 | #if defined(CONFIG_SH_FPU) | ||
164 | struct task_struct *tsk = current; | 171 | struct task_struct *tsk = current; |
172 | |||
173 | flush_ptrace_hw_breakpoint(tsk); | ||
174 | |||
175 | #if defined(CONFIG_SH_FPU) | ||
165 | /* Forget lazy FPU state */ | 176 | /* Forget lazy FPU state */ |
166 | clear_fpu(tsk, task_pt_regs(tsk)); | 177 | clear_fpu(tsk, task_pt_regs(tsk)); |
167 | clear_used_math(); | 178 | clear_used_math(); |
@@ -209,11 +220,10 @@ int copy_thread(unsigned long clone_flags, unsigned long usp, | |||
209 | { | 220 | { |
210 | struct thread_info *ti = task_thread_info(p); | 221 | struct thread_info *ti = task_thread_info(p); |
211 | struct pt_regs *childregs; | 222 | struct pt_regs *childregs; |
223 | |||
212 | #if defined(CONFIG_SH_DSP) | 224 | #if defined(CONFIG_SH_DSP) |
213 | struct task_struct *tsk = current; | 225 | struct task_struct *tsk = current; |
214 | #endif | ||
215 | 226 | ||
216 | #if defined(CONFIG_SH_DSP) | ||
217 | if (is_dsp_enabled(tsk)) { | 227 | if (is_dsp_enabled(tsk)) { |
218 | /* We can use the __save_dsp or just copy the struct: | 228 | /* We can use the __save_dsp or just copy the struct: |
219 | * __save_dsp(p); | 229 | * __save_dsp(p); |
@@ -244,53 +254,11 @@ int copy_thread(unsigned long clone_flags, unsigned long usp, | |||
244 | p->thread.sp = (unsigned long) childregs; | 254 | p->thread.sp = (unsigned long) childregs; |
245 | p->thread.pc = (unsigned long) ret_from_fork; | 255 | p->thread.pc = (unsigned long) ret_from_fork; |
246 | 256 | ||
247 | p->thread.ubc_pc = 0; | 257 | memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps)); |
248 | 258 | ||
249 | return 0; | 259 | return 0; |
250 | } | 260 | } |
251 | 261 | ||
252 | /* Tracing by user break controller. */ | ||
253 | static void ubc_set_tracing(int asid, unsigned long pc) | ||
254 | { | ||
255 | #if defined(CONFIG_CPU_SH4A) | ||
256 | unsigned long val; | ||
257 | |||
258 | val = (UBC_CBR_ID_INST | UBC_CBR_RW_READ | UBC_CBR_CE); | ||
259 | val |= (UBC_CBR_AIE | UBC_CBR_AIV_SET(asid)); | ||
260 | |||
261 | ctrl_outl(val, UBC_CBR0); | ||
262 | ctrl_outl(pc, UBC_CAR0); | ||
263 | ctrl_outl(0x0, UBC_CAMR0); | ||
264 | ctrl_outl(0x0, UBC_CBCR); | ||
265 | |||
266 | val = (UBC_CRR_RES | UBC_CRR_PCB | UBC_CRR_BIE); | ||
267 | ctrl_outl(val, UBC_CRR0); | ||
268 | |||
269 | /* Read UBC register that we wrote last, for checking update */ | ||
270 | val = ctrl_inl(UBC_CRR0); | ||
271 | |||
272 | #else /* CONFIG_CPU_SH4A */ | ||
273 | ctrl_outl(pc, UBC_BARA); | ||
274 | |||
275 | #ifdef CONFIG_MMU | ||
276 | ctrl_outb(asid, UBC_BASRA); | ||
277 | #endif | ||
278 | |||
279 | ctrl_outl(0, UBC_BAMRA); | ||
280 | |||
281 | if (current_cpu_data.type == CPU_SH7729 || | ||
282 | current_cpu_data.type == CPU_SH7710 || | ||
283 | current_cpu_data.type == CPU_SH7712 || | ||
284 | current_cpu_data.type == CPU_SH7203){ | ||
285 | ctrl_outw(BBR_INST | BBR_READ | BBR_CPU, UBC_BBRA); | ||
286 | ctrl_outl(BRCR_PCBA | BRCR_PCTE, UBC_BRCR); | ||
287 | } else { | ||
288 | ctrl_outw(BBR_INST | BBR_READ, UBC_BBRA); | ||
289 | ctrl_outw(BRCR_PCBA, UBC_BRCR); | ||
290 | } | ||
291 | #endif /* CONFIG_CPU_SH4A */ | ||
292 | } | ||
293 | |||
294 | /* | 262 | /* |
295 | * switch_to(x,y) should switch tasks from x to y. | 263 | * switch_to(x,y) should switch tasks from x to y. |
296 | * | 264 | * |
@@ -304,7 +272,7 @@ __switch_to(struct task_struct *prev, struct task_struct *next) | |||
304 | 272 | ||
305 | /* we're going to use this soon, after a few expensive things */ | 273 | /* we're going to use this soon, after a few expensive things */ |
306 | if (next->fpu_counter > 5) | 274 | if (next->fpu_counter > 5) |
307 | prefetch(&next_t->fpu.hard); | 275 | prefetch(next_t->xstate); |
308 | 276 | ||
309 | #ifdef CONFIG_MMU | 277 | #ifdef CONFIG_MMU |
310 | /* | 278 | /* |
@@ -316,32 +284,13 @@ __switch_to(struct task_struct *prev, struct task_struct *next) | |||
316 | : "r" (task_thread_info(next))); | 284 | : "r" (task_thread_info(next))); |
317 | #endif | 285 | #endif |
318 | 286 | ||
319 | /* If no tasks are using the UBC, we're done */ | ||
320 | if (ubc_usercnt == 0) | ||
321 | /* If no tasks are using the UBC, we're done */; | ||
322 | else if (next->thread.ubc_pc && next->mm) { | ||
323 | int asid = 0; | ||
324 | #ifdef CONFIG_MMU | ||
325 | asid |= cpu_asid(smp_processor_id(), next->mm); | ||
326 | #endif | ||
327 | ubc_set_tracing(asid, next->thread.ubc_pc); | ||
328 | } else { | ||
329 | #if defined(CONFIG_CPU_SH4A) | ||
330 | ctrl_outl(UBC_CBR_INIT, UBC_CBR0); | ||
331 | ctrl_outl(UBC_CRR_INIT, UBC_CRR0); | ||
332 | #else | ||
333 | ctrl_outw(0, UBC_BBRA); | ||
334 | ctrl_outw(0, UBC_BBRB); | ||
335 | #endif | ||
336 | } | ||
337 | |||
338 | /* | 287 | /* |
339 | * If the task has used fpu the last 5 timeslices, just do a full | 288 | * If the task has used fpu the last 5 timeslices, just do a full |
340 | * restore of the math state immediately to avoid the trap; the | 289 | * restore of the math state immediately to avoid the trap; the |
341 | * chances of needing FPU soon are obviously high now | 290 | * chances of needing FPU soon are obviously high now |
342 | */ | 291 | */ |
343 | if (next->fpu_counter > 5) | 292 | if (next->fpu_counter > 5) |
344 | fpu_state_restore(task_pt_regs(next)); | 293 | __fpu_state_restore(); |
345 | 294 | ||
346 | return prev; | 295 | return prev; |
347 | } | 296 | } |
@@ -434,20 +383,3 @@ unsigned long get_wchan(struct task_struct *p) | |||
434 | 383 | ||
435 | return pc; | 384 | return pc; |
436 | } | 385 | } |
437 | |||
438 | asmlinkage void break_point_trap(void) | ||
439 | { | ||
440 | /* Clear tracing. */ | ||
441 | #if defined(CONFIG_CPU_SH4A) | ||
442 | ctrl_outl(UBC_CBR_INIT, UBC_CBR0); | ||
443 | ctrl_outl(UBC_CRR_INIT, UBC_CRR0); | ||
444 | #else | ||
445 | ctrl_outw(0, UBC_BBRA); | ||
446 | ctrl_outw(0, UBC_BBRB); | ||
447 | ctrl_outl(0, UBC_BRCR); | ||
448 | #endif | ||
449 | current->thread.ubc_pc = 0; | ||
450 | ubc_usercnt -= 1; | ||
451 | |||
452 | force_sig(SIGTRAP, current); | ||
453 | } | ||
diff --git a/arch/sh/kernel/ptrace_32.c b/arch/sh/kernel/ptrace_32.c index 9be35f348093..c625cdab76dd 100644 --- a/arch/sh/kernel/ptrace_32.c +++ b/arch/sh/kernel/ptrace_32.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * SuperH process tracing | 2 | * SuperH process tracing |
3 | * | 3 | * |
4 | * Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka | 4 | * Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka |
5 | * Copyright (C) 2002 - 2008 Paul Mundt | 5 | * Copyright (C) 2002 - 2009 Paul Mundt |
6 | * | 6 | * |
7 | * Audit support by Yuichi Nakamura <ynakam@hitachisoft.jp> | 7 | * Audit support by Yuichi Nakamura <ynakam@hitachisoft.jp> |
8 | * | 8 | * |
@@ -26,6 +26,7 @@ | |||
26 | #include <linux/tracehook.h> | 26 | #include <linux/tracehook.h> |
27 | #include <linux/elf.h> | 27 | #include <linux/elf.h> |
28 | #include <linux/regset.h> | 28 | #include <linux/regset.h> |
29 | #include <linux/hw_breakpoint.h> | ||
29 | #include <asm/uaccess.h> | 30 | #include <asm/uaccess.h> |
30 | #include <asm/pgtable.h> | 31 | #include <asm/pgtable.h> |
31 | #include <asm/system.h> | 32 | #include <asm/system.h> |
@@ -63,33 +64,64 @@ static inline int put_stack_long(struct task_struct *task, int offset, | |||
63 | return 0; | 64 | return 0; |
64 | } | 65 | } |
65 | 66 | ||
66 | void user_enable_single_step(struct task_struct *child) | 67 | void ptrace_triggered(struct perf_event *bp, int nmi, |
68 | struct perf_sample_data *data, struct pt_regs *regs) | ||
67 | { | 69 | { |
68 | /* Next scheduling will set up UBC */ | 70 | struct perf_event_attr attr; |
69 | if (child->thread.ubc_pc == 0) | 71 | |
70 | ubc_usercnt += 1; | 72 | /* |
73 | * Disable the breakpoint request here since ptrace has defined a | ||
74 | * one-shot behaviour for breakpoint exceptions. | ||
75 | */ | ||
76 | attr = bp->attr; | ||
77 | attr.disabled = true; | ||
78 | modify_user_hw_breakpoint(bp, &attr); | ||
79 | } | ||
80 | |||
81 | static int set_single_step(struct task_struct *tsk, unsigned long addr) | ||
82 | { | ||
83 | struct thread_struct *thread = &tsk->thread; | ||
84 | struct perf_event *bp; | ||
85 | struct perf_event_attr attr; | ||
86 | |||
87 | bp = thread->ptrace_bps[0]; | ||
88 | if (!bp) { | ||
89 | hw_breakpoint_init(&attr); | ||
90 | |||
91 | attr.bp_addr = addr; | ||
92 | attr.bp_len = HW_BREAKPOINT_LEN_2; | ||
93 | attr.bp_type = HW_BREAKPOINT_R; | ||
94 | |||
95 | bp = register_user_hw_breakpoint(&attr, ptrace_triggered, tsk); | ||
96 | if (IS_ERR(bp)) | ||
97 | return PTR_ERR(bp); | ||
98 | |||
99 | thread->ptrace_bps[0] = bp; | ||
100 | } else { | ||
101 | int err; | ||
102 | |||
103 | attr = bp->attr; | ||
104 | attr.bp_addr = addr; | ||
105 | err = modify_user_hw_breakpoint(bp, &attr); | ||
106 | if (unlikely(err)) | ||
107 | return err; | ||
108 | } | ||
109 | |||
110 | return 0; | ||
111 | } | ||
71 | 112 | ||
72 | child->thread.ubc_pc = get_stack_long(child, | 113 | void user_enable_single_step(struct task_struct *child) |
73 | offsetof(struct pt_regs, pc)); | 114 | { |
115 | unsigned long pc = get_stack_long(child, offsetof(struct pt_regs, pc)); | ||
74 | 116 | ||
75 | set_tsk_thread_flag(child, TIF_SINGLESTEP); | 117 | set_tsk_thread_flag(child, TIF_SINGLESTEP); |
118 | |||
119 | set_single_step(child, pc); | ||
76 | } | 120 | } |
77 | 121 | ||
78 | void user_disable_single_step(struct task_struct *child) | 122 | void user_disable_single_step(struct task_struct *child) |
79 | { | 123 | { |
80 | clear_tsk_thread_flag(child, TIF_SINGLESTEP); | 124 | clear_tsk_thread_flag(child, TIF_SINGLESTEP); |
81 | |||
82 | /* | ||
83 | * Ensure the UBC is not programmed at the next context switch. | ||
84 | * | ||
85 | * Normally this is not needed but there are sequences such as | ||
86 | * singlestep, signal delivery, and continue that leave the | ||
87 | * ubc_pc non-zero leading to spurious SIGTRAPs. | ||
88 | */ | ||
89 | if (child->thread.ubc_pc != 0) { | ||
90 | ubc_usercnt -= 1; | ||
91 | child->thread.ubc_pc = 0; | ||
92 | } | ||
93 | } | 125 | } |
94 | 126 | ||
95 | /* | 127 | /* |
@@ -163,10 +195,10 @@ int fpregs_get(struct task_struct *target, | |||
163 | 195 | ||
164 | if ((boot_cpu_data.flags & CPU_HAS_FPU)) | 196 | if ((boot_cpu_data.flags & CPU_HAS_FPU)) |
165 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, | 197 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, |
166 | &target->thread.fpu.hard, 0, -1); | 198 | &target->thread.xstate->hardfpu, 0, -1); |
167 | 199 | ||
168 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, | 200 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, |
169 | &target->thread.fpu.soft, 0, -1); | 201 | &target->thread.xstate->softfpu, 0, -1); |
170 | } | 202 | } |
171 | 203 | ||
172 | static int fpregs_set(struct task_struct *target, | 204 | static int fpregs_set(struct task_struct *target, |
@@ -184,10 +216,10 @@ static int fpregs_set(struct task_struct *target, | |||
184 | 216 | ||
185 | if ((boot_cpu_data.flags & CPU_HAS_FPU)) | 217 | if ((boot_cpu_data.flags & CPU_HAS_FPU)) |
186 | return user_regset_copyin(&pos, &count, &kbuf, &ubuf, | 218 | return user_regset_copyin(&pos, &count, &kbuf, &ubuf, |
187 | &target->thread.fpu.hard, 0, -1); | 219 | &target->thread.xstate->hardfpu, 0, -1); |
188 | 220 | ||
189 | return user_regset_copyin(&pos, &count, &kbuf, &ubuf, | 221 | return user_regset_copyin(&pos, &count, &kbuf, &ubuf, |
190 | &target->thread.fpu.soft, 0, -1); | 222 | &target->thread.xstate->softfpu, 0, -1); |
191 | } | 223 | } |
192 | 224 | ||
193 | static int fpregs_active(struct task_struct *target, | 225 | static int fpregs_active(struct task_struct *target, |
@@ -333,7 +365,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
333 | else | 365 | else |
334 | tmp = 0; | 366 | tmp = 0; |
335 | } else | 367 | } else |
336 | tmp = ((long *)&child->thread.fpu) | 368 | tmp = ((long *)child->thread.xstate) |
337 | [(addr - (long)&dummy->fpu) >> 2]; | 369 | [(addr - (long)&dummy->fpu) >> 2]; |
338 | } else if (addr == (long) &dummy->u_fpvalid) | 370 | } else if (addr == (long) &dummy->u_fpvalid) |
339 | tmp = !!tsk_used_math(child); | 371 | tmp = !!tsk_used_math(child); |
@@ -362,7 +394,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
362 | else if (addr >= (long) &dummy->fpu && | 394 | else if (addr >= (long) &dummy->fpu && |
363 | addr < (long) &dummy->u_fpvalid) { | 395 | addr < (long) &dummy->u_fpvalid) { |
364 | set_stopped_child_used_math(child); | 396 | set_stopped_child_used_math(child); |
365 | ((long *)&child->thread.fpu) | 397 | ((long *)child->thread.xstate) |
366 | [(addr - (long)&dummy->fpu) >> 2] = data; | 398 | [(addr - (long)&dummy->fpu) >> 2] = data; |
367 | ret = 0; | 399 | ret = 0; |
368 | } else if (addr == (long) &dummy->u_fpvalid) { | 400 | } else if (addr == (long) &dummy->u_fpvalid) { |
diff --git a/arch/sh/kernel/signal_32.c b/arch/sh/kernel/signal_32.c index 12815ce01ecd..6a7cce79eb4e 100644 --- a/arch/sh/kernel/signal_32.c +++ b/arch/sh/kernel/signal_32.c | |||
@@ -150,7 +150,7 @@ static inline int restore_sigcontext_fpu(struct sigcontext __user *sc) | |||
150 | return 0; | 150 | return 0; |
151 | 151 | ||
152 | set_used_math(); | 152 | set_used_math(); |
153 | return __copy_from_user(&tsk->thread.fpu.hard, &sc->sc_fpregs[0], | 153 | return __copy_from_user(&tsk->thread.xstate->hardfpu, &sc->sc_fpregs[0], |
154 | sizeof(long)*(16*2+2)); | 154 | sizeof(long)*(16*2+2)); |
155 | } | 155 | } |
156 | 156 | ||
@@ -175,7 +175,7 @@ static inline int save_sigcontext_fpu(struct sigcontext __user *sc, | |||
175 | clear_used_math(); | 175 | clear_used_math(); |
176 | 176 | ||
177 | unlazy_fpu(tsk, regs); | 177 | unlazy_fpu(tsk, regs); |
178 | return __copy_to_user(&sc->sc_fpregs[0], &tsk->thread.fpu.hard, | 178 | return __copy_to_user(&sc->sc_fpregs[0], &tsk->thread.xstate->hardfpu, |
179 | sizeof(long)*(16*2+2)); | 179 | sizeof(long)*(16*2+2)); |
180 | } | 180 | } |
181 | #endif /* CONFIG_SH_FPU */ | 181 | #endif /* CONFIG_SH_FPU */ |
diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c index 204def6ecb6a..9c090cb68878 100644 --- a/arch/sh/kernel/traps_32.c +++ b/arch/sh/kernel/traps_32.c | |||
@@ -846,7 +846,7 @@ void __init trap_init(void) | |||
846 | #endif | 846 | #endif |
847 | 847 | ||
848 | #ifdef TRAP_UBC | 848 | #ifdef TRAP_UBC |
849 | set_exception_table_vec(TRAP_UBC, break_point_trap); | 849 | set_exception_table_vec(TRAP_UBC, breakpoint_trap_handler); |
850 | #endif | 850 | #endif |
851 | 851 | ||
852 | /* Save off the BIOS VBR, if there is one */ | 852 | /* Save off the BIOS VBR, if there is one */ |
diff --git a/arch/sh/math-emu/math.c b/arch/sh/math-emu/math.c index d6c15cae0912..1fcdb1220975 100644 --- a/arch/sh/math-emu/math.c +++ b/arch/sh/math-emu/math.c | |||
@@ -471,10 +471,10 @@ static int fpu_emulate(u16 code, struct sh_fpu_soft_struct *fregs, struct pt_reg | |||
471 | * denormal_to_double - Given denormalized float number, | 471 | * denormal_to_double - Given denormalized float number, |
472 | * store double float | 472 | * store double float |
473 | * | 473 | * |
474 | * @fpu: Pointer to sh_fpu_hard structure | 474 | * @fpu: Pointer to sh_fpu_soft structure |
475 | * @n: Index to FP register | 475 | * @n: Index to FP register |
476 | */ | 476 | */ |
477 | static void denormal_to_double(struct sh_fpu_hard_struct *fpu, int n) | 477 | static void denormal_to_double(struct sh_fpu_soft_struct *fpu, int n) |
478 | { | 478 | { |
479 | unsigned long du, dl; | 479 | unsigned long du, dl; |
480 | unsigned long x = fpu->fpul; | 480 | unsigned long x = fpu->fpul; |
@@ -552,11 +552,11 @@ static int ieee_fpe_handler(struct pt_regs *regs) | |||
552 | if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */ | 552 | if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */ |
553 | struct task_struct *tsk = current; | 553 | struct task_struct *tsk = current; |
554 | 554 | ||
555 | if ((tsk->thread.fpu.hard.fpscr & (1 << 17))) { | 555 | if ((tsk->thread.xstate->softfpu.fpscr & (1 << 17))) { |
556 | /* FPU error */ | 556 | /* FPU error */ |
557 | denormal_to_double (&tsk->thread.fpu.hard, | 557 | denormal_to_double (&tsk->thread.xstate->softfpu, |
558 | (finsn >> 8) & 0xf); | 558 | (finsn >> 8) & 0xf); |
559 | tsk->thread.fpu.hard.fpscr &= | 559 | tsk->thread.xstate->softfpu.fpscr &= |
560 | ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK); | 560 | ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK); |
561 | task_thread_info(tsk)->status |= TS_USEDFPU; | 561 | task_thread_info(tsk)->status |= TS_USEDFPU; |
562 | } else { | 562 | } else { |
@@ -617,7 +617,7 @@ static void fpu_init(struct sh_fpu_soft_struct *fpu) | |||
617 | int do_fpu_inst(unsigned short inst, struct pt_regs *regs) | 617 | int do_fpu_inst(unsigned short inst, struct pt_regs *regs) |
618 | { | 618 | { |
619 | struct task_struct *tsk = current; | 619 | struct task_struct *tsk = current; |
620 | struct sh_fpu_soft_struct *fpu = &(tsk->thread.fpu.soft); | 620 | struct sh_fpu_soft_struct *fpu = &(tsk->thread.xstate->softfpu); |
621 | 621 | ||
622 | if (!(task_thread_info(tsk)->status & TS_USEDFPU)) { | 622 | if (!(task_thread_info(tsk)->status & TS_USEDFPU)) { |
623 | /* initialize once. */ | 623 | /* initialize once. */ |
diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c index 761910d142f8..d5fb014279ad 100644 --- a/arch/sh/mm/init.c +++ b/arch/sh/mm/init.c | |||
@@ -283,35 +283,6 @@ void free_initrd_mem(unsigned long start, unsigned long end) | |||
283 | } | 283 | } |
284 | #endif | 284 | #endif |
285 | 285 | ||
286 | #if THREAD_SHIFT < PAGE_SHIFT | ||
287 | static struct kmem_cache *thread_info_cache; | ||
288 | |||
289 | struct thread_info *alloc_thread_info(struct task_struct *tsk) | ||
290 | { | ||
291 | struct thread_info *ti; | ||
292 | |||
293 | ti = kmem_cache_alloc(thread_info_cache, GFP_KERNEL); | ||
294 | if (unlikely(ti == NULL)) | ||
295 | return NULL; | ||
296 | #ifdef CONFIG_DEBUG_STACK_USAGE | ||
297 | memset(ti, 0, THREAD_SIZE); | ||
298 | #endif | ||
299 | return ti; | ||
300 | } | ||
301 | |||
302 | void free_thread_info(struct thread_info *ti) | ||
303 | { | ||
304 | kmem_cache_free(thread_info_cache, ti); | ||
305 | } | ||
306 | |||
307 | void thread_info_cache_init(void) | ||
308 | { | ||
309 | thread_info_cache = kmem_cache_create("thread_info", THREAD_SIZE, | ||
310 | THREAD_SIZE, 0, NULL); | ||
311 | BUG_ON(thread_info_cache == NULL); | ||
312 | } | ||
313 | #endif /* THREAD_SHIFT < PAGE_SHIFT */ | ||
314 | |||
315 | #ifdef CONFIG_MEMORY_HOTPLUG | 286 | #ifdef CONFIG_MEMORY_HOTPLUG |
316 | int arch_add_memory(int nid, u64 start, u64 size) | 287 | int arch_add_memory(int nid, u64 start, u64 size) |
317 | { | 288 | { |
diff --git a/arch/sparc/kernel/nmi.c b/arch/sparc/kernel/nmi.c index f30f4a1ead23..d242a7340541 100644 --- a/arch/sparc/kernel/nmi.c +++ b/arch/sparc/kernel/nmi.c | |||
@@ -96,7 +96,6 @@ notrace __kprobes void perfctr_irq(int irq, struct pt_regs *regs) | |||
96 | int cpu = smp_processor_id(); | 96 | int cpu = smp_processor_id(); |
97 | 97 | ||
98 | clear_softint(1 << irq); | 98 | clear_softint(1 << irq); |
99 | pcr_ops->write(PCR_PIC_PRIV); | ||
100 | 99 | ||
101 | local_cpu_data().__nmi_count++; | 100 | local_cpu_data().__nmi_count++; |
102 | 101 | ||
@@ -105,6 +104,8 @@ notrace __kprobes void perfctr_irq(int irq, struct pt_regs *regs) | |||
105 | if (notify_die(DIE_NMI, "nmi", regs, 0, | 104 | if (notify_die(DIE_NMI, "nmi", regs, 0, |
106 | pt_regs_trap_type(regs), SIGINT) == NOTIFY_STOP) | 105 | pt_regs_trap_type(regs), SIGINT) == NOTIFY_STOP) |
107 | touched = 1; | 106 | touched = 1; |
107 | else | ||
108 | pcr_ops->write(PCR_PIC_PRIV); | ||
108 | 109 | ||
109 | sum = kstat_irqs_cpu(0, cpu); | 110 | sum = kstat_irqs_cpu(0, cpu); |
110 | if (__get_cpu_var(nmi_touch)) { | 111 | if (__get_cpu_var(nmi_touch)) { |
diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c index fa5936e1c3b9..198fb4e79ba2 100644 --- a/arch/sparc/kernel/perf_event.c +++ b/arch/sparc/kernel/perf_event.c | |||
@@ -986,6 +986,17 @@ static int __kprobes perf_event_nmi_handler(struct notifier_block *self, | |||
986 | data.addr = 0; | 986 | data.addr = 0; |
987 | 987 | ||
988 | cpuc = &__get_cpu_var(cpu_hw_events); | 988 | cpuc = &__get_cpu_var(cpu_hw_events); |
989 | |||
990 | /* If the PMU has the TOE IRQ enable bits, we need to do a | ||
991 | * dummy write to the %pcr to clear the overflow bits and thus | ||
992 | * the interrupt. | ||
993 | * | ||
994 | * Do this before we peek at the counters to determine | ||
995 | * overflow so we don't lose any events. | ||
996 | */ | ||
997 | if (sparc_pmu->irq_bit) | ||
998 | pcr_ops->write(cpuc->pcr); | ||
999 | |||
989 | for (idx = 0; idx < MAX_HWEVENTS; idx++) { | 1000 | for (idx = 0; idx < MAX_HWEVENTS; idx++) { |
990 | struct perf_event *event = cpuc->events[idx]; | 1001 | struct perf_event *event = cpuc->events[idx]; |
991 | struct hw_perf_event *hwc; | 1002 | struct hw_perf_event *hwc; |
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 55298e891571..cbcbfdee3ee0 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig | |||
@@ -49,6 +49,7 @@ config X86 | |||
49 | select HAVE_KERNEL_GZIP | 49 | select HAVE_KERNEL_GZIP |
50 | select HAVE_KERNEL_BZIP2 | 50 | select HAVE_KERNEL_BZIP2 |
51 | select HAVE_KERNEL_LZMA | 51 | select HAVE_KERNEL_LZMA |
52 | select HAVE_KERNEL_LZO | ||
52 | select HAVE_HW_BREAKPOINT | 53 | select HAVE_HW_BREAKPOINT |
53 | select PERF_EVENTS | 54 | select PERF_EVENTS |
54 | select ANON_INODES | 55 | select ANON_INODES |
@@ -1246,6 +1247,11 @@ config ARCH_MEMORY_PROBE | |||
1246 | def_bool X86_64 | 1247 | def_bool X86_64 |
1247 | depends on MEMORY_HOTPLUG | 1248 | depends on MEMORY_HOTPLUG |
1248 | 1249 | ||
1250 | config ILLEGAL_POINTER_VALUE | ||
1251 | hex | ||
1252 | default 0 if X86_32 | ||
1253 | default 0xdead000000000000 if X86_64 | ||
1254 | |||
1249 | source "mm/Kconfig" | 1255 | source "mm/Kconfig" |
1250 | 1256 | ||
1251 | config HIGHPTE | 1257 | config HIGHPTE |
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu index 08e442bc3ab9..f20ddf84a893 100644 --- a/arch/x86/Kconfig.cpu +++ b/arch/x86/Kconfig.cpu | |||
@@ -396,7 +396,7 @@ config X86_TSC | |||
396 | 396 | ||
397 | config X86_CMPXCHG64 | 397 | config X86_CMPXCHG64 |
398 | def_bool y | 398 | def_bool y |
399 | depends on !M386 && !M486 | 399 | depends on X86_PAE || X86_64 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MATOM |
400 | 400 | ||
401 | # this should be set for all -march=.. options where the compiler | 401 | # this should be set for all -march=.. options where the compiler |
402 | # generates cmov. | 402 | # generates cmov. |
diff --git a/arch/x86/boot/compressed/Makefile b/arch/x86/boot/compressed/Makefile index f8ed0658404c..fbb47daf2459 100644 --- a/arch/x86/boot/compressed/Makefile +++ b/arch/x86/boot/compressed/Makefile | |||
@@ -4,11 +4,12 @@ | |||
4 | # create a compressed vmlinux image from the original vmlinux | 4 | # create a compressed vmlinux image from the original vmlinux |
5 | # | 5 | # |
6 | 6 | ||
7 | targets := vmlinux.lds vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma head_$(BITS).o misc.o piggy.o | 7 | targets := vmlinux.lds vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma vmlinux.bin.lzo head_$(BITS).o misc.o piggy.o |
8 | 8 | ||
9 | KBUILD_CFLAGS := -m$(BITS) -D__KERNEL__ $(LINUX_INCLUDE) -O2 | 9 | KBUILD_CFLAGS := -m$(BITS) -D__KERNEL__ $(LINUX_INCLUDE) -O2 |
10 | KBUILD_CFLAGS += -fno-strict-aliasing -fPIC | 10 | KBUILD_CFLAGS += -fno-strict-aliasing -fPIC |
11 | KBUILD_CFLAGS += -DDISABLE_BRANCH_PROFILING | 11 | KBUILD_CFLAGS += -DDISABLE_BRANCH_PROFILING |
12 | cflags-$(CONFIG_X86_32) := -march=i386 | ||
12 | cflags-$(CONFIG_X86_64) := -mcmodel=small | 13 | cflags-$(CONFIG_X86_64) := -mcmodel=small |
13 | KBUILD_CFLAGS += $(cflags-y) | 14 | KBUILD_CFLAGS += $(cflags-y) |
14 | KBUILD_CFLAGS += $(call cc-option,-ffreestanding) | 15 | KBUILD_CFLAGS += $(call cc-option,-ffreestanding) |
@@ -48,10 +49,13 @@ $(obj)/vmlinux.bin.bz2: $(vmlinux.bin.all-y) FORCE | |||
48 | $(call if_changed,bzip2) | 49 | $(call if_changed,bzip2) |
49 | $(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y) FORCE | 50 | $(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y) FORCE |
50 | $(call if_changed,lzma) | 51 | $(call if_changed,lzma) |
52 | $(obj)/vmlinux.bin.lzo: $(vmlinux.bin.all-y) FORCE | ||
53 | $(call if_changed,lzo) | ||
51 | 54 | ||
52 | suffix-$(CONFIG_KERNEL_GZIP) := gz | 55 | suffix-$(CONFIG_KERNEL_GZIP) := gz |
53 | suffix-$(CONFIG_KERNEL_BZIP2) := bz2 | 56 | suffix-$(CONFIG_KERNEL_BZIP2) := bz2 |
54 | suffix-$(CONFIG_KERNEL_LZMA) := lzma | 57 | suffix-$(CONFIG_KERNEL_LZMA) := lzma |
58 | suffix-$(CONFIG_KERNEL_LZO) := lzo | ||
55 | 59 | ||
56 | quiet_cmd_mkpiggy = MKPIGGY $@ | 60 | quiet_cmd_mkpiggy = MKPIGGY $@ |
57 | cmd_mkpiggy = $(obj)/mkpiggy $< > $@ || ( rm -f $@ ; false ) | 61 | cmd_mkpiggy = $(obj)/mkpiggy $< > $@ || ( rm -f $@ ; false ) |
diff --git a/arch/x86/boot/compressed/misc.c b/arch/x86/boot/compressed/misc.c index 842b2a36174a..3b22fe8ab91b 100644 --- a/arch/x86/boot/compressed/misc.c +++ b/arch/x86/boot/compressed/misc.c | |||
@@ -162,6 +162,10 @@ static int lines, cols; | |||
162 | #include "../../../../lib/decompress_unlzma.c" | 162 | #include "../../../../lib/decompress_unlzma.c" |
163 | #endif | 163 | #endif |
164 | 164 | ||
165 | #ifdef CONFIG_KERNEL_LZO | ||
166 | #include "../../../../lib/decompress_unlzo.c" | ||
167 | #endif | ||
168 | |||
165 | static void scroll(void) | 169 | static void scroll(void) |
166 | { | 170 | { |
167 | int i; | 171 | int i; |
diff --git a/arch/x86/include/asm/kvm.h b/arch/x86/include/asm/kvm.h index 950df434763f..f46b79f6c16c 100644 --- a/arch/x86/include/asm/kvm.h +++ b/arch/x86/include/asm/kvm.h | |||
@@ -254,6 +254,10 @@ struct kvm_reinject_control { | |||
254 | __u8 reserved[31]; | 254 | __u8 reserved[31]; |
255 | }; | 255 | }; |
256 | 256 | ||
257 | /* When set in flags, include corresponding fields on KVM_SET_VCPU_EVENTS */ | ||
258 | #define KVM_VCPUEVENT_VALID_NMI_PENDING 0x00000001 | ||
259 | #define KVM_VCPUEVENT_VALID_SIPI_VECTOR 0x00000002 | ||
260 | |||
257 | /* for KVM_GET/SET_VCPU_EVENTS */ | 261 | /* for KVM_GET/SET_VCPU_EVENTS */ |
258 | struct kvm_vcpu_events { | 262 | struct kvm_vcpu_events { |
259 | struct { | 263 | struct { |
diff --git a/arch/x86/include/asm/uaccess_32.h b/arch/x86/include/asm/uaccess_32.h index 0c9825e97f36..088d09fb1615 100644 --- a/arch/x86/include/asm/uaccess_32.h +++ b/arch/x86/include/asm/uaccess_32.h | |||
@@ -205,14 +205,13 @@ static inline unsigned long __must_check copy_from_user(void *to, | |||
205 | unsigned long n) | 205 | unsigned long n) |
206 | { | 206 | { |
207 | int sz = __compiletime_object_size(to); | 207 | int sz = __compiletime_object_size(to); |
208 | int ret = -EFAULT; | ||
209 | 208 | ||
210 | if (likely(sz == -1 || sz >= n)) | 209 | if (likely(sz == -1 || sz >= n)) |
211 | ret = _copy_from_user(to, from, n); | 210 | n = _copy_from_user(to, from, n); |
212 | else | 211 | else |
213 | copy_from_user_overflow(); | 212 | copy_from_user_overflow(); |
214 | 213 | ||
215 | return ret; | 214 | return n; |
216 | } | 215 | } |
217 | 216 | ||
218 | long __must_check strncpy_from_user(char *dst, const char __user *src, | 217 | long __must_check strncpy_from_user(char *dst, const char __user *src, |
diff --git a/arch/x86/include/asm/uaccess_64.h b/arch/x86/include/asm/uaccess_64.h index 46324c6a4f6e..535e421498f6 100644 --- a/arch/x86/include/asm/uaccess_64.h +++ b/arch/x86/include/asm/uaccess_64.h | |||
@@ -30,16 +30,15 @@ static inline unsigned long __must_check copy_from_user(void *to, | |||
30 | unsigned long n) | 30 | unsigned long n) |
31 | { | 31 | { |
32 | int sz = __compiletime_object_size(to); | 32 | int sz = __compiletime_object_size(to); |
33 | int ret = -EFAULT; | ||
34 | 33 | ||
35 | might_fault(); | 34 | might_fault(); |
36 | if (likely(sz == -1 || sz >= n)) | 35 | if (likely(sz == -1 || sz >= n)) |
37 | ret = _copy_from_user(to, from, n); | 36 | n = _copy_from_user(to, from, n); |
38 | #ifdef CONFIG_DEBUG_VM | 37 | #ifdef CONFIG_DEBUG_VM |
39 | else | 38 | else |
40 | WARN(1, "Buffer overflow detected!\n"); | 39 | WARN(1, "Buffer overflow detected!\n"); |
41 | #endif | 40 | #endif |
42 | return ret; | 41 | return n; |
43 | } | 42 | } |
44 | 43 | ||
45 | static __always_inline __must_check | 44 | static __always_inline __must_check |
diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h index 811bfabc80b7..bc54fa965af3 100644 --- a/arch/x86/include/asm/uv/uv_hub.h +++ b/arch/x86/include/asm/uv/uv_hub.h | |||
@@ -31,20 +31,20 @@ | |||
31 | * contiguous (although various IO spaces may punch holes in | 31 | * contiguous (although various IO spaces may punch holes in |
32 | * it).. | 32 | * it).. |
33 | * | 33 | * |
34 | * N - Number of bits in the node portion of a socket physical | 34 | * N - Number of bits in the node portion of a socket physical |
35 | * address. | 35 | * address. |
36 | * | 36 | * |
37 | * NASID - network ID of a router, Mbrick or Cbrick. Nasid values of | 37 | * NASID - network ID of a router, Mbrick or Cbrick. Nasid values of |
38 | * routers always have low bit of 1, C/MBricks have low bit | 38 | * routers always have low bit of 1, C/MBricks have low bit |
39 | * equal to 0. Most addressing macros that target UV hub chips | 39 | * equal to 0. Most addressing macros that target UV hub chips |
40 | * right shift the NASID by 1 to exclude the always-zero bit. | 40 | * right shift the NASID by 1 to exclude the always-zero bit. |
41 | * NASIDs contain up to 15 bits. | 41 | * NASIDs contain up to 15 bits. |
42 | * | 42 | * |
43 | * GNODE - NASID right shifted by 1 bit. Most mmrs contain gnodes instead | 43 | * GNODE - NASID right shifted by 1 bit. Most mmrs contain gnodes instead |
44 | * of nasids. | 44 | * of nasids. |
45 | * | 45 | * |
46 | * PNODE - the low N bits of the GNODE. The PNODE is the most useful variant | 46 | * PNODE - the low N bits of the GNODE. The PNODE is the most useful variant |
47 | * of the nasid for socket usage. | 47 | * of the nasid for socket usage. |
48 | * | 48 | * |
49 | * | 49 | * |
50 | * NumaLink Global Physical Address Format: | 50 | * NumaLink Global Physical Address Format: |
@@ -71,12 +71,12 @@ | |||
71 | * | 71 | * |
72 | * | 72 | * |
73 | * APICID format | 73 | * APICID format |
74 | * NOTE!!!!!! This is the current format of the APICID. However, code | 74 | * NOTE!!!!!! This is the current format of the APICID. However, code |
75 | * should assume that this will change in the future. Use functions | 75 | * should assume that this will change in the future. Use functions |
76 | * in this file for all APICID bit manipulations and conversion. | 76 | * in this file for all APICID bit manipulations and conversion. |
77 | * | 77 | * |
78 | * 1111110000000000 | 78 | * 1111110000000000 |
79 | * 5432109876543210 | 79 | * 5432109876543210 |
80 | * pppppppppplc0cch | 80 | * pppppppppplc0cch |
81 | * sssssssssss | 81 | * sssssssssss |
82 | * | 82 | * |
@@ -89,9 +89,9 @@ | |||
89 | * Note: Processor only supports 12 bits in the APICID register. The ACPI | 89 | * Note: Processor only supports 12 bits in the APICID register. The ACPI |
90 | * tables hold all 16 bits. Software needs to be aware of this. | 90 | * tables hold all 16 bits. Software needs to be aware of this. |
91 | * | 91 | * |
92 | * Unless otherwise specified, all references to APICID refer to | 92 | * Unless otherwise specified, all references to APICID refer to |
93 | * the FULL value contained in ACPI tables, not the subset in the | 93 | * the FULL value contained in ACPI tables, not the subset in the |
94 | * processor APICID register. | 94 | * processor APICID register. |
95 | */ | 95 | */ |
96 | 96 | ||
97 | 97 | ||
@@ -151,16 +151,16 @@ struct uv_hub_info_s { | |||
151 | }; | 151 | }; |
152 | 152 | ||
153 | DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info); | 153 | DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info); |
154 | #define uv_hub_info (&__get_cpu_var(__uv_hub_info)) | 154 | #define uv_hub_info (&__get_cpu_var(__uv_hub_info)) |
155 | #define uv_cpu_hub_info(cpu) (&per_cpu(__uv_hub_info, cpu)) | 155 | #define uv_cpu_hub_info(cpu) (&per_cpu(__uv_hub_info, cpu)) |
156 | 156 | ||
157 | /* | 157 | /* |
158 | * Local & Global MMR space macros. | 158 | * Local & Global MMR space macros. |
159 | * Note: macros are intended to be used ONLY by inline functions | 159 | * Note: macros are intended to be used ONLY by inline functions |
160 | * in this file - not by other kernel code. | 160 | * in this file - not by other kernel code. |
161 | * n - NASID (full 15-bit global nasid) | 161 | * n - NASID (full 15-bit global nasid) |
162 | * g - GNODE (full 15-bit global nasid, right shifted 1) | 162 | * g - GNODE (full 15-bit global nasid, right shifted 1) |
163 | * p - PNODE (local part of nsids, right shifted 1) | 163 | * p - PNODE (local part of nsids, right shifted 1) |
164 | */ | 164 | */ |
165 | #define UV_NASID_TO_PNODE(n) (((n) >> 1) & uv_hub_info->pnode_mask) | 165 | #define UV_NASID_TO_PNODE(n) (((n) >> 1) & uv_hub_info->pnode_mask) |
166 | #define UV_PNODE_TO_GNODE(p) ((p) |uv_hub_info->gnode_extra) | 166 | #define UV_PNODE_TO_GNODE(p) ((p) |uv_hub_info->gnode_extra) |
@@ -215,8 +215,8 @@ DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info); | |||
215 | /* | 215 | /* |
216 | * Macros for converting between kernel virtual addresses, socket local physical | 216 | * Macros for converting between kernel virtual addresses, socket local physical |
217 | * addresses, and UV global physical addresses. | 217 | * addresses, and UV global physical addresses. |
218 | * Note: use the standard __pa() & __va() macros for converting | 218 | * Note: use the standard __pa() & __va() macros for converting |
219 | * between socket virtual and socket physical addresses. | 219 | * between socket virtual and socket physical addresses. |
220 | */ | 220 | */ |
221 | 221 | ||
222 | /* socket phys RAM --> UV global physical address */ | 222 | /* socket phys RAM --> UV global physical address */ |
@@ -287,21 +287,18 @@ static inline int uv_apicid_to_pnode(int apicid) | |||
287 | * Access global MMRs using the low memory MMR32 space. This region supports | 287 | * Access global MMRs using the low memory MMR32 space. This region supports |
288 | * faster MMR access but not all MMRs are accessible in this space. | 288 | * faster MMR access but not all MMRs are accessible in this space. |
289 | */ | 289 | */ |
290 | static inline unsigned long *uv_global_mmr32_address(int pnode, | 290 | static inline unsigned long *uv_global_mmr32_address(int pnode, unsigned long offset) |
291 | unsigned long offset) | ||
292 | { | 291 | { |
293 | return __va(UV_GLOBAL_MMR32_BASE | | 292 | return __va(UV_GLOBAL_MMR32_BASE | |
294 | UV_GLOBAL_MMR32_PNODE_BITS(pnode) | offset); | 293 | UV_GLOBAL_MMR32_PNODE_BITS(pnode) | offset); |
295 | } | 294 | } |
296 | 295 | ||
297 | static inline void uv_write_global_mmr32(int pnode, unsigned long offset, | 296 | static inline void uv_write_global_mmr32(int pnode, unsigned long offset, unsigned long val) |
298 | unsigned long val) | ||
299 | { | 297 | { |
300 | writeq(val, uv_global_mmr32_address(pnode, offset)); | 298 | writeq(val, uv_global_mmr32_address(pnode, offset)); |
301 | } | 299 | } |
302 | 300 | ||
303 | static inline unsigned long uv_read_global_mmr32(int pnode, | 301 | static inline unsigned long uv_read_global_mmr32(int pnode, unsigned long offset) |
304 | unsigned long offset) | ||
305 | { | 302 | { |
306 | return readq(uv_global_mmr32_address(pnode, offset)); | 303 | return readq(uv_global_mmr32_address(pnode, offset)); |
307 | } | 304 | } |
@@ -310,21 +307,18 @@ static inline unsigned long uv_read_global_mmr32(int pnode, | |||
310 | * Access Global MMR space using the MMR space located at the top of physical | 307 | * Access Global MMR space using the MMR space located at the top of physical |
311 | * memory. | 308 | * memory. |
312 | */ | 309 | */ |
313 | static inline unsigned long *uv_global_mmr64_address(int pnode, | 310 | static inline unsigned long *uv_global_mmr64_address(int pnode, unsigned long offset) |
314 | unsigned long offset) | ||
315 | { | 311 | { |
316 | return __va(UV_GLOBAL_MMR64_BASE | | 312 | return __va(UV_GLOBAL_MMR64_BASE | |
317 | UV_GLOBAL_MMR64_PNODE_BITS(pnode) | offset); | 313 | UV_GLOBAL_MMR64_PNODE_BITS(pnode) | offset); |
318 | } | 314 | } |
319 | 315 | ||
320 | static inline void uv_write_global_mmr64(int pnode, unsigned long offset, | 316 | static inline void uv_write_global_mmr64(int pnode, unsigned long offset, unsigned long val) |
321 | unsigned long val) | ||
322 | { | 317 | { |
323 | writeq(val, uv_global_mmr64_address(pnode, offset)); | 318 | writeq(val, uv_global_mmr64_address(pnode, offset)); |
324 | } | 319 | } |
325 | 320 | ||
326 | static inline unsigned long uv_read_global_mmr64(int pnode, | 321 | static inline unsigned long uv_read_global_mmr64(int pnode, unsigned long offset) |
327 | unsigned long offset) | ||
328 | { | 322 | { |
329 | return readq(uv_global_mmr64_address(pnode, offset)); | 323 | return readq(uv_global_mmr64_address(pnode, offset)); |
330 | } | 324 | } |
@@ -338,6 +332,16 @@ static inline unsigned long uv_global_gru_mmr_address(int pnode, unsigned long o | |||
338 | return UV_GLOBAL_GRU_MMR_BASE | offset | (pnode << uv_hub_info->m_val); | 332 | return UV_GLOBAL_GRU_MMR_BASE | offset | (pnode << uv_hub_info->m_val); |
339 | } | 333 | } |
340 | 334 | ||
335 | static inline void uv_write_global_mmr8(int pnode, unsigned long offset, unsigned char val) | ||
336 | { | ||
337 | writeb(val, uv_global_mmr64_address(pnode, offset)); | ||
338 | } | ||
339 | |||
340 | static inline unsigned char uv_read_global_mmr8(int pnode, unsigned long offset) | ||
341 | { | ||
342 | return readb(uv_global_mmr64_address(pnode, offset)); | ||
343 | } | ||
344 | |||
341 | /* | 345 | /* |
342 | * Access hub local MMRs. Faster than using global space but only local MMRs | 346 | * Access hub local MMRs. Faster than using global space but only local MMRs |
343 | * are accessible. | 347 | * are accessible. |
@@ -457,11 +461,17 @@ static inline void uv_set_scir_bits(unsigned char value) | |||
457 | } | 461 | } |
458 | } | 462 | } |
459 | 463 | ||
464 | static inline unsigned long uv_scir_offset(int apicid) | ||
465 | { | ||
466 | return SCIR_LOCAL_MMR_BASE | (apicid & 0x3f); | ||
467 | } | ||
468 | |||
460 | static inline void uv_set_cpu_scir_bits(int cpu, unsigned char value) | 469 | static inline void uv_set_cpu_scir_bits(int cpu, unsigned char value) |
461 | { | 470 | { |
462 | if (uv_cpu_hub_info(cpu)->scir.state != value) { | 471 | if (uv_cpu_hub_info(cpu)->scir.state != value) { |
472 | uv_write_global_mmr8(uv_cpu_to_pnode(cpu), | ||
473 | uv_cpu_hub_info(cpu)->scir.offset, value); | ||
463 | uv_cpu_hub_info(cpu)->scir.state = value; | 474 | uv_cpu_hub_info(cpu)->scir.state = value; |
464 | uv_write_local_mmr8(uv_cpu_hub_info(cpu)->scir.offset, value); | ||
465 | } | 475 | } |
466 | } | 476 | } |
467 | 477 | ||
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c index 82e508677b91..f9961034e557 100644 --- a/arch/x86/kernel/acpi/sleep.c +++ b/arch/x86/kernel/acpi/sleep.c | |||
@@ -162,6 +162,8 @@ static int __init acpi_sleep_setup(char *str) | |||
162 | #endif | 162 | #endif |
163 | if (strncmp(str, "old_ordering", 12) == 0) | 163 | if (strncmp(str, "old_ordering", 12) == 0) |
164 | acpi_old_suspend_ordering(); | 164 | acpi_old_suspend_ordering(); |
165 | if (strncmp(str, "sci_force_enable", 16) == 0) | ||
166 | acpi_set_sci_en_on_resume(); | ||
165 | str = strchr(str, ','); | 167 | str = strchr(str, ','); |
166 | if (str != NULL) | 168 | if (str != NULL) |
167 | str += strspn(str, ", \t"); | 169 | str += strspn(str, ", \t"); |
diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c index 1dca9c34eaeb..fb490ce7dd55 100644 --- a/arch/x86/kernel/amd_iommu_init.c +++ b/arch/x86/kernel/amd_iommu_init.c | |||
@@ -138,6 +138,11 @@ int amd_iommus_present; | |||
138 | bool amd_iommu_np_cache __read_mostly; | 138 | bool amd_iommu_np_cache __read_mostly; |
139 | 139 | ||
140 | /* | 140 | /* |
141 | * Set to true if ACPI table parsing and hardware intialization went properly | ||
142 | */ | ||
143 | static bool amd_iommu_initialized; | ||
144 | |||
145 | /* | ||
141 | * List of protection domains - used during resume | 146 | * List of protection domains - used during resume |
142 | */ | 147 | */ |
143 | LIST_HEAD(amd_iommu_pd_list); | 148 | LIST_HEAD(amd_iommu_pd_list); |
@@ -929,6 +934,8 @@ static int __init init_iommu_all(struct acpi_table_header *table) | |||
929 | } | 934 | } |
930 | WARN_ON(p != end); | 935 | WARN_ON(p != end); |
931 | 936 | ||
937 | amd_iommu_initialized = true; | ||
938 | |||
932 | return 0; | 939 | return 0; |
933 | } | 940 | } |
934 | 941 | ||
@@ -1263,6 +1270,9 @@ static int __init amd_iommu_init(void) | |||
1263 | if (acpi_table_parse("IVRS", init_iommu_all) != 0) | 1270 | if (acpi_table_parse("IVRS", init_iommu_all) != 0) |
1264 | goto free; | 1271 | goto free; |
1265 | 1272 | ||
1273 | if (!amd_iommu_initialized) | ||
1274 | goto free; | ||
1275 | |||
1266 | if (acpi_table_parse("IVRS", init_memory_definitions) != 0) | 1276 | if (acpi_table_parse("IVRS", init_memory_definitions) != 0) |
1267 | goto free; | 1277 | goto free; |
1268 | 1278 | ||
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index aa57c079c98f..e80f291472a4 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c | |||
@@ -62,7 +62,7 @@ unsigned int boot_cpu_physical_apicid = -1U; | |||
62 | /* | 62 | /* |
63 | * The highest APIC ID seen during enumeration. | 63 | * The highest APIC ID seen during enumeration. |
64 | * | 64 | * |
65 | * On AMD, this determines the messaging protocol we can use: if all APIC IDs | 65 | * This determines the messaging protocol we can use: if all APIC IDs |
66 | * are in the 0 ... 7 range, then we can use logical addressing which | 66 | * are in the 0 ... 7 range, then we can use logical addressing which |
67 | * has some performance advantages (better broadcasting). | 67 | * has some performance advantages (better broadcasting). |
68 | * | 68 | * |
@@ -1898,14 +1898,24 @@ void __cpuinit generic_processor_info(int apicid, int version) | |||
1898 | max_physical_apicid = apicid; | 1898 | max_physical_apicid = apicid; |
1899 | 1899 | ||
1900 | #ifdef CONFIG_X86_32 | 1900 | #ifdef CONFIG_X86_32 |
1901 | switch (boot_cpu_data.x86_vendor) { | 1901 | /* |
1902 | case X86_VENDOR_INTEL: | 1902 | * Would be preferable to switch to bigsmp when CONFIG_HOTPLUG_CPU=y |
1903 | if (num_processors > 8) | 1903 | * but we need to work other dependencies like SMP_SUSPEND etc |
1904 | def_to_bigsmp = 1; | 1904 | * before this can be done without some confusion. |
1905 | break; | 1905 | * if (CPU_HOTPLUG_ENABLED || num_processors > 8) |
1906 | case X86_VENDOR_AMD: | 1906 | * - Ashok Raj <ashok.raj@intel.com> |
1907 | if (max_physical_apicid >= 8) | 1907 | */ |
1908 | if (max_physical_apicid >= 8) { | ||
1909 | switch (boot_cpu_data.x86_vendor) { | ||
1910 | case X86_VENDOR_INTEL: | ||
1911 | if (!APIC_XAPIC(version)) { | ||
1912 | def_to_bigsmp = 0; | ||
1913 | break; | ||
1914 | } | ||
1915 | /* If P4 and above fall through */ | ||
1916 | case X86_VENDOR_AMD: | ||
1908 | def_to_bigsmp = 1; | 1917 | def_to_bigsmp = 1; |
1918 | } | ||
1909 | } | 1919 | } |
1910 | #endif | 1920 | #endif |
1911 | 1921 | ||
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index de00c4619a55..53243ca7816d 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c | |||
@@ -2434,6 +2434,13 @@ asmlinkage void smp_irq_move_cleanup_interrupt(void) | |||
2434 | cfg = irq_cfg(irq); | 2434 | cfg = irq_cfg(irq); |
2435 | raw_spin_lock(&desc->lock); | 2435 | raw_spin_lock(&desc->lock); |
2436 | 2436 | ||
2437 | /* | ||
2438 | * Check if the irq migration is in progress. If so, we | ||
2439 | * haven't received the cleanup request yet for this irq. | ||
2440 | */ | ||
2441 | if (cfg->move_in_progress) | ||
2442 | goto unlock; | ||
2443 | |||
2437 | if (vector == cfg->vector && cpumask_test_cpu(me, cfg->domain)) | 2444 | if (vector == cfg->vector && cpumask_test_cpu(me, cfg->domain)) |
2438 | goto unlock; | 2445 | goto unlock; |
2439 | 2446 | ||
diff --git a/arch/x86/kernel/apic/probe_64.c b/arch/x86/kernel/apic/probe_64.c index c4cbd3080c1c..65edc180fc82 100644 --- a/arch/x86/kernel/apic/probe_64.c +++ b/arch/x86/kernel/apic/probe_64.c | |||
@@ -64,23 +64,16 @@ void __init default_setup_apic_routing(void) | |||
64 | apic = &apic_x2apic_phys; | 64 | apic = &apic_x2apic_phys; |
65 | else | 65 | else |
66 | apic = &apic_x2apic_cluster; | 66 | apic = &apic_x2apic_cluster; |
67 | printk(KERN_INFO "Setting APIC routing to %s\n", apic->name); | ||
67 | } | 68 | } |
68 | #endif | 69 | #endif |
69 | 70 | ||
70 | if (apic == &apic_flat) { | 71 | if (apic == &apic_flat) { |
71 | switch (boot_cpu_data.x86_vendor) { | 72 | if (max_physical_apicid >= 8) |
72 | case X86_VENDOR_INTEL: | 73 | apic = &apic_physflat; |
73 | if (num_processors > 8) | 74 | printk(KERN_INFO "Setting APIC routing to %s\n", apic->name); |
74 | apic = &apic_physflat; | ||
75 | break; | ||
76 | case X86_VENDOR_AMD: | ||
77 | if (max_physical_apicid >= 8) | ||
78 | apic = &apic_physflat; | ||
79 | } | ||
80 | } | 75 | } |
81 | 76 | ||
82 | printk(KERN_INFO "Setting APIC routing to %s\n", apic->name); | ||
83 | |||
84 | if (is_vsmp_box()) { | 77 | if (is_vsmp_box()) { |
85 | /* need to update phys_pkg_id */ | 78 | /* need to update phys_pkg_id */ |
86 | apic->phys_pkg_id = apicid_phys_pkg_id; | 79 | apic->phys_pkg_id = apicid_phys_pkg_id; |
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c index d56b0efb2057..5f92494dab61 100644 --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c | |||
@@ -629,8 +629,10 @@ void __init uv_system_init(void) | |||
629 | uv_rtc_init(); | 629 | uv_rtc_init(); |
630 | 630 | ||
631 | for_each_present_cpu(cpu) { | 631 | for_each_present_cpu(cpu) { |
632 | int apicid = per_cpu(x86_cpu_to_apicid, cpu); | ||
633 | |||
632 | nid = cpu_to_node(cpu); | 634 | nid = cpu_to_node(cpu); |
633 | pnode = uv_apicid_to_pnode(per_cpu(x86_cpu_to_apicid, cpu)); | 635 | pnode = uv_apicid_to_pnode(apicid); |
634 | blade = boot_pnode_to_blade(pnode); | 636 | blade = boot_pnode_to_blade(pnode); |
635 | lcpu = uv_blade_info[blade].nr_possible_cpus; | 637 | lcpu = uv_blade_info[blade].nr_possible_cpus; |
636 | uv_blade_info[blade].nr_possible_cpus++; | 638 | uv_blade_info[blade].nr_possible_cpus++; |
@@ -651,15 +653,13 @@ void __init uv_system_init(void) | |||
651 | uv_cpu_hub_info(cpu)->gnode_extra = gnode_extra; | 653 | uv_cpu_hub_info(cpu)->gnode_extra = gnode_extra; |
652 | uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base; | 654 | uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base; |
653 | uv_cpu_hub_info(cpu)->coherency_domain_number = sn_coherency_id; | 655 | uv_cpu_hub_info(cpu)->coherency_domain_number = sn_coherency_id; |
654 | uv_cpu_hub_info(cpu)->scir.offset = SCIR_LOCAL_MMR_BASE + lcpu; | 656 | uv_cpu_hub_info(cpu)->scir.offset = uv_scir_offset(apicid); |
655 | uv_node_to_blade[nid] = blade; | 657 | uv_node_to_blade[nid] = blade; |
656 | uv_cpu_to_blade[cpu] = blade; | 658 | uv_cpu_to_blade[cpu] = blade; |
657 | max_pnode = max(pnode, max_pnode); | 659 | max_pnode = max(pnode, max_pnode); |
658 | 660 | ||
659 | printk(KERN_DEBUG "UV: cpu %d, apicid 0x%x, pnode %d, nid %d, " | 661 | printk(KERN_DEBUG "UV: cpu %d, apicid 0x%x, pnode %d, nid %d, lcpu %d, blade %d\n", |
660 | "lcpu %d, blade %d\n", | 662 | cpu, apicid, pnode, nid, lcpu, blade); |
661 | cpu, per_cpu(x86_cpu_to_apicid, cpu), pnode, nid, | ||
662 | lcpu, blade); | ||
663 | } | 663 | } |
664 | 664 | ||
665 | /* Add blade/pnode info for nodes without cpus */ | 665 | /* Add blade/pnode info for nodes without cpus */ |
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c index c223b7e895d9..d616c06e99b4 100644 --- a/arch/x86/kernel/cpu/perf_event.c +++ b/arch/x86/kernel/cpu/perf_event.c | |||
@@ -2347,7 +2347,7 @@ perf_callchain_kernel(struct pt_regs *regs, struct perf_callchain_entry *entry) | |||
2347 | callchain_store(entry, PERF_CONTEXT_KERNEL); | 2347 | callchain_store(entry, PERF_CONTEXT_KERNEL); |
2348 | callchain_store(entry, regs->ip); | 2348 | callchain_store(entry, regs->ip); |
2349 | 2349 | ||
2350 | dump_trace(NULL, regs, NULL, 0, &backtrace_ops, entry); | 2350 | dump_trace(NULL, regs, NULL, regs->bp, &backtrace_ops, entry); |
2351 | } | 2351 | } |
2352 | 2352 | ||
2353 | /* | 2353 | /* |
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c index 05ed7ab2ca48..a1a7876cadcb 100644 --- a/arch/x86/kernel/e820.c +++ b/arch/x86/kernel/e820.c | |||
@@ -733,13 +733,13 @@ struct early_res { | |||
733 | }; | 733 | }; |
734 | static struct early_res early_res[MAX_EARLY_RES] __initdata = { | 734 | static struct early_res early_res[MAX_EARLY_RES] __initdata = { |
735 | { 0, PAGE_SIZE, "BIOS data page", 1 }, /* BIOS data page */ | 735 | { 0, PAGE_SIZE, "BIOS data page", 1 }, /* BIOS data page */ |
736 | #ifdef CONFIG_X86_32 | 736 | #if defined(CONFIG_X86_32) && defined(CONFIG_X86_TRAMPOLINE) |
737 | /* | 737 | /* |
738 | * But first pinch a few for the stack/trampoline stuff | 738 | * But first pinch a few for the stack/trampoline stuff |
739 | * FIXME: Don't need the extra page at 4K, but need to fix | 739 | * FIXME: Don't need the extra page at 4K, but need to fix |
740 | * trampoline before removing it. (see the GDT stuff) | 740 | * trampoline before removing it. (see the GDT stuff) |
741 | */ | 741 | */ |
742 | { PAGE_SIZE, PAGE_SIZE, "EX TRAMPOLINE", 1 }, | 742 | { PAGE_SIZE, PAGE_SIZE + PAGE_SIZE, "EX TRAMPOLINE", 1 }, |
743 | #endif | 743 | #endif |
744 | 744 | ||
745 | {} | 745 | {} |
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c index 98c2cdeb599e..c6ee241c8a98 100644 --- a/arch/x86/kernel/process.c +++ b/arch/x86/kernel/process.c | |||
@@ -103,8 +103,8 @@ void show_regs_common(void) | |||
103 | if (!product) | 103 | if (!product) |
104 | product = ""; | 104 | product = ""; |
105 | 105 | ||
106 | printk("\n"); | 106 | printk(KERN_CONT "\n"); |
107 | printk(KERN_INFO "Pid: %d, comm: %.20s %s %s %.*s %s/%s\n", | 107 | printk(KERN_DEFAULT "Pid: %d, comm: %.20s %s %s %.*s %s/%s\n", |
108 | current->pid, current->comm, print_tainted(), | 108 | current->pid, current->comm, print_tainted(), |
109 | init_utsname()->release, | 109 | init_utsname()->release, |
110 | (int)strcspn(init_utsname()->version, " "), | 110 | (int)strcspn(init_utsname()->version, " "), |
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c index 9c517b5858f0..37ad1e046aae 100644 --- a/arch/x86/kernel/process_32.c +++ b/arch/x86/kernel/process_32.c | |||
@@ -139,16 +139,16 @@ void __show_regs(struct pt_regs *regs, int all) | |||
139 | 139 | ||
140 | show_regs_common(); | 140 | show_regs_common(); |
141 | 141 | ||
142 | printk("EIP: %04x:[<%08lx>] EFLAGS: %08lx CPU: %d\n", | 142 | printk(KERN_DEFAULT "EIP: %04x:[<%08lx>] EFLAGS: %08lx CPU: %d\n", |
143 | (u16)regs->cs, regs->ip, regs->flags, | 143 | (u16)regs->cs, regs->ip, regs->flags, |
144 | smp_processor_id()); | 144 | smp_processor_id()); |
145 | print_symbol("EIP is at %s\n", regs->ip); | 145 | print_symbol("EIP is at %s\n", regs->ip); |
146 | 146 | ||
147 | printk("EAX: %08lx EBX: %08lx ECX: %08lx EDX: %08lx\n", | 147 | printk(KERN_DEFAULT "EAX: %08lx EBX: %08lx ECX: %08lx EDX: %08lx\n", |
148 | regs->ax, regs->bx, regs->cx, regs->dx); | 148 | regs->ax, regs->bx, regs->cx, regs->dx); |
149 | printk("ESI: %08lx EDI: %08lx EBP: %08lx ESP: %08lx\n", | 149 | printk(KERN_DEFAULT "ESI: %08lx EDI: %08lx EBP: %08lx ESP: %08lx\n", |
150 | regs->si, regs->di, regs->bp, sp); | 150 | regs->si, regs->di, regs->bp, sp); |
151 | printk(" DS: %04x ES: %04x FS: %04x GS: %04x SS: %04x\n", | 151 | printk(KERN_DEFAULT " DS: %04x ES: %04x FS: %04x GS: %04x SS: %04x\n", |
152 | (u16)regs->ds, (u16)regs->es, (u16)regs->fs, gs, ss); | 152 | (u16)regs->ds, (u16)regs->es, (u16)regs->fs, gs, ss); |
153 | 153 | ||
154 | if (!all) | 154 | if (!all) |
@@ -158,19 +158,19 @@ void __show_regs(struct pt_regs *regs, int all) | |||
158 | cr2 = read_cr2(); | 158 | cr2 = read_cr2(); |
159 | cr3 = read_cr3(); | 159 | cr3 = read_cr3(); |
160 | cr4 = read_cr4_safe(); | 160 | cr4 = read_cr4_safe(); |
161 | printk("CR0: %08lx CR2: %08lx CR3: %08lx CR4: %08lx\n", | 161 | printk(KERN_DEFAULT "CR0: %08lx CR2: %08lx CR3: %08lx CR4: %08lx\n", |
162 | cr0, cr2, cr3, cr4); | 162 | cr0, cr2, cr3, cr4); |
163 | 163 | ||
164 | get_debugreg(d0, 0); | 164 | get_debugreg(d0, 0); |
165 | get_debugreg(d1, 1); | 165 | get_debugreg(d1, 1); |
166 | get_debugreg(d2, 2); | 166 | get_debugreg(d2, 2); |
167 | get_debugreg(d3, 3); | 167 | get_debugreg(d3, 3); |
168 | printk("DR0: %08lx DR1: %08lx DR2: %08lx DR3: %08lx\n", | 168 | printk(KERN_DEFAULT "DR0: %08lx DR1: %08lx DR2: %08lx DR3: %08lx\n", |
169 | d0, d1, d2, d3); | 169 | d0, d1, d2, d3); |
170 | 170 | ||
171 | get_debugreg(d6, 6); | 171 | get_debugreg(d6, 6); |
172 | get_debugreg(d7, 7); | 172 | get_debugreg(d7, 7); |
173 | printk("DR6: %08lx DR7: %08lx\n", | 173 | printk(KERN_DEFAULT "DR6: %08lx DR7: %08lx\n", |
174 | d6, d7); | 174 | d6, d7); |
175 | } | 175 | } |
176 | 176 | ||
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c index 52fbd0c60198..f9e033150cdf 100644 --- a/arch/x86/kernel/process_64.c +++ b/arch/x86/kernel/process_64.c | |||
@@ -161,19 +161,19 @@ void __show_regs(struct pt_regs *regs, int all) | |||
161 | unsigned int ds, cs, es; | 161 | unsigned int ds, cs, es; |
162 | 162 | ||
163 | show_regs_common(); | 163 | show_regs_common(); |
164 | printk(KERN_INFO "RIP: %04lx:[<%016lx>] ", regs->cs & 0xffff, regs->ip); | 164 | printk(KERN_DEFAULT "RIP: %04lx:[<%016lx>] ", regs->cs & 0xffff, regs->ip); |
165 | printk_address(regs->ip, 1); | 165 | printk_address(regs->ip, 1); |
166 | printk(KERN_INFO "RSP: %04lx:%016lx EFLAGS: %08lx\n", regs->ss, | 166 | printk(KERN_DEFAULT "RSP: %04lx:%016lx EFLAGS: %08lx\n", regs->ss, |
167 | regs->sp, regs->flags); | 167 | regs->sp, regs->flags); |
168 | printk(KERN_INFO "RAX: %016lx RBX: %016lx RCX: %016lx\n", | 168 | printk(KERN_DEFAULT "RAX: %016lx RBX: %016lx RCX: %016lx\n", |
169 | regs->ax, regs->bx, regs->cx); | 169 | regs->ax, regs->bx, regs->cx); |
170 | printk(KERN_INFO "RDX: %016lx RSI: %016lx RDI: %016lx\n", | 170 | printk(KERN_DEFAULT "RDX: %016lx RSI: %016lx RDI: %016lx\n", |
171 | regs->dx, regs->si, regs->di); | 171 | regs->dx, regs->si, regs->di); |
172 | printk(KERN_INFO "RBP: %016lx R08: %016lx R09: %016lx\n", | 172 | printk(KERN_DEFAULT "RBP: %016lx R08: %016lx R09: %016lx\n", |
173 | regs->bp, regs->r8, regs->r9); | 173 | regs->bp, regs->r8, regs->r9); |
174 | printk(KERN_INFO "R10: %016lx R11: %016lx R12: %016lx\n", | 174 | printk(KERN_DEFAULT "R10: %016lx R11: %016lx R12: %016lx\n", |
175 | regs->r10, regs->r11, regs->r12); | 175 | regs->r10, regs->r11, regs->r12); |
176 | printk(KERN_INFO "R13: %016lx R14: %016lx R15: %016lx\n", | 176 | printk(KERN_DEFAULT "R13: %016lx R14: %016lx R15: %016lx\n", |
177 | regs->r13, regs->r14, regs->r15); | 177 | regs->r13, regs->r14, regs->r15); |
178 | 178 | ||
179 | asm("movl %%ds,%0" : "=r" (ds)); | 179 | asm("movl %%ds,%0" : "=r" (ds)); |
@@ -194,21 +194,21 @@ void __show_regs(struct pt_regs *regs, int all) | |||
194 | cr3 = read_cr3(); | 194 | cr3 = read_cr3(); |
195 | cr4 = read_cr4(); | 195 | cr4 = read_cr4(); |
196 | 196 | ||
197 | printk(KERN_INFO "FS: %016lx(%04x) GS:%016lx(%04x) knlGS:%016lx\n", | 197 | printk(KERN_DEFAULT "FS: %016lx(%04x) GS:%016lx(%04x) knlGS:%016lx\n", |
198 | fs, fsindex, gs, gsindex, shadowgs); | 198 | fs, fsindex, gs, gsindex, shadowgs); |
199 | printk(KERN_INFO "CS: %04x DS: %04x ES: %04x CR0: %016lx\n", cs, ds, | 199 | printk(KERN_DEFAULT "CS: %04x DS: %04x ES: %04x CR0: %016lx\n", cs, ds, |
200 | es, cr0); | 200 | es, cr0); |
201 | printk(KERN_INFO "CR2: %016lx CR3: %016lx CR4: %016lx\n", cr2, cr3, | 201 | printk(KERN_DEFAULT "CR2: %016lx CR3: %016lx CR4: %016lx\n", cr2, cr3, |
202 | cr4); | 202 | cr4); |
203 | 203 | ||
204 | get_debugreg(d0, 0); | 204 | get_debugreg(d0, 0); |
205 | get_debugreg(d1, 1); | 205 | get_debugreg(d1, 1); |
206 | get_debugreg(d2, 2); | 206 | get_debugreg(d2, 2); |
207 | printk(KERN_INFO "DR0: %016lx DR1: %016lx DR2: %016lx\n", d0, d1, d2); | 207 | printk(KERN_DEFAULT "DR0: %016lx DR1: %016lx DR2: %016lx\n", d0, d1, d2); |
208 | get_debugreg(d3, 3); | 208 | get_debugreg(d3, 3); |
209 | get_debugreg(d6, 6); | 209 | get_debugreg(d6, 6); |
210 | get_debugreg(d7, 7); | 210 | get_debugreg(d7, 7); |
211 | printk(KERN_INFO "DR3: %016lx DR6: %016lx DR7: %016lx\n", d3, d6, d7); | 211 | printk(KERN_DEFAULT "DR3: %016lx DR6: %016lx DR7: %016lx\n", d3, d6, d7); |
212 | } | 212 | } |
213 | 213 | ||
214 | void show_regs(struct pt_regs *regs) | 214 | void show_regs(struct pt_regs *regs) |
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index cd60c0bd1b32..3063a0c4858b 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c | |||
@@ -1150,6 +1150,7 @@ void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu) | |||
1150 | hrtimer_cancel(&apic->lapic_timer.timer); | 1150 | hrtimer_cancel(&apic->lapic_timer.timer); |
1151 | update_divide_count(apic); | 1151 | update_divide_count(apic); |
1152 | start_apic_timer(apic); | 1152 | start_apic_timer(apic); |
1153 | apic->irr_pending = true; | ||
1153 | } | 1154 | } |
1154 | 1155 | ||
1155 | void __kvm_migrate_apic_timer(struct kvm_vcpu *vcpu) | 1156 | void __kvm_migrate_apic_timer(struct kvm_vcpu *vcpu) |
diff --git a/arch/x86/kvm/paging_tmpl.h b/arch/x86/kvm/paging_tmpl.h index a6017132fba8..58a0f1e88596 100644 --- a/arch/x86/kvm/paging_tmpl.h +++ b/arch/x86/kvm/paging_tmpl.h | |||
@@ -455,8 +455,6 @@ out_unlock: | |||
455 | static void FNAME(invlpg)(struct kvm_vcpu *vcpu, gva_t gva) | 455 | static void FNAME(invlpg)(struct kvm_vcpu *vcpu, gva_t gva) |
456 | { | 456 | { |
457 | struct kvm_shadow_walk_iterator iterator; | 457 | struct kvm_shadow_walk_iterator iterator; |
458 | pt_element_t gpte; | ||
459 | gpa_t pte_gpa = -1; | ||
460 | int level; | 458 | int level; |
461 | u64 *sptep; | 459 | u64 *sptep; |
462 | int need_flush = 0; | 460 | int need_flush = 0; |
@@ -470,10 +468,6 @@ static void FNAME(invlpg)(struct kvm_vcpu *vcpu, gva_t gva) | |||
470 | if (level == PT_PAGE_TABLE_LEVEL || | 468 | if (level == PT_PAGE_TABLE_LEVEL || |
471 | ((level == PT_DIRECTORY_LEVEL && is_large_pte(*sptep))) || | 469 | ((level == PT_DIRECTORY_LEVEL && is_large_pte(*sptep))) || |
472 | ((level == PT_PDPE_LEVEL && is_large_pte(*sptep)))) { | 470 | ((level == PT_PDPE_LEVEL && is_large_pte(*sptep)))) { |
473 | struct kvm_mmu_page *sp = page_header(__pa(sptep)); | ||
474 | |||
475 | pte_gpa = (sp->gfn << PAGE_SHIFT); | ||
476 | pte_gpa += (sptep - sp->spt) * sizeof(pt_element_t); | ||
477 | 471 | ||
478 | if (is_shadow_present_pte(*sptep)) { | 472 | if (is_shadow_present_pte(*sptep)) { |
479 | rmap_remove(vcpu->kvm, sptep); | 473 | rmap_remove(vcpu->kvm, sptep); |
@@ -492,18 +486,6 @@ static void FNAME(invlpg)(struct kvm_vcpu *vcpu, gva_t gva) | |||
492 | if (need_flush) | 486 | if (need_flush) |
493 | kvm_flush_remote_tlbs(vcpu->kvm); | 487 | kvm_flush_remote_tlbs(vcpu->kvm); |
494 | spin_unlock(&vcpu->kvm->mmu_lock); | 488 | spin_unlock(&vcpu->kvm->mmu_lock); |
495 | |||
496 | if (pte_gpa == -1) | ||
497 | return; | ||
498 | if (kvm_read_guest_atomic(vcpu->kvm, pte_gpa, &gpte, | ||
499 | sizeof(pt_element_t))) | ||
500 | return; | ||
501 | if (is_present_gpte(gpte) && (gpte & PT_ACCESSED_MASK)) { | ||
502 | if (mmu_topup_memory_caches(vcpu)) | ||
503 | return; | ||
504 | kvm_mmu_pte_write(vcpu, pte_gpa, (const u8 *)&gpte, | ||
505 | sizeof(pt_element_t), 0); | ||
506 | } | ||
507 | } | 489 | } |
508 | 490 | ||
509 | static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr) | 491 | static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr) |
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 9d068966fb2a..6651dbf58675 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c | |||
@@ -1913,7 +1913,8 @@ static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu, | |||
1913 | 1913 | ||
1914 | events->sipi_vector = vcpu->arch.sipi_vector; | 1914 | events->sipi_vector = vcpu->arch.sipi_vector; |
1915 | 1915 | ||
1916 | events->flags = 0; | 1916 | events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING |
1917 | | KVM_VCPUEVENT_VALID_SIPI_VECTOR); | ||
1917 | 1918 | ||
1918 | vcpu_put(vcpu); | 1919 | vcpu_put(vcpu); |
1919 | } | 1920 | } |
@@ -1921,7 +1922,8 @@ static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu, | |||
1921 | static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu, | 1922 | static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu, |
1922 | struct kvm_vcpu_events *events) | 1923 | struct kvm_vcpu_events *events) |
1923 | { | 1924 | { |
1924 | if (events->flags) | 1925 | if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING |
1926 | | KVM_VCPUEVENT_VALID_SIPI_VECTOR)) | ||
1925 | return -EINVAL; | 1927 | return -EINVAL; |
1926 | 1928 | ||
1927 | vcpu_load(vcpu); | 1929 | vcpu_load(vcpu); |
@@ -1938,10 +1940,12 @@ static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu, | |||
1938 | kvm_pic_clear_isr_ack(vcpu->kvm); | 1940 | kvm_pic_clear_isr_ack(vcpu->kvm); |
1939 | 1941 | ||
1940 | vcpu->arch.nmi_injected = events->nmi.injected; | 1942 | vcpu->arch.nmi_injected = events->nmi.injected; |
1941 | vcpu->arch.nmi_pending = events->nmi.pending; | 1943 | if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING) |
1944 | vcpu->arch.nmi_pending = events->nmi.pending; | ||
1942 | kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked); | 1945 | kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked); |
1943 | 1946 | ||
1944 | vcpu->arch.sipi_vector = events->sipi_vector; | 1947 | if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR) |
1948 | vcpu->arch.sipi_vector = events->sipi_vector; | ||
1945 | 1949 | ||
1946 | vcpu_put(vcpu); | 1950 | vcpu_put(vcpu); |
1947 | 1951 | ||
diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c index c973f8e2a6cf..9a0c258a86be 100644 --- a/arch/x86/mm/init_32.c +++ b/arch/x86/mm/init_32.c | |||
@@ -892,8 +892,7 @@ void __init mem_init(void) | |||
892 | reservedpages << (PAGE_SHIFT-10), | 892 | reservedpages << (PAGE_SHIFT-10), |
893 | datasize >> 10, | 893 | datasize >> 10, |
894 | initsize >> 10, | 894 | initsize >> 10, |
895 | (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10)) | 895 | totalhigh_pages << (PAGE_SHIFT-10)); |
896 | ); | ||
897 | 896 | ||
898 | printk(KERN_INFO "virtual kernel memory layout:\n" | 897 | printk(KERN_INFO "virtual kernel memory layout:\n" |
899 | " fixmap : 0x%08lx - 0x%08lx (%4ld kB)\n" | 898 | " fixmap : 0x%08lx - 0x%08lx (%4ld kB)\n" |
diff --git a/arch/x86/mm/kmemcheck/error.c b/arch/x86/mm/kmemcheck/error.c index 4901d0dafda6..af3b6c8a436f 100644 --- a/arch/x86/mm/kmemcheck/error.c +++ b/arch/x86/mm/kmemcheck/error.c | |||
@@ -106,26 +106,25 @@ void kmemcheck_error_recall(void) | |||
106 | 106 | ||
107 | switch (e->type) { | 107 | switch (e->type) { |
108 | case KMEMCHECK_ERROR_INVALID_ACCESS: | 108 | case KMEMCHECK_ERROR_INVALID_ACCESS: |
109 | printk(KERN_ERR "WARNING: kmemcheck: Caught %d-bit read " | 109 | printk(KERN_WARNING "WARNING: kmemcheck: Caught %d-bit read from %s memory (%p)\n", |
110 | "from %s memory (%p)\n", | ||
111 | 8 * e->size, e->state < ARRAY_SIZE(desc) ? | 110 | 8 * e->size, e->state < ARRAY_SIZE(desc) ? |
112 | desc[e->state] : "(invalid shadow state)", | 111 | desc[e->state] : "(invalid shadow state)", |
113 | (void *) e->address); | 112 | (void *) e->address); |
114 | 113 | ||
115 | printk(KERN_INFO); | 114 | printk(KERN_WARNING); |
116 | for (i = 0; i < SHADOW_COPY_SIZE; ++i) | 115 | for (i = 0; i < SHADOW_COPY_SIZE; ++i) |
117 | printk("%02x", e->memory_copy[i]); | 116 | printk(KERN_CONT "%02x", e->memory_copy[i]); |
118 | printk("\n"); | 117 | printk(KERN_CONT "\n"); |
119 | 118 | ||
120 | printk(KERN_INFO); | 119 | printk(KERN_WARNING); |
121 | for (i = 0; i < SHADOW_COPY_SIZE; ++i) { | 120 | for (i = 0; i < SHADOW_COPY_SIZE; ++i) { |
122 | if (e->shadow_copy[i] < ARRAY_SIZE(short_desc)) | 121 | if (e->shadow_copy[i] < ARRAY_SIZE(short_desc)) |
123 | printk(" %c", short_desc[e->shadow_copy[i]]); | 122 | printk(KERN_CONT " %c", short_desc[e->shadow_copy[i]]); |
124 | else | 123 | else |
125 | printk(" ?"); | 124 | printk(KERN_CONT " ?"); |
126 | } | 125 | } |
127 | printk("\n"); | 126 | printk(KERN_CONT "\n"); |
128 | printk(KERN_INFO "%*c\n", 2 + 2 | 127 | printk(KERN_WARNING "%*c\n", 2 + 2 |
129 | * (int) (e->address & (SHADOW_COPY_SIZE - 1)), '^'); | 128 | * (int) (e->address & (SHADOW_COPY_SIZE - 1)), '^'); |
130 | break; | 129 | break; |
131 | case KMEMCHECK_ERROR_BUG: | 130 | case KMEMCHECK_ERROR_BUG: |
diff --git a/arch/x86/pci/bus_numa.c b/arch/x86/pci/bus_numa.c index 145df00e0387..f939d603adfa 100644 --- a/arch/x86/pci/bus_numa.c +++ b/arch/x86/pci/bus_numa.c | |||
@@ -51,7 +51,7 @@ void x86_pci_root_bus_res_quirks(struct pci_bus *b) | |||
51 | } | 51 | } |
52 | } | 52 | } |
53 | 53 | ||
54 | void __init update_res(struct pci_root_info *info, size_t start, | 54 | void __devinit update_res(struct pci_root_info *info, size_t start, |
55 | size_t end, unsigned long flags, int merge) | 55 | size_t end, unsigned long flags, int merge) |
56 | { | 56 | { |
57 | int i; | 57 | int i; |
diff --git a/arch/x86/pci/intel_bus.c b/arch/x86/pci/intel_bus.c index b7a55dc55d13..f81a2fa8fe25 100644 --- a/arch/x86/pci/intel_bus.c +++ b/arch/x86/pci/intel_bus.c | |||
@@ -49,6 +49,10 @@ static void __devinit pci_root_bus_res(struct pci_dev *dev) | |||
49 | u64 mmioh_base, mmioh_end; | 49 | u64 mmioh_base, mmioh_end; |
50 | int bus_base, bus_end; | 50 | int bus_base, bus_end; |
51 | 51 | ||
52 | /* some sys doesn't get mmconf enabled */ | ||
53 | if (dev->cfg_size < 0x120) | ||
54 | return; | ||
55 | |||
52 | if (pci_root_num >= PCI_ROOT_NR) { | 56 | if (pci_root_num >= PCI_ROOT_NR) { |
53 | printk(KERN_DEBUG "intel_bus.c: PCI_ROOT_NR is too small\n"); | 57 | printk(KERN_DEBUG "intel_bus.c: PCI_ROOT_NR is too small\n"); |
54 | return; | 58 | return; |
diff --git a/arch/x86/tools/chkobjdump.awk b/arch/x86/tools/chkobjdump.awk index 5bbb5a33f220..fd1ab80be0de 100644 --- a/arch/x86/tools/chkobjdump.awk +++ b/arch/x86/tools/chkobjdump.awk | |||
@@ -8,14 +8,24 @@ BEGIN { | |||
8 | od_sver = 19; | 8 | od_sver = 19; |
9 | } | 9 | } |
10 | 10 | ||
11 | /^GNU/ { | 11 | /^GNU objdump/ { |
12 | split($3, ver, "."); | 12 | verstr = "" |
13 | for (i = 3; i <= NF; i++) | ||
14 | if (match($(i), "^[0-9]")) { | ||
15 | verstr = $(i); | ||
16 | break; | ||
17 | } | ||
18 | if (verstr == "") { | ||
19 | printf("Warning: Failed to find objdump version number.\n"); | ||
20 | exit 0; | ||
21 | } | ||
22 | split(verstr, ver, "."); | ||
13 | if (ver[1] > od_ver || | 23 | if (ver[1] > od_ver || |
14 | (ver[1] == od_ver && ver[2] >= od_sver)) { | 24 | (ver[1] == od_ver && ver[2] >= od_sver)) { |
15 | exit 1; | 25 | exit 1; |
16 | } else { | 26 | } else { |
17 | printf("Warning: objdump version %s is older than %d.%d\n", | 27 | printf("Warning: objdump version %s is older than %d.%d\n", |
18 | $4, od_ver, od_sver); | 28 | verstr, od_ver, od_sver); |
19 | print("Warning: Skipping posttest."); | 29 | print("Warning: Skipping posttest."); |
20 | # Logic is inverted, because we just skip test without error. | 30 | # Logic is inverted, because we just skip test without error. |
21 | exit 0; | 31 | exit 0; |