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-rw-r--r--arch/arm/include/asm/io.h4
-rw-r--r--arch/arm/include/asm/sched_clock.h2
-rw-r--r--arch/arm/include/asm/vfpmacros.h12
-rw-r--r--arch/arm/include/uapi/asm/hwcap.h3
-rw-r--r--arch/arm/kernel/sched_clock.c18
-rw-r--r--arch/arm/mach-imx/clk-gate2.c2
-rw-r--r--arch/arm/mach-imx/ehci-imx25.c2
-rw-r--r--arch/arm/mach-imx/ehci-imx35.c2
-rw-r--r--arch/arm/mm/alignment.c2
-rw-r--r--arch/arm/vfp/vfpmodule.c9
-rw-r--r--arch/arm/xen/enlighten.c11
-rw-r--r--arch/arm64/Kconfig1
-rw-r--r--arch/arm64/include/asm/elf.h5
-rw-r--r--arch/arm64/include/asm/fpsimd.h5
-rw-r--r--arch/arm64/include/asm/io.h8
-rw-r--r--arch/arm64/include/asm/processor.h2
-rw-r--r--arch/arm64/include/asm/unistd.h1
-rw-r--r--arch/arm64/kernel/perf_event.c10
-rw-r--r--arch/arm64/kernel/process.c18
-rw-r--r--arch/arm64/kernel/smp.c3
-rw-r--r--arch/arm64/mm/init.c2
-rw-r--r--arch/h8300/include/asm/cache.h3
-rw-r--r--arch/s390/include/asm/cio.h2
-rw-r--r--arch/s390/include/asm/pgtable.h35
-rw-r--r--arch/s390/kernel/sclp.S8
-rw-r--r--arch/s390/lib/uaccess_pt.c2
-rw-r--r--arch/s390/mm/gup.c2
-rw-r--r--arch/sparc/Kconfig1
-rw-r--r--arch/sparc/crypto/Makefile16
-rw-r--r--arch/sparc/crypto/aes_glue.c2
-rw-r--r--arch/sparc/crypto/camellia_glue.c2
-rw-r--r--arch/sparc/crypto/crc32c_glue.c2
-rw-r--r--arch/sparc/crypto/des_glue.c2
-rw-r--r--arch/sparc/crypto/md5_glue.c2
-rw-r--r--arch/sparc/crypto/sha1_glue.c2
-rw-r--r--arch/sparc/crypto/sha256_glue.c2
-rw-r--r--arch/sparc/crypto/sha512_glue.c2
-rw-r--r--arch/sparc/include/asm/atomic_64.h4
-rw-r--r--arch/sparc/include/asm/backoff.h69
-rw-r--r--arch/sparc/include/asm/compat.h5
-rw-r--r--arch/sparc/include/asm/processor_64.h17
-rw-r--r--arch/sparc/include/asm/prom.h5
-rw-r--r--arch/sparc/include/asm/thread_info_64.h5
-rw-r--r--arch/sparc/include/asm/ttable.h24
-rw-r--r--arch/sparc/include/uapi/asm/unistd.h7
-rw-r--r--arch/sparc/kernel/entry.h7
-rw-r--r--arch/sparc/kernel/leon_kernel.c6
-rw-r--r--arch/sparc/kernel/perf_event.c22
-rw-r--r--arch/sparc/kernel/process_64.c42
-rw-r--r--arch/sparc/kernel/ptrace_64.c4
-rw-r--r--arch/sparc/kernel/setup_64.c21
-rw-r--r--arch/sparc/kernel/sys_sparc_64.c5
-rw-r--r--arch/sparc/kernel/systbls_32.S1
-rw-r--r--arch/sparc/kernel/systbls_64.S2
-rw-r--r--arch/sparc/kernel/unaligned_64.c36
-rw-r--r--arch/sparc/kernel/visemul.c23
-rw-r--r--arch/sparc/kernel/vmlinux.lds.S5
-rw-r--r--arch/sparc/kernel/winfixup.S2
-rw-r--r--arch/sparc/lib/atomic_64.S16
-rw-r--r--arch/sparc/lib/ksyms.c1
-rw-r--r--arch/sparc/math-emu/math_64.c2
-rw-r--r--arch/x86/include/asm/xen/hypercall.h21
62 files changed, 371 insertions, 188 deletions
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 35c1ed89b936..42f042ee4ada 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -64,7 +64,7 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
64static inline void __raw_writew(u16 val, volatile void __iomem *addr) 64static inline void __raw_writew(u16 val, volatile void __iomem *addr)
65{ 65{
66 asm volatile("strh %1, %0" 66 asm volatile("strh %1, %0"
67 : "+Qo" (*(volatile u16 __force *)addr) 67 : "+Q" (*(volatile u16 __force *)addr)
68 : "r" (val)); 68 : "r" (val));
69} 69}
70 70
@@ -72,7 +72,7 @@ static inline u16 __raw_readw(const volatile void __iomem *addr)
72{ 72{
73 u16 val; 73 u16 val;
74 asm volatile("ldrh %1, %0" 74 asm volatile("ldrh %1, %0"
75 : "+Qo" (*(volatile u16 __force *)addr), 75 : "+Q" (*(volatile u16 __force *)addr),
76 "=r" (val)); 76 "=r" (val));
77 return val; 77 return val;
78} 78}
diff --git a/arch/arm/include/asm/sched_clock.h b/arch/arm/include/asm/sched_clock.h
index 05b8e82ec9f5..e3f757263438 100644
--- a/arch/arm/include/asm/sched_clock.h
+++ b/arch/arm/include/asm/sched_clock.h
@@ -10,7 +10,5 @@
10 10
11extern void sched_clock_postinit(void); 11extern void sched_clock_postinit(void);
12extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate); 12extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate);
13extern void setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,
14 unsigned long rate);
15 13
16#endif 14#endif
diff --git a/arch/arm/include/asm/vfpmacros.h b/arch/arm/include/asm/vfpmacros.h
index 6a6f1e485f41..301c1db3e99b 100644
--- a/arch/arm/include/asm/vfpmacros.h
+++ b/arch/arm/include/asm/vfpmacros.h
@@ -27,9 +27,9 @@
27#if __LINUX_ARM_ARCH__ <= 6 27#if __LINUX_ARM_ARCH__ <= 6
28 ldr \tmp, =elf_hwcap @ may not have MVFR regs 28 ldr \tmp, =elf_hwcap @ may not have MVFR regs
29 ldr \tmp, [\tmp, #0] 29 ldr \tmp, [\tmp, #0]
30 tst \tmp, #HWCAP_VFPv3D16 30 tst \tmp, #HWCAP_VFPD32
31 ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} 31 ldcnel p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
32 addne \base, \base, #32*4 @ step over unused register space 32 addeq \base, \base, #32*4 @ step over unused register space
33#else 33#else
34 VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 34 VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
35 and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field 35 and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
@@ -51,9 +51,9 @@
51#if __LINUX_ARM_ARCH__ <= 6 51#if __LINUX_ARM_ARCH__ <= 6
52 ldr \tmp, =elf_hwcap @ may not have MVFR regs 52 ldr \tmp, =elf_hwcap @ may not have MVFR regs
53 ldr \tmp, [\tmp, #0] 53 ldr \tmp, [\tmp, #0]
54 tst \tmp, #HWCAP_VFPv3D16 54 tst \tmp, #HWCAP_VFPD32
55 stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} 55 stcnel p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
56 addne \base, \base, #32*4 @ step over unused register space 56 addeq \base, \base, #32*4 @ step over unused register space
57#else 57#else
58 VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 58 VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
59 and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field 59 and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
diff --git a/arch/arm/include/uapi/asm/hwcap.h b/arch/arm/include/uapi/asm/hwcap.h
index f254f6503cce..3688fd15a32d 100644
--- a/arch/arm/include/uapi/asm/hwcap.h
+++ b/arch/arm/include/uapi/asm/hwcap.h
@@ -18,11 +18,12 @@
18#define HWCAP_THUMBEE (1 << 11) 18#define HWCAP_THUMBEE (1 << 11)
19#define HWCAP_NEON (1 << 12) 19#define HWCAP_NEON (1 << 12)
20#define HWCAP_VFPv3 (1 << 13) 20#define HWCAP_VFPv3 (1 << 13)
21#define HWCAP_VFPv3D16 (1 << 14) 21#define HWCAP_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */
22#define HWCAP_TLS (1 << 15) 22#define HWCAP_TLS (1 << 15)
23#define HWCAP_VFPv4 (1 << 16) 23#define HWCAP_VFPv4 (1 << 16)
24#define HWCAP_IDIVA (1 << 17) 24#define HWCAP_IDIVA (1 << 17)
25#define HWCAP_IDIVT (1 << 18) 25#define HWCAP_IDIVT (1 << 18)
26#define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs (not 16) */
26#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT) 27#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT)
27 28
28 29
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c
index e21bac20d90d..fc6692e2b603 100644
--- a/arch/arm/kernel/sched_clock.c
+++ b/arch/arm/kernel/sched_clock.c
@@ -107,13 +107,6 @@ static void sched_clock_poll(unsigned long wrap_ticks)
107 update_sched_clock(); 107 update_sched_clock();
108} 108}
109 109
110void __init setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,
111 unsigned long rate)
112{
113 setup_sched_clock(read, bits, rate);
114 cd.needs_suspend = true;
115}
116
117void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate) 110void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate)
118{ 111{
119 unsigned long r, w; 112 unsigned long r, w;
@@ -189,18 +182,15 @@ void __init sched_clock_postinit(void)
189static int sched_clock_suspend(void) 182static int sched_clock_suspend(void)
190{ 183{
191 sched_clock_poll(sched_clock_timer.data); 184 sched_clock_poll(sched_clock_timer.data);
192 if (cd.needs_suspend) 185 cd.suspended = true;
193 cd.suspended = true;
194 return 0; 186 return 0;
195} 187}
196 188
197static void sched_clock_resume(void) 189static void sched_clock_resume(void)
198{ 190{
199 if (cd.needs_suspend) { 191 cd.epoch_cyc = read_sched_clock();
200 cd.epoch_cyc = read_sched_clock(); 192 cd.epoch_cyc_copy = cd.epoch_cyc;
201 cd.epoch_cyc_copy = cd.epoch_cyc; 193 cd.suspended = false;
202 cd.suspended = false;
203 }
204} 194}
205 195
206static struct syscore_ops sched_clock_ops = { 196static struct syscore_ops sched_clock_ops = {
diff --git a/arch/arm/mach-imx/clk-gate2.c b/arch/arm/mach-imx/clk-gate2.c
index 3c1b8ff9a0a6..cc49c7ae186e 100644
--- a/arch/arm/mach-imx/clk-gate2.c
+++ b/arch/arm/mach-imx/clk-gate2.c
@@ -112,7 +112,7 @@ struct clk *clk_register_gate2(struct device *dev, const char *name,
112 112
113 clk = clk_register(dev, &gate->hw); 113 clk = clk_register(dev, &gate->hw);
114 if (IS_ERR(clk)) 114 if (IS_ERR(clk))
115 kfree(clk); 115 kfree(gate);
116 116
117 return clk; 117 return clk;
118} 118}
diff --git a/arch/arm/mach-imx/ehci-imx25.c b/arch/arm/mach-imx/ehci-imx25.c
index 412c583a24b0..576af7446952 100644
--- a/arch/arm/mach-imx/ehci-imx25.c
+++ b/arch/arm/mach-imx/ehci-imx25.c
@@ -30,7 +30,7 @@
30#define MX25_H1_SIC_SHIFT 21 30#define MX25_H1_SIC_SHIFT 21
31#define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT) 31#define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT)
32#define MX25_H1_PP_BIT (1 << 18) 32#define MX25_H1_PP_BIT (1 << 18)
33#define MX25_H1_PM_BIT (1 << 8) 33#define MX25_H1_PM_BIT (1 << 16)
34#define MX25_H1_IPPUE_UP_BIT (1 << 7) 34#define MX25_H1_IPPUE_UP_BIT (1 << 7)
35#define MX25_H1_IPPUE_DOWN_BIT (1 << 6) 35#define MX25_H1_IPPUE_DOWN_BIT (1 << 6)
36#define MX25_H1_TLL_BIT (1 << 5) 36#define MX25_H1_TLL_BIT (1 << 5)
diff --git a/arch/arm/mach-imx/ehci-imx35.c b/arch/arm/mach-imx/ehci-imx35.c
index 779e16eb65cb..293397852e4e 100644
--- a/arch/arm/mach-imx/ehci-imx35.c
+++ b/arch/arm/mach-imx/ehci-imx35.c
@@ -30,7 +30,7 @@
30#define MX35_H1_SIC_SHIFT 21 30#define MX35_H1_SIC_SHIFT 21
31#define MX35_H1_SIC_MASK (0x3 << MX35_H1_SIC_SHIFT) 31#define MX35_H1_SIC_MASK (0x3 << MX35_H1_SIC_SHIFT)
32#define MX35_H1_PP_BIT (1 << 18) 32#define MX35_H1_PP_BIT (1 << 18)
33#define MX35_H1_PM_BIT (1 << 8) 33#define MX35_H1_PM_BIT (1 << 16)
34#define MX35_H1_IPPUE_UP_BIT (1 << 7) 34#define MX35_H1_IPPUE_UP_BIT (1 << 7)
35#define MX35_H1_IPPUE_DOWN_BIT (1 << 6) 35#define MX35_H1_IPPUE_DOWN_BIT (1 << 6)
36#define MX35_H1_TLL_BIT (1 << 5) 36#define MX35_H1_TLL_BIT (1 << 5)
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index 023f443784ec..b820edaf3184 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -745,7 +745,7 @@ do_alignment_t32_to_handler(unsigned long *pinstr, struct pt_regs *regs,
745static int 745static int
746do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) 746do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
747{ 747{
748 union offset_union offset; 748 union offset_union uninitialized_var(offset);
749 unsigned long instr = 0, instrptr; 749 unsigned long instr = 0, instrptr;
750 int (*handler)(unsigned long addr, unsigned long instr, struct pt_regs *regs); 750 int (*handler)(unsigned long addr, unsigned long instr, struct pt_regs *regs);
751 unsigned int type; 751 unsigned int type;
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index c834b32af275..3b44e0dd0a93 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -701,11 +701,14 @@ static int __init vfp_init(void)
701 elf_hwcap |= HWCAP_VFPv3; 701 elf_hwcap |= HWCAP_VFPv3;
702 702
703 /* 703 /*
704 * Check for VFPv3 D16. CPUs in this configuration 704 * Check for VFPv3 D16 and VFPv4 D16. CPUs in
705 * only have 16 x 64bit registers. 705 * this configuration only have 16 x 64bit
706 * registers.
706 */ 707 */
707 if (((fmrx(MVFR0) & MVFR0_A_SIMD_MASK)) == 1) 708 if (((fmrx(MVFR0) & MVFR0_A_SIMD_MASK)) == 1)
708 elf_hwcap |= HWCAP_VFPv3D16; 709 elf_hwcap |= HWCAP_VFPv3D16; /* also v4-D16 */
710 else
711 elf_hwcap |= HWCAP_VFPD32;
709 } 712 }
710#endif 713#endif
711 /* 714 /*
diff --git a/arch/arm/xen/enlighten.c b/arch/arm/xen/enlighten.c
index 59bcb96ac369..f57609275449 100644
--- a/arch/arm/xen/enlighten.c
+++ b/arch/arm/xen/enlighten.c
@@ -166,3 +166,14 @@ void free_xenballooned_pages(int nr_pages, struct page **pages)
166 *pages = NULL; 166 *pages = NULL;
167} 167}
168EXPORT_SYMBOL_GPL(free_xenballooned_pages); 168EXPORT_SYMBOL_GPL(free_xenballooned_pages);
169
170/* In the hypervisor.S file. */
171EXPORT_SYMBOL_GPL(HYPERVISOR_event_channel_op);
172EXPORT_SYMBOL_GPL(HYPERVISOR_grant_table_op);
173EXPORT_SYMBOL_GPL(HYPERVISOR_xen_version);
174EXPORT_SYMBOL_GPL(HYPERVISOR_console_io);
175EXPORT_SYMBOL_GPL(HYPERVISOR_sched_op);
176EXPORT_SYMBOL_GPL(HYPERVISOR_hvm_op);
177EXPORT_SYMBOL_GPL(HYPERVISOR_memory_op);
178EXPORT_SYMBOL_GPL(HYPERVISOR_physdev_op);
179EXPORT_SYMBOL_GPL(privcmd_call);
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index ef54a59a9e89..15ac18a56c93 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -1,6 +1,7 @@
1config ARM64 1config ARM64
2 def_bool y 2 def_bool y
3 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE 3 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
4 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
4 select GENERIC_CLOCKEVENTS 5 select GENERIC_CLOCKEVENTS
5 select GENERIC_HARDIRQS_NO_DEPRECATED 6 select GENERIC_HARDIRQS_NO_DEPRECATED
6 select GENERIC_IOMAP 7 select GENERIC_IOMAP
diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h
index cf284649dfcb..07fea290d7c1 100644
--- a/arch/arm64/include/asm/elf.h
+++ b/arch/arm64/include/asm/elf.h
@@ -25,12 +25,10 @@
25#include <asm/user.h> 25#include <asm/user.h>
26 26
27typedef unsigned long elf_greg_t; 27typedef unsigned long elf_greg_t;
28typedef unsigned long elf_freg_t[3];
29 28
30#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t)) 29#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
31typedef elf_greg_t elf_gregset_t[ELF_NGREG]; 30typedef elf_greg_t elf_gregset_t[ELF_NGREG];
32 31typedef struct user_fpsimd_state elf_fpregset_t;
33typedef struct user_fp elf_fpregset_t;
34 32
35#define EM_AARCH64 183 33#define EM_AARCH64 183
36 34
@@ -87,7 +85,6 @@ typedef struct user_fp elf_fpregset_t;
87#define R_AARCH64_MOVW_PREL_G2_NC 292 85#define R_AARCH64_MOVW_PREL_G2_NC 292
88#define R_AARCH64_MOVW_PREL_G3 293 86#define R_AARCH64_MOVW_PREL_G3 293
89 87
90
91/* 88/*
92 * These are used to set parameters in the core dumps. 89 * These are used to set parameters in the core dumps.
93 */ 90 */
diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h
index b42fab9f62a9..c43b4ac13008 100644
--- a/arch/arm64/include/asm/fpsimd.h
+++ b/arch/arm64/include/asm/fpsimd.h
@@ -25,9 +25,8 @@
25 * - FPSR and FPCR 25 * - FPSR and FPCR
26 * - 32 128-bit data registers 26 * - 32 128-bit data registers
27 * 27 *
28 * Note that user_fp forms a prefix of this structure, which is relied 28 * Note that user_fpsimd forms a prefix of this structure, which is
29 * upon in the ptrace FP/SIMD accessors. struct user_fpsimd_state must 29 * relied upon in the ptrace FP/SIMD accessors.
30 * form a prefix of struct fpsimd_state.
31 */ 30 */
32struct fpsimd_state { 31struct fpsimd_state {
33 union { 32 union {
diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h
index 74a2a7d304a9..54f6116697f7 100644
--- a/arch/arm64/include/asm/io.h
+++ b/arch/arm64/include/asm/io.h
@@ -114,7 +114,7 @@ static inline u64 __raw_readq(const volatile void __iomem *addr)
114 * I/O port access primitives. 114 * I/O port access primitives.
115 */ 115 */
116#define IO_SPACE_LIMIT 0xffff 116#define IO_SPACE_LIMIT 0xffff
117#define PCI_IOBASE ((void __iomem *)0xffffffbbfffe0000UL) 117#define PCI_IOBASE ((void __iomem *)(MODULES_VADDR - SZ_2M))
118 118
119static inline u8 inb(unsigned long addr) 119static inline u8 inb(unsigned long addr)
120{ 120{
@@ -225,9 +225,9 @@ extern void __iounmap(volatile void __iomem *addr);
225#define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_XN | PTE_ATTRINDX(MT_DEVICE_nGnRE)) 225#define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_XN | PTE_ATTRINDX(MT_DEVICE_nGnRE))
226#define PROT_NORMAL_NC (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL_NC)) 226#define PROT_NORMAL_NC (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL_NC))
227 227
228#define ioremap(addr, size) __ioremap((addr), (size), PROT_DEVICE_nGnRE) 228#define ioremap(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE))
229#define ioremap_nocache(addr, size) __ioremap((addr), (size), PROT_DEVICE_nGnRE) 229#define ioremap_nocache(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE))
230#define ioremap_wc(addr, size) __ioremap((addr), (size), PROT_NORMAL_NC) 230#define ioremap_wc(addr, size) __ioremap((addr), (size), __pgprot(PROT_NORMAL_NC))
231#define iounmap __iounmap 231#define iounmap __iounmap
232 232
233#define ARCH_HAS_IOREMAP_WC 233#define ARCH_HAS_IOREMAP_WC
diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
index 5d810044feda..77f696c14339 100644
--- a/arch/arm64/include/asm/processor.h
+++ b/arch/arm64/include/asm/processor.h
@@ -43,6 +43,8 @@
43#else 43#else
44#define STACK_TOP STACK_TOP_MAX 44#define STACK_TOP STACK_TOP_MAX
45#endif /* CONFIG_COMPAT */ 45#endif /* CONFIG_COMPAT */
46
47#define ARCH_LOW_ADDRESS_LIMIT PHYS_MASK
46#endif /* __KERNEL__ */ 48#endif /* __KERNEL__ */
47 49
48struct debug_info { 50struct debug_info {
diff --git a/arch/arm64/include/asm/unistd.h b/arch/arm64/include/asm/unistd.h
index 63f853f8b718..68aff2816e86 100644
--- a/arch/arm64/include/asm/unistd.h
+++ b/arch/arm64/include/asm/unistd.h
@@ -14,7 +14,6 @@
14 * along with this program. If not, see <http://www.gnu.org/licenses/>. 14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */ 15 */
16#ifdef CONFIG_COMPAT 16#ifdef CONFIG_COMPAT
17#define __ARCH_WANT_COMPAT_IPC_PARSE_VERSION
18#define __ARCH_WANT_COMPAT_STAT64 17#define __ARCH_WANT_COMPAT_STAT64
19#define __ARCH_WANT_SYS_GETHOSTNAME 18#define __ARCH_WANT_SYS_GETHOSTNAME
20#define __ARCH_WANT_SYS_PAUSE 19#define __ARCH_WANT_SYS_PAUSE
diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
index ecbf2d81ec5c..c76c7241125b 100644
--- a/arch/arm64/kernel/perf_event.c
+++ b/arch/arm64/kernel/perf_event.c
@@ -613,17 +613,11 @@ enum armv8_pmuv3_perf_types {
613 ARMV8_PMUV3_PERFCTR_BUS_ACCESS = 0x19, 613 ARMV8_PMUV3_PERFCTR_BUS_ACCESS = 0x19,
614 ARMV8_PMUV3_PERFCTR_MEM_ERROR = 0x1A, 614 ARMV8_PMUV3_PERFCTR_MEM_ERROR = 0x1A,
615 ARMV8_PMUV3_PERFCTR_BUS_CYCLES = 0x1D, 615 ARMV8_PMUV3_PERFCTR_BUS_CYCLES = 0x1D,
616
617 /*
618 * This isn't an architected event.
619 * We detect this event number and use the cycle counter instead.
620 */
621 ARMV8_PMUV3_PERFCTR_CPU_CYCLES = 0xFF,
622}; 616};
623 617
624/* PMUv3 HW events mapping. */ 618/* PMUv3 HW events mapping. */
625static const unsigned armv8_pmuv3_perf_map[PERF_COUNT_HW_MAX] = { 619static const unsigned armv8_pmuv3_perf_map[PERF_COUNT_HW_MAX] = {
626 [PERF_COUNT_HW_CPU_CYCLES] = ARMV8_PMUV3_PERFCTR_CPU_CYCLES, 620 [PERF_COUNT_HW_CPU_CYCLES] = ARMV8_PMUV3_PERFCTR_CLOCK_CYCLES,
627 [PERF_COUNT_HW_INSTRUCTIONS] = ARMV8_PMUV3_PERFCTR_INSTR_EXECUTED, 621 [PERF_COUNT_HW_INSTRUCTIONS] = ARMV8_PMUV3_PERFCTR_INSTR_EXECUTED,
628 [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV8_PMUV3_PERFCTR_L1_DCACHE_ACCESS, 622 [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV8_PMUV3_PERFCTR_L1_DCACHE_ACCESS,
629 [PERF_COUNT_HW_CACHE_MISSES] = ARMV8_PMUV3_PERFCTR_L1_DCACHE_REFILL, 623 [PERF_COUNT_HW_CACHE_MISSES] = ARMV8_PMUV3_PERFCTR_L1_DCACHE_REFILL,
@@ -1106,7 +1100,7 @@ static int armv8pmu_get_event_idx(struct pmu_hw_events *cpuc,
1106 unsigned long evtype = event->config_base & ARMV8_EVTYPE_EVENT; 1100 unsigned long evtype = event->config_base & ARMV8_EVTYPE_EVENT;
1107 1101
1108 /* Always place a cycle counter into the cycle counter. */ 1102 /* Always place a cycle counter into the cycle counter. */
1109 if (evtype == ARMV8_PMUV3_PERFCTR_CPU_CYCLES) { 1103 if (evtype == ARMV8_PMUV3_PERFCTR_CLOCK_CYCLES) {
1110 if (test_and_set_bit(ARMV8_IDX_CYCLE_COUNTER, cpuc->used_mask)) 1104 if (test_and_set_bit(ARMV8_IDX_CYCLE_COUNTER, cpuc->used_mask))
1111 return -EAGAIN; 1105 return -EAGAIN;
1112 1106
diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
index f22965ea1cfc..e04cebdbb47f 100644
--- a/arch/arm64/kernel/process.c
+++ b/arch/arm64/kernel/process.c
@@ -310,24 +310,6 @@ struct task_struct *__switch_to(struct task_struct *prev,
310} 310}
311 311
312/* 312/*
313 * Fill in the task's elfregs structure for a core dump.
314 */
315int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs)
316{
317 elf_core_copy_regs(elfregs, task_pt_regs(t));
318 return 1;
319}
320
321/*
322 * fill in the fpe structure for a core dump...
323 */
324int dump_fpu (struct pt_regs *regs, struct user_fp *fp)
325{
326 return 0;
327}
328EXPORT_SYMBOL(dump_fpu);
329
330/*
331 * Shuffle the argument into the correct register before calling the 313 * Shuffle the argument into the correct register before calling the
332 * thread function. x1 is the thread argument, x2 is the pointer to 314 * thread function. x1 is the thread argument, x2 is the pointer to
333 * the thread function, and x3 points to the exit function. 315 * the thread function, and x3 points to the exit function.
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index 226b6bf6e9c2..538300f2273d 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -211,8 +211,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
211 * before we continue. 211 * before we continue.
212 */ 212 */
213 set_cpu_online(cpu, true); 213 set_cpu_online(cpu, true);
214 while (!cpu_active(cpu)) 214 complete(&cpu_running);
215 cpu_relax();
216 215
217 /* 216 /*
218 * OK, it's off to the idle thread for us 217 * OK, it's off to the idle thread for us
diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
index efbf7df05d3f..4cd28931dba9 100644
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -80,7 +80,7 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max)
80#ifdef CONFIG_ZONE_DMA32 80#ifdef CONFIG_ZONE_DMA32
81 /* 4GB maximum for 32-bit only capable devices */ 81 /* 4GB maximum for 32-bit only capable devices */
82 max_dma32 = min(max, MAX_DMA32_PFN); 82 max_dma32 = min(max, MAX_DMA32_PFN);
83 zone_size[ZONE_DMA32] = max_dma32 - min; 83 zone_size[ZONE_DMA32] = max(min, max_dma32) - min;
84#endif 84#endif
85 zone_size[ZONE_NORMAL] = max - max_dma32; 85 zone_size[ZONE_NORMAL] = max - max_dma32;
86 86
diff --git a/arch/h8300/include/asm/cache.h b/arch/h8300/include/asm/cache.h
index c6350283649d..05887a1d80e5 100644
--- a/arch/h8300/include/asm/cache.h
+++ b/arch/h8300/include/asm/cache.h
@@ -2,7 +2,8 @@
2#define __ARCH_H8300_CACHE_H 2#define __ARCH_H8300_CACHE_H
3 3
4/* bytes per L1 cache line */ 4/* bytes per L1 cache line */
5#define L1_CACHE_BYTES 4 5#define L1_CACHE_SHIFT 2
6#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
6 7
7/* m68k-elf-gcc 2.95.2 doesn't like these */ 8/* m68k-elf-gcc 2.95.2 doesn't like these */
8 9
diff --git a/arch/s390/include/asm/cio.h b/arch/s390/include/asm/cio.h
index 55bde6035216..ad2b924167d7 100644
--- a/arch/s390/include/asm/cio.h
+++ b/arch/s390/include/asm/cio.h
@@ -9,6 +9,8 @@
9 9
10#define LPM_ANYPATH 0xff 10#define LPM_ANYPATH 0xff
11#define __MAX_CSSID 0 11#define __MAX_CSSID 0
12#define __MAX_SUBCHANNEL 65535
13#define __MAX_SSID 3
12 14
13#include <asm/scsw.h> 15#include <asm/scsw.h>
14 16
diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h
index dd647c919a66..2d3b7cb26005 100644
--- a/arch/s390/include/asm/pgtable.h
+++ b/arch/s390/include/asm/pgtable.h
@@ -506,12 +506,15 @@ static inline int pud_bad(pud_t pud)
506 506
507static inline int pmd_present(pmd_t pmd) 507static inline int pmd_present(pmd_t pmd)
508{ 508{
509 return (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN) != 0UL; 509 unsigned long mask = _SEGMENT_ENTRY_INV | _SEGMENT_ENTRY_RO;
510 return (pmd_val(pmd) & mask) == _HPAGE_TYPE_NONE ||
511 !(pmd_val(pmd) & _SEGMENT_ENTRY_INV);
510} 512}
511 513
512static inline int pmd_none(pmd_t pmd) 514static inline int pmd_none(pmd_t pmd)
513{ 515{
514 return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) != 0UL; 516 return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) &&
517 !(pmd_val(pmd) & _SEGMENT_ENTRY_RO);
515} 518}
516 519
517static inline int pmd_large(pmd_t pmd) 520static inline int pmd_large(pmd_t pmd)
@@ -1223,6 +1226,11 @@ static inline void __pmd_idte(unsigned long address, pmd_t *pmdp)
1223} 1226}
1224 1227
1225#ifdef CONFIG_TRANSPARENT_HUGEPAGE 1228#ifdef CONFIG_TRANSPARENT_HUGEPAGE
1229
1230#define SEGMENT_NONE __pgprot(_HPAGE_TYPE_NONE)
1231#define SEGMENT_RO __pgprot(_HPAGE_TYPE_RO)
1232#define SEGMENT_RW __pgprot(_HPAGE_TYPE_RW)
1233
1226#define __HAVE_ARCH_PGTABLE_DEPOSIT 1234#define __HAVE_ARCH_PGTABLE_DEPOSIT
1227extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pgtable_t pgtable); 1235extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pgtable_t pgtable);
1228 1236
@@ -1242,16 +1250,15 @@ static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
1242 1250
1243static inline unsigned long massage_pgprot_pmd(pgprot_t pgprot) 1251static inline unsigned long massage_pgprot_pmd(pgprot_t pgprot)
1244{ 1252{
1245 unsigned long pgprot_pmd = 0; 1253 /*
1246 1254 * pgprot is PAGE_NONE, PAGE_RO, or PAGE_RW (see __Pxxx / __Sxxx)
1247 if (pgprot_val(pgprot) & _PAGE_INVALID) { 1255 * Convert to segment table entry format.
1248 if (pgprot_val(pgprot) & _PAGE_SWT) 1256 */
1249 pgprot_pmd |= _HPAGE_TYPE_NONE; 1257 if (pgprot_val(pgprot) == pgprot_val(PAGE_NONE))
1250 pgprot_pmd |= _SEGMENT_ENTRY_INV; 1258 return pgprot_val(SEGMENT_NONE);
1251 } 1259 if (pgprot_val(pgprot) == pgprot_val(PAGE_RO))
1252 if (pgprot_val(pgprot) & _PAGE_RO) 1260 return pgprot_val(SEGMENT_RO);
1253 pgprot_pmd |= _SEGMENT_ENTRY_RO; 1261 return pgprot_val(SEGMENT_RW);
1254 return pgprot_pmd;
1255} 1262}
1256 1263
1257static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) 1264static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
@@ -1269,7 +1276,9 @@ static inline pmd_t pmd_mkhuge(pmd_t pmd)
1269 1276
1270static inline pmd_t pmd_mkwrite(pmd_t pmd) 1277static inline pmd_t pmd_mkwrite(pmd_t pmd)
1271{ 1278{
1272 pmd_val(pmd) &= ~_SEGMENT_ENTRY_RO; 1279 /* Do not clobber _HPAGE_TYPE_NONE pages! */
1280 if (!(pmd_val(pmd) & _SEGMENT_ENTRY_INV))
1281 pmd_val(pmd) &= ~_SEGMENT_ENTRY_RO;
1273 return pmd; 1282 return pmd;
1274} 1283}
1275 1284
diff --git a/arch/s390/kernel/sclp.S b/arch/s390/kernel/sclp.S
index bf053898630d..b6506ee32a36 100644
--- a/arch/s390/kernel/sclp.S
+++ b/arch/s390/kernel/sclp.S
@@ -44,6 +44,12 @@ _sclp_wait_int:
44#endif 44#endif
45 mvc .LoldpswS1-.LbaseS1(16,%r13),0(%r8) 45 mvc .LoldpswS1-.LbaseS1(16,%r13),0(%r8)
46 mvc 0(16,%r8),0(%r9) 46 mvc 0(16,%r8),0(%r9)
47#ifdef CONFIG_64BIT
48 epsw %r6,%r7 # set current addressing mode
49 nill %r6,0x1 # in new psw (31 or 64 bit mode)
50 nilh %r7,0x8000
51 stm %r6,%r7,0(%r8)
52#endif
47 lhi %r6,0x0200 # cr mask for ext int (cr0.54) 53 lhi %r6,0x0200 # cr mask for ext int (cr0.54)
48 ltr %r2,%r2 54 ltr %r2,%r2
49 jz .LsetctS1 55 jz .LsetctS1
@@ -87,7 +93,7 @@ _sclp_wait_int:
87 .long 0x00080000, 0x80000000+.LwaitS1 # PSW to handle ext int 93 .long 0x00080000, 0x80000000+.LwaitS1 # PSW to handle ext int
88#ifdef CONFIG_64BIT 94#ifdef CONFIG_64BIT
89.LextpswS1_64: 95.LextpswS1_64:
90 .quad 0x0000000180000000, .LwaitS1 # PSW to handle ext int, 64 bit 96 .quad 0, .LwaitS1 # PSW to handle ext int, 64 bit
91#endif 97#endif
92.LwaitpswS1: 98.LwaitpswS1:
93 .long 0x010a0000, 0x00000000+.LloopS1 # PSW to wait for ext int 99 .long 0x010a0000, 0x00000000+.LloopS1 # PSW to wait for ext int
diff --git a/arch/s390/lib/uaccess_pt.c b/arch/s390/lib/uaccess_pt.c
index 2d37bb861faf..9017a63dda3d 100644
--- a/arch/s390/lib/uaccess_pt.c
+++ b/arch/s390/lib/uaccess_pt.c
@@ -39,7 +39,7 @@ static __always_inline unsigned long follow_table(struct mm_struct *mm,
39 pmd = pmd_offset(pud, addr); 39 pmd = pmd_offset(pud, addr);
40 if (pmd_none(*pmd)) 40 if (pmd_none(*pmd))
41 return -0x10UL; 41 return -0x10UL;
42 if (pmd_huge(*pmd)) { 42 if (pmd_large(*pmd)) {
43 if (write && (pmd_val(*pmd) & _SEGMENT_ENTRY_RO)) 43 if (write && (pmd_val(*pmd) & _SEGMENT_ENTRY_RO))
44 return -0x04UL; 44 return -0x04UL;
45 return (pmd_val(*pmd) & HPAGE_MASK) + (addr & ~HPAGE_MASK); 45 return (pmd_val(*pmd) & HPAGE_MASK) + (addr & ~HPAGE_MASK);
diff --git a/arch/s390/mm/gup.c b/arch/s390/mm/gup.c
index 60acb93a4680..8b8285310b5a 100644
--- a/arch/s390/mm/gup.c
+++ b/arch/s390/mm/gup.c
@@ -126,7 +126,7 @@ static inline int gup_pmd_range(pud_t *pudp, pud_t pud, unsigned long addr,
126 */ 126 */
127 if (pmd_none(pmd) || pmd_trans_splitting(pmd)) 127 if (pmd_none(pmd) || pmd_trans_splitting(pmd))
128 return 0; 128 return 0;
129 if (unlikely(pmd_huge(pmd))) { 129 if (unlikely(pmd_large(pmd))) {
130 if (!gup_huge_pmd(pmdp, pmd, addr, next, 130 if (!gup_huge_pmd(pmdp, pmd, addr, next,
131 write, pages, nr)) 131 write, pages, nr))
132 return 0; 132 return 0;
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index b6b442b0d793..9f2edb5c5551 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -20,6 +20,7 @@ config SPARC
20 select HAVE_ARCH_TRACEHOOK 20 select HAVE_ARCH_TRACEHOOK
21 select SYSCTL_EXCEPTION_TRACE 21 select SYSCTL_EXCEPTION_TRACE
22 select ARCH_WANT_OPTIONAL_GPIOLIB 22 select ARCH_WANT_OPTIONAL_GPIOLIB
23 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
23 select RTC_CLASS 24 select RTC_CLASS
24 select RTC_DRV_M48T59 25 select RTC_DRV_M48T59
25 select HAVE_IRQ_WORK 26 select HAVE_IRQ_WORK
diff --git a/arch/sparc/crypto/Makefile b/arch/sparc/crypto/Makefile
index 6ae1ad5e502b..5d469d81761f 100644
--- a/arch/sparc/crypto/Makefile
+++ b/arch/sparc/crypto/Makefile
@@ -13,13 +13,13 @@ obj-$(CONFIG_CRYPTO_DES_SPARC64) += camellia-sparc64.o
13 13
14obj-$(CONFIG_CRYPTO_CRC32C_SPARC64) += crc32c-sparc64.o 14obj-$(CONFIG_CRYPTO_CRC32C_SPARC64) += crc32c-sparc64.o
15 15
16sha1-sparc64-y := sha1_asm.o sha1_glue.o crop_devid.o 16sha1-sparc64-y := sha1_asm.o sha1_glue.o
17sha256-sparc64-y := sha256_asm.o sha256_glue.o crop_devid.o 17sha256-sparc64-y := sha256_asm.o sha256_glue.o
18sha512-sparc64-y := sha512_asm.o sha512_glue.o crop_devid.o 18sha512-sparc64-y := sha512_asm.o sha512_glue.o
19md5-sparc64-y := md5_asm.o md5_glue.o crop_devid.o 19md5-sparc64-y := md5_asm.o md5_glue.o
20 20
21aes-sparc64-y := aes_asm.o aes_glue.o crop_devid.o 21aes-sparc64-y := aes_asm.o aes_glue.o
22des-sparc64-y := des_asm.o des_glue.o crop_devid.o 22des-sparc64-y := des_asm.o des_glue.o
23camellia-sparc64-y := camellia_asm.o camellia_glue.o crop_devid.o 23camellia-sparc64-y := camellia_asm.o camellia_glue.o
24 24
25crc32c-sparc64-y := crc32c_asm.o crc32c_glue.o crop_devid.o 25crc32c-sparc64-y := crc32c_asm.o crc32c_glue.o
diff --git a/arch/sparc/crypto/aes_glue.c b/arch/sparc/crypto/aes_glue.c
index 8f1c9980f637..3965d1d36dfa 100644
--- a/arch/sparc/crypto/aes_glue.c
+++ b/arch/sparc/crypto/aes_glue.c
@@ -475,3 +475,5 @@ MODULE_LICENSE("GPL");
475MODULE_DESCRIPTION("AES Secure Hash Algorithm, sparc64 aes opcode accelerated"); 475MODULE_DESCRIPTION("AES Secure Hash Algorithm, sparc64 aes opcode accelerated");
476 476
477MODULE_ALIAS("aes"); 477MODULE_ALIAS("aes");
478
479#include "crop_devid.c"
diff --git a/arch/sparc/crypto/camellia_glue.c b/arch/sparc/crypto/camellia_glue.c
index 42905c084299..62c89af3fd3f 100644
--- a/arch/sparc/crypto/camellia_glue.c
+++ b/arch/sparc/crypto/camellia_glue.c
@@ -320,3 +320,5 @@ MODULE_LICENSE("GPL");
320MODULE_DESCRIPTION("Camellia Cipher Algorithm, sparc64 camellia opcode accelerated"); 320MODULE_DESCRIPTION("Camellia Cipher Algorithm, sparc64 camellia opcode accelerated");
321 321
322MODULE_ALIAS("aes"); 322MODULE_ALIAS("aes");
323
324#include "crop_devid.c"
diff --git a/arch/sparc/crypto/crc32c_glue.c b/arch/sparc/crypto/crc32c_glue.c
index 0bd89cea8d8e..5162fad912ce 100644
--- a/arch/sparc/crypto/crc32c_glue.c
+++ b/arch/sparc/crypto/crc32c_glue.c
@@ -177,3 +177,5 @@ MODULE_LICENSE("GPL");
177MODULE_DESCRIPTION("CRC32c (Castagnoli), sparc64 crc32c opcode accelerated"); 177MODULE_DESCRIPTION("CRC32c (Castagnoli), sparc64 crc32c opcode accelerated");
178 178
179MODULE_ALIAS("crc32c"); 179MODULE_ALIAS("crc32c");
180
181#include "crop_devid.c"
diff --git a/arch/sparc/crypto/des_glue.c b/arch/sparc/crypto/des_glue.c
index c4940c2d3073..41524cebcc49 100644
--- a/arch/sparc/crypto/des_glue.c
+++ b/arch/sparc/crypto/des_glue.c
@@ -527,3 +527,5 @@ MODULE_LICENSE("GPL");
527MODULE_DESCRIPTION("DES & Triple DES EDE Cipher Algorithms, sparc64 des opcode accelerated"); 527MODULE_DESCRIPTION("DES & Triple DES EDE Cipher Algorithms, sparc64 des opcode accelerated");
528 528
529MODULE_ALIAS("des"); 529MODULE_ALIAS("des");
530
531#include "crop_devid.c"
diff --git a/arch/sparc/crypto/md5_glue.c b/arch/sparc/crypto/md5_glue.c
index 603d723038ce..09a9ea1dfb69 100644
--- a/arch/sparc/crypto/md5_glue.c
+++ b/arch/sparc/crypto/md5_glue.c
@@ -186,3 +186,5 @@ MODULE_LICENSE("GPL");
186MODULE_DESCRIPTION("MD5 Secure Hash Algorithm, sparc64 md5 opcode accelerated"); 186MODULE_DESCRIPTION("MD5 Secure Hash Algorithm, sparc64 md5 opcode accelerated");
187 187
188MODULE_ALIAS("md5"); 188MODULE_ALIAS("md5");
189
190#include "crop_devid.c"
diff --git a/arch/sparc/crypto/sha1_glue.c b/arch/sparc/crypto/sha1_glue.c
index 2bbb20bee9f1..6cd5f29e1e0d 100644
--- a/arch/sparc/crypto/sha1_glue.c
+++ b/arch/sparc/crypto/sha1_glue.c
@@ -181,3 +181,5 @@ MODULE_LICENSE("GPL");
181MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, sparc64 sha1 opcode accelerated"); 181MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, sparc64 sha1 opcode accelerated");
182 182
183MODULE_ALIAS("sha1"); 183MODULE_ALIAS("sha1");
184
185#include "crop_devid.c"
diff --git a/arch/sparc/crypto/sha256_glue.c b/arch/sparc/crypto/sha256_glue.c
index 591e656bd891..04f555ab2680 100644
--- a/arch/sparc/crypto/sha256_glue.c
+++ b/arch/sparc/crypto/sha256_glue.c
@@ -239,3 +239,5 @@ MODULE_DESCRIPTION("SHA-224 and SHA-256 Secure Hash Algorithm, sparc64 sha256 op
239 239
240MODULE_ALIAS("sha224"); 240MODULE_ALIAS("sha224");
241MODULE_ALIAS("sha256"); 241MODULE_ALIAS("sha256");
242
243#include "crop_devid.c"
diff --git a/arch/sparc/crypto/sha512_glue.c b/arch/sparc/crypto/sha512_glue.c
index 486f0a2b7001..f04d1994d19a 100644
--- a/arch/sparc/crypto/sha512_glue.c
+++ b/arch/sparc/crypto/sha512_glue.c
@@ -224,3 +224,5 @@ MODULE_DESCRIPTION("SHA-384 and SHA-512 Secure Hash Algorithm, sparc64 sha512 op
224 224
225MODULE_ALIAS("sha384"); 225MODULE_ALIAS("sha384");
226MODULE_ALIAS("sha512"); 226MODULE_ALIAS("sha512");
227
228#include "crop_devid.c"
diff --git a/arch/sparc/include/asm/atomic_64.h b/arch/sparc/include/asm/atomic_64.h
index ce35a1cf1a20..be56a244c9cf 100644
--- a/arch/sparc/include/asm/atomic_64.h
+++ b/arch/sparc/include/asm/atomic_64.h
@@ -1,7 +1,7 @@
1/* atomic.h: Thankfully the V9 is at least reasonable for this 1/* atomic.h: Thankfully the V9 is at least reasonable for this
2 * stuff. 2 * stuff.
3 * 3 *
4 * Copyright (C) 1996, 1997, 2000 David S. Miller (davem@redhat.com) 4 * Copyright (C) 1996, 1997, 2000, 2012 David S. Miller (davem@redhat.com)
5 */ 5 */
6 6
7#ifndef __ARCH_SPARC64_ATOMIC__ 7#ifndef __ARCH_SPARC64_ATOMIC__
@@ -106,6 +106,8 @@ static inline long atomic64_add_unless(atomic64_t *v, long a, long u)
106 106
107#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) 107#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
108 108
109extern long atomic64_dec_if_positive(atomic64_t *v);
110
109/* Atomic operations are already serializing */ 111/* Atomic operations are already serializing */
110#define smp_mb__before_atomic_dec() barrier() 112#define smp_mb__before_atomic_dec() barrier()
111#define smp_mb__after_atomic_dec() barrier() 113#define smp_mb__after_atomic_dec() barrier()
diff --git a/arch/sparc/include/asm/backoff.h b/arch/sparc/include/asm/backoff.h
index db3af0d30fb1..4e02086b839c 100644
--- a/arch/sparc/include/asm/backoff.h
+++ b/arch/sparc/include/asm/backoff.h
@@ -1,6 +1,46 @@
1#ifndef _SPARC64_BACKOFF_H 1#ifndef _SPARC64_BACKOFF_H
2#define _SPARC64_BACKOFF_H 2#define _SPARC64_BACKOFF_H
3 3
4/* The macros in this file implement an exponential backoff facility
5 * for atomic operations.
6 *
7 * When multiple threads compete on an atomic operation, it is
8 * possible for one thread to be continually denied a successful
9 * completion of the compare-and-swap instruction. Heavily
10 * threaded cpu implementations like Niagara can compound this
11 * problem even further.
12 *
13 * When an atomic operation fails and needs to be retried, we spin a
14 * certain number of times. At each subsequent failure of the same
15 * operation we double the spin count, realizing an exponential
16 * backoff.
17 *
18 * When we spin, we try to use an operation that will cause the
19 * current cpu strand to block, and therefore make the core fully
20 * available to any other other runnable strands. There are two
21 * options, based upon cpu capabilities.
22 *
23 * On all cpus prior to SPARC-T4 we do three dummy reads of the
24 * condition code register. Each read blocks the strand for something
25 * between 40 and 50 cpu cycles.
26 *
27 * For SPARC-T4 and later we have a special "pause" instruction
28 * available. This is implemented using writes to register %asr27.
29 * The cpu will block the number of cycles written into the register,
30 * unless a disrupting trap happens first. SPARC-T4 specifically
31 * implements pause with a granularity of 8 cycles. Each strand has
32 * an internal pause counter which decrements every 8 cycles. So the
33 * chip shifts the %asr27 value down by 3 bits, and writes the result
34 * into the pause counter. If a value smaller than 8 is written, the
35 * chip blocks for 1 cycle.
36 *
37 * To achieve the same amount of backoff as the three %ccr reads give
38 * on earlier chips, we shift the backoff value up by 7 bits. (Three
39 * %ccr reads block for about 128 cycles, 1 << 7 == 128) We write the
40 * whole amount we want to block into the pause register, rather than
41 * loop writing 128 each time.
42 */
43
4#define BACKOFF_LIMIT (4 * 1024) 44#define BACKOFF_LIMIT (4 * 1024)
5 45
6#ifdef CONFIG_SMP 46#ifdef CONFIG_SMP
@@ -11,16 +51,25 @@
11#define BACKOFF_LABEL(spin_label, continue_label) \ 51#define BACKOFF_LABEL(spin_label, continue_label) \
12 spin_label 52 spin_label
13 53
14#define BACKOFF_SPIN(reg, tmp, label) \ 54#define BACKOFF_SPIN(reg, tmp, label) \
15 mov reg, tmp; \ 55 mov reg, tmp; \
1688: brnz,pt tmp, 88b; \ 5688: rd %ccr, %g0; \
17 sub tmp, 1, tmp; \ 57 rd %ccr, %g0; \
18 set BACKOFF_LIMIT, tmp; \ 58 rd %ccr, %g0; \
19 cmp reg, tmp; \ 59 .section .pause_3insn_patch,"ax";\
20 bg,pn %xcc, label; \ 60 .word 88b; \
21 nop; \ 61 sllx tmp, 7, tmp; \
22 ba,pt %xcc, label; \ 62 wr tmp, 0, %asr27; \
23 sllx reg, 1, reg; 63 clr tmp; \
64 .previous; \
65 brnz,pt tmp, 88b; \
66 sub tmp, 1, tmp; \
67 set BACKOFF_LIMIT, tmp; \
68 cmp reg, tmp; \
69 bg,pn %xcc, label; \
70 nop; \
71 ba,pt %xcc, label; \
72 sllx reg, 1, reg;
24 73
25#else 74#else
26 75
diff --git a/arch/sparc/include/asm/compat.h b/arch/sparc/include/asm/compat.h
index cef99fbc0a21..830502fe62b4 100644
--- a/arch/sparc/include/asm/compat.h
+++ b/arch/sparc/include/asm/compat.h
@@ -232,9 +232,10 @@ static inline void __user *arch_compat_alloc_user_space(long len)
232 struct pt_regs *regs = current_thread_info()->kregs; 232 struct pt_regs *regs = current_thread_info()->kregs;
233 unsigned long usp = regs->u_regs[UREG_I6]; 233 unsigned long usp = regs->u_regs[UREG_I6];
234 234
235 if (!(test_thread_flag(TIF_32BIT))) 235 if (test_thread_64bit_stack(usp))
236 usp += STACK_BIAS; 236 usp += STACK_BIAS;
237 else 237
238 if (test_thread_flag(TIF_32BIT))
238 usp &= 0xffffffffUL; 239 usp &= 0xffffffffUL;
239 240
240 usp -= len; 241 usp -= len;
diff --git a/arch/sparc/include/asm/processor_64.h b/arch/sparc/include/asm/processor_64.h
index 4e5a483122a0..721e25f0e2ea 100644
--- a/arch/sparc/include/asm/processor_64.h
+++ b/arch/sparc/include/asm/processor_64.h
@@ -196,7 +196,22 @@ extern unsigned long get_wchan(struct task_struct *task);
196#define KSTK_EIP(tsk) (task_pt_regs(tsk)->tpc) 196#define KSTK_EIP(tsk) (task_pt_regs(tsk)->tpc)
197#define KSTK_ESP(tsk) (task_pt_regs(tsk)->u_regs[UREG_FP]) 197#define KSTK_ESP(tsk) (task_pt_regs(tsk)->u_regs[UREG_FP])
198 198
199#define cpu_relax() barrier() 199/* Please see the commentary in asm/backoff.h for a description of
200 * what these instructions are doing and how they have been choosen.
201 * To make a long story short, we are trying to yield the current cpu
202 * strand during busy loops.
203 */
204#define cpu_relax() asm volatile("\n99:\n\t" \
205 "rd %%ccr, %%g0\n\t" \
206 "rd %%ccr, %%g0\n\t" \
207 "rd %%ccr, %%g0\n\t" \
208 ".section .pause_3insn_patch,\"ax\"\n\t"\
209 ".word 99b\n\t" \
210 "wr %%g0, 128, %%asr27\n\t" \
211 "nop\n\t" \
212 "nop\n\t" \
213 ".previous" \
214 ::: "memory")
200 215
201/* Prefetch support. This is tuned for UltraSPARC-III and later. 216/* Prefetch support. This is tuned for UltraSPARC-III and later.
202 * UltraSPARC-I will treat these as nops, and UltraSPARC-II has 217 * UltraSPARC-I will treat these as nops, and UltraSPARC-II has
diff --git a/arch/sparc/include/asm/prom.h b/arch/sparc/include/asm/prom.h
index c28765110706..f93003123bce 100644
--- a/arch/sparc/include/asm/prom.h
+++ b/arch/sparc/include/asm/prom.h
@@ -63,5 +63,10 @@ extern char *of_console_options;
63extern void irq_trans_init(struct device_node *dp); 63extern void irq_trans_init(struct device_node *dp);
64extern char *build_path_component(struct device_node *dp); 64extern char *build_path_component(struct device_node *dp);
65 65
66/* SPARC has a local implementation */
67extern int of_address_to_resource(struct device_node *dev, int index,
68 struct resource *r);
69#define of_address_to_resource of_address_to_resource
70
66#endif /* __KERNEL__ */ 71#endif /* __KERNEL__ */
67#endif /* _SPARC_PROM_H */ 72#endif /* _SPARC_PROM_H */
diff --git a/arch/sparc/include/asm/thread_info_64.h b/arch/sparc/include/asm/thread_info_64.h
index 4e2276631081..a3fe4dcc0aa6 100644
--- a/arch/sparc/include/asm/thread_info_64.h
+++ b/arch/sparc/include/asm/thread_info_64.h
@@ -259,6 +259,11 @@ static inline bool test_and_clear_restore_sigmask(void)
259 259
260#define tsk_is_polling(t) test_tsk_thread_flag(t, TIF_POLLING_NRFLAG) 260#define tsk_is_polling(t) test_tsk_thread_flag(t, TIF_POLLING_NRFLAG)
261 261
262#define thread32_stack_is_64bit(__SP) (((__SP) & 0x1) != 0)
263#define test_thread_64bit_stack(__SP) \
264 ((test_thread_flag(TIF_32BIT) && !thread32_stack_is_64bit(__SP)) ? \
265 false : true)
266
262#endif /* !__ASSEMBLY__ */ 267#endif /* !__ASSEMBLY__ */
263 268
264#endif /* __KERNEL__ */ 269#endif /* __KERNEL__ */
diff --git a/arch/sparc/include/asm/ttable.h b/arch/sparc/include/asm/ttable.h
index 48f2807d3265..71b5a67522ab 100644
--- a/arch/sparc/include/asm/ttable.h
+++ b/arch/sparc/include/asm/ttable.h
@@ -372,7 +372,9 @@ etrap_spill_fixup_64bit: \
372 372
373/* Normal 32bit spill */ 373/* Normal 32bit spill */
374#define SPILL_2_GENERIC(ASI) \ 374#define SPILL_2_GENERIC(ASI) \
375 srl %sp, 0, %sp; \ 375 and %sp, 1, %g3; \
376 brnz,pn %g3, (. - (128 + 4)); \
377 srl %sp, 0, %sp; \
376 stwa %l0, [%sp + %g0] ASI; \ 378 stwa %l0, [%sp + %g0] ASI; \
377 mov 0x04, %g3; \ 379 mov 0x04, %g3; \
378 stwa %l1, [%sp + %g3] ASI; \ 380 stwa %l1, [%sp + %g3] ASI; \
@@ -398,14 +400,16 @@ etrap_spill_fixup_64bit: \
398 stwa %i6, [%g1 + %g0] ASI; \ 400 stwa %i6, [%g1 + %g0] ASI; \
399 stwa %i7, [%g1 + %g3] ASI; \ 401 stwa %i7, [%g1 + %g3] ASI; \
400 saved; \ 402 saved; \
401 retry; nop; nop; \ 403 retry; \
402 b,a,pt %xcc, spill_fixup_dax; \ 404 b,a,pt %xcc, spill_fixup_dax; \
403 b,a,pt %xcc, spill_fixup_mna; \ 405 b,a,pt %xcc, spill_fixup_mna; \
404 b,a,pt %xcc, spill_fixup; 406 b,a,pt %xcc, spill_fixup;
405 407
406#define SPILL_2_GENERIC_ETRAP \ 408#define SPILL_2_GENERIC_ETRAP \
407etrap_user_spill_32bit: \ 409etrap_user_spill_32bit: \
408 srl %sp, 0, %sp; \ 410 and %sp, 1, %g3; \
411 brnz,pn %g3, etrap_user_spill_64bit; \
412 srl %sp, 0, %sp; \
409 stwa %l0, [%sp + 0x00] %asi; \ 413 stwa %l0, [%sp + 0x00] %asi; \
410 stwa %l1, [%sp + 0x04] %asi; \ 414 stwa %l1, [%sp + 0x04] %asi; \
411 stwa %l2, [%sp + 0x08] %asi; \ 415 stwa %l2, [%sp + 0x08] %asi; \
@@ -427,7 +431,7 @@ etrap_user_spill_32bit: \
427 ba,pt %xcc, etrap_save; \ 431 ba,pt %xcc, etrap_save; \
428 wrpr %g1, %cwp; \ 432 wrpr %g1, %cwp; \
429 nop; nop; nop; nop; \ 433 nop; nop; nop; nop; \
430 nop; nop; nop; nop; \ 434 nop; nop; \
431 ba,a,pt %xcc, etrap_spill_fixup_32bit; \ 435 ba,a,pt %xcc, etrap_spill_fixup_32bit; \
432 ba,a,pt %xcc, etrap_spill_fixup_32bit; \ 436 ba,a,pt %xcc, etrap_spill_fixup_32bit; \
433 ba,a,pt %xcc, etrap_spill_fixup_32bit; 437 ba,a,pt %xcc, etrap_spill_fixup_32bit;
@@ -592,7 +596,9 @@ user_rtt_fill_64bit: \
592 596
593/* Normal 32bit fill */ 597/* Normal 32bit fill */
594#define FILL_2_GENERIC(ASI) \ 598#define FILL_2_GENERIC(ASI) \
595 srl %sp, 0, %sp; \ 599 and %sp, 1, %g3; \
600 brnz,pn %g3, (. - (128 + 4)); \
601 srl %sp, 0, %sp; \
596 lduwa [%sp + %g0] ASI, %l0; \ 602 lduwa [%sp + %g0] ASI, %l0; \
597 mov 0x04, %g2; \ 603 mov 0x04, %g2; \
598 mov 0x08, %g3; \ 604 mov 0x08, %g3; \
@@ -616,14 +622,16 @@ user_rtt_fill_64bit: \
616 lduwa [%g1 + %g3] ASI, %i6; \ 622 lduwa [%g1 + %g3] ASI, %i6; \
617 lduwa [%g1 + %g5] ASI, %i7; \ 623 lduwa [%g1 + %g5] ASI, %i7; \
618 restored; \ 624 restored; \
619 retry; nop; nop; nop; nop; \ 625 retry; nop; nop; \
620 b,a,pt %xcc, fill_fixup_dax; \ 626 b,a,pt %xcc, fill_fixup_dax; \
621 b,a,pt %xcc, fill_fixup_mna; \ 627 b,a,pt %xcc, fill_fixup_mna; \
622 b,a,pt %xcc, fill_fixup; 628 b,a,pt %xcc, fill_fixup;
623 629
624#define FILL_2_GENERIC_RTRAP \ 630#define FILL_2_GENERIC_RTRAP \
625user_rtt_fill_32bit: \ 631user_rtt_fill_32bit: \
626 srl %sp, 0, %sp; \ 632 and %sp, 1, %g3; \
633 brnz,pn %g3, user_rtt_fill_64bit; \
634 srl %sp, 0, %sp; \
627 lduwa [%sp + 0x00] %asi, %l0; \ 635 lduwa [%sp + 0x00] %asi, %l0; \
628 lduwa [%sp + 0x04] %asi, %l1; \ 636 lduwa [%sp + 0x04] %asi, %l1; \
629 lduwa [%sp + 0x08] %asi, %l2; \ 637 lduwa [%sp + 0x08] %asi, %l2; \
@@ -643,7 +651,7 @@ user_rtt_fill_32bit: \
643 ba,pt %xcc, user_rtt_pre_restore; \ 651 ba,pt %xcc, user_rtt_pre_restore; \
644 restored; \ 652 restored; \
645 nop; nop; nop; nop; nop; \ 653 nop; nop; nop; nop; nop; \
646 nop; nop; nop; nop; nop; \ 654 nop; nop; nop; \
647 ba,a,pt %xcc, user_rtt_fill_fixup; \ 655 ba,a,pt %xcc, user_rtt_fill_fixup; \
648 ba,a,pt %xcc, user_rtt_fill_fixup; \ 656 ba,a,pt %xcc, user_rtt_fill_fixup; \
649 ba,a,pt %xcc, user_rtt_fill_fixup; 657 ba,a,pt %xcc, user_rtt_fill_fixup;
diff --git a/arch/sparc/include/uapi/asm/unistd.h b/arch/sparc/include/uapi/asm/unistd.h
index 8974ef7ae920..cac719d1bc5c 100644
--- a/arch/sparc/include/uapi/asm/unistd.h
+++ b/arch/sparc/include/uapi/asm/unistd.h
@@ -405,8 +405,13 @@
405#define __NR_setns 337 405#define __NR_setns 337
406#define __NR_process_vm_readv 338 406#define __NR_process_vm_readv 338
407#define __NR_process_vm_writev 339 407#define __NR_process_vm_writev 339
408#define __NR_kern_features 340
409#define __NR_kcmp 341
408 410
409#define NR_syscalls 340 411#define NR_syscalls 342
412
413/* Bitmask values returned from kern_features system call. */
414#define KERN_FEATURE_MIXED_MODE_STACK 0x00000001
410 415
411#ifdef __32bit_syscall_numbers__ 416#ifdef __32bit_syscall_numbers__
412/* Sparc 32-bit only has the "setresuid32", "getresuid32" variants, 417/* Sparc 32-bit only has the "setresuid32", "getresuid32" variants,
diff --git a/arch/sparc/kernel/entry.h b/arch/sparc/kernel/entry.h
index 0c218e4c0881..cc3c5cb47cda 100644
--- a/arch/sparc/kernel/entry.h
+++ b/arch/sparc/kernel/entry.h
@@ -59,6 +59,13 @@ struct popc_6insn_patch_entry {
59extern struct popc_6insn_patch_entry __popc_6insn_patch, 59extern struct popc_6insn_patch_entry __popc_6insn_patch,
60 __popc_6insn_patch_end; 60 __popc_6insn_patch_end;
61 61
62struct pause_patch_entry {
63 unsigned int addr;
64 unsigned int insns[3];
65};
66extern struct pause_patch_entry __pause_3insn_patch,
67 __pause_3insn_patch_end;
68
62extern void __init per_cpu_patch(void); 69extern void __init per_cpu_patch(void);
63extern void sun4v_patch_1insn_range(struct sun4v_1insn_patch_entry *, 70extern void sun4v_patch_1insn_range(struct sun4v_1insn_patch_entry *,
64 struct sun4v_1insn_patch_entry *); 71 struct sun4v_1insn_patch_entry *);
diff --git a/arch/sparc/kernel/leon_kernel.c b/arch/sparc/kernel/leon_kernel.c
index f8b6eee40bde..87f60ee65433 100644
--- a/arch/sparc/kernel/leon_kernel.c
+++ b/arch/sparc/kernel/leon_kernel.c
@@ -56,11 +56,13 @@ static inline unsigned int leon_eirq_get(int cpu)
56static void leon_handle_ext_irq(unsigned int irq, struct irq_desc *desc) 56static void leon_handle_ext_irq(unsigned int irq, struct irq_desc *desc)
57{ 57{
58 unsigned int eirq; 58 unsigned int eirq;
59 struct irq_bucket *p;
59 int cpu = sparc_leon3_cpuid(); 60 int cpu = sparc_leon3_cpuid();
60 61
61 eirq = leon_eirq_get(cpu); 62 eirq = leon_eirq_get(cpu);
62 if ((eirq & 0x10) && irq_map[eirq]->irq) /* bit4 tells if IRQ happened */ 63 p = irq_map[eirq];
63 generic_handle_irq(irq_map[eirq]->irq); 64 if ((eirq & 0x10) && p && p->irq) /* bit4 tells if IRQ happened */
65 generic_handle_irq(p->irq);
64} 66}
65 67
66/* The extended IRQ controller has been found, this function registers it */ 68/* The extended IRQ controller has been found, this function registers it */
diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c
index 885a8af74064..b5c38faa4ead 100644
--- a/arch/sparc/kernel/perf_event.c
+++ b/arch/sparc/kernel/perf_event.c
@@ -1762,15 +1762,25 @@ static void perf_callchain_user_32(struct perf_callchain_entry *entry,
1762 1762
1763 ufp = regs->u_regs[UREG_I6] & 0xffffffffUL; 1763 ufp = regs->u_regs[UREG_I6] & 0xffffffffUL;
1764 do { 1764 do {
1765 struct sparc_stackf32 *usf, sf;
1766 unsigned long pc; 1765 unsigned long pc;
1767 1766
1768 usf = (struct sparc_stackf32 *) ufp; 1767 if (thread32_stack_is_64bit(ufp)) {
1769 if (__copy_from_user_inatomic(&sf, usf, sizeof(sf))) 1768 struct sparc_stackf *usf, sf;
1770 break;
1771 1769
1772 pc = sf.callers_pc; 1770 ufp += STACK_BIAS;
1773 ufp = (unsigned long)sf.fp; 1771 usf = (struct sparc_stackf *) ufp;
1772 if (__copy_from_user_inatomic(&sf, usf, sizeof(sf)))
1773 break;
1774 pc = sf.callers_pc & 0xffffffff;
1775 ufp = ((unsigned long) sf.fp) & 0xffffffff;
1776 } else {
1777 struct sparc_stackf32 *usf, sf;
1778 usf = (struct sparc_stackf32 *) ufp;
1779 if (__copy_from_user_inatomic(&sf, usf, sizeof(sf)))
1780 break;
1781 pc = sf.callers_pc;
1782 ufp = (unsigned long)sf.fp;
1783 }
1774 perf_callchain_store(entry, pc); 1784 perf_callchain_store(entry, pc);
1775 } while (entry->nr < PERF_MAX_STACK_DEPTH); 1785 } while (entry->nr < PERF_MAX_STACK_DEPTH);
1776} 1786}
diff --git a/arch/sparc/kernel/process_64.c b/arch/sparc/kernel/process_64.c
index d778248ef3f8..c6e0c2910043 100644
--- a/arch/sparc/kernel/process_64.c
+++ b/arch/sparc/kernel/process_64.c
@@ -452,13 +452,16 @@ void flush_thread(void)
452/* It's a bit more tricky when 64-bit tasks are involved... */ 452/* It's a bit more tricky when 64-bit tasks are involved... */
453static unsigned long clone_stackframe(unsigned long csp, unsigned long psp) 453static unsigned long clone_stackframe(unsigned long csp, unsigned long psp)
454{ 454{
455 bool stack_64bit = test_thread_64bit_stack(psp);
455 unsigned long fp, distance, rval; 456 unsigned long fp, distance, rval;
456 457
457 if (!(test_thread_flag(TIF_32BIT))) { 458 if (stack_64bit) {
458 csp += STACK_BIAS; 459 csp += STACK_BIAS;
459 psp += STACK_BIAS; 460 psp += STACK_BIAS;
460 __get_user(fp, &(((struct reg_window __user *)psp)->ins[6])); 461 __get_user(fp, &(((struct reg_window __user *)psp)->ins[6]));
461 fp += STACK_BIAS; 462 fp += STACK_BIAS;
463 if (test_thread_flag(TIF_32BIT))
464 fp &= 0xffffffff;
462 } else 465 } else
463 __get_user(fp, &(((struct reg_window32 __user *)psp)->ins[6])); 466 __get_user(fp, &(((struct reg_window32 __user *)psp)->ins[6]));
464 467
@@ -472,7 +475,7 @@ static unsigned long clone_stackframe(unsigned long csp, unsigned long psp)
472 rval = (csp - distance); 475 rval = (csp - distance);
473 if (copy_in_user((void __user *) rval, (void __user *) psp, distance)) 476 if (copy_in_user((void __user *) rval, (void __user *) psp, distance))
474 rval = 0; 477 rval = 0;
475 else if (test_thread_flag(TIF_32BIT)) { 478 else if (!stack_64bit) {
476 if (put_user(((u32)csp), 479 if (put_user(((u32)csp),
477 &(((struct reg_window32 __user *)rval)->ins[6]))) 480 &(((struct reg_window32 __user *)rval)->ins[6])))
478 rval = 0; 481 rval = 0;
@@ -507,18 +510,18 @@ void synchronize_user_stack(void)
507 510
508 flush_user_windows(); 511 flush_user_windows();
509 if ((window = get_thread_wsaved()) != 0) { 512 if ((window = get_thread_wsaved()) != 0) {
510 int winsize = sizeof(struct reg_window);
511 int bias = 0;
512
513 if (test_thread_flag(TIF_32BIT))
514 winsize = sizeof(struct reg_window32);
515 else
516 bias = STACK_BIAS;
517
518 window -= 1; 513 window -= 1;
519 do { 514 do {
520 unsigned long sp = (t->rwbuf_stkptrs[window] + bias);
521 struct reg_window *rwin = &t->reg_window[window]; 515 struct reg_window *rwin = &t->reg_window[window];
516 int winsize = sizeof(struct reg_window);
517 unsigned long sp;
518
519 sp = t->rwbuf_stkptrs[window];
520
521 if (test_thread_64bit_stack(sp))
522 sp += STACK_BIAS;
523 else
524 winsize = sizeof(struct reg_window32);
522 525
523 if (!copy_to_user((char __user *)sp, rwin, winsize)) { 526 if (!copy_to_user((char __user *)sp, rwin, winsize)) {
524 shift_window_buffer(window, get_thread_wsaved() - 1, t); 527 shift_window_buffer(window, get_thread_wsaved() - 1, t);
@@ -544,13 +547,6 @@ void fault_in_user_windows(void)
544{ 547{
545 struct thread_info *t = current_thread_info(); 548 struct thread_info *t = current_thread_info();
546 unsigned long window; 549 unsigned long window;
547 int winsize = sizeof(struct reg_window);
548 int bias = 0;
549
550 if (test_thread_flag(TIF_32BIT))
551 winsize = sizeof(struct reg_window32);
552 else
553 bias = STACK_BIAS;
554 550
555 flush_user_windows(); 551 flush_user_windows();
556 window = get_thread_wsaved(); 552 window = get_thread_wsaved();
@@ -558,8 +554,16 @@ void fault_in_user_windows(void)
558 if (likely(window != 0)) { 554 if (likely(window != 0)) {
559 window -= 1; 555 window -= 1;
560 do { 556 do {
561 unsigned long sp = (t->rwbuf_stkptrs[window] + bias);
562 struct reg_window *rwin = &t->reg_window[window]; 557 struct reg_window *rwin = &t->reg_window[window];
558 int winsize = sizeof(struct reg_window);
559 unsigned long sp;
560
561 sp = t->rwbuf_stkptrs[window];
562
563 if (test_thread_64bit_stack(sp))
564 sp += STACK_BIAS;
565 else
566 winsize = sizeof(struct reg_window32);
563 567
564 if (unlikely(sp & 0x7UL)) 568 if (unlikely(sp & 0x7UL))
565 stack_unaligned(sp); 569 stack_unaligned(sp);
diff --git a/arch/sparc/kernel/ptrace_64.c b/arch/sparc/kernel/ptrace_64.c
index 484dabac7045..7ff45e4ba681 100644
--- a/arch/sparc/kernel/ptrace_64.c
+++ b/arch/sparc/kernel/ptrace_64.c
@@ -151,7 +151,7 @@ static int regwindow64_get(struct task_struct *target,
151{ 151{
152 unsigned long rw_addr = regs->u_regs[UREG_I6]; 152 unsigned long rw_addr = regs->u_regs[UREG_I6];
153 153
154 if (test_tsk_thread_flag(current, TIF_32BIT)) { 154 if (!test_thread_64bit_stack(rw_addr)) {
155 struct reg_window32 win32; 155 struct reg_window32 win32;
156 int i; 156 int i;
157 157
@@ -176,7 +176,7 @@ static int regwindow64_set(struct task_struct *target,
176{ 176{
177 unsigned long rw_addr = regs->u_regs[UREG_I6]; 177 unsigned long rw_addr = regs->u_regs[UREG_I6];
178 178
179 if (test_tsk_thread_flag(current, TIF_32BIT)) { 179 if (!test_thread_64bit_stack(rw_addr)) {
180 struct reg_window32 win32; 180 struct reg_window32 win32;
181 int i; 181 int i;
182 182
diff --git a/arch/sparc/kernel/setup_64.c b/arch/sparc/kernel/setup_64.c
index 0800e71d8a88..0eaf0059aaef 100644
--- a/arch/sparc/kernel/setup_64.c
+++ b/arch/sparc/kernel/setup_64.c
@@ -316,6 +316,25 @@ static void __init popc_patch(void)
316 } 316 }
317} 317}
318 318
319static void __init pause_patch(void)
320{
321 struct pause_patch_entry *p;
322
323 p = &__pause_3insn_patch;
324 while (p < &__pause_3insn_patch_end) {
325 unsigned long i, addr = p->addr;
326
327 for (i = 0; i < 3; i++) {
328 *(unsigned int *) (addr + (i * 4)) = p->insns[i];
329 wmb();
330 __asm__ __volatile__("flush %0"
331 : : "r" (addr + (i * 4)));
332 }
333
334 p++;
335 }
336}
337
319#ifdef CONFIG_SMP 338#ifdef CONFIG_SMP
320void __init boot_cpu_id_too_large(int cpu) 339void __init boot_cpu_id_too_large(int cpu)
321{ 340{
@@ -528,6 +547,8 @@ static void __init init_sparc64_elf_hwcap(void)
528 547
529 if (sparc64_elf_hwcap & AV_SPARC_POPC) 548 if (sparc64_elf_hwcap & AV_SPARC_POPC)
530 popc_patch(); 549 popc_patch();
550 if (sparc64_elf_hwcap & AV_SPARC_PAUSE)
551 pause_patch();
531} 552}
532 553
533void __init setup_arch(char **cmdline_p) 554void __init setup_arch(char **cmdline_p)
diff --git a/arch/sparc/kernel/sys_sparc_64.c b/arch/sparc/kernel/sys_sparc_64.c
index 11c6c9603e71..878ef3d5fec5 100644
--- a/arch/sparc/kernel/sys_sparc_64.c
+++ b/arch/sparc/kernel/sys_sparc_64.c
@@ -751,3 +751,8 @@ int kernel_execve(const char *filename,
751 : "cc"); 751 : "cc");
752 return __res; 752 return __res;
753} 753}
754
755asmlinkage long sys_kern_features(void)
756{
757 return KERN_FEATURE_MIXED_MODE_STACK;
758}
diff --git a/arch/sparc/kernel/systbls_32.S b/arch/sparc/kernel/systbls_32.S
index 63402f9e9f51..5147f574f125 100644
--- a/arch/sparc/kernel/systbls_32.S
+++ b/arch/sparc/kernel/systbls_32.S
@@ -85,3 +85,4 @@ sys_call_table:
85/*325*/ .long sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open, sys_recvmmsg, sys_fanotify_init 85/*325*/ .long sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open, sys_recvmmsg, sys_fanotify_init
86/*330*/ .long sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime 86/*330*/ .long sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime
87/*335*/ .long sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev 87/*335*/ .long sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev
88/*340*/ .long sys_ni_syscall, sys_kcmp
diff --git a/arch/sparc/kernel/systbls_64.S b/arch/sparc/kernel/systbls_64.S
index 3a58e0d66f51..1c9af9fa38e9 100644
--- a/arch/sparc/kernel/systbls_64.S
+++ b/arch/sparc/kernel/systbls_64.S
@@ -86,6 +86,7 @@ sys_call_table32:
86 .word compat_sys_pwritev, compat_sys_rt_tgsigqueueinfo, sys_perf_event_open, compat_sys_recvmmsg, sys_fanotify_init 86 .word compat_sys_pwritev, compat_sys_rt_tgsigqueueinfo, sys_perf_event_open, compat_sys_recvmmsg, sys_fanotify_init
87/*330*/ .word sys32_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, compat_sys_open_by_handle_at, compat_sys_clock_adjtime 87/*330*/ .word sys32_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, compat_sys_open_by_handle_at, compat_sys_clock_adjtime
88 .word sys_syncfs, compat_sys_sendmmsg, sys_setns, compat_sys_process_vm_readv, compat_sys_process_vm_writev 88 .word sys_syncfs, compat_sys_sendmmsg, sys_setns, compat_sys_process_vm_readv, compat_sys_process_vm_writev
89/*340*/ .word sys_kern_features, sys_kcmp
89 90
90#endif /* CONFIG_COMPAT */ 91#endif /* CONFIG_COMPAT */
91 92
@@ -163,3 +164,4 @@ sys_call_table:
163 .word sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open, sys_recvmmsg, sys_fanotify_init 164 .word sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open, sys_recvmmsg, sys_fanotify_init
164/*330*/ .word sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime 165/*330*/ .word sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime
165 .word sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev 166 .word sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev
167/*340*/ .word sys_kern_features, sys_kcmp
diff --git a/arch/sparc/kernel/unaligned_64.c b/arch/sparc/kernel/unaligned_64.c
index f81d038f7340..8201c25e7669 100644
--- a/arch/sparc/kernel/unaligned_64.c
+++ b/arch/sparc/kernel/unaligned_64.c
@@ -113,21 +113,24 @@ static inline long sign_extend_imm13(long imm)
113 113
114static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs) 114static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
115{ 115{
116 unsigned long value; 116 unsigned long value, fp;
117 117
118 if (reg < 16) 118 if (reg < 16)
119 return (!reg ? 0 : regs->u_regs[reg]); 119 return (!reg ? 0 : regs->u_regs[reg]);
120
121 fp = regs->u_regs[UREG_FP];
122
120 if (regs->tstate & TSTATE_PRIV) { 123 if (regs->tstate & TSTATE_PRIV) {
121 struct reg_window *win; 124 struct reg_window *win;
122 win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS); 125 win = (struct reg_window *)(fp + STACK_BIAS);
123 value = win->locals[reg - 16]; 126 value = win->locals[reg - 16];
124 } else if (test_thread_flag(TIF_32BIT)) { 127 } else if (!test_thread_64bit_stack(fp)) {
125 struct reg_window32 __user *win32; 128 struct reg_window32 __user *win32;
126 win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); 129 win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp));
127 get_user(value, &win32->locals[reg - 16]); 130 get_user(value, &win32->locals[reg - 16]);
128 } else { 131 } else {
129 struct reg_window __user *win; 132 struct reg_window __user *win;
130 win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS); 133 win = (struct reg_window __user *)(fp + STACK_BIAS);
131 get_user(value, &win->locals[reg - 16]); 134 get_user(value, &win->locals[reg - 16]);
132 } 135 }
133 return value; 136 return value;
@@ -135,19 +138,24 @@ static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
135 138
136static unsigned long *fetch_reg_addr(unsigned int reg, struct pt_regs *regs) 139static unsigned long *fetch_reg_addr(unsigned int reg, struct pt_regs *regs)
137{ 140{
141 unsigned long fp;
142
138 if (reg < 16) 143 if (reg < 16)
139 return &regs->u_regs[reg]; 144 return &regs->u_regs[reg];
145
146 fp = regs->u_regs[UREG_FP];
147
140 if (regs->tstate & TSTATE_PRIV) { 148 if (regs->tstate & TSTATE_PRIV) {
141 struct reg_window *win; 149 struct reg_window *win;
142 win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS); 150 win = (struct reg_window *)(fp + STACK_BIAS);
143 return &win->locals[reg - 16]; 151 return &win->locals[reg - 16];
144 } else if (test_thread_flag(TIF_32BIT)) { 152 } else if (!test_thread_64bit_stack(fp)) {
145 struct reg_window32 *win32; 153 struct reg_window32 *win32;
146 win32 = (struct reg_window32 *)((unsigned long)((u32)regs->u_regs[UREG_FP])); 154 win32 = (struct reg_window32 *)((unsigned long)((u32)fp));
147 return (unsigned long *)&win32->locals[reg - 16]; 155 return (unsigned long *)&win32->locals[reg - 16];
148 } else { 156 } else {
149 struct reg_window *win; 157 struct reg_window *win;
150 win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS); 158 win = (struct reg_window *)(fp + STACK_BIAS);
151 return &win->locals[reg - 16]; 159 return &win->locals[reg - 16];
152 } 160 }
153} 161}
@@ -392,13 +400,15 @@ int handle_popc(u32 insn, struct pt_regs *regs)
392 if (rd) 400 if (rd)
393 regs->u_regs[rd] = ret; 401 regs->u_regs[rd] = ret;
394 } else { 402 } else {
395 if (test_thread_flag(TIF_32BIT)) { 403 unsigned long fp = regs->u_regs[UREG_FP];
404
405 if (!test_thread_64bit_stack(fp)) {
396 struct reg_window32 __user *win32; 406 struct reg_window32 __user *win32;
397 win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); 407 win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp));
398 put_user(ret, &win32->locals[rd - 16]); 408 put_user(ret, &win32->locals[rd - 16]);
399 } else { 409 } else {
400 struct reg_window __user *win; 410 struct reg_window __user *win;
401 win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS); 411 win = (struct reg_window __user *)(fp + STACK_BIAS);
402 put_user(ret, &win->locals[rd - 16]); 412 put_user(ret, &win->locals[rd - 16]);
403 } 413 }
404 } 414 }
@@ -554,7 +564,7 @@ void handle_ld_nf(u32 insn, struct pt_regs *regs)
554 reg[0] = 0; 564 reg[0] = 0;
555 if ((insn & 0x780000) == 0x180000) 565 if ((insn & 0x780000) == 0x180000)
556 reg[1] = 0; 566 reg[1] = 0;
557 } else if (test_thread_flag(TIF_32BIT)) { 567 } else if (!test_thread_64bit_stack(regs->u_regs[UREG_FP])) {
558 put_user(0, (int __user *) reg); 568 put_user(0, (int __user *) reg);
559 if ((insn & 0x780000) == 0x180000) 569 if ((insn & 0x780000) == 0x180000)
560 put_user(0, ((int __user *) reg) + 1); 570 put_user(0, ((int __user *) reg) + 1);
diff --git a/arch/sparc/kernel/visemul.c b/arch/sparc/kernel/visemul.c
index 08e074b7eb6a..c096c624ac4d 100644
--- a/arch/sparc/kernel/visemul.c
+++ b/arch/sparc/kernel/visemul.c
@@ -149,21 +149,24 @@ static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2,
149 149
150static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs) 150static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
151{ 151{
152 unsigned long value; 152 unsigned long value, fp;
153 153
154 if (reg < 16) 154 if (reg < 16)
155 return (!reg ? 0 : regs->u_regs[reg]); 155 return (!reg ? 0 : regs->u_regs[reg]);
156
157 fp = regs->u_regs[UREG_FP];
158
156 if (regs->tstate & TSTATE_PRIV) { 159 if (regs->tstate & TSTATE_PRIV) {
157 struct reg_window *win; 160 struct reg_window *win;
158 win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS); 161 win = (struct reg_window *)(fp + STACK_BIAS);
159 value = win->locals[reg - 16]; 162 value = win->locals[reg - 16];
160 } else if (test_thread_flag(TIF_32BIT)) { 163 } else if (!test_thread_64bit_stack(fp)) {
161 struct reg_window32 __user *win32; 164 struct reg_window32 __user *win32;
162 win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); 165 win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp));
163 get_user(value, &win32->locals[reg - 16]); 166 get_user(value, &win32->locals[reg - 16]);
164 } else { 167 } else {
165 struct reg_window __user *win; 168 struct reg_window __user *win;
166 win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS); 169 win = (struct reg_window __user *)(fp + STACK_BIAS);
167 get_user(value, &win->locals[reg - 16]); 170 get_user(value, &win->locals[reg - 16]);
168 } 171 }
169 return value; 172 return value;
@@ -172,16 +175,18 @@ static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
172static inline unsigned long __user *__fetch_reg_addr_user(unsigned int reg, 175static inline unsigned long __user *__fetch_reg_addr_user(unsigned int reg,
173 struct pt_regs *regs) 176 struct pt_regs *regs)
174{ 177{
178 unsigned long fp = regs->u_regs[UREG_FP];
179
175 BUG_ON(reg < 16); 180 BUG_ON(reg < 16);
176 BUG_ON(regs->tstate & TSTATE_PRIV); 181 BUG_ON(regs->tstate & TSTATE_PRIV);
177 182
178 if (test_thread_flag(TIF_32BIT)) { 183 if (!test_thread_64bit_stack(fp)) {
179 struct reg_window32 __user *win32; 184 struct reg_window32 __user *win32;
180 win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); 185 win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp));
181 return (unsigned long __user *)&win32->locals[reg - 16]; 186 return (unsigned long __user *)&win32->locals[reg - 16];
182 } else { 187 } else {
183 struct reg_window __user *win; 188 struct reg_window __user *win;
184 win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS); 189 win = (struct reg_window __user *)(fp + STACK_BIAS);
185 return &win->locals[reg - 16]; 190 return &win->locals[reg - 16];
186 } 191 }
187} 192}
@@ -204,7 +209,7 @@ static void store_reg(struct pt_regs *regs, unsigned long val, unsigned long rd)
204 } else { 209 } else {
205 unsigned long __user *rd_user = __fetch_reg_addr_user(rd, regs); 210 unsigned long __user *rd_user = __fetch_reg_addr_user(rd, regs);
206 211
207 if (test_thread_flag(TIF_32BIT)) 212 if (!test_thread_64bit_stack(regs->u_regs[UREG_FP]))
208 __put_user((u32)val, (u32 __user *)rd_user); 213 __put_user((u32)val, (u32 __user *)rd_user);
209 else 214 else
210 __put_user(val, rd_user); 215 __put_user(val, rd_user);
diff --git a/arch/sparc/kernel/vmlinux.lds.S b/arch/sparc/kernel/vmlinux.lds.S
index 89c2c29f154b..0bacceb19150 100644
--- a/arch/sparc/kernel/vmlinux.lds.S
+++ b/arch/sparc/kernel/vmlinux.lds.S
@@ -132,6 +132,11 @@ SECTIONS
132 *(.popc_6insn_patch) 132 *(.popc_6insn_patch)
133 __popc_6insn_patch_end = .; 133 __popc_6insn_patch_end = .;
134 } 134 }
135 .pause_3insn_patch : {
136 __pause_3insn_patch = .;
137 *(.pause_3insn_patch)
138 __pause_3insn_patch_end = .;
139 }
135 PERCPU_SECTION(SMP_CACHE_BYTES) 140 PERCPU_SECTION(SMP_CACHE_BYTES)
136 141
137 . = ALIGN(PAGE_SIZE); 142 . = ALIGN(PAGE_SIZE);
diff --git a/arch/sparc/kernel/winfixup.S b/arch/sparc/kernel/winfixup.S
index a6b0863c27df..1e67ce958369 100644
--- a/arch/sparc/kernel/winfixup.S
+++ b/arch/sparc/kernel/winfixup.S
@@ -43,6 +43,8 @@ spill_fixup_mna:
43spill_fixup_dax: 43spill_fixup_dax:
44 TRAP_LOAD_THREAD_REG(%g6, %g1) 44 TRAP_LOAD_THREAD_REG(%g6, %g1)
45 ldx [%g6 + TI_FLAGS], %g1 45 ldx [%g6 + TI_FLAGS], %g1
46 andcc %sp, 0x1, %g0
47 movne %icc, 0, %g1
46 andcc %g1, _TIF_32BIT, %g0 48 andcc %g1, _TIF_32BIT, %g0
47 ldub [%g6 + TI_WSAVED], %g1 49 ldub [%g6 + TI_WSAVED], %g1
48 sll %g1, 3, %g3 50 sll %g1, 3, %g3
diff --git a/arch/sparc/lib/atomic_64.S b/arch/sparc/lib/atomic_64.S
index 4d502da3de78..85c233d0a340 100644
--- a/arch/sparc/lib/atomic_64.S
+++ b/arch/sparc/lib/atomic_64.S
@@ -1,6 +1,6 @@
1/* atomic.S: These things are too big to do inline. 1/* atomic.S: These things are too big to do inline.
2 * 2 *
3 * Copyright (C) 1999, 2007 David S. Miller (davem@davemloft.net) 3 * Copyright (C) 1999, 2007 2012 David S. Miller (davem@davemloft.net)
4 */ 4 */
5 5
6#include <linux/linkage.h> 6#include <linux/linkage.h>
@@ -117,3 +117,17 @@ ENTRY(atomic64_sub_ret) /* %o0 = decrement, %o1 = atomic_ptr */
117 sub %g1, %o0, %o0 117 sub %g1, %o0, %o0
1182: BACKOFF_SPIN(%o2, %o3, 1b) 1182: BACKOFF_SPIN(%o2, %o3, 1b)
119ENDPROC(atomic64_sub_ret) 119ENDPROC(atomic64_sub_ret)
120
121ENTRY(atomic64_dec_if_positive) /* %o0 = atomic_ptr */
122 BACKOFF_SETUP(%o2)
1231: ldx [%o0], %g1
124 brlez,pn %g1, 3f
125 sub %g1, 1, %g7
126 casx [%o0], %g1, %g7
127 cmp %g1, %g7
128 bne,pn %xcc, BACKOFF_LABEL(2f, 1b)
129 nop
1303: retl
131 sub %g1, 1, %o0
1322: BACKOFF_SPIN(%o2, %o3, 1b)
133ENDPROC(atomic64_dec_if_positive)
diff --git a/arch/sparc/lib/ksyms.c b/arch/sparc/lib/ksyms.c
index ee31b884c61b..0c4e35e522fa 100644
--- a/arch/sparc/lib/ksyms.c
+++ b/arch/sparc/lib/ksyms.c
@@ -116,6 +116,7 @@ EXPORT_SYMBOL(atomic64_add);
116EXPORT_SYMBOL(atomic64_add_ret); 116EXPORT_SYMBOL(atomic64_add_ret);
117EXPORT_SYMBOL(atomic64_sub); 117EXPORT_SYMBOL(atomic64_sub);
118EXPORT_SYMBOL(atomic64_sub_ret); 118EXPORT_SYMBOL(atomic64_sub_ret);
119EXPORT_SYMBOL(atomic64_dec_if_positive);
119 120
120/* Atomic bit operations. */ 121/* Atomic bit operations. */
121EXPORT_SYMBOL(test_and_set_bit); 122EXPORT_SYMBOL(test_and_set_bit);
diff --git a/arch/sparc/math-emu/math_64.c b/arch/sparc/math-emu/math_64.c
index 1704068da928..034aadbff036 100644
--- a/arch/sparc/math-emu/math_64.c
+++ b/arch/sparc/math-emu/math_64.c
@@ -320,7 +320,7 @@ int do_mathemu(struct pt_regs *regs, struct fpustate *f, bool illegal_insn_trap)
320 XR = 0; 320 XR = 0;
321 else if (freg < 16) 321 else if (freg < 16)
322 XR = regs->u_regs[freg]; 322 XR = regs->u_regs[freg];
323 else if (test_thread_flag(TIF_32BIT)) { 323 else if (!test_thread_64bit_stack(regs->u_regs[UREG_FP])) {
324 struct reg_window32 __user *win32; 324 struct reg_window32 __user *win32;
325 flushw_user (); 325 flushw_user ();
326 win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); 326 win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
diff --git a/arch/x86/include/asm/xen/hypercall.h b/arch/x86/include/asm/xen/hypercall.h
index 59c226d120cd..c20d1ce62dc6 100644
--- a/arch/x86/include/asm/xen/hypercall.h
+++ b/arch/x86/include/asm/xen/hypercall.h
@@ -359,18 +359,14 @@ HYPERVISOR_update_va_mapping(unsigned long va, pte_t new_val,
359 return _hypercall4(int, update_va_mapping, va, 359 return _hypercall4(int, update_va_mapping, va,
360 new_val.pte, new_val.pte >> 32, flags); 360 new_val.pte, new_val.pte >> 32, flags);
361} 361}
362extern int __must_check xen_event_channel_op_compat(int, void *);
362 363
363static inline int 364static inline int
364HYPERVISOR_event_channel_op(int cmd, void *arg) 365HYPERVISOR_event_channel_op(int cmd, void *arg)
365{ 366{
366 int rc = _hypercall2(int, event_channel_op, cmd, arg); 367 int rc = _hypercall2(int, event_channel_op, cmd, arg);
367 if (unlikely(rc == -ENOSYS)) { 368 if (unlikely(rc == -ENOSYS))
368 struct evtchn_op op; 369 rc = xen_event_channel_op_compat(cmd, arg);
369 op.cmd = cmd;
370 memcpy(&op.u, arg, sizeof(op.u));
371 rc = _hypercall1(int, event_channel_op_compat, &op);
372 memcpy(arg, &op.u, sizeof(op.u));
373 }
374 return rc; 370 return rc;
375} 371}
376 372
@@ -386,17 +382,14 @@ HYPERVISOR_console_io(int cmd, int count, char *str)
386 return _hypercall3(int, console_io, cmd, count, str); 382 return _hypercall3(int, console_io, cmd, count, str);
387} 383}
388 384
385extern int __must_check HYPERVISOR_physdev_op_compat(int, void *);
386
389static inline int 387static inline int
390HYPERVISOR_physdev_op(int cmd, void *arg) 388HYPERVISOR_physdev_op(int cmd, void *arg)
391{ 389{
392 int rc = _hypercall2(int, physdev_op, cmd, arg); 390 int rc = _hypercall2(int, physdev_op, cmd, arg);
393 if (unlikely(rc == -ENOSYS)) { 391 if (unlikely(rc == -ENOSYS))
394 struct physdev_op op; 392 rc = HYPERVISOR_physdev_op_compat(cmd, arg);
395 op.cmd = cmd;
396 memcpy(&op.u, arg, sizeof(op.u));
397 rc = _hypercall1(int, physdev_op_compat, &op);
398 memcpy(arg, &op.u, sizeof(op.u));
399 }
400 return rc; 393 return rc;
401} 394}
402 395
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-18 12:13:02 -0500