132 files changed, 11620 insertions, 3886 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 744d07e69602..960d5a54aec3 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -876,7 +876,7 @@ config LEDS
                    ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
                    ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
                    ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
-                   ARCH_AT91 || MACH_TRIZEPS4 || ARCH_DAVINCI || \
+                   ARCH_AT91 || ARCH_DAVINCI || \
                    ARCH_KS8695 || MACH_RD88F5182
         help
           If you say Y here, the LEDs on your machine will be used
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index 5fe9588db077..2793447621c3 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -66,14 +66,6 @@ static void it8152_unmask_irq(unsigned int irq)
        }
 }
 
-static inline void it8152_irq(int irq)
-{
-        struct irq_desc *desc;
-
-        desc = irq_desc + irq;
-        desc_handle_irq(irq, desc);
-}
-
 static struct irq_chip it8152_irq_chip = {
         .name           = "it8152",
         .ack            = it8152_mask_irq,
@@ -128,21 +120,21 @@ void it8152_irq_demux(unsigned int irq, struct irq_desc *desc)
                bits_pd &= ((1 << IT8152_PD_IRQ_COUNT) - 1);
                while (bits_pd) {
                        i = __ffs(bits_pd);
-                       it8152_irq(IT8152_PD_IRQ(i));
+                       generic_handle_irq(IT8152_PD_IRQ(i));
                        bits_pd &= ~(1 << i);
                }
 
                bits_lp &= ((1 << IT8152_LP_IRQ_COUNT) - 1);
                while (bits_lp) {
                        i = __ffs(bits_lp);
-                       it8152_irq(IT8152_LP_IRQ(i));
+                       generic_handle_irq(IT8152_LP_IRQ(i));
                        bits_lp &= ~(1 << i);
                }
 
                bits_ld &= ((1 << IT8152_LD_IRQ_COUNT) - 1);
                while (bits_ld) {
                        i = __ffs(bits_ld);
-                       it8152_irq(IT8152_LD_IRQ(i));
+                       generic_handle_irq(IT8152_LD_IRQ(i));
                        bits_ld &= ~(1 << i);
                }
        }
diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c
index 534b23d95864..7c6b4b99a2df 100644
--- a/arch/arm/common/locomo.c
+++ b/arch/arm/common/locomo.c
@@ -169,7 +169,6 @@ static struct locomo_dev_info locomo_devices[] = {
 static void locomo_handler(unsigned int irq, struct irq_desc *desc)
 {
         int req, i;
-        struct irq_desc *d;
         void __iomem *mapbase = get_irq_chip_data(irq);
 
         /* Acknowledge the parent IRQ */
@@ -181,10 +180,9 @@ static void locomo_handler(unsigned int irq, struct irq_desc *desc)
         if (req) {
                 /* generate the next interrupt(s) */
                 irq = LOCOMO_IRQ_START;
-                d = irq_desc + irq;
-                for (i = 0; i <= 3; i++, d++, irq++) {
+                for (i = 0; i <= 3; i++, irq++) {
                         if (req & (0x0100 << i)) {
-                                desc_handle_irq(irq, d);
+                                generic_handle_irq(irq);
                         }
 
                 }
@@ -222,12 +220,10 @@ static struct irq_chip locomo_chip = {
 
 static void locomo_key_handler(unsigned int irq, struct irq_desc *desc)
 {
-        struct irq_desc *d;
         void __iomem *mapbase = get_irq_chip_data(irq);
 
         if (locomo_readl(mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC) & 0x0001) {
-                d = irq_desc + LOCOMO_IRQ_KEY_START;
-                desc_handle_irq(LOCOMO_IRQ_KEY_START, d);
+                generic_handle_irq(LOCOMO_IRQ_KEY_START);
         }
 }
 
@@ -268,7 +264,6 @@ static struct irq_chip locomo_key_chip = {
 static void locomo_gpio_handler(unsigned int irq, struct irq_desc *desc)
 {
         int req, i;
-        struct irq_desc *d;
         void __iomem *mapbase = get_irq_chip_data(irq);
 
         req =   locomo_readl(mapbase + LOCOMO_GIR) &
@@ -277,10 +272,9 @@ static void locomo_gpio_handler(unsigned int irq, struct irq_desc *desc)
 
         if (req) {
                 irq = LOCOMO_IRQ_GPIO_START;
-                d = irq_desc + LOCOMO_IRQ_GPIO_START;
-                for (i = 0; i <= 15; i++, irq++, d++) {
+                for (i = 0; i <= 15; i++, irq++) {
                         if (req & (0x0001 << i)) {
-                                desc_handle_irq(irq, d);
+                                generic_handle_irq(irq);
                         }
                 }
         }
@@ -361,12 +355,10 @@ static struct irq_chip locomo_gpio_chip = {
 
 static void locomo_lt_handler(unsigned int irq, struct irq_desc *desc)
 {
-        struct irq_desc *d;
         void __iomem *mapbase = get_irq_chip_data(irq);
 
         if (locomo_readl(mapbase + LOCOMO_LTINT) & 0x0001) {
-                d = irq_desc + LOCOMO_IRQ_LT_START;
-                desc_handle_irq(LOCOMO_IRQ_LT_START, d);
+                generic_handle_irq(LOCOMO_IRQ_LT_START);
         }
 }
 
@@ -407,17 +399,15 @@ static struct irq_chip locomo_lt_chip = {
 static void locomo_spi_handler(unsigned int irq, struct irq_desc *desc)
 {
         int req, i;
-        struct irq_desc *d;
         void __iomem *mapbase = get_irq_chip_data(irq);
 
         req = locomo_readl(mapbase + LOCOMO_SPI + LOCOMO_SPIIR) & 0x000F;
         if (req) {
                 irq = LOCOMO_IRQ_SPI_START;
-                d = irq_desc + irq;
 
-                for (i = 0; i <= 3; i++, irq++, d++) {
+                for (i = 0; i <= 3; i++, irq++) {
                         if (req & (0x0001 << i)) {
-                                desc_handle_irq(irq, d);
+                                generic_handle_irq(irq);
                         }
                 }
         }
diff --git a/arch/arm/common/sharpsl_param.c b/arch/arm/common/sharpsl_param.c
index aad4d94ba8f5..d56c932580eb 100644
--- a/arch/arm/common/sharpsl_param.c
+++ b/arch/arm/common/sharpsl_param.c
@@ -12,6 +12,7 @@
  */
 
 #include <linux/kernel.h>
+#include <linux/module.h>
 #include <linux/string.h>
 #include <asm/mach/sharpsl_param.h>
 
@@ -36,6 +37,7 @@
 #define PHAD_MAGIC      MAGIC_CHG('P','H','A','D')
 
 struct sharpsl_param_info sharpsl_param;
+EXPORT_SYMBOL(sharpsl_param);
 
 void sharpsl_save_param(void)
 {
diff --git a/arch/arm/configs/cm_x300_defconfig b/arch/arm/configs/cm_x300_defconfig
new file mode 100644
index 000000000000..46f1c9dc350c
--- /dev/null
+++ b/arch/arm/configs/cm_x300_defconfig
@@ -0,0 +1,1466 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.27-rc3
+# Tue Aug 19 11:26:54 2008
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_SUPPORTS_AOUT=y
+CONFIG_ZONE_DMA=y
+CONFIG_ARCH_MTD_XIP=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION="-cm-x300"
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=18
+# CONFIG_CGROUPS is not set
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
+# CONFIG_HAVE_IOREMAP_PROT is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_ARCH_TRACEHOOK is not set
+# CONFIG_HAVE_DMA_ATTRS is not set
+# CONFIG_USE_GENERIC_SMP_HELPERS is not set
+CONFIG_HAVE_CLK=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_CLASSIC_RCU=y
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+CONFIG_ARCH_PXA=y
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM7X00A is not set
+
+#
+# Intel PXA2xx/PXA3xx Implementations
+#
+
+#
+# Supported PXA3xx Processor Variants
+#
+CONFIG_CPU_PXA300=y
+# CONFIG_CPU_PXA310 is not set
+# CONFIG_CPU_PXA320 is not set
+# CONFIG_CPU_PXA930 is not set
+# CONFIG_ARCH_GUMSTIX is not set
+# CONFIG_ARCH_LUBBOCK is not set
+# CONFIG_MACH_LOGICPD_PXA270 is not set
+# CONFIG_MACH_MAINSTONE is not set
+# CONFIG_ARCH_PXA_IDP is not set
+# CONFIG_PXA_SHARPSL is not set
+# CONFIG_ARCH_PXA_ESERIES is not set
+# CONFIG_MACH_TRIZEPS4 is not set
+# CONFIG_MACH_EM_X270 is not set
+# CONFIG_MACH_COLIBRI is not set
+# CONFIG_MACH_ZYLONITE is not set
+# CONFIG_MACH_LITTLETON is not set
+# CONFIG_MACH_TAVOREVB is not set
+# CONFIG_MACH_SAAR is not set
+# CONFIG_MACH_ARMCORE is not set
+CONFIG_MACH_CM_X300=y
+# CONFIG_MACH_MAGICIAN is not set
+# CONFIG_MACH_PCM027 is not set
+# CONFIG_ARCH_PXA_PALM is not set
+# CONFIG_PXA_EZX is not set
+CONFIG_PXA3xx=y
+# CONFIG_PXA_PWM is not set
+
+#
+# Boot options
+#
+
+#
+# Power management
+#
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_XSC3=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5T=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+CONFIG_IO_36=y
+
+#
+# Processor Features
+#
+# CONFIG_ARM_THUMB is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_OUTER_CACHE=y
+CONFIG_CACHE_XSC3L2=y
+CONFIG_IWMMXT=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="root=/dev/mtdblock5 rootfstype=jffs2 console=ttyS2,38400"
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Frequency scaling
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+# CONFIG_CPU_FREQ_DEBUG is not set
+CONFIG_CPU_FREQ_STAT=y
+# CONFIG_CPU_FREQ_STAT_DETAILS is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_APM_EMULATION=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+CONFIG_BT=m
+CONFIG_BT_L2CAP=m
+CONFIG_BT_SCO=m
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=m
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_HIDP=m
+
+#
+# Bluetooth device drivers
+#
+CONFIG_BT_HCIUSB=m
+CONFIG_BT_HCIUSB_SCO=y
+# CONFIG_BT_HCIBTSDIO is not set
+# CONFIG_BT_HCIUART is not set
+# CONFIG_BT_HCIBCM203X is not set
+# CONFIG_BT_HCIBPA10X is not set
+# CONFIG_BT_HCIBFUSB is not set
+# CONFIG_BT_HCIVHCI is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+CONFIG_WIRELESS_EXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+# CONFIG_MAC80211 is not set
+CONFIG_IEEE80211=m
+# CONFIG_IEEE80211_DEBUG is not set
+CONFIG_IEEE80211_CRYPT_WEP=m
+CONFIG_IEEE80211_CRYPT_CCMP=m
+CONFIG_IEEE80211_CRYPT_TKIP=m
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_SHARP_SL is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+# CONFIG_MTD_NAND_H1900 is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_SHARPSL is not set
+CONFIG_MTD_NAND_PXA3xx=y
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_PHYLIB is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+# CONFIG_SMC91X is not set
+CONFIG_DM9000=y
+CONFIG_DM9000_DEBUGLEVEL=0
+CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL=y
+# CONFIG_SMC911X is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+CONFIG_WLAN_80211=y
+CONFIG_LIBERTAS=m
+# CONFIG_LIBERTAS_USB is not set
+CONFIG_LIBERTAS_SDIO=m
+# CONFIG_LIBERTAS_DEBUG is not set
+# CONFIG_USB_ZD1201 is not set
+# CONFIG_USB_NET_RNDIS_WLAN is not set
+# CONFIG_IWLWIFI_LEDS is not set
+# CONFIG_HOSTAP is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+CONFIG_KEYBOARD_PXA27x=m
+# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_UCB1400 is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_PXA=y
+CONFIG_SERIAL_PXA_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_NVRAM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+# CONFIG_I2C_CHARDEV is not set
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_PXA=y
+# CONFIG_I2C_PXA_SLAVE is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_AT24 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+CONFIG_GPIO_PCA953X=y
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_PXA=y
+# CONFIG_FB_PXA_SMARTPANEL is not set
+# CONFIG_FB_PXA_PARAMETERS is not set
+# CONFIG_FB_MBX is not set
+# CONFIG_FB_W100 is not set
+# CONFIG_FB_AM200EPD is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+CONFIG_FONTS=y
+# CONFIG_FONT_8x8 is not set
+# CONFIG_FONT_8x16 is not set
+CONFIG_FONT_6x11=y
+# CONFIG_FONT_7x14 is not set
+# CONFIG_FONT_PEARL_8x8 is not set
+# CONFIG_FONT_ACORN_8x8 is not set
+# CONFIG_FONT_MINI_4x6 is not set
+# CONFIG_FONT_SUN8x16 is not set
+# CONFIG_FONT_SUN12x22 is not set
+# CONFIG_FONT_10x18 is not set
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+CONFIG_SOUND=m
+CONFIG_SND=m
+CONFIG_SND_TIMER=m
+CONFIG_SND_PCM=m
+# CONFIG_SND_SEQUENCER is not set
+# CONFIG_SND_MIXER_OSS is not set
+# CONFIG_SND_PCM_OSS is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+CONFIG_SND_DRIVERS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+CONFIG_SND_ARM=y
+# CONFIG_SND_PXA2XX_AC97 is not set
+CONFIG_SND_USB=y
+# CONFIG_SND_USB_AUDIO is not set
+# CONFIG_SND_USB_CAIAQ is not set
+CONFIG_SND_SOC=m
+CONFIG_SND_PXA2XX_SOC=m
+# CONFIG_SOUND_PRIME is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+CONFIG_HID_DEBUG=y
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_USB_HIDINPUT_POWERBOOK is not set
+# CONFIG_HID_FF is not set
+# CONFIG_USB_HIDDEV is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_DEVICE_CLASS is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_SUSPEND is not set
+# CONFIG_USB_OTG is not set
+CONFIG_USB_MON=y
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_MUSB_HDRC is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_SIERRA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_GADGET is not set
+CONFIG_MMC=m
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD Card Drivers
+#
+CONFIG_MMC_BLOCK=m
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD Host Controller Drivers
+#
+CONFIG_MMC_PXA=m
+# CONFIG_MMC_SDHCI is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+# CONFIG_LEDS_PCA9532 is not set
+CONFIG_LEDS_GPIO=y
+# CONFIG_LEDS_PCA955X is not set
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+# CONFIG_LEDS_TRIGGER_TIMER is not set
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_SA1100=y
+# CONFIG_DMADEVICES is not set
+
+#
+# Voltage and Current regulators
+#
+# CONFIG_REGULATOR is not set
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_BQ24022 is not set
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_FS_XATTR is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+CONFIG_JFFS2_SUMMARY=y
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+CONFIG_RPCSEC_GSS_KRB5=y
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+CONFIG_CIFS=m
+# CONFIG_CIFS_STATS is not set
+CONFIG_CIFS_WEAK_PW_HASH=y
+# CONFIG_CIFS_XATTR is not set
+# CONFIG_CIFS_DEBUG2 is not set
+# CONFIG_CIFS_EXPERIMENTAL is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=m
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=m
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+# CONFIG_DETECT_SOFTLOCKUP is not set
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_HAVE_FTRACE=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+# CONFIG_FTRACE is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_DEBUG_USER=y
+# CONFIG_DEBUG_ERRORS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUG_LL=y
+# CONFIG_DEBUG_ICEDCC is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_MANAGER=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=m
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_MICHAEL_MIC=m
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=m
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=m
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+# CONFIG_CRYPTO_HW is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+# CONFIG_GENERIC_FIND_NEXT_BIT is not set
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+CONFIG_CRC_T10DIF=y
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/palmz72_defconfig b/arch/arm/configs/palmz72_defconfig
new file mode 100644
index 000000000000..3245f8f33e0a
--- /dev/null
+++ b/arch/arm/configs/palmz72_defconfig
@@ -0,0 +1,951 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.27-rc4
+# Sun Aug 24 02:29:27 2008
+#
+CONFIG_ARM=y
+CONFIG_HAVE_PWM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_SUPPORTS_AOUT=y
+CONFIG_ZONE_DMA=y
+CONFIG_ARCH_MTD_XIP=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+# CONFIG_GROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
+# CONFIG_HAVE_IOREMAP_PROT is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_ARCH_TRACEHOOK is not set
+# CONFIG_HAVE_DMA_ATTRS is not set
+# CONFIG_USE_GENERIC_SMP_HELPERS is not set
+CONFIG_HAVE_CLK=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+CONFIG_CLASSIC_RCU=y
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+CONFIG_ARCH_PXA=y
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM7X00A is not set
+
+#
+# Intel PXA2xx/PXA3xx Implementations
+#
+# CONFIG_ARCH_GUMSTIX is not set
+# CONFIG_ARCH_LUBBOCK is not set
+# CONFIG_MACH_LOGICPD_PXA270 is not set
+# CONFIG_MACH_MAINSTONE is not set
+# CONFIG_ARCH_PXA_IDP is not set
+# CONFIG_PXA_SHARPSL is not set
+# CONFIG_ARCH_PXA_ESERIES is not set
+# CONFIG_MACH_TRIZEPS4 is not set
+# CONFIG_MACH_EM_X270 is not set
+# CONFIG_MACH_COLIBRI is not set
+# CONFIG_MACH_ZYLONITE is not set
+# CONFIG_MACH_LITTLETON is not set
+# CONFIG_MACH_TAVOREVB is not set
+# CONFIG_MACH_SAAR is not set
+# CONFIG_MACH_ARMCORE is not set
+# CONFIG_MACH_MAGICIAN is not set
+# CONFIG_MACH_PCM027 is not set
+CONFIG_ARCH_PXA_PALM=y
+# CONFIG_MACH_PALMTX is not set
+CONFIG_MACH_PALMZ72=y
+# CONFIG_PXA_EZX is not set
+CONFIG_PXA27x=y
+CONFIG_PXA_PWM=y
+
+#
+# Boot options
+#
+
+#
+# Power management
+#
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_XSCALE=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5T=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_OUTER_CACHE is not set
+CONFIG_IWMMXT=y
+CONFIG_XSCALE_PMU=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_PREEMPT=y
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="mem=32M console=tty root=/dev/mmcblk0"
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_APM_EMULATION=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_NETDEVICES is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+CONFIG_KEYBOARD_PXA27x=y
+# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_PXA is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_NVRAM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+# CONFIG_I2C_CHARDEV is not set
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_PXA=y
+# CONFIG_I2C_PXA_SLAVE is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_AT24 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_PXA2XX is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_AT25 is not set
+CONFIG_SPI_SPIDEV=y
+# CONFIG_SPI_TLE62X0 is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_W1 is not set
+CONFIG_POWER_SUPPLY=y
+# CONFIG_POWER_SUPPLY_DEBUG is not set
+CONFIG_PDA_POWER=y
+# CONFIG_APM_POWER is not set
+# CONFIG_BATTERY_DS2760 is not set
+# CONFIG_HWMON is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_PXA=y
+# CONFIG_FB_PXA_SMARTPANEL is not set
+# CONFIG_FB_PXA_PARAMETERS is not set
+# CONFIG_FB_MBX is not set
+# CONFIG_FB_W100 is not set
+# CONFIG_FB_AM200EPD is not set
+# CONFIG_FB_VIRTUAL is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_BACKLIGHT_CORGI is not set
+CONFIG_BACKLIGHT_PWM=y
+
+#
+# Display device support
+#
+CONFIG_DISPLAY_SUPPORT=y
+
+#
+# Display hardware drivers
+#
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+CONFIG_FONTS=y
+CONFIG_FONT_8x8=y
+# CONFIG_FONT_8x16 is not set
+# CONFIG_FONT_6x11 is not set
+# CONFIG_FONT_7x14 is not set
+# CONFIG_FONT_PEARL_8x8 is not set
+# CONFIG_FONT_ACORN_8x8 is not set
+# CONFIG_FONT_MINI_4x6 is not set
+# CONFIG_FONT_SUN8x16 is not set
+# CONFIG_FONT_SUN12x22 is not set
+# CONFIG_FONT_10x18 is not set
+# CONFIG_LOGO is not set
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_MMC=y
+CONFIG_MMC_DEBUG=y
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD Host Controller Drivers
+#
+CONFIG_MMC_PXA=y
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MMC_SPI is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_SA1100=y
+# CONFIG_DMADEVICES is not set
+
+#
+# Voltage and Current regulators
+#
+# CONFIG_REGULATOR is not set
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_BQ24022 is not set
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=866
+CONFIG_FAT_DEFAULT_IOCHARSET="utf8"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_NETWORK_FILESYSTEMS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="utf8"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+CONFIG_NLS_CODEPAGE_866=y
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=y
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_MEMORY_INIT=y
+CONFIG_FRAME_POINTER=y
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_HAVE_FTRACE=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+# CONFIG_FTRACE is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_PREEMPT_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_DEBUG_USER=y
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+# CONFIG_GENERIC_FIND_NEXT_BIT is not set
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+CONFIG_CRC_T10DIF=y
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/viper_defconfig b/arch/arm/configs/viper_defconfig
new file mode 100644
index 000000000000..d01fecb8673e
--- /dev/null
+++ b/arch/arm/configs/viper_defconfig
@@ -0,0 +1,1678 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.27-rc4
+# Thu Aug 21 17:12:07 2008
+#
+CONFIG_ARM=y
+CONFIG_HAVE_PWM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_SUPPORTS_AOUT=y
+CONFIG_ZONE_DMA=y
+CONFIG_ARCH_MTD_XIP=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=13
+# CONFIG_CGROUPS is not set
+# CONFIG_GROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+# CONFIG_ELF_CORE is not set
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+# CONFIG_SHMEM is not set
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
+# CONFIG_HAVE_IOREMAP_PROT is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_ARCH_TRACEHOOK is not set
+# CONFIG_HAVE_DMA_ATTRS is not set
+# CONFIG_USE_GENERIC_SMP_HELPERS is not set
+CONFIG_HAVE_CLK=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_TINY_SHMEM=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_AS is not set
+CONFIG_DEFAULT_DEADLINE=y
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="deadline"
+CONFIG_CLASSIC_RCU=y
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+CONFIG_ARCH_PXA=y
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM7X00A is not set
+
+#
+# Intel PXA2xx/PXA3xx Implementations
+#
+# CONFIG_ARCH_GUMSTIX is not set
+# CONFIG_ARCH_LUBBOCK is not set
+# CONFIG_MACH_LOGICPD_PXA270 is not set
+# CONFIG_MACH_MAINSTONE is not set
+# CONFIG_ARCH_PXA_IDP is not set
+# CONFIG_PXA_SHARPSL is not set
+CONFIG_ARCH_VIPER=y
+# CONFIG_ARCH_PXA_ESERIES is not set
+# CONFIG_MACH_TRIZEPS4 is not set
+# CONFIG_MACH_EM_X270 is not set
+# CONFIG_MACH_COLIBRI is not set
+# CONFIG_MACH_ZYLONITE is not set
+# CONFIG_MACH_LITTLETON is not set
+# CONFIG_MACH_TAVOREVB is not set
+# CONFIG_MACH_SAAR is not set
+# CONFIG_MACH_ARMCORE is not set
+# CONFIG_MACH_MAGICIAN is not set
+# CONFIG_MACH_PCM027 is not set
+# CONFIG_ARCH_PXA_PALM is not set
+# CONFIG_PXA_EZX is not set
+CONFIG_PXA25x=y
+CONFIG_PXA_PWM=m
+CONFIG_PXA_HAVE_ISA_IRQS=y
+
+#
+# Boot options
+#
+
+#
+# Power management
+#
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_XSCALE=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5T=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_OUTER_CACHE is not set
+CONFIG_IWMMXT=y
+CONFIG_XSCALE_PMU=y
+
+#
+# Bus support
+#
+CONFIG_ISA=y
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_PCCARD=m
+# CONFIG_PCMCIA_DEBUG is not set
+CONFIG_PCMCIA=m
+CONFIG_PCMCIA_LOAD_CIS=y
+CONFIG_PCMCIA_IOCTL=y
+
+#
+# PC-card bridges
+#
+# CONFIG_I82365 is not set
+# CONFIG_TCIC is not set
+CONFIG_PCMCIA_PXA2XX=m
+CONFIG_PCMCIA_PROBE=y
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="root=31:02 rootfstype=jffs2 ro console=ttyS0,115200"
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Frequency scaling
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+# CONFIG_CPU_FREQ_DEBUG is not set
+CONFIG_CPU_FREQ_STAT=y
+# CONFIG_CPU_FREQ_STAT_DETAILS is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=m
+CONFIG_CPU_FREQ_GOV_USERSPACE=m
+CONFIG_CPU_FREQ_GOV_ONDEMAND=m
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
+CONFIG_CPU_FREQ_PXA=y
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_FPE_NWFPE is not set
+CONFIG_FPE_FASTFPE=y
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+# CONFIG_APM_EMULATION is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+CONFIG_BT=m
+CONFIG_BT_L2CAP=m
+# CONFIG_BT_SCO is not set
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=m
+# CONFIG_BT_BNEP_MC_FILTER is not set
+# CONFIG_BT_BNEP_PROTO_FILTER is not set
+# CONFIG_BT_HIDP is not set
+
+#
+# Bluetooth device drivers
+#
+CONFIG_BT_HCIUSB=m
+# CONFIG_BT_HCIUSB_SCO is not set
+# CONFIG_BT_HCIBTUSB is not set
+CONFIG_BT_HCIUART=m
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_BCSP=y
+# CONFIG_BT_HCIUART_LL is not set
+# CONFIG_BT_HCIBCM203X is not set
+# CONFIG_BT_HCIBPA10X is not set
+# CONFIG_BT_HCIBFUSB is not set
+# CONFIG_BT_HCIDTL1 is not set
+# CONFIG_BT_HCIBT3C is not set
+# CONFIG_BT_HCIBLUECARD is not set
+# CONFIG_BT_HCIBTUART is not set
+# CONFIG_BT_HCIVHCI is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+CONFIG_IEEE80211=m
+# CONFIG_IEEE80211_DEBUG is not set
+CONFIG_IEEE80211_CRYPT_WEP=m
+# CONFIG_IEEE80211_CRYPT_CCMP is not set
+# CONFIG_IEEE80211_CRYPT_TKIP is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=m
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_REDBOOT_PARTS=y
+CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=0
+# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
+# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=m
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_GEOMETRY=y
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+# CONFIG_MTD_CFI_I2 is not set
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+CONFIG_MTD_RAM=y
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_XIP is not set
+
+#
+# Mapping drivers for chip access
+#
+CONFIG_MTD_COMPLEX_MAPPINGS=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x8000000
+CONFIG_MTD_PHYSMAP_LEN=0
+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+CONFIG_MTD_PXA2XX=y
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_IMPA7 is not set
+# CONFIG_MTD_SHARP_SL is not set
+# CONFIG_MTD_PLATRAM is not set
+CONFIG_MTD_SPARSE_RAM=y
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+# CONFIG_PNP is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=m
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_SCSI_PROC_FS is not set
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=m
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_SCSI_AHA152X is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_IN2000 is not set
+# CONFIG_SCSI_DTC3280 is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GENERIC_NCR5380 is not set
+# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
+# CONFIG_SCSI_NCR53C406A is not set
+# CONFIG_SCSI_PAS16 is not set
+# CONFIG_SCSI_QLOGIC_FAS is not set
+# CONFIG_SCSI_SYM53C416 is not set
+# CONFIG_SCSI_T128 is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
+# CONFIG_SCSI_DH is not set
+CONFIG_ATA=m
+# CONFIG_ATA_NONSTANDARD is not set
+# CONFIG_SATA_PMP is not set
+CONFIG_ATA_SFF=y
+# CONFIG_SATA_MV is not set
+# CONFIG_PATA_LEGACY is not set
+CONFIG_PATA_PCMCIA=m
+# CONFIG_PATA_QDI is not set
+# CONFIG_PATA_WINBOND_VLB is not set
+# CONFIG_PATA_PLATFORM is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+# CONFIG_PHYLIB is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_NET_VENDOR_SMC is not set
+CONFIG_SMC91X=y
+# CONFIG_DM9000 is not set
+# CONFIG_SMC911X is not set
+# CONFIG_NET_VENDOR_RACAL is not set
+# CONFIG_AT1700 is not set
+# CONFIG_DEPCA is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_ISA is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_NET_PCI is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+CONFIG_USB_PEGASUS=m
+# CONFIG_USB_RTL8150 is not set
+CONFIG_USB_USBNET=m
+CONFIG_USB_NET_AX8817X=m
+CONFIG_USB_NET_CDCETHER=m
+# CONFIG_USB_NET_DM9601 is not set
+# CONFIG_USB_NET_GL620A is not set
+CONFIG_USB_NET_NET1080=m
+# CONFIG_USB_NET_PLUSB is not set
+# CONFIG_USB_NET_MCS7830 is not set
+# CONFIG_USB_NET_RNDIS_HOST is not set
+# CONFIG_USB_NET_CDC_SUBSET is not set
+CONFIG_USB_NET_ZAURUS=m
+CONFIG_NET_PCMCIA=y
+# CONFIG_PCMCIA_3C589 is not set
+# CONFIG_PCMCIA_3C574 is not set
+# CONFIG_PCMCIA_FMVJ18X is not set
+# CONFIG_PCMCIA_PCNET is not set
+# CONFIG_PCMCIA_NMCLAN is not set
+# CONFIG_PCMCIA_SMC91C92 is not set
+# CONFIG_PCMCIA_XIRC2PS is not set
+# CONFIG_PCMCIA_AXNET is not set
+# CONFIG_WAN is not set
+CONFIG_PPP=m
+# CONFIG_PPP_MULTILINK is not set
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_ASYNC=m
+# CONFIG_PPP_SYNC_TTY is not set
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_BSDCOMP=m
+# CONFIG_PPP_MPPE is not set
+# CONFIG_PPPOE is not set
+# CONFIG_PPPOL2TP is not set
+# CONFIG_SLIP is not set
+CONFIG_SLHC=m
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=m
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=m
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_FUJITSU=m
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+CONFIG_TOUCHSCREEN_ELO=m
+CONFIG_TOUCHSCREEN_MTOUCH=m
+CONFIG_TOUCHSCREEN_INEXIO=m
+# CONFIG_TOUCHSCREEN_MK712 is not set
+CONFIG_TOUCHSCREEN_HTCPEN=m
+CONFIG_TOUCHSCREEN_PENMOUNT=m
+CONFIG_TOUCHSCREEN_TOUCHRIGHT=m
+CONFIG_TOUCHSCREEN_TOUCHWIN=m
+# CONFIG_TOUCHSCREEN_UCB1400 is not set
+# CONFIG_TOUCHSCREEN_WM97XX is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+CONFIG_TOUCHSCREEN_TOUCHIT213=m
+CONFIG_INPUT_MISC=y
+# CONFIG_INPUT_ATI_REMOTE is not set
+# CONFIG_INPUT_ATI_REMOTE2 is not set
+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
+# CONFIG_INPUT_POWERMATE is not set
+# CONFIG_INPUT_YEALINK is not set
+CONFIG_INPUT_UINPUT=m
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_LIBPS2 is not set
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+# CONFIG_CONSOLE_TRANSLATIONS is not set
+# CONFIG_VT_CONSOLE is not set
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=m
+# CONFIG_SERIAL_8250_CS is not set
+CONFIG_SERIAL_8250_NR_UARTS=5
+CONFIG_SERIAL_8250_RUNTIME_UARTS=5
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_PXA=y
+CONFIG_SERIAL_PXA_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=m
+# CONFIG_NVRAM is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+
+#
+# PCMCIA character devices
+#
+# CONFIG_SYNCLINK_CS is not set
+# CONFIG_CARDMAN_4000 is not set
+# CONFIG_CARDMAN_4040 is not set
+# CONFIG_IPWIRELESS is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+# CONFIG_I2C_HELPER_AUTO is not set
+
+#
+# I2C Algorithms
+#
+CONFIG_I2C_ALGOBIT=y
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+CONFIG_I2C_GPIO=y
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_PXA=y
+# CONFIG_I2C_PXA_SLAVE is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_ELEKTOR is not set
+# CONFIG_I2C_PCA_ISA is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_AT24 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_AD7414 is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+# CONFIG_SA1100_WATCHDOG is not set
+
+#
+# ISA-based Watchdog Cards
+#
+# CONFIG_PCWATCHDOG is not set
+# CONFIG_MIXCOMWD is not set
+# CONFIG_WDT is not set
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+CONFIG_FB_CFB_FILLRECT=m
+CONFIG_FB_CFB_COPYAREA=m
+CONFIG_FB_CFB_IMAGEBLIT=m
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_PXA=m
+# CONFIG_FB_PXA_SMARTPANEL is not set
+CONFIG_FB_PXA_PARAMETERS=y
+# CONFIG_FB_MBX is not set
+# CONFIG_FB_W100 is not set
+# CONFIG_FB_AM200EPD is not set
+# CONFIG_FB_VIRTUAL is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=m
+# CONFIG_LCD_ILI9320 is not set
+# CONFIG_LCD_PLATFORM is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=m
+# CONFIG_BACKLIGHT_CORGI is not set
+CONFIG_BACKLIGHT_PWM=m
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=m
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+CONFIG_SOUND=m
+CONFIG_SND=m
+CONFIG_SND_TIMER=m
+CONFIG_SND_PCM=m
+# CONFIG_SND_SEQUENCER is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=m
+CONFIG_SND_PCM_OSS=m
+CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+CONFIG_SND_VMASTER=y
+CONFIG_SND_AC97_CODEC=m
+CONFIG_SND_DRIVERS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+# CONFIG_SND_AC97_POWER_SAVE is not set
+CONFIG_SND_ARM=y
+CONFIG_SND_PXA2XX_PCM=m
+CONFIG_SND_PXA2XX_AC97=m
+CONFIG_SND_USB=y
+# CONFIG_SND_USB_AUDIO is not set
+# CONFIG_SND_USB_CAIAQ is not set
+CONFIG_SND_PCMCIA=y
+# CONFIG_SND_VXPOCKET is not set
+# CONFIG_SND_PDAUDIOCF is not set
+# CONFIG_SND_SOC is not set
+# CONFIG_SOUND_PRIME is not set
+CONFIG_AC97_BUS=m
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=m
+# CONFIG_USB_HIDINPUT_POWERBOOK is not set
+# CONFIG_HID_FF is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# USB HID Boot Protocol drivers
+#
+# CONFIG_USB_KBD is not set
+# CONFIG_USB_MOUSE is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=m
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+CONFIG_USB_SUSPEND=y
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MON is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_ISP116X_HCD=m
+# CONFIG_USB_ISP1760_HCD is not set
+CONFIG_USB_SL811_HCD=m
+# CONFIG_USB_SL811_CS is not set
+CONFIG_USB_R8A66597_HCD=m
+# CONFIG_USB_MUSB_HDRC is not set
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
+
+#
+# USB Device Class drivers
+#
+CONFIG_USB_ACM=m
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=m
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_SIERRA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+CONFIG_USB_SERIAL=m
+# CONFIG_USB_EZUSB is not set
+CONFIG_USB_SERIAL_GENERIC=y
+# CONFIG_USB_SERIAL_AIRCABLE is not set
+# CONFIG_USB_SERIAL_ARK3116 is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_CH341 is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_CP2101 is not set
+# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_FUNSOFT is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_IPAQ is not set
+# CONFIG_USB_SERIAL_IR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
+# CONFIG_USB_SERIAL_GARMIN is not set
+# CONFIG_USB_SERIAL_IPW is not set
+# CONFIG_USB_SERIAL_IUU is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KLSI is not set
+# CONFIG_USB_SERIAL_KOBIL_SCT is not set
+CONFIG_USB_SERIAL_MCT_U232=m
+# CONFIG_USB_SERIAL_MOS7720 is not set
+# CONFIG_USB_SERIAL_MOS7840 is not set
+# CONFIG_USB_SERIAL_MOTOROLA is not set
+# CONFIG_USB_SERIAL_NAVMAN is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_OTI6858 is not set
+# CONFIG_USB_SERIAL_SPCP8X5 is not set
+# CONFIG_USB_SERIAL_HP4X is not set
+# CONFIG_USB_SERIAL_SAFE is not set
+# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
+# CONFIG_USB_SERIAL_TI is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_XIRCOM is not set
+# CONFIG_USB_SERIAL_OPTION is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+# CONFIG_USB_SERIAL_DEBUG is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+CONFIG_USB_GADGET=m
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+CONFIG_USB_GADGET_PXA25X=y
+CONFIG_USB_PXA25X=m
+# CONFIG_USB_PXA25X_SMALL is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+# CONFIG_USB_GADGET_DUALSPEED is not set
+# CONFIG_USB_ZERO is not set
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_RNDIS=y
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+CONFIG_USB_G_SERIAL=m
+# CONFIG_USB_MIDI_GADGET is not set
+CONFIG_USB_G_PRINTER=m
+# CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_MMC is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=m
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+CONFIG_RTC_DRV_DS1307=m
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_SA1100=m
+# CONFIG_DMADEVICES is not set
+
+#
+# Voltage and Current regulators
+#
+# CONFIG_REGULATOR is not set
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_BQ24022 is not set
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=m
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=m
+# CONFIG_EXT3_FS_XATTR is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=m
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_DNOTIFY is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+# CONFIG_MSDOS_FS is not set
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+CONFIG_NFSD=m
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V3_ACL is not set
+# CONFIG_NFSD_V4 is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=m
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+CONFIG_NLS_CODEPAGE_850=m
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=m
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+CONFIG_NLS_ISO8859_15=m
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=m
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_HAVE_FTRACE=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+# CONFIG_FTRACE is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_DEBUG_USER is not set
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=m
+CONFIG_CRYPTO_BLKCIPHER=m
+CONFIG_CRYPTO_MANAGER=m
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=m
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=m
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+CONFIG_CRYPTO_HW=y
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+# CONFIG_GENERIC_FIND_NEXT_BIT is not set
+CONFIG_CRC_CCITT=m
+# CONFIG_CRC16 is not set
+CONFIG_CRC_T10DIF=m
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/xm_x270_defconfig b/arch/arm/configs/xm_x2xx_defconfig
index aa40d91ce599..f891364deceb 100644
--- a/arch/arm/configs/xm_x270_defconfig
+++ b/arch/arm/configs/xm_x2xx_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.25
-# Sun May 11 15:12:52 2008
+# Linux kernel version: 2.6.27-rc8
+# Sun Oct  5 11:05:36 2008
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -12,6 +12,7 @@ CONFIG_MMU=y
 # CONFIG_NO_IOPORT is not set
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 CONFIG_LOCKDEP_SUPPORT=y
 CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_HARDIRQS_SW_RESEND=y
@@ -24,6 +25,7 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y
 CONFIG_ARCH_SUPPORTS_AOUT=y
 CONFIG_ZONE_DMA=y
 CONFIG_ARCH_MTD_XIP=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_VECTORS_BASE=0xffff0000
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 
@@ -62,7 +64,6 @@ CONFIG_SYSCTL=y
 CONFIG_EMBEDDED=y
 CONFIG_UID16=y
 CONFIG_SYSCTL_SYSCALL=y
-CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
@@ -88,14 +89,21 @@ CONFIG_SLUB=y
 # CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
+# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
+# CONFIG_HAVE_IOREMAP_PROT is not set
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_ARCH_TRACEHOOK is not set
 # CONFIG_HAVE_DMA_ATTRS is not set
+# CONFIG_USE_GENERIC_SMP_HELPERS is not set
+CONFIG_HAVE_CLK=y
 # CONFIG_PROC_PAGE_MONITOR is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_RT_MUTEXES=y
 # CONFIG_TINY_SHMEM is not set
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
@@ -106,6 +114,7 @@ CONFIG_BLOCK=y
 # CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_LSF is not set
 # CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
 
 #
 # IO Schedulers
@@ -131,7 +140,6 @@ CONFIG_CLASSIC_RCU=y
 # CONFIG_ARCH_AT91 is not set
 # CONFIG_ARCH_CLPS7500 is not set
 # CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_CO285 is not set
 # CONFIG_ARCH_EBSA110 is not set
 # CONFIG_ARCH_EP93XX is not set
 # CONFIG_ARCH_FOOTBRIDGE is not set
@@ -145,8 +153,11 @@ CONFIG_CLASSIC_RCU=y
 # CONFIG_ARCH_IXP2000 is not set
 # CONFIG_ARCH_IXP4XX is not set
 # CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
 # CONFIG_ARCH_KS8695 is not set
 # CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
 # CONFIG_ARCH_MXC is not set
 # CONFIG_ARCH_ORION5X is not set
 # CONFIG_ARCH_PNX4008 is not set
@@ -164,26 +175,32 @@ CONFIG_DMABOUNCE=y
 #
 # Intel PXA2xx/PXA3xx Implementations
 #
-
-#
-# Select target boards
-#
 # CONFIG_ARCH_GUMSTIX is not set
 # CONFIG_ARCH_LUBBOCK is not set
 # CONFIG_MACH_LOGICPD_PXA270 is not set
 # CONFIG_MACH_MAINSTONE is not set
+# CONFIG_MACH_MP900C is not set
 # CONFIG_ARCH_PXA_IDP is not set
 # CONFIG_PXA_SHARPSL is not set
+# CONFIG_ARCH_VIPER is not set
 # CONFIG_ARCH_PXA_ESERIES is not set
-# CONFIG_MACH_TRIZEPS4 is not set
+# CONFIG_TRIZEPS_PXA is not set
 CONFIG_MACH_EM_X270=y
 # CONFIG_MACH_COLIBRI is not set
 # CONFIG_MACH_ZYLONITE is not set
 # CONFIG_MACH_LITTLETON is not set
+# CONFIG_MACH_TAVOREVB is not set
+# CONFIG_MACH_SAAR is not set
 CONFIG_MACH_ARMCORE=y
+# CONFIG_MACH_CM_X300 is not set
 # CONFIG_MACH_MAGICIAN is not set
+# CONFIG_MACH_MIOA701 is not set
 # CONFIG_MACH_PCM027 is not set
+# CONFIG_ARCH_PXA_PALM is not set
+# CONFIG_PXA_EZX is not set
+CONFIG_PXA25x=y
 CONFIG_PXA27x=y
+CONFIG_PXA_SSP=y
 # CONFIG_PXA_PWM is not set
 
 #
@@ -253,11 +270,17 @@ CONFIG_TICK_ONESHOT=y
 CONFIG_NO_HZ=y
 # CONFIG_HIGH_RES_TIMERS is not set
 CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
 # CONFIG_PREEMPT is not set
 CONFIG_HZ=100
 CONFIG_AEABI=y
 CONFIG_OABI_COMPAT=y
-# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_ARCH_FLATMEM_HAS_HOLES=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
 CONFIG_SELECT_MEMORY_MODEL=y
 CONFIG_FLATMEM_MANUAL=y
 # CONFIG_DISCONTIGMEM_MANUAL is not set
@@ -284,9 +307,10 @@ CONFIG_CMDLINE="root=1f03 mem=32M"
 # CONFIG_KEXEC is not set
 
 #
-# CPU Frequency scaling
+# CPU Power Management
 #
 # CONFIG_CPU_FREQ is not set
+# CONFIG_CPU_IDLE is not set
 
 #
 # Floating point emulation
@@ -316,10 +340,6 @@ CONFIG_SUSPEND=y
 CONFIG_SUSPEND_FREEZER=y
 CONFIG_APM_EMULATION=m
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
-
-#
-# Networking
-#
 CONFIG_NET=y
 
 #
@@ -402,6 +422,7 @@ CONFIG_BT_HIDP=m
 #
 CONFIG_BT_HCIUSB=m
 CONFIG_BT_HCIUSB_SCO=y
+# CONFIG_BT_HCIBTUSB is not set
 # CONFIG_BT_HCIBTSDIO is not set
 # CONFIG_BT_HCIUART is not set
 # CONFIG_BT_HCIBCM203X is not set
@@ -419,6 +440,7 @@ CONFIG_BT_HCIUSB_SCO=y
 #
 # CONFIG_CFG80211 is not set
 CONFIG_WIRELESS_EXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
 # CONFIG_MAC80211 is not set
 # CONFIG_IEEE80211 is not set
 # CONFIG_RFKILL is not set
@@ -435,6 +457,8 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_FW_LOADER=m
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_DEBUG_DRIVER is not set
 # CONFIG_DEBUG_DEVRES is not set
 # CONFIG_SYS_HYPERVISOR is not set
@@ -527,6 +551,7 @@ CONFIG_MTD_NAND=y
 # CONFIG_MTD_NAND_ECC_SMC is not set
 # CONFIG_MTD_NAND_MUSEUM_IDS is not set
 # CONFIG_MTD_NAND_H1900 is not set
+CONFIG_MTD_NAND_GPIO=m
 CONFIG_MTD_NAND_IDS=y
 # CONFIG_MTD_NAND_DISKONCHIP is not set
 # CONFIG_MTD_NAND_SHARPSL is not set
@@ -636,6 +661,7 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_DEBUG is not set
 # CONFIG_SCSI_SRP is not set
 # CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
+# CONFIG_SCSI_DH is not set
 CONFIG_ATA=m
 # CONFIG_ATA_NONSTANDARD is not set
 # CONFIG_SATA_PMP is not set
@@ -696,17 +722,21 @@ CONFIG_PATA_PCMCIA=m
 # CONFIG_PATA_VIA is not set
 # CONFIG_PATA_WINBOND is not set
 # CONFIG_PATA_PLATFORM is not set
+# CONFIG_PATA_SCH is not set
 # CONFIG_MD is not set
 # CONFIG_FUSION is not set
 
 #
 # IEEE 1394 (FireWire) support
 #
+
+#
+# Enable only one of the two stacks, unless you know what you are doing
+#
 # CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
 # CONFIG_I2O is not set
 CONFIG_NETDEVICES=y
-# CONFIG_NETDEVICES_MULTIQUEUE is not set
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
 # CONFIG_MACVLAN is not set
@@ -725,6 +755,7 @@ CONFIG_MII=y
 # CONFIG_SMC91X is not set
 CONFIG_DM9000=y
 CONFIG_DM9000_DEBUGLEVEL=1
+# CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL is not set
 # CONFIG_SMC911X is not set
 # CONFIG_NET_TULIP is not set
 # CONFIG_HP100 is not set
@@ -780,7 +811,6 @@ CONFIG_LIBERTAS_SDIO=m
 # CONFIG_PRISM54 is not set
 # CONFIG_USB_ZD1201 is not set
 # CONFIG_USB_NET_RNDIS_WLAN is not set
-# CONFIG_IWLWIFI is not set
 # CONFIG_IWLWIFI_LEDS is not set
 # CONFIG_HOSTAP is not set
 
@@ -853,17 +883,18 @@ CONFIG_INPUT_TOUCHSCREEN=y
 # CONFIG_TOUCHSCREEN_GUNZE is not set
 # CONFIG_TOUCHSCREEN_ELO is not set
 # CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
 # CONFIG_TOUCHSCREEN_MK712 is not set
 # CONFIG_TOUCHSCREEN_PENMOUNT is not set
 # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
 # CONFIG_TOUCHSCREEN_TOUCHWIN is not set
-CONFIG_TOUCHSCREEN_UCB1400=m
 CONFIG_TOUCHSCREEN_WM97XX=m
 # CONFIG_TOUCHSCREEN_WM9705 is not set
 CONFIG_TOUCHSCREEN_WM9712=y
 # CONFIG_TOUCHSCREEN_WM9713 is not set
 # CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE is not set
 # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
 # CONFIG_INPUT_MISC is not set
 
 #
@@ -880,6 +911,7 @@ CONFIG_SERIO_LIBPS2=y
 # Character devices
 #
 CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
 CONFIG_VT_CONSOLE=y
 CONFIG_HW_CONSOLE=y
 # CONFIG_VT_HW_CONSOLE_BINDING is not set
@@ -922,45 +954,66 @@ CONFIG_DEVPORT=y
 CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
 CONFIG_I2C_CHARDEV=m
+CONFIG_I2C_HELPER_AUTO=y
 
 #
 # I2C Hardware Bus support
 #
+
+#
+# PC SMBus host controller drivers
+#
 # CONFIG_I2C_ALI1535 is not set
 # CONFIG_I2C_ALI1563 is not set
 # CONFIG_I2C_ALI15X3 is not set
 # CONFIG_I2C_AMD756 is not set
 # CONFIG_I2C_AMD8111 is not set
-# CONFIG_I2C_GPIO is not set
 # CONFIG_I2C_I801 is not set
-# CONFIG_I2C_I810 is not set
-CONFIG_I2C_PXA=y
-# CONFIG_I2C_PXA_SLAVE is not set
+# CONFIG_I2C_ISCH is not set
 # CONFIG_I2C_PIIX4 is not set
 # CONFIG_I2C_NFORCE2 is not set
-# CONFIG_I2C_OCORES is not set
-# CONFIG_I2C_PARPORT_LIGHT is not set
-# CONFIG_I2C_PROSAVAGE is not set
-# CONFIG_I2C_SAVAGE4 is not set
-# CONFIG_I2C_SIMTEC is not set
 # CONFIG_I2C_SIS5595 is not set
 # CONFIG_I2C_SIS630 is not set
 # CONFIG_I2C_SIS96X is not set
-# CONFIG_I2C_TAOS_EVM is not set
-# CONFIG_I2C_STUB is not set
-# CONFIG_I2C_TINY_USB is not set
 # CONFIG_I2C_VIA is not set
 # CONFIG_I2C_VIAPRO is not set
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_PXA=y
+# CONFIG_I2C_PXA_SLAVE is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Graphics adapter I2C/DDC channel drivers
+#
 # CONFIG_I2C_VOODOO3 is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
 # CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
 
 #
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
+# CONFIG_AT24 is not set
 # CONFIG_SENSORS_EEPROM is not set
 # CONFIG_SENSORS_PCF8574 is not set
 # CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
 # CONFIG_SENSORS_PCF8591 is not set
 # CONFIG_TPS65010 is not set
 # CONFIG_SENSORS_MAX6875 is not set
@@ -970,25 +1023,31 @@ CONFIG_I2C_PXA=y
 # CONFIG_I2C_DEBUG_BUS is not set
 # CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
-CONFIG_HAVE_GPIO_LIB=y
-
-#
-# GPIO Support
-#
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
 # CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
 
 #
 # I2C GPIO expanders:
 #
+# CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
 
 #
+# PCI GPIO expanders:
+#
+# CONFIG_GPIO_BT8XX is not set
+
+#
 # SPI GPIO expanders:
 #
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 
 #
@@ -1000,10 +1059,16 @@ CONFIG_SSB_POSSIBLE=y
 #
 # Multifunction device drivers
 #
+# CONFIG_MFD_CORE is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_MFD_ASIC3 is not set
 # CONFIG_HTC_EGPIO is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_UCB1400_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
 
 #
 # Multimedia devices
@@ -1014,6 +1079,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_VIDEO_DEV is not set
 # CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
 
 #
 # Multimedia drivers
@@ -1038,7 +1104,6 @@ CONFIG_FB_CFB_IMAGEBLIT=y
 # CONFIG_FB_SYS_IMAGEBLIT is not set
 # CONFIG_FB_FOREIGN_ENDIAN is not set
 # CONFIG_FB_SYS_FOPS is not set
-CONFIG_FB_DEFERRED_IO=y
 # CONFIG_FB_SVGALIB is not set
 # CONFIG_FB_MACMODES is not set
 # CONFIG_FB_BACKLIGHT is not set
@@ -1071,12 +1136,14 @@ CONFIG_FB_DEFERRED_IO=y
 # CONFIG_FB_TRIDENT is not set
 # CONFIG_FB_ARK is not set
 # CONFIG_FB_PM3 is not set
+# CONFIG_FB_CARMINE is not set
 CONFIG_FB_PXA=y
 # CONFIG_FB_PXA_SMARTPANEL is not set
 CONFIG_FB_PXA_PARAMETERS=y
 CONFIG_FB_MBX=m
-# CONFIG_FB_AM200EPD is not set
+# CONFIG_FB_W100 is not set
 # CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
 # CONFIG_BACKLIGHT_LCD_SUPPORT is not set
 
 #
@@ -1099,15 +1166,7 @@ CONFIG_LOGO=y
 CONFIG_LOGO_LINUX_MONO=y
 CONFIG_LOGO_LINUX_VGA16=y
 CONFIG_LOGO_LINUX_CLUT224=y
-
-#
-# Sound
-#
 CONFIG_SOUND=m
-
-#
-# Advanced Linux Sound Architecture
-#
 CONFIG_SND=m
 CONFIG_SND_TIMER=m
 CONFIG_SND_PCM=m
@@ -1121,19 +1180,15 @@ CONFIG_SND_SUPPORT_OLD_API=y
 CONFIG_SND_VERBOSE_PROCFS=y
 # CONFIG_SND_VERBOSE_PRINTK is not set
 # CONFIG_SND_DEBUG is not set
-
-#
-# Generic devices
-#
+CONFIG_SND_VMASTER=y
 CONFIG_SND_AC97_CODEC=m
+CONFIG_SND_DRIVERS=y
 # CONFIG_SND_DUMMY is not set
 # CONFIG_SND_MTPAV is not set
 # CONFIG_SND_SERIAL_U16550 is not set
 # CONFIG_SND_MPU401 is not set
-
-#
-# PCI devices
-#
+# CONFIG_SND_AC97_POWER_SAVE is not set
+CONFIG_SND_PCI=y
 # CONFIG_SND_AD1889 is not set
 # CONFIG_SND_ALS300 is not set
 # CONFIG_SND_ALI5451 is not set
@@ -1193,42 +1248,16 @@ CONFIG_SND_AC97_CODEC=m
 # CONFIG_SND_VIRTUOSO is not set
 # CONFIG_SND_VX222 is not set
 # CONFIG_SND_YMFPCI is not set
-# CONFIG_SND_AC97_POWER_SAVE is not set
-
-#
-# ALSA ARM devices
-#
+CONFIG_SND_ARM=y
 CONFIG_SND_PXA2XX_PCM=m
 CONFIG_SND_PXA2XX_AC97=m
-
-#
-# USB devices
-#
+CONFIG_SND_USB=y
 # CONFIG_SND_USB_AUDIO is not set
 # CONFIG_SND_USB_CAIAQ is not set
-
-#
-# PCMCIA devices
-#
+CONFIG_SND_PCMCIA=y
 # CONFIG_SND_VXPOCKET is not set
 # CONFIG_SND_PDAUDIOCF is not set
-
-#
-# System on Chip audio support
-#
 # CONFIG_SND_SOC is not set
-
-#
-# ALSA SoC audio for Freescale SOCs
-#
-
-#
-# SoC Audio for the Texas Instruments OMAP
-#
-
-#
-# Open Sound System
-#
 # CONFIG_SOUND_PRIME is not set
 CONFIG_AC97_BUS=m
 CONFIG_HID_SUPPORT=y
@@ -1261,12 +1290,15 @@ CONFIG_USB_DEVICEFS=y
 # CONFIG_USB_OTG is not set
 # CONFIG_USB_OTG_WHITELIST is not set
 # CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_USB_MON=y
 
 #
 # USB Host Controller Drivers
 #
+# CONFIG_USB_C67X00_HCD is not set
 # CONFIG_USB_EHCI_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
 CONFIG_USB_OHCI_HCD=y
 # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
 # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
@@ -1274,12 +1306,14 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
 # CONFIG_USB_UHCI_HCD is not set
 # CONFIG_USB_SL811_HCD is not set
 # CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_MUSB_HDRC is not set
 
 #
 # USB Device Class drivers
 #
 # CONFIG_USB_ACM is not set
 # CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
 
 #
 # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
@@ -1309,7 +1343,6 @@ CONFIG_USB_STORAGE=y
 #
 # CONFIG_USB_MDC800 is not set
 # CONFIG_USB_MICROTEK is not set
-CONFIG_USB_MON=y
 
 #
 # USB port drivers
@@ -1322,7 +1355,6 @@ CONFIG_USB_MON=y
 # CONFIG_USB_EMI62 is not set
 # CONFIG_USB_EMI26 is not set
 # CONFIG_USB_ADUTUX is not set
-# CONFIG_USB_AUERSWALD is not set
 # CONFIG_USB_RIO500 is not set
 # CONFIG_USB_LEGOTOWER is not set
 # CONFIG_USB_LCD is not set
@@ -1338,6 +1370,7 @@ CONFIG_USB_MON=y
 # CONFIG_USB_TRANCEVIBRATOR is not set
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
 # CONFIG_USB_GADGET is not set
 CONFIG_MMC=m
 # CONFIG_MMC_DEBUG is not set
@@ -1349,6 +1382,7 @@ CONFIG_MMC=m
 CONFIG_MMC_BLOCK=m
 CONFIG_MMC_BLOCK_BOUNCE=y
 # CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
 
 #
 # MMC/SD Host Controller Drivers
@@ -1356,14 +1390,19 @@ CONFIG_MMC_BLOCK_BOUNCE=y
 CONFIG_MMC_PXA=m
 # CONFIG_MMC_SDHCI is not set
 # CONFIG_MMC_TIFM_SD is not set
+# CONFIG_MMC_SDRICOH_CS is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_ACCESSIBILITY is not set
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
 
 #
 # LED drivers
 #
+# CONFIG_LEDS_PCA9532 is not set
 # CONFIG_LEDS_GPIO is not set
 CONFIG_LEDS_CM_X270=y
+# CONFIG_LEDS_PCA955X is not set
 
 #
 # LED Triggers
@@ -1401,6 +1440,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_PCF8583 is not set
 # CONFIG_RTC_DRV_M41T80 is not set
 # CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
 
 #
 # SPI RTC drivers
@@ -1422,6 +1462,15 @@ CONFIG_RTC_DRV_V3020=y
 # on-CPU RTC drivers
 #
 CONFIG_RTC_DRV_SA1100=y
+# CONFIG_DMADEVICES is not set
+
+#
+# Voltage and Current regulators
+#
+# CONFIG_REGULATOR is not set
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_BQ24022 is not set
 # CONFIG_UIO is not set
 
 #
@@ -1501,6 +1550,7 @@ CONFIG_JFFS2_RTIME=y
 # CONFIG_CRAMFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
 # CONFIG_ROMFS_FS is not set
@@ -1511,13 +1561,12 @@ CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
 # CONFIG_NFS_V3_ACL is not set
 # CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
 CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
 CONFIG_LOCKD=y
 CONFIG_LOCKD_V4=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_BIND34 is not set
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
@@ -1626,6 +1675,7 @@ CONFIG_DEBUG_KERNEL=y
 # CONFIG_DEBUG_INFO is not set
 # CONFIG_DEBUG_VM is not set
 # CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
 CONFIG_FRAME_POINTER=y
@@ -1633,7 +1683,17 @@ CONFIG_FRAME_POINTER=y
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_HAVE_FTRACE=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+# CONFIG_FTRACE is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
 # CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
 CONFIG_DEBUG_USER=y
 CONFIG_DEBUG_ERRORS=y
 # CONFIG_DEBUG_STACK_USAGE is not set
@@ -1689,6 +1749,10 @@ CONFIG_CRYPTO=y
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
 # CONFIG_CRYPTO_SHA1 is not set
 # CONFIG_CRYPTO_SHA256 is not set
 # CONFIG_CRYPTO_SHA512 is not set
@@ -1729,6 +1793,7 @@ CONFIG_BITREVERSE=y
 # CONFIG_GENERIC_FIND_NEXT_BIT is not set
 CONFIG_CRC_CCITT=m
 # CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
 # CONFIG_CRC_ITU_T is not set
 CONFIG_CRC32=y
 # CONFIG_CRC7 is not set
diff --git a/arch/arm/include/asm/mach/udc_pxa2xx.h b/arch/arm/include/asm/mach/udc_pxa2xx.h
index 270902c353fd..f3eabf1ecec3 100644
--- a/arch/arm/include/asm/mach/udc_pxa2xx.h
+++ b/arch/arm/include/asm/mach/udc_pxa2xx.h
@@ -18,8 +18,7 @@ struct pxa2xx_udc_mach_info {
         /* Boards following the design guidelines in the developer's manual,
          * with on-chip GPIOs not Lubbock's weird hardware, can have a sane
          * VBUS IRQ and omit the methods above.  Store the GPIO number
-         * here; for GPIO 0, also mask in one of the pxa_gpio_mode() bits.
-         * Note that sometimes the signals go through inverters...
+         * here.  Note that sometimes the signals go through inverters...
          */
         bool    gpio_vbus_inverted;
         u16     gpio_vbus;                      /* high == vbus present */
diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c
index 7a50575a8d4d..60c079d85355 100644
--- a/arch/arm/kernel/ecard.c
+++ b/arch/arm/kernel/ecard.c
@@ -587,8 +587,7 @@ ecard_irq_handler(unsigned int irq, struct irq_desc *desc)
                         pending = ecard_default_ops.irqpending(ec);
 
                 if (pending) {
-                        struct irq_desc *d = irq_desc + ec->irq;
-                        desc_handle_irq(ec->irq, d);
+                        generic_handle_irq(ec->irq);
                         called ++;
                 }
         }
@@ -622,7 +621,6 @@ ecard_irqexp_handler(unsigned int irq, struct irq_desc *desc)
                 ecard_t *ec = slot_to_ecard(slot);
 
                 if (ec->claimed) {
-                        struct irq_desc *d = irq_desc + ec->irq;
                         /*
                          * this ugly code is so that we can operate a
                          * prioritorising system:
@@ -635,7 +633,7 @@ ecard_irqexp_handler(unsigned int irq, struct irq_desc *desc)
                          * Serial cards should go in 0/1, ethernet/scsi in 2/3
                          * otherwise you will lose serial data at high speeds!
                          */
-                        desc_handle_irq(ec->irq, d);
+                        generic_handle_irq(ec->irq);
                 } else {
                         printk(KERN_WARNING "card%d: interrupt from unclaimed "
                                "card???\n", slot);
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index f88efb135b70..2f3eb795fa6e 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -112,18 +112,17 @@ static struct irq_desc bad_irq_desc = {
 asmlinkage void __exception asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
 {
         struct pt_regs *old_regs = set_irq_regs(regs);
-        struct irq_desc *desc = irq_desc + irq;
+
+        irq_enter();
 
         /*
          * Some hardware gives randomly wrong interrupts.  Rather
          * than crashing, do something sensible.
          */
         if (irq >= NR_IRQS)
-                desc = &bad_irq_desc;
-
-        irq_enter();
-
-        desc_handle_irq(irq, desc);
+                handle_bad_irq(irq, &bad_irq_desc);
+        else
+                generic_handle_irq(irq);
 
         /* AT91 specific workaround */
         irq_finish(irq);
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index 93e0614f2afb..7e5ebb5bdd17 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -404,7 +404,6 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
                 }
 
                 pin = bank->chipbase;
-                gpio = &irq_desc[pin];
 
                 while (isr) {
                         if (isr & 1) {
@@ -417,7 +416,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
                                         gpio_irq_mask(pin);
                                 }
                                 else
-                                        desc_handle_irq(pin, gpio);
+                                        generic_handle_irq(pin);
                         }
                         pin++;
                         gpio++;
diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c
index c9cb4f09b18f..574cb810a500 100644
--- a/arch/arm/mach-davinci/gpio.c
+++ b/arch/arm/mach-davinci/gpio.c
@@ -201,7 +201,6 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc)
         desc->chip->ack(irq);
         while (1) {
                 u32             status;
-                struct irq_desc *gpio;
                 int             n;
                 int             res;
 
@@ -215,12 +214,10 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc)
 
                 /* now demux them to the right lowlevel handler */
                 n = (int)get_irq_data(irq);
-                gpio = &irq_desc[n];
                 while (status) {
                         res = ffs(status);
                         n += res;
-                        gpio += res;
-                        desc_handle_irq(n - 1, gpio - 1);
+                        generic_handle_irq(n - 1);
                         status >>= res;
                 }
         }
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 7e65d23e14b5..de53f0be71b9 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -192,8 +192,7 @@ static void ep93xx_gpio_ab_irq_handler(unsigned int irq, struct irq_desc *desc)
         for (i = 0; i < 8; i++) {
                 if (status & (1 << i)) {
                         int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_A(0)) + i;
-                        desc = irq_desc + gpio_irq;
-                        desc_handle_irq(gpio_irq, desc);
+                        generic_handle_irq(gpio_irq);
                 }
         }
 
@@ -202,7 +201,7 @@ static void ep93xx_gpio_ab_irq_handler(unsigned int irq, struct irq_desc *desc)
                 if (status & (1 << i)) {
                         int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_B(0)) + i;
                         desc = irq_desc + gpio_irq;
-                        desc_handle_irq(gpio_irq, desc);
+                        generic_handle_irq(gpio_irq);
                 }
         }
 }
@@ -217,7 +216,7 @@ static void ep93xx_gpio_f_irq_handler(unsigned int irq, struct irq_desc *desc)
         int port_f_idx = ((irq + 1) & 7) ^ 4; /* {19..22,47..50} -> {0..7} */
         int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_F(0)) + port_f_idx;
 
-        desc_handle_irq(gpio_irq, irq_desc + gpio_irq);
+        generic_handle_irq(gpio_irq);
 }
 
 static void ep93xx_gpio_irq_ack(unsigned int irq)
diff --git a/arch/arm/mach-footbridge/isa-irq.c b/arch/arm/mach-footbridge/isa-irq.c
index 62bb38f1369d..54fec9ae28b9 100644
--- a/arch/arm/mach-footbridge/isa-irq.c
+++ b/arch/arm/mach-footbridge/isa-irq.c
@@ -94,8 +94,7 @@ isa_irq_handler(unsigned int irq, struct irq_desc *desc)
                 return;
         }
 
-        desc = irq_desc + isa_irq;
-        desc_handle_irq(isa_irq, desc);
+        generic_handle_irq(isa_irq);
 }
 
 static struct irqaction irq_cascade = {
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c
index 3a410e3f1e5f..7a2614828217 100644
--- a/arch/arm/mach-h720x/common.c
+++ b/arch/arm/mach-h720x/common.c
@@ -104,14 +104,12 @@ h720x_gpio_handler(unsigned int mask, unsigned int irq,
                  struct irq_desc *desc)
 {
         IRQDBG("%s irq: %d\n", __func__, irq);
-        desc = irq_desc + irq;
         while (mask) {
                 if (mask & 1) {
                         IRQDBG("handling irq %d\n", irq);
-                        desc_handle_irq(irq, desc);
+                        generic_handle_irq(irq);
                 }
                 irq++;
-                desc++;
                 mask >>= 1;
         }
 }
diff --git a/arch/arm/mach-h720x/cpu-h7202.c b/arch/arm/mach-h720x/cpu-h7202.c
index 53e1f62f2e79..fd33a19c813a 100644
--- a/arch/arm/mach-h720x/cpu-h7202.c
+++ b/arch/arm/mach-h720x/cpu-h7202.c
@@ -120,12 +120,10 @@ h7202_timerx_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
 
         mask >>= 1;
         irq = IRQ_TIMER1;
-        desc = irq_desc + irq;
         while (mask) {
                 if (mask & 1)
-                        desc_handle_irq(irq, desc);
+                        generic_handle_irq(irq);
                 irq++;
-                desc++;
                 mask >>= 1;
         }
 }
diff --git a/arch/arm/mach-imx/irq.c b/arch/arm/mach-imx/irq.c
index 2ce75625b417..232e3b9f880d 100644
--- a/arch/arm/mach-imx/irq.c
+++ b/arch/arm/mach-imx/irq.c
@@ -182,14 +182,12 @@ static void
 imx_gpio_handler(unsigned int mask, unsigned int irq,
                  struct irq_desc *desc)
 {
-        desc = irq_desc + irq;
         while (mask) {
                 if (mask & 1) {
                         DEBUG_IRQ("handling irq %d\n", irq);
-                        desc_handle_irq(irq, desc);
+                        generic_handle_irq(irq);
                 }
                 irq++;
-                desc++;
                 mask >>= 1;
         }
 }
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index c0eaf0a6f453..88026ccd5ac9 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -217,8 +217,7 @@ sic_handle_irq(unsigned int irq, struct irq_desc *desc)
 
                 irq += IRQ_SIC_START;
 
-                desc = irq_desc + irq;
-                desc_handle_irq(irq, desc);
+                generic_handle_irq(irq);
         } while (status);
 }
 
diff --git a/arch/arm/mach-iop13xx/msi.c b/arch/arm/mach-iop13xx/msi.c
index 63ef1124ca5c..f34b0ed80630 100644
--- a/arch/arm/mach-iop13xx/msi.c
+++ b/arch/arm/mach-iop13xx/msi.c
@@ -110,8 +110,7 @@ static void iop13xx_msi_handler(unsigned int irq, struct irq_desc *desc)
                 do {
                         j = find_first_bit(&status, 32);
                         (write_imipr[i])(1 << j); /* write back to clear bit */
-                        desc = irq_desc + IRQ_IOP13XX_MSI_0 + j + (32*i);
-                        desc_handle_irq(IRQ_IOP13XX_MSI_0 + j + (32*i), desc);
+                        generic_handle_irq(IRQ_IOP13XX_MSI_0 + j + (32*i));
                         status = (read_imipr[i])();
                 } while (status);
         }
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c
index 628063ca31e6..babb22597163 100644
--- a/arch/arm/mach-ixp2000/core.c
+++ b/arch/arm/mach-ixp2000/core.c
@@ -304,8 +304,7 @@ static void ixp2000_GPIO_irq_handler(unsigned int irq, struct irq_desc *desc)
                    
         for (i = 0; i <= 7; i++) {
                 if (status & (1<<i)) {
-                        desc = irq_desc + i + IRQ_IXP2000_GPIO0;
-                        desc_handle_irq(i + IRQ_IXP2000_GPIO0, desc);
+                        generic_handle_irq(i + IRQ_IXP2000_GPIO0);
                 }
         }
 }
@@ -397,8 +396,7 @@ static void ixp2000_err_irq_handler(unsigned int irq, struct irq_desc *desc)
 
         for(i = 31; i >= 0; i--) {
                 if(status & (1 << i)) {
-                        desc = irq_desc + IRQ_IXP2000_DRAM0_MIN_ERR + i;
-                        desc_handle_irq(IRQ_IXP2000_DRAM0_MIN_ERR + i, desc);
+                        generic_handle_irq(IRQ_IXP2000_DRAM0_MIN_ERR + i);
                 }
         }
 }
diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c
index 4debb9ff056c..b0653a87159a 100644
--- a/arch/arm/mach-ixp2000/ixdp2x00.c
+++ b/arch/arm/mach-ixp2000/ixdp2x00.c
@@ -129,10 +129,8 @@ static void ixdp2x00_irq_handler(unsigned int irq, struct irq_desc *desc)
 
         for(i = 0; i < board_irq_count; i++) {
                 if(ex_interrupt & (1 << i))  {
-                        struct irq_desc *cpld_desc;
                         int cpld_irq = IXP2000_BOARD_IRQ(0) + i;
-                        cpld_desc = irq_desc + cpld_irq;
-                        desc_handle_irq(cpld_irq, cpld_desc);
+                        generic_handle_irq(cpld_irq);
                 }
         }
 
diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c
index c7042725dc80..4a12327a09a3 100644
--- a/arch/arm/mach-ixp2000/ixdp2x01.c
+++ b/arch/arm/mach-ixp2000/ixdp2x01.c
@@ -79,10 +79,8 @@ static void ixdp2x01_irq_handler(unsigned int irq, struct irq_desc *desc)
 
         for (i = 0; i < IXP2000_BOARD_IRQS; i++) {
                 if (ex_interrupt & (1 << i)) {
-                        struct irq_desc *cpld_desc;
                         int cpld_irq = IXP2000_BOARD_IRQ(0) + i;
-                        cpld_desc = irq_desc + cpld_irq;
-                        desc_handle_irq(cpld_irq, cpld_desc);
+                        generic_handle_irq(cpld_irq);
                 }
         }
 
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c
index 68b4ac5b2481..aa4c4420ff3d 100644
--- a/arch/arm/mach-ixp23xx/core.c
+++ b/arch/arm/mach-ixp23xx/core.c
@@ -253,7 +253,6 @@ static void pci_handler(unsigned int irq, struct irq_desc *desc)
 {
         u32 pci_interrupt;
         unsigned int irqno;
-        struct irq_desc *int_desc;
 
         pci_interrupt = *IXP23XX_PCI_XSCALE_INT_STATUS;
 
@@ -268,8 +267,7 @@ static void pci_handler(unsigned int irq, struct irq_desc *desc)
                 BUG();
         }
 
-        int_desc = irq_desc + irqno;
-        desc_handle_irq(irqno, int_desc);
+        generic_handle_irq(irqno);
 
         desc->chip->unmask(irq);
 }
diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c
index b6e0bfa44df9..f1b124a709ab 100644
--- a/arch/arm/mach-ixp23xx/ixdp2351.c
+++ b/arch/arm/mach-ixp23xx/ixdp2351.c
@@ -68,11 +68,9 @@ static void ixdp2351_inta_handler(unsigned int irq, struct irq_desc *desc)
 
         for (i = 0; i < IXDP2351_INTA_IRQ_NUM; i++) {
                 if (ex_interrupt & (1 << i)) {
-                        struct irq_desc *cpld_desc;
                         int cpld_irq =
                                 IXP23XX_MACH_IRQ(IXDP2351_INTA_IRQ_BASE + i);
-                        cpld_desc = irq_desc + cpld_irq;
-                        desc_handle_irq(cpld_irq, cpld_desc);
+                        generic_handle_irq(cpld_irq);
                 }
         }
 
@@ -105,11 +103,9 @@ static void ixdp2351_intb_handler(unsigned int irq, struct irq_desc *desc)
 
         for (i = 0; i < IXDP2351_INTB_IRQ_NUM; i++) {
                 if (ex_interrupt & (1 << i)) {
-                        struct irq_desc *cpld_desc;
                         int cpld_irq =
                                 IXP23XX_MACH_IRQ(IXDP2351_INTB_IRQ_BASE + i);
-                        cpld_desc = irq_desc + cpld_irq;
-                        desc_handle_irq(cpld_irq, cpld_desc);
+                        generic_handle_irq(cpld_irq);
                 }
         }
 
diff --git a/arch/arm/mach-lh7a40x/arch-kev7a400.c b/arch/arm/mach-lh7a40x/arch-kev7a400.c
index 551b97261826..3d7bd50b9095 100644
--- a/arch/arm/mach-lh7a40x/arch-kev7a400.c
+++ b/arch/arm/mach-lh7a40x/arch-kev7a400.c
@@ -77,7 +77,7 @@ static void kev7a400_cpld_handler (unsigned int irq, struct irq_desc *desc)
         irq = IRQ_KEV7A400_CPLD;
         for (; mask; mask >>= 1, ++irq)
                 if (mask & 1)
-                        desc_handle_irq(irq, desc);
+                        generic_handle_irq(irq);
 }
 
 void __init lh7a40x_init_board_irq (void)
diff --git a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
index e373fb8e2699..cb15e5d32120 100644
--- a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
+++ b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
@@ -214,11 +214,11 @@ static void lpd7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc)
         desc->chip->ack (irq);
 
         if ((mask & (1<<0)) == 0)       /* WLAN */
-                IRQ_DISPATCH (IRQ_LPD7A40X_ETH_INT);
+                generic_handle_irq(IRQ_LPD7A40X_ETH_INT);
 
 #if defined (IRQ_TOUCH)
         if ((mask & (1<<1)) == 0)       /* Touch */
-                IRQ_DISPATCH (IRQ_TOUCH);
+                generic_handle_irq(IRQ_TOUCH);
 #endif
 
         desc->chip->unmask (irq); /* Level-triggered need this */
diff --git a/arch/arm/mach-lh7a40x/common.h b/arch/arm/mach-lh7a40x/common.h
index 0ca20c6c83b7..6ed3f6b6db76 100644
--- a/arch/arm/mach-lh7a40x/common.h
+++ b/arch/arm/mach-lh7a40x/common.h
@@ -15,4 +15,3 @@ extern void lh7a404_init_irq (void);
 extern void lh7a40x_clcd_init (void);
 extern void lh7a40x_init_board_irq (void);
 
-#define IRQ_DISPATCH(irq) desc_handle_irq((irq),(irq_desc + irq))
diff --git a/arch/arm/mach-lh7a40x/irq-lpd7a40x.c b/arch/arm/mach-lh7a40x/irq-lpd7a40x.c
index 0d5063ebda10..fd033bb4342f 100644
--- a/arch/arm/mach-lh7a40x/irq-lpd7a40x.c
+++ b/arch/arm/mach-lh7a40x/irq-lpd7a40x.c
@@ -63,10 +63,10 @@ static void lh7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc)
         desc->chip->ack (irq);
 
         if ((mask & 0x1) == 0)  /* WLAN */
-                IRQ_DISPATCH (IRQ_LPD7A40X_ETH_INT);
+                generic_handle_irq(IRQ_LPD7A40X_ETH_INT);
 
         if ((mask & 0x2) == 0)  /* Touch */
-                IRQ_DISPATCH (IRQ_LPD7A400_TS);
+                generic_handle_irq(IRQ_LPD7A400_TS);
 
         desc->chip->unmask (irq); /* Level-triggered need this */
 }
diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c
index e60c4061dc40..79df60c20e70 100644
--- a/arch/arm/mach-netx/generic.c
+++ b/arch/arm/mach-netx/generic.c
@@ -77,15 +77,12 @@ netx_hif_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
         stat = ((readl(NETX_DPMAS_INT_EN) &
                 readl(NETX_DPMAS_INT_STAT)) >> 24) & 0x1f;
 
-        desc = irq_desc + NETX_IRQ_HIF_CHAINED(0);
-
         while (stat) {
                 if (stat & 1) {
                         DEBUG_IRQ("handling irq %d\n", irq);
-                        desc_handle_irq(irq, desc);
+                        generic_handle_irq(irq);
                 }
                 irq++;
-                desc++;
                 stat >>= 1;
         }
 }
diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
index a22a608a7aba..b45bb3b802f1 100644
--- a/arch/arm/mach-ns9xxx/board-a9m9750dev.c
+++ b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
@@ -86,13 +86,10 @@ static void a9m9750dev_fpga_demux_handler(unsigned int irq,
 
         while (stat != 0) {
                 int irqno = fls(stat) - 1;
-                struct irq_desc *fpgadesc;
 
                 stat &= ~(1 << irqno);
 
-                fpgadesc = irq_desc + FPGA_IRQ(irqno);
-
-                desc_handle_irq(FPGA_IRQ(irqno), fpgadesc);
+                generic_handle_irq(FPGA_IRQ(irqno));
         }
 
         desc->chip->unmask(irq);
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index 213b48787102..45a01311669a 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -21,6 +21,7 @@
 #include <linux/reboot.h>
 #include <linux/serial_8250.h>
 #include <linux/serial_reg.h>
+#include <linux/irq.h>
 
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c
index 0d9f48f780ad..04995381aa5c 100644
--- a/arch/arm/mach-omap1/fpga.c
+++ b/arch/arm/mach-omap1/fpga.c
@@ -86,7 +86,6 @@ static void fpga_mask_ack_irq(unsigned int irq)
 
 void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc)
 {
-        struct irq_desc *d;
         u32 stat;
         int fpga_irq;
 
@@ -99,8 +98,7 @@ void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc)
              (fpga_irq < OMAP_FPGA_IRQ_END) && stat;
              fpga_irq++, stat >>= 1) {
                 if (stat & 1) {
-                        d = irq_desc + fpga_irq;
-                        desc_handle_irq(fpga_irq, d);
+                        generic_handle_irq(fpga_irq);
                 }
         }
 }
diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c
index 02ceeb3c6737..632a36f5cf14 100644
--- a/arch/arm/mach-orion5x/irq.c
+++ b/arch/arm/mach-orion5x/irq.c
@@ -162,7 +162,7 @@ static void orion5x_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
                                 polarity ^= 1 << pin;
                                 writel(polarity, GPIO_IN_POL);
                         }
-                        desc_handle_irq(irq, desc);
+                        generic_handle_irq(irq);
                 }
         }
 }
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index e484f609feda..f27f6b3d6e6f 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -38,16 +38,23 @@ config ARCH_LUBBOCK
         bool "Intel DBPXA250 Development Platform"
         select PXA25x
         select SA1111
+        select PXA_HAVE_BOARD_IRQS
 
 config MACH_LOGICPD_PXA270
         bool "LogicPD PXA270 Card Engine Development Platform"
         select PXA27x
         select HAVE_PWM
+        select PXA_HAVE_BOARD_IRQS
 
 config MACH_MAINSTONE
         bool "Intel HCDDBBVA0 Development Platform"
         select PXA27x
         select HAVE_PWM
+        select PXA_HAVE_BOARD_IRQS
+
+config MACH_MP900C
+        bool "Nec Mobilepro 900/c"
+        select PXA25x
 
 config ARCH_PXA_IDP
         bool "Accelent Xscale IDP"
@@ -114,10 +121,21 @@ config MACH_TOSA
         bool "Enable Sharp SL-6000x (Tosa) Support"
         depends on PXA_SHARPSL
         select PXA25x
+        select PXA_HAVE_BOARD_IRQS
+
+config ARCH_VIPER
+        bool "Arcom/Eurotech VIPER SBC"
+        select PXA25x
+        select ISA
+        select I2C_GPIO
+        select HAVE_PWM
+        select PXA_HAVE_BOARD_IRQS
+        select PXA_HAVE_ISA_IRQS
 
 config ARCH_PXA_ESERIES
         bool "PXA based Toshiba e-series PDAs"
         select PXA25x
+        select PXA_HAVE_BOARD_IRQS
 
 config MACH_E330
         bool "Toshiba e330"
@@ -170,13 +188,41 @@ config MACH_E800
           Say Y here if you intend to run this kernel on a Toshiba
           e800 family PDA.
 
+config TRIZEPS_PXA
+        bool "PXA based Keith und Koep Trizeps DIMM-Modules"
+
 config MACH_TRIZEPS4
         bool "Keith und Koep Trizeps4 DIMM-Module"
+        depends on TRIZEPS_PXA
+        select TRIZEPS_PCMCIA
         select PXA27x
 
-config MACH_TRIZEPS4_CONXS
+config MACH_TRIZEPS4WL
+        bool "Keith und Koep Trizeps4-WL DIMM-Module"
+        depends on TRIZEPS_PXA
+        select TRIZEPS_PCMCIA
+        select PXA27x
+        select PXA_SSP
+
+choice
+        prompt "Select base board for Trizeps module"
+        depends on TRIZEPS_PXA
+
+config MACH_TRIZEPS_CONXS
         bool "ConXS Eval Board"
-        depends on MACH_TRIZEPS4
+
+config MACH_TRIZEPS_UCONXS
+        bool "uConXS Eval Board"
+
+config MACH_TRIZEPS_ANY
+        bool "another Board"
+
+endchoice
+
+config TRIZEPS_PCMCIA
+        bool
+        help
+          Enable PCMCIA support for Trizeps modules
 
 config MACH_EM_X270
         bool "CompuLab EM-x270 platform"
@@ -189,6 +235,7 @@ config MACH_COLIBRI
 config MACH_ZYLONITE
         bool "PXA3xx Development Platform (aka Zylonite)"
         select PXA3xx
+        select PXA_SSP
         select HAVE_PWM
 
 config MACH_LITTLETON
@@ -207,21 +254,42 @@ config MACH_SAAR
         select PXA930
 
 config MACH_ARMCORE
-        bool "CompuLab CM-X270 modules"
+        bool "CompuLab CM-X255/CM-X270 modules"
         select PXA27x
         select IWMMXT
         select ZONE_DMA if PCI
+        select PXA25x
+        select PXA_SSP
+
+config MACH_CM_X300
+        bool "CompuLab CM-X300 modules"
+        select PXA3xx
+        select CPU_PXA300
 
 config MACH_MAGICIAN
         bool "Enable HTC Magician Support"
         select PXA27x
         select IWMMXT
+        select PXA_HAVE_BOARD_IRQS
+
+config MACH_MIOA701
+        bool "Mitac Mio A701 Support"
+        select PXA27x
+        select IWMMXT
+        select LEDS_GPIO
+        select HAVE_PWM
+        select GPIO_SYSFS
+        help
+          Say Y here if you intend to run this kernel on a
+          MIO A701. Currently there is only basic support
+          for this PDA.
 
 config MACH_PCM027
         bool "Phytec phyCORE-PXA270 CPU module (PCM-027)"
         select PXA27x
         select IWMMXT
         select PXA_SSP
+        select PXA_HAVE_BOARD_IRQS
 
 config ARCH_PXA_PALM
         bool "PXA based Palm PDAs"
@@ -237,6 +305,16 @@ config MACH_PALMTX
           Say Y here if you intend to run this kernel on a Palm T|X
           handheld computer.
 
+config MACH_PALMZ72
+        bool "Palm Zire 72"
+        default y
+        depends on ARCH_PXA_PALM
+        select PXA27x
+        select IWMMXT
+        help
+          Say Y here if you intend to run this kernel on Palm Zire 72
+          handheld computer.
+
 config MACH_PCM990_BASEBOARD
         bool "PHYTEC PCM-990 development board"
         select HAVE_PWM
@@ -257,6 +335,9 @@ config PCM990_DISPLAY_NONE
 
 endchoice
 
+config MACH_AM200EPD
+        depends on MACH_GUMSTIX_F
+        bool "Enable AM200EPD board support"
 
 config PXA_EZX
         bool "Motorola EZX Platform"
@@ -344,4 +425,10 @@ config TOSA_BT
           This is a simple driver that is able to control
           the state of built in bluetooth chip on tosa.
 
+config PXA_HAVE_BOARD_IRQS
+        bool
+
+config PXA_HAVE_ISA_IRQS
+        bool
+
 endif
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index 99ecbe7f8506..d31c9979cfa3 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -6,7 +6,12 @@
 obj-y                           += clock.o devices.o generic.o irq.o dma.o \
                                    time.o gpio.o reset.o
 obj-$(CONFIG_PM)                += pm.o sleep.o standby.o
-obj-$(CONFIG_CPU_FREQ)          += cpu-pxa.o
+
+ifeq ($(CONFIG_CPU_FREQ),y)
+obj-$(CONFIG_PXA25x)            += cpufreq-pxa2xx.o
+obj-$(CONFIG_PXA27x)            += cpufreq-pxa2xx.o
+obj-$(CONFIG_PXA3xx)            += cpufreq-pxa3xx.o
+endif
 
 # Generic drivers that other drivers may depend upon
 obj-$(CONFIG_PXA_SSP)           += ssp.o
@@ -22,27 +27,33 @@ obj-$(CONFIG_CPU_PXA930)	+= pxa930.o
 
 # Specific board support
 obj-$(CONFIG_ARCH_GUMSTIX)      += gumstix.o
+obj-$(CONFIG_MACH_AM200EPD)     += am200epd.o
 obj-$(CONFIG_ARCH_LUBBOCK)      += lubbock.o
 obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o
 obj-$(CONFIG_MACH_MAINSTONE)    += mainstone.o
+obj-$(CONFIG_MACH_MP900C)       += mp900.o
 obj-$(CONFIG_ARCH_PXA_IDP)      += idp.o
 obj-$(CONFIG_MACH_TRIZEPS4)     += trizeps4.o
 obj-$(CONFIG_MACH_COLIBRI)      += colibri.o
-obj-$(CONFIG_PXA_SHARP_C7xx)    += corgi.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o corgi_pm.o
-obj-$(CONFIG_PXA_SHARP_Cxx00)   += spitz.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o spitz_pm.o
-obj-$(CONFIG_MACH_AKITA)        += akita-ioexp.o
-obj-$(CONFIG_MACH_POODLE)       += poodle.o corgi_ssp.o
+obj-$(CONFIG_PXA_SHARP_C7xx)    += corgi.o sharpsl_pm.o corgi_pm.o
+obj-$(CONFIG_PXA_SHARP_Cxx00)   += spitz.o sharpsl_pm.o spitz_pm.o
+obj-$(CONFIG_MACH_POODLE)       += poodle.o
 obj-$(CONFIG_MACH_PCM027)       += pcm027.o
 obj-$(CONFIG_MACH_PCM990_BASEBOARD)     += pcm990-baseboard.o
 obj-$(CONFIG_MACH_TOSA)         += tosa.o
 obj-$(CONFIG_MACH_EM_X270)      += em-x270.o
 obj-$(CONFIG_MACH_MAGICIAN)     += magician.o
-obj-$(CONFIG_ARCH_PXA_ESERIES)  += eseries.o eseries_udc.o
-obj-$(CONFIG_MACH_E740)         += e740_lcd.o
-obj-$(CONFIG_MACH_E750)         += e750_lcd.o
-obj-$(CONFIG_MACH_E400)         += e400_lcd.o
-obj-$(CONFIG_MACH_E800)         += e800_lcd.o
+obj-$(CONFIG_MACH_MIOA701)      += mioa701.o mioa701_bootresume.o
+obj-$(CONFIG_ARCH_PXA_ESERIES)  += eseries.o
+obj-$(CONFIG_MACH_E330)         += e330.o
+obj-$(CONFIG_MACH_E350)         += e350.o
+obj-$(CONFIG_MACH_E740)         += e740.o
+obj-$(CONFIG_MACH_E750)         += e750.o
+obj-$(CONFIG_MACH_E400)         += e400.o
+obj-$(CONFIG_MACH_E800)         += e800.o
 obj-$(CONFIG_MACH_PALMTX)       += palmtx.o
+obj-$(CONFIG_MACH_PALMZ72)      += palmz72.o
+obj-$(CONFIG_ARCH_VIPER)        += viper.o
 
 ifeq ($(CONFIG_MACH_ZYLONITE),y)
   obj-y                         += zylonite.o
@@ -53,7 +64,8 @@ obj-$(CONFIG_MACH_LITTLETON)	+= littleton.o
 obj-$(CONFIG_MACH_TAVOREVB)     += tavorevb.o
 obj-$(CONFIG_MACH_SAAR)         += saar.o
 
-obj-$(CONFIG_MACH_ARMCORE)      += cm-x270.o
+obj-$(CONFIG_MACH_ARMCORE)      += cm-x2xx.o cm-x255.o cm-x270.o
+obj-$(CONFIG_MACH_CM_X300)      += cm-x300.o
 obj-$(CONFIG_PXA_EZX)           += ezx.o
 
 # Support for blinky lights
@@ -61,12 +73,11 @@ led-y := leds.o
 led-$(CONFIG_ARCH_LUBBOCK)      += leds-lubbock.o
 led-$(CONFIG_MACH_MAINSTONE)    += leds-mainstone.o
 led-$(CONFIG_ARCH_PXA_IDP)      += leds-idp.o
-led-$(CONFIG_MACH_TRIZEPS4)     += leds-trizeps4.o
 
 obj-$(CONFIG_LEDS)              += $(led-y)
 
 ifeq ($(CONFIG_PCI),y)
-obj-$(CONFIG_MACH_ARMCORE) += cm-x270-pci.o
+obj-$(CONFIG_MACH_ARMCORE) += cm-x2xx-pci.o
 endif
 
 obj-$(CONFIG_TOSA_BT)           += tosa-bt.o
diff --git a/arch/arm/mach-pxa/akita-ioexp.c b/arch/arm/mach-pxa/akita-ioexp.c
deleted file mode 100644
index 5c67b188a3ba..000000000000
--- a/arch/arm/mach-pxa/akita-ioexp.c
+++ /dev/null
@@ -1,222 +0,0 @@
-/*
- * Support for the Extra GPIOs on the Sharp SL-C1000 (Akita)
- * (uses a Maxim MAX7310 8 Port IO Expander)
- *
- * Copyright 2005 Openedhand Ltd.
- *
- * Author: Richard Purdie <richard@openedhand.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/module.h>
-#include <linux/i2c.h>
-#include <linux/slab.h>
-#include <linux/workqueue.h>
-#include <mach/akita.h>
-
-/* MAX7310 Regiser Map */
-#define MAX7310_INPUT    0x00
-#define MAX7310_OUTPUT   0x01
-#define MAX7310_POLINV   0x02
-#define MAX7310_IODIR    0x03 /* 1 = Input, 0 = Output */
-#define MAX7310_TIMEOUT  0x04
-
-/* Addresses to scan */
-static const unsigned short normal_i2c[] = { 0x18, I2C_CLIENT_END };
-
-/* I2C Magic */
-I2C_CLIENT_INSMOD;
-
-static int max7310_write(struct i2c_client *client, int address, int data);
-static struct i2c_client max7310_template;
-static void akita_ioexp_work(struct work_struct *private_);
-
-static struct device *akita_ioexp_device;
-static unsigned char ioexp_output_value = AKITA_IOEXP_IO_OUT;
-DECLARE_WORK(akita_ioexp, akita_ioexp_work);
-
-
-/*
- * MAX7310 Access
- */
-static int max7310_config(struct device *dev, int iomode, int polarity)
-{
-        int ret;
-        struct i2c_client *client = to_i2c_client(dev);
-
-        ret = max7310_write(client, MAX7310_POLINV, polarity);
-        if (ret < 0)
-                return ret;
-        ret = max7310_write(client, MAX7310_IODIR, iomode);
-        return ret;
-}
-
-static int max7310_set_ouputs(struct device *dev, int outputs)
-{
-        struct i2c_client *client = to_i2c_client(dev);
-
-        return max7310_write(client, MAX7310_OUTPUT, outputs);
-}
-
-/*
- * I2C Functions
- */
-static int max7310_write(struct i2c_client *client, int address, int value)
-{
-        u8 data[2];
-
-        data[0] = address & 0xff;
-        data[1] = value & 0xff;
-
-        if (i2c_master_send(client, data, 2) == 2)
-                return 0;
-        return -1;
-}
-
-static int max7310_detect(struct i2c_adapter *adapter, int address, int kind)
-{
-        struct i2c_client *new_client;
-        int err;
-
-        if (!(new_client = kmalloc(sizeof(struct i2c_client), GFP_KERNEL)))
-                return -ENOMEM;
-
-        max7310_template.adapter = adapter;
-        max7310_template.addr = address;
-
-        memcpy(new_client, &max7310_template, sizeof(struct i2c_client));
-
-        if ((err = i2c_attach_client(new_client))) {
-                kfree(new_client);
-                return err;
-        }
-
-        max7310_config(&new_client->dev, AKITA_IOEXP_IO_DIR, 0);
-        akita_ioexp_device = &new_client->dev;
-        schedule_work(&akita_ioexp);
-
-        return 0;
-}
-
-static int max7310_attach_adapter(struct i2c_adapter *adapter)
-{
-        return i2c_probe(adapter, &addr_data, max7310_detect);
-}
-
-static int max7310_detach_client(struct i2c_client *client)
-{
-        int err;
-
-        akita_ioexp_device = NULL;
-
-        if ((err = i2c_detach_client(client)))
-                return err;
-
-        kfree(client);
-        return 0;
-}
-
-static struct i2c_driver max7310_i2c_driver = {
-        .driver = {
-                .name   = "akita-max7310",
-        },
-        .id             = I2C_DRIVERID_AKITAIOEXP,
-        .attach_adapter = max7310_attach_adapter,
-        .detach_client  = max7310_detach_client,
-};
-
-static struct i2c_client max7310_template = {
-        name:   "akita-max7310",
-        driver: &max7310_i2c_driver,
-};
-
-void akita_set_ioexp(struct device *dev, unsigned char bit)
-{
-        ioexp_output_value |= bit;
-
-        if (akita_ioexp_device)
-                schedule_work(&akita_ioexp);
-        return;
-}
-
-void akita_reset_ioexp(struct device *dev, unsigned char bit)
-{
-        ioexp_output_value &= ~bit;
-
-        if (akita_ioexp_device)
-                schedule_work(&akita_ioexp);
-        return;
-}
-
-EXPORT_SYMBOL(akita_set_ioexp);
-EXPORT_SYMBOL(akita_reset_ioexp);
-
-static void akita_ioexp_work(struct work_struct *private_)
-{
-        if (akita_ioexp_device)
-                max7310_set_ouputs(akita_ioexp_device, ioexp_output_value);
-}
-
-
-#ifdef CONFIG_PM
-static int akita_ioexp_suspend(struct platform_device *pdev, pm_message_t state)
-{
-        flush_scheduled_work();
-        return 0;
-}
-
-static int akita_ioexp_resume(struct platform_device *pdev)
-{
-        schedule_work(&akita_ioexp);
-        return 0;
-}
-#else
-#define akita_ioexp_suspend NULL
-#define akita_ioexp_resume NULL
-#endif
-
-static int __init akita_ioexp_probe(struct platform_device *pdev)
-{
-        return i2c_add_driver(&max7310_i2c_driver);
-}
-
-static int akita_ioexp_remove(struct platform_device *pdev)
-{
-        i2c_del_driver(&max7310_i2c_driver);
-        return 0;
-}
-
-static struct platform_driver akita_ioexp_driver = {
-        .probe          = akita_ioexp_probe,
-        .remove         = akita_ioexp_remove,
-        .suspend        = akita_ioexp_suspend,
-        .resume         = akita_ioexp_resume,
-        .driver         = {
-                .name   = "akita-ioexp",
-        },
-};
-
-static int __init akita_ioexp_init(void)
-{
-        return platform_driver_register(&akita_ioexp_driver);
-}
-
-static void __exit akita_ioexp_exit(void)
-{
-        platform_driver_unregister(&akita_ioexp_driver);
-}
-
-MODULE_AUTHOR("Richard Purdie <rpurdie@openedhand.com>");
-MODULE_DESCRIPTION("Akita IO-Expander driver");
-MODULE_LICENSE("GPL");
-
-fs_initcall(akita_ioexp_init);
-module_exit(akita_ioexp_exit);
-
diff --git a/arch/arm/mach-pxa/am200epd.c b/arch/arm/mach-pxa/am200epd.c
new file mode 100644
index 000000000000..b965085a37b9
--- /dev/null
+++ b/arch/arm/mach-pxa/am200epd.c
@@ -0,0 +1,374 @@
+/*
+ * am200epd.c -- Platform device for AM200 EPD kit
+ *
+ * Copyright (C) 2008, Jaya Kumar
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive for
+ * more details.
+ *
+ * Layout is based on skeletonfb.c by James Simmons and Geert Uytterhoeven.
+ *
+ * This work was made possible by help and equipment support from E-Ink
+ * Corporation. http://support.eink.com/community
+ *
+ * This driver is written to be used with the Metronome display controller.
+ * on the AM200 EPD prototype kit/development kit with an E-Ink 800x600
+ * Vizplex EPD on a Gumstix board using the Lyre interface board.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/fb.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/irq.h>
+#include <linux/gpio.h>
+
+#include <mach/pxafb.h>
+
+#include <video/metronomefb.h>
+
+static unsigned int panel_type = 6;
+static struct platform_device *am200_device;
+static struct metronome_board am200_board;
+
+static struct pxafb_mode_info am200_fb_mode_9inch7 = {
+        .pixclock       = 40000,
+        .xres           = 1200,
+        .yres           = 842,
+        .bpp            = 16,
+        .hsync_len      = 2,
+        .left_margin    = 2,
+        .right_margin   = 2,
+        .vsync_len      = 1,
+        .upper_margin   = 2,
+        .lower_margin   = 25,
+        .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+};
+
+static struct pxafb_mode_info am200_fb_mode_8inch = {
+        .pixclock       = 40000,
+        .xres           = 1088,
+        .yres           = 791,
+        .bpp            = 16,
+        .hsync_len      = 28,
+        .left_margin    = 8,
+        .right_margin   = 30,
+        .vsync_len      = 8,
+        .upper_margin   = 10,
+        .lower_margin   = 8,
+        .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+};
+
+static struct pxafb_mode_info am200_fb_mode_6inch = {
+        .pixclock       = 40189,
+        .xres           = 832,
+        .yres           = 622,
+        .bpp            = 16,
+        .hsync_len      = 28,
+        .left_margin    = 34,
+        .right_margin   = 34,
+        .vsync_len      = 25,
+        .upper_margin   = 0,
+        .lower_margin   = 2,
+        .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+};
+
+static struct pxafb_mach_info am200_fb_info = {
+        .modes          = &am200_fb_mode_6inch,
+        .num_modes      = 1,
+        .lcd_conn       = LCD_TYPE_COLOR_TFT | LCD_PCLK_EDGE_FALL |
+                          LCD_AC_BIAS_FREQ(24),
+};
+
+/* register offsets for gpio control */
+#define LED_GPIO_PIN 51
+#define STDBY_GPIO_PIN 48
+#define RST_GPIO_PIN 49
+#define RDY_GPIO_PIN 32
+#define ERR_GPIO_PIN 17
+#define PCBPWR_GPIO_PIN 16
+static int gpios[] = { LED_GPIO_PIN , STDBY_GPIO_PIN , RST_GPIO_PIN,
+                        RDY_GPIO_PIN, ERR_GPIO_PIN, PCBPWR_GPIO_PIN };
+static char *gpio_names[] = { "LED" , "STDBY" , "RST", "RDY", "ERR", "PCBPWR" };
+
+static int am200_init_gpio_regs(struct metronomefb_par *par)
+{
+        int i;
+        int err;
+
+        for (i = 0; i < ARRAY_SIZE(gpios); i++) {
+                err = gpio_request(gpios[i], gpio_names[i]);
+                if (err) {
+                        dev_err(&am200_device->dev, "failed requesting "
+                                "gpio %s, err=%d\n", gpio_names[i], err);
+                        goto err_req_gpio;
+                }
+        }
+
+        gpio_direction_output(LED_GPIO_PIN, 0);
+        gpio_direction_output(STDBY_GPIO_PIN, 0);
+        gpio_direction_output(RST_GPIO_PIN, 0);
+
+        gpio_direction_input(RDY_GPIO_PIN);
+        gpio_direction_input(ERR_GPIO_PIN);
+
+        gpio_direction_output(PCBPWR_GPIO_PIN, 0);
+
+        return 0;
+
+err_req_gpio:
+        while (i > 0)
+                gpio_free(gpios[i--]);
+
+        return err;
+}
+
+static void am200_cleanup(struct metronomefb_par *par)
+{
+        int i;
+
+        free_irq(IRQ_GPIO(RDY_GPIO_PIN), par);
+
+        for (i = 0; i < ARRAY_SIZE(gpios); i++)
+                gpio_free(gpios[i]);
+}
+
+static int am200_share_video_mem(struct fb_info *info)
+{
+        /* rough check if this is our desired fb and not something else */
+        if ((info->var.xres != am200_fb_info.modes->xres)
+                || (info->var.yres != am200_fb_info.modes->yres))
+                return 0;
+
+        /* we've now been notified that we have our new fb */
+        am200_board.metromem = info->screen_base;
+        am200_board.host_fbinfo = info;
+
+        /* try to refcount host drv since we are the consumer after this */
+        if (!try_module_get(info->fbops->owner))
+                return -ENODEV;
+
+        return 0;
+}
+
+static int am200_unshare_video_mem(struct fb_info *info)
+{
+        dev_dbg(&am200_device->dev, "ENTER %s\n", __func__);
+
+        if (info != am200_board.host_fbinfo)
+                return 0;
+
+        module_put(am200_board.host_fbinfo->fbops->owner);
+        return 0;
+}
+
+static int am200_fb_notifier_callback(struct notifier_block *self,
+                                 unsigned long event, void *data)
+{
+        struct fb_event *evdata = data;
+        struct fb_info *info = evdata->info;
+
+        dev_dbg(&am200_device->dev, "ENTER %s\n", __func__);
+
+        if (event == FB_EVENT_FB_REGISTERED)
+                return am200_share_video_mem(info);
+        else if (event == FB_EVENT_FB_UNREGISTERED)
+                return am200_unshare_video_mem(info);
+
+        return 0;
+}
+
+static struct notifier_block am200_fb_notif = {
+        .notifier_call = am200_fb_notifier_callback,
+};
+
+/* this gets called as part of our init. these steps must be done now so
+ * that we can use set_pxa_fb_info */
+static void __init am200_presetup_fb(void)
+{
+        int fw;
+        int fh;
+        int padding_size;
+        int totalsize;
+
+        switch (panel_type) {
+        case 6:
+                am200_fb_info.modes = &am200_fb_mode_6inch;
+                break;
+        case 8:
+                am200_fb_info.modes = &am200_fb_mode_8inch;
+                break;
+        case 97:
+                am200_fb_info.modes = &am200_fb_mode_9inch7;
+                break;
+        default:
+                dev_err(&am200_device->dev, "invalid panel_type selection,"
+                                                " setting to 6\n");
+                am200_fb_info.modes = &am200_fb_mode_6inch;
+                break;
+        }
+
+        /* the frame buffer is divided as follows:
+        command | CRC | padding
+        16kb waveform data | CRC | padding
+        image data | CRC
+        */
+
+        fw = am200_fb_info.modes->xres;
+        fh = am200_fb_info.modes->yres;
+
+        /* waveform must be 16k + 2 for checksum */
+        am200_board.wfm_size = roundup(16*1024 + 2, fw);
+
+        padding_size = PAGE_SIZE + (4 * fw);
+
+        /* total is 1 cmd , 1 wfm, padding and image */
+        totalsize = fw + am200_board.wfm_size + padding_size + (fw*fh);
+
+        /* save this off because we're manipulating fw after this and
+         * we'll need it when we're ready to setup the framebuffer */
+        am200_board.fw = fw;
+        am200_board.fh = fh;
+
+        /* the reason we do this adjustment is because we want to acquire
+         * more framebuffer memory without imposing custom awareness on the
+         * underlying pxafb driver */
+        am200_fb_info.modes->yres = DIV_ROUND_UP(totalsize, fw);
+
+        /* we divide since we told the LCD controller we're 16bpp */
+        am200_fb_info.modes->xres /= 2;
+
+        set_pxa_fb_info(&am200_fb_info);
+
+}
+
+/* this gets called by metronomefb as part of its init, in our case, we
+ * have already completed initial framebuffer init in presetup_fb so we
+ * can just setup the fb access pointers */
+static int am200_setup_fb(struct metronomefb_par *par)
+{
+        int fw;
+        int fh;
+
+        fw = am200_board.fw;
+        fh = am200_board.fh;
+
+        /* metromem was set up by the notifier in share_video_mem so now
+         * we can use its value to calculate the other entries */
+        par->metromem_cmd = (struct metromem_cmd *) am200_board.metromem;
+        par->metromem_wfm = am200_board.metromem + fw;
+        par->metromem_img = par->metromem_wfm + am200_board.wfm_size;
+        par->metromem_img_csum = (u16 *) (par->metromem_img + (fw * fh));
+        par->metromem_dma = am200_board.host_fbinfo->fix.smem_start;
+
+        return 0;
+}
+
+static int am200_get_panel_type(void)
+{
+        return panel_type;
+}
+
+static irqreturn_t am200_handle_irq(int irq, void *dev_id)
+{
+        struct metronomefb_par *par = dev_id;
+
+        wake_up_interruptible(&par->waitq);
+        return IRQ_HANDLED;
+}
+
+static int am200_setup_irq(struct fb_info *info)
+{
+        int ret;
+
+        ret = request_irq(IRQ_GPIO(RDY_GPIO_PIN), am200_handle_irq,
+                                IRQF_DISABLED|IRQF_TRIGGER_FALLING,
+                                "AM200", info->par);
+        if (ret)
+                dev_err(&am200_device->dev, "request_irq failed: %d\n", ret);
+
+        return ret;
+}
+
+static void am200_set_rst(struct metronomefb_par *par, int state)
+{
+        gpio_set_value(RST_GPIO_PIN, state);
+}
+
+static void am200_set_stdby(struct metronomefb_par *par, int state)
+{
+        gpio_set_value(STDBY_GPIO_PIN, state);
+}
+
+static int am200_wait_event(struct metronomefb_par *par)
+{
+        return wait_event_timeout(par->waitq, gpio_get_value(RDY_GPIO_PIN), HZ);
+}
+
+static int am200_wait_event_intr(struct metronomefb_par *par)
+{
+        return wait_event_interruptible_timeout(par->waitq,
+                                        gpio_get_value(RDY_GPIO_PIN), HZ);
+}
+
+static struct metronome_board am200_board = {
+        .owner                  = THIS_MODULE,
+        .setup_irq              = am200_setup_irq,
+        .setup_io               = am200_init_gpio_regs,
+        .setup_fb               = am200_setup_fb,
+        .set_rst                = am200_set_rst,
+        .set_stdby              = am200_set_stdby,
+        .met_wait_event         = am200_wait_event,
+        .met_wait_event_intr    = am200_wait_event_intr,
+        .get_panel_type         = am200_get_panel_type,
+        .cleanup                = am200_cleanup,
+};
+
+static int __init am200_init(void)
+{
+        int ret;
+
+        /* before anything else, we request notification for any fb
+         * creation events */
+        fb_register_client(&am200_fb_notif);
+
+        /* request our platform independent driver */
+        request_module("metronomefb");
+
+        am200_device = platform_device_alloc("metronomefb", -1);
+        if (!am200_device)
+                return -ENOMEM;
+
+        /* the am200_board that will be seen by metronomefb is a copy */
+        platform_device_add_data(am200_device, &am200_board,
+                                        sizeof(am200_board));
+
+        /* this _add binds metronomefb to am200. metronomefb refcounts am200 */
+        ret = platform_device_add(am200_device);
+
+        if (ret) {
+                platform_device_put(am200_device);
+                fb_unregister_client(&am200_fb_notif);
+                return ret;
+        }
+
+        am200_presetup_fb();
+
+        return 0;
+}
+
+module_param(panel_type, uint, 0);
+MODULE_PARM_DESC(panel_type, "Select the panel type: 6, 8, 97");
+
+module_init(am200_init);
+
+MODULE_DESCRIPTION("board driver for am200 metronome epd kit");
+MODULE_AUTHOR("Jaya Kumar");
+MODULE_LICENSE("GPL");
diff --git a/arch/arm/mach-pxa/cm-x255.c b/arch/arm/mach-pxa/cm-x255.c
new file mode 100644
index 000000000000..83a4cdf08176
--- /dev/null
+++ b/arch/arm/mach-pxa/cm-x255.c
@@ -0,0 +1,258 @@
+/*
+ * linux/arch/arm/mach-pxa/cm-x255.c
+ *
+ * Copyright (C) 2007, 2008 CompuLab, Ltd.
+ * Mike Rapoport <mike@compulab.co.il>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/irq.h>
+#include <linux/gpio.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <linux/mtd/nand-gpio.h>
+
+#include <linux/spi/spi.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach-types.h>
+#include <asm/mach/map.h>
+
+#include <mach/pxa2xx-regs.h>
+#include <mach/mfp-pxa25x.h>
+#include <mach/pxa2xx_spi.h>
+#include <mach/bitfield.h>
+
+#include "generic.h"
+
+#define GPIO_NAND_CS    (5)
+#define GPIO_NAND_ALE   (4)
+#define GPIO_NAND_CLE   (3)
+#define GPIO_NAND_RB    (10)
+
+static unsigned long cmx255_pin_config[] = {
+        /* AC'97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+
+        /* BTUART */
+        GPIO42_BTUART_RXD,
+        GPIO43_BTUART_TXD,
+        GPIO44_BTUART_CTS,
+        GPIO45_BTUART_RTS,
+
+        /* STUART */
+        GPIO46_STUART_RXD,
+        GPIO47_STUART_TXD,
+
+        /* LCD */
+        GPIO58_LCD_LDD_0,
+        GPIO59_LCD_LDD_1,
+        GPIO60_LCD_LDD_2,
+        GPIO61_LCD_LDD_3,
+        GPIO62_LCD_LDD_4,
+        GPIO63_LCD_LDD_5,
+        GPIO64_LCD_LDD_6,
+        GPIO65_LCD_LDD_7,
+        GPIO66_LCD_LDD_8,
+        GPIO67_LCD_LDD_9,
+        GPIO68_LCD_LDD_10,
+        GPIO69_LCD_LDD_11,
+        GPIO70_LCD_LDD_12,
+        GPIO71_LCD_LDD_13,
+        GPIO72_LCD_LDD_14,
+        GPIO73_LCD_LDD_15,
+        GPIO74_LCD_FCLK,
+        GPIO75_LCD_LCLK,
+        GPIO76_LCD_PCLK,
+        GPIO77_LCD_BIAS,
+
+        /* SSP1 */
+        GPIO23_SSP1_SCLK,
+        GPIO24_SSP1_SFRM,
+        GPIO25_SSP1_TXD,
+        GPIO26_SSP1_RXD,
+
+        /* SSP2 */
+        GPIO81_SSP2_CLK_OUT,
+        GPIO82_SSP2_FRM_OUT,
+        GPIO83_SSP2_TXD,
+        GPIO84_SSP2_RXD,
+
+        /* PC Card */
+        GPIO48_nPOE,
+        GPIO49_nPWE,
+        GPIO50_nPIOR,
+        GPIO51_nPIOW,
+        GPIO52_nPCE_1,
+        GPIO53_nPCE_2,
+        GPIO54_nPSKTSEL,
+        GPIO55_nPREG,
+        GPIO56_nPWAIT,
+        GPIO57_nIOIS16,
+
+        /* SDRAM and local bus */
+        GPIO15_nCS_1,
+        GPIO78_nCS_2,
+        GPIO79_nCS_3,
+        GPIO80_nCS_4,
+        GPIO33_nCS_5,
+        GPIO18_RDY,
+
+        /* GPIO */
+        GPIO0_GPIO      | WAKEUP_ON_EDGE_BOTH,
+        GPIO9_GPIO,                             /* PC card reset */
+
+        /* NAND controls */
+        GPIO5_GPIO      | MFP_LPM_DRIVE_HIGH,   /* NAND CE# */
+        GPIO4_GPIO      | MFP_LPM_DRIVE_LOW,    /* NAND ALE */
+        GPIO3_GPIO      | MFP_LPM_DRIVE_LOW,    /* NAND CLE */
+        GPIO10_GPIO,                            /* NAND Ready/Busy */
+
+        /* interrupts */
+        GPIO22_GPIO,    /* DM9000 interrupt */
+};
+
+#if defined(CONFIG_SPI_PXA2XX)
+static struct pxa2xx_spi_master pxa_ssp_master_info = {
+        .num_chipselect = 1,
+};
+
+static struct spi_board_info spi_board_info[] __initdata = {
+        [0] = {
+                .modalias       = "rtc-max6902",
+                .max_speed_hz   = 1000000,
+                .bus_num        = 1,
+                .chip_select    = 0,
+        },
+};
+
+static void __init cmx255_init_rtc(void)
+{
+        pxa2xx_set_spi_info(1, &pxa_ssp_master_info);
+        spi_register_board_info(ARRAY_AND_SIZE(spi_board_info));
+}
+#else
+static inline void cmx255_init_rtc(void) {}
+#endif
+
+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
+static struct mtd_partition cmx255_nor_partitions[] = {
+        {
+                .name           = "ARMmon",
+                .size           = 0x00030000,
+                .offset         = 0,
+                .mask_flags     = MTD_WRITEABLE  /* force read-only */
+        } , {
+                .name           = "ARMmon setup block",
+                .size           = 0x00010000,
+                .offset         = MTDPART_OFS_APPEND,
+                .mask_flags     = MTD_WRITEABLE  /* force read-only */
+        } , {
+                .name           = "kernel",
+                .size           = 0x00160000,
+                .offset         = MTDPART_OFS_APPEND,
+        } , {
+                .name           = "ramdisk",
+                .size           = MTDPART_SIZ_FULL,
+                .offset         = MTDPART_OFS_APPEND
+        }
+};
+
+static struct physmap_flash_data cmx255_nor_flash_data[] = {
+        {
+                .width          = 2,    /* bankwidth in bytes */
+                .parts          = cmx255_nor_partitions,
+                .nr_parts       = ARRAY_SIZE(cmx255_nor_partitions)
+        }
+};
+
+static struct resource cmx255_nor_resource = {
+        .start  = PXA_CS0_PHYS,
+        .end    = PXA_CS0_PHYS + SZ_8M - 1,
+        .flags  = IORESOURCE_MEM,
+};
+
+static struct platform_device cmx255_nor = {
+        .name   = "physmap-flash",
+        .id     = -1,
+        .dev    = {
+                .platform_data = cmx255_nor_flash_data,
+        },
+        .resource = &cmx255_nor_resource,
+        .num_resources = 1,
+};
+
+static void __init cmx255_init_nor(void)
+{
+        platform_device_register(&cmx255_nor);
+}
+#else
+static inline void cmx255_init_nor(void) {}
+#endif
+
+#if defined(CONFIG_MTD_NAND_GPIO) || defined(CONFIG_MTD_NAND_GPIO_MODULE)
+static struct resource cmx255_nand_resource[] = {
+        [0] = {
+                .start = PXA_CS1_PHYS,
+                .end   = PXA_CS1_PHYS + 11,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = PXA_CS5_PHYS,
+                .end   = PXA_CS5_PHYS + 3,
+                .flags = IORESOURCE_MEM,
+        },
+};
+
+static struct mtd_partition cmx255_nand_parts[] = {
+        [0] = {
+                .name   = "cmx255-nand",
+                .size   = MTDPART_SIZ_FULL,
+                .offset = 0,
+        },
+};
+
+static struct gpio_nand_platdata cmx255_nand_platdata = {
+        .gpio_nce = GPIO_NAND_CS,
+        .gpio_cle = GPIO_NAND_CLE,
+        .gpio_ale = GPIO_NAND_ALE,
+        .gpio_rdy = GPIO_NAND_RB,
+        .gpio_nwp = -1,
+        .parts = cmx255_nand_parts,
+        .num_parts = ARRAY_SIZE(cmx255_nand_parts),
+        .chip_delay = 25,
+};
+
+static struct platform_device cmx255_nand = {
+        .name           = "gpio-nand",
+        .num_resources  = ARRAY_SIZE(cmx255_nand_resource),
+        .resource       = cmx255_nand_resource,
+        .id             = -1,
+        .dev            = {
+                .platform_data = &cmx255_nand_platdata,
+        }
+};
+
+static void __init cmx255_init_nand(void)
+{
+        platform_device_register(&cmx255_nand);
+}
+#else
+static inline void cmx255_init_nand(void) {}
+#endif
+
+void __init cmx255_init(void)
+{
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx255_pin_config));
+
+        cmx255_init_rtc();
+        cmx255_init_nor();
+        cmx255_init_nand();
+}
diff --git a/arch/arm/mach-pxa/cm-x270-pci.h b/arch/arm/mach-pxa/cm-x270-pci.h
deleted file mode 100644
index 48f532f4cb51..000000000000
--- a/arch/arm/mach-pxa/cm-x270-pci.h
+++ /dev/null
@@ -1,13 +0,0 @@
-extern void __cmx270_pci_init_irq(int irq_gpio);
-extern void __cmx270_pci_suspend(void);
-extern void __cmx270_pci_resume(void);
-
-#ifdef CONFIG_PCI
-#define cmx270_pci_init_irq(x) __cmx270_pci_init_irq(x)
-#define cmx270_pci_suspend(x) __cmx270_pci_suspend(x)
-#define cmx270_pci_resume(x) __cmx270_pci_resume(x)
-#else
-#define cmx270_pci_init_irq(x) do {} while (0)
-#define cmx270_pci_suspend(x) do {} while (0)
-#define cmx270_pci_resume(x) do {} while (0)
-#endif
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c
index af003a269534..a82dad1a8cc8 100644
--- a/arch/arm/mach-pxa/cm-x270.c
+++ b/arch/arm/mach-pxa/cm-x270.c
@@ -14,46 +14,22 @@
 #include <linux/irq.h>
 #include <linux/gpio.h>
 
-#include <linux/dm9000.h>
 #include <linux/rtc-v3020.h>
 #include <video/mbxfb.h>
-#include <linux/leds.h>
 
-#include <asm/mach/arch.h>
-#include <asm/mach-types.h>
-#include <asm/mach/map.h>
-
-#include <mach/pxa2xx-regs.h>
 #include <mach/mfp-pxa27x.h>
-#include <mach/pxa-regs.h>
-#include <mach/audio.h>
-#include <mach/pxafb.h>
 #include <mach/ohci.h>
 #include <mach/mmc.h>
-#include <mach/bitfield.h>
-
-#include <asm/hardware/it8152.h>
 
 #include "generic.h"
-#include "cm-x270-pci.h"
-
-/* virtual addresses for statically mapped regions */
-#define CMX270_VIRT_BASE        (0xe8000000)
-#define CMX270_IT8152_VIRT      (CMX270_VIRT_BASE)
 
+/* physical address if local-bus attached devices */
 #define RTC_PHYS_BASE           (PXA_CS1_PHYS + (5 << 22))
-#define DM9000_PHYS_BASE        (PXA_CS1_PHYS + (6 << 22))
 
 /* GPIO IRQ usage */
-#define GPIO10_ETHIRQ           (10)
-#define GPIO22_IT8152_IRQ       (22)
 #define GPIO83_MMC_IRQ          (83)
-#define GPIO95_GFXIRQ           (95)
 
-#define CMX270_ETHIRQ           IRQ_GPIO(GPIO10_ETHIRQ)
-#define CMX270_IT8152_IRQ       IRQ_GPIO(GPIO22_IT8152_IRQ)
 #define CMX270_MMC_IRQ          IRQ_GPIO(GPIO83_MMC_IRQ)
-#define CMX270_GFXIRQ           IRQ_GPIO(GPIO95_GFXIRQ)
 
 /* MMC power enable */
 #define GPIO105_MMC_POWER       (105)
@@ -157,62 +133,6 @@ static unsigned long cmx270_pin_config[] = {
         GPIO83_GPIO,    /* MMC card detect */
 };
 
-#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
-static struct resource cmx270_dm9000_resource[] = {
-        [0] = {
-                .start = DM9000_PHYS_BASE,
-                .end   = DM9000_PHYS_BASE + 4,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = DM9000_PHYS_BASE + 8,
-                .end   = DM9000_PHYS_BASE + 8 + 500,
-                .flags = IORESOURCE_MEM,
-        },
-        [2] = {
-                .start = CMX270_ETHIRQ,
-                .end   = CMX270_ETHIRQ,
-                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
-        }
-};
-
-static struct dm9000_plat_data cmx270_dm9000_platdata = {
-        .flags          = DM9000_PLATF_32BITONLY,
-};
-
-static struct platform_device cmx270_dm9000_device = {
-        .name           = "dm9000",
-        .id             = 0,
-        .num_resources  = ARRAY_SIZE(cmx270_dm9000_resource),
-        .resource       = cmx270_dm9000_resource,
-        .dev            = {
-                .platform_data = &cmx270_dm9000_platdata,
-        }
-};
-
-static void __init cmx270_init_dm9000(void)
-{
-        platform_device_register(&cmx270_dm9000_device);
-}
-#else
-static inline void cmx270_init_dm9000(void) {}
-#endif
-
-/* UCB1400 touchscreen controller */
-#if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
-static struct platform_device cmx270_ts_device = {
-        .name           = "ucb1400_ts",
-        .id             = -1,
-};
-
-static void __init cmx270_init_touchscreen(void)
-{
-        platform_device_register(&cmx270_ts_device);
-}
-#else
-static inline void cmx270_init_touchscreen(void) {}
-#endif
-
 /* V3020 RTC */
 #if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
 static struct resource cmx270_v3020_resource[] = {
@@ -242,45 +162,7 @@ static void __init cmx270_init_rtc(void)
         platform_device_register(&cmx270_rtc_device);
 }
 #else
-static inline void cmx270_init_rtc(void) {}
-#endif
-
-/* CM-X270 LEDs */
-#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
-static struct gpio_led cmx270_leds[] = {
-        [0] = {
-                .name = "cm-x270:red",
-                .default_trigger = "nand-disk",
-                .gpio = 93,
-                .active_low = 1,
-        },
-        [1] = {
-                .name = "cm-x270:green",
-                .default_trigger = "heartbeat",
-                .gpio = 94,
-                .active_low = 1,
-        },
-};
-
-static struct gpio_led_platform_data cmx270_gpio_led_pdata = {
-        .num_leds = ARRAY_SIZE(cmx270_leds),
-        .leds = cmx270_leds,
-};
-
-static struct platform_device cmx270_led_device = {
-        .name           = "leds-gpio",
-        .id             = -1,
-        .dev            = {
-                .platform_data = &cmx270_gpio_led_pdata,
-        },
-};
-
-static void __init cmx270_init_leds(void)
-{
-        platform_device_register(&cmx270_led_device);
-}
-#else
-static inline void cmx270_init_leds(void) {}
+static inline void cmx2xx_init_rtc(void) {}
 #endif
 
 /* 2700G graphics */
@@ -373,238 +255,11 @@ static void __init cmx270_init_2700G(void)
 static inline void cmx270_init_2700G(void) {}
 #endif
 
-#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
-/*
-  Display definitions
-  keep these for backwards compatibility, although symbolic names (as
-  e.g. in lpd270.c) looks better
-*/
-#define MTYPE_STN320x240        0
-#define MTYPE_TFT640x480        1
-#define MTYPE_CRT640x480        2
-#define MTYPE_CRT800x600        3
-#define MTYPE_TFT320x240        6
-#define MTYPE_STN640x480        7
-
-static struct pxafb_mode_info generic_stn_320x240_mode = {
-        .pixclock       = 76923,
-        .bpp            = 8,
-        .xres           = 320,
-        .yres           = 240,
-        .hsync_len      = 3,
-        .vsync_len      = 2,
-        .left_margin    = 3,
-        .upper_margin   = 0,
-        .right_margin   = 3,
-        .lower_margin   = 0,
-        .sync           = (FB_SYNC_HOR_HIGH_ACT |
-                           FB_SYNC_VERT_HIGH_ACT),
-        .cmap_greyscale = 0,
-};
-
-static struct pxafb_mach_info generic_stn_320x240 = {
-        .modes          = &generic_stn_320x240_mode,
-        .num_modes      = 1,
-        .lccr0          = 0,
-        .lccr3          = (LCCR3_PixClkDiv(0x03) |
-                           LCCR3_Acb(0xff) |
-                           LCCR3_PCP),
-        .cmap_inverse   = 0,
-        .cmap_static    = 0,
-};
-
-static struct pxafb_mode_info generic_tft_640x480_mode = {
-        .pixclock       = 38461,
-        .bpp            = 8,
-        .xres           = 640,
-        .yres           = 480,
-        .hsync_len      = 60,
-        .vsync_len      = 2,
-        .left_margin    = 70,
-        .upper_margin   = 10,
-        .right_margin   = 70,
-        .lower_margin   = 5,
-        .sync           = 0,
-        .cmap_greyscale = 0,
-};
-
-static struct pxafb_mach_info generic_tft_640x480 = {
-        .modes          = &generic_tft_640x480_mode,
-        .num_modes      = 1,
-        .lccr0          = (LCCR0_PAS),
-        .lccr3          = (LCCR3_PixClkDiv(0x01) |
-                           LCCR3_Acb(0xff) |
-                           LCCR3_PCP),
-        .cmap_inverse   = 0,
-        .cmap_static    = 0,
-};
-
-static struct pxafb_mode_info generic_crt_640x480_mode = {
-        .pixclock       = 38461,
-        .bpp            = 8,
-        .xres           = 640,
-        .yres           = 480,
-        .hsync_len      = 63,
-        .vsync_len      = 2,
-        .left_margin    = 81,
-        .upper_margin   = 33,
-        .right_margin   = 16,
-        .lower_margin   = 10,
-        .sync           = (FB_SYNC_HOR_HIGH_ACT |
-                           FB_SYNC_VERT_HIGH_ACT),
-        .cmap_greyscale = 0,
-};
-
-static struct pxafb_mach_info generic_crt_640x480 = {
-        .modes          = &generic_crt_640x480_mode,
-        .num_modes      = 1,
-        .lccr0          = (LCCR0_PAS),
-        .lccr3          = (LCCR3_PixClkDiv(0x01) |
-                           LCCR3_Acb(0xff)),
-        .cmap_inverse   = 0,
-        .cmap_static    = 0,
-};
-
-static struct pxafb_mode_info generic_crt_800x600_mode = {
-        .pixclock       = 28846,
-        .bpp            = 8,
-        .xres           = 800,
-        .yres           = 600,
-        .hsync_len      = 63,
-        .vsync_len      = 2,
-        .left_margin    = 26,
-        .upper_margin   = 21,
-        .right_margin   = 26,
-        .lower_margin   = 11,
-        .sync           = (FB_SYNC_HOR_HIGH_ACT |
-                           FB_SYNC_VERT_HIGH_ACT),
-        .cmap_greyscale = 0,
-};
-
-static struct pxafb_mach_info generic_crt_800x600 = {
-        .modes          = &generic_crt_800x600_mode,
-        .num_modes      = 1,
-        .lccr0          = (LCCR0_PAS),
-        .lccr3          = (LCCR3_PixClkDiv(0x02) |
-                           LCCR3_Acb(0xff)),
-        .cmap_inverse   = 0,
-        .cmap_static    = 0,
-};
-
-static struct pxafb_mode_info generic_tft_320x240_mode = {
-        .pixclock       = 134615,
-        .bpp            = 16,
-        .xres           = 320,
-        .yres           = 240,
-        .hsync_len      = 63,
-        .vsync_len      = 7,
-        .left_margin    = 75,
-        .upper_margin   = 0,
-        .right_margin   = 15,
-        .lower_margin   = 15,
-        .sync           = 0,
-        .cmap_greyscale = 0,
-};
-
-static struct pxafb_mach_info generic_tft_320x240 = {
-        .modes          = &generic_tft_320x240_mode,
-        .num_modes      = 1,
-        .lccr0          = (LCCR0_PAS),
-        .lccr3          = (LCCR3_PixClkDiv(0x06) |
-                           LCCR3_Acb(0xff) |
-                           LCCR3_PCP),
-        .cmap_inverse   = 0,
-        .cmap_static    = 0,
-};
-
-static struct pxafb_mode_info generic_stn_640x480_mode = {
-        .pixclock       = 57692,
-        .bpp            = 8,
-        .xres           = 640,
-        .yres           = 480,
-        .hsync_len      = 4,
-        .vsync_len      = 2,
-        .left_margin    = 10,
-        .upper_margin   = 5,
-        .right_margin   = 10,
-        .lower_margin   = 5,
-        .sync           = (FB_SYNC_HOR_HIGH_ACT |
-                           FB_SYNC_VERT_HIGH_ACT),
-        .cmap_greyscale = 0,
-};
-
-static struct pxafb_mach_info generic_stn_640x480 = {
-        .modes          = &generic_stn_640x480_mode,
-        .num_modes      = 1,
-        .lccr0          = 0,
-        .lccr3          = (LCCR3_PixClkDiv(0x02) |
-                           LCCR3_Acb(0xff)),
-        .cmap_inverse   = 0,
-        .cmap_static    = 0,
-};
-
-static struct pxafb_mach_info *cmx270_display = &generic_crt_640x480;
-
-static int __init cmx270_set_display(char *str)
-{
-        int disp_type = simple_strtol(str, NULL, 0);
-        switch (disp_type) {
-        case MTYPE_STN320x240:
-                cmx270_display = &generic_stn_320x240;
-                break;
-        case MTYPE_TFT640x480:
-                cmx270_display = &generic_tft_640x480;
-                break;
-        case MTYPE_CRT640x480:
-                cmx270_display = &generic_crt_640x480;
-                break;
-        case MTYPE_CRT800x600:
-                cmx270_display = &generic_crt_800x600;
-                break;
-        case MTYPE_TFT320x240:
-                cmx270_display = &generic_tft_320x240;
-                break;
-        case MTYPE_STN640x480:
-                cmx270_display = &generic_stn_640x480;
-                break;
-        default: /* fallback to CRT 640x480 */
-                cmx270_display = &generic_crt_640x480;
-                break;
-        }
-        return 1;
-}
-
-/*
-   This should be done really early to get proper configuration for
-   frame buffer.
-   Indeed, pxafb parameters can be used istead, but CM-X270 bootloader
-   has limitied line length for kernel command line, and also it will
-   break compatibitlty with proprietary releases already in field.
-*/
-__setup("monitor=", cmx270_set_display);
-
-static void __init cmx270_init_display(void)
-{
-        set_pxa_fb_info(cmx270_display);
-}
-#else
-static inline void cmx270_init_display(void) {}
-#endif
-
 /* PXA27x OHCI controller setup */
 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
-static int cmx270_ohci_init(struct device *dev)
-{
-        /* Set the Power Control Polarity Low */
-        UHCHR = (UHCHR | UHCHR_PCPL) &
-                ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE);
-
-        return 0;
-}
-
 static struct pxaohci_platform_data cmx270_ohci_platform_data = {
         .port_mode      = PMM_PERPORT_MODE,
-        .init           = cmx270_ohci_init,
+        .flags          = ENABLE_PORT1 | ENABLE_PORT2 | POWER_CONTROL_LOW,
 };
 
 static void __init cmx270_init_ohci(void)
@@ -676,131 +331,12 @@ static void __init cmx270_init_mmc(void)
 static inline void cmx270_init_mmc(void) {}
 #endif
 
-#ifdef CONFIG_PM
-static unsigned long sleep_save_msc[10];
-
-static int cmx270_suspend(struct sys_device *dev, pm_message_t state)
-{
-        cmx270_pci_suspend();
-
-        /* save MSC registers */
-        sleep_save_msc[0] = MSC0;
-        sleep_save_msc[1] = MSC1;
-        sleep_save_msc[2] = MSC2;
-
-        /* setup power saving mode registers */
-        PCFR = 0x0;
-        PSLR = 0xff400000;
-        PMCR  = 0x00000005;
-        PWER  = 0x80000000;
-        PFER  = 0x00000000;
-        PRER  = 0x00000000;
-        PGSR0 = 0xC0018800;
-        PGSR1 = 0x004F0002;
-        PGSR2 = 0x6021C000;
-        PGSR3 = 0x00020000;
-
-        return 0;
-}
-
-static int cmx270_resume(struct sys_device *dev)
-{
-        cmx270_pci_resume();
-
-        /* restore MSC registers */
-        MSC0 = sleep_save_msc[0];
-        MSC1 = sleep_save_msc[1];
-        MSC2 = sleep_save_msc[2];
-
-        return 0;
-}
-
-static struct sysdev_class cmx270_pm_sysclass = {
-        .name = "pm",
-        .resume = cmx270_resume,
-        .suspend = cmx270_suspend,
-};
-
-static struct sys_device cmx270_pm_device = {
-        .cls = &cmx270_pm_sysclass,
-};
-
-static int __init cmx270_pm_init(void)
-{
-        int error;
-        error = sysdev_class_register(&cmx270_pm_sysclass);
-        if (error == 0)
-                error = sysdev_register(&cmx270_pm_device);
-        return error;
-}
-#else
-static int __init cmx270_pm_init(void) { return 0; }
-#endif
-
-#if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE)
-static void __init cmx270_init_ac97(void)
-{
-        pxa_set_ac97_info(NULL);
-}
-#else
-static inline void cmx270_init_ac97(void) {}
-#endif
-
-static void __init cmx270_init(void)
+void __init cmx270_init(void)
 {
-        cmx270_pm_init();
-
         pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_pin_config));
 
-        cmx270_init_dm9000();
         cmx270_init_rtc();
-        cmx270_init_display();
         cmx270_init_mmc();
         cmx270_init_ohci();
-        cmx270_init_ac97();
-        cmx270_init_touchscreen();
-        cmx270_init_leds();
         cmx270_init_2700G();
 }
-
-static void __init cmx270_init_irq(void)
-{
-        pxa27x_init_irq();
-
-        cmx270_pci_init_irq(GPIO22_IT8152_IRQ);
-}
-
-#ifdef CONFIG_PCI
-/* Map PCI companion statically */
-static struct map_desc cmx270_io_desc[] __initdata = {
-        [0] = { /* PCI bridge */
-                .virtual        = CMX270_IT8152_VIRT,
-                .pfn            = __phys_to_pfn(PXA_CS4_PHYS),
-                .length         = SZ_64M,
-                .type           = MT_DEVICE
-        },
-};
-
-static void __init cmx270_map_io(void)
-{
-        pxa_map_io();
-        iotable_init(cmx270_io_desc, ARRAY_SIZE(cmx270_io_desc));
-
-        it8152_base_address = CMX270_IT8152_VIRT;
-}
-#else
-static void __init cmx270_map_io(void)
-{
-        pxa_map_io();
-}
-#endif
-
-MACHINE_START(ARMCORE, "Compulab CM-x270")
-        .boot_params    = 0xa0000100,
-        .phys_io        = 0x40000000,
-        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
-        .map_io         = cmx270_map_io,
-        .init_irq       = cmx270_init_irq,
-        .timer          = &pxa_timer,
-        .init_machine   = cmx270_init,
-MACHINE_END
diff --git a/arch/arm/mach-pxa/cm-x270-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c
index 2d5bcea1e520..3156b25f6e9d 100644
--- a/arch/arm/mach-pxa/cm-x270-pci.c
+++ b/arch/arm/mach-pxa/cm-x2xx-pci.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/arm/mach-pxa/cm-x270-pci.c
+ * linux/arch/arm/mach-pxa/cm-x2xx-pci.c
  *
  * PCI bios-type initialisation for PCI machines
  *
@@ -28,7 +28,7 @@
 #include <asm/hardware/it8152.h>
 
 unsigned long it8152_base_address;
-static int cmx270_it8152_irq_gpio;
+static int cmx2xx_it8152_irq_gpio;
 
 /*
  * Only first 64MB of memory can be accessed via PCI.
@@ -36,13 +36,13 @@ static int cmx270_it8152_irq_gpio;
  * This is really ugly and we need a better way of specifying
  * DMA-capable regions of memory.
  */
-void __init cmx270_pci_adjust_zones(int node, unsigned long *zone_size,
+void __init cmx2xx_pci_adjust_zones(int node, unsigned long *zone_size,
         unsigned long *zhole_size)
 {
         unsigned int sz = SZ_64M >> PAGE_SHIFT;
 
         if (machine_is_armcore()) {
-                pr_info("Adjusting zones for CM-X270\n");
+                pr_info("Adjusting zones for CM-X2XX\n");
 
                 /*
                  * Only adjust if > 64M on current system
@@ -57,29 +57,29 @@ void __init cmx270_pci_adjust_zones(int node, unsigned long *zone_size,
         }
 }
 
-static void cmx270_it8152_irq_demux(unsigned int irq, struct irq_desc *desc)
+static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc)
 {
         /* clear our parent irq */
-        GEDR(cmx270_it8152_irq_gpio) = GPIO_bit(cmx270_it8152_irq_gpio);
+        GEDR(cmx2xx_it8152_irq_gpio) = GPIO_bit(cmx2xx_it8152_irq_gpio);
 
         it8152_irq_demux(irq, desc);
 }
 
-void __cmx270_pci_init_irq(int irq_gpio)
+void __cmx2xx_pci_init_irq(int irq_gpio)
 {
         it8152_init_irq();
 
-        cmx270_it8152_irq_gpio = irq_gpio;
+        cmx2xx_it8152_irq_gpio = irq_gpio;
 
         set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING);
 
-        set_irq_chained_handler(gpio_to_irq(irq_gpio), cmx270_it8152_irq_demux);
+        set_irq_chained_handler(gpio_to_irq(irq_gpio), cmx2xx_it8152_irq_demux);
 }
 
 #ifdef CONFIG_PM
 static unsigned long sleep_save_ite[10];
 
-void __cmx270_pci_suspend(void)
+void __cmx2xx_pci_suspend(void)
 {
         /* save ITE state */
         sleep_save_ite[0] = __raw_readl(IT8152_INTC_PDCNIMR);
@@ -91,7 +91,7 @@ void __cmx270_pci_suspend(void)
         __raw_writel((0), IT8152_INTC_LPCNIRR);
 }
 
-void __cmx270_pci_resume(void)
+void __cmx2xx_pci_resume(void)
 {
         /* restore IT8152 state */
         __raw_writel((sleep_save_ite[0]), IT8152_INTC_PDCNIMR);
@@ -99,12 +99,12 @@ void __cmx270_pci_resume(void)
         __raw_writel((sleep_save_ite[2]), IT8152_INTC_LPNIAR);
 }
 #else
-void cmx270_pci_suspend(void) {}
-void cmx270_pci_resume(void) {}
+void cmx2xx_pci_suspend(void) {}
+void cmx2xx_pci_resume(void) {}
 #endif
 
 /* PCI IRQ mapping*/
-static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+static int __init cmx2xx_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
 {
         int irq;
 
@@ -116,14 +116,14 @@ static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
 
         /*
           Here comes the ugly part. The routing is baseboard specific,
-          but defining a platform for each possible base of CM-X270 is
-          unrealistic. Here we keep mapping for ATXBase and SB-X270.
+          but defining a platform for each possible base of CM-X2XX is
+          unrealistic. Here we keep mapping for ATXBase and SB-X2XX.
         */
         /* ATXBASE PCI slot */
         if (slot == 7)
                 return IT8152_PCI_INTA;
 
-        /* ATXBase/SB-x270 CardBus */
+        /* ATXBase/SB-X2XX CardBus */
         if (slot == 8 || slot == 0)
                 return IT8152_PCI_INTB;
 
@@ -131,7 +131,11 @@ static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
         if (slot == 9)
                 return IT8152_PCI_INTA;
 
-        /* SB-x270 Ethernet */
+        /* CM-x255 Onboard Ethernet */
+        if (slot == 15)
+                return IT8152_PCI_INTC;
+
+        /* SB-x2xx Ethernet */
         if (slot == 16)
                 return IT8152_PCI_INTA;
 
@@ -144,9 +148,9 @@ static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
         return(0);
 }
 
-static void cmx270_pci_preinit(void)
+static void cmx2xx_pci_preinit(void)
 {
-        pr_info("Initializing CM-X270 PCI subsystem\n");
+        pr_info("Initializing CM-X2XX PCI subsystem\n");
 
         __raw_writel(0x800, IT8152_PCI_CFG_ADDR);
         if (__raw_readl(IT8152_PCI_CFG_DATA) == 0x81521283) {
@@ -200,21 +204,21 @@ static void cmx270_pci_preinit(void)
         }
 }
 
-static struct hw_pci cmx270_pci __initdata = {
+static struct hw_pci cmx2xx_pci __initdata = {
         .swizzle        = pci_std_swizzle,
-        .map_irq        = cmx270_pci_map_irq,
+        .map_irq        = cmx2xx_pci_map_irq,
         .nr_controllers = 1,
         .setup          = it8152_pci_setup,
         .scan           = it8152_pci_scan_bus,
-        .preinit        = cmx270_pci_preinit,
+        .preinit        = cmx2xx_pci_preinit,
 };
 
-static int __init cmx270_init_pci(void)
+static int __init cmx2xx_init_pci(void)
 {
         if (machine_is_armcore())
-                pci_common_init(&cmx270_pci);
+                pci_common_init(&cmx2xx_pci);
 
         return 0;
 }
 
-subsys_initcall(cmx270_init_pci);
+subsys_initcall(cmx2xx_init_pci);
diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.h b/arch/arm/mach-pxa/cm-x2xx-pci.h
new file mode 100644
index 000000000000..e24aad2e3ad7
--- /dev/null
+++ b/arch/arm/mach-pxa/cm-x2xx-pci.h
@@ -0,0 +1,13 @@
+extern void __cmx2xx_pci_init_irq(int irq_gpio);
+extern void __cmx2xx_pci_suspend(void);
+extern void __cmx2xx_pci_resume(void);
+
+#ifdef CONFIG_PCI
+#define cmx2xx_pci_init_irq(x) __cmx2xx_pci_init_irq(x)
+#define cmx2xx_pci_suspend(x) __cmx2xx_pci_suspend(x)
+#define cmx2xx_pci_resume(x) __cmx2xx_pci_resume(x)
+#else
+#define cmx2xx_pci_init_irq(x) do {} while (0)
+#define cmx2xx_pci_suspend(x) do {} while (0)
+#define cmx2xx_pci_resume(x) do {} while (0)
+#endif
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
new file mode 100644
index 000000000000..0b3ce3b6d896
--- /dev/null
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -0,0 +1,531 @@
+/*
+ * linux/arch/arm/mach-pxa/cm-x2xx.c
+ *
+ * Copyright (C) 2008 CompuLab, Ltd.
+ * Mike Rapoport <mike@compulab.co.il>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/sysdev.h>
+#include <linux/irq.h>
+#include <linux/gpio.h>
+
+#include <linux/dm9000.h>
+#include <linux/leds.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach-types.h>
+#include <asm/mach/map.h>
+
+#include <mach/pxa2xx-regs.h>
+#include <mach/mfp-pxa27x.h>
+#include <mach/pxa-regs.h>
+#include <mach/audio.h>
+#include <mach/pxafb.h>
+
+#include <asm/hardware/it8152.h>
+
+#include "generic.h"
+#include "cm-x2xx-pci.h"
+
+extern void cmx255_init(void);
+extern void cmx270_init(void);
+
+/* virtual addresses for statically mapped regions */
+#define CMX2XX_VIRT_BASE        (0xe8000000)
+#define CMX2XX_IT8152_VIRT      (CMX2XX_VIRT_BASE)
+
+/* physical address if local-bus attached devices */
+#define CMX255_DM9000_PHYS_BASE (PXA_CS1_PHYS + (8 << 22))
+#define CMX270_DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22))
+
+/* leds */
+#define CMX255_GPIO_RED         (27)
+#define CMX255_GPIO_GREEN       (32)
+#define CMX270_GPIO_RED         (93)
+#define CMX270_GPIO_GREEN       (94)
+
+/* GPIO IRQ usage */
+#define GPIO22_ETHIRQ           (22)
+#define GPIO10_ETHIRQ           (10)
+#define CMX255_GPIO_IT8152_IRQ  (0)
+#define CMX270_GPIO_IT8152_IRQ  (22)
+
+#define CMX255_ETHIRQ           IRQ_GPIO(GPIO22_ETHIRQ)
+#define CMX270_ETHIRQ           IRQ_GPIO(GPIO10_ETHIRQ)
+
+#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
+static struct resource cmx255_dm9000_resource[] = {
+        [0] = {
+                .start = CMX255_DM9000_PHYS_BASE,
+                .end   = CMX255_DM9000_PHYS_BASE + 3,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = CMX255_DM9000_PHYS_BASE + 4,
+                .end   = CMX255_DM9000_PHYS_BASE + 4 + 500,
+                .flags = IORESOURCE_MEM,
+        },
+        [2] = {
+                .start = CMX255_ETHIRQ,
+                .end   = CMX255_ETHIRQ,
+                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
+        }
+};
+
+static struct resource cmx270_dm9000_resource[] = {
+        [0] = {
+                .start = CMX270_DM9000_PHYS_BASE,
+                .end   = CMX270_DM9000_PHYS_BASE + 3,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = CMX270_DM9000_PHYS_BASE + 8,
+                .end   = CMX270_DM9000_PHYS_BASE + 8 + 500,
+                .flags = IORESOURCE_MEM,
+        },
+        [2] = {
+                .start = CMX270_ETHIRQ,
+                .end   = CMX270_ETHIRQ,
+                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
+        }
+};
+
+static struct dm9000_plat_data cmx270_dm9000_platdata = {
+        .flags          = DM9000_PLATF_32BITONLY,
+};
+
+static struct platform_device cmx2xx_dm9000_device = {
+        .name           = "dm9000",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(cmx270_dm9000_resource),
+        .dev            = {
+                .platform_data = &cmx270_dm9000_platdata,
+        }
+};
+
+static void __init cmx2xx_init_dm9000(void)
+{
+        if (cpu_is_pxa25x())
+                cmx2xx_dm9000_device.resource = cmx255_dm9000_resource;
+        else
+                cmx2xx_dm9000_device.resource = cmx270_dm9000_resource;
+        platform_device_register(&cmx2xx_dm9000_device);
+}
+#else
+static inline void cmx2xx_init_dm9000(void) {}
+#endif
+
+/* UCB1400 touchscreen controller */
+#if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
+static struct platform_device cmx2xx_ts_device = {
+        .name           = "ucb1400_ts",
+        .id             = -1,
+};
+
+static void __init cmx2xx_init_touchscreen(void)
+{
+        platform_device_register(&cmx2xx_ts_device);
+}
+#else
+static inline void cmx2xx_init_touchscreen(void) {}
+#endif
+
+/* CM-X270 LEDs */
+#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
+static struct gpio_led cmx2xx_leds[] = {
+        [0] = {
+                .name = "cm-x2xx:red",
+                .default_trigger = "nand-disk",
+                .active_low = 1,
+        },
+        [1] = {
+                .name = "cm-x2xx:green",
+                .default_trigger = "heartbeat",
+                .active_low = 1,
+        },
+};
+
+static struct gpio_led_platform_data cmx2xx_gpio_led_pdata = {
+        .num_leds = ARRAY_SIZE(cmx2xx_leds),
+        .leds = cmx2xx_leds,
+};
+
+static struct platform_device cmx2xx_led_device = {
+        .name           = "leds-gpio",
+        .id             = -1,
+        .dev            = {
+                .platform_data = &cmx2xx_gpio_led_pdata,
+        },
+};
+
+static void __init cmx2xx_init_leds(void)
+{
+        if (cpu_is_pxa25x()) {
+                cmx2xx_leds[0].gpio = CMX255_GPIO_RED;
+                cmx2xx_leds[1].gpio = CMX255_GPIO_GREEN;
+        } else {
+                cmx2xx_leds[0].gpio = CMX270_GPIO_RED;
+                cmx2xx_leds[1].gpio = CMX270_GPIO_GREEN;
+        }
+        platform_device_register(&cmx2xx_led_device);
+}
+#else
+static inline void cmx2xx_init_leds(void) {}
+#endif
+
+#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
+/*
+  Display definitions
+  keep these for backwards compatibility, although symbolic names (as
+  e.g. in lpd270.c) looks better
+*/
+#define MTYPE_STN320x240        0
+#define MTYPE_TFT640x480        1
+#define MTYPE_CRT640x480        2
+#define MTYPE_CRT800x600        3
+#define MTYPE_TFT320x240        6
+#define MTYPE_STN640x480        7
+
+static struct pxafb_mode_info generic_stn_320x240_mode = {
+        .pixclock       = 76923,
+        .bpp            = 8,
+        .xres           = 320,
+        .yres           = 240,
+        .hsync_len      = 3,
+        .vsync_len      = 2,
+        .left_margin    = 3,
+        .upper_margin   = 0,
+        .right_margin   = 3,
+        .lower_margin   = 0,
+        .sync           = (FB_SYNC_HOR_HIGH_ACT |
+                           FB_SYNC_VERT_HIGH_ACT),
+        .cmap_greyscale = 0,
+};
+
+static struct pxafb_mach_info generic_stn_320x240 = {
+        .modes          = &generic_stn_320x240_mode,
+        .num_modes      = 1,
+        .lccr0          = 0,
+        .lccr3          = (LCCR3_PixClkDiv(0x03) |
+                           LCCR3_Acb(0xff) |
+                           LCCR3_PCP),
+        .cmap_inverse   = 0,
+        .cmap_static    = 0,
+};
+
+static struct pxafb_mode_info generic_tft_640x480_mode = {
+        .pixclock       = 38461,
+        .bpp            = 8,
+        .xres           = 640,
+        .yres           = 480,
+        .hsync_len      = 60,
+        .vsync_len      = 2,
+        .left_margin    = 70,
+        .upper_margin   = 10,
+        .right_margin   = 70,
+        .lower_margin   = 5,
+        .sync           = 0,
+        .cmap_greyscale = 0,
+};
+
+static struct pxafb_mach_info generic_tft_640x480 = {
+        .modes          = &generic_tft_640x480_mode,
+        .num_modes      = 1,
+        .lccr0          = (LCCR0_PAS),
+        .lccr3          = (LCCR3_PixClkDiv(0x01) |
+                           LCCR3_Acb(0xff) |
+                           LCCR3_PCP),
+        .cmap_inverse   = 0,
+        .cmap_static    = 0,
+};
+
+static struct pxafb_mode_info generic_crt_640x480_mode = {
+        .pixclock       = 38461,
+        .bpp            = 8,
+        .xres           = 640,
+        .yres           = 480,
+        .hsync_len      = 63,
+        .vsync_len      = 2,
+        .left_margin    = 81,
+        .upper_margin   = 33,
+        .right_margin   = 16,
+        .lower_margin   = 10,
+        .sync           = (FB_SYNC_HOR_HIGH_ACT |
+                           FB_SYNC_VERT_HIGH_ACT),
+        .cmap_greyscale = 0,
+};
+
+static struct pxafb_mach_info generic_crt_640x480 = {
+        .modes          = &generic_crt_640x480_mode,
+        .num_modes      = 1,
+        .lccr0          = (LCCR0_PAS),
+        .lccr3          = (LCCR3_PixClkDiv(0x01) |
+                           LCCR3_Acb(0xff)),
+        .cmap_inverse   = 0,
+        .cmap_static    = 0,
+};
+
+static struct pxafb_mode_info generic_crt_800x600_mode = {
+        .pixclock       = 28846,
+        .bpp            = 8,
+        .xres           = 800,
+        .yres           = 600,
+        .hsync_len      = 63,
+        .vsync_len      = 2,
+        .left_margin    = 26,
+        .upper_margin   = 21,
+        .right_margin   = 26,
+        .lower_margin   = 11,
+        .sync           = (FB_SYNC_HOR_HIGH_ACT |
+                           FB_SYNC_VERT_HIGH_ACT),
+        .cmap_greyscale = 0,
+};
+
+static struct pxafb_mach_info generic_crt_800x600 = {
+        .modes          = &generic_crt_800x600_mode,
+        .num_modes      = 1,
+        .lccr0          = (LCCR0_PAS),
+        .lccr3          = (LCCR3_PixClkDiv(0x02) |
+                           LCCR3_Acb(0xff)),
+        .cmap_inverse   = 0,
+        .cmap_static    = 0,
+};
+
+static struct pxafb_mode_info generic_tft_320x240_mode = {
+        .pixclock       = 134615,
+        .bpp            = 16,
+        .xres           = 320,
+        .yres           = 240,
+        .hsync_len      = 63,
+        .vsync_len      = 7,
+        .left_margin    = 75,
+        .upper_margin   = 0,
+        .right_margin   = 15,
+        .lower_margin   = 15,
+        .sync           = 0,
+        .cmap_greyscale = 0,
+};
+
+static struct pxafb_mach_info generic_tft_320x240 = {
+        .modes          = &generic_tft_320x240_mode,
+        .num_modes      = 1,
+        .lccr0          = (LCCR0_PAS),
+        .lccr3          = (LCCR3_PixClkDiv(0x06) |
+                           LCCR3_Acb(0xff) |
+                           LCCR3_PCP),
+        .cmap_inverse   = 0,
+        .cmap_static    = 0,
+};
+
+static struct pxafb_mode_info generic_stn_640x480_mode = {
+        .pixclock       = 57692,
+        .bpp            = 8,
+        .xres           = 640,
+        .yres           = 480,
+        .hsync_len      = 4,
+        .vsync_len      = 2,
+        .left_margin    = 10,
+        .upper_margin   = 5,
+        .right_margin   = 10,
+        .lower_margin   = 5,
+        .sync           = (FB_SYNC_HOR_HIGH_ACT |
+                           FB_SYNC_VERT_HIGH_ACT),
+        .cmap_greyscale = 0,
+};
+
+static struct pxafb_mach_info generic_stn_640x480 = {
+        .modes          = &generic_stn_640x480_mode,
+        .num_modes      = 1,
+        .lccr0          = 0,
+        .lccr3          = (LCCR3_PixClkDiv(0x02) |
+                           LCCR3_Acb(0xff)),
+        .cmap_inverse   = 0,
+        .cmap_static    = 0,
+};
+
+static struct pxafb_mach_info *cmx2xx_display = &generic_crt_640x480;
+
+static int __init cmx2xx_set_display(char *str)
+{
+        int disp_type = simple_strtol(str, NULL, 0);
+        switch (disp_type) {
+        case MTYPE_STN320x240:
+                cmx2xx_display = &generic_stn_320x240;
+                break;
+        case MTYPE_TFT640x480:
+                cmx2xx_display = &generic_tft_640x480;
+                break;
+        case MTYPE_CRT640x480:
+                cmx2xx_display = &generic_crt_640x480;
+                break;
+        case MTYPE_CRT800x600:
+                cmx2xx_display = &generic_crt_800x600;
+                break;
+        case MTYPE_TFT320x240:
+                cmx2xx_display = &generic_tft_320x240;
+                break;
+        case MTYPE_STN640x480:
+                cmx2xx_display = &generic_stn_640x480;
+                break;
+        default: /* fallback to CRT 640x480 */
+                cmx2xx_display = &generic_crt_640x480;
+                break;
+        }
+        return 1;
+}
+
+/*
+   This should be done really early to get proper configuration for
+   frame buffer.
+   Indeed, pxafb parameters can be used istead, but CM-X2XX bootloader
+   has limitied line length for kernel command line, and also it will
+   break compatibitlty with proprietary releases already in field.
+*/
+__setup("monitor=", cmx2xx_set_display);
+
+static void __init cmx2xx_init_display(void)
+{
+        set_pxa_fb_info(cmx2xx_display);
+}
+#else
+static inline void cmx2xx_init_display(void) {}
+#endif
+
+#ifdef CONFIG_PM
+static unsigned long sleep_save_msc[10];
+
+static int cmx2xx_suspend(struct sys_device *dev, pm_message_t state)
+{
+        cmx2xx_pci_suspend();
+
+        /* save MSC registers */
+        sleep_save_msc[0] = MSC0;
+        sleep_save_msc[1] = MSC1;
+        sleep_save_msc[2] = MSC2;
+
+        /* setup power saving mode registers */
+        PCFR = 0x0;
+        PSLR = 0xff400000;
+        PMCR  = 0x00000005;
+        PWER  = 0x80000000;
+        PFER  = 0x00000000;
+        PRER  = 0x00000000;
+        PGSR0 = 0xC0018800;
+        PGSR1 = 0x004F0002;
+        PGSR2 = 0x6021C000;
+        PGSR3 = 0x00020000;
+
+        return 0;
+}
+
+static int cmx2xx_resume(struct sys_device *dev)
+{
+        cmx2xx_pci_resume();
+
+        /* restore MSC registers */
+        MSC0 = sleep_save_msc[0];
+        MSC1 = sleep_save_msc[1];
+        MSC2 = sleep_save_msc[2];
+
+        return 0;
+}
+
+static struct sysdev_class cmx2xx_pm_sysclass = {
+        .name = "pm",
+        .resume = cmx2xx_resume,
+        .suspend = cmx2xx_suspend,
+};
+
+static struct sys_device cmx2xx_pm_device = {
+        .cls = &cmx2xx_pm_sysclass,
+};
+
+static int __init cmx2xx_pm_init(void)
+{
+        int error;
+        error = sysdev_class_register(&cmx2xx_pm_sysclass);
+        if (error == 0)
+                error = sysdev_register(&cmx2xx_pm_device);
+        return error;
+}
+#else
+static int __init cmx2xx_pm_init(void) { return 0; }
+#endif
+
+#if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE)
+static void __init cmx2xx_init_ac97(void)
+{
+        pxa_set_ac97_info(NULL);
+}
+#else
+static inline void cmx2xx_init_ac97(void) {}
+#endif
+
+static void __init cmx2xx_init(void)
+{
+        cmx2xx_pm_init();
+
+        if (cpu_is_pxa25x())
+                cmx255_init();
+        else
+                cmx270_init();
+
+        cmx2xx_init_dm9000();
+        cmx2xx_init_display();
+        cmx2xx_init_ac97();
+        cmx2xx_init_touchscreen();
+        cmx2xx_init_leds();
+}
+
+static void __init cmx2xx_init_irq(void)
+{
+        pxa27x_init_irq();
+
+        if (cpu_is_pxa25x()) {
+                pxa25x_init_irq();
+                cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ);
+        } else {
+                pxa27x_init_irq();
+                cmx2xx_pci_init_irq(CMX270_GPIO_IT8152_IRQ);
+        }
+}
+
+#ifdef CONFIG_PCI
+/* Map PCI companion statically */
+static struct map_desc cmx2xx_io_desc[] __initdata = {
+        [0] = { /* PCI bridge */
+                .virtual        = CMX2XX_IT8152_VIRT,
+                .pfn            = __phys_to_pfn(PXA_CS4_PHYS),
+                .length         = SZ_64M,
+                .type           = MT_DEVICE
+        },
+};
+
+static void __init cmx2xx_map_io(void)
+{
+        pxa_map_io();
+        iotable_init(cmx2xx_io_desc, ARRAY_SIZE(cmx2xx_io_desc));
+
+        it8152_base_address = CMX2XX_IT8152_VIRT;
+}
+#else
+static void __init cmx2xx_map_io(void)
+{
+        pxa_map_io();
+}
+#endif
+
+MACHINE_START(ARMCORE, "Compulab CM-X2XX")
+        .boot_params    = 0xa0000100,
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .map_io         = cmx2xx_map_io,
+        .init_irq       = cmx2xx_init_irq,
+        .timer          = &pxa_timer,
+        .init_machine   = cmx2xx_init,
+MACHINE_END
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
new file mode 100644
index 000000000000..deb46cd144bf
--- /dev/null
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -0,0 +1,465 @@
+/*
+ * linux/arch/arm/mach-pxa/cm-x300.c
+ *
+ * Support for the CompuLab CM-X300 modules
+ *
+ * Copyright (C) 2008 CompuLab Ltd.
+ *
+ * Mike Rapoport <mike@compulab.co.il>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+
+#include <linux/gpio.h>
+#include <linux/dm9000.h>
+#include <linux/leds.h>
+
+#include <linux/i2c.h>
+#include <linux/i2c/pca953x.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#include <mach/mfp-pxa300.h>
+
+#include <mach/hardware.h>
+#include <mach/gpio.h>
+#include <mach/pxafb.h>
+#include <mach/mmc.h>
+#include <mach/ohci.h>
+#include <mach/i2c.h>
+#include <mach/pxa3xx_nand.h>
+
+#include <asm/mach/map.h>
+
+#include "generic.h"
+
+#define CM_X300_ETH_PHYS        0x08000010
+
+#define GPIO82_MMC2_IRQ         (82)
+#define GPIO85_MMC2_WP          (85)
+
+#define CM_X300_MMC2_IRQ        IRQ_GPIO(GPIO82_MMC2_IRQ)
+
+static mfp_cfg_t cm_x300_mfp_cfg[] __initdata = {
+        /* LCD */
+        GPIO54_LCD_LDD_0,
+        GPIO55_LCD_LDD_1,
+        GPIO56_LCD_LDD_2,
+        GPIO57_LCD_LDD_3,
+        GPIO58_LCD_LDD_4,
+        GPIO59_LCD_LDD_5,
+        GPIO60_LCD_LDD_6,
+        GPIO61_LCD_LDD_7,
+        GPIO62_LCD_LDD_8,
+        GPIO63_LCD_LDD_9,
+        GPIO64_LCD_LDD_10,
+        GPIO65_LCD_LDD_11,
+        GPIO66_LCD_LDD_12,
+        GPIO67_LCD_LDD_13,
+        GPIO68_LCD_LDD_14,
+        GPIO69_LCD_LDD_15,
+        GPIO72_LCD_FCLK,
+        GPIO73_LCD_LCLK,
+        GPIO74_LCD_PCLK,
+        GPIO75_LCD_BIAS,
+
+        /* BTUART */
+        GPIO111_UART2_RTS,
+        GPIO112_UART2_RXD | MFP_LPM_EDGE_FALL,
+        GPIO113_UART2_TXD,
+        GPIO114_UART2_CTS | MFP_LPM_EDGE_BOTH,
+
+        /* STUART */
+        GPIO109_UART3_TXD,
+        GPIO110_UART3_RXD | MFP_LPM_EDGE_FALL,
+
+        /* AC97 */
+        GPIO23_AC97_nACRESET,
+        GPIO24_AC97_SYSCLK,
+        GPIO29_AC97_BITCLK,
+        GPIO25_AC97_SDATA_IN_0,
+        GPIO27_AC97_SDATA_OUT,
+        GPIO28_AC97_SYNC,
+
+        /* Keypad */
+        GPIO115_KP_MKIN_0 | MFP_LPM_EDGE_BOTH,
+        GPIO116_KP_MKIN_1 | MFP_LPM_EDGE_BOTH,
+        GPIO117_KP_MKIN_2 | MFP_LPM_EDGE_BOTH,
+        GPIO118_KP_MKIN_3 | MFP_LPM_EDGE_BOTH,
+        GPIO119_KP_MKIN_4 | MFP_LPM_EDGE_BOTH,
+        GPIO120_KP_MKIN_5 | MFP_LPM_EDGE_BOTH,
+        GPIO2_2_KP_MKIN_6 | MFP_LPM_EDGE_BOTH,
+        GPIO3_2_KP_MKIN_7 | MFP_LPM_EDGE_BOTH,
+        GPIO121_KP_MKOUT_0,
+        GPIO122_KP_MKOUT_1,
+        GPIO123_KP_MKOUT_2,
+        GPIO124_KP_MKOUT_3,
+        GPIO125_KP_MKOUT_4,
+        GPIO4_2_KP_MKOUT_5,
+
+        /* MMC1 */
+        GPIO3_MMC1_DAT0,
+        GPIO4_MMC1_DAT1 | MFP_LPM_EDGE_BOTH,
+        GPIO5_MMC1_DAT2,
+        GPIO6_MMC1_DAT3,
+        GPIO7_MMC1_CLK,
+        GPIO8_MMC1_CMD, /* CMD0 for slot 0 */
+
+        /* MMC2 */
+        GPIO9_MMC2_DAT0,
+        GPIO10_MMC2_DAT1 | MFP_LPM_EDGE_BOTH,
+        GPIO11_MMC2_DAT2,
+        GPIO12_MMC2_DAT3,
+        GPIO13_MMC2_CLK,
+        GPIO14_MMC2_CMD,
+
+        /* FFUART */
+        GPIO30_UART1_RXD | MFP_LPM_EDGE_FALL,
+        GPIO31_UART1_TXD,
+        GPIO32_UART1_CTS,
+        GPIO37_UART1_RTS,
+        GPIO33_UART1_DCD,
+        GPIO34_UART1_DSR | MFP_LPM_EDGE_FALL,
+        GPIO35_UART1_RI,
+        GPIO36_UART1_DTR,
+
+        /* GPIOs */
+        GPIO79_GPIO,                    /* LED */
+        GPIO82_GPIO | MFP_PULL_HIGH,    /* MMC CD */
+        GPIO85_GPIO,                    /* MMC WP */
+        GPIO99_GPIO,                    /* Ethernet IRQ */
+};
+
+#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
+static struct resource dm9000_resources[] = {
+        [0] = {
+                .start  = CM_X300_ETH_PHYS,
+                .end    = CM_X300_ETH_PHYS + 0x3,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = CM_X300_ETH_PHYS + 0x4,
+                .end    = CM_X300_ETH_PHYS + 0x4 + 500,
+                .flags  = IORESOURCE_MEM,
+        },
+        [2] = {
+                .start  = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)),
+                .end    = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)),
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
+        }
+};
+
+static struct dm9000_plat_data cm_x300_dm9000_platdata = {
+        .flags          = DM9000_PLATF_16BITONLY,
+};
+
+static struct platform_device dm9000_device = {
+        .name           = "dm9000",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(dm9000_resources),
+        .resource       = dm9000_resources,
+        .dev            = {
+                .platform_data = &cm_x300_dm9000_platdata,
+        }
+
+};
+
+static void __init cm_x300_init_dm9000(void)
+{
+        platform_device_register(&dm9000_device);
+}
+#else
+static inline void cm_x300_init_dm9000(void) {}
+#endif
+
+#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
+static struct pxafb_mode_info cm_x300_lcd_modes[] = {
+        [0] = {
+                .pixclock       = 38000,
+                .bpp            = 16,
+                .xres           = 480,
+                .yres           = 640,
+                .hsync_len      = 8,
+                .vsync_len      = 2,
+                .left_margin    = 8,
+                .upper_margin   = 0,
+                .right_margin   = 24,
+                .lower_margin   = 4,
+                .cmap_greyscale = 0,
+        },
+        [1] = {
+                .pixclock       = 153800,
+                .bpp            = 16,
+                .xres           = 240,
+                .yres           = 320,
+                .hsync_len      = 8,
+                .vsync_len      = 2,
+                .left_margin    = 8,
+                .upper_margin   = 2,
+                .right_margin   = 88,
+                .lower_margin   = 2,
+                .cmap_greyscale = 0,
+        },
+};
+
+static struct pxafb_mach_info cm_x300_lcd = {
+        .modes                  = cm_x300_lcd_modes,
+        .num_modes              = 2,
+        .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
+};
+
+static void __init cm_x300_init_lcd(void)
+{
+        set_pxa_fb_info(&cm_x300_lcd);
+}
+#else
+static inline void cm_x300_init_lcd(void) {}
+#endif
+
+#if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE)
+static struct mtd_partition cm_x300_nand_partitions[] = {
+        [0] = {
+                .name        = "OBM",
+                .offset      = 0,
+                .size        = SZ_256K,
+                .mask_flags  = MTD_WRITEABLE, /* force read-only */
+        },
+        [1] = {
+                .name        = "U-Boot",
+                .offset      = MTDPART_OFS_APPEND,
+                .size        = SZ_256K,
+                .mask_flags  = MTD_WRITEABLE, /* force read-only */
+        },
+        [2] = {
+                .name        = "Environment",
+                .offset      = MTDPART_OFS_APPEND,
+                .size        = SZ_256K,
+        },
+        [3] = {
+                .name        = "reserved",
+                .offset      = MTDPART_OFS_APPEND,
+                .size        = SZ_256K + SZ_1M,
+                .mask_flags  = MTD_WRITEABLE, /* force read-only */
+        },
+        [4] = {
+                .name        = "kernel",
+                .offset      = MTDPART_OFS_APPEND,
+                .size        = SZ_4M,
+        },
+        [5] = {
+                .name        = "fs",
+                .offset      = MTDPART_OFS_APPEND,
+                .size        = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct pxa3xx_nand_platform_data cm_x300_nand_info = {
+        .enable_arbiter = 1,
+        .parts          = cm_x300_nand_partitions,
+        .nr_parts       = ARRAY_SIZE(cm_x300_nand_partitions),
+};
+
+static void __init cm_x300_init_nand(void)
+{
+        pxa3xx_set_nand_info(&cm_x300_nand_info);
+}
+#else
+static inline void cm_x300_init_nand(void) {}
+#endif
+
+#if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE)
+/* The first MMC slot of CM-X300 is hardwired to Libertas card and has
+   no detection/ro pins */
+static int cm_x300_mci_init(struct device *dev,
+                            irq_handler_t cm_x300_detect_int,
+                            void *data)
+{
+        return 0;
+}
+
+static void cm_x300_mci_exit(struct device *dev, void *data)
+{
+}
+
+static struct pxamci_platform_data cm_x300_mci_platform_data = {
+        .detect_delay   = 20,
+        .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
+        .init           = cm_x300_mci_init,
+        .exit           = cm_x300_mci_exit,
+};
+
+static int cm_x300_mci2_ro(struct device *dev)
+{
+        return gpio_get_value(GPIO85_MMC2_WP);
+}
+
+static int cm_x300_mci2_init(struct device *dev,
+                             irq_handler_t cm_x300_detect_int,
+                             void *data)
+{
+        int err;
+
+        /*
+         * setup GPIO for CM-X300 MMC controller
+         */
+        err = gpio_request(GPIO82_MMC2_IRQ, "mmc card detect");
+        if (err)
+                goto err_request_cd;
+        gpio_direction_input(GPIO82_MMC2_IRQ);
+
+        err = gpio_request(GPIO85_MMC2_WP, "mmc write protect");
+        if (err)
+                goto err_request_wp;
+        gpio_direction_input(GPIO85_MMC2_WP);
+
+        err = request_irq(CM_X300_MMC2_IRQ, cm_x300_detect_int,
+                          IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+                          "MMC card detect", data);
+        if (err) {
+                printk(KERN_ERR "%s: MMC/SD/SDIO: "
+                                "can't request card detect IRQ\n", __func__);
+                goto err_request_irq;
+        }
+
+        return 0;
+
+err_request_irq:
+        gpio_free(GPIO85_MMC2_WP);
+err_request_wp:
+        gpio_free(GPIO82_MMC2_IRQ);
+err_request_cd:
+        return err;
+}
+
+static void cm_x300_mci2_exit(struct device *dev, void *data)
+{
+        free_irq(CM_X300_MMC2_IRQ, data);
+        gpio_free(GPIO82_MMC2_IRQ);
+        gpio_free(GPIO85_MMC2_WP);
+}
+
+static struct pxamci_platform_data cm_x300_mci2_platform_data = {
+        .detect_delay   = 20,
+        .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
+        .init           = cm_x300_mci2_init,
+        .exit           = cm_x300_mci2_exit,
+        .get_ro         = cm_x300_mci2_ro,
+};
+
+static void __init cm_x300_init_mmc(void)
+{
+        pxa_set_mci_info(&cm_x300_mci_platform_data);
+        pxa3xx_set_mci2_info(&cm_x300_mci2_platform_data);
+}
+#else
+static inline void cm_x300_init_mmc(void) {}
+#endif
+
+#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
+static struct pxaohci_platform_data cm_x300_ohci_platform_data = {
+        .port_mode      = PMM_PERPORT_MODE,
+        .flags          = ENABLE_PORT1 | ENABLE_PORT2 | POWER_CONTROL_LOW,
+};
+
+static void __init cm_x300_init_ohci(void)
+{
+        pxa_set_ohci_info(&cm_x300_ohci_platform_data);
+}
+#else
+static inline void cm_x300_init_ohci(void) {}
+#endif
+
+#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
+static struct gpio_led cm_x300_leds[] = {
+        [0] = {
+                .name = "cm-x300:green",
+                .default_trigger = "heartbeat",
+                .gpio = 79,
+                .active_low = 1,
+        },
+};
+
+static struct gpio_led_platform_data cm_x300_gpio_led_pdata = {
+        .num_leds = ARRAY_SIZE(cm_x300_leds),
+        .leds = cm_x300_leds,
+};
+
+static struct platform_device cm_x300_led_device = {
+        .name           = "leds-gpio",
+        .id             = -1,
+        .dev            = {
+                .platform_data = &cm_x300_gpio_led_pdata,
+        },
+};
+
+static void __init cm_x300_init_leds(void)
+{
+        platform_device_register(&cm_x300_led_device);
+}
+#else
+static inline void cm_x300_init_leds(void) {}
+#endif
+
+#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
+/* PCA9555 */
+static struct pca953x_platform_data cm_x300_gpio_ext_pdata_0 = {
+        .gpio_base = 128,
+};
+
+static struct pca953x_platform_data cm_x300_gpio_ext_pdata_1 = {
+        .gpio_base = 144,
+};
+
+static struct i2c_board_info cm_x300_gpio_ext_info[] = {
+        [0] = {
+                I2C_BOARD_INFO("pca9555", 0x24),
+                .platform_data = &cm_x300_gpio_ext_pdata_0,
+        },
+        [1] = {
+                I2C_BOARD_INFO("pca9555", 0x25),
+                .platform_data = &cm_x300_gpio_ext_pdata_1,
+        },
+};
+
+static void __init cm_x300_init_i2c(void)
+{
+        pxa_set_i2c_info(NULL);
+        i2c_register_board_info(0, cm_x300_gpio_ext_info,
+                                ARRAY_SIZE(cm_x300_gpio_ext_info));
+}
+#else
+static inline void cm_x300_init_i2c(void) {}
+#endif
+
+static void __init cm_x300_init(void)
+{
+        /* board-processor specific GPIO initialization */
+        pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x300_mfp_cfg));
+
+        cm_x300_init_dm9000();
+        cm_x300_init_lcd();
+        cm_x300_init_ohci();
+        cm_x300_init_mmc();
+        cm_x300_init_nand();
+        cm_x300_init_leds();
+        cm_x300_init_i2c();
+}
+
+MACHINE_START(CM_X300, "CM-X300 module")
+        .phys_io        = 0x40000000,
+        .boot_params    = 0xa0000100,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa3xx_init_irq,
+        .timer          = &pxa_timer,
+        .init_machine   = cm_x300_init,
+MACHINE_END
diff --git a/arch/arm/mach-pxa/colibri.c b/arch/arm/mach-pxa/colibri.c
index abce13c846c5..e8473624427e 100644
--- a/arch/arm/mach-pxa/colibri.c
+++ b/arch/arm/mach-pxa/colibri.c
@@ -29,12 +29,17 @@
 #include <asm/mach/irq.h>
 #include <asm/mach/flash.h>
 #include <mach/pxa-regs.h>
-#include <mach/pxa2xx-gpio.h>
+#include <mach/mfp-pxa27x.h>
 #include <mach/colibri.h>
 
 #include "generic.h"
 #include "devices.h"
 
+static unsigned long colibri_pin_config[] __initdata = {
+        GPIO78_nCS_2,   /* Ethernet CS */
+        GPIO114_GPIO,   /* Ethernet IRQ */
+};
+
 /*
  * Flash
  */
@@ -116,9 +121,7 @@ static struct platform_device *colibri_devices[] __initdata = {
 
 static void __init colibri_init(void)
 {
-        /* DM9000 LAN */
-        pxa_gpio_mode(GPIO78_nCS_2_MD);
-        pxa_gpio_mode(GPIO_DM9000 | GPIO_IN);
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(colibri_pin_config));
 
         platform_add_devices(colibri_devices, ARRAY_SIZE(colibri_devices));
 }
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 4cbf08bd546b..65558d6aa220 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -20,8 +20,12 @@
 #include <linux/interrupt.h>
 #include <linux/mmc/host.h>
 #include <linux/pm.h>
+#include <linux/gpio.h>
 #include <linux/backlight.h>
 #include <linux/io.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/ads7846.h>
+#include <linux/spi/corgi_lcd.h>
 #include <video/w100fb.h>
 
 #include <asm/setup.h>
@@ -37,11 +41,12 @@
 
 #include <mach/pxa-regs.h>
 #include <mach/pxa2xx-regs.h>
-#include <mach/pxa2xx-gpio.h>
+#include <mach/mfp-pxa25x.h>
 #include <mach/i2c.h>
 #include <mach/irda.h>
 #include <mach/mmc.h>
 #include <mach/udc.h>
+#include <mach/pxa2xx_spi.h>
 #include <mach/corgi.h>
 #include <mach/sharpsl.h>
 
@@ -52,6 +57,61 @@
 #include "devices.h"
 #include "sharpsl.h"
 
+static unsigned long corgi_pin_config[] __initdata = {
+        /* Static Memory I/O */
+        GPIO78_nCS_2,   /* w100fb */
+        GPIO80_nCS_4,   /* scoop */
+
+        /* SSP1 */
+        GPIO23_SSP1_SCLK,
+        GPIO25_SSP1_TXD,
+        GPIO26_SSP1_RXD,
+        GPIO24_GPIO,    /* CORGI_GPIO_ADS7846_CS - SFRM as chip select */
+
+        /* I2S */
+        GPIO28_I2S_BITCLK_OUT,
+        GPIO29_I2S_SDATA_IN,
+        GPIO30_I2S_SDATA_OUT,
+        GPIO31_I2S_SYNC,
+        GPIO32_I2S_SYSCLK,
+
+        /* Infra-Red */
+        GPIO47_FICP_TXD,
+        GPIO46_FICP_RXD,
+
+        /* FFUART */
+        GPIO40_FFUART_DTR,
+        GPIO41_FFUART_RTS,
+        GPIO39_FFUART_TXD,
+        GPIO37_FFUART_DSR,
+        GPIO34_FFUART_RXD,
+        GPIO35_FFUART_CTS,
+
+        /* PC Card */
+        GPIO48_nPOE,
+        GPIO49_nPWE,
+        GPIO50_nPIOR,
+        GPIO51_nPIOW,
+        GPIO52_nPCE_1,
+        GPIO53_nPCE_2,
+        GPIO54_nPSKTSEL,
+        GPIO55_nPREG,
+        GPIO56_nPWAIT,
+        GPIO57_nIOIS16,
+
+        /* MMC */
+        GPIO6_MMC_CLK,
+        GPIO8_MMC_CS0,
+
+        /* GPIO */
+        GPIO9_GPIO,     /* CORGI_GPIO_nSD_DETECT */
+        GPIO7_GPIO,     /* CORGI_GPIO_nSD_WP */
+        GPIO33_GPIO,    /* CORGI_GPIO_SD_PWR */
+        GPIO22_GPIO,    /* CORGI_GPIO_IR_ON */
+        GPIO44_GPIO,    /* CORGI_GPIO_HSYNC */
+
+        GPIO1_GPIO | WAKEUP_ON_EDGE_RISE,
+};
 
 /*
  * Corgi SCOOP Device
@@ -67,6 +127,7 @@ static struct resource corgi_scoop_resources[] = {
 static struct scoop_config corgi_scoop_setup = {
         .io_dir         = CORGI_SCOOP_IO_DIR,
         .io_out         = CORGI_SCOOP_IO_OUT,
+        .gpio_base      = CORGI_SCOOP_GPIO_BASE,
 };
 
 struct platform_device corgiscoop_device = {
@@ -79,27 +140,6 @@ struct platform_device corgiscoop_device = {
         .resource       = corgi_scoop_resources,
 };
 
-static void corgi_pcmcia_init(void)
-{
-        /* Setup default state of GPIO outputs
-           before we enable them as outputs. */
-        GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) |
-                GPIO_bit(GPIO49_nPWE) | GPIO_bit(GPIO50_nPIOR) |
-                GPIO_bit(GPIO51_nPIOW) | GPIO_bit(GPIO52_nPCE_1) |
-                GPIO_bit(GPIO53_nPCE_2);
-
-        pxa_gpio_mode(GPIO48_nPOE_MD);
-        pxa_gpio_mode(GPIO49_nPWE_MD);
-        pxa_gpio_mode(GPIO50_nPIOR_MD);
-        pxa_gpio_mode(GPIO51_nPIOW_MD);
-        pxa_gpio_mode(GPIO55_nPREG_MD);
-        pxa_gpio_mode(GPIO56_nPWAIT_MD);
-        pxa_gpio_mode(GPIO57_nIOIS16_MD);
-        pxa_gpio_mode(GPIO52_nPCE_1_MD);
-        pxa_gpio_mode(GPIO53_nPCE_2_MD);
-        pxa_gpio_mode(GPIO54_pSKTSEL_MD);
-}
-
 static struct scoop_pcmcia_dev corgi_pcmcia_scoop[] = {
 {
         .dev        = &corgiscoop_device.dev,
@@ -112,58 +152,10 @@ static struct scoop_pcmcia_dev corgi_pcmcia_scoop[] = {
 static struct scoop_pcmcia_config corgi_pcmcia_config = {
         .devs         = &corgi_pcmcia_scoop[0],
         .num_devs     = 1,
-        .pcmcia_init  = corgi_pcmcia_init,
 };
 
 EXPORT_SYMBOL(corgiscoop_device);
 
-
-/*
- * Corgi SSP Device
- *
- * Set the parent as the scoop device because a lot of SSP devices
- * also use scoop functions and this makes the power up/down order
- * work correctly.
- */
-struct platform_device corgissp_device = {
-        .name           = "corgi-ssp",
-        .dev            = {
-                .parent = &corgiscoop_device.dev,
-        },
-        .id             = -1,
-};
-
-struct corgissp_machinfo corgi_ssp_machinfo = {
-        .port           = 1,
-        .cs_lcdcon      = CORGI_GPIO_LCDCON_CS,
-        .cs_ads7846     = CORGI_GPIO_ADS7846_CS,
-        .cs_max1111     = CORGI_GPIO_MAX1111_CS,
-        .clk_lcdcon     = 76,
-        .clk_ads7846    = 2,
-        .clk_max1111    = 8,
-};
-
-
-/*
- * LCD/Framebuffer
- */
-static void w100_lcdtg_suspend(struct w100fb_par *par)
-{
-        corgi_lcdtg_suspend();
-}
-
-static void w100_lcdtg_init(struct w100fb_par *par)
-{
-        corgi_lcdtg_hw_init(par->xres);
-}
-
-
-static struct w100_tg_info corgi_lcdtg_info = {
-        .change  = w100_lcdtg_init,
-        .suspend = w100_lcdtg_suspend,
-        .resume  = w100_lcdtg_init,
-};
-
 static struct w100_mem_info corgi_fb_mem = {
         .ext_cntl          = 0x00040003,
         .sdram_mode_reg    = 0x00650021,
@@ -242,7 +234,6 @@ static struct w100_mode corgi_fb_modes[] = {
 };
 
 static struct w100fb_mach_info corgi_fb_info = {
-        .tg         = &corgi_lcdtg_info,
         .init_mode  = INIT_MODE_ROTATED,
         .mem        = &corgi_fb_mem,
         .regs       = &corgi_fb_regs,
@@ -268,60 +259,10 @@ static struct platform_device corgifb_device = {
         .resource       = corgi_fb_resources,
         .dev            = {
                 .platform_data = &corgi_fb_info,
-                .parent = &corgissp_device.dev,
         },
 
 };
 
-
-/*
- * Corgi Backlight Device
- */
-static void corgi_bl_kick_battery(void)
-{
-        void (*kick_batt)(void);
-
-        kick_batt = symbol_get(sharpsl_battery_kick);
-        if (kick_batt) {
-                kick_batt();
-                symbol_put(sharpsl_battery_kick);
-        }
-}
-
-static void corgi_bl_set_intensity(int intensity)
-{
-        if (intensity > 0x10)
-                intensity += 0x10;
-
-        /* Bits 0-4 are accessed via the SSP interface */
-        corgi_ssp_blduty_set(intensity & 0x1f);
-
-        /* Bit 5 is via SCOOP */
-        if (intensity & 0x0020)
-                set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_BACKLIGHT_CONT);
-        else
-                reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_BACKLIGHT_CONT);
-}
-
-static struct generic_bl_info corgi_bl_machinfo = {
-        .name = "corgi-bl",
-        .max_intensity = 0x2f,
-        .default_intensity = 0x1f,
-        .limit_mask = 0x0b,
-        .set_bl_intensity = corgi_bl_set_intensity,
-        .kick_battery = corgi_bl_kick_battery,
-};
-
-static struct platform_device corgibl_device = {
-        .name           = "generic-bl",
-        .dev            = {
-                .parent = &corgifb_device.dev,
-                .platform_data  = &corgi_bl_machinfo,
-        },
-        .id             = -1,
-};
-
-
 /*
  * Corgi Keyboard Device
  */
@@ -330,75 +271,35 @@ static struct platform_device corgikbd_device = {
         .id             = -1,
 };
 
-
 /*
  * Corgi LEDs
  */
-static struct platform_device corgiled_device = {
-        .name           = "corgi-led",
-        .id             = -1,
-};
-
-
-/*
- * Corgi Touch Screen Device
- */
-static unsigned long (*get_hsync_invperiod)(struct device *dev);
-
-static void inline sharpsl_wait_sync(int gpio)
-{
-        while((GPLR(gpio) & GPIO_bit(gpio)) == 0);
-        while((GPLR(gpio) & GPIO_bit(gpio)) != 0);
-}
-
-static unsigned long corgi_get_hsync_invperiod(void)
-{
-        if (!get_hsync_invperiod)
-                get_hsync_invperiod = symbol_get(w100fb_get_hsynclen);
-        if (!get_hsync_invperiod)
-                return 0;
-
-        return get_hsync_invperiod(&corgifb_device.dev);
-}
-
-static void corgi_put_hsync(void)
-{
-        if (get_hsync_invperiod)
-                symbol_put(w100fb_get_hsynclen);
-        get_hsync_invperiod = NULL;
-}
-
-static void corgi_wait_hsync(void)
-{
-        sharpsl_wait_sync(CORGI_GPIO_HSYNC);
-}
-
-static struct resource corgits_resources[] = {
-        [0] = {
-                .start          = CORGI_IRQ_GPIO_TP_INT,
-                .end            = CORGI_IRQ_GPIO_TP_INT,
-                .flags          = IORESOURCE_IRQ,
+static struct gpio_led corgi_gpio_leds[] = {
+        {
+                .name                   = "corgi:amber:charge",
+                .default_trigger        = "sharpsl-charge",
+                .gpio                   = CORGI_GPIO_LED_ORANGE,
+        },
+        {
+                .name                   = "corgi:green:mail",
+                .default_trigger        = "nand-disk",
+                .gpio                   = CORGI_GPIO_LED_GREEN,
         },
 };
 
-static struct corgits_machinfo  corgi_ts_machinfo = {
-        .get_hsync_invperiod = corgi_get_hsync_invperiod,
-        .put_hsync           = corgi_put_hsync,
-        .wait_hsync          = corgi_wait_hsync,
+static struct gpio_led_platform_data corgi_gpio_leds_info = {
+        .leds           = corgi_gpio_leds,
+        .num_leds       = ARRAY_SIZE(corgi_gpio_leds),
 };
 
-static struct platform_device corgits_device = {
-        .name           = "corgi-ts",
+static struct platform_device corgiled_device = {
+        .name           = "leds-gpio",
+        .id             = -1,
         .dev            = {
-                .parent = &corgissp_device.dev,
-                .platform_data  = &corgi_ts_machinfo,
+                .platform_data = &corgi_gpio_leds_info,
         },
-        .id             = -1,
-        .num_resources  = ARRAY_SIZE(corgits_resources),
-        .resource       = corgits_resources,
 };
 
-
 /*
  * MMC/SD Device
  *
@@ -411,20 +312,42 @@ static int corgi_mci_init(struct device *dev, irq_handler_t corgi_detect_int, vo
 {
         int err;
 
-        /* setup GPIO for PXA25x MMC controller */
-        pxa_gpio_mode(GPIO6_MMCCLK_MD);
-        pxa_gpio_mode(GPIO8_MMCCS0_MD);
-        pxa_gpio_mode(CORGI_GPIO_nSD_DETECT | GPIO_IN);
-        pxa_gpio_mode(CORGI_GPIO_SD_PWR | GPIO_OUT);
+        err = gpio_request(CORGI_GPIO_nSD_DETECT, "nSD_DETECT");
+        if (err)
+                goto err_out;
 
-        corgi_mci_platform_data.detect_delay = msecs_to_jiffies(250);
+        err = gpio_request(CORGI_GPIO_nSD_WP, "nSD_WP");
+        if (err)
+                goto err_free_1;
 
-        err = request_irq(CORGI_IRQ_GPIO_nSD_DETECT, corgi_detect_int,
-                          IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
-                          "MMC card detect", data);
+        err = gpio_request(CORGI_GPIO_SD_PWR, "SD_PWR");
         if (err)
-                printk(KERN_ERR "corgi_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
+                goto err_free_2;
 
+        gpio_direction_input(CORGI_GPIO_nSD_DETECT);
+        gpio_direction_input(CORGI_GPIO_nSD_WP);
+        gpio_direction_output(CORGI_GPIO_SD_PWR, 0);
+
+        corgi_mci_platform_data.detect_delay = msecs_to_jiffies(250);
+
+        err = request_irq(CORGI_IRQ_GPIO_nSD_DETECT, corgi_detect_int,
+                                IRQF_DISABLED | IRQF_TRIGGER_RISING |
+                                IRQF_TRIGGER_FALLING,
+                                "MMC card detect", data);
+        if (err) {
+                pr_err("%s: MMC/SD: can't request MMC card detect IRQ\n",
+                                __func__);
+                goto err_free_3;
+        }
+        return 0;
+
+err_free_3:
+        gpio_free(CORGI_GPIO_SD_PWR);
+err_free_2:
+        gpio_free(CORGI_GPIO_nSD_WP);
+err_free_1:
+        gpio_free(CORGI_GPIO_nSD_DETECT);
+err_out:
         return err;
 }
 
@@ -432,20 +355,20 @@ static void corgi_mci_setpower(struct device *dev, unsigned int vdd)
 {
         struct pxamci_platform_data* p_d = dev->platform_data;
 
-        if (( 1 << vdd) & p_d->ocr_mask)
-                GPSR1 = GPIO_bit(CORGI_GPIO_SD_PWR);
-        else
-                GPCR1 = GPIO_bit(CORGI_GPIO_SD_PWR);
+        gpio_set_value(CORGI_GPIO_SD_PWR, ((1 << vdd) & p_d->ocr_mask));
 }
 
 static int corgi_mci_get_ro(struct device *dev)
 {
-        return GPLR(CORGI_GPIO_nSD_WP) & GPIO_bit(CORGI_GPIO_nSD_WP);
+        return gpio_get_value(CORGI_GPIO_nSD_WP);
 }
 
 static void corgi_mci_exit(struct device *dev, void *data)
 {
         free_irq(CORGI_IRQ_GPIO_nSD_DETECT, data);
+        gpio_free(CORGI_GPIO_SD_PWR);
+        gpio_free(CORGI_GPIO_nSD_WP);
+        gpio_free(CORGI_GPIO_nSD_DETECT);
 }
 
 static struct pxamci_platform_data corgi_mci_platform_data = {
@@ -462,16 +385,32 @@ static struct pxamci_platform_data corgi_mci_platform_data = {
  */
 static void corgi_irda_transceiver_mode(struct device *dev, int mode)
 {
-        if (mode & IR_OFF)
-                GPSR(CORGI_GPIO_IR_ON) = GPIO_bit(CORGI_GPIO_IR_ON);
-        else
-                GPCR(CORGI_GPIO_IR_ON) = GPIO_bit(CORGI_GPIO_IR_ON);
+        gpio_set_value(CORGI_GPIO_IR_ON, mode & IR_OFF);
         pxa2xx_transceiver_mode(dev, mode);
 }
 
+static int corgi_irda_startup(struct device *dev)
+{
+        int err;
+
+        err = gpio_request(CORGI_GPIO_IR_ON, "IR_ON");
+        if (err)
+                return err;
+
+        gpio_direction_output(CORGI_GPIO_IR_ON, 1);
+        return 0;
+}
+
+static void corgi_irda_shutdown(struct device *dev)
+{
+        gpio_free(CORGI_GPIO_IR_ON);
+}
+
 static struct pxaficp_platform_data corgi_ficp_platform_data = {
-        .transceiver_cap  = IR_SIRMODE | IR_OFF,
-        .transceiver_mode = corgi_irda_transceiver_mode,
+        .transceiver_cap        = IR_SIRMODE | IR_OFF,
+        .transceiver_mode       = corgi_irda_transceiver_mode,
+        .startup                = corgi_irda_startup,
+        .shutdown               = corgi_irda_shutdown,
 };
 
 
@@ -483,14 +422,129 @@ static struct pxa2xx_udc_mach_info udc_info __initdata = {
         .gpio_pullup            = CORGI_GPIO_USB_PULLUP,
 };
 
+#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MASTER)
+static struct pxa2xx_spi_master corgi_spi_info = {
+        .num_chipselect = 3,
+};
+
+static struct ads7846_platform_data corgi_ads7846_info = {
+        .model                  = 7846,
+        .vref_delay_usecs       = 100,
+        .x_plate_ohms           = 419,
+        .y_plate_ohms           = 486,
+        .gpio_pendown           = CORGI_GPIO_TP_INT,
+};
+
+static void corgi_ads7846_cs(u32 command)
+{
+        gpio_set_value(CORGI_GPIO_ADS7846_CS, !(command == PXA2XX_CS_ASSERT));
+}
+
+static struct pxa2xx_spi_chip corgi_ads7846_chip = {
+        .cs_control     = corgi_ads7846_cs,
+};
+
+static void corgi_bl_kick_battery(void)
+{
+        void (*kick_batt)(void);
+
+        kick_batt = symbol_get(sharpsl_battery_kick);
+        if (kick_batt) {
+                kick_batt();
+                symbol_put(sharpsl_battery_kick);
+        }
+}
+
+static struct corgi_lcd_platform_data corgi_lcdcon_info = {
+        .init_mode              = CORGI_LCD_MODE_VGA,
+        .max_intensity          = 0x2f,
+        .default_intensity      = 0x1f,
+        .limit_mask             = 0x0b,
+        .gpio_backlight_cont    = CORGI_GPIO_BACKLIGHT_CONT,
+        .gpio_backlight_on      = -1,
+        .kick_battery           = corgi_bl_kick_battery,
+};
+
+static void corgi_lcdcon_cs(u32 command)
+{
+        gpio_set_value(CORGI_GPIO_LCDCON_CS, !(command == PXA2XX_CS_ASSERT));
+}
+
+static struct pxa2xx_spi_chip corgi_lcdcon_chip = {
+        .cs_control     = corgi_lcdcon_cs,
+};
+
+static void corgi_max1111_cs(u32 command)
+{
+        gpio_set_value(CORGI_GPIO_MAX1111_CS, !(command == PXA2XX_CS_ASSERT));
+}
+
+static struct pxa2xx_spi_chip corgi_max1111_chip = {
+        .cs_control     = corgi_max1111_cs,
+};
+
+static struct spi_board_info corgi_spi_devices[] = {
+        {
+                .modalias       = "ads7846",
+                .max_speed_hz   = 1200000,
+                .bus_num        = 1,
+                .chip_select    = 0,
+                .platform_data  = &corgi_ads7846_info,
+                .controller_data= &corgi_ads7846_chip,
+                .irq            = gpio_to_irq(CORGI_GPIO_TP_INT),
+        }, {
+                .modalias       = "corgi-lcd",
+                .max_speed_hz   = 50000,
+                .bus_num        = 1,
+                .chip_select    = 1,
+                .platform_data  = &corgi_lcdcon_info,
+                .controller_data= &corgi_lcdcon_chip,
+        }, {
+                .modalias       = "max1111",
+                .max_speed_hz   = 450000,
+                .bus_num        = 1,
+                .chip_select    = 2,
+                .controller_data= &corgi_max1111_chip,
+        },
+};
+
+static void __init corgi_init_spi(void)
+{
+        int err;
+
+        err = gpio_request(CORGI_GPIO_ADS7846_CS, "ADS7846_CS");
+        if (err)
+                return;
+
+        err = gpio_request(CORGI_GPIO_LCDCON_CS, "LCDCON_CS");
+        if (err)
+                goto err_free_1;
+
+        err = gpio_request(CORGI_GPIO_MAX1111_CS, "MAX1111_CS");
+        if (err)
+                goto err_free_2;
+
+        gpio_direction_output(CORGI_GPIO_ADS7846_CS, 1);
+        gpio_direction_output(CORGI_GPIO_LCDCON_CS, 1);
+        gpio_direction_output(CORGI_GPIO_MAX1111_CS, 1);
+
+        pxa2xx_set_spi_info(1, &corgi_spi_info);
+        spi_register_board_info(ARRAY_AND_SIZE(corgi_spi_devices));
+        return;
+
+err_free_2:
+        gpio_free(CORGI_GPIO_LCDCON_CS);
+err_free_1:
+        gpio_free(CORGI_GPIO_ADS7846_CS);
+}
+#else
+static inline void corgi_init_spi(void) {}
+#endif
 
 static struct platform_device *devices[] __initdata = {
         &corgiscoop_device,
-        &corgissp_device,
         &corgifb_device,
         &corgikbd_device,
-        &corgibl_device,
-        &corgits_device,
         &corgiled_device,
 };
 
@@ -498,7 +552,8 @@ static void corgi_poweroff(void)
 {
         if (!machine_is_corgi())
                 /* Green LED off tells the bootloader to halt */
-                reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN);
+                gpio_set_value(CORGI_GPIO_LED_GREEN, 0);
+
         arm_machine_restart('h');
 }
 
@@ -506,7 +561,8 @@ static void corgi_restart(char mode)
 {
         if (!machine_is_corgi())
                 /* Green LED on tells the bootloader to reboot */
-                set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN);
+                gpio_set_value(CORGI_GPIO_LED_GREEN, 1);
+
         arm_machine_restart('h');
 }
 
@@ -515,20 +571,12 @@ static void __init corgi_init(void)
         pm_power_off = corgi_poweroff;
         arm_pm_restart = corgi_restart;
 
-        /* setup sleep mode values */
-        PWER  = 0x00000002;
-        PFER  = 0x00000000;
-        PRER  = 0x00000002;
-        PGSR0 = 0x0158C000;
-        PGSR1 = 0x00FF0080;
-        PGSR2 = 0x0001C004;
         /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
         PCFR |= PCFR_OPDE;
 
-        corgi_ssp_set_machinfo(&corgi_ssp_machinfo);
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(corgi_pin_config));
 
-        pxa_gpio_mode(CORGI_GPIO_IR_ON | GPIO_OUT);
-        pxa_gpio_mode(CORGI_GPIO_HSYNC | GPIO_IN);
+        corgi_init_spi();
 
         pxa_set_udc_info(&udc_info);
         pxa_set_mci_info(&corgi_mci_platform_data);
diff --git a/arch/arm/mach-pxa/corgi_lcd.c b/arch/arm/mach-pxa/corgi_lcd.c
deleted file mode 100644
index 311baf149b07..000000000000
--- a/arch/arm/mach-pxa/corgi_lcd.c
+++ /dev/null
@@ -1,290 +0,0 @@
-/*
- * linux/arch/arm/mach-pxa/corgi_lcd.c
- *
- * Corgi/Spitz LCD Specific Code
- *
- * Copyright (C) 2005 Richard Purdie
- *
- * Connectivity:
- *   Corgi - LCD to ATI Imageon w100 (Wallaby)
- *   Spitz - LCD to PXA Framebuffer
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#include <linux/delay.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/module.h>
-#include <linux/string.h>
-#include <mach/akita.h>
-#include <mach/corgi.h>
-#include <mach/hardware.h>
-#include <mach/pxa-regs.h>
-#include <mach/sharpsl.h>
-#include <mach/spitz.h>
-#include <asm/hardware/scoop.h>
-#include <asm/mach/sharpsl_param.h>
-#include "generic.h"
-
-/* Register Addresses */
-#define RESCTL_ADRS     0x00
-#define PHACTRL_ADRS    0x01
-#define DUTYCTRL_ADRS   0x02
-#define POWERREG0_ADRS  0x03
-#define POWERREG1_ADRS  0x04
-#define GPOR3_ADRS      0x05
-#define PICTRL_ADRS     0x06
-#define POLCTRL_ADRS    0x07
-
-/* Register Bit Definitions */
-#define RESCTL_QVGA     0x01
-#define RESCTL_VGA      0x00
-
-#define POWER1_VW_ON    0x01  /* VW Supply FET ON */
-#define POWER1_GVSS_ON  0x02  /* GVSS(-8V) Power Supply ON */
-#define POWER1_VDD_ON   0x04  /* VDD(8V),SVSS(-4V) Power Supply ON */
-
-#define POWER1_VW_OFF   0x00  /* VW Supply FET OFF */
-#define POWER1_GVSS_OFF 0x00  /* GVSS(-8V) Power Supply OFF */
-#define POWER1_VDD_OFF  0x00  /* VDD(8V),SVSS(-4V) Power Supply OFF */
-
-#define POWER0_COM_DCLK 0x01  /* COM Voltage DC Bias DAC Serial Data Clock */
-#define POWER0_COM_DOUT 0x02  /* COM Voltage DC Bias DAC Serial Data Out */
-#define POWER0_DAC_ON   0x04  /* DAC Power Supply ON */
-#define POWER0_COM_ON   0x08  /* COM Power Supply ON */
-#define POWER0_VCC5_ON  0x10  /* VCC5 Power Supply ON */
-
-#define POWER0_DAC_OFF  0x00  /* DAC Power Supply OFF */
-#define POWER0_COM_OFF  0x00  /* COM Power Supply OFF */
-#define POWER0_VCC5_OFF 0x00  /* VCC5 Power Supply OFF */
-
-#define PICTRL_INIT_STATE      0x01
-#define PICTRL_INIOFF          0x02
-#define PICTRL_POWER_DOWN      0x04
-#define PICTRL_COM_SIGNAL_OFF  0x08
-#define PICTRL_DAC_SIGNAL_OFF  0x10
-
-#define POLCTRL_SYNC_POL_FALL  0x01
-#define POLCTRL_EN_POL_FALL    0x02
-#define POLCTRL_DATA_POL_FALL  0x04
-#define POLCTRL_SYNC_ACT_H     0x08
-#define POLCTRL_EN_ACT_L       0x10
-
-#define POLCTRL_SYNC_POL_RISE  0x00
-#define POLCTRL_EN_POL_RISE    0x00
-#define POLCTRL_DATA_POL_RISE  0x00
-#define POLCTRL_SYNC_ACT_L     0x00
-#define POLCTRL_EN_ACT_H       0x00
-
-#define PHACTRL_PHASE_MANUAL   0x01
-#define DEFAULT_PHAD_QVGA     (9)
-#define DEFAULT_COMADJ        (125)
-
-/*
- * This is only a psuedo I2C interface. We can't use the standard kernel
- * routines as the interface is write only. We just assume the data is acked...
- */
-static void lcdtg_ssp_i2c_send(u8 data)
-{
-        corgi_ssp_lcdtg_send(POWERREG0_ADRS, data);
-        udelay(10);
-}
-
-static void lcdtg_i2c_send_bit(u8 data)
-{
-        lcdtg_ssp_i2c_send(data);
-        lcdtg_ssp_i2c_send(data | POWER0_COM_DCLK);
-        lcdtg_ssp_i2c_send(data);
-}
-
-static void lcdtg_i2c_send_start(u8 base)
-{
-        lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK | POWER0_COM_DOUT);
-        lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK);
-        lcdtg_ssp_i2c_send(base);
-}
-
-static void lcdtg_i2c_send_stop(u8 base)
-{
-        lcdtg_ssp_i2c_send(base);
-        lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK);
-        lcdtg_ssp_i2c_send(base | POWER0_COM_DCLK | POWER0_COM_DOUT);
-}
-
-static void lcdtg_i2c_send_byte(u8 base, u8 data)
-{
-        int i;
-        for (i = 0; i < 8; i++) {
-                if (data & 0x80)
-                        lcdtg_i2c_send_bit(base | POWER0_COM_DOUT);
-                else
-                        lcdtg_i2c_send_bit(base);
-                data <<= 1;
-        }
-}
-
-static void lcdtg_i2c_wait_ack(u8 base)
-{
-        lcdtg_i2c_send_bit(base);
-}
-
-static void lcdtg_set_common_voltage(u8 base_data, u8 data)
-{
-        /* Set Common Voltage to M62332FP via I2C */
-        lcdtg_i2c_send_start(base_data);
-        lcdtg_i2c_send_byte(base_data, 0x9c);
-        lcdtg_i2c_wait_ack(base_data);
-        lcdtg_i2c_send_byte(base_data, 0x00);
-        lcdtg_i2c_wait_ack(base_data);
-        lcdtg_i2c_send_byte(base_data, data);
-        lcdtg_i2c_wait_ack(base_data);
-        lcdtg_i2c_send_stop(base_data);
-}
-
-/* Set Phase Adjust */
-static void lcdtg_set_phadadj(int mode)
-{
-        int adj;
-        switch(mode) {
-                case 480:
-                case 640:
-                        /* Setting for VGA */
-                        adj = sharpsl_param.phadadj;
-                        if (adj < 0) {
-                                adj = PHACTRL_PHASE_MANUAL;
-                        } else {
-                                adj = ((adj & 0x0f) << 1) | PHACTRL_PHASE_MANUAL;
-                        }
-                        break;
-                case 240:
-                case 320:
-                default:
-                        /* Setting for QVGA */
-                        adj = (DEFAULT_PHAD_QVGA << 1) | PHACTRL_PHASE_MANUAL;
-                        break;
-        }
-
-        corgi_ssp_lcdtg_send(PHACTRL_ADRS, adj);
-}
-
-static int lcd_inited;
-
-void corgi_lcdtg_hw_init(int mode)
-{
-        if (!lcd_inited) {
-                int comadj;
-
-                /* Initialize Internal Logic & Port */
-                corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_POWER_DOWN | PICTRL_INIOFF | PICTRL_INIT_STATE
-                                | PICTRL_COM_SIGNAL_OFF | PICTRL_DAC_SIGNAL_OFF);
-
-                corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_OFF
-                                | POWER0_COM_OFF | POWER0_VCC5_OFF);
-
-                corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_OFF);
-
-                /* VDD(+8V), SVSS(-4V) ON */
-                corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_ON);
-                mdelay(3);
-
-                /* DAC ON */
-                corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON
-                                | POWER0_COM_OFF | POWER0_VCC5_OFF);
-
-                /* INIB = H, INI = L  */
-                /* PICTL[0] = H , PICTL[1] = PICTL[2] = PICTL[4] = L */
-                corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_INIT_STATE | PICTRL_COM_SIGNAL_OFF);
-
-                /* Set Common Voltage */
-                comadj = sharpsl_param.comadj;
-                if (comadj < 0)
-                        comadj = DEFAULT_COMADJ;
-                lcdtg_set_common_voltage((POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_OFF), comadj);
-
-                /* VCC5 ON, DAC ON */
-                corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON |
-                                POWER0_COM_OFF | POWER0_VCC5_ON);
-
-                /* GVSS(-8V) ON, VDD ON */
-                corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_ON | POWER1_VDD_ON);
-                mdelay(2);
-
-                /* COM SIGNAL ON (PICTL[3] = L) */
-                corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_INIT_STATE);
-
-                /* COM ON, DAC ON, VCC5_ON */
-                corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON
-                                | POWER0_COM_ON | POWER0_VCC5_ON);
-
-                /* VW ON, GVSS ON, VDD ON */
-                corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_ON | POWER1_GVSS_ON | POWER1_VDD_ON);
-
-                /* Signals output enable */
-                corgi_ssp_lcdtg_send(PICTRL_ADRS, 0);
-
-                /* Set Phase Adjust */
-                lcdtg_set_phadadj(mode);
-
-                /* Initialize for Input Signals from ATI */
-                corgi_ssp_lcdtg_send(POLCTRL_ADRS, POLCTRL_SYNC_POL_RISE | POLCTRL_EN_POL_RISE
-                                | POLCTRL_DATA_POL_RISE | POLCTRL_SYNC_ACT_L | POLCTRL_EN_ACT_H);
-                udelay(1000);
-
-                lcd_inited=1;
-        } else {
-                lcdtg_set_phadadj(mode);
-        }
-
-        switch(mode) {
-                case 480:
-                case 640:
-                        /* Set Lcd Resolution (VGA) */
-                        corgi_ssp_lcdtg_send(RESCTL_ADRS, RESCTL_VGA);
-                        break;
-                case 240:
-                case 320:
-                default:
-                        /* Set Lcd Resolution (QVGA) */
-                        corgi_ssp_lcdtg_send(RESCTL_ADRS, RESCTL_QVGA);
-                        break;
-        }
-}
-
-void corgi_lcdtg_suspend(void)
-{
-        /* 60Hz x 2 frame = 16.7msec x 2 = 33.4 msec */
-        mdelay(34);
-
-        /* (1)VW OFF */
-        corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_ON | POWER1_VDD_ON);
-
-        /* (2)COM OFF */
-        corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_COM_SIGNAL_OFF);
-        corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_ON);
-
-        /* (3)Set Common Voltage Bias 0V */
-        lcdtg_set_common_voltage(POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_ON, 0);
-
-        /* (4)GVSS OFF */
-        corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_ON);
-
-        /* (5)VCC5 OFF */
-        corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_DAC_ON | POWER0_COM_OFF | POWER0_VCC5_OFF);
-
-        /* (6)Set PDWN, INIOFF, DACOFF */
-        corgi_ssp_lcdtg_send(PICTRL_ADRS, PICTRL_INIOFF | PICTRL_DAC_SIGNAL_OFF |
-                        PICTRL_POWER_DOWN | PICTRL_COM_SIGNAL_OFF);
-
-        /* (7)DAC OFF */
-        corgi_ssp_lcdtg_send(POWERREG0_ADRS, POWER0_DAC_OFF | POWER0_COM_OFF | POWER0_VCC5_OFF);
-
-        /* (8)VDD OFF */
-        corgi_ssp_lcdtg_send(POWERREG1_ADRS, POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_OFF);
-
-        lcd_inited = 0;
-}
-
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c
index 35bbfccd2df3..eb7d6c94aa42 100644
--- a/arch/arm/mach-pxa/corgi_pm.c
+++ b/arch/arm/mach-pxa/corgi_pm.c
@@ -21,7 +21,6 @@
 #include <asm/irq.h>
 #include <asm/mach-types.h>
 #include <mach/hardware.h>
-#include <asm/hardware/scoop.h>
 
 #include <mach/sharpsl.h>
 #include <mach/corgi.h>
diff --git a/arch/arm/mach-pxa/corgi_ssp.c b/arch/arm/mach-pxa/corgi_ssp.c
deleted file mode 100644
index 8e2f2215c4ba..000000000000
--- a/arch/arm/mach-pxa/corgi_ssp.c
+++ /dev/null
@@ -1,276 +0,0 @@
-/*
- *  SSP control code for Sharp Corgi devices
- *
- *  Copyright (c) 2004-2005 Richard Purdie
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License version 2 as
- *  published by the Free Software Foundation.
- *
- */
-
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/slab.h>
-#include <linux/delay.h>
-#include <linux/platform_device.h>
-#include <mach/hardware.h>
-#include <asm/mach-types.h>
-
-#include <mach/ssp.h>
-#include <mach/pxa-regs.h>
-#include <mach/pxa2xx-gpio.h>
-#include <mach/regs-ssp.h>
-#include "sharpsl.h"
-
-static DEFINE_SPINLOCK(corgi_ssp_lock);
-static struct ssp_dev corgi_ssp_dev;
-static struct ssp_state corgi_ssp_state;
-static struct corgissp_machinfo *ssp_machinfo;
-
-/*
- * There are three devices connected to the SSP interface:
- *   1. A touchscreen controller (TI ADS7846 compatible)
- *   2. An LCD controller (with some Backlight functionality)
- *   3. A battery monitoring IC (Maxim MAX1111)
- *
- * Each device uses a different speed/mode of communication.
- *
- * The touchscreen is very sensitive and the most frequently used
- * so the port is left configured for this.
- *
- * Devices are selected using Chip Selects on GPIOs.
- */
-
-/*
- *  ADS7846 Routines
- */
-unsigned long corgi_ssp_ads7846_putget(ulong data)
-{
-        unsigned long flag;
-        u32 ret = 0;
-
-        spin_lock_irqsave(&corgi_ssp_lock, flag);
-        if (ssp_machinfo->cs_ads7846 >= 0)
-                GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
-
-        ssp_write_word(&corgi_ssp_dev,data);
-        ssp_read_word(&corgi_ssp_dev, &ret);
-
-        if (ssp_machinfo->cs_ads7846 >= 0)
-                GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
-        spin_unlock_irqrestore(&corgi_ssp_lock, flag);
-
-        return ret;
-}
-
-/*
- * NOTE: These functions should always be called in interrupt context
- * and use the _lock and _unlock functions. They are very time sensitive.
- */
-void corgi_ssp_ads7846_lock(void)
-{
-        spin_lock(&corgi_ssp_lock);
-        if (ssp_machinfo->cs_ads7846 >= 0)
-                GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
-}
-
-void corgi_ssp_ads7846_unlock(void)
-{
-        if (ssp_machinfo->cs_ads7846 >= 0)
-                GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
-        spin_unlock(&corgi_ssp_lock);
-}
-
-void corgi_ssp_ads7846_put(ulong data)
-{
-        ssp_write_word(&corgi_ssp_dev,data);
-}
-
-unsigned long corgi_ssp_ads7846_get(void)
-{
-        u32 ret = 0;
-        ssp_read_word(&corgi_ssp_dev, &ret);
-        return ret;
-}
-
-EXPORT_SYMBOL(corgi_ssp_ads7846_putget);
-EXPORT_SYMBOL(corgi_ssp_ads7846_lock);
-EXPORT_SYMBOL(corgi_ssp_ads7846_unlock);
-EXPORT_SYMBOL(corgi_ssp_ads7846_put);
-EXPORT_SYMBOL(corgi_ssp_ads7846_get);
-
-
-/*
- *  LCD/Backlight Routines
- */
-unsigned long corgi_ssp_dac_put(ulong data)
-{
-        unsigned long flag, sscr1 = SSCR1_SPH;
-        u32 tmp;
-
-        spin_lock_irqsave(&corgi_ssp_lock, flag);
-
-        if (machine_is_spitz() || machine_is_akita() || machine_is_borzoi())
-                sscr1 = 0;
-
-        ssp_disable(&corgi_ssp_dev);
-        ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), sscr1, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_lcdcon));
-        ssp_enable(&corgi_ssp_dev);
-
-        if (ssp_machinfo->cs_lcdcon >= 0)
-                GPCR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);
-        ssp_write_word(&corgi_ssp_dev,data);
-        /* Read null data back from device to prevent SSP overflow */
-        ssp_read_word(&corgi_ssp_dev, &tmp);
-        if (ssp_machinfo->cs_lcdcon >= 0)
-                GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);
-
-        ssp_disable(&corgi_ssp_dev);
-        ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
-        ssp_enable(&corgi_ssp_dev);
-
-        spin_unlock_irqrestore(&corgi_ssp_lock, flag);
-
-        return 0;
-}
-
-void corgi_ssp_lcdtg_send(u8 adrs, u8 data)
-{
-        corgi_ssp_dac_put(((adrs & 0x07) << 5) | (data & 0x1f));
-}
-
-void corgi_ssp_blduty_set(int duty)
-{
-        corgi_ssp_lcdtg_send(0x02,duty);
-}
-
-EXPORT_SYMBOL(corgi_ssp_lcdtg_send);
-EXPORT_SYMBOL(corgi_ssp_blduty_set);
-
-/*
- *  Max1111 Routines
- */
-int corgi_ssp_max1111_get(ulong data)
-{
-        unsigned long flag;
-        long voltage = 0, voltage1 = 0, voltage2 = 0;
-
-        spin_lock_irqsave(&corgi_ssp_lock, flag);
-        if (ssp_machinfo->cs_max1111 >= 0)
-                GPCR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111);
-        ssp_disable(&corgi_ssp_dev);
-        ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_max1111));
-        ssp_enable(&corgi_ssp_dev);
-
-        udelay(1);
-
-        /* TB1/RB1 */
-        ssp_write_word(&corgi_ssp_dev,data);
-        ssp_read_word(&corgi_ssp_dev, (u32*)&voltage1); /* null read */
-
-        /* TB12/RB2 */
-        ssp_write_word(&corgi_ssp_dev,0);
-        ssp_read_word(&corgi_ssp_dev, (u32*)&voltage1);
-
-        /* TB13/RB3*/
-        ssp_write_word(&corgi_ssp_dev,0);
-        ssp_read_word(&corgi_ssp_dev, (u32*)&voltage2);
-
-        ssp_disable(&corgi_ssp_dev);
-        ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
-        ssp_enable(&corgi_ssp_dev);
-        if (ssp_machinfo->cs_max1111 >= 0)
-                GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111);
-        spin_unlock_irqrestore(&corgi_ssp_lock, flag);
-
-        if (voltage1 & 0xc0 || voltage2 & 0x3f)
-                voltage = -1;
-        else
-                voltage = ((voltage1 << 2) & 0xfc) | ((voltage2 >> 6) & 0x03);
-
-        return voltage;
-}
-
-EXPORT_SYMBOL(corgi_ssp_max1111_get);
-
-/*
- *  Support Routines
- */
-
-void __init corgi_ssp_set_machinfo(struct corgissp_machinfo *machinfo)
-{
-        ssp_machinfo = machinfo;
-}
-
-static int __init corgi_ssp_probe(struct platform_device *dev)
-{
-        int ret;
-
-        /* Chip Select - Disable All */
-        if (ssp_machinfo->cs_lcdcon >= 0)
-                pxa_gpio_mode(ssp_machinfo->cs_lcdcon  | GPIO_OUT | GPIO_DFLT_HIGH);
-        if (ssp_machinfo->cs_max1111 >= 0)
-                pxa_gpio_mode(ssp_machinfo->cs_max1111 | GPIO_OUT | GPIO_DFLT_HIGH);
-        if (ssp_machinfo->cs_ads7846 >= 0)
-                pxa_gpio_mode(ssp_machinfo->cs_ads7846 | GPIO_OUT | GPIO_DFLT_HIGH);
-
-        ret = ssp_init(&corgi_ssp_dev, ssp_machinfo->port, 0);
-
-        if (ret)
-                printk(KERN_ERR "Unable to register SSP handler!\n");
-        else {
-                ssp_disable(&corgi_ssp_dev);
-                ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
-                ssp_enable(&corgi_ssp_dev);
-        }
-
-        return ret;
-}
-
-static int corgi_ssp_remove(struct platform_device *dev)
-{
-        ssp_exit(&corgi_ssp_dev);
-        return 0;
-}
-
-static int corgi_ssp_suspend(struct platform_device *dev, pm_message_t state)
-{
-        ssp_flush(&corgi_ssp_dev);
-        ssp_save_state(&corgi_ssp_dev,&corgi_ssp_state);
-
-        return 0;
-}
-
-static int corgi_ssp_resume(struct platform_device *dev)
-{
-        if (ssp_machinfo->cs_lcdcon >= 0)
-                GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);  /* High - Disable LCD Control/Timing Gen */
-        if (ssp_machinfo->cs_max1111 >= 0)
-                GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); /* High - Disable MAX1111*/
-        if (ssp_machinfo->cs_ads7846 >= 0)
-                GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); /* High - Disable ADS7846*/
-        ssp_restore_state(&corgi_ssp_dev,&corgi_ssp_state);
-        ssp_enable(&corgi_ssp_dev);
-
-        return 0;
-}
-
-static struct platform_driver corgissp_driver = {
-        .probe          = corgi_ssp_probe,
-        .remove         = corgi_ssp_remove,
-        .suspend        = corgi_ssp_suspend,
-        .resume         = corgi_ssp_resume,
-        .driver         = {
-                .name   = "corgi-ssp",
-        },
-};
-
-int __init corgi_ssp_init(void)
-{
-        return platform_driver_register(&corgissp_driver);
-}
-
-arch_initcall(corgi_ssp_init);
diff --git a/arch/arm/mach-pxa/cpu-pxa.c b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
index 6f5569bac131..d82528e74bd0 100644
--- a/arch/arm/mach-pxa/cpu-pxa.c
+++ b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
@@ -1,5 +1,5 @@
 /*
- *  linux/arch/arm/mach-pxa/cpu-pxa.c
+ *  linux/arch/arm/mach-pxa/cpufreq-pxa2xx.c
  *
  *  Copyright (C) 2002,2003 Intrinsyc Software
  *
diff --git a/arch/arm/mach-pxa/cpufreq-pxa3xx.c b/arch/arm/mach-pxa/cpufreq-pxa3xx.c
new file mode 100644
index 000000000000..1ea0c9c0adaf
--- /dev/null
+++ b/arch/arm/mach-pxa/cpufreq-pxa3xx.c
@@ -0,0 +1,258 @@
+/*
+ * linux/arch/arm/mach-pxa/cpufreq-pxa3xx.c
+ *
+ * Copyright (C) 2008 Marvell International Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/cpufreq.h>
+
+#include <mach/hardware.h>
+#include <mach/pxa-regs.h>
+#include <mach/pxa3xx-regs.h>
+
+#include "generic.h"
+
+#define HSS_104M        (0)
+#define HSS_156M        (1)
+#define HSS_208M        (2)
+#define HSS_312M        (3)
+
+#define SMCFS_78M       (0)
+#define SMCFS_104M      (2)
+#define SMCFS_208M      (5)
+
+#define SFLFS_104M      (0)
+#define SFLFS_156M      (1)
+#define SFLFS_208M      (2)
+#define SFLFS_312M      (3)
+
+#define XSPCLK_156M     (0)
+#define XSPCLK_NONE     (3)
+
+#define DMCFS_26M       (0)
+#define DMCFS_260M      (3)
+
+struct pxa3xx_freq_info {
+        unsigned int cpufreq_mhz;
+        unsigned int core_xl : 5;
+        unsigned int core_xn : 3;
+        unsigned int hss : 2;
+        unsigned int dmcfs : 2;
+        unsigned int smcfs : 3;
+        unsigned int sflfs : 2;
+        unsigned int df_clkdiv : 3;
+
+        int     vcc_core;       /* in mV */
+        int     vcc_sram;       /* in mV */
+};
+
+#define OP(cpufreq, _xl, _xn, _hss, _dmc, _smc, _sfl, _dfi, vcore, vsram) \
+{                                                                       \
+        .cpufreq_mhz    = cpufreq,                                      \
+        .core_xl        = _xl,                                          \
+        .core_xn        = _xn,                                          \
+        .hss            = HSS_##_hss##M,                                \
+        .dmcfs          = DMCFS_##_dmc##M,                              \
+        .smcfs          = SMCFS_##_smc##M,                              \
+        .sflfs          = SFLFS_##_sfl##M,                              \
+        .df_clkdiv      = _dfi,                                         \
+        .vcc_core       = vcore,                                        \
+        .vcc_sram       = vsram,                                        \
+}
+
+static struct pxa3xx_freq_info pxa300_freqs[] = {
+        /*  CPU XL XN  HSS DMEM SMEM SRAM DFI VCC_CORE VCC_SRAM */
+        OP(104,  8, 1, 104, 260,  78, 104, 3, 1000, 1100), /* 104MHz */
+        OP(208, 16, 1, 104, 260, 104, 156, 2, 1000, 1100), /* 208MHz */
+        OP(416, 16, 2, 156, 260, 104, 208, 2, 1100, 1200), /* 416MHz */
+        OP(624, 24, 2, 208, 260, 208, 312, 3, 1375, 1400), /* 624MHz */
+};
+
+static struct pxa3xx_freq_info pxa320_freqs[] = {
+        /*  CPU XL XN  HSS DMEM SMEM SRAM DFI VCC_CORE VCC_SRAM */
+        OP(104,  8, 1, 104, 260,  78, 104, 3, 1000, 1100), /* 104MHz */
+        OP(208, 16, 1, 104, 260, 104, 156, 2, 1000, 1100), /* 208MHz */
+        OP(416, 16, 2, 156, 260, 104, 208, 2, 1100, 1200), /* 416MHz */
+        OP(624, 24, 2, 208, 260, 208, 312, 3, 1375, 1400), /* 624MHz */
+        OP(806, 31, 2, 208, 260, 208, 312, 3, 1400, 1400), /* 806MHz */
+};
+
+static unsigned int pxa3xx_freqs_num;
+static struct pxa3xx_freq_info *pxa3xx_freqs;
+static struct cpufreq_frequency_table *pxa3xx_freqs_table;
+
+static int setup_freqs_table(struct cpufreq_policy *policy,
+                             struct pxa3xx_freq_info *freqs, int num)
+{
+        struct cpufreq_frequency_table *table;
+        int i;
+
+        table = kzalloc((num + 1) * sizeof(*table), GFP_KERNEL);
+        if (table == NULL)
+                return -ENOMEM;
+
+        for (i = 0; i < num; i++) {
+                table[i].index = i;
+                table[i].frequency = freqs[i].cpufreq_mhz * 1000;
+        }
+        table[num].frequency = i;
+        table[num].frequency = CPUFREQ_TABLE_END;
+
+        pxa3xx_freqs = freqs;
+        pxa3xx_freqs_num = num;
+        pxa3xx_freqs_table = table;
+
+        return cpufreq_frequency_table_cpuinfo(policy, table);
+}
+
+static void __update_core_freq(struct pxa3xx_freq_info *info)
+{
+        uint32_t mask = ACCR_XN_MASK | ACCR_XL_MASK;
+        uint32_t accr = ACCR;
+        uint32_t xclkcfg;
+
+        accr &= ~(ACCR_XN_MASK | ACCR_XL_MASK | ACCR_XSPCLK_MASK);
+        accr |= ACCR_XN(info->core_xn) | ACCR_XL(info->core_xl);
+
+        /* No clock until core PLL is re-locked */
+        accr |= ACCR_XSPCLK(XSPCLK_NONE);
+
+        xclkcfg = (info->core_xn == 2) ? 0x3 : 0x2;     /* turbo bit */
+
+        ACCR = accr;
+        __asm__("mcr p14, 0, %0, c6, c0, 0\n" : : "r"(xclkcfg));
+
+        while ((ACSR & mask) != (accr & mask))
+                cpu_relax();
+}
+
+static void __update_bus_freq(struct pxa3xx_freq_info *info)
+{
+        uint32_t mask;
+        uint32_t accr = ACCR;
+
+        mask = ACCR_SMCFS_MASK | ACCR_SFLFS_MASK | ACCR_HSS_MASK |
+                ACCR_DMCFS_MASK;
+
+        accr &= ~mask;
+        accr |= ACCR_SMCFS(info->smcfs) | ACCR_SFLFS(info->sflfs) |
+                ACCR_HSS(info->hss) | ACCR_DMCFS(info->dmcfs);
+
+        ACCR = accr;
+
+        while ((ACSR & mask) != (accr & mask))
+                cpu_relax();
+}
+
+static int pxa3xx_cpufreq_verify(struct cpufreq_policy *policy)
+{
+        return cpufreq_frequency_table_verify(policy, pxa3xx_freqs_table);
+}
+
+static unsigned int pxa3xx_cpufreq_get(unsigned int cpu)
+{
+        return get_clk_frequency_khz(0);
+}
+
+static int pxa3xx_cpufreq_set(struct cpufreq_policy *policy,
+                              unsigned int target_freq,
+                              unsigned int relation)
+{
+        struct pxa3xx_freq_info *next;
+        struct cpufreq_freqs freqs;
+        unsigned long flags;
+        int idx;
+
+        if (policy->cpu != 0)
+                return -EINVAL;
+
+        /* Lookup the next frequency */
+        if (cpufreq_frequency_table_target(policy, pxa3xx_freqs_table,
+                                target_freq, relation, &idx))
+                return -EINVAL;
+
+        next = &pxa3xx_freqs[idx];
+
+        freqs.old = policy->cur;
+        freqs.new = next->cpufreq_mhz * 1000;
+        freqs.cpu = policy->cpu;
+
+        pr_debug("CPU frequency from %d MHz to %d MHz%s\n",
+                        freqs.old / 1000, freqs.new / 1000,
+                        (freqs.old == freqs.new) ? " (skipped)" : "");
+
+        if (freqs.old == target_freq)
+                return 0;
+
+        cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
+
+        local_irq_save(flags);
+        __update_core_freq(next);
+        __update_bus_freq(next);
+        local_irq_restore(flags);
+
+        cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
+
+        return 0;
+}
+
+static __init int pxa3xx_cpufreq_init(struct cpufreq_policy *policy)
+{
+        int ret = -EINVAL;
+
+        /* set default policy and cpuinfo */
+        policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
+        policy->cpuinfo.min_freq = 104000;
+        policy->cpuinfo.max_freq = (cpu_is_pxa320()) ? 806000 : 624000;
+        policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */
+        policy->cur = policy->min = policy->max = get_clk_frequency_khz(0);
+
+        if (cpu_is_pxa300() || cpu_is_pxa310())
+                ret = setup_freqs_table(policy, ARRAY_AND_SIZE(pxa300_freqs));
+
+        if (cpu_is_pxa320())
+                ret = setup_freqs_table(policy, ARRAY_AND_SIZE(pxa320_freqs));
+
+        if (ret) {
+                pr_err("failed to setup frequency table\n");
+                return ret;
+        }
+
+        pr_info("CPUFREQ support for PXA3xx initialized\n");
+        return 0;
+}
+
+static struct cpufreq_driver pxa3xx_cpufreq_driver = {
+        .verify         = pxa3xx_cpufreq_verify,
+        .target         = pxa3xx_cpufreq_set,
+        .init           = pxa3xx_cpufreq_init,
+        .get            = pxa3xx_cpufreq_get,
+        .name           = "pxa3xx-cpufreq",
+};
+
+static int __init cpufreq_init(void)
+{
+        if (cpu_is_pxa3xx())
+                return cpufreq_register_driver(&pxa3xx_cpufreq_driver);
+
+        return 0;
+}
+module_init(cpufreq_init);
+
+static void __exit cpufreq_exit(void)
+{
+        cpufreq_unregister_driver(&pxa3xx_cpufreq_driver);
+}
+module_exit(cpufreq_exit);
+
+MODULE_DESCRIPTION("CPU frequency scaling driver for PXA3xx");
+MODULE_LICENSE("GPL");
diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h
index 887c738f5911..bb04af4b0aa3 100644
--- a/arch/arm/mach-pxa/devices.h
+++ b/arch/arm/mach-pxa/devices.h
@@ -32,5 +32,6 @@ extern struct platform_device pxa27x_device_pwm0;
 extern struct platform_device pxa27x_device_pwm1;
 
 extern struct platform_device pxa3xx_device_nand;
+extern struct platform_device pxa3xx_device_i2c_power;
 
 void __init pxa_register_device(struct platform_device *dev, void *data);
diff --git a/arch/arm/mach-pxa/e330.c b/arch/arm/mach-pxa/e330.c
new file mode 100644
index 000000000000..d488eded2058
--- /dev/null
+++ b/arch/arm/mach-pxa/e330.c
@@ -0,0 +1,43 @@
+/*
+ * Hardware definitions for the Toshiba eseries PDAs
+ *
+ * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
+ *
+ * This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/setup.h>
+#include <asm/mach/arch.h>
+#include <asm/mach-types.h>
+
+#include <mach/mfp-pxa25x.h>
+#include <mach/hardware.h>
+#include <mach/udc.h>
+
+#include "generic.h"
+#include "eseries.h"
+
+static void __init e330_init(void)
+{
+        pxa_set_udc_info(&e7xx_udc_mach_info);
+}
+
+MACHINE_START(E330, "Toshiba e330")
+        /* Maintainer: Ian Molton (spyro@f2s.com) */
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params    = 0xa0000100,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa25x_init_irq,
+        .fixup          = eseries_fixup,
+        .init_machine   = e330_init,
+        .timer          = &pxa_timer,
+MACHINE_END
+
diff --git a/arch/arm/mach-pxa/e350.c b/arch/arm/mach-pxa/e350.c
new file mode 100644
index 000000000000..8ecbc5479828
--- /dev/null
+++ b/arch/arm/mach-pxa/e350.c
@@ -0,0 +1,43 @@
+/*
+ * Hardware definitions for the Toshiba eseries PDAs
+ *
+ * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
+ *
+ * This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/setup.h>
+#include <asm/mach/arch.h>
+#include <asm/mach-types.h>
+
+#include <mach/mfp-pxa25x.h>
+#include <mach/hardware.h>
+#include <mach/udc.h>
+
+#include "generic.h"
+#include "eseries.h"
+
+static void __init e350_init(void)
+{
+        pxa_set_udc_info(&e7xx_udc_mach_info);
+}
+
+MACHINE_START(E350, "Toshiba e350")
+        /* Maintainer: Ian Molton (spyro@f2s.com) */
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params    = 0xa0000100,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa25x_init_irq,
+        .fixup          = eseries_fixup,
+        .init_machine   = e350_init,
+        .timer          = &pxa_timer,
+MACHINE_END
+
diff --git a/arch/arm/mach-pxa/e400.c b/arch/arm/mach-pxa/e400.c
new file mode 100644
index 000000000000..544bbaa20621
--- /dev/null
+++ b/arch/arm/mach-pxa/e400.c
@@ -0,0 +1,94 @@
+/*
+ * Hardware definitions for the Toshiba eseries PDAs
+ *
+ * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
+ *
+ * This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/setup.h>
+#include <asm/mach/arch.h>
+#include <asm/mach-types.h>
+
+#include <mach/pxa-regs.h>
+#include <mach/mfp-pxa25x.h>
+#include <mach/hardware.h>
+
+#include <mach/pxafb.h>
+#include <mach/udc.h>
+
+#include "generic.h"
+#include "eseries.h"
+
+/* ------------------------ E400 LCD definitions ------------------------ */
+
+static struct pxafb_mode_info e400_pxafb_mode_info = {
+        .pixclock       = 140703,
+        .xres           = 240,
+        .yres           = 320,
+        .bpp            = 16,
+        .hsync_len      = 4,
+        .left_margin    = 28,
+        .right_margin   = 8,
+        .vsync_len      = 3,
+        .upper_margin   = 5,
+        .lower_margin   = 6,
+        .sync           = 0,
+};
+
+static struct pxafb_mach_info e400_pxafb_mach_info = {
+        .modes          = &e400_pxafb_mode_info,
+        .num_modes      = 1,
+        .lccr0          = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
+        .lccr3          = 0,
+        .pxafb_backlight_power  = NULL,
+};
+
+/* ------------------------ E400 MFP config ----------------------------- */
+
+static unsigned long e400_pin_config[] __initdata = {
+        /* Chip selects */
+        GPIO15_nCS_1,   /* CS1 - Flash */
+        GPIO80_nCS_4,   /* CS4 - TMIO */
+
+        /* Clocks */
+        GPIO12_32KHz,
+
+        /* BTUART */
+        GPIO42_BTUART_RXD,
+        GPIO43_BTUART_TXD,
+        GPIO44_BTUART_CTS,
+        GPIO45_GPIO, /* Used by TMIO for #SUSPEND */
+
+        /* wakeup */
+        GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
+};
+
+/* ---------------------------------------------------------------------- */
+
+static void __init e400_init(void)
+{
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(e400_pin_config));
+        set_pxa_fb_info(&e400_pxafb_mach_info);
+        pxa_set_udc_info(&e7xx_udc_mach_info);
+}
+
+MACHINE_START(E400, "Toshiba e400")
+        /* Maintainer: Ian Molton (spyro@f2s.com) */
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params    = 0xa0000100,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa25x_init_irq,
+        .fixup          = eseries_fixup,
+        .init_machine   = e400_init,
+        .timer          = &pxa_timer,
+MACHINE_END
+
diff --git a/arch/arm/mach-pxa/e400_lcd.c b/arch/arm/mach-pxa/e400_lcd.c
deleted file mode 100644
index 263884165f57..000000000000
--- a/arch/arm/mach-pxa/e400_lcd.c
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * e400_lcd.c
- *
- * (c) 2005 Ian Molton <spyro@f2s.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/module.h>
-
-#include <asm/mach-types.h>
-#include <mach/pxa-regs.h>
-#include <mach/pxafb.h>
-
-static struct pxafb_mode_info e400_pxafb_mode_info = {
-        .pixclock       = 140703,
-        .xres           = 240,
-        .yres           = 320,
-        .bpp            = 16,
-        .hsync_len      = 4,
-        .left_margin    = 28,
-        .right_margin   = 8,
-        .vsync_len      = 3,
-        .upper_margin   = 5,
-        .lower_margin   = 6,
-        .sync           = 0,
-};
-
-static struct pxafb_mach_info e400_pxafb_mach_info = {
-        .modes          = &e400_pxafb_mode_info,
-        .num_modes      = 1,
-        .lccr0          = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
-        .lccr3          = 0,
-        .pxafb_backlight_power  = NULL,
-};
-
-static int __init e400_lcd_init(void)
-{
-        if (!machine_is_e400())
-                return -ENODEV;
-
-        set_pxa_fb_info(&e400_pxafb_mach_info);
-        return 0;
-}
-
-module_init(e400_lcd_init);
-
-MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
-MODULE_DESCRIPTION("e400 lcd driver");
-MODULE_LICENSE("GPLv2");
-
diff --git a/arch/arm/mach-pxa/e740.c b/arch/arm/mach-pxa/e740.c
new file mode 100644
index 000000000000..c57a15b37f0d
--- /dev/null
+++ b/arch/arm/mach-pxa/e740.c
@@ -0,0 +1,169 @@
+/*
+ * Hardware definitions for the Toshiba eseries PDAs
+ *
+ * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
+ *
+ * This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/fb.h>
+
+#include <video/w100fb.h>
+
+#include <asm/setup.h>
+#include <asm/mach/arch.h>
+#include <asm/mach-types.h>
+
+#include <mach/mfp-pxa25x.h>
+#include <mach/hardware.h>
+#include <mach/udc.h>
+
+#include "generic.h"
+#include "eseries.h"
+
+
+/* ------------------------ e740 video support --------------------------- */
+
+static struct w100_gen_regs e740_lcd_regs = {
+        .lcd_format =            0x00008023,
+        .lcdd_cntl1 =            0x0f000000,
+        .lcdd_cntl2 =            0x0003ffff,
+        .genlcd_cntl1 =          0x00ffff03,
+        .genlcd_cntl2 =          0x003c0f03,
+        .genlcd_cntl3 =          0x000143aa,
+};
+
+static struct w100_mode e740_lcd_mode = {
+        .xres            = 240,
+        .yres            = 320,
+        .left_margin     = 20,
+        .right_margin    = 28,
+        .upper_margin    = 9,
+        .lower_margin    = 8,
+        .crtc_ss         = 0x80140013,
+        .crtc_ls         = 0x81150110,
+        .crtc_gs         = 0x80050005,
+        .crtc_vpos_gs    = 0x000a0009,
+        .crtc_rev        = 0x0040010a,
+        .crtc_dclk       = 0xa906000a,
+        .crtc_gclk       = 0x80050108,
+        .crtc_goe        = 0x80050108,
+        .pll_freq        = 57,
+        .pixclk_divider         = 4,
+        .pixclk_divider_rotated = 4,
+        .pixclk_src     = CLK_SRC_XTAL,
+        .sysclk_divider  = 1,
+        .sysclk_src     = CLK_SRC_PLL,
+        .crtc_ps1_active =       0x41060010,
+};
+
+static struct w100_gpio_regs e740_w100_gpio_info = {
+        .init_data1 = 0x21002103,
+        .gpio_dir1  = 0xffffdeff,
+        .gpio_oe1   = 0x03c00643,
+        .init_data2 = 0x003f003f,
+        .gpio_dir2  = 0xffffffff,
+        .gpio_oe2   = 0x000000ff,
+};
+
+static struct w100fb_mach_info e740_fb_info = {
+        .modelist   = &e740_lcd_mode,
+        .num_modes  = 1,
+        .regs       = &e740_lcd_regs,
+        .gpio       = &e740_w100_gpio_info,
+        .xtal_freq = 14318000,
+        .xtal_dbl   = 1,
+};
+
+static struct resource e740_fb_resources[] = {
+        [0] = {
+                .start          = 0x0c000000,
+                .end            = 0x0cffffff,
+                .flags          = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device e740_fb_device = {
+        .name           = "w100fb",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = &e740_fb_info,
+        },
+        .num_resources  = ARRAY_SIZE(e740_fb_resources),
+        .resource       = e740_fb_resources,
+};
+
+/* --------------------------- MFP Pin config -------------------------- */
+
+static unsigned long e740_pin_config[] __initdata = {
+        /* Chip selects */
+        GPIO15_nCS_1,   /* CS1 - Flash */
+        GPIO79_nCS_3,   /* CS3 - IMAGEON */
+        GPIO80_nCS_4,   /* CS4 - TMIO */
+
+        /* Clocks */
+        GPIO12_32KHz,
+
+        /* BTUART */
+        GPIO42_BTUART_RXD,
+        GPIO43_BTUART_TXD,
+        GPIO44_BTUART_CTS,
+        GPIO45_GPIO, /* Used by TMIO for #SUSPEND */
+
+        /* PC Card */
+        GPIO8_GPIO,   /* CD0 */
+        GPIO44_GPIO,  /* CD1 */
+        GPIO11_GPIO,  /* IRQ0 */
+        GPIO6_GPIO,   /* IRQ1 */
+        GPIO27_GPIO,  /* RST0 */
+        GPIO24_GPIO,  /* RST1 */
+        GPIO20_GPIO,  /* PWR0 */
+        GPIO23_GPIO,  /* PWR1 */
+        GPIO48_nPOE,
+        GPIO49_nPWE,
+        GPIO50_nPIOR,
+        GPIO51_nPIOW,
+        GPIO52_nPCE_1,
+        GPIO53_nPCE_2,
+        GPIO54_nPSKTSEL,
+        GPIO55_nPREG,
+        GPIO56_nPWAIT,
+        GPIO57_nIOIS16,
+
+        /* wakeup */
+        GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
+};
+
+/* ----------------------------------------------------------------------- */
+
+static struct platform_device *devices[] __initdata = {
+        &e740_fb_device,
+};
+
+static void __init e740_init(void)
+{
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(e740_pin_config));
+        platform_add_devices(devices, ARRAY_SIZE(devices));
+        pxa_set_udc_info(&e7xx_udc_mach_info);
+}
+
+MACHINE_START(E740, "Toshiba e740")
+        /* Maintainer: Ian Molton (spyro@f2s.com) */
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params    = 0xa0000100,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa25x_init_irq,
+        .fixup          = eseries_fixup,
+        .init_machine   = e740_init,
+        .timer          = &pxa_timer,
+MACHINE_END
+
diff --git a/arch/arm/mach-pxa/e740_lcd.c b/arch/arm/mach-pxa/e740_lcd.c
deleted file mode 100644
index 26bd599af178..000000000000
--- a/arch/arm/mach-pxa/e740_lcd.c
+++ /dev/null
@@ -1,123 +0,0 @@
-/* e740_lcd.c
- *
- * This file contains the definitions for the LCD timings and functions
- * to control the LCD power / frontlighting via the w100fb driver.
- *
- * (c) 2005 Ian Molton <spyro@f2s.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#include <linux/module.h>
-#include <linux/device.h>
-#include <linux/fb.h>
-#include <linux/err.h>
-#include <linux/platform_device.h>
-
-#include <asm/mach-types.h>
-
-#include <video/w100fb.h>
-
-/*
-**potential** shutdown routine - to be investigated
-devmem2 0x0c010528 w 0xff3fff00
-devmem2 0x0c010190 w 0x7FFF8000
-devmem2 0x0c0101b0 w 0x00FF0000
-devmem2 0x0c01008c w 0x00000000
-devmem2 0x0c010080 w 0x000000bf
-devmem2 0x0c010098 w 0x00000015
-devmem2 0x0c010088 w 0x4b000204
-devmem2 0x0c010098 w 0x0000001d
-*/
-
-static struct w100_gen_regs e740_lcd_regs = {
-        .lcd_format =            0x00008023,
-        .lcdd_cntl1 =            0x0f000000,
-        .lcdd_cntl2 =            0x0003ffff,
-        .genlcd_cntl1 =          0x00ffff03,
-        .genlcd_cntl2 =          0x003c0f03,
-        .genlcd_cntl3 =          0x000143aa,
-};
-
-static struct w100_mode e740_lcd_mode = {
-        .xres            = 240,
-        .yres            = 320,
-        .left_margin     = 20,
-        .right_margin    = 28,
-        .upper_margin    = 9,
-        .lower_margin    = 8,
-        .crtc_ss         = 0x80140013,
-        .crtc_ls         = 0x81150110,
-        .crtc_gs         = 0x80050005,
-        .crtc_vpos_gs    = 0x000a0009,
-        .crtc_rev        = 0x0040010a,
-        .crtc_dclk       = 0xa906000a,
-        .crtc_gclk       = 0x80050108,
-        .crtc_goe        = 0x80050108,
-        .pll_freq        = 57,
-        .pixclk_divider         = 4,
-        .pixclk_divider_rotated = 4,
-        .pixclk_src     = CLK_SRC_XTAL,
-        .sysclk_divider  = 1,
-        .sysclk_src     = CLK_SRC_PLL,
-        .crtc_ps1_active =       0x41060010,
-};
-
-
-static struct w100_gpio_regs e740_w100_gpio_info = {
-        .init_data1 = 0x21002103,
-        .gpio_dir1  = 0xffffdeff,
-        .gpio_oe1   = 0x03c00643,
-        .init_data2 = 0x003f003f,
-        .gpio_dir2  = 0xffffffff,
-        .gpio_oe2   = 0x000000ff,
-};
-
-static struct w100fb_mach_info e740_fb_info = {
-        .modelist   = &e740_lcd_mode,
-        .num_modes  = 1,
-        .regs       = &e740_lcd_regs,
-        .gpio       = &e740_w100_gpio_info,
-        .xtal_freq = 14318000,
-        .xtal_dbl   = 1,
-};
-
-static struct resource e740_fb_resources[] = {
-        [0] = {
-                .start          = 0x0c000000,
-                .end            = 0x0cffffff,
-                .flags          = IORESOURCE_MEM,
-        },
-};
-
-/* ----------------------- device declarations -------------------------- */
-
-
-static struct platform_device e740_fb_device = {
-        .name           = "w100fb",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = &e740_fb_info,
-        },
-        .num_resources  = ARRAY_SIZE(e740_fb_resources),
-        .resource       = e740_fb_resources,
-};
-
-static int e740_lcd_init(void)
-{
-        int ret;
-
-        if (!machine_is_e740())
-                return -ENODEV;
-
-        return platform_device_register(&e740_fb_device);
-}
-
-module_init(e740_lcd_init);
-
-MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
-MODULE_DESCRIPTION("e740 lcd driver");
-MODULE_LICENSE("GPLv2");
diff --git a/arch/arm/mach-pxa/e750_lcd.c b/arch/arm/mach-pxa/e750.c
index 75edc3b5390f..640e738b85df 100644
--- a/arch/arm/mach-pxa/e750_lcd.c
+++ b/arch/arm/mach-pxa/e750.c
@@ -1,25 +1,35 @@
-/* e750_lcd.c
+/*
+ * Hardware definitions for the Toshiba eseries PDAs
  *
- * This file contains the definitions for the LCD timings and functions
- * to control the LCD power / frontlighting via the w100fb driver.
+ * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
  *
- * (c) 2005 Ian Molton <spyro@f2s.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
  *
  */
 
-#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
 #include <linux/device.h>
-#include <linux/fb.h>
-#include <linux/err.h>
 #include <linux/platform_device.h>
+#include <linux/fb.h>
+
+#include <video/w100fb.h>
 
+#include <asm/setup.h>
+#include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 
-#include <video/w100fb.h>
+#include <mach/mfp-pxa25x.h>
+#include <mach/hardware.h>
+#include <mach/udc.h>
+
+#include "generic.h"
+#include "eseries.h"
+
+/* ---------------------- E750 LCD definitions -------------------- */
 
 static struct w100_gen_regs e750_lcd_regs = {
         .lcd_format =            0x00008003,
@@ -54,7 +64,6 @@ static struct w100_mode e750_lcd_mode = {
         .sysclk_src     = CLK_SRC_PLL,
 };
 
-
 static struct w100_gpio_regs e750_w100_gpio_info = {
         .init_data1 = 0x01192f1b,
         .gpio_dir1  = 0xd5ffdeff,
@@ -81,9 +90,6 @@ static struct resource e750_fb_resources[] = {
         },
 };
 
-/* ----------------------- device declarations -------------------------- */
-
-
 static struct platform_device e750_fb_device = {
         .name           = "w100fb",
         .id             = -1,
@@ -94,16 +100,27 @@ static struct platform_device e750_fb_device = {
         .resource       = e750_fb_resources,
 };
 
-static int e750_lcd_init(void)
-{
-        if (!machine_is_e750())
-                return -ENODEV;
+/* ----------------------------------------------------------------------- */
 
-        return platform_device_register(&e750_fb_device);
+static struct platform_device *devices[] __initdata = {
+        &e750_fb_device,
+};
+
+static void __init e750_init(void)
+{
+        platform_add_devices(devices, ARRAY_SIZE(devices));
+        pxa_set_udc_info(&e7xx_udc_mach_info);
 }
 
-module_init(e750_lcd_init);
+MACHINE_START(E750, "Toshiba e750")
+        /* Maintainer: Ian Molton (spyro@f2s.com) */
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params    = 0xa0000100,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa25x_init_irq,
+        .fixup          = eseries_fixup,
+        .init_machine   = e750_init,
+        .timer          = &pxa_timer,
+MACHINE_END
 
-MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
-MODULE_DESCRIPTION("e750 lcd driver");
-MODULE_LICENSE("GPLv2");
diff --git a/arch/arm/mach-pxa/e800_lcd.c b/arch/arm/mach-pxa/e800.c
index e6aeab0ebc22..a293e09bfe25 100644
--- a/arch/arm/mach-pxa/e800_lcd.c
+++ b/arch/arm/mach-pxa/e800.c
@@ -1,25 +1,36 @@
-/* e800_lcd.c
+/*
+ * Hardware definitions for the Toshiba eseries PDAs
  *
- * This file contains the definitions for the LCD timings and functions
- * to control the LCD power / frontlighting via the w100fb driver.
+ * Copyright (c) 2003 Ian Molton <spyro@f2s.com>
  *
- * (c) 2005 Ian Molton <spyro@f2s.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
  *
  */
 
-#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
 #include <linux/device.h>
-#include <linux/fb.h>
-#include <linux/err.h>
 #include <linux/platform_device.h>
+#include <linux/fb.h>
+
+#include <video/w100fb.h>
 
+#include <asm/setup.h>
+#include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 
-#include <video/w100fb.h>
+#include <mach/mfp-pxa25x.h>
+#include <mach/hardware.h>
+#include <mach/eseries-gpio.h>
+#include <mach/udc.h>
+
+#include "generic.h"
+#include "eseries.h"
+
+/* ------------------------ e800 LCD definitions ------------------------- */
 
 static struct w100_gen_regs e800_lcd_regs = {
         .lcd_format =            0x00008003,
@@ -71,8 +82,8 @@ static struct w100_mode e800_lcd_mode[2] = {
                 .crtc_goe        = 0x80cc0015,
                 .crtc_ps1_active = 0x00000000,
                 .pll_freq        = 100,
-                .pixclk_divider         = 6, /* Wince uses 14 which gives a 7MHz pclk. */
-                .pixclk_divider_rotated = 6, /* we want a 14MHz one (much nicer to look at) */
+                .pixclk_divider         = 6, /* Wince uses 14 which gives a */
+                .pixclk_divider_rotated = 6, /* 7MHz Pclk. We use a 14MHz one */
                 .pixclk_src     = CLK_SRC_PLL,
                 .sysclk_divider  = 0,
                 .sysclk_src     = CLK_SRC_PLL,
@@ -131,9 +142,6 @@ static struct resource e800_fb_resources[] = {
         },
 };
 
-/* ----------------------- device declarations -------------------------- */
-
-
 static struct platform_device e800_fb_device = {
         .name           = "w100fb",
         .id             = -1,
@@ -144,16 +152,35 @@ static struct platform_device e800_fb_device = {
         .resource       = e800_fb_resources,
 };
 
-static int e800_lcd_init(void)
-{
-        if (!machine_is_e800())
-                return -ENODEV;
+/* --------------------------- UDC definitions --------------------------- */
+
+static struct pxa2xx_udc_mach_info e800_udc_mach_info = {
+        .gpio_vbus   = GPIO_E800_USB_DISC,
+        .gpio_pullup = GPIO_E800_USB_PULLUP,
+        .gpio_pullup_inverted = 1
+};
 
-        return platform_device_register(&e800_fb_device);
+/* ----------------------------------------------------------------------- */
+
+static struct platform_device *devices[] __initdata = {
+        &e800_fb_device,
+};
+
+static void __init e800_init(void)
+{
+        platform_add_devices(devices, ARRAY_SIZE(devices));
+        pxa_set_udc_info(&e800_udc_mach_info);
 }
 
-module_init(e800_lcd_init);
+MACHINE_START(E800, "Toshiba e800")
+        /* Maintainer: Ian Molton (spyro@f2s.com) */
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params    = 0xa0000100,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa25x_init_irq,
+        .fixup          = eseries_fixup,
+        .init_machine   = e800_init,
+        .timer          = &pxa_timer,
+MACHINE_END
 
-MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
-MODULE_DESCRIPTION("e800 lcd driver");
-MODULE_LICENSE("GPLv2");
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index 7a0a681a5847..f5ed8038ede5 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -373,10 +373,6 @@ static inline void em_x270_init_nand(void) {}
 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 static int em_x270_ohci_init(struct device *dev)
 {
-        /* Set the Power Control Polarity Low */
-        UHCHR = (UHCHR | UHCHR_PCPL) &
-                ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE);
-
         /* enable port 2 transiever */
         UP2OCR = UP2OCR_HXS | UP2OCR_HXOE;
 
@@ -385,6 +381,7 @@ static int em_x270_ohci_init(struct device *dev)
 
 static struct pxaohci_platform_data em_x270_ohci_platform_data = {
         .port_mode      = PMM_PERPORT_MODE,
+        .flags          = ENABLE_PORT1 | ENABLE_PORT2 | POWER_CONTROL_LOW,
         .init           = em_x270_ohci_init,
 };
 
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index 001a252bd514..d28849b50a14 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -19,68 +19,13 @@
 
 #include <mach/mfp-pxa25x.h>
 #include <mach/hardware.h>
+#include <mach/eseries-gpio.h>
+#include <mach/udc.h>
 
 #include "generic.h"
 
-static unsigned long e740_pin_config[] __initdata = {
-        /* Chip selects */
-        GPIO15_nCS_1,   /* CS1 - Flash */
-        GPIO79_nCS_3,   /* CS3 - IMAGEON */
-        GPIO80_nCS_4,   /* CS4 - TMIO */
-
-        /* Clocks */
-        GPIO12_32KHz,
-
-        /* BTUART */
-        GPIO42_BTUART_RXD,
-        GPIO43_BTUART_TXD,
-        GPIO44_BTUART_CTS,
-        GPIO45_GPIO, /* Used by TMIO for #SUSPEND */
-
-        /* PC Card */
-        GPIO8_GPIO,   /* CD0 */
-        GPIO44_GPIO,  /* CD1 */
-        GPIO11_GPIO,  /* IRQ0 */
-        GPIO6_GPIO,   /* IRQ1 */
-        GPIO27_GPIO,  /* RST0 */
-        GPIO24_GPIO,  /* RST1 */
-        GPIO20_GPIO,  /* PWR0 */
-        GPIO23_GPIO,  /* PWR1 */
-        GPIO48_nPOE,
-        GPIO49_nPWE,
-        GPIO50_nPIOR,
-        GPIO51_nPIOW,
-        GPIO52_nPCE_1,
-        GPIO53_nPCE_2,
-        GPIO54_nPSKTSEL,
-        GPIO55_nPREG,
-        GPIO56_nPWAIT,
-        GPIO57_nIOIS16,
-
-        /* wakeup */
-        GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
-};
-
-static unsigned long e400_pin_config[] __initdata = {
-        /* Chip selects */
-        GPIO15_nCS_1,   /* CS1 - Flash */
-        GPIO80_nCS_4,   /* CS4 - TMIO */
-
-        /* Clocks */
-        GPIO12_32KHz,
-
-        /* BTUART */
-        GPIO42_BTUART_RXD,
-        GPIO43_BTUART_TXD,
-        GPIO44_BTUART_CTS,
-        GPIO45_GPIO, /* Used by TMIO for #SUSPEND */
-
-        /* wakeup */
-        GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,
-};
-
 /* Only e800 has 128MB RAM */
-static void __init eseries_fixup(struct machine_desc *desc,
+void __init eseries_fixup(struct machine_desc *desc,
         struct tag *tags, char **cmdline, struct meminfo *mi)
 {
         mi->nr_banks=1;
@@ -92,95 +37,9 @@ static void __init eseries_fixup(struct machine_desc *desc,
                 mi->bank[0].size = (64*1024*1024);
 }
 
-static void __init e740_init(void)
-{
-        pxa2xx_mfp_config(ARRAY_AND_SIZE(e740_pin_config));
-}
-
-static void __init e400_init(void)
-{
-        pxa2xx_mfp_config(ARRAY_AND_SIZE(e400_pin_config));
-}
-
-/* e-series machine definitions */
-
-#ifdef CONFIG_MACH_E330
-MACHINE_START(E330, "Toshiba e330")
-        /* Maintainer: Ian Molton (spyro@f2s.com) */
-        .phys_io        = 0x40000000,
-        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
-        .boot_params    = 0xa0000100,
-        .map_io         = pxa_map_io,
-        .init_irq       = pxa25x_init_irq,
-        .fixup          = eseries_fixup,
-        .timer          = &pxa_timer,
-MACHINE_END
-#endif
-
-#ifdef CONFIG_MACH_E350
-MACHINE_START(E350, "Toshiba e350")
-        /* Maintainer: Ian Molton (spyro@f2s.com) */
-        .phys_io        = 0x40000000,
-        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
-        .boot_params    = 0xa0000100,
-        .map_io         = pxa_map_io,
-        .init_irq       = pxa25x_init_irq,
-        .fixup          = eseries_fixup,
-        .timer          = &pxa_timer,
-MACHINE_END
-#endif
-
-#ifdef CONFIG_MACH_E740
-MACHINE_START(E740, "Toshiba e740")
-        /* Maintainer: Ian Molton (spyro@f2s.com) */
-        .phys_io        = 0x40000000,
-        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
-        .boot_params    = 0xa0000100,
-        .map_io         = pxa_map_io,
-        .init_irq       = pxa25x_init_irq,
-        .fixup          = eseries_fixup,
-        .init_machine   = e740_init,
-        .timer          = &pxa_timer,
-MACHINE_END
-#endif
-
-#ifdef CONFIG_MACH_E750
-MACHINE_START(E750, "Toshiba e750")
-        /* Maintainer: Ian Molton (spyro@f2s.com) */
-        .phys_io        = 0x40000000,
-        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
-        .boot_params    = 0xa0000100,
-        .map_io         = pxa_map_io,
-        .init_irq       = pxa25x_init_irq,
-        .fixup          = eseries_fixup,
-        .timer          = &pxa_timer,
-MACHINE_END
-#endif
-
-#ifdef CONFIG_MACH_E400
-MACHINE_START(E400, "Toshiba e400")
-        /* Maintainer: Ian Molton (spyro@f2s.com) */
-        .phys_io        = 0x40000000,
-        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
-        .boot_params    = 0xa0000100,
-        .map_io         = pxa_map_io,
-        .init_irq       = pxa25x_init_irq,
-        .fixup          = eseries_fixup,
-        .init_machine   = e400_init,
-        .timer          = &pxa_timer,
-MACHINE_END
-#endif
-
-#ifdef CONFIG_MACH_E800
-MACHINE_START(E800, "Toshiba e800")
-        /* Maintainer: Ian Molton (spyro@f2s.com) */
-        .phys_io        = 0x40000000,
-        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
-        .boot_params    = 0xa0000100,
-        .map_io         = pxa_map_io,
-        .init_irq       = pxa25x_init_irq,
-        .fixup          = eseries_fixup,
-        .timer          = &pxa_timer,
-MACHINE_END
-#endif
+struct pxa2xx_udc_mach_info e7xx_udc_mach_info = {
+        .gpio_vbus   = GPIO_E7XX_USB_DISC,
+        .gpio_pullup = GPIO_E7XX_USB_PULLUP,
+        .gpio_pullup_inverted = 1
+};
 
diff --git a/arch/arm/mach-pxa/eseries.h b/arch/arm/mach-pxa/eseries.h
new file mode 100644
index 000000000000..a83f88d4b6ad
--- /dev/null
+++ b/arch/arm/mach-pxa/eseries.h
@@ -0,0 +1,4 @@
+void __init eseries_fixup(struct machine_desc *desc,
+        struct tag *tags, char **cmdline, struct meminfo *mi);
+
+extern struct pxa2xx_udc_mach_info e7xx_udc_mach_info;
diff --git a/arch/arm/mach-pxa/eseries_udc.c b/arch/arm/mach-pxa/eseries_udc.c
deleted file mode 100644
index d622c04c0d44..000000000000
--- a/arch/arm/mach-pxa/eseries_udc.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * UDC functions for the Toshiba e-series PDAs
- *
- * Copyright (c) Ian Molton 2003
- *
- * This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/device.h>
-
-#include <mach/udc.h>
-#include <mach/eseries-gpio.h>
-#include <mach/hardware.h>
-#include <mach/pxa-regs.h>
-#include <asm/mach/arch.h>
-#include <asm/mach-types.h>
-#include <asm/mach/map.h>
-#include <asm/domain.h>
-
-/* local PXA generic code */
-#include "generic.h"
-
-static struct pxa2xx_udc_mach_info e7xx_udc_mach_info = {
-        .gpio_vbus   = GPIO_E7XX_USB_DISC,
-        .gpio_pullup = GPIO_E7XX_USB_PULLUP,
-        .gpio_pullup_inverted = 1
-};
-
-static struct pxa2xx_udc_mach_info e800_udc_mach_info = {
-        .gpio_vbus   = GPIO_E800_USB_DISC,
-        .gpio_pullup = GPIO_E800_USB_PULLUP,
-        .gpio_pullup_inverted = 1
-};
-
-static int __init eseries_udc_init(void)
-{
-        if (machine_is_e330() || machine_is_e350() ||
-            machine_is_e740() || machine_is_e750() ||
-            machine_is_e400())
-                pxa_set_udc_info(&e7xx_udc_mach_info);
-        else if (machine_is_e800())
-                pxa_set_udc_info(&e800_udc_mach_info);
-
-        return 0;
-}
-
-module_init(eseries_udc_init);
-
-MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
-MODULE_DESCRIPTION("eseries UDC support");
-MODULE_LICENSE("GPLv2");
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index ceaed0076366..85ed0b33331f 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -46,7 +46,7 @@ void clear_reset_status(unsigned int mask)
  */
 unsigned int get_clk_frequency_khz(int info)
 {
-        if (cpu_is_pxa21x() || cpu_is_pxa25x())
+        if (cpu_is_pxa25x())
                 return pxa25x_get_clk_frequency_khz(info);
         else if (cpu_is_pxa27x())
                 return pxa27x_get_clk_frequency_khz(info);
@@ -60,7 +60,7 @@ EXPORT_SYMBOL(get_clk_frequency_khz);
  */
 unsigned int get_memclk_frequency_10khz(void)
 {
-        if (cpu_is_pxa21x() || cpu_is_pxa25x())
+        if (cpu_is_pxa25x())
                 return pxa25x_get_memclk_frequency_10khz();
         else if (cpu_is_pxa27x())
                 return pxa27x_get_memclk_frequency_10khz();
@@ -88,11 +88,6 @@ static struct map_desc standard_io_desc[] __initdata = {
                 .pfn            = __phys_to_pfn(0x48000000),
                 .length         = 0x00200000,
                 .type           = MT_DEVICE
-        }, {    /* USB host */
-                .virtual        =  0xf8000000,
-                .pfn            = __phys_to_pfn(0x4c000000),
-                .length         = 0x00100000,
-                .type           = MT_DEVICE
         }, {    /* Camera */
                 .virtual        =  0xfa000000,
                 .pfn            = __phys_to_pfn(0x50000000),
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h
index 041c048320e4..dc876a8e6668 100644
--- a/arch/arm/mach-pxa/generic.h
+++ b/arch/arm/mach-pxa/generic.h
@@ -65,4 +65,5 @@ static inline void pxa3xx_clear_reset_status(unsigned int mask) {}
 
 extern struct sysdev_class pxa_irq_sysclass;
 extern struct sysdev_class pxa_gpio_sysclass;
+extern struct sysdev_class pxa2xx_mfp_sysclass;
 extern struct sysdev_class pxa3xx_mfp_sysclass;
diff --git a/arch/arm/mach-pxa/gpio.c b/arch/arm/mach-pxa/gpio.c
index 418d4dfd44ab..14930cf8be7b 100644
--- a/arch/arm/mach-pxa/gpio.c
+++ b/arch/arm/mach-pxa/gpio.c
@@ -275,7 +275,7 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc)
                         loop = 1;
 
                         n = PXA_GPIO_IRQ_BASE + bit;
-                        desc_handle_irq(n, irq_desc + n);
+                        generic_handle_irq(n);
 
                         bit = find_next_bit(gedr, GEDR_BITS, bit + 1);
                 }
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c
index c0092472fa58..d8962a0fb98d 100644
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -20,8 +20,12 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/interrupt.h>
+#include <linux/delay.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
+#include <linux/gpio.h>
+#include <linux/err.h>
+#include <linux/clk.h>
 
 #include <asm/setup.h>
 #include <asm/memory.h>
@@ -40,7 +44,7 @@
 
 #include <mach/pxa-regs.h>
 #include <mach/pxa2xx-regs.h>
-#include <mach/pxa2xx-gpio.h>
+#include <mach/mfp-pxa25x.h>
 
 #include "generic.h"
 
@@ -85,21 +89,8 @@ static struct platform_device *devices[] __initdata = {
 };
 
 #ifdef CONFIG_MMC_PXA
-static struct pxamci_platform_data gumstix_mci_platform_data;
-
-static int gumstix_mci_init(struct device *dev, irq_handler_t detect_int,
-                                void *data)
-{
-        pxa_gpio_mode(GPIO6_MMCCLK_MD);
-        pxa_gpio_mode(GPIO53_MMCCLK_MD);
-        pxa_gpio_mode(GPIO8_MMCCS0_MD);
-
-        return 0;
-}
-
 static struct pxamci_platform_data gumstix_mci_platform_data = {
         .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
-        .init           = gumstix_mci_init,
 };
 
 static void __init gumstix_mmc_init(void)
@@ -109,11 +100,11 @@ static void __init gumstix_mmc_init(void)
 #else
 static void __init gumstix_mmc_init(void)
 {
-        printk(KERN_INFO "Gumstix mmc disabled\n");
+        pr_debug("Gumstix mmc disabled\n");
 }
 #endif
 
-#ifdef CONFIG_USB_GADGET_PXA2XX
+#ifdef CONFIG_USB_GADGET_PXA25X
 static struct pxa2xx_udc_mach_info gumstix_udc_info __initdata = {
         .gpio_vbus              = GPIO_GUMSTIX_USB_GPIOn,
         .gpio_pullup            = GPIO_GUMSTIX_USB_GPIOx,
@@ -126,12 +117,87 @@ static void __init gumstix_udc_init(void)
 #else
 static void gumstix_udc_init(void)
 {
-        printk(KERN_INFO "Gumstix udc is disabled\n");
+        pr_debug("Gumstix udc is disabled\n");
 }
 #endif
 
+#ifdef CONFIG_BT
+/* Normally, the bootloader would have enabled this 32kHz clock but many
+** boards still have u-boot 1.1.4 so we check if it has been turned on and
+** if not, we turn it on with a warning message. */
+static void gumstix_setup_bt_clock(void)
+{
+        int timeout = 500;
+
+        if (!(OSCC & OSCC_OOK))
+                pr_warning("32kHz clock was not on. Bootloader may need to "
+                                "be updated\n");
+        else
+                return;
+
+        OSCC |= OSCC_OON;
+        do {
+                if (OSCC & OSCC_OOK)
+                        break;
+                udelay(1);
+        } while (--timeout);
+        if (!timeout)
+                pr_err("Failed to start 32kHz clock\n");
+}
+
+static void __init gumstix_bluetooth_init(void)
+{
+        int err;
+
+        gumstix_setup_bt_clock();
+
+        err = gpio_request(GPIO_GUMSTIX_BTRESET, "BTRST");
+        if (err) {
+                pr_err("gumstix: failed request gpio for bluetooth reset\n");
+                return;
+        }
+
+        err = gpio_direction_output(GPIO_GUMSTIX_BTRESET, 1);
+        if (err) {
+                pr_err("gumstix: can't reset bluetooth\n");
+                return;
+        }
+        gpio_set_value(GPIO_GUMSTIX_BTRESET, 0);
+        udelay(100);
+        gpio_set_value(GPIO_GUMSTIX_BTRESET, 1);
+}
+#else
+static void gumstix_bluetooth_init(void)
+{
+        pr_debug("Gumstix Bluetooth is disabled\n");
+}
+#endif
+
+static unsigned long gumstix_pin_config[] __initdata = {
+        GPIO12_32KHz,
+        /* BTUART */
+        GPIO42_HWUART_RXD,
+        GPIO43_HWUART_TXD,
+        GPIO44_HWUART_CTS,
+        GPIO45_HWUART_RTS,
+        /* MMC */
+        GPIO6_MMC_CLK,
+        GPIO53_MMC_CLK,
+        GPIO8_MMC_CS0,
+        /* these are used by AM200EPD */
+        GPIO51_GPIO,
+        GPIO49_GPIO,
+        GPIO48_GPIO,
+        GPIO32_GPIO,
+        GPIO17_GPIO,
+        GPIO16_GPIO,
+};
+
 static void __init gumstix_init(void)
 {
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(gumstix_pin_config));
+
+        gumstix_bluetooth_init();
         gumstix_udc_init();
         gumstix_mmc_init();
         (void) platform_add_devices(devices, ARRAY_SIZE(devices));
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index 5aa0270d5605..013b15baa034 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -32,7 +32,7 @@
 #include <asm/mach/map.h>
 
 #include <mach/pxa-regs.h>
-#include <mach/pxa2xx-gpio.h>
+#include <mach/mfp-pxa25x.h>
 #include <mach/idp.h>
 #include <mach/pxafb.h>
 #include <mach/bitfield.h>
@@ -46,6 +46,47 @@
  * - Ethernet interrupt
  */
 
+static unsigned long idp_pin_config[] __initdata = {
+        /* LCD */
+        GPIO58_LCD_LDD_0,
+        GPIO59_LCD_LDD_1,
+        GPIO60_LCD_LDD_2,
+        GPIO61_LCD_LDD_3,
+        GPIO62_LCD_LDD_4,
+        GPIO63_LCD_LDD_5,
+        GPIO64_LCD_LDD_6,
+        GPIO65_LCD_LDD_7,
+        GPIO66_LCD_LDD_8,
+        GPIO67_LCD_LDD_9,
+        GPIO68_LCD_LDD_10,
+        GPIO69_LCD_LDD_11,
+        GPIO70_LCD_LDD_12,
+        GPIO71_LCD_LDD_13,
+        GPIO72_LCD_LDD_14,
+        GPIO73_LCD_LDD_15,
+        GPIO74_LCD_FCLK,
+        GPIO75_LCD_LCLK,
+        GPIO76_LCD_PCLK,
+
+        /* BTUART */
+        GPIO42_BTUART_RXD,
+        GPIO43_BTUART_TXD,
+        GPIO44_BTUART_CTS,
+        GPIO45_BTUART_RTS,
+
+        /* STUART */
+        GPIO46_STUART_RXD,
+        GPIO47_STUART_TXD,
+
+        /* MMC */
+        GPIO6_MMC_CLK,
+        GPIO8_MMC_CS0,
+
+        /* Ethernet */
+        GPIO33_nCS_5,   /* Ethernet CS */
+        GPIO4_GPIO,     /* Ethernet IRQ */
+};
+
 static struct resource smc91x_resources[] = {
         [0] = {
                 .start  = (IDP_ETH_PHYS + 0x300),
@@ -121,44 +162,28 @@ static struct pxafb_mach_info sharp_lm8v31 = {
         .num_modes      = 1,
         .cmap_inverse   = 0,
         .cmap_static    = 0,
-        .lccr0          = LCCR0_SDS,
-        .lccr3          = LCCR3_PCP | LCCR3_Acb(255),
+        .lcd_conn       = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL |
+                          LCD_AC_BIAS_FREQ(255),
         .pxafb_backlight_power = &idp_backlight_power,
         .pxafb_lcd_power = &idp_lcd_power
 };
 
-static int idp_mci_init(struct device *dev, irq_handler_t idp_detect_int, void *data)
-{
-        /* setup GPIO for PXA25x MMC controller */
-        pxa_gpio_mode(GPIO6_MMCCLK_MD);
-        pxa_gpio_mode(GPIO8_MMCCS0_MD);
-
-        return 0;
-}
-
 static struct pxamci_platform_data idp_mci_platform_data = {
         .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
-        .init           = idp_mci_init,
 };
 
 static void __init idp_init(void)
 {
         printk("idp_init()\n");
 
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(idp_pin_config));
+
         platform_device_register(&smc91x_device);
         //platform_device_register(&mst_audio_device);
         set_pxa_fb_info(&sharp_lm8v31);
         pxa_set_mci_info(&idp_mci_platform_data);
 }
 
-static void __init idp_init_irq(void)
-{
-
-        pxa25x_init_irq();
-
-        set_irq_type(TOUCH_PANEL_IRQ, TOUCH_PANEL_IRQ_EDGE);
-}
-
 static struct map_desc idp_io_desc[] __initdata = {
         {
                 .virtual        =  IDP_COREVOLT_VIRT,
@@ -177,15 +202,6 @@ static void __init idp_map_io(void)
 {
         pxa_map_io();
         iotable_init(idp_io_desc, ARRAY_SIZE(idp_io_desc));
-
-        // serial ports 2 & 3
-        pxa_gpio_mode(GPIO42_BTRXD_MD);
-        pxa_gpio_mode(GPIO43_BTTXD_MD);
-        pxa_gpio_mode(GPIO44_BTCTS_MD);
-        pxa_gpio_mode(GPIO45_BTRTS_MD);
-        pxa_gpio_mode(GPIO46_STRXD_MD);
-        pxa_gpio_mode(GPIO47_STTXD_MD);
-
 }
 
 
@@ -194,7 +210,7 @@ MACHINE_START(PXA_IDP, "Vibren PXA255 IDP")
         .phys_io        = 0x40000000,
         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
         .map_io         = idp_map_io,
-        .init_irq       = idp_init_irq,
+        .init_irq       = pxa25x_init_irq,
         .timer          = &pxa_timer,
         .init_machine   = idp_init,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/include/mach/akita.h b/arch/arm/mach-pxa/include/mach/akita.h
deleted file mode 100644
index 5d8cc1d9cb10..000000000000
--- a/arch/arm/mach-pxa/include/mach/akita.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * Hardware specific definitions for SL-C1000 (Akita)
- *
- * Copyright (c) 2005 Richard Purdie
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-/* Akita IO Expander GPIOs */
-
-#define AKITA_IOEXP_RESERVED_7      (1 << 7)
-#define AKITA_IOEXP_IR_ON           (1 << 6)
-#define AKITA_IOEXP_AKIN_PULLUP     (1 << 5)
-#define AKITA_IOEXP_BACKLIGHT_CONT  (1 << 4)
-#define AKITA_IOEXP_BACKLIGHT_ON    (1 << 3)
-#define AKITA_IOEXP_MIC_BIAS        (1 << 2)
-#define AKITA_IOEXP_RESERVED_1      (1 << 1)
-#define AKITA_IOEXP_RESERVED_0      (1 << 0)
-
-/* Direction Bitfield  0=output  1=input */
-#define AKITA_IOEXP_IO_DIR      0
-/* Default Values */
-#define AKITA_IOEXP_IO_OUT      (AKITA_IOEXP_IR_ON | AKITA_IOEXP_AKIN_PULLUP)
-
-extern struct platform_device akitaioexp_device;
-
-void akita_set_ioexp(struct device *dev, unsigned char bitmask);
-void akita_reset_ioexp(struct device *dev, unsigned char bitmask);
-
diff --git a/arch/arm/mach-pxa/include/mach/corgi.h b/arch/arm/mach-pxa/include/mach/corgi.h
index bf856503baf6..585970ef08ce 100644
--- a/arch/arm/mach-pxa/include/mach/corgi.h
+++ b/arch/arm/mach-pxa/include/mach/corgi.h
@@ -98,12 +98,21 @@
                         CORGI_SCP_MIC_BIAS )
 #define CORGI_SCOOP_IO_OUT      ( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R )
 
+#define CORGI_SCOOP_GPIO_BASE           (NR_BUILTIN_GPIO)
+#define CORGI_GPIO_LED_GREEN            (CORGI_SCOOP_GPIO_BASE + 0)
+#define CORGI_GPIO_SWA                  (CORGI_SCOOP_GPIO_BASE + 1)  /* Hinge Switch A */
+#define CORGI_GPIO_SWB                  (CORGI_SCOOP_GPIO_BASE + 2)  /* Hinge Switch B */
+#define CORGI_GPIO_MUTE_L               (CORGI_SCOOP_GPIO_BASE + 3)
+#define CORGI_GPIO_MUTE_R               (CORGI_SCOOP_GPIO_BASE + 4)
+#define CORGI_GPIO_AKIN_PULLUP          (CORGI_SCOOP_GPIO_BASE + 5)
+#define CORGI_GPIO_APM_ON               (CORGI_SCOOP_GPIO_BASE + 6)
+#define CORGI_GPIO_BACKLIGHT_CONT       (CORGI_SCOOP_GPIO_BASE + 7)
+#define CORGI_GPIO_MIC_BIAS             (CORGI_SCOOP_GPIO_BASE + 8)
 
 /*
  * Shared data structures
  */
 extern struct platform_device corgiscoop_device;
-extern struct platform_device corgissp_device;
 
 #endif /* __ASM_ARCH_CORGI_H  */
 
diff --git a/arch/arm/mach-pxa/include/mach/entry-macro.S b/arch/arm/mach-pxa/include/mach/entry-macro.S
index de16c12d5232..f6b4bf3e73d2 100644
--- a/arch/arm/mach-pxa/include/mach/entry-macro.S
+++ b/arch/arm/mach-pxa/include/mach/entry-macro.S
@@ -41,7 +41,7 @@
                 and     \irqstat, \irqstat, \irqnr
                 clz     \irqnr, \irqstat
                 rsb     \irqnr, \irqnr, #31
-                add     \irqnr, \irqnr, #32
+                add     \irqnr, \irqnr, #(32 + PXA_IRQ(0))
                 b       1001f
 1003:
                 mrc     p6, 0, \irqstat, c0, c0, 0      @ ICIP
@@ -52,6 +52,6 @@
                 rsb     \irqstat, \irqnr, #0
                 and     \irqstat, \irqstat, \irqnr
                 clz     \irqnr, \irqstat
-                rsb     \irqnr, \irqnr, #31
+                rsb     \irqnr, \irqnr, #(31 + PXA_IRQ(0))
 1001:
                 .endm
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index a1a0a2ffd642..a582a6d9b92b 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -64,26 +64,72 @@
 
 #include <asm/cputype.h>
 
+/*
+ *   CPU     Stepping     CPU_ID         JTAG_ID
+ *
+ *  PXA210      B0      0x69052922      0x2926C013
+ *  PXA210      B1      0x69052923      0x3926C013
+ *  PXA210      B2      0x69052924      0x4926C013
+ *  PXA210      C0      0x69052D25      0x5926C013
+ *
+ *  PXA250      A0      0x69052100      0x09264013
+ *  PXA250      A1      0x69052101      0x19264013
+ *  PXA250      B0      0x69052902      0x29264013
+ *  PXA250      B1      0x69052903      0x39264013
+ *  PXA250      B2      0x69052904      0x49264013
+ *  PXA250      C0      0x69052D05      0x59264013
+ *
+ *  PXA255      A0      0x69052D06      0x69264013
+ *
+ *  PXA26x      A0      0x69052903      0x39264013
+ *  PXA26x      B0      0x69052D05      0x59264013
+ *
+ *  PXA27x      A0      0x69054110      0x09265013
+ *  PXA27x      A1      0x69054111      0x19265013
+ *  PXA27x      B0      0x69054112      0x29265013
+ *  PXA27x      B1      0x69054113      0x39265013
+ *  PXA27x      C0      0x69054114      0x49265013
+ *  PXA27x      C5      0x69054117      0x79265013
+ *
+ *  PXA30x      A0      0x69056880      0x0E648013
+ *  PXA30x      A1      0x69056881      0x1E648013
+ *  PXA31x      A0      0x69056890      0x0E649013
+ *  PXA31x      A1      0x69056891      0x1E649013
+ *  PXA31x      A2      0x69056892      0x2E649013
+ *  PXA32x      B1      0x69056825      0x5E642013
+ *  PXA32x      B2      0x69056826      0x6E642013
+ *
+ *  PXA930      B0      0x69056835      0x5E643013
+ *  PXA930      B1      0x69056837      0x7E643013
+ *  PXA930      B2      0x69056838      0x8E643013
+ */
 #ifdef CONFIG_PXA25x
-#define __cpu_is_pxa21x(id)                             \
+#define __cpu_is_pxa210(id)                             \
         ({                                              \
-                unsigned int _id = (id) >> 4 & 0xf3f;   \
-                _id == 0x212;                           \
+                unsigned int _id = (id) & 0xf3f0;       \
+                _id == 0x2120;                          \
         })
 
-#define __cpu_is_pxa255(id)                             \
-        ({                                              \
-                unsigned int _id = (id) >> 4 & 0xfff;   \
-                _id == 0x2d0;                           \
-         })
+#define __cpu_is_pxa250(id)                             \
+        ({                                              \
+                unsigned int _id = (id) & 0xf3ff;       \
+                _id <= 0x2105;                          \
+        })
+
+#define __cpu_is_pxa255(id)                             \
+        ({                                              \
+                unsigned int _id = (id) & 0xffff;       \
+                _id == 0x2d06;                          \
+        })
 
 #define __cpu_is_pxa25x(id)                             \
         ({                                              \
-                unsigned int _id = (id) >> 4 & 0xfff;   \
-                _id == 0x2d0 || _id == 0x290;           \
+                unsigned int _id = (id) & 0xf300;       \
+                _id == 0x2100;                          \
         })
 #else
-#define __cpu_is_pxa21x(id)     (0)
+#define __cpu_is_pxa210(id)     (0)
+#define __cpu_is_pxa250(id)     (0)
 #define __cpu_is_pxa255(id)     (0)
 #define __cpu_is_pxa25x(id)     (0)
 #endif
@@ -138,9 +184,14 @@
 #define __cpu_is_pxa930(id)     (0)
 #endif
 
-#define cpu_is_pxa21x()                                 \
+#define cpu_is_pxa210()                                 \
         ({                                              \
-                __cpu_is_pxa21x(read_cpuid_id());       \
+                __cpu_is_pxa210(read_cpuid_id());       \
+        })
+
+#define cpu_is_pxa250()                                 \
+        ({                                              \
+                __cpu_is_pxa250(read_cpuid_id());       \
         })
 
 #define cpu_is_pxa255()                                 \
@@ -153,6 +204,8 @@
                 __cpu_is_pxa25x(read_cpuid_id());       \
         })
 
+extern int cpu_is_pxa26x(void);
+
 #define cpu_is_pxa27x()                                 \
         ({                                              \
                 __cpu_is_pxa27x(read_cpuid_id());       \
diff --git a/arch/arm/mach-pxa/include/mach/i2c.h b/arch/arm/mach-pxa/include/mach/i2c.h
index 80596b013443..1a9f65e6ec0f 100644
--- a/arch/arm/mach-pxa/include/mach/i2c.h
+++ b/arch/arm/mach-pxa/include/mach/i2c.h
@@ -65,13 +65,18 @@ struct i2c_pxa_platform_data {
         unsigned int            slave_addr;
         struct i2c_slave_client *slave;
         unsigned int            class;
-        int                     use_pio;
+        unsigned int            use_pio :1;
+        unsigned int            fast_mode :1;
 };
 
 extern void pxa_set_i2c_info(struct i2c_pxa_platform_data *info);
 
 #ifdef CONFIG_PXA27x
-extern void pxa_set_i2c_power_info(struct i2c_pxa_platform_data *info);
+extern void pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info);
+#endif
+
+#ifdef CONFIG_PXA3xx
+extern void pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info);
 #endif
 
 #endif
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index 108b5db9b2af..9c163e19ada9 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -11,7 +11,14 @@
  */
 
 
-#define PXA_IRQ(x)      (x)
+#ifdef CONFIG_PXA_HAVE_ISA_IRQS
+#define PXA_ISA_IRQ(x)  (x)
+#define PXA_ISA_IRQ_NUM (16)
+#else
+#define PXA_ISA_IRQ_NUM (0)
+#endif
+
+#define PXA_IRQ(x)      (PXA_ISA_IRQ_NUM + (x))
 
 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
 #define IRQ_SSP3        PXA_IRQ(0)      /* SSP3 service request */
@@ -73,7 +80,7 @@
 #define IRQ_MMC3        PXA_IRQ(55)     /* MMC3 Controller (PXA310) */
 #endif
 
-#define PXA_GPIO_IRQ_BASE       (64)
+#define PXA_GPIO_IRQ_BASE       PXA_IRQ(64)
 #define PXA_GPIO_IRQ_NUM        (128)
 
 #define GPIO_2_x_TO_IRQ(x)      (PXA_GPIO_IRQ_BASE + (x))
@@ -178,13 +185,7 @@
 #define NR_IRQS                 (IRQ_S1_BVD1_STSCHG + 1)
 #elif defined(CONFIG_SHARP_LOCOMO)
 #define NR_IRQS                 (IRQ_LOCOMO_SPI_TEND + 1)
-#elif defined(CONFIG_ARCH_LUBBOCK) || \
-      defined(CONFIG_MACH_LOGICPD_PXA270) || \
-      defined(CONFIG_MACH_TOSA) || \
-      defined(CONFIG_MACH_MAINSTONE) || \
-      defined(CONFIG_MACH_PCM027) || \
-      defined(CONFIG_ARCH_PXA_ESERIES) || \
-      defined(CONFIG_MACH_MAGICIAN)
+#elif defined(CONFIG_PXA_HAVE_BOARD_IRQS)
 #define NR_IRQS                 (IRQ_BOARD_END)
 #elif defined(CONFIG_MACH_ZYLONITE)
 #define NR_IRQS                 (IRQ_BOARD_START + 32)
diff --git a/arch/arm/mach-pxa/include/mach/littleton.h b/arch/arm/mach-pxa/include/mach/littleton.h
index 79d209b826f4..5c4e320c1437 100644
--- a/arch/arm/mach-pxa/include/mach/littleton.h
+++ b/arch/arm/mach-pxa/include/mach/littleton.h
@@ -3,4 +3,6 @@
 
 #define LITTLETON_ETH_PHYS      0x30000000
 
+#define LITTLETON_GPIO_LCD_CS   (17)
+
 #endif /* __ASM_ARCH_ZYLONITE_H */
diff --git a/arch/arm/mach-pxa/include/mach/memory.h b/arch/arm/mach-pxa/include/mach/memory.h
index 552eb7fa6579..59aef89808d6 100644
--- a/arch/arm/mach-pxa/include/mach/memory.h
+++ b/arch/arm/mach-pxa/include/mach/memory.h
@@ -40,11 +40,11 @@
 #define NODE_MEM_SIZE_BITS      26
 
 #if !defined(__ASSEMBLY__) && defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
-void cmx270_pci_adjust_zones(int node, unsigned long *size,
+void cmx2xx_pci_adjust_zones(int node, unsigned long *size,
                              unsigned long *holes);
 
 #define arch_adjust_zones(node, size, holes) \
-        cmx270_pci_adjust_zones(node, size, holes)
+        cmx2xx_pci_adjust_zones(node, size, holes)
 
 #define ISA_DMA_THRESHOLD       (PHYS_OFFSET + SZ_64M - 1)
 #endif
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
index 6c8e72238bfd..617cab2cc8d0 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
@@ -17,7 +17,7 @@
 
 /* Crystal and Clock Signals */
 #define GPIO10_RTCCLK           MFP_CFG_OUT(GPIO10, AF1, DRIVE_LOW)
-#define GPIO70_RTC_CLK          MFP_CFG_OUT(GPIO70, AF1, DRIVE_LOW)
+#define GPIO70_RTCCLK           MFP_CFG_OUT(GPIO70, AF1, DRIVE_LOW)
 #define GPIO7_48MHz             MFP_CFG_OUT(GPIO7,  AF1, DRIVE_LOW)
 #define GPIO11_3_6MHz           MFP_CFG_OUT(GPIO11, AF1, DRIVE_LOW)
 #define GPIO71_3_6MHz           MFP_CFG_OUT(GPIO71, AF1, DRIVE_LOW)
@@ -156,6 +156,6 @@
 #define GPIO74_LCD_FCLK         MFP_CFG_OUT(GPIO74, AF2, DRIVE_LOW)
 #define GPIO75_LCD_LCLK         MFP_CFG_OUT(GPIO75, AF2, DRIVE_LOW)
 #define GPIO76_LCD_PCLK         MFP_CFG_OUT(GPIO76, AF2, DRIVE_LOW)
-#define GPIO77_LCD_ACBIAS       MFP_CFG_OUT(GPIO77, AF2, DRIVE_LOW)
+#define GPIO77_LCD_BIAS         MFP_CFG_OUT(GPIO77, AF2, DRIVE_LOW)
 
 #endif /* __ASM_ARCH_MFP_PXA25X_H */
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa320.h b/arch/arm/mach-pxa/include/mach/mfp-pxa320.h
index 74990510cf34..67f8385ea548 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa320.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa320.h
@@ -257,10 +257,10 @@
 #define GPIO38_SSP2_RXD         MFP_CFG(GPIO38, AF2)
 #define GPIO38_SSP2_TXD         MFP_CFG(GPIO38, AF5)
 
-#define GPIO69_SSP3_SCLK        MFP_CFG(GPIO69, AF2, DS08X, FLOAT)
-#define GPIO70_SSP3_FRM         MFP_CFG(GPIO70, AF2, DS08X, DRIVE_LOW)
-#define GPIO89_SSP3_SCLK        MFP_CFG(GPIO89, AF1, DS08X, FLOAT)
-#define GPIO90_SSP3_FRM         MFP_CFG(GPIO90, AF1, DS08X, DRIVE_LOW)
+#define GPIO69_SSP3_SCLK        MFP_CFG_X(GPIO69, AF2, DS08X, FLOAT)
+#define GPIO70_SSP3_FRM         MFP_CFG_X(GPIO70, AF2, DS08X, DRIVE_LOW)
+#define GPIO89_SSP3_SCLK        MFP_CFG_X(GPIO89, AF1, DS08X, FLOAT)
+#define GPIO90_SSP3_FRM         MFP_CFG_X(GPIO90, AF1, DS08X, DRIVE_LOW)
 #define GPIO71_SSP3_RXD         MFP_CFG_X(GPIO71, AF5, DS08X, FLOAT)
 #define GPIO71_SSP3_TXD         MFP_CFG_X(GPIO71, AF2, DS08X, DRIVE_LOW)
 #define GPIO72_SSP3_RXD         MFP_CFG_X(GPIO72, AF2, DS08X, FLOAT)
diff --git a/arch/arm/mach-pxa/include/mach/mfp.h b/arch/arm/mach-pxa/include/mach/mfp.h
index 8769567b389b..482185053a92 100644
--- a/arch/arm/mach-pxa/include/mach/mfp.h
+++ b/arch/arm/mach-pxa/include/mach/mfp.h
@@ -274,12 +274,13 @@ typedef unsigned long mfp_cfg_t;
 #define MFP_DS_MASK             (0x7 << 13)
 #define MFP_DS(x)               (((x) >> 13) & 0x7)
 
-#define MFP_LPM_INPUT           (0x0 << 16)
+#define MFP_LPM_DEFAULT         (0x0 << 16)
 #define MFP_LPM_DRIVE_LOW       (0x1 << 16)
 #define MFP_LPM_DRIVE_HIGH      (0x2 << 16)
 #define MFP_LPM_PULL_LOW        (0x3 << 16)
 #define MFP_LPM_PULL_HIGH       (0x4 << 16)
 #define MFP_LPM_FLOAT           (0x5 << 16)
+#define MFP_LPM_INPUT           (0x6 << 16)
 #define MFP_LPM_STATE_MASK      (0x7 << 16)
 #define MFP_LPM_STATE(x)        (((x) >> 16) & 0x7)
 
@@ -297,7 +298,7 @@ typedef unsigned long mfp_cfg_t;
 #define MFP_PULL_MASK           (0x3 << 21)
 #define MFP_PULL(x)             (((x) >> 21) & 0x3)
 
-#define MFP_CFG_DEFAULT         (MFP_AF0 | MFP_DS03X | MFP_LPM_INPUT |\
+#define MFP_CFG_DEFAULT         (MFP_AF0 | MFP_DS03X | MFP_LPM_DEFAULT |\
                                  MFP_LPM_EDGE_NONE | MFP_PULL_NONE)
 
 #define MFP_CFG(pin, af)                \
diff --git a/arch/arm/mach-pxa/include/mach/mioa701.h b/arch/arm/mach-pxa/include/mach/mioa701.h
new file mode 100644
index 000000000000..8483cb511831
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/mioa701.h
@@ -0,0 +1,67 @@
+#ifndef _MIOA701_H_
+#define _MIOA701_H_
+
+#define MIO_CFG_IN(pin, af)             \
+        ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DIR_MASK)) |\
+         (MFP_PIN(pin) | MFP_##af | MFP_DIR_IN))
+
+#define MIO_CFG_OUT(pin, af, state)     \
+        ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DIR_MASK | MFP_LPM_STATE_MASK)) |\
+         (MFP_PIN(pin) | MFP_##af | MFP_DIR_OUT | MFP_LPM_##state))
+
+/* Global GPIOs */
+#define GPIO9_CHARGE_nEN                        9
+#define GPIO18_POWEROFF                         18
+#define GPIO87_LCD_POWER                        87
+
+/* USB */
+#define GPIO13_USB_DETECT                       13
+#define GPIO22_USB_ENABLE                       22
+
+/* SDIO bits */
+#define GPIO78_SDIO_RO                          78
+#define GPIO15_SDIO_INSERT                      15
+#define GPIO91_SDIO_EN                          91
+
+/* Bluetooth */
+#define GPIO83_BT_ON                            83
+
+/* GPS */
+#define GPIO23_GPS_UNKNOWN1                     23
+#define GPIO26_GPS_ON                           26
+#define GPIO27_GPS_RESET                        27
+#define GPIO106_GPS_UNKNOWN2                    106
+#define GPIO107_GPS_UNKNOWN3                    107
+
+/* GSM */
+#define GPIO24_GSM_MOD_RESET_CMD                24
+#define GPIO88_GSM_nMOD_ON_CMD                  88
+#define GPIO90_GSM_nMOD_OFF_CMD                 90
+#define GPIO114_GSM_nMOD_DTE_UART_STATE         114
+#define GPIO25_GSM_MOD_ON_STATE                 25
+#define GPIO113_GSM_EVENT                       113
+
+/* SOUND */
+#define GPIO12_HPJACK_INSERT                    12
+
+/* LEDS */
+#define GPIO10_LED_nCharging                    10
+#define GPIO97_LED_nBlue                        97
+#define GPIO98_LED_nOrange                      98
+#define GPIO82_LED_nVibra                       82
+#define GPIO115_LED_nKeyboard                   115
+
+/* Keyboard */
+#define GPIO0_KEY_POWER                         0
+#define GPIO93_KEY_VOLUME_UP                    93
+#define GPIO94_KEY_VOLUME_DOWN                  94
+
+extern struct input_dev *mioa701_evdev;
+extern void mioa701_gpio_lpm_set(unsigned long mfp_pin);
+
+/* Assembler externals mioa701_bootresume.S */
+extern u32 mioa701_bootstrap;
+extern u32 mioa701_jumpaddr;
+extern u32 mioa701_bootstrap_lg;
+
+#endif /* _MIOA701_H */
diff --git a/arch/arm/mach-pxa/include/mach/ohci.h b/arch/arm/mach-pxa/include/mach/ohci.h
index e848a47128cd..95b6e2a6e514 100644
--- a/arch/arm/mach-pxa/include/mach/ohci.h
+++ b/arch/arm/mach-pxa/include/mach/ohci.h
@@ -7,6 +7,22 @@ struct pxaohci_platform_data {
         int (*init)(struct device *);
         void (*exit)(struct device *);
 
+        unsigned long flags;
+#define ENABLE_PORT1            (1 << 0)
+#define ENABLE_PORT2            (1 << 1)
+#define ENABLE_PORT3            (1 << 2)
+#define ENABLE_PORT_ALL         (ENABLE_PORT1 | ENABLE_PORT2 | ENABLE_PORT3)
+
+#define POWER_SENSE_LOW         (1 << 3)
+#define POWER_CONTROL_LOW       (1 << 4)
+#define NO_OC_PROTECTION        (1 << 5)
+#define OC_MODE_GLOBAL          (0 << 6)
+#define OC_MODE_PERPORT         (1 << 6)
+
+        int power_on_delay;     /* Power On to Power Good time - in ms
+                                 * HCD must wait for this duration before
+                                 * accessing a powered on port
+                                 */
         int port_mode;
 #define PMM_NPS_MODE           1
 #define PMM_GLOBAL_MODE        2
diff --git a/arch/arm/mach-pxa/include/mach/palmz72.h b/arch/arm/mach-pxa/include/mach/palmz72.h
new file mode 100644
index 000000000000..5032307ebf7d
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/palmz72.h
@@ -0,0 +1,80 @@
+/*
+ * GPIOs and interrupts for Palm Zire72 Handheld Computer
+ *
+ * Authors:     Alex Osborne <bobofdoom@gmail.com>
+ *              Jan Herman <2hp@seznam.cz>
+ *              Sergey Lapin <slapin@ossfans.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef _INCLUDE_PALMZ72_H_
+#define _INCLUDE_PALMZ72_H_
+
+/* Power and control */
+#define GPIO_NR_PALMZ72_GPIO_RESET              1
+#define GPIO_NR_PALMZ72_POWER_DETECT            0
+
+/* SD/MMC */
+#define GPIO_NR_PALMZ72_SD_DETECT_N             14
+#define GPIO_NR_PALMZ72_SD_POWER_N              98
+#define GPIO_NR_PALMZ72_SD_RO 115
+
+/* Touchscreen */
+#define GPIO_NR_PALMZ72_WM9712_IRQ              27
+
+/* IRDA -  disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */
+#define GPIO_NR_PALMZ72_IR_DISABLE              49
+
+/* USB */
+#define GPIO_NR_PALMZ72_USB_DETECT_N            15
+#define GPIO_NR_PALMZ72_USB_POWER               95
+#define GPIO_NR_PALMZ72_USB_PULLUP              12
+
+/* LCD/Backlight */
+#define GPIO_NR_PALMZ72_BL_POWER                20
+#define GPIO_NR_PALMZ72_LCD_POWER               96
+
+/* LED */
+#define GPIO_NR_PALMZ72_LED_GREEN               88
+
+/* Bluetooth */
+#define GPIO_NR_PALMZ72_BT_POWER                17
+#define GPIO_NR_PALMZ72_BT_RESET                83
+
+/** Initial values **/
+
+/* Battery */
+#define PALMZ72_BAT_MAX_VOLTAGE         4000    /* 4.00v current voltage */
+#define PALMZ72_BAT_MIN_VOLTAGE         3550    /* 3.55v critical voltage */
+#define PALMZ72_BAT_MAX_CURRENT         0       /* unknokn */
+#define PALMZ72_BAT_MIN_CURRENT         0       /* unknown */
+#define PALMZ72_BAT_MAX_CHARGE          1       /* unknown */
+#define PALMZ72_BAT_MIN_CHARGE          1       /* unknown */
+#define PALMZ72_MAX_LIFE_MINS           360     /* on-life in minutes */
+
+/* Backlight */
+#define PALMZ72_MAX_INTENSITY           0xFE
+#define PALMZ72_DEFAULT_INTENSITY       0x7E
+#define PALMZ72_LIMIT_MASK              0x7F
+#define PALMZ72_PRESCALER               0x3F
+#define PALMZ72_PERIOD_NS               3500
+
+#ifdef CONFIG_PM
+struct palmz72_resume_info {
+        u32 magic0;             /* 0x0 */
+        u32 magic1;             /* 0x4 */
+        u32 resume_addr;        /* 0x8 */
+        u32 pad[11];            /* 0xc..0x37 */
+        u32 arm_control;        /* 0x38 */
+        u32 aux_control;        /* 0x3c */
+        u32 ttb;                /* 0x40 */
+        u32 domain_access;      /* 0x44 */
+        u32 process_id;         /* 0x48 */
+};
+#endif
+#endif
+
diff --git a/arch/arm/mach-pxa/include/mach/pm.h b/arch/arm/mach-pxa/include/mach/pm.h
index 261e5bc958db..83342469acac 100644
--- a/arch/arm/mach-pxa/include/mach/pm.h
+++ b/arch/arm/mach-pxa/include/mach/pm.h
@@ -15,6 +15,8 @@ struct pxa_cpu_pm_fns {
         void    (*restore)(unsigned long *);
         int     (*valid)(suspend_state_t state);
         void    (*enter)(suspend_state_t state);
+        int     (*prepare)(void);
+        void    (*finish)(void);
 };
 
 extern struct pxa_cpu_pm_fns *pxa_cpu_pm_fns;
diff --git a/arch/arm/mach-pxa/include/mach/poodle.h b/arch/arm/mach-pxa/include/mach/poodle.h
index 67debc47e8c6..0b3e6d051c64 100644
--- a/arch/arm/mach-pxa/include/mach/poodle.h
+++ b/arch/arm/mach-pxa/include/mach/poodle.h
@@ -23,6 +23,7 @@
 #define POODLE_GPIO_AC_IN               (1)
 #define POODLE_GPIO_CO                  16
 #define POODLE_GPIO_TP_INT              (5)
+#define POODLE_GPIO_TP_CS               (24)
 #define POODLE_GPIO_WAKEUP              (11)    /* change battery */
 #define POODLE_GPIO_GA_INT              (10)
 #define POODLE_GPIO_IR_ON               (22)
@@ -70,6 +71,14 @@
 #define POODLE_SCOOP_IO_DIR     ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT )
 #define POODLE_SCOOP_IO_OUT     ( 0 )
 
+#define POODLE_SCOOP_GPIO_BASE  (NR_BUILTIN_GPIO)
+#define POODLE_GPIO_CHARGE_ON   (POODLE_SCOOP_GPIO_BASE + 0)
+#define POODLE_GPIO_CP401       (POODLE_SCOOP_GPIO_BASE + 2)
+#define POODLE_GPIO_VPEN        (POODLE_SCOOP_GPIO_BASE + 7)
+#define POODLE_GPIO_L_PCLK      (POODLE_SCOOP_GPIO_BASE + 9)
+#define POODLE_GPIO_L_LCLK      (POODLE_SCOOP_GPIO_BASE + 10)
+#define POODLE_GPIO_HS_OUT      (POODLE_SCOOP_GPIO_BASE + 11)
+
 #define POODLE_LOCOMO_GPIO_AMP_ON      LOCOMO_GPIO(8)
 #define POODLE_LOCOMO_GPIO_MUTE_L      LOCOMO_GPIO(10)
 #define POODLE_LOCOMO_GPIO_MUTE_R      LOCOMO_GPIO(11)
diff --git a/arch/arm/mach-pxa/include/mach/pxa-regs.h b/arch/arm/mach-pxa/include/mach/pxa-regs.h
index 12288ca3cbb2..15295d960000 100644
--- a/arch/arm/mach-pxa/include/mach/pxa-regs.h
+++ b/arch/arm/mach-pxa/include/mach/pxa-regs.h
@@ -69,30 +69,18 @@
 /*
  * DMA Controller
  */
-
-#define DCSR0           __REG(0x40000000)  /* DMA Control / Status Register for Channel 0 */
-#define DCSR1           __REG(0x40000004)  /* DMA Control / Status Register for Channel 1 */
-#define DCSR2           __REG(0x40000008)  /* DMA Control / Status Register for Channel 2 */
-#define DCSR3           __REG(0x4000000c)  /* DMA Control / Status Register for Channel 3 */
-#define DCSR4           __REG(0x40000010)  /* DMA Control / Status Register for Channel 4 */
-#define DCSR5           __REG(0x40000014)  /* DMA Control / Status Register for Channel 5 */
-#define DCSR6           __REG(0x40000018)  /* DMA Control / Status Register for Channel 6 */
-#define DCSR7           __REG(0x4000001c)  /* DMA Control / Status Register for Channel 7 */
-#define DCSR8           __REG(0x40000020)  /* DMA Control / Status Register for Channel 8 */
-#define DCSR9           __REG(0x40000024)  /* DMA Control / Status Register for Channel 9 */
-#define DCSR10          __REG(0x40000028)  /* DMA Control / Status Register for Channel 10 */
-#define DCSR11          __REG(0x4000002c)  /* DMA Control / Status Register for Channel 11 */
-#define DCSR12          __REG(0x40000030)  /* DMA Control / Status Register for Channel 12 */
-#define DCSR13          __REG(0x40000034)  /* DMA Control / Status Register for Channel 13 */
-#define DCSR14          __REG(0x40000038)  /* DMA Control / Status Register for Channel 14 */
-#define DCSR15          __REG(0x4000003c)  /* DMA Control / Status Register for Channel 15 */
-
 #define DCSR(x)         __REG2(0x40000000, (x) << 2)
 
 #define DCSR_RUN        (1 << 31)       /* Run Bit (read / write) */
 #define DCSR_NODESC     (1 << 30)       /* No-Descriptor Fetch (read / write) */
 #define DCSR_STOPIRQEN  (1 << 29)       /* Stop Interrupt Enable (read / write) */
-#ifdef CONFIG_PXA27x
+#define DCSR_REQPEND    (1 << 8)        /* Request Pending (read-only) */
+#define DCSR_STOPSTATE  (1 << 3)        /* Stop State (read-only) */
+#define DCSR_ENDINTR    (1 << 2)        /* End Interrupt (read / write) */
+#define DCSR_STARTINTR  (1 << 1)        /* Start Interrupt (read / write) */
+#define DCSR_BUSERR     (1 << 0)        /* Bus Error Interrupt (read / write) */
+
+#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
 #define DCSR_EORIRQEN   (1 << 28)       /* End of Receive Interrupt Enable (R/W) */
 #define DCSR_EORJMPEN   (1 << 27)       /* Jump to next descriptor on EOR */
 #define DCSR_EORSTOPEN  (1 << 26)       /* STOP on an EOR */
@@ -101,11 +89,6 @@
 #define DCSR_CMPST      (1 << 10)       /* The Descriptor Compare Status */
 #define DCSR_EORINTR    (1 << 9)        /* The end of Receive */
 #endif
-#define DCSR_REQPEND    (1 << 8)        /* Request Pending (read-only) */
-#define DCSR_STOPSTATE  (1 << 3)        /* Stop State (read-only) */
-#define DCSR_ENDINTR    (1 << 2)        /* End Interrupt (read / write) */
-#define DCSR_STARTINTR  (1 << 1)        /* Start Interrupt (read / write) */
-#define DCSR_BUSERR     (1 << 0)        /* Bus Error Interrupt (read / write) */
 
 #define DALGN           __REG(0x400000a0)  /* DMA Alignment Register */
 #define DINT            __REG(0x400000f0)  /* DMA Interrupt Register */
@@ -114,145 +97,9 @@
                         &__REG2(0x40000100, ((n) & 0x3f) << 2) : \
                         &__REG2(0x40001100, ((n) & 0x3f) << 2)))
 
-#define DRCMR0          __REG(0x40000100)  /* Request to Channel Map Register for DREQ 0 */
-#define DRCMR1          __REG(0x40000104)  /* Request to Channel Map Register for DREQ 1 */
-#define DRCMR2          __REG(0x40000108)  /* Request to Channel Map Register for I2S receive Request */
-#define DRCMR3          __REG(0x4000010c)  /* Request to Channel Map Register for I2S transmit Request */
-#define DRCMR4          __REG(0x40000110)  /* Request to Channel Map Register for BTUART receive Request */
-#define DRCMR5          __REG(0x40000114)  /* Request to Channel Map Register for BTUART transmit Request. */
-#define DRCMR6          __REG(0x40000118)  /* Request to Channel Map Register for FFUART receive Request */
-#define DRCMR7          __REG(0x4000011c)  /* Request to Channel Map Register for FFUART transmit Request */
-#define DRCMR8          __REG(0x40000120)  /* Request to Channel Map Register for AC97 microphone Request */
-#define DRCMR9          __REG(0x40000124)  /* Request to Channel Map Register for AC97 modem receive Request */
-#define DRCMR10         __REG(0x40000128)  /* Request to Channel Map Register for AC97 modem transmit Request */
-#define DRCMR11         __REG(0x4000012c)  /* Request to Channel Map Register for AC97 audio receive Request */
-#define DRCMR12         __REG(0x40000130)  /* Request to Channel Map Register for AC97 audio transmit Request */
-#define DRCMR13         __REG(0x40000134)  /* Request to Channel Map Register for SSP receive Request */
-#define DRCMR14         __REG(0x40000138)  /* Request to Channel Map Register for SSP transmit Request */
-#define DRCMR15         __REG(0x4000013c)  /* Request to Channel Map Register for SSP2 receive Request */
-#define DRCMR16         __REG(0x40000140)  /* Request to Channel Map Register for SSP2 transmit Request */
-#define DRCMR17         __REG(0x40000144)  /* Request to Channel Map Register for ICP receive Request */
-#define DRCMR18         __REG(0x40000148)  /* Request to Channel Map Register for ICP transmit Request */
-#define DRCMR19         __REG(0x4000014c)  /* Request to Channel Map Register for STUART receive Request */
-#define DRCMR20         __REG(0x40000150)  /* Request to Channel Map Register for STUART transmit Request */
-#define DRCMR21         __REG(0x40000154)  /* Request to Channel Map Register for MMC receive Request */
-#define DRCMR22         __REG(0x40000158)  /* Request to Channel Map Register for MMC transmit Request */
-#define DRCMR23         __REG(0x4000015c)  /* Reserved */
-#define DRCMR24         __REG(0x40000160)  /* Reserved */
-#define DRCMR25         __REG(0x40000164)  /* Request to Channel Map Register for USB endpoint 1 Request */
-#define DRCMR26         __REG(0x40000168)  /* Request to Channel Map Register for USB endpoint 2 Request */
-#define DRCMR27         __REG(0x4000016C)  /* Request to Channel Map Register for USB endpoint 3 Request */
-#define DRCMR28         __REG(0x40000170)  /* Request to Channel Map Register for USB endpoint 4 Request */
-#define DRCMR29         __REG(0x40000174)  /* Reserved */
-#define DRCMR30         __REG(0x40000178)  /* Request to Channel Map Register for USB endpoint 6 Request */
-#define DRCMR31         __REG(0x4000017C)  /* Request to Channel Map Register for USB endpoint 7 Request */
-#define DRCMR32         __REG(0x40000180)  /* Request to Channel Map Register for USB endpoint 8 Request */
-#define DRCMR33         __REG(0x40000184)  /* Request to Channel Map Register for USB endpoint 9 Request */
-#define DRCMR34         __REG(0x40000188)  /* Reserved */
-#define DRCMR35         __REG(0x4000018C)  /* Request to Channel Map Register for USB endpoint 11 Request */
-#define DRCMR36         __REG(0x40000190)  /* Request to Channel Map Register for USB endpoint 12 Request */
-#define DRCMR37         __REG(0x40000194)  /* Request to Channel Map Register for USB endpoint 13 Request */
-#define DRCMR38         __REG(0x40000198)  /* Request to Channel Map Register for USB endpoint 14 Request */
-#define DRCMR39         __REG(0x4000019C)  /* Reserved */
-#define DRCMR66         __REG(0x40001108)  /* Request to Channel Map Register for SSP3 receive Request */
-#define DRCMR67         __REG(0x4000110C)  /* Request to Channel Map Register for SSP3 transmit Request */
-#define DRCMR68         __REG(0x40001110)  /* Request to Channel Map Register for Camera FIFO 0 Request */
-#define DRCMR69         __REG(0x40001114)  /* Request to Channel Map Register for Camera FIFO 1 Request */
-#define DRCMR70         __REG(0x40001118)  /* Request to Channel Map Register for Camera FIFO 2 Request */
-
-#define DRCMRRXSADR     DRCMR2
-#define DRCMRTXSADR     DRCMR3
-#define DRCMRRXBTRBR    DRCMR4
-#define DRCMRTXBTTHR    DRCMR5
-#define DRCMRRXFFRBR    DRCMR6
-#define DRCMRTXFFTHR    DRCMR7
-#define DRCMRRXMCDR     DRCMR8
-#define DRCMRRXMODR     DRCMR9
-#define DRCMRTXMODR     DRCMR10
-#define DRCMRRXPCDR     DRCMR11
-#define DRCMRTXPCDR     DRCMR12
-#define DRCMRRXSSDR     DRCMR13
-#define DRCMRTXSSDR     DRCMR14
-#define DRCMRRXSS2DR   DRCMR15
-#define DRCMRTXSS2DR   DRCMR16
-#define DRCMRRXICDR     DRCMR17
-#define DRCMRTXICDR     DRCMR18
-#define DRCMRRXSTRBR    DRCMR19
-#define DRCMRTXSTTHR    DRCMR20
-#define DRCMRRXMMC      DRCMR21
-#define DRCMRTXMMC      DRCMR22
-#define DRCMRRXSS3DR   DRCMR66
-#define DRCMRTXSS3DR   DRCMR67
-#define DRCMRUDC(x)     DRCMR((x) + 24)
-
 #define DRCMR_MAPVLD    (1 << 7)        /* Map Valid (read / write) */
 #define DRCMR_CHLNUM    0x1f            /* mask for Channel Number (read / write) */
 
-#define DDADR0          __REG(0x40000200)  /* DMA Descriptor Address Register Channel 0 */
-#define DSADR0          __REG(0x40000204)  /* DMA Source Address Register Channel 0 */
-#define DTADR0          __REG(0x40000208)  /* DMA Target Address Register Channel 0 */
-#define DCMD0           __REG(0x4000020c)  /* DMA Command Address Register Channel 0 */
-#define DDADR1          __REG(0x40000210)  /* DMA Descriptor Address Register Channel 1 */
-#define DSADR1          __REG(0x40000214)  /* DMA Source Address Register Channel 1 */
-#define DTADR1          __REG(0x40000218)  /* DMA Target Address Register Channel 1 */
-#define DCMD1           __REG(0x4000021c)  /* DMA Command Address Register Channel 1 */
-#define DDADR2          __REG(0x40000220)  /* DMA Descriptor Address Register Channel 2 */
-#define DSADR2          __REG(0x40000224)  /* DMA Source Address Register Channel 2 */
-#define DTADR2          __REG(0x40000228)  /* DMA Target Address Register Channel 2 */
-#define DCMD2           __REG(0x4000022c)  /* DMA Command Address Register Channel 2 */
-#define DDADR3          __REG(0x40000230)  /* DMA Descriptor Address Register Channel 3 */
-#define DSADR3          __REG(0x40000234)  /* DMA Source Address Register Channel 3 */
-#define DTADR3          __REG(0x40000238)  /* DMA Target Address Register Channel 3 */
-#define DCMD3           __REG(0x4000023c)  /* DMA Command Address Register Channel 3 */
-#define DDADR4          __REG(0x40000240)  /* DMA Descriptor Address Register Channel 4 */
-#define DSADR4          __REG(0x40000244)  /* DMA Source Address Register Channel 4 */
-#define DTADR4          __REG(0x40000248)  /* DMA Target Address Register Channel 4 */
-#define DCMD4           __REG(0x4000024c)  /* DMA Command Address Register Channel 4 */
-#define DDADR5          __REG(0x40000250)  /* DMA Descriptor Address Register Channel 5 */
-#define DSADR5          __REG(0x40000254)  /* DMA Source Address Register Channel 5 */
-#define DTADR5          __REG(0x40000258)  /* DMA Target Address Register Channel 5 */
-#define DCMD5           __REG(0x4000025c)  /* DMA Command Address Register Channel 5 */
-#define DDADR6          __REG(0x40000260)  /* DMA Descriptor Address Register Channel 6 */
-#define DSADR6          __REG(0x40000264)  /* DMA Source Address Register Channel 6 */
-#define DTADR6          __REG(0x40000268)  /* DMA Target Address Register Channel 6 */
-#define DCMD6           __REG(0x4000026c)  /* DMA Command Address Register Channel 6 */
-#define DDADR7          __REG(0x40000270)  /* DMA Descriptor Address Register Channel 7 */
-#define DSADR7          __REG(0x40000274)  /* DMA Source Address Register Channel 7 */
-#define DTADR7          __REG(0x40000278)  /* DMA Target Address Register Channel 7 */
-#define DCMD7           __REG(0x4000027c)  /* DMA Command Address Register Channel 7 */
-#define DDADR8          __REG(0x40000280)  /* DMA Descriptor Address Register Channel 8 */
-#define DSADR8          __REG(0x40000284)  /* DMA Source Address Register Channel 8 */
-#define DTADR8          __REG(0x40000288)  /* DMA Target Address Register Channel 8 */
-#define DCMD8           __REG(0x4000028c)  /* DMA Command Address Register Channel 8 */
-#define DDADR9          __REG(0x40000290)  /* DMA Descriptor Address Register Channel 9 */
-#define DSADR9          __REG(0x40000294)  /* DMA Source Address Register Channel 9 */
-#define DTADR9          __REG(0x40000298)  /* DMA Target Address Register Channel 9 */
-#define DCMD9           __REG(0x4000029c)  /* DMA Command Address Register Channel 9 */
-#define DDADR10         __REG(0x400002a0)  /* DMA Descriptor Address Register Channel 10 */
-#define DSADR10         __REG(0x400002a4)  /* DMA Source Address Register Channel 10 */
-#define DTADR10         __REG(0x400002a8)  /* DMA Target Address Register Channel 10 */
-#define DCMD10          __REG(0x400002ac)  /* DMA Command Address Register Channel 10 */
-#define DDADR11         __REG(0x400002b0)  /* DMA Descriptor Address Register Channel 11 */
-#define DSADR11         __REG(0x400002b4)  /* DMA Source Address Register Channel 11 */
-#define DTADR11         __REG(0x400002b8)  /* DMA Target Address Register Channel 11 */
-#define DCMD11          __REG(0x400002bc)  /* DMA Command Address Register Channel 11 */
-#define DDADR12         __REG(0x400002c0)  /* DMA Descriptor Address Register Channel 12 */
-#define DSADR12         __REG(0x400002c4)  /* DMA Source Address Register Channel 12 */
-#define DTADR12         __REG(0x400002c8)  /* DMA Target Address Register Channel 12 */
-#define DCMD12          __REG(0x400002cc)  /* DMA Command Address Register Channel 12 */
-#define DDADR13         __REG(0x400002d0)  /* DMA Descriptor Address Register Channel 13 */
-#define DSADR13         __REG(0x400002d4)  /* DMA Source Address Register Channel 13 */
-#define DTADR13         __REG(0x400002d8)  /* DMA Target Address Register Channel 13 */
-#define DCMD13          __REG(0x400002dc)  /* DMA Command Address Register Channel 13 */
-#define DDADR14         __REG(0x400002e0)  /* DMA Descriptor Address Register Channel 14 */
-#define DSADR14         __REG(0x400002e4)  /* DMA Source Address Register Channel 14 */
-#define DTADR14         __REG(0x400002e8)  /* DMA Target Address Register Channel 14 */
-#define DCMD14          __REG(0x400002ec)  /* DMA Command Address Register Channel 14 */
-#define DDADR15         __REG(0x400002f0)  /* DMA Descriptor Address Register Channel 15 */
-#define DSADR15         __REG(0x400002f4)  /* DMA Source Address Register Channel 15 */
-#define DTADR15         __REG(0x400002f8)  /* DMA Target Address Register Channel 15 */
-#define DCMD15          __REG(0x400002fc)  /* DMA Command Address Register Channel 15 */
-
 #define DDADR(x)        __REG2(0x40000200, (x) << 4)
 #define DSADR(x)        __REG2(0x40000204, (x) << 4)
 #define DTADR(x)        __REG2(0x40000208, (x) << 4)
@@ -418,91 +265,13 @@
 
 
 /*
- * I2C registers
+ * I2C registers - moved into drivers/i2c/busses/i2c-pxa.c
  */
 
-#define IBMR            __REG(0x40301680)  /* I2C Bus Monitor Register - IBMR */
-#define IDBR            __REG(0x40301688)  /* I2C Data Buffer Register - IDBR */
-#define ICR             __REG(0x40301690)  /* I2C Control Register - ICR */
-#define ISR             __REG(0x40301698)  /* I2C Status Register - ISR */
-#define ISAR            __REG(0x403016A0)  /* I2C Slave Address Register - ISAR */
-
-#define PWRIBMR    __REG(0x40f00180)  /* Power I2C Bus Monitor Register-IBMR */
-#define PWRIDBR    __REG(0x40f00188)  /* Power I2C Data Buffer Register-IDBR */
-#define PWRICR __REG(0x40f00190)  /* Power I2C Control Register - ICR */
-#define PWRISR __REG(0x40f00198)  /* Power I2C Status Register - ISR */
-#define PWRISAR    __REG(0x40f001A0)  /*Power I2C Slave Address Register-ISAR */
-
-#define ICR_START       (1 << 0)           /* start bit */
-#define ICR_STOP        (1 << 1)           /* stop bit */
-#define ICR_ACKNAK      (1 << 2)           /* send ACK(0) or NAK(1) */
-#define ICR_TB          (1 << 3)           /* transfer byte bit */
-#define ICR_MA          (1 << 4)           /* master abort */
-#define ICR_SCLE        (1 << 5)           /* master clock enable */
-#define ICR_IUE         (1 << 6)           /* unit enable */
-#define ICR_GCD         (1 << 7)           /* general call disable */
-#define ICR_ITEIE       (1 << 8)           /* enable tx interrupts */
-#define ICR_IRFIE       (1 << 9)           /* enable rx interrupts */
-#define ICR_BEIE        (1 << 10)          /* enable bus error ints */
-#define ICR_SSDIE       (1 << 11)          /* slave STOP detected int enable */
-#define ICR_ALDIE       (1 << 12)          /* enable arbitration interrupt */
-#define ICR_SADIE       (1 << 13)          /* slave address detected int enable */
-#define ICR_UR          (1 << 14)          /* unit reset */
-
-#define ISR_RWM         (1 << 0)           /* read/write mode */
-#define ISR_ACKNAK      (1 << 1)           /* ack/nak status */
-#define ISR_UB          (1 << 2)           /* unit busy */
-#define ISR_IBB         (1 << 3)           /* bus busy */
-#define ISR_SSD         (1 << 4)           /* slave stop detected */
-#define ISR_ALD         (1 << 5)           /* arbitration loss detected */
-#define ISR_ITE         (1 << 6)           /* tx buffer empty */
-#define ISR_IRF         (1 << 7)           /* rx buffer full */
-#define ISR_GCAD        (1 << 8)           /* general call address detected */
-#define ISR_SAD         (1 << 9)           /* slave address detected */
-#define ISR_BED         (1 << 10)          /* bus error no ACK/NAK */
-
-
 /*
- * Serial Audio Controller
+ * Serial Audio Controller - moved into sound/soc/pxa/pxa2xx-i2s.c
  */
 
-#define SACR0           __REG(0x40400000)  /* Global Control Register */
-#define SACR1           __REG(0x40400004)  /* Serial Audio I 2 S/MSB-Justified Control Register */
-#define SASR0           __REG(0x4040000C)  /* Serial Audio I 2 S/MSB-Justified Interface and FIFO Status Register */
-#define SAIMR           __REG(0x40400014)  /* Serial Audio Interrupt Mask Register */
-#define SAICR           __REG(0x40400018)  /* Serial Audio Interrupt Clear Register */
-#define SADIV           __REG(0x40400060)  /* Audio Clock Divider Register. */
-#define SADR            __REG(0x40400080)  /* Serial Audio Data Register (TX and RX FIFO access Register). */
-
-#define SACR0_RFTH(x)   ((x) << 12)     /* Rx FIFO Interrupt or DMA Trigger Threshold */
-#define SACR0_TFTH(x)   ((x) << 8)      /* Tx FIFO Interrupt or DMA Trigger Threshold */
-#define SACR0_STRF      (1 << 5)        /* FIFO Select for EFWR Special Function */
-#define SACR0_EFWR      (1 << 4)        /* Enable EFWR Function  */
-#define SACR0_RST       (1 << 3)        /* FIFO, i2s Register Reset */
-#define SACR0_BCKD      (1 << 2)        /* Bit Clock Direction */
-#define SACR0_ENB       (1 << 0)        /* Enable I2S Link */
-#define SACR1_ENLBF     (1 << 5)        /* Enable Loopback */
-#define SACR1_DRPL      (1 << 4)        /* Disable Replaying Function */
-#define SACR1_DREC      (1 << 3)        /* Disable Recording Function */
-#define SACR1_AMSL      (1 << 0)        /* Specify Alternate Mode */
-
-#define SASR0_I2SOFF    (1 << 7)        /* Controller Status */
-#define SASR0_ROR       (1 << 6)        /* Rx FIFO Overrun */
-#define SASR0_TUR       (1 << 5)        /* Tx FIFO Underrun */
-#define SASR0_RFS       (1 << 4)        /* Rx FIFO Service Request */
-#define SASR0_TFS       (1 << 3)        /* Tx FIFO Service Request */
-#define SASR0_BSY       (1 << 2)        /* I2S Busy */
-#define SASR0_RNE       (1 << 1)        /* Rx FIFO Not Empty */
-#define SASR0_TNF       (1 << 0)        /* Tx FIFO Not Empty */
-
-#define SAICR_ROR       (1 << 6)        /* Clear Rx FIFO Overrun Interrupt */
-#define SAICR_TUR       (1 << 5)        /* Clear Tx FIFO Underrun Interrupt */
-
-#define SAIMR_ROR       (1 << 6)        /* Enable Rx FIFO Overrun Condition Interrupt */
-#define SAIMR_TUR       (1 << 5)        /* Enable Tx FIFO Underrun Condition Interrupt */
-#define SAIMR_RFS       (1 << 4)        /* Enable Rx FIFO Service Interrupt */
-#define SAIMR_TFS       (1 << 3)        /* Enable Tx FIFO Service Interrupt */
-
 /*
  * AC97 Controller registers
  */
@@ -989,77 +758,6 @@
 
 #endif
 
-#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
-/*
- * UHC: USB Host Controller (OHCI-like) register definitions
- */
-#define UHC_BASE_PHYS   (0x4C000000)
-#define UHCREV          __REG(0x4C000000) /* UHC HCI Spec Revision */
-#define UHCHCON         __REG(0x4C000004) /* UHC Host Control Register */
-#define UHCCOMS         __REG(0x4C000008) /* UHC Command Status Register */
-#define UHCINTS         __REG(0x4C00000C) /* UHC Interrupt Status Register */
-#define UHCINTE         __REG(0x4C000010) /* UHC Interrupt Enable */
-#define UHCINTD         __REG(0x4C000014) /* UHC Interrupt Disable */
-#define UHCHCCA         __REG(0x4C000018) /* UHC Host Controller Comm. Area */
-#define UHCPCED         __REG(0x4C00001C) /* UHC Period Current Endpt Descr */
-#define UHCCHED         __REG(0x4C000020) /* UHC Control Head Endpt Descr */
-#define UHCCCED         __REG(0x4C000024) /* UHC Control Current Endpt Descr */
-#define UHCBHED         __REG(0x4C000028) /* UHC Bulk Head Endpt Descr */
-#define UHCBCED         __REG(0x4C00002C) /* UHC Bulk Current Endpt Descr */
-#define UHCDHEAD        __REG(0x4C000030) /* UHC Done Head */
-#define UHCFMI          __REG(0x4C000034) /* UHC Frame Interval */
-#define UHCFMR          __REG(0x4C000038) /* UHC Frame Remaining */
-#define UHCFMN          __REG(0x4C00003C) /* UHC Frame Number */
-#define UHCPERS         __REG(0x4C000040) /* UHC Periodic Start */
-#define UHCLS           __REG(0x4C000044) /* UHC Low Speed Threshold */
-
-#define UHCRHDA         __REG(0x4C000048) /* UHC Root Hub Descriptor A */
-#define UHCRHDA_NOCP    (1 << 12)       /* No over current protection */
-
-#define UHCRHDB         __REG(0x4C00004C) /* UHC Root Hub Descriptor B */
-#define UHCRHS          __REG(0x4C000050) /* UHC Root Hub Status */
-#define UHCRHPS1        __REG(0x4C000054) /* UHC Root Hub Port 1 Status */
-#define UHCRHPS2        __REG(0x4C000058) /* UHC Root Hub Port 2 Status */
-#define UHCRHPS3        __REG(0x4C00005C) /* UHC Root Hub Port 3 Status */
-
-#define UHCSTAT         __REG(0x4C000060) /* UHC Status Register */
-#define UHCSTAT_UPS3    (1 << 16)       /* USB Power Sense Port3 */
-#define UHCSTAT_SBMAI   (1 << 15)       /* System Bus Master Abort Interrupt*/
-#define UHCSTAT_SBTAI   (1 << 14)       /* System Bus Target Abort Interrupt*/
-#define UHCSTAT_UPRI    (1 << 13)       /* USB Port Resume Interrupt */
-#define UHCSTAT_UPS2    (1 << 12)       /* USB Power Sense Port 2 */
-#define UHCSTAT_UPS1    (1 << 11)       /* USB Power Sense Port 1 */
-#define UHCSTAT_HTA     (1 << 10)       /* HCI Target Abort */
-#define UHCSTAT_HBA     (1 << 8)        /* HCI Buffer Active */
-#define UHCSTAT_RWUE    (1 << 7)        /* HCI Remote Wake Up Event */
-
-#define UHCHR           __REG(0x4C000064) /* UHC Reset Register */
-#define UHCHR_SSEP3     (1 << 11)       /* Sleep Standby Enable for Port3 */
-#define UHCHR_SSEP2     (1 << 10)       /* Sleep Standby Enable for Port2 */
-#define UHCHR_SSEP1     (1 << 9)        /* Sleep Standby Enable for Port1 */
-#define UHCHR_PCPL      (1 << 7)        /* Power control polarity low */
-#define UHCHR_PSPL      (1 << 6)        /* Power sense polarity low */
-#define UHCHR_SSE       (1 << 5)        /* Sleep Standby Enable */
-#define UHCHR_UIT       (1 << 4)        /* USB Interrupt Test */
-#define UHCHR_SSDC      (1 << 3)        /* Simulation Scale Down Clock */
-#define UHCHR_CGR       (1 << 2)        /* Clock Generation Reset */
-#define UHCHR_FHR       (1 << 1)        /* Force Host Controller Reset */
-#define UHCHR_FSBIR     (1 << 0)        /* Force System Bus Iface Reset */
-
-#define UHCHIE          __REG(0x4C000068) /* UHC Interrupt Enable Register*/
-#define UHCHIE_UPS3IE   (1 << 14)       /* Power Sense Port3 IntEn */
-#define UHCHIE_UPRIE    (1 << 13)       /* Port Resume IntEn */
-#define UHCHIE_UPS2IE   (1 << 12)       /* Power Sense Port2 IntEn */
-#define UHCHIE_UPS1IE   (1 << 11)       /* Power Sense Port1 IntEn */
-#define UHCHIE_TAIE     (1 << 10)       /* HCI Interface Transfer Abort
-                                           Interrupt Enable*/
-#define UHCHIE_HBAIE    (1 << 8)        /* HCI Buffer Active IntEn */
-#define UHCHIE_RWIE     (1 << 7)        /* Remote Wake-up IntEn */
-
-#define UHCHIT          __REG(0x4C00006C) /* UHC Interrupt Test register */
-
-#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
-
 /* PWRMODE register M field values */
 
 #define PWRMODE_IDLE            0x1
diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
index 39eb68319e28..b1fcd10ab6c6 100644
--- a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
+++ b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
@@ -131,6 +131,28 @@
 #define CKENB           __REG(0x41340010)       /* B Clock Enable Register */
 #define AC97_DIV        __REG(0x41340014)       /* AC97 clock divisor value register */
 
+#define ACCR_XPDIS              (1 << 31)       /* Core PLL Output Disable */
+#define ACCR_SPDIS              (1 << 30)       /* System PLL Output Disable */
+#define ACCR_D0CS               (1 << 26)       /* D0 Mode Clock Select */
+#define ACCR_PCCE               (1 << 11)       /* Power Mode Change Clock Enable */
+#define ACCR_DDR_D0CS           (1 << 7)        /* DDR SDRAM clock frequency in D0CS (PXA31x only) */
+
+#define ACCR_SMCFS_MASK         (0x7 << 23)     /* Static Memory Controller Frequency Select */
+#define ACCR_SFLFS_MASK         (0x3 << 18)     /* Frequency Select for Internal Memory Controller */
+#define ACCR_XSPCLK_MASK        (0x3 << 16)     /* Core Frequency during Frequency Change */
+#define ACCR_HSS_MASK           (0x3 << 14)     /* System Bus-Clock Frequency Select */
+#define ACCR_DMCFS_MASK         (0x3 << 12)     /* Dynamic Memory Controller Clock Frequency Select */
+#define ACCR_XN_MASK            (0x7 << 8)      /* Core PLL Turbo-Mode-to-Run-Mode Ratio */
+#define ACCR_XL_MASK            (0x1f)          /* Core PLL Run-Mode-to-Oscillator Ratio */
+
+#define ACCR_SMCFS(x)           (((x) & 0x7) << 23)
+#define ACCR_SFLFS(x)           (((x) & 0x3) << 18)
+#define ACCR_XSPCLK(x)          (((x) & 0x3) << 16)
+#define ACCR_HSS(x)             (((x) & 0x3) << 14)
+#define ACCR_DMCFS(x)           (((x) & 0x3) << 12)
+#define ACCR_XN(x)              (((x) & 0x7) << 8)
+#define ACCR_XL(x)              ((x) & 0x1f)
+
 /*
  * Clock Enable Bit
  */
diff --git a/arch/arm/mach-pxa/include/mach/spitz.h b/arch/arm/mach-pxa/include/mach/spitz.h
index bd14365f7ed5..31ac26b55bc1 100644
--- a/arch/arm/mach-pxa/include/mach/spitz.h
+++ b/arch/arm/mach-pxa/include/mach/spitz.h
@@ -16,6 +16,7 @@
 #endif
 
 #include <linux/fb.h>
+#include <linux/gpio.h>
 
 /* Spitz/Akita GPIOs */
 
@@ -100,13 +101,24 @@
 #define SPITZ_SCP_JK_A          SCOOP_GPCR_PA18  /* Low */
 #define SPITZ_SCP_ADC_TEMP_ON   SCOOP_GPCR_PA19  /* Low */
 
-#define SPITZ_SCP_IO_DIR      (SPITZ_SCP_LED_GREEN | SPITZ_SCP_JK_B | SPITZ_SCP_CHRG_ON | \
-                               SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_LED_ORANGE | \
+#define SPITZ_SCP_IO_DIR      (SPITZ_SCP_JK_B | SPITZ_SCP_CHRG_ON | \
+                               SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | \
                                SPITZ_SCP_CF_POWER | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON)
 #define SPITZ_SCP_IO_OUT      (SPITZ_SCP_CHRG_ON | SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R)
 #define SPITZ_SCP_SUS_CLR     (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON)
 #define SPITZ_SCP_SUS_SET     0
 
+#define SPITZ_SCP_GPIO_BASE     (NR_BUILTIN_GPIO)
+#define SPITZ_GPIO_LED_GREEN    (SPITZ_SCP_GPIO_BASE + 0)
+#define SPITZ_GPIO_JK_B         (SPITZ_SCP_GPIO_BASE + 1)
+#define SPITZ_GPIO_CHRG_ON      (SPITZ_SCP_GPIO_BASE + 2)
+#define SPITZ_GPIO_MUTE_L       (SPITZ_SCP_GPIO_BASE + 3)
+#define SPITZ_GPIO_MUTE_R       (SPITZ_SCP_GPIO_BASE + 4)
+#define SPITZ_GPIO_CF_POWER     (SPITZ_SCP_GPIO_BASE + 5)
+#define SPITZ_GPIO_LED_ORANGE   (SPITZ_SCP_GPIO_BASE + 6)
+#define SPITZ_GPIO_JK_A         (SPITZ_SCP_GPIO_BASE + 7)
+#define SPITZ_GPIO_ADC_TEMP_ON  (SPITZ_SCP_GPIO_BASE + 8)
+
 /* Spitz Scoop Device (No. 2) GPIOs */
 /* Suspend States in comments */
 #define SPITZ_SCP2_IR_ON           SCOOP_GPCR_PA11  /* High */
@@ -119,15 +131,36 @@
 #define SPITZ_SCP2_BACKLIGHT_ON    SCOOP_GPCR_PA18  /* Low */
 #define SPITZ_SCP2_MIC_BIAS        SCOOP_GPCR_PA19  /* Low */
 
-#define SPITZ_SCP2_IO_DIR (SPITZ_SCP2_IR_ON | SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1 | \
+#define SPITZ_SCP2_IO_DIR (SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1 | \
                            SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \
                            SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS)
 
-#define SPITZ_SCP2_IO_OUT   (SPITZ_SCP2_IR_ON | SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1)
+#define SPITZ_SCP2_IO_OUT   (SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1)
 #define SPITZ_SCP2_SUS_CLR  (SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \
                              SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS)
 #define SPITZ_SCP2_SUS_SET  (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1)
 
+#define SPITZ_SCP2_GPIO_BASE            (NR_BUILTIN_GPIO + 12)
+#define SPITZ_GPIO_IR_ON                (SPITZ_SCP2_GPIO_BASE + 0)
+#define SPITZ_GPIO_AKIN_PULLUP          (SPITZ_SCP2_GPIO_BASE + 1
+#define SPITZ_GPIO_RESERVED_1           (SPITZ_SCP2_GPIO_BASE + 2)
+#define SPITZ_GPIO_RESERVED_2           (SPITZ_SCP2_GPIO_BASE + 3)
+#define SPITZ_GPIO_RESERVED_3           (SPITZ_SCP2_GPIO_BASE + 4)
+#define SPITZ_GPIO_RESERVED_4           (SPITZ_SCP2_GPIO_BASE + 5)
+#define SPITZ_GPIO_BACKLIGHT_CONT       (SPITZ_SCP2_GPIO_BASE + 6)
+#define SPITZ_GPIO_BACKLIGHT_ON         (SPITZ_SCP2_GPIO_BASE + 7)
+#define SPITZ_GPIO_MIC_BIAS             (SPITZ_SCP2_GPIO_BASE + 8)
+
+/* Akita IO Expander GPIOs */
+#define AKITA_IOEXP_GPIO_BASE           (NR_BUILTIN_GPIO + 12)
+#define AKITA_GPIO_RESERVED_0           (AKITA_IOEXP_GPIO_BASE + 0)
+#define AKITA_GPIO_RESERVED_1           (AKITA_IOEXP_GPIO_BASE + 1)
+#define AKITA_GPIO_MIC_BIAS             (AKITA_IOEXP_GPIO_BASE + 2)
+#define AKITA_GPIO_BACKLIGHT_ON         (AKITA_IOEXP_GPIO_BASE + 3)
+#define AKITA_GPIO_BACKLIGHT_CONT       (AKITA_IOEXP_GPIO_BASE + 4)
+#define AKITA_GPIO_AKIN_PULLUP          (AKITA_IOEXP_GPIO_BASE + 5)
+#define AKITA_GPIO_IR_ON                (AKITA_IOEXP_GPIO_BASE + 6)
+#define AKITA_GPIO_RESERVED_7           (AKITA_IOEXP_GPIO_BASE + 7)
 
 /* Spitz IRQ Definitions */
 
@@ -154,5 +187,4 @@
  */
 extern struct platform_device spitzscoop_device;
 extern struct platform_device spitzscoop2_device;
-extern struct platform_device spitzssp_device;
 extern struct sharpsl_charger_machinfo spitz_pm_machinfo;
diff --git a/arch/arm/mach-pxa/include/mach/ssp.h b/arch/arm/mach-pxa/include/mach/ssp.h
index a012882c9ee6..cb5cb766f0f1 100644
--- a/arch/arm/mach-pxa/include/mach/ssp.h
+++ b/arch/arm/mach-pxa/include/mach/ssp.h
@@ -20,6 +20,7 @@
 #define __ASM_ARCH_SSP_H
 
 #include <linux/list.h>
+#include <linux/io.h>
 
 enum pxa_ssp_type {
         SSP_UNDEFINED = 0,
@@ -78,6 +79,29 @@ int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags);
 int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed);
 void ssp_exit(struct ssp_dev *dev);
 
+/**
+ * ssp_write_reg - Write to a SSP register
+ *
+ * @dev: SSP device to access
+ * @reg: Register to write to
+ * @val: Value to be written.
+ */
+static inline void ssp_write_reg(struct ssp_device *dev, u32 reg, u32 val)
+{
+        __raw_writel(val, dev->mmio_base + reg);
+}
+
+/**
+ * ssp_read_reg - Read from a SSP register
+ *
+ * @dev: SSP device to access
+ * @reg: Register to read from
+ */
+static inline u32 ssp_read_reg(struct ssp_device *dev, u32 reg)
+{
+        return __raw_readl(dev->mmio_base + reg);
+}
+
 struct ssp_device *ssp_request(int port, const char *label);
 void ssp_free(struct ssp_device *);
 #endif /* __ASM_ARCH_SSP_H */
diff --git a/arch/arm/mach-pxa/include/mach/trizeps4.h b/arch/arm/mach-pxa/include/mach/trizeps4.h
index 641d0ec110bb..903e1a2e6641 100644
--- a/arch/arm/mach-pxa/include/mach/trizeps4.h
+++ b/arch/arm/mach-pxa/include/mach/trizeps4.h
@@ -17,11 +17,16 @@
 #define TRIZEPS4_PIC_PHYS       (PXA_CS3_PHYS)  /* Logic chip on ConXS-Board */
 #define TRIZEPS4_SDRAM_BASE     0xa0000000      /* SDRAM region */
 
-#define TRIZEPS4_CFSR_PHYS      (PXA_CS3_PHYS)                  /* Logic chip on ConXS-Board CSFR register */
-#define TRIZEPS4_BOCR_PHYS      (PXA_CS3_PHYS+0x02000000)       /* Logic chip on ConXS-Board BOCR register */
-#define TRIZEPS4_IRCR_PHYS      (PXA_CS3_PHYS+0x02400000)       /* Logic chip on ConXS-Board IRCR register*/
-#define TRIZEPS4_UPSR_PHYS      (PXA_CS3_PHYS+0x02800000)       /* Logic chip on ConXS-Board UPSR register*/
-#define TRIZEPS4_DICR_PHYS      (PXA_CS3_PHYS+0x03800000)       /* Logic chip on ConXS-Board DICR register*/
+                                /* Logic on ConXS-board CSFR register*/
+#define TRIZEPS4_CFSR_PHYS      (PXA_CS3_PHYS)
+                                /* Logic on ConXS-board BOCR register*/
+#define TRIZEPS4_BOCR_PHYS      (PXA_CS3_PHYS+0x02000000)
+                                /* Logic on ConXS-board IRCR register*/
+#define TRIZEPS4_IRCR_PHYS      (PXA_CS3_PHYS+0x02400000)
+                                /* Logic on ConXS-board UPSR register*/
+#define TRIZEPS4_UPSR_PHYS      (PXA_CS3_PHYS+0x02800000)
+                                /* Logic on ConXS-board DICR register*/
+#define TRIZEPS4_DICR_PHYS      (PXA_CS3_PHYS+0x03800000)
 
 /* virtual memory regions */
 #define TRIZEPS4_DISK_VIRT      0xF0000000      /* Disk On Chip region */
@@ -54,6 +59,15 @@
 #define GPIO_MMC_DET            12
 #define TRIZEPS4_MMC_IRQ        IRQ_GPIO(GPIO_MMC_DET)
 
+/* DOC NAND chip */
+#define GPIO_DOC_LOCK           94
+#define GPIO_DOC_IRQ            93
+#define TRIZEPS4_DOC_IRQ        IRQ_GPIO(GPIO_DOC_IRQ)
+
+/* SPI interface */
+#define GPIO_SPI                53
+#define TRIZEPS4_SPI_IRQ        IRQ_GPIO(GPIO_SPI)
+
 /* LEDS using tx2 / rx2 */
 #define GPIO_SYS_BUSY_LED       46
 #define GPIO_HEARTBEAT_LED      47
@@ -62,24 +76,66 @@
 #define GPIO_PIC                0
 #define TRIZEPS4_PIC_IRQ        IRQ_GPIO(GPIO_PIC)
 
-#define CFSR_P2V(x)             ((x) - TRIZEPS4_CFSR_PHYS + TRIZEPS4_CFSR_VIRT)
-#define CFSR_V2P(x)             ((x) - TRIZEPS4_CFSR_VIRT + TRIZEPS4_CFSR_PHYS)
+#ifdef CONFIG_MACH_TRIZEPS_CONXS
+/* for CONXS base board define these registers */
+#define CFSR_P2V(x)     ((x) - TRIZEPS4_CFSR_PHYS + TRIZEPS4_CFSR_VIRT)
+#define CFSR_V2P(x)     ((x) - TRIZEPS4_CFSR_VIRT + TRIZEPS4_CFSR_PHYS)
 
-#define BCR_P2V(x)              ((x) - TRIZEPS4_BOCR_PHYS + TRIZEPS4_BOCR_VIRT)
-#define BCR_V2P(x)              ((x) - TRIZEPS4_BOCR_VIRT + TRIZEPS4_BOCR_PHYS)
+#define BCR_P2V(x)      ((x) - TRIZEPS4_BOCR_PHYS + TRIZEPS4_BOCR_VIRT)
+#define BCR_V2P(x)      ((x) - TRIZEPS4_BOCR_VIRT + TRIZEPS4_BOCR_PHYS)
 
-#define DCR_P2V(x)              ((x) - TRIZEPS4_DICR_PHYS + TRIZEPS4_DICR_VIRT)
-#define DCR_V2P(x)              ((x) - TRIZEPS4_DICR_VIRT + TRIZEPS4_DICR_PHYS)
+#define DCR_P2V(x)      ((x) - TRIZEPS4_DICR_PHYS + TRIZEPS4_DICR_VIRT)
+#define DCR_V2P(x)      ((x) - TRIZEPS4_DICR_VIRT + TRIZEPS4_DICR_PHYS)
+
+#define IRCR_P2V(x)     ((x) - TRIZEPS4_IRCR_PHYS + TRIZEPS4_IRCR_VIRT)
+#define IRCR_V2P(x)     ((x) - TRIZEPS4_IRCR_VIRT + TRIZEPS4_IRCR_PHYS)
 
 #ifndef __ASSEMBLY__
-#define ConXS_CFSR              (*((volatile unsigned short *)CFSR_P2V(0x0C000000)))
-#define ConXS_BCR               (*((volatile unsigned short *)BCR_P2V(0x0E000000)))
-#define ConXS_DCR               (*((volatile unsigned short *)DCR_P2V(0x0F800000)))
+static inline unsigned short CFSR_readw(void)
+{
+        /* [Compact Flash Status Register] is read only */
+        return *((unsigned short *)CFSR_P2V(0x0C000000));
+}
+static inline void BCR_writew(unsigned short value)
+{
+        /* [Board Control Regsiter] is write only */
+        *((unsigned short *)BCR_P2V(0x0E000000)) = value;
+}
+static inline void DCR_writew(unsigned short value)
+{
+        /* [Display Control Register] is write only */
+        *((unsigned short *)DCR_P2V(0x0E000000)) = value;
+}
+static inline void IRCR_writew(unsigned short value)
+{
+        /* [InfraRed data Control Register] is write only */
+        *((unsigned short *)IRCR_P2V(0x0E000000)) = value;
+}
 #else
 #define ConXS_CFSR              CFSR_P2V(0x0C000000)
 #define ConXS_BCR               BCR_P2V(0x0E000000)
 #define ConXS_DCR               DCR_P2V(0x0F800000)
+#define ConXS_IRCR              IRCR_P2V(0x0F800000)
 #endif
+#else
+/* for whatever baseboard define function registers */
+static inline unsigned short CFSR_readw(void)
+{
+        return 0;
+}
+static inline void BCR_writew(unsigned short value)
+{
+        ;
+}
+static inline void DCR_writew(unsigned short value)
+{
+        ;
+}
+static inline void IRCR_writew(unsigned short value)
+{
+        ;
+}
+#endif  /* CONFIG_MACH_TRIZEPS_CONXS */
 
 #define ConXS_CFSR_BVD_MASK     0x0003
 #define ConXS_CFSR_BVD1         (1 << 0)
diff --git a/arch/arm/mach-pxa/include/mach/viper.h b/arch/arm/mach-pxa/include/mach/viper.h
new file mode 100644
index 000000000000..10988c270ca3
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/viper.h
@@ -0,0 +1,96 @@
+/*
+ * arch/arm/mach-pxa/include/mach/viper.h
+ *
+ * Author:      Ian Campbell
+ * Created:     Feb 03, 2003
+ * Copyright:   Arcom Control Systems.
+ *
+ * Maintained by Marc Zyngier <maz@misterjones.org>
+ *                            <marc.zyngier@altran.com>
+ *
+ * Created based on lubbock.h:
+ *  Author:     Nicolas Pitre
+ *  Created:    Jun 15, 2001
+ *  Copyright:  MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef ARCH_VIPER_H
+#define ARCH_VIPER_H
+
+#define VIPER_BOOT_PHYS         PXA_CS0_PHYS
+#define VIPER_FLASH_PHYS        PXA_CS1_PHYS
+#define VIPER_ETH_PHYS          PXA_CS2_PHYS
+#define VIPER_USB_PHYS          PXA_CS3_PHYS
+#define VIPER_ETH_DATA_PHYS     PXA_CS4_PHYS
+#define VIPER_CPLD_PHYS         PXA_CS5_PHYS
+
+#define VIPER_CPLD_BASE         (0xf0000000)
+#define VIPER_PC104IO_BASE      (0xf1000000)
+#define VIPER_USB_BASE          (0xf1800000)
+
+#define VIPER_ETH_GPIO          (0)
+#define VIPER_CPLD_GPIO         (1)
+#define VIPER_USB_GPIO          (2)
+#define VIPER_UARTA_GPIO        (4)
+#define VIPER_UARTB_GPIO        (3)
+#define VIPER_CF_CD_GPIO        (32)
+#define VIPER_CF_RDY_GPIO       (8)
+#define VIPER_BCKLIGHT_EN_GPIO  (9)
+#define VIPER_LCD_EN_GPIO       (10)
+#define VIPER_PSU_DATA_GPIO     (6)
+#define VIPER_PSU_CLK_GPIO      (11)
+#define VIPER_UART_SHDN_GPIO    (12)
+#define VIPER_BRIGHTNESS_GPIO   (16)
+#define VIPER_PSU_nCS_LD_GPIO   (19)
+#define VIPER_UPS_GPIO          (20)
+#define VIPER_CF_POWER_GPIO     (82)
+#define VIPER_TPM_I2C_SDA_GPIO  (26)
+#define VIPER_TPM_I2C_SCL_GPIO  (27)
+#define VIPER_RTC_I2C_SDA_GPIO  (83)
+#define VIPER_RTC_I2C_SCL_GPIO  (84)
+
+#define VIPER_CPLD_P2V(x)       ((x) - VIPER_CPLD_PHYS + VIPER_CPLD_BASE)
+#define VIPER_CPLD_V2P(x)       ((x) - VIPER_CPLD_BASE + VIPER_CPLD_PHYS)
+
+#ifndef __ASSEMBLY__
+#  define __VIPER_CPLD_REG(x)   (*((volatile u16 *)VIPER_CPLD_P2V(x)))
+#endif
+
+/* board level registers in the CPLD: (offsets from CPLD_BASE) ... */
+
+/* ... Physical addresses */
+#define _VIPER_LO_IRQ_STATUS    (VIPER_CPLD_PHYS + 0x100000)
+#define _VIPER_ICR_PHYS         (VIPER_CPLD_PHYS + 0x100002)
+#define _VIPER_HI_IRQ_STATUS    (VIPER_CPLD_PHYS + 0x100004)
+#define _VIPER_VERSION_PHYS     (VIPER_CPLD_PHYS + 0x100006)
+#define VIPER_UARTA_PHYS        (VIPER_CPLD_PHYS + 0x300010)
+#define VIPER_UARTB_PHYS        (VIPER_CPLD_PHYS + 0x300000)
+#define _VIPER_SRAM_BASE        (VIPER_CPLD_PHYS + 0x800000)
+
+/* ... Virtual addresses */
+#define VIPER_LO_IRQ_STATUS     __VIPER_CPLD_REG(_VIPER_LO_IRQ_STATUS)
+#define VIPER_HI_IRQ_STATUS     __VIPER_CPLD_REG(_VIPER_HI_IRQ_STATUS)
+#define VIPER_VERSION           __VIPER_CPLD_REG(_VIPER_VERSION_PHYS)
+#define VIPER_ICR               __VIPER_CPLD_REG(_VIPER_ICR_PHYS)
+
+/* Decode VIPER_VERSION register */
+#define VIPER_CPLD_REVISION(x)  (((x) >> 5) & 0x7)
+#define VIPER_BOARD_VERSION(x)  (((x) >> 3) & 0x3)
+#define VIPER_BOARD_ISSUE(x)    (((x) >> 0) & 0x7)
+
+/* Interrupt and Configuration Register (VIPER_ICR) */
+/* This is a write only register. Only CF_RST is used under Linux */
+
+extern void viper_cf_rst(int state);
+
+#define VIPER_ICR_RETRIG        (1 << 0)
+#define VIPER_ICR_AUTO_CLR      (1 << 1)
+#define VIPER_ICR_R_DIS         (1 << 2)
+#define VIPER_ICR_CF_RST        (1 << 3)
+
+#endif
+
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index 5e95c5372fec..fa69c3a6a38e 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -57,7 +57,7 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
 
         pxa_internal_irq_nr = irq_nr;
 
-        for (irq = 0; irq < irq_nr; irq += 32) {
+        for (irq = PXA_IRQ(0); irq < PXA_IRQ(irq_nr); irq += 32) {
                 _ICMR(irq) = 0; /* disable all IRQs */
                 _ICLR(irq) = 0; /* all IRQs are IRQ, not FIQ */
         }
diff --git a/arch/arm/mach-pxa/leds-trizeps4.c b/arch/arm/mach-pxa/leds-trizeps4.c
deleted file mode 100644
index 3bc29007df3a..000000000000
--- a/arch/arm/mach-pxa/leds-trizeps4.c
+++ /dev/null
@@ -1,134 +0,0 @@
-/*
- * linux/arch/arm/mach-pxa/leds-trizeps4.c
- *
- *  Author:     Jürgen Schindele
- *  Created:    20 02, 2006
- *  Copyright:  Jürgen Schindele
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/init.h>
-
-#include <mach/hardware.h>
-#include <asm/system.h>
-#include <asm/types.h>
-#include <asm/leds.h>
-
-#include <mach/pxa-regs.h>
-#include <mach/pxa2xx-gpio.h>
-#include <mach/trizeps4.h>
-
-#include "leds.h"
-
-#define LED_STATE_ENABLED       1
-#define LED_STATE_CLAIMED       2
-
-#define SYS_BUSY                0x01
-#define HEARTBEAT               0x02
-#define BLINK                   0x04
-
-static unsigned int led_state;
-static unsigned int hw_led_state;
-
-void trizeps4_leds_event(led_event_t evt)
-{
-        unsigned long flags;
-
-        local_irq_save(flags);
-
-        switch (evt) {
-        case led_start:
-                hw_led_state = 0;
-                pxa_gpio_mode( GPIO_SYS_BUSY_LED  | GPIO_OUT);          /* LED1 */
-                pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT);          /* LED2 */
-                led_state = LED_STATE_ENABLED;
-                break;
-
-        case led_stop:
-                led_state &= ~LED_STATE_ENABLED;
-                break;
-
-        case led_claim:
-                led_state |= LED_STATE_CLAIMED;
-                hw_led_state = 0;
-                break;
-
-        case led_release:
-                led_state &= ~LED_STATE_CLAIMED;
-                hw_led_state = 0;
-                break;
-
-#ifdef CONFIG_LEDS_TIMER
-        case led_timer:
-                hw_led_state ^= HEARTBEAT;
-                break;
-#endif
-
-#ifdef CONFIG_LEDS_CPU
-        case led_idle_start:
-                hw_led_state &= ~SYS_BUSY;
-                break;
-
-        case led_idle_end:
-                hw_led_state |= SYS_BUSY;
-                break;
-#endif
-
-        case led_halted:
-                break;
-
-        case led_green_on:
-                hw_led_state |= BLINK;
-                break;
-
-        case led_green_off:
-                hw_led_state &= ~BLINK;
-                break;
-
-        case led_amber_on:
-                break;
-
-        case led_amber_off:
-                break;
-
-        case led_red_on:
-                break;
-
-        case led_red_off:
-                break;
-
-        default:
-                break;
-        }
-
-        if  (led_state & LED_STATE_ENABLED) {
-                switch (hw_led_state) {
-                        case 0:
-                                GPSR(GPIO_SYS_BUSY_LED)  |= GPIO_bit(GPIO_SYS_BUSY_LED);
-                                GPSR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
-                                break;
-                        case 1:
-                                GPCR(GPIO_SYS_BUSY_LED)  |= GPIO_bit(GPIO_SYS_BUSY_LED);
-                                GPSR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
-                                break;
-                        case 2:
-                                GPSR(GPIO_SYS_BUSY_LED)  |= GPIO_bit(GPIO_SYS_BUSY_LED);
-                                GPCR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
-                                break;
-                        case 3:
-                                GPCR(GPIO_SYS_BUSY_LED)  |= GPIO_bit(GPIO_SYS_BUSY_LED);
-                                GPCR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
-                                break;
-                }
-        }
-        else {
-                /* turn all off */
-                GPSR(GPIO_SYS_BUSY_LED)  |= GPIO_bit(GPIO_SYS_BUSY_LED);
-                GPSR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
-        }
-
-        local_irq_restore(flags);
-}
diff --git a/arch/arm/mach-pxa/leds.c b/arch/arm/mach-pxa/leds.c
index e13eb841e48d..bbe4d5f6afaa 100644
--- a/arch/arm/mach-pxa/leds.c
+++ b/arch/arm/mach-pxa/leds.c
@@ -24,8 +24,6 @@ pxa_leds_init(void)
                 leds_event = mainstone_leds_event;
         if (machine_is_pxa_idp())
                 leds_event = idp_leds_event;
-        if (machine_is_trizeps4())
-                leds_event = trizeps4_leds_event;
 
         leds_event(led_start);
         return 0;
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index 58f3402a0375..b4d00aba0e31 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -20,6 +20,7 @@
 #include <linux/delay.h>
 #include <linux/platform_device.h>
 #include <linux/clk.h>
+#include <linux/spi/spi.h>
 #include <linux/smc91x.h>
 
 #include <asm/types.h>
@@ -38,6 +39,7 @@
 #include <mach/gpio.h>
 #include <mach/pxafb.h>
 #include <mach/ssp.h>
+#include <mach/pxa2xx_spi.h>
 #include <mach/pxa27x_keypad.h>
 #include <mach/pxa3xx_nand.h>
 #include <mach/littleton.h>
@@ -72,8 +74,8 @@ static mfp_cfg_t littleton_mfp_cfg[] __initdata = {
 
         /* SSP2 */
         GPIO25_SSP2_SCLK,
-        GPIO17_SSP2_FRM,
         GPIO27_SSP2_TXD,
+        GPIO17_GPIO,    /* SFRM as chip-select */
 
         /* Debug Ethernet */
         GPIO90_GPIO,
@@ -123,160 +125,6 @@ static struct platform_device smc91x_device = {
 };
 
 #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
-/* use bit 30, 31 as the indicator of command parameter number */
-#define CMD0(x)         ((0x00000000) | ((x) << 9))
-#define CMD1(x, x1)     ((0x40000000) | ((x) << 9) | 0x100 | (x1))
-#define CMD2(x, x1, x2) ((0x80000000) | ((x) << 18) | 0x20000 |\
-                         ((x1) << 9) | 0x100 | (x2))
-
-static uint32_t lcd_panel_reset[] = {
-        CMD0(0x1), /* reset */
-        CMD0(0x0), /* nop */
-        CMD0(0x0), /* nop */
-        CMD0(0x0), /* nop */
-};
-
-static uint32_t lcd_panel_on[] = {
-        CMD0(0x29),             /* Display ON */
-        CMD2(0xB8, 0xFF, 0xF9), /* Output Control */
-        CMD0(0x11),             /* Sleep out */
-        CMD1(0xB0, 0x16),       /* Wake */
-};
-
-static uint32_t lcd_panel_off[] = {
-        CMD0(0x28),             /* Display OFF */
-        CMD2(0xB8, 0x80, 0x02), /* Output Control */
-        CMD0(0x10),             /* Sleep in */
-        CMD1(0xB0, 0x00),       /* Deep stand by in */
-};
-
-static uint32_t lcd_vga_pass_through[] = {
-        CMD1(0xB0, 0x16),
-        CMD1(0xBC, 0x80),
-        CMD1(0xE1, 0x00),
-        CMD1(0x36, 0x50),
-        CMD1(0x3B, 0x00),
-};
-
-static uint32_t lcd_qvga_pass_through[] = {
-        CMD1(0xB0, 0x16),
-        CMD1(0xBC, 0x81),
-        CMD1(0xE1, 0x00),
-        CMD1(0x36, 0x50),
-        CMD1(0x3B, 0x22),
-};
-
-static uint32_t lcd_vga_transfer[] = {
-        CMD1(0xcf, 0x02),       /* Blanking period control (1) */
-        CMD2(0xd0, 0x08, 0x04), /* Blanking period control (2) */
-        CMD1(0xd1, 0x01),       /* CKV timing control on/off */
-        CMD2(0xd2, 0x14, 0x00), /* CKV 1,2 timing control */
-        CMD2(0xd3, 0x1a, 0x0f), /* OEV timing control */
-        CMD2(0xd4, 0x1f, 0xaf), /* ASW timing control (1) */
-        CMD1(0xd5, 0x14),       /* ASW timing control (2) */
-        CMD0(0x21),             /* Invert for normally black display */
-        CMD0(0x29),             /* Display on */
-};
-
-static uint32_t lcd_qvga_transfer[] = {
-        CMD1(0xd6, 0x02),       /* Blanking period control (1) */
-        CMD2(0xd7, 0x08, 0x04), /* Blanking period control (2) */
-        CMD1(0xd8, 0x01),       /* CKV timing control on/off */
-        CMD2(0xd9, 0x00, 0x08), /* CKV 1,2 timing control */
-        CMD2(0xde, 0x05, 0x0a), /* OEV timing control */
-        CMD2(0xdf, 0x0a, 0x19), /* ASW timing control (1) */
-        CMD1(0xe0, 0x0a),       /* ASW timing control (2) */
-        CMD0(0x21),             /* Invert for normally black display */
-        CMD0(0x29),             /* Display on */
-};
-
-static uint32_t lcd_panel_config[] = {
-        CMD2(0xb8, 0xff, 0xf9), /* Output control */
-        CMD0(0x11),             /* sleep out */
-        CMD1(0xba, 0x01),       /* Display mode (1) */
-        CMD1(0xbb, 0x00),       /* Display mode (2) */
-        CMD1(0x3a, 0x60),       /* Display mode 18-bit RGB */
-        CMD1(0xbf, 0x10),       /* Drive system change control */
-        CMD1(0xb1, 0x56),       /* Booster operation setup */
-        CMD1(0xb2, 0x33),       /* Booster mode setup */
-        CMD1(0xb3, 0x11),       /* Booster frequency setup */
-        CMD1(0xb4, 0x02),       /* Op amp/system clock */
-        CMD1(0xb5, 0x35),       /* VCS voltage */
-        CMD1(0xb6, 0x40),       /* VCOM voltage */
-        CMD1(0xb7, 0x03),       /* External display signal */
-        CMD1(0xbd, 0x00),       /* ASW slew rate */
-        CMD1(0xbe, 0x00),       /* Dummy data for QuadData operation */
-        CMD1(0xc0, 0x11),       /* Sleep out FR count (A) */
-        CMD1(0xc1, 0x11),       /* Sleep out FR count (B) */
-        CMD1(0xc2, 0x11),       /* Sleep out FR count (C) */
-        CMD2(0xc3, 0x20, 0x40), /* Sleep out FR count (D) */
-        CMD2(0xc4, 0x60, 0xc0), /* Sleep out FR count (E) */
-        CMD2(0xc5, 0x10, 0x20), /* Sleep out FR count (F) */
-        CMD1(0xc6, 0xc0),       /* Sleep out FR count (G) */
-        CMD2(0xc7, 0x33, 0x43), /* Gamma 1 fine tuning (1) */
-        CMD1(0xc8, 0x44),       /* Gamma 1 fine tuning (2) */
-        CMD1(0xc9, 0x33),       /* Gamma 1 inclination adjustment */
-        CMD1(0xca, 0x00),       /* Gamma 1 blue offset adjustment */
-        CMD2(0xec, 0x01, 0xf0), /* Horizontal clock cycles */
-};
-
-static void ssp_reconfig(struct ssp_dev *dev, int nparam)
-{
-        static int last_nparam = -1;
-
-        /* check if it is necessary to re-config SSP */
-        if (nparam == last_nparam)
-                return;
-
-        ssp_disable(dev);
-        ssp_config(dev, (nparam == 2) ? 0x0010058a : 0x00100581, 0x18, 0, 0);
-
-        last_nparam = nparam;
-}
-
-static void ssp_send_cmd(uint32_t *cmd, int num)
-{
-        static int ssp_initialized;
-        static struct ssp_dev ssp2;
-
-        int i;
-
-        if (!ssp_initialized) {
-                ssp_init(&ssp2, 2, SSP_NO_IRQ);
-                ssp_initialized = 1;
-        }
-
-        clk_enable(ssp2.ssp->clk);
-        for (i = 0; i < num; i++, cmd++) {
-                ssp_reconfig(&ssp2, (*cmd >> 30) & 0x3);
-                ssp_write_word(&ssp2, *cmd & 0x3fffffff);
-
-                /* FIXME: ssp_flush() is mandatory here to work */
-                ssp_flush(&ssp2);
-        }
-        clk_disable(ssp2.ssp->clk);
-}
-
-static void littleton_lcd_power(int on, struct fb_var_screeninfo *var)
-{
-        if (on) {
-                ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_on));
-                ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_reset));
-                if (var->xres > 240) {
-                        /* VGA */
-                        ssp_send_cmd(ARRAY_AND_SIZE(lcd_vga_pass_through));
-                        ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_config));
-                        ssp_send_cmd(ARRAY_AND_SIZE(lcd_vga_transfer));
-                } else {
-                        /* QVGA */
-                        ssp_send_cmd(ARRAY_AND_SIZE(lcd_qvga_pass_through));
-                        ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_config));
-                        ssp_send_cmd(ARRAY_AND_SIZE(lcd_qvga_transfer));
-                }
-        } else
-                ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_off));
-}
-
 static struct pxafb_mode_info tpo_tdo24mtea1_modes[] = {
         [0] = {
                 /* VGA */
@@ -312,7 +160,6 @@ static struct pxafb_mach_info littleton_lcd_info = {
         .modes                  = tpo_tdo24mtea1_modes,
         .num_modes              = 2,
         .lcd_conn               = LCD_COLOR_TFT_16BPP,
-        .pxafb_lcd_power        = littleton_lcd_power,
 };
 
 static void littleton_init_lcd(void)
@@ -323,6 +170,51 @@ static void littleton_init_lcd(void)
 static inline void littleton_init_lcd(void) {};
 #endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */
 
+#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE)
+static struct pxa2xx_spi_master littleton_spi_info = {
+        .num_chipselect         = 1,
+};
+
+static void littleton_tdo24m_cs(u32 cmd)
+{
+        gpio_set_value(LITTLETON_GPIO_LCD_CS, !(cmd == PXA2XX_CS_ASSERT));
+}
+
+static struct pxa2xx_spi_chip littleton_tdo24m_chip = {
+        .rx_threshold   = 1,
+        .tx_threshold   = 1,
+        .cs_control     = littleton_tdo24m_cs,
+};
+
+static struct spi_board_info littleton_spi_devices[] __initdata = {
+        {
+                .modalias       = "tdo24m",
+                .max_speed_hz   = 1000000,
+                .bus_num        = 2,
+                .chip_select    = 0,
+                .controller_data= &littleton_tdo24m_chip,
+        },
+};
+
+static void __init littleton_init_spi(void)
+{
+        int err;
+
+        err = gpio_request(LITTLETON_GPIO_LCD_CS, "LCD_CS");
+        if (err) {
+                pr_warning("failed to request GPIO for LCS CS\n");
+                return;
+        }
+
+        gpio_direction_output(LITTLETON_GPIO_LCD_CS, 1);
+
+        pxa2xx_set_spi_info(2, &littleton_spi_info);
+        spi_register_board_info(ARRAY_AND_SIZE(littleton_spi_devices));
+}
+#else
+static inline void littleton_init_spi(void) {}
+#endif
+
 #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
 static unsigned int littleton_matrix_key_map[] = {
         /* KEY(row, col, key_code) */
@@ -433,6 +325,7 @@ static void __init littleton_init(void)
          */
         platform_device_register(&smc91x_device);
 
+        littleton_init_spi();
         littleton_init_lcd();
         littleton_init_keypad();
         littleton_init_nand();
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index b7038948d1d4..de3f67daaacf 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -40,7 +40,7 @@
 
 #include <mach/pxa-regs.h>
 #include <mach/pxa2xx-regs.h>
-#include <mach/pxa2xx-gpio.h>
+#include <mach/mfp-pxa27x.h>
 #include <mach/lpd270.h>
 #include <mach/audio.h>
 #include <mach/pxafb.h>
@@ -51,6 +51,43 @@
 #include "generic.h"
 #include "devices.h"
 
+static unsigned long lpd270_pin_config[] __initdata = {
+        /* Chip Selects */
+        GPIO15_nCS_1,   /* Mainboard Flash */
+        GPIO78_nCS_2,   /* CPLD + Ethernet */
+
+        /* LCD - 16bpp Active TFT */
+        GPIO58_LCD_LDD_0,
+        GPIO59_LCD_LDD_1,
+        GPIO60_LCD_LDD_2,
+        GPIO61_LCD_LDD_3,
+        GPIO62_LCD_LDD_4,
+        GPIO63_LCD_LDD_5,
+        GPIO64_LCD_LDD_6,
+        GPIO65_LCD_LDD_7,
+        GPIO66_LCD_LDD_8,
+        GPIO67_LCD_LDD_9,
+        GPIO68_LCD_LDD_10,
+        GPIO69_LCD_LDD_11,
+        GPIO70_LCD_LDD_12,
+        GPIO71_LCD_LDD_13,
+        GPIO72_LCD_LDD_14,
+        GPIO73_LCD_LDD_15,
+        GPIO74_LCD_FCLK,
+        GPIO75_LCD_LCLK,
+        GPIO76_LCD_PCLK,
+        GPIO77_LCD_BIAS,
+        GPIO16_PWM0_OUT,        /* Backlight */
+
+        /* USB Host */
+        GPIO88_USBH1_PWR,
+        GPIO89_USBH1_PEN,
+
+        /* AC97 */
+        GPIO45_AC97_SYSCLK,
+
+        GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
+};
 
 static unsigned int lpd270_irq_enabled;
 
@@ -88,8 +125,7 @@ static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
                 GEDR(0) = GPIO_bit(0);  /* clear useless edge notification */
                 if (likely(pending)) {
                         irq = LPD270_IRQ(0) + __ffs(pending);
-                        desc = irq_desc + irq;
-                        desc_handle_irq(irq, desc);
+                        generic_handle_irq(irq);
 
                         pending = __raw_readw(LPD270_INT_STATUS) &
                                                 lpd270_irq_enabled;
@@ -265,8 +301,8 @@ static struct pxafb_mode_info sharp_lq057q3dc02_mode = {
 static struct pxafb_mach_info sharp_lq057q3dc02 = {
         .modes                  = &sharp_lq057q3dc02_mode,
         .num_modes              = 1,
-        .lccr0                  = 0x07800080,
-        .lccr3                  = 0x00400000,
+        .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
+                                  LCD_ALTERNATE_MAPPING,
 };
 
 /* 12.1" TFT SVGA (LoLo display number 2) */
@@ -287,8 +323,8 @@ static struct pxafb_mode_info sharp_lq121s1dg31_mode = {
 static struct pxafb_mach_info sharp_lq121s1dg31 = {
         .modes                  = &sharp_lq121s1dg31_mode,
         .num_modes              = 1,
-        .lccr0                  = 0x07800080,
-        .lccr3                  = 0x00400000,
+        .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
+                                  LCD_ALTERNATE_MAPPING,
 };
 
 /* 3.6" TFT QVGA (LoLo display number 3) */
@@ -309,8 +345,8 @@ static struct pxafb_mode_info sharp_lq036q1da01_mode = {
 static struct pxafb_mach_info sharp_lq036q1da01 = {
         .modes                  = &sharp_lq036q1da01_mode,
         .num_modes              = 1,
-        .lccr0                  = 0x07800080,
-        .lccr3                  = 0x00400000,
+        .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
+                                  LCD_ALTERNATE_MAPPING,
 };
 
 /* 6.4" TFT VGA (LoLo display number 5) */
@@ -331,8 +367,8 @@ static struct pxafb_mode_info sharp_lq64d343_mode = {
 static struct pxafb_mach_info sharp_lq64d343 = {
         .modes                  = &sharp_lq64d343_mode,
         .num_modes              = 1,
-        .lccr0                  = 0x07800080,
-        .lccr3                  = 0x00400000,
+        .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
+                                  LCD_ALTERNATE_MAPPING,
 };
 
 /* 10.4" TFT VGA (LoLo display number 7) */
@@ -353,8 +389,8 @@ static struct pxafb_mode_info sharp_lq10d368_mode = {
 static struct pxafb_mach_info sharp_lq10d368 = {
         .modes                  = &sharp_lq10d368_mode,
         .num_modes              = 1,
-        .lccr0                  = 0x07800080,
-        .lccr3                  = 0x00400000,
+        .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
+                                  LCD_ALTERNATE_MAPPING,
 };
 
 /* 3.5" TFT QVGA (LoLo display number 8) */
@@ -375,8 +411,8 @@ static struct pxafb_mode_info sharp_lq035q7db02_20_mode = {
 static struct pxafb_mach_info sharp_lq035q7db02_20 = {
         .modes                  = &sharp_lq035q7db02_20_mode,
         .num_modes              = 1,
-        .lccr0                  = 0x07800080,
-        .lccr3                  = 0x00400000,
+        .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
+                                  LCD_ALTERNATE_MAPPING,
 };
 
 static struct pxafb_mach_info *lpd270_lcd_to_use;
@@ -411,27 +447,15 @@ static struct platform_device *platform_devices[] __initdata = {
         &lpd270_flash_device[1],
 };
 
-static int lpd270_ohci_init(struct device *dev)
-{
-        /* setup Port1 GPIO pin. */
-        pxa_gpio_mode(88 | GPIO_ALT_FN_1_IN);   /* USBHPWR1 */
-        pxa_gpio_mode(89 | GPIO_ALT_FN_2_OUT);  /* USBHPEN1 */
-
-        /* Set the Power Control Polarity Low and Power Sense
-           Polarity Low to active low. */
-        UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
-                ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
-
-        return 0;
-}
-
 static struct pxaohci_platform_data lpd270_ohci_platform_data = {
         .port_mode      = PMM_PERPORT_MODE,
-        .init           = lpd270_ohci_init,
+        .flags          = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
 };
 
 static void __init lpd270_init(void)
 {
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(lpd270_pin_config));
+
         lpd270_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
         lpd270_flash_data[1].width = 4;
 
@@ -442,12 +466,6 @@ static void __init lpd270_init(void)
          */
         ARB_CNTRL = ARB_CORE_PARK | 0x234;
 
-        /*
-         * On LogicPD PXA270, we route AC97_SYSCLK via GPIO45.
-         */
-        pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD);
-        pxa_gpio_mode(GPIO16_PWM0_MD);
-
         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 
         pxa_set_ac97_info(NULL);
@@ -473,15 +491,6 @@ static void __init lpd270_map_io(void)
         pxa_map_io();
         iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc));
 
-        /* initialize sleep mode regs (wake-up sources, etc) */
-        PGSR0 = 0x00008800;
-        PGSR1 = 0x00000002;
-        PGSR2 = 0x0001FC00;
-        PGSR3 = 0x00001F81;
-        PWER  = 0xC0000002;
-        PRER  = 0x00000002;
-        PFER  = 0x00000002;
-
         /* for use I SRAM as framebuffer.  */
         PSLR |= 0x00000F04;
         PCFR  = 0x00000066;
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 4ffdff2d9ff1..bff704354c1a 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -57,13 +57,36 @@
 
 static unsigned long lubbock_pin_config[] __initdata = {
         GPIO15_nCS_1,   /* CS1 - Flash */
+        GPIO78_nCS_2,   /* CS2 - Baseboard FGPA */
         GPIO79_nCS_3,   /* CS3 - SMC ethernet */
+        GPIO80_nCS_4,   /* CS4 - SA1111 */
 
         /* SSP data pins */
         GPIO23_SSP1_SCLK,
         GPIO25_SSP1_TXD,
         GPIO26_SSP1_RXD,
 
+        /* LCD - 16bpp DSTN */
+        GPIO58_LCD_LDD_0,
+        GPIO59_LCD_LDD_1,
+        GPIO60_LCD_LDD_2,
+        GPIO61_LCD_LDD_3,
+        GPIO62_LCD_LDD_4,
+        GPIO63_LCD_LDD_5,
+        GPIO64_LCD_LDD_6,
+        GPIO65_LCD_LDD_7,
+        GPIO66_LCD_LDD_8,
+        GPIO67_LCD_LDD_9,
+        GPIO68_LCD_LDD_10,
+        GPIO69_LCD_LDD_11,
+        GPIO70_LCD_LDD_12,
+        GPIO71_LCD_LDD_13,
+        GPIO72_LCD_LDD_14,
+        GPIO73_LCD_LDD_15,
+        GPIO74_LCD_FCLK,
+        GPIO75_LCD_LCLK,
+        GPIO76_LCD_PCLK,
+
         /* BTUART */
         GPIO42_BTUART_RXD,
         GPIO43_BTUART_TXD,
@@ -132,8 +155,7 @@ static void lubbock_irq_handler(unsigned int irq, struct irq_desc *desc)
                 GEDR(0) = GPIO_bit(0);  /* clear our parent irq */
                 if (likely(pending)) {
                         irq = LUBBOCK_IRQ(0) + __ffs(pending);
-                        desc = irq_desc + irq;
-                        desc_handle_irq(irq, desc);
+                        generic_handle_irq(irq);
                 }
                 pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled;
         } while (pending);
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index 143f28adaf95..519138bc5f85 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -409,7 +409,7 @@ static struct platform_device backlight = {
  * LEDs
  */
 
-struct gpio_led gpio_leds[] = {
+static struct gpio_led gpio_leds[] = {
         {
                 .name = "magician::vibra",
                 .default_trigger = "none",
@@ -669,18 +669,10 @@ static struct pxamci_platform_data magician_mci_info = {
  * USB OHCI
  */
 
-static int magician_ohci_init(struct device *dev)
-{
-        UHCHR = (UHCHR | UHCHR_SSEP2 | UHCHR_PCPL | UHCHR_CGR) &
-            ~(UHCHR_SSEP1 | UHCHR_SSEP3 | UHCHR_SSE);
-
-        return 0;
-}
-
 static struct pxaohci_platform_data magician_ohci_info = {
-        .port_mode    = PMM_PERPORT_MODE,
-        .init         = magician_ohci_init,
-        .power_budget = 0,
+        .port_mode      = PMM_PERPORT_MODE,
+        .flags          = ENABLE_PORT1 | ENABLE_PORT3 | POWER_CONTROL_LOW,
+        .power_budget   = 0,
 };
 
 
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index d44af761564d..f2c7ad8f2b6b 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -162,8 +162,7 @@ static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
                 GEDR(0) = GPIO_bit(0);  /* clear useless edge notification */
                 if (likely(pending)) {
                         irq = MAINSTONE_IRQ(0) + __ffs(pending);
-                        desc = irq_desc + irq;
-                        desc_handle_irq(irq, desc);
+                        generic_handle_irq(irq);
                 }
                 pending = MST_INTSETCLR & mainstone_irq_enabled;
         } while (pending);
@@ -508,19 +507,9 @@ static struct platform_device *platform_devices[] __initdata = {
         &mst_gpio_keys_device,
 };
 
-static int mainstone_ohci_init(struct device *dev)
-{
-        /* Set the Power Control Polarity Low and Power Sense
-           Polarity Low to active low. */
-        UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
-                ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
-
-        return 0;
-}
-
 static struct pxaohci_platform_data mainstone_ohci_platform_data = {
         .port_mode      = PMM_PERPORT_MODE,
-        .init           = mainstone_ohci_init,
+        .flags          = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
 };
 
 #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index 925575f10acf..2061c00c8ead 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -25,7 +25,12 @@
 
 #include "generic.h"
 
-#define PGSR(x)         __REG2(0x40F00020, ((x) & 0x60) >> 3)
+#define gpio_to_bank(gpio)      ((gpio) >> 5)
+
+#define PGSR(x)         __REG2(0x40F00020, (x) << 2)
+#define __GAFR(u, x)    __REG2((u) ? 0x40E00058 : 0x40E00054, (x) << 3)
+#define GAFR_L(x)       __GAFR(0, x)
+#define GAFR_U(x)       __GAFR(1, x)
 
 #define PWER_WE35       (1 << 24)
 
@@ -38,49 +43,59 @@ struct gpio_desc {
 };
 
 static struct gpio_desc gpio_desc[MFP_PIN_GPIO127 + 1];
+static int gpio_nr;
 
-static int __mfp_config_lpm(unsigned gpio, unsigned long lpm)
-{
-        unsigned mask = GPIO_bit(gpio);
-
-        /* low power state */
-        switch (lpm) {
-        case MFP_LPM_DRIVE_HIGH:
-                PGSR(gpio) |= mask;
-                break;
-        case MFP_LPM_DRIVE_LOW:
-                PGSR(gpio) &= ~mask;
-                break;
-        case MFP_LPM_INPUT:
-                break;
-        default:
-                pr_warning("%s: invalid low power state for GPIO%d\n",
-                                __func__, gpio);
-                return -EINVAL;
-        }
-        return 0;
-}
+static unsigned long gpdr_lpm[4];
 
 static int __mfp_config_gpio(unsigned gpio, unsigned long c)
 {
         unsigned long gafr, mask = GPIO_bit(gpio);
-        int fn;
+        int bank = gpio_to_bank(gpio);
+        int uorl = !!(gpio & 0x10); /* GAFRx_U or GAFRx_L ? */
+        int shft = (gpio & 0xf) << 1;
+        int fn = MFP_AF(c);
+        int dir = c & MFP_DIR_OUT;
 
-        fn = MFP_AF(c);
         if (fn > 3)
                 return -EINVAL;
 
-        /* alternate function and direction */
-        gafr = GAFR(gpio) & ~(0x3 << ((gpio & 0xf) * 2));
-        GAFR(gpio) = gafr |  (fn  << ((gpio & 0xf) * 2));
+        /* alternate function and direction at run-time */
+        gafr = (uorl == 0) ? GAFR_L(bank) : GAFR_U(bank);
+        gafr = (gafr & ~(0x3 << shft)) | (fn << shft);
 
-        if (c & MFP_DIR_OUT)
+        if (uorl == 0)
+                GAFR_L(bank) = gafr;
+        else
+                GAFR_U(bank) = gafr;
+
+        if (dir == MFP_DIR_OUT)
                 GPDR(gpio) |= mask;
         else
                 GPDR(gpio) &= ~mask;
 
-        if (__mfp_config_lpm(gpio, c & MFP_LPM_STATE_MASK))
-                return -EINVAL;
+        /* alternate function and direction at low power mode */
+        switch (c & MFP_LPM_STATE_MASK) {
+        case MFP_LPM_DRIVE_HIGH:
+                PGSR(bank) |= mask;
+                dir = MFP_DIR_OUT;
+                break;
+        case MFP_LPM_DRIVE_LOW:
+                PGSR(bank) &= ~mask;
+                dir = MFP_DIR_OUT;
+                break;
+        case MFP_LPM_DEFAULT:
+                break;
+        default:
+                /* warning and fall through, treat as MFP_LPM_DEFAULT */
+                pr_warning("%s: GPIO%d: unsupported low power mode\n",
+                                __func__, gpio);
+                break;
+        }
+
+        if (dir == MFP_DIR_OUT)
+                gpdr_lpm[bank] |= mask;
+        else
+                gpdr_lpm[bank] &= ~mask;
 
         /* give early warning if MFP_LPM_CAN_WAKEUP is set on the
          * configurations of those pins not able to wakeup
@@ -91,7 +106,7 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c)
                 return -EINVAL;
         }
 
-        if ((c & MFP_LPM_CAN_WAKEUP) && (c & MFP_DIR_OUT)) {
+        if ((c & MFP_LPM_CAN_WAKEUP) && (dir == MFP_DIR_OUT)) {
                 pr_warning("%s: output GPIO%d unable to wakeup\n",
                                 __func__, gpio);
                 return -EINVAL;
@@ -135,7 +150,7 @@ void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num)
 
 void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm)
 {
-        unsigned long flags;
+        unsigned long flags, c;
         int gpio;
 
         gpio = __mfp_validate(mfp);
@@ -143,7 +158,11 @@ void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm)
                 return;
 
         local_irq_save(flags);
-        __mfp_config_lpm(gpio, lpm);
+
+        c = gpio_desc[gpio].config;
+        c = (c & ~MFP_LPM_STATE_MASK) | lpm;
+        __mfp_config_gpio(gpio, c);
+
         local_irq_restore(flags);
 }
 
@@ -187,23 +206,22 @@ int gpio_set_wake(unsigned int gpio, unsigned int on)
 }
 
 #ifdef CONFIG_PXA25x
-static int __init pxa25x_mfp_init(void)
+static void __init pxa25x_mfp_init(void)
 {
         int i;
 
-        if (cpu_is_pxa25x()) {
-                for (i = 0; i <= 84; i++)
-                        gpio_desc[i].valid = 1;
+        for (i = 0; i <= 84; i++)
+                gpio_desc[i].valid = 1;
 
-                for (i = 0; i <= 15; i++) {
-                        gpio_desc[i].can_wakeup = 1;
-                        gpio_desc[i].mask = GPIO_bit(i);
-                }
+        for (i = 0; i <= 15; i++) {
+                gpio_desc[i].can_wakeup = 1;
+                gpio_desc[i].mask = GPIO_bit(i);
         }
 
-        return 0;
+        gpio_nr = 85;
 }
-postcore_initcall(pxa25x_mfp_init);
+#else
+static inline void pxa25x_mfp_init(void) {}
 #endif /* CONFIG_PXA25x */
 
 #ifdef CONFIG_PXA27x
@@ -233,45 +251,106 @@ int keypad_set_wake(unsigned int on)
         return 0;
 }
 
-static int __init pxa27x_mfp_init(void)
+static void __init pxa27x_mfp_init(void)
 {
         int i, gpio;
 
-        if (cpu_is_pxa27x()) {
-                for (i = 0; i <= 120; i++) {
-                        /* skip GPIO2, 5, 6, 7, 8, they are not
-                         * valid pins allow configuration
-                         */
-                        if (i == 2 || i == 5 || i == 6 ||
-                            i == 7 || i == 8)
-                                continue;
+        for (i = 0; i <= 120; i++) {
+                /* skip GPIO2, 5, 6, 7, 8, they are not
+                 * valid pins allow configuration
+                 */
+                if (i == 2 || i == 5 || i == 6 || i == 7 || i == 8)
+                        continue;
 
-                        gpio_desc[i].valid = 1;
-                }
+                gpio_desc[i].valid = 1;
+        }
 
-                /* Keypad GPIOs */
-                for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) {
-                        gpio = pxa27x_pkwr_gpio[i];
-                        gpio_desc[gpio].can_wakeup = 1;
-                        gpio_desc[gpio].keypad_gpio = 1;
-                        gpio_desc[gpio].mask = 1 << i;
-                }
+        /* Keypad GPIOs */
+        for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) {
+                gpio = pxa27x_pkwr_gpio[i];
+                gpio_desc[gpio].can_wakeup = 1;
+                gpio_desc[gpio].keypad_gpio = 1;
+                gpio_desc[gpio].mask = 1 << i;
+        }
 
-                /* Overwrite GPIO13 as a PWER wakeup source */
-                for (i = 0; i <= 15; i++) {
-                        /* skip GPIO2, 5, 6, 7, 8 */
-                        if (GPIO_bit(i) & 0x1e4)
-                                continue;
+        /* Overwrite GPIO13 as a PWER wakeup source */
+        for (i = 0; i <= 15; i++) {
+                /* skip GPIO2, 5, 6, 7, 8 */
+                if (GPIO_bit(i) & 0x1e4)
+                        continue;
 
-                        gpio_desc[i].can_wakeup = 1;
-                        gpio_desc[i].mask = GPIO_bit(i);
-                }
+                gpio_desc[i].can_wakeup = 1;
+                gpio_desc[i].mask = GPIO_bit(i);
+        }
+
+        gpio_desc[35].can_wakeup = 1;
+        gpio_desc[35].mask = PWER_WE35;
+
+        gpio_nr = 121;
+}
+#else
+static inline void pxa27x_mfp_init(void) {}
+#endif /* CONFIG_PXA27x */
+
+#ifdef CONFIG_PM
+static unsigned long saved_gafr[2][4];
+static unsigned long saved_gpdr[4];
 
-                gpio_desc[35].can_wakeup = 1;
-                gpio_desc[35].mask = PWER_WE35;
+static int pxa2xx_mfp_suspend(struct sys_device *d, pm_message_t state)
+{
+        int i;
+
+        for (i = 0; i <= gpio_to_bank(gpio_nr); i++) {
+
+                saved_gafr[0][i] = GAFR_L(i);
+                saved_gafr[1][i] = GAFR_U(i);
+                saved_gpdr[i] = GPDR(i * 32);
+
+                GPDR(i * 32) = gpdr_lpm[i];
         }
+        return 0;
+}
 
+static int pxa2xx_mfp_resume(struct sys_device *d)
+{
+        int i;
+
+        for (i = 0; i <= gpio_to_bank(gpio_nr); i++) {
+                GAFR_L(i) = saved_gafr[0][i];
+                GAFR_U(i) = saved_gafr[1][i];
+                GPDR(i * 32) = saved_gpdr[i];
+        }
+        PSSR = PSSR_RDH | PSSR_PH;
         return 0;
 }
-postcore_initcall(pxa27x_mfp_init);
-#endif /* CONFIG_PXA27x */
+#else
+#define pxa2xx_mfp_suspend      NULL
+#define pxa2xx_mfp_resume       NULL
+#endif
+
+struct sysdev_class pxa2xx_mfp_sysclass = {
+        .name           = "mfp",
+        .suspend        = pxa2xx_mfp_suspend,
+        .resume         = pxa2xx_mfp_resume,
+};
+
+static int __init pxa2xx_mfp_init(void)
+{
+        int i;
+
+        if (!cpu_is_pxa2xx())
+                return 0;
+
+        if (cpu_is_pxa25x())
+                pxa25x_mfp_init();
+
+        if (cpu_is_pxa27x())
+                pxa27x_mfp_init();
+
+        /* initialize gafr_run[], pgsr_lpm[] from existing values */
+        for (i = 0; i <= gpio_to_bank(gpio_nr); i++)
+                gpdr_lpm[i] = GPDR(i * 32);
+
+        return sysdev_class_register(&pxa2xx_mfp_sysclass);
+}
+postcore_initcall(pxa2xx_mfp_init);
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
new file mode 100644
index 000000000000..0842c531ee4d
--- /dev/null
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -0,0 +1,905 @@
+/*
+ * Handles the Mitac Mio A701 Board
+ *
+ * Copyright (C) 2008 Robert Jarzmik
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/sysdev.h>
+#include <linux/input.h>
+#include <linux/delay.h>
+#include <linux/gpio_keys.h>
+#include <linux/pwm_backlight.h>
+#include <linux/rtc.h>
+#include <linux/leds.h>
+#include <linux/gpio.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/pda_power.h>
+#include <linux/power_supply.h>
+#include <linux/wm97xx.h>
+#include <linux/mtd/physmap.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <mach/mfp-pxa27x.h>
+#include <mach/pxa27x_keypad.h>
+#include <mach/pxafb.h>
+#include <mach/pxa2xx-regs.h>
+#include <mach/mmc.h>
+#include <mach/udc.h>
+#include <mach/pxa27x-udc.h>
+
+#include <mach/mioa701.h>
+
+#include "generic.h"
+#include "devices.h"
+
+static unsigned long mioa701_pin_config[] = {
+        /* Mio global */
+        MIO_CFG_OUT(GPIO9_CHARGE_nEN, AF0, DRIVE_LOW),
+        MIO_CFG_OUT(GPIO18_POWEROFF, AF0, DRIVE_LOW),
+        MFP_CFG_OUT(GPIO3, AF0, DRIVE_HIGH),
+        MFP_CFG_OUT(GPIO4, AF0, DRIVE_HIGH),
+
+        /* Backlight PWM 0 */
+        GPIO16_PWM0_OUT,
+
+        /* MMC */
+        GPIO32_MMC_CLK,
+        GPIO92_MMC_DAT_0,
+        GPIO109_MMC_DAT_1,
+        GPIO110_MMC_DAT_2,
+        GPIO111_MMC_DAT_3,
+        GPIO112_MMC_CMD,
+        MIO_CFG_IN(GPIO78_SDIO_RO, AF0),
+        MIO_CFG_IN(GPIO15_SDIO_INSERT, AF0),
+        MIO_CFG_OUT(GPIO91_SDIO_EN, AF0, DRIVE_LOW),
+
+        /* USB */
+        MIO_CFG_IN(GPIO13_USB_DETECT, AF0),
+        MIO_CFG_OUT(GPIO22_USB_ENABLE, AF0, DRIVE_LOW),
+
+        /* LCD */
+        GPIO58_LCD_LDD_0,
+        GPIO59_LCD_LDD_1,
+        GPIO60_LCD_LDD_2,
+        GPIO61_LCD_LDD_3,
+        GPIO62_LCD_LDD_4,
+        GPIO63_LCD_LDD_5,
+        GPIO64_LCD_LDD_6,
+        GPIO65_LCD_LDD_7,
+        GPIO66_LCD_LDD_8,
+        GPIO67_LCD_LDD_9,
+        GPIO68_LCD_LDD_10,
+        GPIO69_LCD_LDD_11,
+        GPIO70_LCD_LDD_12,
+        GPIO71_LCD_LDD_13,
+        GPIO72_LCD_LDD_14,
+        GPIO73_LCD_LDD_15,
+        GPIO74_LCD_FCLK,
+        GPIO75_LCD_LCLK,
+        GPIO76_LCD_PCLK,
+
+        /* Bluetooth */
+        GPIO44_BTUART_CTS,
+        GPIO42_BTUART_RXD,
+        GPIO45_BTUART_RTS,
+        GPIO43_BTUART_TXD,
+        MIO_CFG_OUT(GPIO83_BT_ON, AF0, DRIVE_LOW),
+
+        /* GPS */
+        MIO_CFG_OUT(GPIO23_GPS_UNKNOWN1, AF0, DRIVE_LOW),
+        MIO_CFG_OUT(GPIO26_GPS_ON, AF0, DRIVE_LOW),
+        MIO_CFG_OUT(GPIO27_GPS_RESET, AF0, DRIVE_LOW),
+        MIO_CFG_OUT(GPIO106_GPS_UNKNOWN2, AF0, DRIVE_LOW),
+        MIO_CFG_OUT(GPIO107_GPS_UNKNOWN3, AF0, DRIVE_LOW),
+        GPIO46_STUART_RXD,
+        GPIO47_STUART_TXD,
+
+        /* GSM */
+        MIO_CFG_OUT(GPIO24_GSM_MOD_RESET_CMD, AF0, DRIVE_LOW),
+        MIO_CFG_OUT(GPIO88_GSM_nMOD_ON_CMD, AF0, DRIVE_HIGH),
+        MIO_CFG_OUT(GPIO90_GSM_nMOD_OFF_CMD, AF0, DRIVE_HIGH),
+        MIO_CFG_OUT(GPIO114_GSM_nMOD_DTE_UART_STATE, AF0, DRIVE_HIGH),
+        MIO_CFG_IN(GPIO25_GSM_MOD_ON_STATE, AF0),
+        MIO_CFG_IN(GPIO113_GSM_EVENT, AF0) | WAKEUP_ON_EDGE_BOTH,
+        GPIO34_FFUART_RXD,
+        GPIO35_FFUART_CTS,
+        GPIO36_FFUART_DCD,
+        GPIO37_FFUART_DSR,
+        GPIO39_FFUART_TXD,
+        GPIO40_FFUART_DTR,
+        GPIO41_FFUART_RTS,
+
+        /* Sound */
+        GPIO89_AC97_SYSCLK,
+        MIO_CFG_IN(GPIO12_HPJACK_INSERT, AF0),
+
+        /* Leds */
+        MIO_CFG_OUT(GPIO10_LED_nCharging, AF0, DRIVE_HIGH),
+        MIO_CFG_OUT(GPIO97_LED_nBlue, AF0, DRIVE_HIGH),
+        MIO_CFG_OUT(GPIO98_LED_nOrange, AF0, DRIVE_HIGH),
+        MIO_CFG_OUT(GPIO82_LED_nVibra, AF0, DRIVE_HIGH),
+        MIO_CFG_OUT(GPIO115_LED_nKeyboard, AF0, DRIVE_HIGH),
+
+        /* Keyboard */
+        MIO_CFG_IN(GPIO0_KEY_POWER, AF0) | WAKEUP_ON_EDGE_BOTH,
+        MIO_CFG_IN(GPIO93_KEY_VOLUME_UP, AF0),
+        MIO_CFG_IN(GPIO94_KEY_VOLUME_DOWN, AF0),
+        GPIO100_KP_MKIN_0,
+        GPIO101_KP_MKIN_1,
+        GPIO102_KP_MKIN_2,
+        GPIO103_KP_MKOUT_0,
+        GPIO104_KP_MKOUT_1,
+        GPIO105_KP_MKOUT_2,
+
+        /* Unknown */
+        MFP_CFG_IN(GPIO14, AF0),
+        MFP_CFG_IN(GPIO20, AF0),
+        MFP_CFG_IN(GPIO21, AF0),
+        MFP_CFG_IN(GPIO33, AF0),
+        MFP_CFG_OUT(GPIO49, AF0, DRIVE_HIGH),
+        MFP_CFG_OUT(GPIO57, AF0, DRIVE_HIGH),
+        MFP_CFG_OUT(GPIO77, AF0, DRIVE_HIGH),
+        MFP_CFG_IN(GPIO80, AF0),
+        MFP_CFG_OUT(GPIO86, AF0, DRIVE_HIGH),
+        MFP_CFG_IN(GPIO96, AF0),
+        MFP_CFG_OUT(GPIO116, AF0, DRIVE_HIGH),
+};
+
+#define MIO_GPIO_IN(num, _desc) \
+        { .gpio = (num), .dir = 0, .desc = (_desc) }
+#define MIO_GPIO_OUT(num, _init, _desc) \
+        { .gpio = (num), .dir = 1, .init = (_init), .desc = (_desc) }
+struct gpio_ress {
+        unsigned gpio : 8;
+        unsigned dir : 1;
+        unsigned init : 1;
+        char *desc;
+};
+
+static int mio_gpio_request(struct gpio_ress *gpios, int size)
+{
+        int i, rc = 0;
+        int gpio;
+        int dir;
+
+        for (i = 0; (!rc) && (i < size); i++) {
+                gpio = gpios[i].gpio;
+                dir = gpios[i].dir;
+                rc = gpio_request(gpio, gpios[i].desc);
+                if (rc) {
+                        printk(KERN_ERR "Error requesting GPIO %d(%s) : %d\n",
+                               gpio, gpios[i].desc, rc);
+                        continue;
+                }
+                if (dir)
+                        gpio_direction_output(gpio, gpios[i].init);
+                else
+                        gpio_direction_input(gpio);
+        }
+        while ((rc) && (--i >= 0))
+                gpio_free(gpios[i].gpio);
+        return rc;
+}
+
+static void mio_gpio_free(struct gpio_ress *gpios, int size)
+{
+        int i;
+
+        for (i = 0; i < size; i++)
+                gpio_free(gpios[i].gpio);
+}
+
+/* LCD Screen and Backlight */
+static struct platform_pwm_backlight_data mioa701_backlight_data = {
+        .pwm_id         = 0,
+        .max_brightness = 100,
+        .dft_brightness = 50,
+        .pwm_period_ns  = 4000 * 1024,  /* Fl = 250kHz */
+};
+
+/*
+ * LTM0305A776C LCD panel timings
+ *
+ * see:
+ *  - the LTM0305A776C datasheet,
+ *  - and the PXA27x Programmers' manual
+ */
+static struct pxafb_mode_info mioa701_ltm0305a776c = {
+        .pixclock               = 220000,       /* CLK=4.545 MHz */
+        .xres                   = 240,
+        .yres                   = 320,
+        .bpp                    = 16,
+        .hsync_len              = 4,
+        .vsync_len              = 2,
+        .left_margin            = 6,
+        .right_margin           = 4,
+        .upper_margin           = 5,
+        .lower_margin           = 3,
+};
+
+static void mioa701_lcd_power(int on, struct fb_var_screeninfo *si)
+{
+        gpio_set_value(GPIO87_LCD_POWER, on);
+}
+
+static struct pxafb_mach_info mioa701_pxafb_info = {
+        .modes                  = &mioa701_ltm0305a776c,
+        .num_modes              = 1,
+        .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
+        .pxafb_lcd_power        = mioa701_lcd_power,
+};
+
+/*
+ * Keyboard configuration
+ */
+static unsigned int mioa701_matrix_keys[] = {
+        KEY(0, 0, KEY_UP),
+        KEY(0, 1, KEY_RIGHT),
+        KEY(0, 2, KEY_MEDIA),
+        KEY(1, 0, KEY_DOWN),
+        KEY(1, 1, KEY_ENTER),
+        KEY(1, 2, KEY_CONNECT), /* GPS key */
+        KEY(2, 0, KEY_LEFT),
+        KEY(2, 1, KEY_PHONE),   /* Phone Green key */
+        KEY(2, 2, KEY_CAMERA)   /* Camera key */
+};
+static struct pxa27x_keypad_platform_data mioa701_keypad_info = {
+        .matrix_key_rows = 3,
+        .matrix_key_cols = 3,
+        .matrix_key_map = mioa701_matrix_keys,
+        .matrix_key_map_size = ARRAY_SIZE(mioa701_matrix_keys),
+};
+
+/*
+ * GPIO Key Configuration
+ */
+#define MIO_KEY(key, _gpio, _desc, _wakeup) \
+        { .code = (key), .gpio = (_gpio), .active_low = 0, \
+        .desc = (_desc), .type = EV_KEY, .wakeup = (_wakeup) }
+static struct gpio_keys_button mioa701_button_table[] = {
+        MIO_KEY(KEY_EXIT, GPIO0_KEY_POWER, "Power button", 1),
+        MIO_KEY(KEY_VOLUMEUP, GPIO93_KEY_VOLUME_UP, "Volume up", 0),
+        MIO_KEY(KEY_VOLUMEDOWN, GPIO94_KEY_VOLUME_DOWN, "Volume down", 0),
+        MIO_KEY(KEY_HP, GPIO12_HPJACK_INSERT, "HP jack detect", 0)
+};
+
+static struct gpio_keys_platform_data mioa701_gpio_keys_data = {
+        .buttons  = mioa701_button_table,
+        .nbuttons = ARRAY_SIZE(mioa701_button_table),
+};
+
+/*
+ * Leds and vibrator
+ */
+#define ONE_LED(_gpio, _name) \
+{ .gpio = (_gpio), .name = (_name), .active_low = true }
+static struct gpio_led gpio_leds[] = {
+        ONE_LED(GPIO10_LED_nCharging, "mioa701:charging"),
+        ONE_LED(GPIO97_LED_nBlue, "mioa701:blue"),
+        ONE_LED(GPIO98_LED_nOrange, "mioa701:orange"),
+        ONE_LED(GPIO82_LED_nVibra, "mioa701:vibra"),
+        ONE_LED(GPIO115_LED_nKeyboard, "mioa701:keyboard")
+};
+
+static struct gpio_led_platform_data gpio_led_info = {
+        .leds = gpio_leds,
+        .num_leds = ARRAY_SIZE(gpio_leds),
+};
+
+/*
+ * GSM Sagem XS200 chip
+ *
+ * GSM handling was purged from kernel. For history, this is the way to go :
+ *   - init : GPIO24_GSM_MOD_RESET_CMD = 0, GPIO114_GSM_nMOD_DTE_UART_STATE = 1
+ *            GPIO88_GSM_nMOD_ON_CMD = 1, GPIO90_GSM_nMOD_OFF_CMD = 1
+ *   - reset : GPIO24_GSM_MOD_RESET_CMD = 1, msleep(100),
+ *             GPIO24_GSM_MOD_RESET_CMD = 0
+ *   - turn on  : GPIO88_GSM_nMOD_ON_CMD = 0, msleep(1000),
+ *                GPIO88_GSM_nMOD_ON_CMD = 1
+ *   - turn off : GPIO90_GSM_nMOD_OFF_CMD = 0, msleep(1000),
+ *                GPIO90_GSM_nMOD_OFF_CMD = 1
+ */
+static int is_gsm_on(void)
+{
+        int is_on;
+
+        is_on = !!gpio_get_value(GPIO25_GSM_MOD_ON_STATE);
+        return is_on;
+}
+
+irqreturn_t gsm_on_irq(int irq, void *p)
+{
+        printk(KERN_DEBUG "Mioa701: GSM status changed to %s\n",
+               is_gsm_on() ? "on" : "off");
+        return IRQ_HANDLED;
+}
+
+struct gpio_ress gsm_gpios[] = {
+        MIO_GPIO_IN(GPIO25_GSM_MOD_ON_STATE, "GSM state"),
+        MIO_GPIO_IN(GPIO113_GSM_EVENT, "GSM event"),
+};
+
+static int __init gsm_init(void)
+{
+        int rc;
+
+        rc = mio_gpio_request(ARRAY_AND_SIZE(gsm_gpios));
+        if (rc)
+                goto err_gpio;
+        rc = request_irq(gpio_to_irq(GPIO25_GSM_MOD_ON_STATE), gsm_on_irq,
+                         IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+                         "GSM XS200 Power Irq", NULL);
+        if (rc)
+                goto err_irq;
+
+        gpio_set_wake(GPIO113_GSM_EVENT, 1);
+        return 0;
+
+err_irq:
+        printk(KERN_ERR "Mioa701: Can't request GSM_ON irq\n");
+        mio_gpio_free(ARRAY_AND_SIZE(gsm_gpios));
+err_gpio:
+        printk(KERN_ERR "Mioa701: gsm not available\n");
+        return rc;
+}
+
+static void gsm_exit(void)
+{
+        free_irq(gpio_to_irq(GPIO25_GSM_MOD_ON_STATE), NULL);
+        mio_gpio_free(ARRAY_AND_SIZE(gsm_gpios));
+}
+
+/*
+ * Bluetooth BRF6150 chip
+ *
+ * BT handling was purged from kernel. For history, this is the way to go :
+ * - turn on  : GPIO83_BT_ON = 1
+ * - turn off : GPIO83_BT_ON = 0
+ */
+
+/*
+ * GPS Sirf Star III chip
+ *
+ * GPS handling was purged from kernel. For history, this is the way to go :
+ * - init : GPIO23_GPS_UNKNOWN1 = 1, GPIO26_GPS_ON = 0, GPIO27_GPS_RESET = 0
+ *          GPIO106_GPS_UNKNOWN2 = 0, GPIO107_GPS_UNKNOWN3 = 0
+ * - turn on  : GPIO27_GPS_RESET = 1, GPIO26_GPS_ON = 1
+ * - turn off : GPIO26_GPS_ON = 0, GPIO27_GPS_RESET = 0
+ */
+
+/*
+ * USB UDC
+ */
+static void udc_power_command(int cmd)
+{
+        switch (cmd) {
+        case PXA2XX_UDC_CMD_DISCONNECT:
+                gpio_set_value(GPIO22_USB_ENABLE, 0);
+                break;
+        case PXA2XX_UDC_CMD_CONNECT:
+                gpio_set_value(GPIO22_USB_ENABLE, 1);
+                break;
+        default:
+                printk(KERN_INFO "udc_control: unknown command (0x%x)!\n", cmd);
+                break;
+        }
+}
+
+static int is_usb_connected(void)
+{
+        return !!gpio_get_value(GPIO13_USB_DETECT);
+}
+
+static struct pxa2xx_udc_mach_info mioa701_udc_info = {
+        .udc_is_connected = is_usb_connected,
+        .udc_command      = udc_power_command,
+};
+
+struct gpio_ress udc_gpios[] = {
+        MIO_GPIO_OUT(GPIO22_USB_ENABLE, 0, "USB Vbus enable")
+};
+
+static int __init udc_init(void)
+{
+        pxa_set_udc_info(&mioa701_udc_info);
+        return mio_gpio_request(ARRAY_AND_SIZE(udc_gpios));
+}
+
+static void udc_exit(void)
+{
+        mio_gpio_free(ARRAY_AND_SIZE(udc_gpios));
+}
+
+/*
+ * SDIO/MMC Card controller
+ */
+static void mci_setpower(struct device *dev, unsigned int vdd)
+{
+        struct pxamci_platform_data *p_d = dev->platform_data;
+
+        if ((1 << vdd) & p_d->ocr_mask)
+                gpio_set_value(GPIO91_SDIO_EN, 1);      /* enable SDIO power */
+        else
+                gpio_set_value(GPIO91_SDIO_EN, 0);      /* disable SDIO power */
+}
+
+static int mci_get_ro(struct device *dev)
+{
+        return gpio_get_value(GPIO78_SDIO_RO);
+}
+
+struct gpio_ress mci_gpios[] = {
+        MIO_GPIO_IN(GPIO78_SDIO_RO,     "SDIO readonly detect"),
+        MIO_GPIO_IN(GPIO15_SDIO_INSERT, "SDIO insertion detect"),
+        MIO_GPIO_OUT(GPIO91_SDIO_EN, 0, "SDIO power enable")
+};
+
+static void mci_exit(struct device *dev, void *data)
+{
+        mio_gpio_free(ARRAY_AND_SIZE(mci_gpios));
+        free_irq(gpio_to_irq(GPIO15_SDIO_INSERT), data);
+}
+
+static struct pxamci_platform_data mioa701_mci_info;
+
+/**
+ * The card detect interrupt isn't debounced so we delay it by 250ms
+ * to give the card a chance to fully insert/eject.
+ */
+static int mci_init(struct device *dev, irq_handler_t detect_int, void *data)
+{
+        int rc;
+        int irq = gpio_to_irq(GPIO15_SDIO_INSERT);
+
+        rc = mio_gpio_request(ARRAY_AND_SIZE(mci_gpios));
+        if (rc)
+                goto err_gpio;
+        /* enable RE/FE interrupt on card insertion and removal */
+        rc = request_irq(irq, detect_int,
+                         IRQF_DISABLED | IRQF_TRIGGER_RISING |
+                         IRQF_TRIGGER_FALLING,
+                         "MMC card detect", data);
+        if (rc)
+                goto err_irq;
+
+        mioa701_mci_info.detect_delay = msecs_to_jiffies(250);
+        return 0;
+
+err_irq:
+        dev_err(dev, "mioa701_mci_init: MMC/SD:"
+                " can't request MMC card detect IRQ\n");
+        mio_gpio_free(ARRAY_AND_SIZE(mci_gpios));
+err_gpio:
+        return rc;
+}
+
+static struct pxamci_platform_data mioa701_mci_info = {
+        .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
+        .init     = mci_init,
+        .get_ro   = mci_get_ro,
+        .setpower = mci_setpower,
+        .exit     = mci_exit,
+};
+
+/* FlashRAM */
+static struct resource strataflash_resource = {
+        .start = PXA_CS0_PHYS,
+        .end   = PXA_CS0_PHYS + SZ_64M - 1,
+        .flags = IORESOURCE_MEM,
+};
+
+static struct physmap_flash_data strataflash_data = {
+        .width = 2,
+        /* .set_vpp = mioa701_set_vpp, */
+};
+
+static struct platform_device strataflash = {
+        .name          = "physmap-flash",
+        .id            = -1,
+        .resource      = &strataflash_resource,
+        .num_resources = 1,
+        .dev = {
+                .platform_data = &strataflash_data,
+        },
+};
+
+/*
+ * Suspend/Resume bootstrap management
+ *
+ * MIO A701 reboot sequence is highly ROM dependant. From the one dissassembled,
+ * this sequence is as follows :
+ *   - disables interrupts
+ *   - initialize SDRAM (self refresh RAM into active RAM)
+ *   - initialize GPIOs (depends on value at 0xa020b020)
+ *   - initialize coprossessors
+ *   - if edge detect on PWR_SCL(GPIO3), then proceed to cold start
+ *   - or if value at 0xa020b000 not equal to 0x0f0f0f0f, proceed to cold start
+ *   - else do a resume, ie. jump to addr 0xa0100000
+ */
+#define RESUME_ENABLE_ADDR      0xa020b000
+#define RESUME_ENABLE_VAL       0x0f0f0f0f
+#define RESUME_BT_ADDR          0xa020b020
+#define RESUME_UNKNOWN_ADDR     0xa020b024
+#define RESUME_VECTOR_ADDR      0xa0100000
+#define BOOTSTRAP_WORDS         mioa701_bootstrap_lg/4
+
+static u32 *save_buffer;
+
+static void install_bootstrap(void)
+{
+        int i;
+        u32 *rom_bootstrap  = phys_to_virt(RESUME_VECTOR_ADDR);
+        u32 *src = &mioa701_bootstrap;
+
+        for (i = 0; i < BOOTSTRAP_WORDS; i++)
+                rom_bootstrap[i] = src[i];
+}
+
+
+static int mioa701_sys_suspend(struct sys_device *sysdev, pm_message_t state)
+{
+        int i = 0, is_bt_on;
+        u32 *mem_resume_vector  = phys_to_virt(RESUME_VECTOR_ADDR);
+        u32 *mem_resume_enabler = phys_to_virt(RESUME_ENABLE_ADDR);
+        u32 *mem_resume_bt      = phys_to_virt(RESUME_BT_ADDR);
+        u32 *mem_resume_unknown = phys_to_virt(RESUME_UNKNOWN_ADDR);
+
+        /* Devices prepare suspend */
+        is_bt_on = gpio_get_value(GPIO83_BT_ON);
+        pxa2xx_mfp_set_lpm(GPIO83_BT_ON,
+                           is_bt_on ? MFP_LPM_DRIVE_HIGH : MFP_LPM_DRIVE_LOW);
+
+        for (i = 0; i < BOOTSTRAP_WORDS; i++)
+                save_buffer[i] = mem_resume_vector[i];
+        save_buffer[i++] = *mem_resume_enabler;
+        save_buffer[i++] = *mem_resume_bt;
+        save_buffer[i++] = *mem_resume_unknown;
+
+        *mem_resume_enabler = RESUME_ENABLE_VAL;
+        *mem_resume_bt      = is_bt_on;
+
+        install_bootstrap();
+        return 0;
+}
+
+static int mioa701_sys_resume(struct sys_device *sysdev)
+{
+        int i = 0;
+        u32 *mem_resume_vector  = phys_to_virt(RESUME_VECTOR_ADDR);
+        u32 *mem_resume_enabler = phys_to_virt(RESUME_ENABLE_ADDR);
+        u32 *mem_resume_bt      = phys_to_virt(RESUME_BT_ADDR);
+        u32 *mem_resume_unknown = phys_to_virt(RESUME_UNKNOWN_ADDR);
+
+        for (i = 0; i < BOOTSTRAP_WORDS; i++)
+                mem_resume_vector[i] = save_buffer[i];
+        *mem_resume_enabler = save_buffer[i++];
+        *mem_resume_bt      = save_buffer[i++];
+        *mem_resume_unknown = save_buffer[i++];
+
+        return 0;
+}
+
+static struct sysdev_class mioa701_sysclass = {
+        .name = "mioa701",
+};
+
+static struct sys_device sysdev_bootstrap = {
+        .cls            = &mioa701_sysclass,
+};
+
+static struct sysdev_driver driver_bootstrap = {
+        .suspend        = &mioa701_sys_suspend,
+        .resume         = &mioa701_sys_resume,
+};
+
+static int __init bootstrap_init(void)
+{
+        int rc;
+        int save_size = mioa701_bootstrap_lg + (sizeof(u32) * 3);
+
+        rc = sysdev_class_register(&mioa701_sysclass);
+        if (rc) {
+                printk(KERN_ERR "Failed registering mioa701 sys class\n");
+                return -ENODEV;
+        }
+        rc = sysdev_register(&sysdev_bootstrap);
+        if (rc) {
+                printk(KERN_ERR "Failed registering mioa701 sys device\n");
+                return -ENODEV;
+        }
+        rc = sysdev_driver_register(&mioa701_sysclass, &driver_bootstrap);
+        if (rc) {
+                printk(KERN_ERR "Failed registering PMU sys driver\n");
+                return -ENODEV;
+        }
+
+        save_buffer = kmalloc(save_size, GFP_KERNEL);
+        if (!save_buffer)
+                return -ENOMEM;
+        printk(KERN_INFO "MioA701: allocated %d bytes for bootstrap\n",
+               save_size);
+        return 0;
+}
+
+static void bootstrap_exit(void)
+{
+        kfree(save_buffer);
+        sysdev_driver_unregister(&mioa701_sysclass, &driver_bootstrap);
+        sysdev_unregister(&sysdev_bootstrap);
+        sysdev_class_unregister(&mioa701_sysclass);
+
+        printk(KERN_CRIT "Unregistering mioa701 suspend will hang next"
+               "resume !!!\n");
+}
+
+/*
+ * Power Supply
+ */
+static char *supplicants[] = {
+        "mioa701_battery"
+};
+
+static void mioa701_set_charge(int flags)
+{
+        gpio_set_value(GPIO9_CHARGE_nEN, !flags);
+}
+
+static struct pda_power_pdata power_pdata = {
+        .is_ac_online   = is_usb_connected,
+        .set_charge = mioa701_set_charge,
+        .supplied_to = supplicants,
+        .num_supplicants = ARRAY_SIZE(supplicants),
+};
+
+static struct resource power_resources[] = {
+        [0] = {
+                .name   = "ac",
+                .start  = gpio_to_irq(GPIO13_USB_DETECT),
+                .end    = gpio_to_irq(GPIO13_USB_DETECT),
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
+                IORESOURCE_IRQ_LOWEDGE,
+        },
+};
+
+static struct platform_device power_dev = {
+        .name           = "pda-power",
+        .id             = -1,
+        .resource       = power_resources,
+        .num_resources  = ARRAY_SIZE(power_resources),
+        .dev = {
+                .platform_data  = &power_pdata,
+        },
+};
+
+#if defined(CONFIG_PDA_POWER) && defined(CONFIG_TOUCHSCREEN_WM97XX)
+static struct wm97xx *battery_wm;
+
+static enum power_supply_property battery_props[] = {
+        POWER_SUPPLY_PROP_STATUS,
+        POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN,
+        POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
+        POWER_SUPPLY_PROP_VOLTAGE_NOW,
+        POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,   /* Necessary for apm */
+};
+
+static int get_battery_voltage(void)
+{
+        int adc = -1;
+
+        if (battery_wm)
+                adc = wm97xx_read_aux_adc(battery_wm, WM97XX_AUX_ID1);
+        return adc;
+}
+
+static int get_battery_status(struct power_supply *b)
+{
+        int status;
+
+        if (is_usb_connected())
+                status = POWER_SUPPLY_STATUS_CHARGING;
+        else
+                status = POWER_SUPPLY_STATUS_DISCHARGING;
+
+        return status;
+}
+
+static int get_property(struct power_supply *b,
+                        enum power_supply_property psp,
+                        union power_supply_propval *val)
+{
+        int rc = 0;
+
+        switch (psp) {
+        case POWER_SUPPLY_PROP_STATUS:
+                val->intval = get_battery_status(b);
+                break;
+        case POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN:
+                val->intval = 0xfd0;
+                break;
+        case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
+                val->intval = 0xc00;
+                break;
+        case POWER_SUPPLY_PROP_VOLTAGE_NOW:
+                val->intval = get_battery_voltage();
+                break;
+        case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
+                val->intval = 100;
+                break;
+        default:
+                val->intval = -1;
+                rc = -1;
+        }
+
+        return rc;
+};
+
+static struct power_supply battery_ps = {
+        .name = "mioa701_battery",
+        .type = POWER_SUPPLY_TYPE_BATTERY,
+        .get_property = get_property,
+        .properties = battery_props,
+        .num_properties = ARRAY_SIZE(battery_props),
+};
+
+static int battery_probe(struct platform_device *pdev)
+{
+        struct wm97xx *wm = platform_get_drvdata(pdev);
+        int rc;
+
+        battery_wm = wm;
+
+        rc = power_supply_register(NULL, &battery_ps);
+        if (rc)
+                dev_err(&pdev->dev,
+                "Could not register mioa701 battery -> %d\n", rc);
+        return rc;
+}
+
+static int battery_remove(struct platform_device *pdev)
+{
+        battery_wm = NULL;
+        return 0;
+}
+
+static struct platform_driver mioa701_battery_driver = {
+        .driver = {
+                .name = "wm97xx-battery",
+        },
+        .probe = battery_probe,
+        .remove = battery_remove
+};
+
+static int __init mioa701_battery_init(void)
+{
+        int rc;
+
+        rc = platform_driver_register(&mioa701_battery_driver);
+        if (rc)
+                printk(KERN_ERR "Could not register mioa701 battery driver\n");
+        return rc;
+}
+
+#else
+static int __init mioa701_battery_init(void)
+{
+        return 0;
+}
+#endif
+
+/*
+ * Mio global
+ */
+
+/* Devices */
+#define MIO_PARENT_DEV(var, strname, tparent, pdata)    \
+static struct platform_device var = {                   \
+        .name           = strname,                      \
+        .id             = -1,                           \
+        .dev            = {                             \
+                .platform_data = pdata,                 \
+                .parent = tparent,                      \
+        },                                              \
+};
+#define MIO_SIMPLE_DEV(var, strname, pdata)     \
+        MIO_PARENT_DEV(var, strname, NULL, pdata)
+
+MIO_SIMPLE_DEV(mioa701_gpio_keys, "gpio-keys",      &mioa701_gpio_keys_data)
+MIO_PARENT_DEV(mioa701_backlight, "pwm-backlight",  &pxa27x_device_pwm0.dev,
+                &mioa701_backlight_data);
+MIO_SIMPLE_DEV(mioa701_led,       "leds-gpio",      &gpio_led_info)
+MIO_SIMPLE_DEV(pxa2xx_pcm,        "pxa2xx-pcm",     NULL)
+MIO_SIMPLE_DEV(pxa2xx_ac97,       "pxa2xx-ac97",    NULL)
+MIO_PARENT_DEV(mio_wm9713_codec,  "wm9713-codec",   &pxa2xx_ac97.dev, NULL)
+MIO_SIMPLE_DEV(mioa701_sound,     "mioa701-wm9713", NULL)
+MIO_SIMPLE_DEV(mioa701_board,     "mioa701-board",  NULL)
+
+static struct platform_device *devices[] __initdata = {
+        &mioa701_gpio_keys,
+        &mioa701_backlight,
+        &mioa701_led,
+        &pxa2xx_pcm,
+        &pxa2xx_ac97,
+        &mio_wm9713_codec,
+        &mioa701_sound,
+        &power_dev,
+        &strataflash,
+        &mioa701_board
+};
+
+static void mioa701_machine_exit(void);
+
+static void mioa701_poweroff(void)
+{
+        mioa701_machine_exit();
+        gpio_set_value(GPIO18_POWEROFF, 1);
+}
+
+static void mioa701_restart(char c)
+{
+        mioa701_machine_exit();
+        arm_machine_restart(c);
+}
+
+struct gpio_ress global_gpios[] = {
+        MIO_GPIO_OUT(GPIO9_CHARGE_nEN, 1, "Charger enable"),
+        MIO_GPIO_OUT(GPIO18_POWEROFF, 0, "Power Off"),
+        MIO_GPIO_OUT(GPIO87_LCD_POWER, 0, "LCD Power")
+};
+
+static void __init mioa701_machine_init(void)
+{
+        PSLR  = 0xff100000; /* SYSDEL=125ms, PWRDEL=125ms, PSLR_SL_ROD=1 */
+        PCFR = PCFR_DC_EN | PCFR_GPR_EN | PCFR_OPDE;
+        RTTR = 32768 - 1; /* Reset crazy WinCE value */
+        UP2OCR = UP2OCR_HXOE;
+
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(mioa701_pin_config));
+        mio_gpio_request(ARRAY_AND_SIZE(global_gpios));
+        bootstrap_init();
+        set_pxa_fb_info(&mioa701_pxafb_info);
+        pxa_set_mci_info(&mioa701_mci_info);
+        pxa_set_keypad_info(&mioa701_keypad_info);
+        udc_init();
+        pm_power_off = mioa701_poweroff;
+        arm_pm_restart = mioa701_restart;
+        platform_add_devices(devices, ARRAY_SIZE(devices));
+        gsm_init();
+        mioa701_battery_init();
+}
+
+static void mioa701_machine_exit(void)
+{
+        udc_exit();
+        bootstrap_exit();
+        gsm_exit();
+}
+
+MACHINE_START(MIOA701, "MIO A701")
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params    = 0xa0000100,
+        .map_io         = &pxa_map_io,
+        .init_irq       = &pxa27x_init_irq,
+        .init_machine   = mioa701_machine_init,
+        .timer          = &pxa_timer,
+MACHINE_END
diff --git a/arch/arm/mach-pxa/mioa701_bootresume.S b/arch/arm/mach-pxa/mioa701_bootresume.S
new file mode 100644
index 000000000000..a647693d9856
--- /dev/null
+++ b/arch/arm/mach-pxa/mioa701_bootresume.S
@@ -0,0 +1,36 @@
+/* Bootloader to resume MIO A701
+ *
+ * 2007-1-12 Robert Jarzmik
+ *
+ * This code is licenced under the GPLv2.
+*/
+
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+
+/*
+ * Note: Yes, part of the following code is located into the .data section.
+ *       This is to allow jumpaddr to be accessed with a relative load
+ *       while we can't rely on any MMU translation.  We could have put
+ *       sleep_save_sp in the .text section as well, but some setups might
+ *       insist on it to be truly read-only.
+ */
+        .data
+ENTRY(mioa701_bootstrap)
+0:
+        b       1f
+ENTRY(mioa701_jumpaddr)
+        .word   0x40f00008              @ PSPR in no-MMU mode
+1:
+        mov     r0,     #0xa0000000     @ Don't suppose memory access works
+        orr     r0, r0, #0x00200000     @ even if it's supposed to
+        mov     r1, #0
+        str     r1, [r0]                @ Early disable resume for next boot
+        ldr     r0, mioa701_jumpaddr    @ (Murphy's Law)
+        ldr     r0, [r0]
+        mov     pc, r0
+2:
+
+ENTRY(mioa701_bootstrap_lg)
+        .data
+        .word   2b-0b
diff --git a/arch/arm/mach-pxa/mp900.c b/arch/arm/mach-pxa/mp900.c
new file mode 100644
index 000000000000..8a73814126b1
--- /dev/null
+++ b/arch/arm/mach-pxa/mp900.c
@@ -0,0 +1,100 @@
+/*
+ *  linux/arch/arm/mach-pxa/mp900.c
+ *
+ *  Support for the NEC MobilePro900/C platform
+ *
+ *  Based on mach-pxa/gumstix.c
+ *
+ *  2007, 2008 Kristoffer Ericson <kristoffer.ericson@gmail.com>
+ *  2007, 2008 Michael Petchkovsky <mkpetch@internode.on.net>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/types.h>
+#include <linux/usb/isp116x.h>
+
+#include <mach/hardware.h>
+#include <mach/pxa-regs.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include "generic.h"
+
+static void isp116x_pfm_delay(struct device *dev, int delay)
+{
+
+        /* 400Mhz PXA2 = 2.5ns / instruction */
+
+        int cyc = delay / 10;
+
+        /* 4 Instructions = 4 x 2.5ns = 10ns */
+        __asm__ volatile ("0:\n"
+                "subs %0, %1, #1\n"
+                "bge 0b\n"
+                :"=r" (cyc)
+                :"0"(cyc)
+        );
+}
+
+static struct isp116x_platform_data isp116x_pfm_data = {
+        .remote_wakeup_enable = 1,
+        .delay = isp116x_pfm_delay,
+};
+
+static struct resource isp116x_pfm_resources[] = {
+        [0] =   {
+                .start  = 0x0d000000,
+                .end    = 0x0d000000 + 1,
+                .flags  = IORESOURCE_MEM,
+                },
+        [1] =   {
+                .start  = 0x0d000000 + 4,
+                .end    = 0x0d000000 + 5,
+                .flags  = IORESOURCE_MEM,
+                },
+        [2] =   {
+                .start  = 61,
+                .end    = 61,
+                .flags  = IORESOURCE_IRQ,
+                },
+};
+
+static struct platform_device mp900c_dummy_device = {
+        .name           = "mp900c_dummy",
+        .id             = -1,
+};
+
+static struct platform_device mp900c_usb = {
+        .name           = "isp116x-hcd",
+        .num_resources  = ARRAY_SIZE(isp116x_pfm_resources),
+        .resource       = isp116x_pfm_resources,
+        .dev.platform_data = &isp116x_pfm_data,
+};
+
+static struct platform_device *devices[] __initdata = {
+        &mp900c_dummy_device,
+        &mp900c_usb,
+};
+
+static void __init mp900c_init(void)
+{
+        printk(KERN_INFO "MobilePro 900/C machine init\n");
+        platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+
+/* Maintainer - Michael Petchkovsky <mkpetch@internode.on.net> */
+MACHINE_START(NEC_MP900, "MobilePro900/C")
+        .phys_io        = 0x40000000,
+        .boot_params    = 0xa0220100,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .timer          = &pxa_timer,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa25x_init_irq,
+        .init_machine   = mp900c_init,
+MACHINE_END
+
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index fe924a23debe..4447711c9fc6 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -25,6 +25,8 @@
 #include <linux/pda_power.h>
 #include <linux/pwm_backlight.h>
 #include <linux/gpio.h>
+#include <linux/wm97xx_batt.h>
+#include <linux/power_supply.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -340,6 +342,23 @@ static struct platform_device power_supply = {
 };
 
 /******************************************************************************
+ * WM97xx battery
+ ******************************************************************************/
+static struct wm97xx_batt_info wm97xx_batt_pdata = {
+        .batt_aux       = WM97XX_AUX_ID3,
+        .temp_aux       = WM97XX_AUX_ID2,
+        .charge_gpio    = -1,
+        .max_voltage    = PALMTX_BAT_MAX_VOLTAGE,
+        .min_voltage    = PALMTX_BAT_MIN_VOLTAGE,
+        .batt_mult      = 1000,
+        .batt_div       = 414,
+        .temp_mult      = 1,
+        .temp_div       = 1,
+        .batt_tech      = POWER_SUPPLY_TECHNOLOGY_LIPO,
+        .batt_name      = "main-batt",
+};
+
+/******************************************************************************
  * Framebuffer
  ******************************************************************************/
 static struct pxafb_mode_info palmtx_lcd_modes[] = {
@@ -401,6 +420,7 @@ static void __init palmtx_init(void)
         pxa_set_ac97_info(NULL);
         pxa_set_ficp_info(&palmtx_ficp_platform_data);
         pxa_set_keypad_info(&palmtx_keypad_platform_data);
+        wm97xx_bat_set_pdata(&wm97xx_batt_pdata);
 
         platform_add_devices(devices, ARRAY_SIZE(devices));
 }
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c
new file mode 100644
index 000000000000..2f730da3bba8
--- /dev/null
+++ b/arch/arm/mach-pxa/palmz72.c
@@ -0,0 +1,554 @@
+/*
+ * Hardware definitions for Palm Zire72
+ *
+ * Authors:
+ *      Vladimir "Farcaller" Pouzanov <farcaller@gmail.com>
+ *      Sergey Lapin <slapin@ossfans.org>
+ *      Alex Osborne <bobofdoom@gmail.com>
+ *      Jan Herman <2hp@seznam.cz>
+ *
+ * Rewrite for mainline:
+ *      Marek Vasut <marek.vasut@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * (find more info at www.hackndev.com)
+ *
+ */
+
+#include <linux/platform_device.h>
+#include <linux/sysdev.h>
+#include <linux/delay.h>
+#include <linux/irq.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+#include <linux/pda_power.h>
+#include <linux/pwm_backlight.h>
+#include <linux/gpio.h>
+#include <linux/power_supply.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <mach/audio.h>
+#include <mach/palmz72.h>
+#include <mach/mmc.h>
+#include <mach/pxafb.h>
+#include <mach/pxa-regs.h>
+#include <mach/pxa2xx-regs.h>
+#include <mach/mfp-pxa27x.h>
+#include <mach/irda.h>
+#include <mach/pxa27x_keypad.h>
+#include <mach/udc.h>
+#include <mach/pm.h>
+
+#include "generic.h"
+#include "devices.h"
+
+/******************************************************************************
+ * Pin configuration
+ ******************************************************************************/
+static unsigned long palmz72_pin_config[] __initdata = {
+        /* MMC */
+        GPIO32_MMC_CLK,
+        GPIO92_MMC_DAT_0,
+        GPIO109_MMC_DAT_1,
+        GPIO110_MMC_DAT_2,
+        GPIO111_MMC_DAT_3,
+        GPIO112_MMC_CMD,
+        GPIO14_GPIO,    /* SD detect */
+        GPIO115_GPIO,   /* SD RO */
+        GPIO98_GPIO,    /* SD power */
+
+        /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+
+        /* IrDA */
+        GPIO49_GPIO,    /* ir disable */
+        GPIO46_FICP_RXD,
+        GPIO47_FICP_TXD,
+
+        /* PWM */
+        GPIO16_PWM0_OUT,
+
+        /* USB */
+        GPIO15_GPIO,    /* usb detect */
+        GPIO12_GPIO,    /* usb pullup */
+        GPIO95_GPIO,    /* usb power */
+
+        /* Matrix keypad */
+        GPIO100_KP_MKIN_0       | WAKEUP_ON_LEVEL_HIGH,
+        GPIO101_KP_MKIN_1       | WAKEUP_ON_LEVEL_HIGH,
+        GPIO102_KP_MKIN_2       | WAKEUP_ON_LEVEL_HIGH,
+        GPIO97_KP_MKIN_3        | WAKEUP_ON_LEVEL_HIGH,
+        GPIO103_KP_MKOUT_0,
+        GPIO104_KP_MKOUT_1,
+        GPIO105_KP_MKOUT_2,
+
+        /* LCD */
+        GPIO58_LCD_LDD_0,
+        GPIO59_LCD_LDD_1,
+        GPIO60_LCD_LDD_2,
+        GPIO61_LCD_LDD_3,
+        GPIO62_LCD_LDD_4,
+        GPIO63_LCD_LDD_5,
+        GPIO64_LCD_LDD_6,
+        GPIO65_LCD_LDD_7,
+        GPIO66_LCD_LDD_8,
+        GPIO67_LCD_LDD_9,
+        GPIO68_LCD_LDD_10,
+        GPIO69_LCD_LDD_11,
+        GPIO70_LCD_LDD_12,
+        GPIO71_LCD_LDD_13,
+        GPIO72_LCD_LDD_14,
+        GPIO73_LCD_LDD_15,
+        GPIO74_LCD_FCLK,
+        GPIO75_LCD_LCLK,
+        GPIO76_LCD_PCLK,
+        GPIO77_LCD_BIAS,
+        GPIO20_GPIO,    /* bl power */
+        GPIO21_GPIO,    /* LCD border switch */
+        GPIO22_GPIO,    /* LCD border color */
+        GPIO96_GPIO,    /* lcd power */
+
+        /* Misc. */
+        GPIO0_GPIO      | WAKEUP_ON_LEVEL_HIGH, /* power detect */
+        GPIO88_GPIO,                            /* green led */
+        GPIO27_GPIO,                            /* WM9712 IRQ */
+};
+
+/******************************************************************************
+ * SD/MMC card controller
+ ******************************************************************************/
+static int palmz72_mci_init(struct device *dev,
+                                irq_handler_t palmz72_detect_int, void *data)
+{
+        int err = 0;
+
+        /* Setup an interrupt for detecting card insert/remove events */
+        err = gpio_request(GPIO_NR_PALMZ72_SD_DETECT_N, "SD IRQ");
+        if (err)
+                goto err;
+        err = gpio_direction_input(GPIO_NR_PALMZ72_SD_DETECT_N);
+        if (err)
+                goto err2;
+        err = request_irq(gpio_to_irq(GPIO_NR_PALMZ72_SD_DETECT_N),
+                        palmz72_detect_int, IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
+                        IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
+                        "SD/MMC card detect", data);
+        if (err) {
+                printk(KERN_ERR "%s: cannot request SD/MMC card detect IRQ\n",
+                                __func__);
+                goto err2;
+        }
+
+        /* SD_POWER is not actually power, but it is more like chip
+         * select, i.e. it is inverted */
+
+        err = gpio_request(GPIO_NR_PALMZ72_SD_POWER_N, "SD_POWER");
+        if (err)
+                goto err3;
+        err = gpio_direction_output(GPIO_NR_PALMZ72_SD_POWER_N, 0);
+        if (err)
+                goto err4;
+        err = gpio_request(GPIO_NR_PALMZ72_SD_RO, "SD_RO");
+        if (err)
+                goto err4;
+        err = gpio_direction_input(GPIO_NR_PALMZ72_SD_RO);
+        if (err)
+                goto err5;
+
+        printk(KERN_DEBUG "%s: irq registered\n", __func__);
+
+        return 0;
+
+err5:
+        gpio_free(GPIO_NR_PALMZ72_SD_RO);
+err4:
+        gpio_free(GPIO_NR_PALMZ72_SD_POWER_N);
+err3:
+        free_irq(gpio_to_irq(GPIO_NR_PALMZ72_SD_DETECT_N), data);
+err2:
+        gpio_free(GPIO_NR_PALMZ72_SD_DETECT_N);
+err:
+        return err;
+}
+
+static void palmz72_mci_exit(struct device *dev, void *data)
+{
+        gpio_free(GPIO_NR_PALMZ72_SD_POWER_N);
+        free_irq(gpio_to_irq(GPIO_NR_PALMZ72_SD_DETECT_N), data);
+        gpio_free(GPIO_NR_PALMZ72_SD_DETECT_N);
+        gpio_free(GPIO_NR_PALMZ72_SD_RO);
+}
+
+static void palmz72_mci_power(struct device *dev, unsigned int vdd)
+{
+        struct pxamci_platform_data *p_d = dev->platform_data;
+        if (p_d->ocr_mask & (1 << vdd))
+                gpio_set_value(GPIO_NR_PALMZ72_SD_POWER_N, 0);
+        else
+                gpio_set_value(GPIO_NR_PALMZ72_SD_POWER_N, 1);
+}
+
+static int palmz72_mci_ro(struct device *dev)
+{
+        return gpio_get_value(GPIO_NR_PALMZ72_SD_RO);
+}
+
+static struct pxamci_platform_data palmz72_mci_platform_data = {
+        .ocr_mask       = MMC_VDD_32_33 | MMC_VDD_33_34,
+        .setpower       = palmz72_mci_power,
+        .get_ro         = palmz72_mci_ro,
+        .init           = palmz72_mci_init,
+        .exit           = palmz72_mci_exit,
+};
+
+/******************************************************************************
+ * GPIO keyboard
+ ******************************************************************************/
+static unsigned int palmz72_matrix_keys[] = {
+        KEY(0, 0, KEY_POWER),
+        KEY(0, 1, KEY_F1),
+        KEY(0, 2, KEY_ENTER),
+
+        KEY(1, 0, KEY_F2),
+        KEY(1, 1, KEY_F3),
+        KEY(1, 2, KEY_F4),
+
+        KEY(2, 0, KEY_UP),
+        KEY(2, 2, KEY_DOWN),
+
+        KEY(3, 0, KEY_RIGHT),
+        KEY(3, 2, KEY_LEFT),
+};
+
+static struct pxa27x_keypad_platform_data palmz72_keypad_platform_data = {
+        .matrix_key_rows        = 4,
+        .matrix_key_cols        = 3,
+        .matrix_key_map         = palmz72_matrix_keys,
+        .matrix_key_map_size    = ARRAY_SIZE(palmz72_matrix_keys),
+
+        .debounce_interval      = 30,
+};
+
+/******************************************************************************
+ * Backlight
+ ******************************************************************************/
+static int palmz72_backlight_init(struct device *dev)
+{
+        int ret;
+
+        ret = gpio_request(GPIO_NR_PALMZ72_BL_POWER, "BL POWER");
+        if (ret)
+                goto err;
+        ret = gpio_direction_output(GPIO_NR_PALMZ72_BL_POWER, 0);
+        if (ret)
+                goto err2;
+        ret = gpio_request(GPIO_NR_PALMZ72_LCD_POWER, "LCD POWER");
+        if (ret)
+                goto err2;
+        ret = gpio_direction_output(GPIO_NR_PALMZ72_LCD_POWER, 0);
+        if (ret)
+                goto err3;
+
+        return 0;
+err3:
+        gpio_free(GPIO_NR_PALMZ72_LCD_POWER);
+err2:
+        gpio_free(GPIO_NR_PALMZ72_BL_POWER);
+err:
+        return ret;
+}
+
+static int palmz72_backlight_notify(int brightness)
+{
+        gpio_set_value(GPIO_NR_PALMZ72_BL_POWER, brightness);
+        gpio_set_value(GPIO_NR_PALMZ72_LCD_POWER, brightness);
+        return brightness;
+}
+
+static void palmz72_backlight_exit(struct device *dev)
+{
+        gpio_free(GPIO_NR_PALMZ72_BL_POWER);
+        gpio_free(GPIO_NR_PALMZ72_LCD_POWER);
+}
+
+static struct platform_pwm_backlight_data palmz72_backlight_data = {
+        .pwm_id         = 0,
+        .max_brightness = PALMZ72_MAX_INTENSITY,
+        .dft_brightness = PALMZ72_MAX_INTENSITY,
+        .pwm_period_ns  = PALMZ72_PERIOD_NS,
+        .init           = palmz72_backlight_init,
+        .notify         = palmz72_backlight_notify,
+        .exit           = palmz72_backlight_exit,
+};
+
+static struct platform_device palmz72_backlight = {
+        .name   = "pwm-backlight",
+        .dev    = {
+                .parent         = &pxa27x_device_pwm0.dev,
+                .platform_data  = &palmz72_backlight_data,
+        },
+};
+
+/******************************************************************************
+ * IrDA
+ ******************************************************************************/
+static int palmz72_irda_startup(struct device *dev)
+{
+        int err;
+        err = gpio_request(GPIO_NR_PALMZ72_IR_DISABLE, "IR DISABLE");
+        if (err)
+                goto err;
+        err = gpio_direction_output(GPIO_NR_PALMZ72_IR_DISABLE, 1);
+        if (err)
+                gpio_free(GPIO_NR_PALMZ72_IR_DISABLE);
+err:
+        return err;
+}
+
+static void palmz72_irda_shutdown(struct device *dev)
+{
+        gpio_free(GPIO_NR_PALMZ72_IR_DISABLE);
+}
+
+static void palmz72_irda_transceiver_mode(struct device *dev, int mode)
+{
+        gpio_set_value(GPIO_NR_PALMZ72_IR_DISABLE, mode & IR_OFF);
+        pxa2xx_transceiver_mode(dev, mode);
+}
+
+static struct pxaficp_platform_data palmz72_ficp_platform_data = {
+        .startup                = palmz72_irda_startup,
+        .shutdown               = palmz72_irda_shutdown,
+        .transceiver_cap        = IR_SIRMODE | IR_OFF,
+        .transceiver_mode       = palmz72_irda_transceiver_mode,
+};
+
+/******************************************************************************
+ * LEDs
+ ******************************************************************************/
+static struct gpio_led gpio_leds[] = {
+        {
+                .name                   = "palmz72:green:led",
+                .default_trigger        = "none",
+                .gpio                   = GPIO_NR_PALMZ72_LED_GREEN,
+        },
+};
+
+static struct gpio_led_platform_data gpio_led_info = {
+        .leds           = gpio_leds,
+        .num_leds       = ARRAY_SIZE(gpio_leds),
+};
+
+static struct platform_device palmz72_leds = {
+        .name   = "leds-gpio",
+        .id     = -1,
+        .dev    = {
+                .platform_data  = &gpio_led_info,
+        }
+};
+
+/******************************************************************************
+ * Power supply
+ ******************************************************************************/
+static int power_supply_init(struct device *dev)
+{
+        int ret;
+
+        ret = gpio_request(GPIO_NR_PALMZ72_POWER_DETECT, "CABLE_STATE_AC");
+        if (ret)
+                goto err1;
+        ret = gpio_direction_input(GPIO_NR_PALMZ72_POWER_DETECT);
+        if (ret)
+                goto err2;
+
+        ret = gpio_request(GPIO_NR_PALMZ72_USB_DETECT_N, "CABLE_STATE_USB");
+        if (ret)
+                goto err2;
+        ret = gpio_direction_input(GPIO_NR_PALMZ72_USB_DETECT_N);
+        if (ret)
+                goto err3;
+
+        return 0;
+err3:
+        gpio_free(GPIO_NR_PALMZ72_USB_DETECT_N);
+err2:
+        gpio_free(GPIO_NR_PALMZ72_POWER_DETECT);
+err1:
+        return ret;
+}
+
+static int palmz72_is_ac_online(void)
+{
+        return gpio_get_value(GPIO_NR_PALMZ72_POWER_DETECT);
+}
+
+static int palmz72_is_usb_online(void)
+{
+        return !gpio_get_value(GPIO_NR_PALMZ72_USB_DETECT_N);
+}
+
+static void power_supply_exit(struct device *dev)
+{
+        gpio_free(GPIO_NR_PALMZ72_USB_DETECT_N);
+        gpio_free(GPIO_NR_PALMZ72_POWER_DETECT);
+}
+
+static char *palmz72_supplicants[] = {
+        "main-battery",
+};
+
+static struct pda_power_pdata power_supply_info = {
+        .init            = power_supply_init,
+        .is_ac_online    = palmz72_is_ac_online,
+        .is_usb_online   = palmz72_is_usb_online,
+        .exit            = power_supply_exit,
+        .supplied_to     = palmz72_supplicants,
+        .num_supplicants = ARRAY_SIZE(palmz72_supplicants),
+};
+
+static struct platform_device power_supply = {
+        .name = "pda-power",
+        .id   = -1,
+        .dev  = {
+                .platform_data = &power_supply_info,
+        },
+};
+
+/******************************************************************************
+ * Framebuffer
+ ******************************************************************************/
+static struct pxafb_mode_info palmz72_lcd_modes[] = {
+{
+        .pixclock       = 115384,
+        .xres           = 320,
+        .yres           = 320,
+        .bpp            = 16,
+
+        .left_margin    = 27,
+        .right_margin   = 7,
+        .upper_margin   = 7,
+        .lower_margin   = 8,
+
+        .hsync_len      = 6,
+        .vsync_len      = 1,
+},
+};
+
+static struct pxafb_mach_info palmz72_lcd_screen = {
+        .modes          = palmz72_lcd_modes,
+        .num_modes      = ARRAY_SIZE(palmz72_lcd_modes),
+        .lcd_conn       = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
+};
+
+#ifdef CONFIG_PM
+
+/* We have some black magic here
+ * PalmOS ROM on recover expects special struct physical address
+ * to be transferred via PSPR. Using this struct PalmOS restores
+ * its state after sleep. As for Linux, we need to setup it the
+ * same way. More than that, PalmOS ROM changes some values in memory.
+ * For now only one location is found, which needs special treatment.
+ * Thanks to Alex Osborne, Andrzej Zaborowski, and lots of other people
+ * for reading backtraces for me :)
+ */
+
+#define PALMZ72_SAVE_DWORD ((unsigned long *)0xc0000050)
+
+static struct palmz72_resume_info palmz72_resume_info = {
+        .magic0 = 0xb4e6,
+        .magic1 = 1,
+
+        /* reset state, MMU off etc */
+        .arm_control = 0,
+        .aux_control = 0,
+        .ttb = 0,
+        .domain_access = 0,
+        .process_id = 0,
+};
+
+static unsigned long store_ptr;
+
+/* sys_device for Palm Zire 72 PM */
+
+static int palmz72_pm_suspend(struct sys_device *dev, pm_message_t msg)
+{
+        /* setup the resume_info struct for the original bootloader */
+        palmz72_resume_info.resume_addr = (u32) pxa_cpu_resume;
+
+        /* Storing memory touched by ROM */
+        store_ptr = *PALMZ72_SAVE_DWORD;
+
+        /* Setting PSPR to a proper value */
+        PSPR = virt_to_phys(&palmz72_resume_info);
+
+        return 0;
+}
+
+static int palmz72_pm_resume(struct sys_device *dev)
+{
+        *PALMZ72_SAVE_DWORD = store_ptr;
+        return 0;
+}
+
+static struct sysdev_class palmz72_pm_sysclass = {
+        .name = "palmz72_pm",
+        .suspend = palmz72_pm_suspend,
+        .resume = palmz72_pm_resume,
+};
+
+static struct sys_device palmz72_pm_device = {
+        .cls = &palmz72_pm_sysclass,
+};
+
+static int __init palmz72_pm_init(void)
+{
+        int ret = -ENODEV;
+        if (machine_is_palmz72()) {
+                ret = sysdev_class_register(&palmz72_pm_sysclass);
+                if (ret == 0)
+                        ret = sysdev_register(&palmz72_pm_device);
+        }
+        return ret;
+}
+
+device_initcall(palmz72_pm_init);
+#endif
+
+/******************************************************************************
+ * Machine init
+ ******************************************************************************/
+static struct platform_device *devices[] __initdata = {
+        &palmz72_backlight,
+        &palmz72_leds,
+        &power_supply,
+};
+
+static void __init palmz72_init(void)
+{
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(palmz72_pin_config));
+        set_pxa_fb_info(&palmz72_lcd_screen);
+        pxa_set_mci_info(&palmz72_mci_platform_data);
+        pxa_set_ac97_info(NULL);
+        pxa_set_ficp_info(&palmz72_ficp_platform_data);
+        pxa_set_keypad_info(&palmz72_keypad_platform_data);
+        platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+
+MACHINE_START(PALMZ72, "Palm Zire72")
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = io_p2v(0x40000000),
+        .boot_params    = 0xa0000100,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa27x_init_irq,
+        .timer          = &pxa_timer,
+        .init_machine   = palmz72_init
+MACHINE_END
diff --git a/arch/arm/mach-pxa/pcm027.c b/arch/arm/mach-pxa/pcm027.c
index 730b9f6ede1d..36135a02fdc7 100644
--- a/arch/arm/mach-pxa/pcm027.c
+++ b/arch/arm/mach-pxa/pcm027.c
@@ -31,7 +31,7 @@
 #include <asm/mach/arch.h>
 #include <mach/hardware.h>
 #include <mach/pxa-regs.h>
-#include <mach/pxa2xx-gpio.h>
+#include <mach/mfp-pxa27x.h>
 #include <mach/pxa2xx-regs.h>
 #include <mach/pxa2xx_spi.h>
 #include <mach/pcm027.h>
@@ -86,6 +86,28 @@
  * *) CPU internal use only
  */
 
+static unsigned long pcm027_pin_config[] __initdata = {
+        /* Chip Selects */
+        GPIO20_nSDCS_2,
+        GPIO21_nSDCS_3,
+        GPIO15_nCS_1,
+        GPIO78_nCS_2,
+        GPIO80_nCS_4,
+        GPIO33_nCS_5,   /* Ethernet */
+
+        /* I2C */
+        GPIO117_I2C_SCL,
+        GPIO118_I2C_SDA,
+
+        /* GPIO */
+        GPIO52_GPIO,    /* IRQ from network controller */
+#ifdef CONFIG_LEDS_GPIO
+        GPIO90_GPIO,    /* PCM027_LED_CPU */
+        GPIO91_GPIO,    /* PCM027_LED_HEART_BEAT */
+#endif
+        GPIO114_GPIO,   /* IRQ from CAN controller */
+};
+
 /*
  * SMC91x network controller specific stuff
  */
@@ -206,13 +228,9 @@ static void __init pcm027_init(void)
          */
         ARB_CNTRL = ARB_CORE_PARK | 0x234;
 
-        platform_add_devices(devices, ARRAY_SIZE(devices));
+        pxa2xx_mfp_config(pcm027_pin_config, ARRAY_SIZE(pcm027_pin_config));
 
-        /* LEDs (on demand only) */
-#ifdef CONFIG_LEDS_GPIO
-        pxa_gpio_mode(PCM027_LED_CPU | GPIO_OUT);
-        pxa_gpio_mode(PCM027_LED_HEARD_BEAT | GPIO_OUT);
-#endif /* CONFIG_LEDS_GPIO */
+        platform_add_devices(devices, ARRAY_SIZE(devices));
 
         /* at last call the baseboard to initialize itself */
 #ifdef CONFIG_MACH_PCM990_BASEBOARD
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index 420c9b3813f6..f601425f1b1e 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -262,8 +262,7 @@ static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
                                         GPIO_bit(PCM990_CTRL_INT_IRQ_GPIO);
                 if (likely(pending)) {
                         irq = PCM027_IRQ(0) + __ffs(pending);
-                        desc = irq_desc + irq;
-                        desc_handle_irq(irq, desc);
+                        generic_handle_irq(irq);
                 }
                 pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
         } while (pending);
@@ -328,36 +327,10 @@ static struct pxamci_platform_data pcm990_mci_platform_data = {
         .exit           = pcm990_mci_exit,
 };
 
-/*
- * init OHCI hardware to work with
- *
- * Note: Only USB port 1 (host only) is connected
- *
- * GPIO88 (USBHPWR#1): overcurrent in, overcurrent when low
- * GPIO89 (USBHPEN#1): power-on out, on when low
- */
-static int pcm990_ohci_init(struct device *dev)
-{
-        /*
-         * disable USB port 2 and 3
-         * power sense is active low
-         */
-        UHCHR = ((UHCHR) | UHCHR_PCPL | UHCHR_PSPL | UHCHR_SSEP2 |
-                                UHCHR_SSEP3) & ~(UHCHR_SSEP1 | UHCHR_SSE);
-        /*
-         * wait 10ms after Power on
-         * overcurrent per port
-         * power switch per port
-         */
-        UHCRHDA = (5<<24) | (1<<11) | (1<<8);   /* FIXME: Required? */
-
-        return 0;
-}
-
 static struct pxaohci_platform_data pcm990_ohci_platform_data = {
         .port_mode      = PMM_PERPORT_MODE,
-        .init           = pcm990_ohci_init,
-        .exit           = NULL,
+        .flags          = ENABLE_PORT1 | POWER_CONTROL_LOW | POWER_SENSE_LOW,
+        .power_on_delay = 10,
 };
 
 /*
diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c
index 1b539e675579..164eb0bb6321 100644
--- a/arch/arm/mach-pxa/pm.c
+++ b/arch/arm/mach-pxa/pm.c
@@ -86,9 +86,27 @@ static int pxa_pm_valid(suspend_state_t state)
         return -EINVAL;
 }
 
+static int pxa_pm_prepare(void)
+{
+        int ret = 0;
+
+        if (pxa_cpu_pm_fns && pxa_cpu_pm_fns->prepare)
+                ret = pxa_cpu_pm_fns->prepare();
+
+        return ret;
+}
+
+static void pxa_pm_finish(void)
+{
+        if (pxa_cpu_pm_fns && pxa_cpu_pm_fns->finish)
+                pxa_cpu_pm_fns->finish();
+}
+
 static struct platform_suspend_ops pxa_pm_ops = {
         .valid          = pxa_pm_valid,
         .enter          = pxa_pm_enter,
+        .prepare        = pxa_pm_prepare,
+        .finish         = pxa_pm_finish,
 };
 
 static int __init pxa_pm_init(void)
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 3f5f484549b3..2e3bd8b1523b 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -20,6 +20,9 @@
 #include <linux/fb.h>
 #include <linux/pm.h>
 #include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/ads7846.h>
 
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
@@ -33,7 +36,7 @@
 
 #include <mach/pxa-regs.h>
 #include <mach/pxa2xx-regs.h>
-#include <mach/pxa2xx-gpio.h>
+#include <mach/mfp-pxa25x.h>
 #include <mach/mmc.h>
 #include <mach/udc.h>
 #include <mach/i2c.h>
@@ -42,6 +45,7 @@
 #include <mach/pxafb.h>
 #include <mach/sharpsl.h>
 #include <mach/ssp.h>
+#include <mach/pxa2xx_spi.h>
 
 #include <asm/hardware/scoop.h>
 #include <asm/hardware/locomo.h>
@@ -51,6 +55,88 @@
 #include "devices.h"
 #include "sharpsl.h"
 
+static unsigned long poodle_pin_config[] __initdata = {
+        /* I/O */
+        GPIO79_nCS_3,
+        GPIO80_nCS_4,
+        GPIO18_RDY,
+
+        /* Clock */
+        GPIO12_32KHz,
+
+        /* SSP1 */
+        GPIO23_SSP1_SCLK,
+        GPIO25_SSP1_TXD,
+        GPIO26_SSP1_RXD,
+        GPIO24_GPIO,    /* POODLE_GPIO_TP_CS - SFRM as chip select */
+
+        /* I2S */
+        GPIO28_I2S_BITCLK_OUT,
+        GPIO29_I2S_SDATA_IN,
+        GPIO30_I2S_SDATA_OUT,
+        GPIO31_I2S_SYNC,
+        GPIO32_I2S_SYSCLK,
+
+        /* Infra-Red */
+        GPIO47_FICP_TXD,
+        GPIO46_FICP_RXD,
+
+        /* FFUART */
+        GPIO40_FFUART_DTR,
+        GPIO41_FFUART_RTS,
+        GPIO39_FFUART_TXD,
+        GPIO37_FFUART_DSR,
+        GPIO34_FFUART_RXD,
+        GPIO35_FFUART_CTS,
+
+        /* LCD */
+        GPIO58_LCD_LDD_0,
+        GPIO59_LCD_LDD_1,
+        GPIO60_LCD_LDD_2,
+        GPIO61_LCD_LDD_3,
+        GPIO62_LCD_LDD_4,
+        GPIO63_LCD_LDD_5,
+        GPIO64_LCD_LDD_6,
+        GPIO65_LCD_LDD_7,
+        GPIO66_LCD_LDD_8,
+        GPIO67_LCD_LDD_9,
+        GPIO68_LCD_LDD_10,
+        GPIO69_LCD_LDD_11,
+        GPIO70_LCD_LDD_12,
+        GPIO71_LCD_LDD_13,
+        GPIO72_LCD_LDD_14,
+        GPIO73_LCD_LDD_15,
+        GPIO74_LCD_FCLK,
+        GPIO75_LCD_LCLK,
+        GPIO76_LCD_PCLK,
+        GPIO77_LCD_BIAS,
+
+        /* PC Card */
+        GPIO48_nPOE,
+        GPIO49_nPWE,
+        GPIO50_nPIOR,
+        GPIO51_nPIOW,
+        GPIO52_nPCE_1,
+        GPIO53_nPCE_2,
+        GPIO54_nPSKTSEL,
+        GPIO55_nPREG,
+        GPIO56_nPWAIT,
+        GPIO57_nIOIS16,
+
+        /* MMC */
+        GPIO6_MMC_CLK,
+        GPIO8_MMC_CS0,
+
+        /* GPIO */
+        GPIO9_GPIO,     /* POODLE_GPIO_nSD_DETECT */
+        GPIO7_GPIO,     /* POODLE_GPIO_nSD_WP */
+        GPIO3_GPIO,     /* POODLE_GPIO_SD_PWR */
+        GPIO33_GPIO,    /* POODLE_GPIO_SD_PWR1 */
+
+        GPIO20_GPIO,    /* POODLE_GPIO_USB_PULLUP */
+        GPIO22_GPIO,    /* POODLE_GPIO_IR_ON */
+};
+
 static struct resource poodle_scoop_resources[] = {
         [0] = {
                 .start          = 0x10800000,
@@ -62,6 +148,7 @@ static struct resource poodle_scoop_resources[] = {
 static struct scoop_config poodle_scoop_setup = {
         .io_dir         = POODLE_SCOOP_IO_DIR,
         .io_out         = POODLE_SCOOP_IO_OUT,
+        .gpio_base      = POODLE_SCOOP_GPIO_BASE,
 };
 
 struct platform_device poodle_scoop_device = {
@@ -74,27 +161,6 @@ struct platform_device poodle_scoop_device = {
         .resource       = poodle_scoop_resources,
 };
 
-static void poodle_pcmcia_init(void)
-{
-        /* Setup default state of GPIO outputs
-           before we enable them as outputs. */
-        GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) |
-                GPIO_bit(GPIO49_nPWE) | GPIO_bit(GPIO50_nPIOR) |
-                GPIO_bit(GPIO51_nPIOW) | GPIO_bit(GPIO52_nPCE_1) |
-                GPIO_bit(GPIO53_nPCE_2);
-
-        pxa_gpio_mode(GPIO48_nPOE_MD);
-        pxa_gpio_mode(GPIO49_nPWE_MD);
-        pxa_gpio_mode(GPIO50_nPIOR_MD);
-        pxa_gpio_mode(GPIO51_nPIOW_MD);
-        pxa_gpio_mode(GPIO55_nPREG_MD);
-        pxa_gpio_mode(GPIO56_nPWAIT_MD);
-        pxa_gpio_mode(GPIO57_nIOIS16_MD);
-        pxa_gpio_mode(GPIO52_nPCE_1_MD);
-        pxa_gpio_mode(GPIO53_nPCE_2_MD);
-        pxa_gpio_mode(GPIO54_pSKTSEL_MD);
-}
-
 static struct scoop_pcmcia_dev poodle_pcmcia_scoop[] = {
 {
         .dev        = &poodle_scoop_device.dev,
@@ -107,7 +173,6 @@ static struct scoop_pcmcia_dev poodle_pcmcia_scoop[] = {
 static struct scoop_pcmcia_config poodle_pcmcia_config = {
         .devs         = &poodle_pcmcia_scoop[0],
         .num_devs     = 1,
-        .pcmcia_init  = poodle_pcmcia_init,
 };
 
 EXPORT_SYMBOL(poodle_scoop_device);
@@ -136,62 +201,55 @@ struct platform_device poodle_locomo_device = {
 
 EXPORT_SYMBOL(poodle_locomo_device);
 
-/*
- * Poodle SSP Device
- */
-
-struct platform_device poodle_ssp_device = {
-        .name           = "corgi-ssp",
-        .id             = -1,
-};
-
-struct corgissp_machinfo poodle_ssp_machinfo = {
-        .port           = 1,
-        .cs_lcdcon      = -1,
-        .cs_ads7846     = -1,
-        .cs_max1111     = -1,
-        .clk_lcdcon     = 2,
-        .clk_ads7846    = 36,
-        .clk_max1111    = 2,
+#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE)
+static struct pxa2xx_spi_master poodle_spi_info = {
+        .num_chipselect = 1,
 };
 
-
-/*
- * Poodle Touch Screen Device
- */
-static struct resource poodlets_resources[] = {
-        [0] = {
-                .start          = POODLE_IRQ_GPIO_TP_INT,
-                .end            = POODLE_IRQ_GPIO_TP_INT,
-                .flags          = IORESOURCE_IRQ,
-        },
+static struct ads7846_platform_data poodle_ads7846_info = {
+        .model                  = 7846,
+        .vref_delay_usecs       = 100,
+        .x_plate_ohms           = 419,
+        .y_plate_ohms           = 486,
+        .gpio_pendown           = POODLE_GPIO_TP_INT,
 };
 
-static unsigned long poodle_get_hsync_invperiod(void)
+static void ads7846_cs(u32 command)
 {
-        return 0;
+        gpio_set_value(POODLE_GPIO_TP_CS, !(command == PXA2XX_CS_ASSERT));
 }
 
-static void poodle_null_hsync(void)
-{
-}
-
-static struct corgits_machinfo  poodle_ts_machinfo = {
-        .get_hsync_invperiod    = poodle_get_hsync_invperiod,
-        .put_hsync              = poodle_null_hsync,
-        .wait_hsync             = poodle_null_hsync,
+static struct pxa2xx_spi_chip poodle_ads7846_chip = {
+        .cs_control             = ads7846_cs,
 };
 
-static struct platform_device poodle_ts_device = {
-        .name           = "corgi-ts",
-        .dev            = {
-                .platform_data  = &poodle_ts_machinfo,
+static struct spi_board_info poodle_spi_devices[] = {
+        {
+                .modalias       = "ads7846",
+                .max_speed_hz   = 10000,
+                .bus_num        = 1,
+                .platform_data  = &poodle_ads7846_info,
+                .controller_data= &poodle_ads7846_chip,
+                .irq            = gpio_to_irq(POODLE_GPIO_TP_INT),
         },
-        .id             = -1,
-        .num_resources  = ARRAY_SIZE(poodlets_resources),
-        .resource       = poodlets_resources,
 };
 
+static void __init poodle_init_spi(void)
+{
+        int err;
+
+        err = gpio_request(POODLE_GPIO_TP_CS, "ADS7846_CS");
+        if (err)
+                return;
+
+        gpio_direction_output(POODLE_GPIO_TP_CS, 1);
+
+        pxa2xx_set_spi_info(1, &poodle_spi_info);
+        spi_register_board_info(ARRAY_AND_SIZE(poodle_spi_devices));
+}
+#else
+static inline void poodle_init_spi(void) {}
+#endif
 
 /*
  * MMC/SD Device
@@ -205,22 +263,50 @@ static int poodle_mci_init(struct device *dev, irq_handler_t poodle_detect_int,
 {
         int err;
 
-        /* setup GPIO for PXA25x MMC controller */
-        pxa_gpio_mode(GPIO6_MMCCLK_MD);
-        pxa_gpio_mode(GPIO8_MMCCS0_MD);
-        pxa_gpio_mode(POODLE_GPIO_nSD_DETECT | GPIO_IN);
-        pxa_gpio_mode(POODLE_GPIO_nSD_WP | GPIO_IN);
-        pxa_gpio_mode(POODLE_GPIO_SD_PWR | GPIO_OUT);
-        pxa_gpio_mode(POODLE_GPIO_SD_PWR1 | GPIO_OUT);
+        err = gpio_request(POODLE_GPIO_nSD_DETECT, "nSD_DETECT");
+        if (err)
+                goto err_out;
+
+        err = gpio_request(POODLE_GPIO_nSD_WP, "nSD_WP");
+        if (err)
+                goto err_free_1;
+
+        err = gpio_request(POODLE_GPIO_SD_PWR, "SD_PWR");
+        if (err)
+                goto err_free_2;
+
+        err = gpio_request(POODLE_GPIO_SD_PWR1, "SD_PWR1");
+        if (err)
+                goto err_free_3;
+
+        gpio_direction_input(POODLE_GPIO_nSD_DETECT);
+        gpio_direction_input(POODLE_GPIO_nSD_WP);
+
+        gpio_direction_output(POODLE_GPIO_SD_PWR, 0);
+        gpio_direction_output(POODLE_GPIO_SD_PWR1, 0);
 
         poodle_mci_platform_data.detect_delay = msecs_to_jiffies(250);
 
         err = request_irq(POODLE_IRQ_GPIO_nSD_DETECT, poodle_detect_int,
                           IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
                           "MMC card detect", data);
-        if (err)
-                printk(KERN_ERR "poodle_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
+        if (err) {
+                pr_err("%s: MMC/SD: can't request MMC card detect IRQ\n",
+                                __func__);
+                goto err_free_4;
+        }
+
+        return 0;
 
+err_free_4:
+        gpio_free(POODLE_GPIO_SD_PWR1);
+err_free_3:
+        gpio_free(POODLE_GPIO_SD_PWR);
+err_free_2:
+        gpio_free(POODLE_GPIO_nSD_WP);
+err_free_1:
+        gpio_free(POODLE_GPIO_nSD_DETECT);
+err_out:
         return err;
 }
 
@@ -228,18 +314,19 @@ static void poodle_mci_setpower(struct device *dev, unsigned int vdd)
 {
         struct pxamci_platform_data* p_d = dev->platform_data;
 
-        if (( 1 << vdd) & p_d->ocr_mask) {
-                GPSR(POODLE_GPIO_SD_PWR) = GPIO_bit(POODLE_GPIO_SD_PWR);
+        if ((1 << vdd) & p_d->ocr_mask) {
+                gpio_set_value(POODLE_GPIO_SD_PWR, 1);
                 mdelay(2);
-                GPSR(POODLE_GPIO_SD_PWR1) = GPIO_bit(POODLE_GPIO_SD_PWR1);
+                gpio_set_value(POODLE_GPIO_SD_PWR1, 1);
         } else {
-                GPCR(POODLE_GPIO_SD_PWR1) = GPIO_bit(POODLE_GPIO_SD_PWR1);
-                GPCR(POODLE_GPIO_SD_PWR) = GPIO_bit(POODLE_GPIO_SD_PWR);
+                gpio_set_value(POODLE_GPIO_SD_PWR1, 0);
+                gpio_set_value(POODLE_GPIO_SD_PWR, 0);
         }
 }
 
 static int poodle_mci_get_ro(struct device *dev)
 {
+        return !!gpio_get_value(POODLE_GPIO_nSD_WP);
         return GPLR(POODLE_GPIO_nSD_WP) & GPIO_bit(POODLE_GPIO_nSD_WP);
 }
 
@@ -247,6 +334,10 @@ static int poodle_mci_get_ro(struct device *dev)
 static void poodle_mci_exit(struct device *dev, void *data)
 {
         free_irq(POODLE_IRQ_GPIO_nSD_DETECT, data);
+        gpio_free(POODLE_GPIO_SD_PWR1);
+        gpio_free(POODLE_GPIO_SD_PWR);
+        gpio_free(POODLE_GPIO_nSD_WP);
+        gpio_free(POODLE_GPIO_nSD_DETECT);
 }
 
 static struct pxamci_platform_data poodle_mci_platform_data = {
@@ -263,38 +354,41 @@ static struct pxamci_platform_data poodle_mci_platform_data = {
  */
 static void poodle_irda_transceiver_mode(struct device *dev, int mode)
 {
-        if (mode & IR_OFF) {
-                GPSR(POODLE_GPIO_IR_ON) = GPIO_bit(POODLE_GPIO_IR_ON);
-        } else {
-                GPCR(POODLE_GPIO_IR_ON) = GPIO_bit(POODLE_GPIO_IR_ON);
-        }
+        gpio_set_value(POODLE_GPIO_IR_ON, mode & IR_OFF);
         pxa2xx_transceiver_mode(dev, mode);
 }
 
+static int poodle_irda_startup(struct device *dev)
+{
+        int err;
+
+        err = gpio_request(POODLE_GPIO_IR_ON, "IR_ON");
+        if (err)
+                return err;
+
+        gpio_direction_output(POODLE_GPIO_IR_ON, 1);
+        return 0;
+}
+
+static void poodle_irda_shutdown(struct device *dev)
+{
+        gpio_free(POODLE_GPIO_IR_ON);
+}
+
 static struct pxaficp_platform_data poodle_ficp_platform_data = {
-        .transceiver_cap  = IR_SIRMODE | IR_OFF,
-        .transceiver_mode = poodle_irda_transceiver_mode,
+        .transceiver_cap        = IR_SIRMODE | IR_OFF,
+        .transceiver_mode       = poodle_irda_transceiver_mode,
+        .startup                = poodle_irda_startup,
+        .shutdown               = poodle_irda_shutdown,
 };
 
 
 /*
  * USB Device Controller
  */
-static void poodle_udc_command(int cmd)
-{
-        switch(cmd)     {
-        case PXA2XX_UDC_CMD_CONNECT:
-                GPSR(POODLE_GPIO_USB_PULLUP) = GPIO_bit(POODLE_GPIO_USB_PULLUP);
-                break;
-        case PXA2XX_UDC_CMD_DISCONNECT:
-                GPCR(POODLE_GPIO_USB_PULLUP) = GPIO_bit(POODLE_GPIO_USB_PULLUP);
-                break;
-        }
-}
-
 static struct pxa2xx_udc_mach_info udc_info __initdata = {
         /* no connect GPIO; poodle can't tell connection status */
-        .udc_command            = poodle_udc_command,
+        .gpio_pullup    = POODLE_GPIO_USB_PULLUP,
 };
 
 
@@ -316,15 +410,12 @@ static struct pxafb_mode_info poodle_fb_mode = {
 static struct pxafb_mach_info poodle_fb_info = {
         .modes          = &poodle_fb_mode,
         .num_modes      = 1,
-        .lccr0          = LCCR0_Act | LCCR0_Sngl | LCCR0_Color,
-        .lccr3          = 0,
+        .lcd_conn       = LCD_COLOR_TFT_16BPP,
 };
 
 static struct platform_device *devices[] __initdata = {
         &poodle_locomo_device,
         &poodle_scoop_device,
-        &poodle_ssp_device,
-        &poodle_ts_device,
 };
 
 static void poodle_poweroff(void)
@@ -344,59 +435,23 @@ static void __init poodle_init(void)
         pm_power_off = poodle_poweroff;
         arm_pm_restart = poodle_restart;
 
-        /* setup sleep mode values */
-        PWER  = 0x00000002;
-        PFER  = 0x00000000;
-        PRER  = 0x00000002;
-        PGSR0 = 0x00008000;
-        PGSR1 = 0x003F0202;
-        PGSR2 = 0x0001C000;
         PCFR |= PCFR_OPDE;
 
-        /* cpu initialize */
-        /* Pgsr Register */
-        PGSR0 = 0x0146dd80;
-        PGSR1 = 0x03bf0890;
-        PGSR2 = 0x0001c000;
-
-        /* Alternate Register */
-        GAFR0_L = 0x01001000;
-        GAFR0_U = 0x591a8010;
-        GAFR1_L = 0x900a8451;
-        GAFR1_U = 0xaaa5aaaa;
-        GAFR2_L = 0x8aaaaaaa;
-        GAFR2_U = 0x00000002;
-
-        /* Direction Register */
-        GPDR0 = 0xd3f0904c;
-        GPDR1 = 0xfcffb7d3;
-        GPDR2 = 0x0001ffff;
-
-        /* Output Register */
-        GPCR0 = 0x00000000;
-        GPCR1 = 0x00000000;
-        GPCR2 = 0x00000000;
-
-        GPSR0 = 0x00400000;
-        GPSR1 = 0x00000000;
-        GPSR2 = 0x00000000;
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(poodle_pin_config));
+
+        platform_scoop_config = &poodle_pcmcia_config;
+
+        ret = platform_add_devices(devices, ARRAY_SIZE(devices));
+        if (ret)
+                pr_warning("poodle: Unable to register LoCoMo device\n");
 
         set_pxa_fb_parent(&poodle_locomo_device.dev);
         set_pxa_fb_info(&poodle_fb_info);
-        pxa_gpio_mode(POODLE_GPIO_USB_PULLUP | GPIO_OUT);
-        pxa_gpio_mode(POODLE_GPIO_IR_ON | GPIO_OUT);
         pxa_set_udc_info(&udc_info);
         pxa_set_mci_info(&poodle_mci_platform_data);
         pxa_set_ficp_info(&poodle_ficp_platform_data);
         pxa_set_i2c_info(NULL);
-
-        platform_scoop_config = &poodle_pcmcia_config;
-
-        ret = platform_add_devices(devices, ARRAY_SIZE(devices));
-        if (ret) {
-                printk(KERN_WARNING "poodle: Unable to register LoCoMo device\n");
-        }
-        corgi_ssp_set_machinfo(&poodle_ssp_machinfo);
+        poodle_init_spi();
 }
 
 static void __init fixup_poodle(struct machine_desc *desc,
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 305452b56e91..25d17a1dab78 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -36,6 +36,12 @@
 #include "devices.h"
 #include "clock.h"
 
+int cpu_is_pxa26x(void)
+{
+        return cpu_is_pxa250() && ((BOOT_DEF & 0x8) == 0);
+}
+EXPORT_SYMBOL_GPL(cpu_is_pxa26x);
+
 /*
  * Various clock factors driven by the CCCR register.
  */
@@ -203,48 +209,21 @@ static struct clk pxa25x_clks[] = {
  * More ones like CP and general purpose register values are preserved
  * with the stack pointer in sleep.S.
  */
-enum {  SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2,
-
-        SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
-        SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
-        SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U,
-
+enum {
         SLEEP_SAVE_PSTR,
-
         SLEEP_SAVE_CKEN,
-
         SLEEP_SAVE_COUNT
 };
 
 
 static void pxa25x_cpu_pm_save(unsigned long *sleep_save)
 {
-        SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2);
-
-        SAVE(GAFR0_L); SAVE(GAFR0_U);
-        SAVE(GAFR1_L); SAVE(GAFR1_U);
-        SAVE(GAFR2_L); SAVE(GAFR2_U);
-
         SAVE(CKEN);
         SAVE(PSTR);
-
-        /* Clear GPIO transition detect bits */
-        GEDR0 = GEDR0; GEDR1 = GEDR1; GEDR2 = GEDR2;
 }
 
 static void pxa25x_cpu_pm_restore(unsigned long *sleep_save)
 {
-        /* ensure not to come back here if it wasn't intended */
-        PSPR = 0;
-
-        /* restore registers */
-        RESTORE(GAFR0_L); RESTORE(GAFR0_U);
-        RESTORE(GAFR1_L); RESTORE(GAFR1_U);
-        RESTORE(GAFR2_L); RESTORE(GAFR2_U);
-        RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2);
-
-        PSSR = PSSR_RDH | PSSR_PH;
-
         RESTORE(CKEN);
         RESTORE(PSTR);
 }
@@ -256,19 +235,32 @@ static void pxa25x_cpu_pm_enter(suspend_state_t state)
 
         switch (state) {
         case PM_SUSPEND_MEM:
-                /* set resume return address */
-                PSPR = virt_to_phys(pxa_cpu_resume);
                 pxa25x_cpu_suspend(PWRMODE_SLEEP);
                 break;
         }
 }
 
+static int pxa25x_cpu_pm_prepare(void)
+{
+        /* set resume return address */
+        PSPR = virt_to_phys(pxa_cpu_resume);
+        return 0;
+}
+
+static void pxa25x_cpu_pm_finish(void)
+{
+        /* ensure not to come back here if it wasn't intended */
+        PSPR = 0;
+}
+
 static struct pxa_cpu_pm_fns pxa25x_cpu_pm_fns = {
         .save_count     = SLEEP_SAVE_COUNT,
         .valid          = suspend_valid_only_mem,
         .save           = pxa25x_cpu_pm_save,
         .restore        = pxa25x_cpu_pm_restore,
         .enter          = pxa25x_cpu_pm_enter,
+        .prepare        = pxa25x_cpu_pm_prepare,
+        .finish         = pxa25x_cpu_pm_finish,
 };
 
 static void __init pxa25x_init_pm(void)
@@ -330,6 +322,8 @@ static struct sys_device pxa25x_sysdev[] = {
         {
                 .cls    = &pxa_irq_sysclass,
         }, {
+                .cls    = &pxa2xx_mfp_sysclass,
+        }, {
                 .cls    = &pxa_gpio_sysclass,
         },
 };
@@ -338,11 +332,7 @@ static int __init pxa25x_init(void)
 {
         int i, ret = 0;
 
-        /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
-        if (cpu_is_pxa255())
-                clks_register(&pxa25x_hwuart_clk, 1);
-
-        if (cpu_is_pxa21x() || cpu_is_pxa25x()) {
+        if (cpu_is_pxa25x()) {
 
                 reset_status = RCSR;
 
@@ -365,9 +355,11 @@ static int __init pxa25x_init(void)
                         return ret;
         }
 
-        /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
-        if (cpu_is_pxa255())
+        /* Only add HWUART for PXA255/26x; PXA210/250 do not have it. */
+        if (cpu_is_pxa255() || cpu_is_pxa26x()) {
+                clks_register(&pxa25x_hwuart_clk, 1);
                 ret = platform_device_register(&pxa_device_hwuart);
+        }
 
         return ret;
 }
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index f9f6a9c31f4b..3e4ab2279c99 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -34,6 +34,13 @@
 #include "devices.h"
 #include "clock.h"
 
+void pxa27x_clear_otgph(void)
+{
+        if (cpu_is_pxa27x() && (PSSR & PSSR_OTGPH))
+                PSSR |= PSSR_OTGPH;
+}
+EXPORT_SYMBOL(pxa27x_clear_otgph);
+
 /* Crystal clock: 13MHz */
 #define BASE_CLK        13000000
 
@@ -183,36 +190,18 @@ static struct clk pxa27x_clks[] = {
  * More ones like CP and general purpose register values are preserved
  * with the stack pointer in sleep.S.
  */
-enum {  SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3,
-
-        SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
-        SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
-        SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U,
-        SLEEP_SAVE_GAFR3_L, SLEEP_SAVE_GAFR3_U,
-
+enum {
         SLEEP_SAVE_PSTR,
-
         SLEEP_SAVE_CKEN,
-
         SLEEP_SAVE_MDREFR,
-        SLEEP_SAVE_PWER, SLEEP_SAVE_PCFR, SLEEP_SAVE_PRER,
-        SLEEP_SAVE_PFER, SLEEP_SAVE_PKWR,
-
+        SLEEP_SAVE_PCFR,
         SLEEP_SAVE_COUNT
 };
 
 void pxa27x_cpu_pm_save(unsigned long *sleep_save)
 {
-        SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2); SAVE(PGSR3);
-
-        SAVE(GAFR0_L); SAVE(GAFR0_U);
-        SAVE(GAFR1_L); SAVE(GAFR1_U);
-        SAVE(GAFR2_L); SAVE(GAFR2_U);
-        SAVE(GAFR3_L); SAVE(GAFR3_U);
-
         SAVE(MDREFR);
-        SAVE(PWER); SAVE(PCFR); SAVE(PRER);
-        SAVE(PFER); SAVE(PKWR);
+        SAVE(PCFR);
 
         SAVE(CKEN);
         SAVE(PSTR);
@@ -220,24 +209,12 @@ void pxa27x_cpu_pm_save(unsigned long *sleep_save)
 
 void pxa27x_cpu_pm_restore(unsigned long *sleep_save)
 {
-        /* ensure not to come back here if it wasn't intended */
-        PSPR = 0;
-
-        /* restore registers */
-        RESTORE(GAFR0_L); RESTORE(GAFR0_U);
-        RESTORE(GAFR1_L); RESTORE(GAFR1_U);
-        RESTORE(GAFR2_L); RESTORE(GAFR2_U);
-        RESTORE(GAFR3_L); RESTORE(GAFR3_U);
-        RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2); RESTORE(PGSR3);
-
         RESTORE(MDREFR);
-        RESTORE(PWER); RESTORE(PCFR); RESTORE(PRER);
-        RESTORE(PFER); RESTORE(PKWR);
+        RESTORE(PCFR);
 
         PSSR = PSSR_RDH | PSSR_PH;
 
         RESTORE(CKEN);
-
         RESTORE(PSTR);
 }
 
@@ -259,8 +236,6 @@ void pxa27x_cpu_pm_enter(suspend_state_t state)
                 pxa_cpu_standby();
                 break;
         case PM_SUSPEND_MEM:
-                /* set resume return address */
-                PSPR = virt_to_phys(pxa_cpu_resume);
                 pxa27x_cpu_suspend(PWRMODE_SLEEP);
                 break;
         }
@@ -271,12 +246,27 @@ static int pxa27x_cpu_pm_valid(suspend_state_t state)
         return state == PM_SUSPEND_MEM || state == PM_SUSPEND_STANDBY;
 }
 
+static int pxa27x_cpu_pm_prepare(void)
+{
+        /* set resume return address */
+        PSPR = virt_to_phys(pxa_cpu_resume);
+        return 0;
+}
+
+static void pxa27x_cpu_pm_finish(void)
+{
+        /* ensure not to come back here if it wasn't intended */
+        PSPR = 0;
+}
+
 static struct pxa_cpu_pm_fns pxa27x_cpu_pm_fns = {
         .save_count     = SLEEP_SAVE_COUNT,
         .save           = pxa27x_cpu_pm_save,
         .restore        = pxa27x_cpu_pm_restore,
         .valid          = pxa27x_cpu_pm_valid,
         .enter          = pxa27x_cpu_pm_enter,
+        .prepare        = pxa27x_cpu_pm_prepare,
+        .finish         = pxa27x_cpu_pm_finish,
 };
 
 static void __init pxa27x_init_pm(void)
@@ -349,7 +339,7 @@ struct platform_device pxa27x_device_i2c_power = {
         .num_resources  = ARRAY_SIZE(i2c_power_resources),
 };
 
-void __init pxa_set_i2c_power_info(struct i2c_pxa_platform_data *info)
+void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
 {
         local_irq_disable();
         PCFR |= PCFR_PI2CEN;
@@ -376,6 +366,8 @@ static struct sys_device pxa27x_sysdev[] = {
         {
                 .cls    = &pxa_irq_sysclass,
         }, {
+                .cls    = &pxa2xx_mfp_sysclass,
+        }, {
                 .cls    = &pxa_gpio_sysclass,
         },
 };
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 03cbc38103ed..b3cd5d0b0f35 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -203,6 +203,19 @@ static const struct clkops clk_pout_ops = {
         .disable        = clk_pout_disable,
 };
 
+static void clk_dummy_enable(struct clk *clk)
+{
+}
+
+static void clk_dummy_disable(struct clk *clk)
+{
+}
+
+static const struct clkops clk_dummy_ops = {
+        .enable         = clk_dummy_enable,
+        .disable        = clk_dummy_disable,
+};
+
 static struct clk pxa3xx_clks[] = {
         {
                 .name           = "CLK_POUT",
@@ -211,6 +224,13 @@ static struct clk pxa3xx_clks[] = {
                 .delay          = 70,
         },
 
+        /* Power I2C clock is always on */
+        {
+                .name           = "I2CCLK",
+                .ops            = &clk_dummy_ops,
+                .dev            = &pxa3xx_device_i2c_power.dev,
+        },
+
         PXA3xx_CK("LCDCLK",  LCD,    &clk_pxa3xx_hsio_ops, &pxa_device_fb.dev),
         PXA3xx_CK("CAMCLK",  CAMERA, &clk_pxa3xx_hsio_ops, NULL),
         PXA3xx_CK("AC97CLK", AC97,   &clk_pxa3xx_ac97_ops, NULL),
@@ -509,6 +529,30 @@ void __init pxa3xx_init_irq(void)
  * device registration specific to PXA3xx.
  */
 
+static struct resource i2c_power_resources[] = {
+        {
+                .start  = 0x40f500c0,
+                .end    = 0x40f500d3,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = IRQ_PWRI2C,
+                .end    = IRQ_PWRI2C,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device pxa3xx_device_i2c_power = {
+        .name           = "pxa2xx-i2c",
+        .id             = 1,
+        .resource       = i2c_power_resources,
+        .num_resources  = ARRAY_SIZE(i2c_power_resources),
+};
+
+void __init pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info)
+{
+        pxa3xx_device_i2c_power.dev.platform_data = info;
+}
+
 static struct platform_device *devices[] __initdata = {
 /*      &pxa_device_udc,        The UDC driver is PXA25x only */
         &pxa_device_ffuart,
@@ -522,6 +566,7 @@ static struct platform_device *devices[] __initdata = {
         &pxa3xx_device_ssp4,
         &pxa27x_device_pwm0,
         &pxa27x_device_pwm1,
+        &pxa3xx_device_i2c_power,
 };
 
 static struct sys_device pxa3xx_sysdev[] = {
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index e804ae09370c..15c2f1a8623b 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -116,24 +116,20 @@ struct battery_thresh  spitz_battery_levels_noac[] = {
         {   0,   0},
 };
 
-/* MAX1111 Commands */
-#define MAXCTRL_PD0      1u << 0
-#define MAXCTRL_PD1      1u << 1
-#define MAXCTRL_SGL      1u << 2
-#define MAXCTRL_UNI      1u << 3
-#define MAXCTRL_SEL_SH   4
-#define MAXCTRL_STR      1u << 7
-
 /*
  * Read MAX1111 ADC
  */
+extern int max1111_read_channel(int);
+
 int sharpsl_pm_pxa_read_max1111(int channel)
 {
         if (machine_is_tosa()) // Ugly, better move this function into another module
             return 0;
 
-        return corgi_ssp_max1111_get((channel << MAXCTRL_SEL_SH) | MAXCTRL_PD0 | MAXCTRL_PD1
-                        | MAXCTRL_SGL | MAXCTRL_UNI | MAXCTRL_STR);
+        /* max1111 accepts channels from 0-3, however,
+         * it is encoded from 0-7 here in the code.
+         */
+        return max1111_read_channel(channel >> 1);
 }
 
 void sharpsl_pm_pxa_init(void)
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 7e181afcca39..9b4f24c7c055 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -19,10 +19,17 @@
 #include <linux/major.h>
 #include <linux/fs.h>
 #include <linux/interrupt.h>
+#include <linux/gpio.h>
+#include <linux/leds.h>
 #include <linux/mmc/host.h>
 #include <linux/pm.h>
 #include <linux/backlight.h>
 #include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/i2c/pca953x.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/ads7846.h>
+#include <linux/spi/corgi_lcd.h>
 
 #include <asm/setup.h>
 #include <asm/memory.h>
@@ -37,7 +44,7 @@
 
 #include <mach/pxa-regs.h>
 #include <mach/pxa2xx-regs.h>
-#include <mach/pxa2xx-gpio.h>
+#include <mach/mfp-pxa27x.h>
 #include <mach/pxa27x-udc.h>
 #include <mach/reset.h>
 #include <mach/i2c.h>
@@ -46,7 +53,7 @@
 #include <mach/ohci.h>
 #include <mach/udc.h>
 #include <mach/pxafb.h>
-#include <mach/akita.h>
+#include <mach/pxa2xx_spi.h>
 #include <mach/spitz.h>
 #include <mach/sharpsl.h>
 
@@ -57,6 +64,66 @@
 #include "devices.h"
 #include "sharpsl.h"
 
+static unsigned long spitz_pin_config[] __initdata = {
+        /* Chip Selects */
+        GPIO78_nCS_2,   /* SCOOP #2 */
+        GPIO80_nCS_4,   /* SCOOP #1 */
+
+        /* LCD - 16bpp Active TFT */
+        GPIO58_LCD_LDD_0,
+        GPIO59_LCD_LDD_1,
+        GPIO60_LCD_LDD_2,
+        GPIO61_LCD_LDD_3,
+        GPIO62_LCD_LDD_4,
+        GPIO63_LCD_LDD_5,
+        GPIO64_LCD_LDD_6,
+        GPIO65_LCD_LDD_7,
+        GPIO66_LCD_LDD_8,
+        GPIO67_LCD_LDD_9,
+        GPIO68_LCD_LDD_10,
+        GPIO69_LCD_LDD_11,
+        GPIO70_LCD_LDD_12,
+        GPIO71_LCD_LDD_13,
+        GPIO72_LCD_LDD_14,
+        GPIO73_LCD_LDD_15,
+        GPIO74_LCD_FCLK,
+        GPIO75_LCD_LCLK,
+        GPIO76_LCD_PCLK,
+
+        /* PC Card */
+        GPIO48_nPOE,
+        GPIO49_nPWE,
+        GPIO50_nPIOR,
+        GPIO51_nPIOW,
+        GPIO85_nPCE_1,
+        GPIO54_nPCE_2,
+        GPIO79_PSKTSEL,
+        GPIO55_nPREG,
+        GPIO56_nPWAIT,
+        GPIO57_nIOIS16,
+
+        /* MMC */
+        GPIO32_MMC_CLK,
+        GPIO112_MMC_CMD,
+        GPIO92_MMC_DAT_0,
+        GPIO109_MMC_DAT_1,
+        GPIO110_MMC_DAT_2,
+        GPIO111_MMC_DAT_3,
+
+        /* GPIOs */
+        GPIO9_GPIO,     /* SPITZ_GPIO_nSD_DETECT */
+        GPIO81_GPIO,    /* SPITZ_GPIO_nSD_WP */
+        GPIO41_GPIO,    /* SPITZ_GPIO_USB_CONNECT */
+        GPIO37_GPIO,    /* SPITZ_GPIO_USB_HOST */
+        GPIO35_GPIO,    /* SPITZ_GPIO_USB_DEVICE */
+        GPIO22_GPIO,    /* SPITZ_GPIO_HSYNC */
+        GPIO94_GPIO,    /* SPITZ_GPIO_CF_CD */
+        GPIO105_GPIO,   /* SPITZ_GPIO_CF_IRQ */
+        GPIO106_GPIO,   /* SPITZ_GPIO_CF2_IRQ */
+
+        GPIO1_GPIO | WAKEUP_ON_EDGE_RISE,
+};
+
 /*
  * Spitz SCOOP Device #1
  */
@@ -69,10 +136,11 @@ static struct resource spitz_scoop_resources[] = {
 };
 
 static struct scoop_config spitz_scoop_setup = {
-        .io_dir         = SPITZ_SCP_IO_DIR,
+        .io_dir         = SPITZ_SCP_IO_DIR,
         .io_out         = SPITZ_SCP_IO_OUT,
-        .suspend_clr = SPITZ_SCP_SUS_CLR,
-        .suspend_set = SPITZ_SCP_SUS_SET,
+        .suspend_clr    = SPITZ_SCP_SUS_CLR,
+        .suspend_set    = SPITZ_SCP_SUS_SET,
+        .gpio_base      = SPITZ_SCP_GPIO_BASE,
 };
 
 struct platform_device spitzscoop_device = {
@@ -97,10 +165,11 @@ static struct resource spitz_scoop2_resources[] = {
 };
 
 static struct scoop_config spitz_scoop2_setup = {
-        .io_dir         = SPITZ_SCP2_IO_DIR,
+        .io_dir         = SPITZ_SCP2_IO_DIR,
         .io_out         = SPITZ_SCP2_IO_OUT,
-        .suspend_clr = SPITZ_SCP2_SUS_CLR,
-        .suspend_set = SPITZ_SCP2_SUS_SET,
+        .suspend_clr    = SPITZ_SCP2_SUS_CLR,
+        .suspend_set    = SPITZ_SCP2_SUS_SET,
+        .gpio_base      = SPITZ_SCP2_GPIO_BASE,
 };
 
 struct platform_device spitzscoop2_device = {
@@ -122,7 +191,7 @@ static void spitz_card_pwr_ctrl(int device, unsigned short new_cpr)
         unsigned short cpr = read_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR);
 
         if (new_cpr & 0x0007) {
-                set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CF_POWER);
+                gpio_set_value(SPITZ_GPIO_CF_POWER, 1);
                 if (!(cpr & 0x0002) && !(cpr & 0x0004))
                         mdelay(5);
                 if (device == SPITZ_PWR_CF)
@@ -138,34 +207,13 @@ static void spitz_card_pwr_ctrl(int device, unsigned short new_cpr)
                 if (!(cpr & 0x0002) && !(cpr & 0x0004)) {
                         write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, 0x0000);
                         mdelay(1);
-                        reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CF_POWER);
+                        gpio_set_value(SPITZ_GPIO_CF_POWER, 0);
                 } else {
                         write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, cpr | new_cpr);
                 }
         }
 }
 
-static void spitz_pcmcia_init(void)
-{
-        /* Setup default state of GPIO outputs
-           before we enable them as outputs. */
-        GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) |
-                GPIO_bit(GPIO49_nPWE) | GPIO_bit(GPIO50_nPIOR) |
-                GPIO_bit(GPIO51_nPIOW) | GPIO_bit(GPIO54_nPCE_2);
-        GPSR(GPIO85_nPCE_1) = GPIO_bit(GPIO85_nPCE_1);
-
-        pxa_gpio_mode(GPIO48_nPOE_MD);
-        pxa_gpio_mode(GPIO49_nPWE_MD);
-        pxa_gpio_mode(GPIO50_nPIOR_MD);
-        pxa_gpio_mode(GPIO51_nPIOW_MD);
-        pxa_gpio_mode(GPIO55_nPREG_MD);
-        pxa_gpio_mode(GPIO56_nPWAIT_MD);
-        pxa_gpio_mode(GPIO57_nIOIS16_MD);
-        pxa_gpio_mode(GPIO85_nPCE_1_MD);
-        pxa_gpio_mode(GPIO54_nPCE_2_MD);
-        pxa_gpio_mode(GPIO104_pSKTSEL_MD);
-}
-
 static void spitz_pcmcia_pwr(struct device *scoop, unsigned short cpr, int nr)
 {
         /* Only need to override behaviour for slot 0 */
@@ -191,165 +239,169 @@ static struct scoop_pcmcia_dev spitz_pcmcia_scoop[] = {
 static struct scoop_pcmcia_config spitz_pcmcia_config = {
         .devs         = &spitz_pcmcia_scoop[0],
         .num_devs     = 2,
-        .pcmcia_init  = spitz_pcmcia_init,
         .power_ctrl   = spitz_pcmcia_pwr,
 };
 
 EXPORT_SYMBOL(spitzscoop_device);
 EXPORT_SYMBOL(spitzscoop2_device);
 
-
 /*
- * Spitz SSP Device
- *
- * Set the parent as the scoop device because a lot of SSP devices
- * also use scoop functions and this makes the power up/down order
- * work correctly.
+ * Spitz Keyboard Device
  */
-struct platform_device spitzssp_device = {
-        .name           = "corgi-ssp",
-        .dev            = {
-                .parent = &spitzscoop_device.dev,
-        },
+static struct platform_device spitzkbd_device = {
+        .name           = "spitz-keyboard",
         .id             = -1,
 };
 
-struct corgissp_machinfo spitz_ssp_machinfo = {
-        .port           = 2,
-        .cs_lcdcon      = SPITZ_GPIO_LCDCON_CS,
-        .cs_ads7846     = SPITZ_GPIO_ADS7846_CS,
-        .cs_max1111     = SPITZ_GPIO_MAX1111_CS,
-        .clk_lcdcon     = 520,
-        .clk_ads7846    = 14,
-        .clk_max1111    = 56,
-};
-
 
 /*
- * Spitz Backlight Device
+ * Spitz LEDs
  */
-static void spitz_bl_kick_battery(void)
-{
-        void (*kick_batt)(void);
-
-        kick_batt = symbol_get(sharpsl_battery_kick);
-        if (kick_batt) {
-                kick_batt();
-                symbol_put(sharpsl_battery_kick);
-        }
-}
-
-static struct generic_bl_info spitz_bl_machinfo = {
-        .name = "corgi-bl",
-        .default_intensity = 0x1f,
-        .limit_mask = 0x0b,
-        .max_intensity = 0x2f,
-        .kick_battery = spitz_bl_kick_battery,
-};
-
-static struct platform_device spitzbl_device = {
-        .name           = "generic-bl",
-        .dev            = {
-                .platform_data  = &spitz_bl_machinfo,
+static struct gpio_led spitz_gpio_leds[] = {
+        {
+                .name                   = "spitz:amber:charge",
+                .default_trigger        = "sharpsl-charge",
+                .gpio                   = SPITZ_GPIO_LED_ORANGE,
+        },
+        {
+                .name                   = "spitz:green:hddactivity",
+                .default_trigger        = "ide-disk",
+                .gpio                   = SPITZ_GPIO_LED_GREEN,
         },
-        .id             = -1,
 };
 
-
-/*
- * Spitz Keyboard Device
- */
-static struct platform_device spitzkbd_device = {
-        .name           = "spitz-keyboard",
-        .id             = -1,
+static struct gpio_led_platform_data spitz_gpio_leds_info = {
+        .leds           = spitz_gpio_leds,
+        .num_leds       = ARRAY_SIZE(spitz_gpio_leds),
 };
 
-
-/*
- * Spitz LEDs
- */
 static struct platform_device spitzled_device = {
-        .name           = "spitz-led",
+        .name           = "leds-gpio",
         .id             = -1,
+        .dev            = {
+                .platform_data = &spitz_gpio_leds_info,
+        },
 };
 
-/*
- * Spitz Touch Screen Device
- */
+#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE)
+static struct pxa2xx_spi_master spitz_spi_info = {
+        .num_chipselect = 3,
+};
 
-static unsigned long (*get_hsync_invperiod)(struct device *dev);
+static struct ads7846_platform_data spitz_ads7846_info = {
+        .model                  = 7846,
+        .vref_delay_usecs       = 100,
+        .x_plate_ohms           = 419,
+        .y_plate_ohms           = 486,
+        .gpio_pendown           = SPITZ_GPIO_TP_INT,
+};
 
-static void inline sharpsl_wait_sync(int gpio)
+static void spitz_ads7846_cs(u32 command)
 {
-        while((GPLR(gpio) & GPIO_bit(gpio)) == 0);
-        while((GPLR(gpio) & GPIO_bit(gpio)) != 0);
+        gpio_set_value(SPITZ_GPIO_ADS7846_CS, !(command == PXA2XX_CS_ASSERT));
 }
 
-static struct device *spitz_pxafb_dev;
+static struct pxa2xx_spi_chip spitz_ads7846_chip = {
+        .cs_control             = spitz_ads7846_cs,
+};
 
-static int is_pxafb_device(struct device * dev, void * data)
+static void spitz_bl_kick_battery(void)
 {
-        struct platform_device *pdev = container_of(dev, struct platform_device, dev);
-
-        return (strncmp(pdev->name, "pxa2xx-fb", 9) == 0);
-}
+        void (*kick_batt)(void);
 
-static unsigned long spitz_get_hsync_invperiod(void)
-{
-#ifdef CONFIG_FB_PXA
-        if (!spitz_pxafb_dev) {
-                spitz_pxafb_dev = bus_find_device(&platform_bus_type, NULL, NULL, is_pxafb_device);
-                if (!spitz_pxafb_dev)
-                        return 0;
+        kick_batt = symbol_get(sharpsl_battery_kick);
+        if (kick_batt) {
+                kick_batt();
+                symbol_put(sharpsl_battery_kick);
         }
-        if (!get_hsync_invperiod)
-                get_hsync_invperiod = symbol_get(pxafb_get_hsync_time);
-        if (!get_hsync_invperiod)
-#endif
-                return 0;
-
-        return get_hsync_invperiod(spitz_pxafb_dev);
 }
 
-static void spitz_put_hsync(void)
-{
-        put_device(spitz_pxafb_dev);
-        if (get_hsync_invperiod)
-                symbol_put(pxafb_get_hsync_time);
-        spitz_pxafb_dev = NULL;
-        get_hsync_invperiod = NULL;
-}
+static struct corgi_lcd_platform_data spitz_lcdcon_info = {
+        .init_mode              = CORGI_LCD_MODE_VGA,
+        .max_intensity          = 0x2f,
+        .default_intensity      = 0x1f,
+        .limit_mask             = 0x0b,
+        .gpio_backlight_cont    = SPITZ_GPIO_BACKLIGHT_CONT,
+        .gpio_backlight_on      = SPITZ_GPIO_BACKLIGHT_ON,
+        .kick_battery           = spitz_bl_kick_battery,
+};
 
-static void spitz_wait_hsync(void)
+static void spitz_lcdcon_cs(u32 command)
 {
-        sharpsl_wait_sync(SPITZ_GPIO_HSYNC);
+        gpio_set_value(SPITZ_GPIO_LCDCON_CS, !(command == PXA2XX_CS_ASSERT));
 }
 
-static struct resource spitzts_resources[] = {
-        [0] = {
-                .start          = SPITZ_IRQ_GPIO_TP_INT,
-                .end            = SPITZ_IRQ_GPIO_TP_INT,
-                .flags          = IORESOURCE_IRQ,
-        },
+static struct pxa2xx_spi_chip spitz_lcdcon_chip = {
+        .cs_control     = spitz_lcdcon_cs,
 };
 
-static struct corgits_machinfo  spitz_ts_machinfo = {
-        .get_hsync_invperiod = spitz_get_hsync_invperiod,
-        .put_hsync           = spitz_put_hsync,
-        .wait_hsync          = spitz_wait_hsync,
+static void spitz_max1111_cs(u32 command)
+{
+        gpio_set_value(SPITZ_GPIO_MAX1111_CS, !(command == PXA2XX_CS_ASSERT));
+}
+
+static struct pxa2xx_spi_chip spitz_max1111_chip = {
+        .cs_control     = spitz_max1111_cs,
 };
 
-static struct platform_device spitzts_device = {
-        .name           = "corgi-ts",
-        .dev            = {
-                .parent = &spitzssp_device.dev,
-                .platform_data  = &spitz_ts_machinfo,
+static struct spi_board_info spitz_spi_devices[] = {
+        {
+                .modalias       = "ads7846",
+                .max_speed_hz   = 1200000,
+                .bus_num        = 2,
+                .chip_select    = 0,
+                .platform_data  = &spitz_ads7846_info,
+                .controller_data= &spitz_ads7846_chip,
+                .irq            = gpio_to_irq(SPITZ_GPIO_TP_INT),
+        }, {
+                .modalias       = "corgi-lcd",
+                .max_speed_hz   = 50000,
+                .bus_num        = 2,
+                .chip_select    = 1,
+                .platform_data  = &spitz_lcdcon_info,
+                .controller_data= &spitz_lcdcon_chip,
+        }, {
+                .modalias       = "max1111",
+                .max_speed_hz   = 450000,
+                .bus_num        = 2,
+                .chip_select    = 2,
+                .controller_data= &spitz_max1111_chip,
         },
-        .id             = -1,
-        .num_resources  = ARRAY_SIZE(spitzts_resources),
-        .resource       = spitzts_resources,
 };
 
+static void __init spitz_init_spi(void)
+{
+        int err;
+
+        err = gpio_request(SPITZ_GPIO_ADS7846_CS, "ADS7846_CS");
+        if (err)
+                return;
+
+        err = gpio_request(SPITZ_GPIO_LCDCON_CS, "LCDCON_CS");
+        if (err)
+                goto err_free_1;
+
+        err = gpio_request(SPITZ_GPIO_MAX1111_CS, "MAX1111_CS");
+        if (err)
+                goto err_free_2;
+
+        if (machine_is_akita()) {
+                spitz_lcdcon_info.gpio_backlight_cont = AKITA_GPIO_BACKLIGHT_CONT;
+                spitz_lcdcon_info.gpio_backlight_on = AKITA_GPIO_BACKLIGHT_ON;
+        }
+
+        pxa2xx_set_spi_info(2, &spitz_spi_info);
+        spi_register_board_info(ARRAY_AND_SIZE(spitz_spi_devices));
+        return;
+
+err_free_2:
+        gpio_free(SPITZ_GPIO_LCDCON_CS);
+err_free_1:
+        gpio_free(SPITZ_GPIO_ADS7846_CS);
+}
+#else
+static inline void spitz_init_spi(void) {}
+#endif
 
 /*
  * MMC/SD Device
@@ -364,24 +416,35 @@ static int spitz_mci_init(struct device *dev, irq_handler_t spitz_detect_int, vo
 {
         int err;
 
-        /* setup GPIO for PXA27x MMC controller */
-        pxa_gpio_mode(GPIO32_MMCCLK_MD);
-        pxa_gpio_mode(GPIO112_MMCCMD_MD);
-        pxa_gpio_mode(GPIO92_MMCDAT0_MD);
-        pxa_gpio_mode(GPIO109_MMCDAT1_MD);
-        pxa_gpio_mode(GPIO110_MMCDAT2_MD);
-        pxa_gpio_mode(GPIO111_MMCDAT3_MD);
-        pxa_gpio_mode(SPITZ_GPIO_nSD_DETECT | GPIO_IN);
-        pxa_gpio_mode(SPITZ_GPIO_nSD_WP | GPIO_IN);
+        err = gpio_request(SPITZ_GPIO_nSD_DETECT, "nSD_DETECT");
+        if (err)
+                goto err_out;
+
+        err = gpio_request(SPITZ_GPIO_nSD_WP, "nSD_WP");
+        if (err)
+                goto err_free_1;
+
+        gpio_direction_input(SPITZ_GPIO_nSD_DETECT);
+        gpio_direction_input(SPITZ_GPIO_nSD_WP);
 
         spitz_mci_platform_data.detect_delay = msecs_to_jiffies(250);
 
         err = request_irq(SPITZ_IRQ_GPIO_nSD_DETECT, spitz_detect_int,
-                          IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+                          IRQF_DISABLED | IRQF_TRIGGER_RISING |
+                          IRQF_TRIGGER_FALLING,
                           "MMC card detect", data);
-        if (err)
-                printk(KERN_ERR "spitz_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
+        if (err) {
+                pr_err("%s: MMC/SD: can't request MMC card detect IRQ\n",
+                                __func__);
+                goto err_free_2;
+        }
+        return 0;
 
+err_free_2:
+        gpio_free(SPITZ_GPIO_nSD_WP);
+err_free_1:
+        gpio_free(SPITZ_GPIO_nSD_DETECT);
+err_out:
         return err;
 }
 
@@ -397,12 +460,14 @@ static void spitz_mci_setpower(struct device *dev, unsigned int vdd)
 
 static int spitz_mci_get_ro(struct device *dev)
 {
-        return GPLR(SPITZ_GPIO_nSD_WP) & GPIO_bit(SPITZ_GPIO_nSD_WP);
+        return gpio_get_value(SPITZ_GPIO_nSD_WP);
 }
 
 static void spitz_mci_exit(struct device *dev, void *data)
 {
         free_irq(SPITZ_IRQ_GPIO_nSD_DETECT, data);
+        gpio_free(SPITZ_GPIO_nSD_WP);
+        gpio_free(SPITZ_GPIO_nSD_DETECT);
 }
 
 static struct pxamci_platform_data spitz_mci_platform_data = {
@@ -419,27 +484,24 @@ static struct pxamci_platform_data spitz_mci_platform_data = {
  */
 static int spitz_ohci_init(struct device *dev)
 {
-        /* Only Port 2 is connected */
-        pxa_gpio_mode(SPITZ_GPIO_USB_CONNECT | GPIO_IN);
-        pxa_gpio_mode(SPITZ_GPIO_USB_HOST | GPIO_OUT);
-        pxa_gpio_mode(SPITZ_GPIO_USB_DEVICE | GPIO_IN);
-
-        /* Setup USB Port 2 Output Control Register */
-        UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE;
-
-        GPSR(SPITZ_GPIO_USB_HOST) = GPIO_bit(SPITZ_GPIO_USB_HOST);
+        int err;
 
-        UHCHR = (UHCHR) &
-                ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
+        err = gpio_request(SPITZ_GPIO_USB_HOST, "USB_HOST");
+        if (err)
+                return err;
 
-        UHCRHDA |= UHCRHDA_NOCP;
+        /* Only Port 2 is connected
+         * Setup USB Port 2 Output Control Register
+         */
+        UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE;
 
-        return 0;
+        return gpio_direction_output(SPITZ_GPIO_USB_HOST, 1);
 }
 
 static struct pxaohci_platform_data spitz_ohci_platform_data = {
         .port_mode      = PMM_NPS_MODE,
         .init           = spitz_ohci_init,
+        .flags          = ENABLE_PORT_ALL | NO_OC_PROTECTION,
         .power_budget   = 150,
 };
 
@@ -447,29 +509,50 @@ static struct pxaohci_platform_data spitz_ohci_platform_data = {
 /*
  * Irda
  */
+static int spitz_irda_startup(struct device *dev)
+{
+        int rc;
+
+        rc = gpio_request(SPITZ_GPIO_IR_ON, "IrDA on");
+        if (rc)
+                goto err;
+
+        rc = gpio_direction_output(SPITZ_GPIO_IR_ON, 1);
+        if (rc)
+                goto err_dir;
+
+        return 0;
+
+err_dir:
+        gpio_free(SPITZ_GPIO_IR_ON);
+err:
+        return rc;
+}
+
+static void spitz_irda_shutdown(struct device *dev)
+{
+        gpio_free(SPITZ_GPIO_IR_ON);
+}
+
 static void spitz_irda_transceiver_mode(struct device *dev, int mode)
 {
-        if (mode & IR_OFF)
-                set_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_IR_ON);
-        else
-                reset_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_IR_ON);
+        gpio_set_value(SPITZ_GPIO_IR_ON, mode & IR_OFF);
         pxa2xx_transceiver_mode(dev, mode);
 }
 
 #ifdef CONFIG_MACH_AKITA
 static void akita_irda_transceiver_mode(struct device *dev, int mode)
 {
-        if (mode & IR_OFF)
-                akita_set_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_IR_ON);
-        else
-                akita_reset_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_IR_ON);
+        gpio_set_value(AKITA_GPIO_IR_ON, mode & IR_OFF);
         pxa2xx_transceiver_mode(dev, mode);
 }
 #endif
 
 static struct pxaficp_platform_data spitz_ficp_platform_data = {
-        .transceiver_cap  = IR_SIRMODE | IR_OFF,
-        .transceiver_mode = spitz_irda_transceiver_mode,
+        .transceiver_cap        = IR_SIRMODE | IR_OFF,
+        .transceiver_mode       = spitz_irda_transceiver_mode,
+        .startup                = spitz_irda_startup,
+        .shutdown               = spitz_irda_shutdown,
 };
 
 
@@ -477,14 +560,6 @@ static struct pxaficp_platform_data spitz_ficp_platform_data = {
  * Spitz PXA Framebuffer
  */
 
-static void spitz_lcd_power(int on, struct fb_var_screeninfo *var)
-{
-        if (on)
-                corgi_lcdtg_hw_init(var->xres);
-        else
-                corgi_lcdtg_suspend();
-}
-
 static struct pxafb_mode_info spitz_pxafb_modes[] = {
 {
         .pixclock       = 19231,
@@ -517,18 +592,13 @@ static struct pxafb_mach_info spitz_pxafb_info = {
         .modes          = &spitz_pxafb_modes[0],
         .num_modes      = 2,
         .fixed_modes    = 1,
-        .lccr0          = LCCR0_Color | LCCR0_Sngl | LCCR0_Act | LCCR0_LDDALT | LCCR0_OUC | LCCR0_CMDIM | LCCR0_RDSTM,
-        .lccr3          = LCCR3_PixRsEdg | LCCR3_OutEnH,
-        .pxafb_lcd_power = spitz_lcd_power,
+        .lcd_conn       = LCD_COLOR_TFT_16BPP | LCD_ALTERNATE_MAPPING,
 };
 
 
 static struct platform_device *devices[] __initdata = {
         &spitzscoop_device,
-        &spitzssp_device,
         &spitzkbd_device,
-        &spitzts_device,
-        &spitzbl_device,
         &spitzled_device,
 };
 
@@ -554,57 +624,26 @@ static void __init common_init(void)
 
         PMCR = 0x00;
 
-        /* setup sleep mode values */
-        PWER  = 0x00000002;
-        PFER  = 0x00000000;
-        PRER  = 0x00000002;
-        PGSR0 = 0x0158C000;
-        PGSR1 = 0x00FF0080;
-        PGSR2 = 0x0001C004;
-
         /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
         PCFR |= PCFR_OPDE;
 
-        corgi_ssp_set_machinfo(&spitz_ssp_machinfo);
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(spitz_pin_config));
 
-        pxa_gpio_mode(SPITZ_GPIO_HSYNC | GPIO_IN);
+        spitz_init_spi();
 
         platform_add_devices(devices, ARRAY_SIZE(devices));
         pxa_set_mci_info(&spitz_mci_platform_data);
         pxa_set_ohci_info(&spitz_ohci_platform_data);
         pxa_set_ficp_info(&spitz_ficp_platform_data);
-        set_pxa_fb_parent(&spitzssp_device.dev);
         set_pxa_fb_info(&spitz_pxafb_info);
         pxa_set_i2c_info(NULL);
 }
 
 #if defined(CONFIG_MACH_SPITZ) || defined(CONFIG_MACH_BORZOI)
-static void spitz_bl_set_intensity(int intensity)
-{
-        if (intensity > 0x10)
-                intensity += 0x10;
-
-        /* Bits 0-4 are accessed via the SSP interface */
-        corgi_ssp_blduty_set(intensity & 0x1f);
-
-        /* Bit 5 is via SCOOP */
-        if (intensity & 0x0020)
-                reset_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_CONT);
-        else
-                set_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_CONT);
-
-        if (intensity)
-                set_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_ON);
-        else
-                reset_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_ON);
-}
-
 static void __init spitz_init(void)
 {
         platform_scoop_config = &spitz_pcmcia_config;
 
-        spitz_bl_machinfo.set_bl_intensity = spitz_bl_set_intensity;
-
         common_init();
 
         platform_device_register(&spitzscoop2_device);
@@ -615,32 +654,17 @@ static void __init spitz_init(void)
 /*
  * Akita IO Expander
  */
-struct platform_device akitaioexp_device = {
-        .name           = "akita-ioexp",
-        .id             = -1,
+static struct pca953x_platform_data akita_ioexp = {
+        .gpio_base              = AKITA_IOEXP_GPIO_BASE,
 };
 
-EXPORT_SYMBOL_GPL(akitaioexp_device);
-
-static void akita_bl_set_intensity(int intensity)
-{
-        if (intensity > 0x10)
-                intensity += 0x10;
-
-        /* Bits 0-4 are accessed via the SSP interface */
-        corgi_ssp_blduty_set(intensity & 0x1f);
-
-        /* Bit 5 is via IO-Expander */
-        if (intensity & 0x0020)
-                akita_reset_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_CONT);
-        else
-                akita_set_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_CONT);
-
-        if (intensity)
-                akita_set_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_ON);
-        else
-                akita_reset_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_ON);
-}
+static struct i2c_board_info akita_i2c_board_info[] = {
+        {
+                .type           = "max7310",
+                .addr           = 0x18,
+                .platform_data  = &akita_ioexp,
+        },
+};
 
 static void __init akita_init(void)
 {
@@ -649,11 +673,10 @@ static void __init akita_init(void)
         /* We just pretend the second element of the array doesn't exist */
         spitz_pcmcia_config.num_devs = 1;
         platform_scoop_config = &spitz_pcmcia_config;
-        spitz_bl_machinfo.set_bl_intensity = akita_bl_set_intensity;
 
-        platform_device_register(&akitaioexp_device);
+        pxa_set_i2c_info(NULL);
+        i2c_register_board_info(0, ARRAY_AND_SIZE(akita_i2c_board_info));
 
-        spitzscoop_device.dev.parent = &akitaioexp_device.dev;
         common_init();
 }
 #endif
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index 8a40505dfd28..53018db106ac 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -21,7 +21,6 @@
 #include <asm/irq.h>
 #include <asm/mach-types.h>
 #include <mach/hardware.h>
-#include <asm/hardware/scoop.h>
 
 #include <mach/sharpsl.h>
 #include <mach/spitz.h>
@@ -48,44 +47,35 @@ static void spitz_charger_init(void)
 
 static void spitz_measure_temp(int on)
 {
-        if (on)
-                set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_ADC_TEMP_ON);
-        else
-                reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_ADC_TEMP_ON);
+        gpio_set_value(SPITZ_GPIO_ADC_TEMP_ON, on);
 }
 
 static void spitz_charge(int on)
 {
         if (on) {
                 if (sharpsl_pm.flags & SHARPSL_SUSPENDED) {
-                        set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_JK_B);
-                        reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CHRG_ON);
+                        gpio_set_value(SPITZ_GPIO_JK_B, 1);
+                        gpio_set_value(SPITZ_GPIO_CHRG_ON, 0);
                 } else {
-                        reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_JK_B);
-                        reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CHRG_ON);
+                        gpio_set_value(SPITZ_GPIO_JK_B, 0);
+                        gpio_set_value(SPITZ_GPIO_CHRG_ON, 0);
                 }
         } else {
-                reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_JK_B);
-                set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CHRG_ON);
+                gpio_set_value(SPITZ_GPIO_JK_B, 0);
+                gpio_set_value(SPITZ_GPIO_CHRG_ON, 1);
         }
 }
 
 static void spitz_discharge(int on)
 {
-        if (on)
-                set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_JK_A);
-        else
-                reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_JK_A);
+        gpio_set_value(SPITZ_GPIO_JK_A, on);
 }
 
 /* HACK - For unknown reasons, accurate voltage readings are only made with a load
    on the power bus which the green led on spitz provides */
 static void spitz_discharge1(int on)
 {
-        if (on)
-                set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_LED_GREEN);
-        else
-                reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_LED_GREEN);
+        gpio_set_value(SPITZ_GPIO_LED_GREEN, on);
 }
 
 static void spitz_presuspend(void)
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index 67e18509d7bf..18d149745837 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -155,7 +155,7 @@ static void __init pxa_timer_init(void)
         OIER = 0;
         OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3;
 
-        if (cpu_is_pxa21x() || cpu_is_pxa25x())
+        if (cpu_is_pxa25x())
                 clock_tick_rate = 3686400;
         else if (machine_is_mainstone())
                 clock_tick_rate = 3249600;
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index 3ed757e6bcc8..a13dbf3c2c05 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -22,8 +22,8 @@
 #include <linux/fb.h>
 #include <linux/ioport.h>
 #include <linux/delay.h>
-#include <linux/serial_8250.h>
-#include <linux/mtd/mtd.h>
+#include <linux/gpio.h>
+#include <linux/dm9000.h>
 #include <linux/mtd/physmap.h>
 #include <linux/mtd/partitions.h>
 
@@ -31,7 +31,6 @@
 #include <asm/setup.h>
 #include <asm/memory.h>
 #include <asm/mach-types.h>
-#include <mach/hardware.h>
 #include <asm/irq.h>
 #include <asm/sizes.h>
 
@@ -40,41 +39,148 @@
 #include <asm/mach/irq.h>
 #include <asm/mach/flash.h>
 
+#include <mach/hardware.h>
 #include <mach/pxa-regs.h>
 #include <mach/pxa2xx-regs.h>
-#include <mach/pxa2xx-gpio.h>
+#include <mach/mfp-pxa27x.h>
+#include <mach/pxa2xx_spi.h>
 #include <mach/trizeps4.h>
 #include <mach/audio.h>
 #include <mach/pxafb.h>
 #include <mach/mmc.h>
 #include <mach/irda.h>
 #include <mach/ohci.h>
+#include <mach/i2c.h>
 
 #include "generic.h"
 #include "devices.h"
 
-/********************************************************************************************
+/*      comment out the following line if you want to use the
+ *      Standard UART from PXA for serial / irda transmission
+ *      and acivate it if you have status leds connected */
+#define STATUS_LEDS_ON_STUART_PINS 1
+
+/*****************************************************************************
+ * MultiFunctionPins of CPU
+ *****************************************************************************/
+static unsigned long trizeps4_pin_config[] __initdata = {
+        /* Chip Selects */
+        GPIO15_nCS_1,           /* DiskOnChip CS */
+        GPIO93_GPIO,            /* TRIZEPS4_DOC_IRQ */
+        GPIO94_GPIO,            /* DOC lock */
+
+        GPIO78_nCS_2,           /* DM9000 CS */
+        GPIO101_GPIO,           /* TRIZEPS4_ETH_IRQ */
+
+        GPIO79_nCS_3,           /* Logic CS */
+        GPIO0_GPIO | WAKEUP_ON_EDGE_RISE,       /* Logic irq */
+
+        /* LCD - 16bpp Active TFT */
+        GPIO58_LCD_LDD_0,
+        GPIO59_LCD_LDD_1,
+        GPIO60_LCD_LDD_2,
+        GPIO61_LCD_LDD_3,
+        GPIO62_LCD_LDD_4,
+        GPIO63_LCD_LDD_5,
+        GPIO64_LCD_LDD_6,
+        GPIO65_LCD_LDD_7,
+        GPIO66_LCD_LDD_8,
+        GPIO67_LCD_LDD_9,
+        GPIO68_LCD_LDD_10,
+        GPIO69_LCD_LDD_11,
+        GPIO70_LCD_LDD_12,
+        GPIO71_LCD_LDD_13,
+        GPIO72_LCD_LDD_14,
+        GPIO73_LCD_LDD_15,
+        GPIO74_LCD_FCLK,
+        GPIO75_LCD_LCLK,
+        GPIO76_LCD_PCLK,
+        GPIO77_LCD_BIAS,
+
+        /* UART */
+        GPIO9_FFUART_CTS,
+        GPIO10_FFUART_DCD,
+        GPIO16_FFUART_TXD,
+        GPIO33_FFUART_DSR,
+        GPIO38_FFUART_RI,
+        GPIO82_FFUART_DTR,
+        GPIO83_FFUART_RTS,
+        GPIO96_FFUART_RXD,
+
+        GPIO42_BTUART_RXD,
+        GPIO43_BTUART_TXD,
+        GPIO44_BTUART_CTS,
+        GPIO45_BTUART_RTS,
+#ifdef STATUS_LEDS_ON_STUART_PINS
+        GPIO46_GPIO,
+        GPIO47_GPIO,
+#else
+        GPIO46_STUART_RXD,
+        GPIO47_STUART_TXD,
+#endif
+        /* PCMCIA */
+        GPIO11_GPIO,                    /* TRIZEPS4_CD_IRQ */
+        GPIO13_GPIO,                    /* TRIZEPS4_READY_NINT */
+        GPIO48_nPOE,
+        GPIO49_nPWE,
+        GPIO50_nPIOR,
+        GPIO51_nPIOW,
+        GPIO54_nPCE_2,
+        GPIO55_nPREG,
+        GPIO56_nPWAIT,
+        GPIO57_nIOIS16,
+        GPIO102_nPCE_1,
+        GPIO104_PSKTSEL,
+
+        /* MultiMediaCard */
+        GPIO32_MMC_CLK,
+        GPIO92_MMC_DAT_0,
+        GPIO109_MMC_DAT_1,
+        GPIO110_MMC_DAT_2,
+        GPIO111_MMC_DAT_3,
+        GPIO112_MMC_CMD,
+        GPIO12_GPIO,                    /* TRIZEPS4_MMC_IRQ */
+
+        /* USB OHCI */
+        GPIO88_USBH1_PWR,               /* USBHPWR1 */
+        GPIO89_USBH1_PEN,               /* USBHPEN1 */
+
+        /* I2C */
+        GPIO117_I2C_SCL,
+        GPIO118_I2C_SDA,
+};
+
+static unsigned long trizeps4wl_pin_config[] __initdata = {
+        /* SSP 2 */
+        GPIO14_SSP2_SFRM,
+        GPIO19_SSP2_SCLK,
+        GPIO53_GPIO,                    /* TRIZEPS4_SPI_IRQ */
+        GPIO86_SSP2_RXD,
+        GPIO87_SSP2_TXD,
+};
+
+/****************************************************************************
  * ONBOARD FLASH
- ********************************************************************************************/
+ ****************************************************************************/
 static struct mtd_partition trizeps4_partitions[] = {
         {
                 .name =         "Bootloader",
                 .offset =       0x00000000,
                 .size =         0x00040000,
                 .mask_flags =   MTD_WRITEABLE  /* force read-only */
-        },{
+        }, {
                 .name =         "Backup",
                 .offset =       0x00040000,
                 .size =         0x00040000,
-        },{
+        }, {
                 .name =         "Image",
                 .offset =       0x00080000,
                 .size =         0x01080000,
-        },{
+        }, {
                 .name =         "IPSM",
                 .offset =       0x01100000,
                 .size =         0x00e00000,
-        },{
+        }, {
                 .name =         "Registry",
                 .offset =       0x01f00000,
                 .size =         MTDPART_SIZ_FULL,
@@ -105,9 +211,9 @@ static struct platform_device flash_device = {
         .num_resources = 1,
 };
 
-/********************************************************************************************
+/****************************************************************************
  * DAVICOM DM9000 Ethernet
- ********************************************************************************************/
+ ****************************************************************************/
 static struct resource dm9000_resources[] = {
         [0] = {
                 .start  = TRIZEPS4_ETH_PHYS+0x300,
@@ -122,67 +228,68 @@ static struct resource dm9000_resources[] = {
         [2] = {
                 .start  = TRIZEPS4_ETH_IRQ,
                 .end    = TRIZEPS4_ETH_IRQ,
-                .flags  = (IORESOURCE_IRQ | IRQ_TYPE_EDGE_RISING),
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
         },
 };
 
+static struct dm9000_plat_data tri_dm9000_platdata = {
+        .flags          = DM9000_PLATF_32BITONLY,
+};
+
 static struct platform_device dm9000_device = {
         .name           = "dm9000",
         .id             = -1,
         .num_resources  = ARRAY_SIZE(dm9000_resources),
         .resource       = dm9000_resources,
+        .dev            = {
+                .platform_data = &tri_dm9000_platdata,
+        }
 };
 
-/********************************************************************************************
- * PXA270 serial ports
- ********************************************************************************************/
-static struct plat_serial8250_port tri_serial_ports[] = {
-#ifdef CONFIG_SERIAL_PXA
-        /* this uses the own PXA driver */
+/****************************************************************************
+ * LED's on GPIO pins of PXA
+ ****************************************************************************/
+static struct gpio_led trizeps4_led[] = {
+#ifdef STATUS_LEDS_ON_STUART_PINS
         {
-                0,
-        },
-#else
-        /* this uses the generic 8520 driver */
-        [0] = {
-                .membase        = (void *)&FFUART,
-                .irq            = IRQ_FFUART,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .iotype         = UPIO_MEM32,
-                .regshift       = 2,
-                .uartclk        = (921600*16),
-        },
-        [1] = {
-                .membase        = (void *)&BTUART,
-                .irq            = IRQ_BTUART,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .iotype         = UPIO_MEM32,
-                .regshift       = 2,
-                .uartclk        = (921600*16),
+                .name = "led0:orange:heartbeat",        /* */
+                .default_trigger = "heartbeat",
+                .gpio = GPIO_HEARTBEAT_LED,
+                .active_low = 1,
         },
         {
-                0,
+                .name = "led1:yellow:cpubusy",          /* */
+                .default_trigger = "cpu-busy",
+                .gpio = GPIO_SYS_BUSY_LED,
+                .active_low = 1,
         },
 #endif
 };
 
-static struct platform_device uart_devices = {
-        .name           = "serial8250",
-        .id             = 0,
+static struct gpio_led_platform_data trizeps4_led_data = {
+        .leds           = trizeps4_led,
+        .num_leds       = ARRAY_SIZE(trizeps4_led),
+};
+
+static struct platform_device leds_devices = {
+        .name           = "leds-gpio",
+        .id             = -1,
         .dev            = {
-                .platform_data  = tri_serial_ports,
+                .platform_data  = &trizeps4_led_data,
         },
-        .num_resources  = 0,
-        .resource       = NULL,
 };
 
-static struct platform_device * trizeps4_devices[] __initdata = {
+static struct platform_device *trizeps4_devices[] __initdata = {
         &flash_device,
-        &uart_devices,
         &dm9000_device,
+        &leds_devices,
+};
+
+static struct platform_device *trizeps4wl_devices[] __initdata = {
+        &flash_device,
+        &leds_devices,
 };
 
-#ifdef CONFIG_MACH_TRIZEPS4_CONXS
 static short trizeps_conxs_bcr;
 
 /* PCCARD power switching supports only 3,3V */
@@ -192,108 +299,63 @@ void board_pcmcia_power(int power)
                 /* switch power on, put in reset and enable buffers */
                 trizeps_conxs_bcr |= power;
                 trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
-                trizeps_conxs_bcr &= ~(ConXS_BCR_CF_BUF_EN);
-                ConXS_BCR = trizeps_conxs_bcr;
+                trizeps_conxs_bcr &= ~ConXS_BCR_CF_BUF_EN;
+                BCR_writew(trizeps_conxs_bcr);
                 /* wait a little */
                 udelay(2000);
                 /* take reset away */
-                trizeps_conxs_bcr &= ~(ConXS_BCR_CF_RESET);
-                ConXS_BCR = trizeps_conxs_bcr;
+                trizeps_conxs_bcr &= ~ConXS_BCR_CF_RESET;
+                BCR_writew(trizeps_conxs_bcr);
                 udelay(2000);
         } else {
                 /* put in reset */
                 trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
-                ConXS_BCR = trizeps_conxs_bcr;
+                BCR_writew(trizeps_conxs_bcr);
                 udelay(1000);
                 /* switch power off */
-                trizeps_conxs_bcr &= ~(0xf);
-                ConXS_BCR = trizeps_conxs_bcr;
-
+                trizeps_conxs_bcr &= ~0xf;
+                BCR_writew(trizeps_conxs_bcr);
         }
-        pr_debug("%s: o%s 0x%x\n", __func__, power ? "n": "ff", trizeps_conxs_bcr);
+        pr_debug("%s: o%s 0x%x\n", __func__, power ? "n" : "ff",
+                        trizeps_conxs_bcr);
 }
+EXPORT_SYMBOL(board_pcmcia_power);
 
 /* backlight power switching for LCD panel */
 static void board_backlight_power(int on)
 {
-        if (on) {
+        if (on)
                 trizeps_conxs_bcr |= ConXS_BCR_L_DISP;
-        } else {
+        else
                 trizeps_conxs_bcr &= ~ConXS_BCR_L_DISP;
-        }
-        pr_debug("%s: o%s 0x%x\n", __func__, on ? "n" : "ff", trizeps_conxs_bcr);
-        ConXS_BCR = trizeps_conxs_bcr;
-}
 
-/* Powersupply for MMC/SD cardslot */
-static void board_mci_power(struct device *dev, unsigned int vdd)
-{
-        struct pxamci_platform_data* p_d = dev->platform_data;
-
-        if (( 1 << vdd) & p_d->ocr_mask) {
-                pr_debug("%s: on\n", __func__);
-                /* FIXME fill in values here */
-        } else {
-                pr_debug("%s: off\n", __func__);
-                /* FIXME fill in values here */
-        }
-}
-
-static short trizeps_conxs_ircr;
-
-/* Switch modes and Power for IRDA receiver */
-static void board_irda_mode(struct device *dev, int mode)
-{
-        unsigned long flags;
-
-        local_irq_save(flags);
-        if (mode & IR_SIRMODE) {
-                /* Slow mode */
-                trizeps_conxs_ircr &= ~ConXS_IRCR_MODE;
-        } else if (mode & IR_FIRMODE) {
-                /* Fast mode */
-                trizeps_conxs_ircr |= ConXS_IRCR_MODE;
-        }
-        pxa2xx_transceiver_mode(dev, mode);
-        if (mode & IR_OFF) {
-                trizeps_conxs_ircr |= ConXS_IRCR_SD;
-        } else {
-                trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
-        }
-        /* FIXME write values to register */
-        local_irq_restore(flags);
+        pr_debug("%s: o%s 0x%x\n", __func__, on ? "n" : "ff",
+                        trizeps_conxs_bcr);
+        BCR_writew(trizeps_conxs_bcr);
 }
 
-#else
-/* for other baseboards define dummies */
-void board_pcmcia_power(int power)      {;}
-#define board_backlight_power           NULL
-#define board_mci_power                 NULL
-#define board_irda_mode                 NULL
-
-#endif          /* CONFIG_MACH_TRIZEPS4_CONXS */
-EXPORT_SYMBOL(board_pcmcia_power);
+/* a I2C based RTC is known on CONXS board */
+static struct i2c_board_info trizeps4_i2c_devices[] __initdata = {
+        { I2C_BOARD_INFO("rtc-pcf8593", 0x51) }
+};
 
-static int trizeps4_mci_init(struct device *dev, irq_handler_t mci_detect_int, void *data)
+/****************************************************************************
+ * MMC card slot external to module
+ ****************************************************************************/
+static int trizeps4_mci_init(struct device *dev, irq_handler_t mci_detect_int,
+                void *data)
 {
         int err;
-        /* setup GPIO for PXA27x MMC controller */
-        pxa_gpio_mode(GPIO32_MMCCLK_MD);
-        pxa_gpio_mode(GPIO112_MMCCMD_MD);
-        pxa_gpio_mode(GPIO92_MMCDAT0_MD);
-        pxa_gpio_mode(GPIO109_MMCDAT1_MD);
-        pxa_gpio_mode(GPIO110_MMCDAT2_MD);
-        pxa_gpio_mode(GPIO111_MMCDAT3_MD);
-
-        pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN);
 
         err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int,
-                          IRQF_DISABLED | IRQF_TRIGGER_RISING,
-                          "MMC card detect", data);
-        if (err)
-                printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
-
-        return err;
+                IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_SAMPLE_RANDOM,
+                "MMC card detect", data);
+        if (err) {
+                printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request"
+                                                "MMC card detect IRQ\n");
+                return -1;
+        }
+        return 0;
 }
 
 static void trizeps4_mci_exit(struct device *dev, void *data)
@@ -303,39 +365,69 @@ static void trizeps4_mci_exit(struct device *dev, void *data)
 
 static struct pxamci_platform_data trizeps4_mci_platform_data = {
         .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
+        .detect_delay   = 1,
         .init           = trizeps4_mci_init,
         .exit           = trizeps4_mci_exit,
-        .setpower       = board_mci_power,
+        .get_ro         = NULL, /* write-protection not supported */
+        .setpower       = NULL, /* power-switching not supported */
 };
 
-static struct pxaficp_platform_data trizeps4_ficp_platform_data = {
-        .transceiver_cap  = IR_SIRMODE | IR_FIRMODE | IR_OFF,
-        .transceiver_mode = board_irda_mode,
-};
+/****************************************************************************
+ * IRDA mode switching on stuart
+ ****************************************************************************/
+#ifndef STATUS_LEDS_ON_STUART_PINS
+static short trizeps_conxs_ircr;
 
-static int trizeps4_ohci_init(struct device *dev)
+static int trizeps4_irda_startup(struct device *dev)
 {
-        /* setup Port1 GPIO pin. */
-        pxa_gpio_mode( 88 | GPIO_ALT_FN_1_IN);  /* USBHPWR1 */
-        pxa_gpio_mode( 89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */
-
-        /* Set the Power Control Polarity Low and Power Sense
-           Polarity Low to active low. */
-        UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
-                ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
-
+        trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
+        IRCR_writew(trizeps_conxs_ircr);
         return 0;
 }
 
-static void trizeps4_ohci_exit(struct device *dev)
+static void trizeps4_irda_shutdown(struct device *dev)
+{
+        trizeps_conxs_ircr |= ConXS_IRCR_SD;
+        IRCR_writew(trizeps_conxs_ircr);
+}
+
+static void trizeps4_irda_transceiver_mode(struct device *dev, int mode)
 {
-        ;
+        unsigned long flags;
+
+        local_irq_save(flags);
+        /* Switch mode */
+        if (mode & IR_SIRMODE)
+                trizeps_conxs_ircr &= ~ConXS_IRCR_MODE; /* Slow mode */
+        else if (mode & IR_FIRMODE) {
+                trizeps_conxs_ircr |= ConXS_IRCR_MODE;  /* Fast mode */
+
+        /* Switch power */
+        if (mode & IR_OFF)
+                trizeps_conxs_ircr |= ConXS_IRCR_SD;
+        else
+                trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
+
+        IRCR_writew(trizeps_conxs_ircr);
+        local_irq_restore(flags);
+
+        pxa2xx_transceiver_mode(dev, mode);
 }
 
+static struct pxaficp_platform_data trizeps4_ficp_platform_data = {
+        .transceiver_cap        = IR_SIRMODE | IR_FIRMODE | IR_OFF,
+        .transceiver_mode       = trizeps4_irda_transceiver_mode,
+        .startup                = trizeps4_irda_startup,
+        .shutdown               = trizeps4_irda_shutdown,
+};
+#endif
+
+/****************************************************************************
+ * OHCI USB port
+ ****************************************************************************/
 static struct pxaohci_platform_data trizeps4_ohci_platform_data = {
         .port_mode      = PMM_PERPORT_MODE,
-        .init           = trizeps4_ohci_init,
-        .exit           = trizeps4_ohci_exit,
+        .flags          = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
 };
 
 static struct map_desc trizeps4_io_desc[] __initdata = {
@@ -372,105 +464,80 @@ static struct map_desc trizeps4_io_desc[] __initdata = {
 };
 
 static struct pxafb_mode_info sharp_lcd_mode = {
-    .pixclock           = 78000,
-    .xres               = 640,
-    .yres               = 480,
-    .bpp                = 8,
-    .hsync_len          = 4,
-    .left_margin        = 4,
-    .right_margin       = 4,
-    .vsync_len          = 2,
-    .upper_margin       = 0,
-    .lower_margin       = 0,
-    .sync               = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-    .cmap_greyscale     = 0,
+        .pixclock       = 78000,
+        .xres           = 640,
+        .yres           = 480,
+        .bpp            = 8,
+        .hsync_len      = 4,
+        .left_margin    = 4,
+        .right_margin   = 4,
+        .vsync_len      = 2,
+        .upper_margin   = 0,
+        .lower_margin   = 0,
+        .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+        .cmap_greyscale = 0,
 };
 
 static struct pxafb_mach_info sharp_lcd = {
-    .modes              = &sharp_lcd_mode,
-    .num_modes  = 1,
-    .cmap_inverse       = 0,
-    .cmap_static        = 0,
-    .lccr0              = LCCR0_Color | LCCR0_Pas | LCCR0_Dual,
-    .lccr3              = 0x0340ff02,
-    .pxafb_backlight_power = board_backlight_power,
+        .modes          = &sharp_lcd_mode,
+        .num_modes      = 1,
+        .lcd_conn       = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL,
+        .cmap_inverse   = 0,
+        .cmap_static    = 0,
+        .pxafb_backlight_power = board_backlight_power,
 };
 
 static struct pxafb_mode_info toshiba_lcd_mode = {
-    .pixclock           = 39720,
-    .xres               = 640,
-    .yres               = 480,
-    .bpp                = 8,
-    .hsync_len          = 63,
-    .left_margin        = 12,
-    .right_margin       = 12,
-    .vsync_len          = 4,
-    .upper_margin       = 32,
-    .lower_margin       = 10,
-    .sync               = 0,
-    .cmap_greyscale     = 0,
+        .pixclock       = 39720,
+        .xres           = 640,
+        .yres           = 480,
+        .bpp            = 8,
+        .hsync_len      = 63,
+        .left_margin    = 12,
+        .right_margin   = 12,
+        .vsync_len      = 4,
+        .upper_margin   = 32,
+        .lower_margin   = 10,
+        .sync           = 0,
+        .cmap_greyscale = 0,
 };
 
 static struct pxafb_mach_info toshiba_lcd = {
-    .modes              = &toshiba_lcd_mode,
-    .num_modes  = 1,
-    .cmap_inverse       = 0,
-    .cmap_static        = 0,
-    .lccr0              = LCCR0_Color | LCCR0_Act,
-    .lccr3              = 0x03400002,
-    .pxafb_backlight_power = board_backlight_power,
+        .modes          = &toshiba_lcd_mode,
+        .num_modes      = 1,
+        .lcd_conn       = (LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL),
+        .cmap_inverse   = 0,
+        .cmap_static    = 0,
+        .pxafb_backlight_power = board_backlight_power,
 };
 
 static void __init trizeps4_init(void)
 {
-        platform_add_devices(trizeps4_devices, ARRAY_SIZE(trizeps4_devices));
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(trizeps4_pin_config));
+        if (machine_is_trizeps4wl()) {
+                pxa2xx_mfp_config(ARRAY_AND_SIZE(trizeps4wl_pin_config));
+                platform_add_devices(trizeps4wl_devices,
+                                        ARRAY_SIZE(trizeps4wl_devices));
+        } else {
+                platform_add_devices(trizeps4_devices,
+                                        ARRAY_SIZE(trizeps4_devices));
+        }
 
-/*      set_pxa_fb_info(&sharp_lcd); */
-        set_pxa_fb_info(&toshiba_lcd);
+        if (0)  /* dont know how to determine LCD */
+                set_pxa_fb_info(&sharp_lcd);
+        else
+                set_pxa_fb_info(&toshiba_lcd);
 
         pxa_set_mci_info(&trizeps4_mci_platform_data);
+#ifndef STATUS_LEDS_ON_STUART_PINS
         pxa_set_ficp_info(&trizeps4_ficp_platform_data);
+#endif
         pxa_set_ohci_info(&trizeps4_ohci_platform_data);
         pxa_set_ac97_info(NULL);
-}
-
-static void __init trizeps4_map_io(void)
-{
-        pxa_map_io();
-        iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc));
-
-        /* for DiskOnChip */
-        pxa_gpio_mode(GPIO15_nCS_1_MD);
-
-        /* for off-module PIC on ConXS board */
-        pxa_gpio_mode(GPIO_PIC | GPIO_IN);
-
-        /* UCB1400 irq */
-        pxa_gpio_mode(GPIO_UCB1400 | GPIO_IN);
-
-        /* for DM9000 LAN */
-        pxa_gpio_mode(GPIO78_nCS_2_MD);
-        pxa_gpio_mode(GPIO_DM9000 | GPIO_IN);
-
-        /* for PCMCIA device */
-        pxa_gpio_mode(GPIO_PCD | GPIO_IN);
-        pxa_gpio_mode(GPIO_PRDY | GPIO_IN);
-
-        /* for I2C adapter */
-        pxa_gpio_mode(GPIO117_I2CSCL_MD);
-        pxa_gpio_mode(GPIO118_I2CSDA_MD);
+        pxa_set_i2c_info(NULL);
+        i2c_register_board_info(0, trizeps4_i2c_devices,
+                                        ARRAY_SIZE(trizeps4_i2c_devices));
 
-        /* MMC_DET s.o. */
-        pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN);
-
-        /* whats that for ??? */
-        pxa_gpio_mode(GPIO79_nCS_3_MD);
-
-#ifdef CONFIG_LEDS
-        pxa_gpio_mode( GPIO_SYS_BUSY_LED  | GPIO_OUT);          /* LED1 */
-        pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT);          /* LED2 */
-#endif
-#ifdef CONFIG_MACH_TRIZEPS4_CONXS
 #ifdef CONFIG_IDE_PXA_CF
         /* if boot direct from compact flash dont disable power */
         trizeps_conxs_bcr = 0x0009;
@@ -478,18 +545,24 @@ static void __init trizeps4_map_io(void)
         /* this is the reset value */
         trizeps_conxs_bcr = 0x00A0;
 #endif
-        ConXS_BCR = trizeps_conxs_bcr;
-#endif
+        BCR_writew(trizeps_conxs_bcr);
+        board_backlight_power(1);
+}
+
+static void __init trizeps4_map_io(void)
+{
+        pxa_map_io();
+        iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc));
 
-#warning FIXME - accessing PM registers directly is deprecated
-        PWER  = 0x00000002;
-        PFER  = 0x00000000;
-        PRER  = 0x00000002;
-        PGSR0 = 0x0158C000;
-        PGSR1 = 0x00FF0080;
-        PGSR2 = 0x0001C004;
-        /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
-        PCFR |= PCFR_OPDE;
+        if ((MSC0 & 0x8) && (BOOT_DEF & 0x1)) {
+                /* if flash is 16 bit wide its a Trizeps4 WL */
+                __machine_arch_type = MACH_TYPE_TRIZEPS4WL;
+                trizeps4_flash_data[0].width = 2;
+        } else {
+                /* if flash is 32 bit wide its a Trizeps4 */
+                __machine_arch_type = MACH_TYPE_TRIZEPS4;
+                trizeps4_flash_data[0].width = 4;
+        }
 }
 
 MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
@@ -503,3 +576,13 @@ MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
         .timer          = &pxa_timer,
 MACHINE_END
 
+MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module")
+        /* MAINTAINER("Jürgen Schindele") */
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params    = TRIZEPS4_SDRAM_BASE + 0x100,
+        .init_machine   = trizeps4_init,
+        .map_io         = trizeps4_map_io,
+        .init_irq       = pxa27x_init_irq,
+        .timer          = &pxa_timer,
+MACHINE_END
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
new file mode 100644
index 000000000000..d7632f63603c
--- /dev/null
+++ b/arch/arm/mach-pxa/viper.c
@@ -0,0 +1,951 @@
+/*
+ *  linux/arch/arm/mach-pxa/viper.c
+ *
+ *  Support for the Arcom VIPER SBC.
+ *
+ *  Author:     Ian Campbell
+ *  Created:    Feb 03, 2003
+ *  Copyright:  Arcom Control Systems
+ *
+ *  Maintained by Marc Zyngier <maz@misterjones.org>
+ *                             <marc.zyngier@altran.com>
+ *
+ * Based on lubbock.c:
+ *  Author:     Nicolas Pitre
+ *  Created:    Jun 15, 2001
+ *  Copyright:  MontaVista Software Inc.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ */
+
+#include <linux/types.h>
+#include <linux/memory.h>
+#include <linux/cpu.h>
+#include <linux/cpufreq.h>
+#include <linux/delay.h>
+#include <linux/fs.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/major.h>
+#include <linux/module.h>
+#include <linux/pm.h>
+#include <linux/sched.h>
+#include <linux/gpio.h>
+#include <linux/i2c-gpio.h>
+#include <linux/serial_8250.h>
+#include <linux/smc91x.h>
+#include <linux/pwm_backlight.h>
+#include <linux/usb/isp116x.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+
+#include <mach/pxa-regs.h>
+#include <mach/pxa2xx-regs.h>
+#include <mach/bitfield.h>
+#include <mach/audio.h>
+#include <mach/pxafb.h>
+#include <mach/mfp-pxa25x.h>
+#include <mach/i2c.h>
+#include <mach/viper.h>
+
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/irq.h>
+#include <asm/sizes.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include "generic.h"
+#include "devices.h"
+
+static unsigned int icr;
+
+static void viper_icr_set_bit(unsigned int bit)
+{
+        icr |= bit;
+        VIPER_ICR = icr;
+}
+
+static void viper_icr_clear_bit(unsigned int bit)
+{
+        icr &= ~bit;
+        VIPER_ICR = icr;
+}
+
+/* This function is used from the pcmcia module to reset the CF */
+void viper_cf_rst(int state)
+{
+        if (state)
+                viper_icr_set_bit(VIPER_ICR_CF_RST);
+        else
+                viper_icr_clear_bit(VIPER_ICR_CF_RST);
+}
+EXPORT_SYMBOL(viper_cf_rst);
+
+/*
+ * The CPLD version register was not present on VIPER boards prior to
+ * v2i1. On v1 boards where the version register is not present we
+ * will just read back the previous value from the databus.
+ *
+ * Therefore we do two reads. The first time we write 0 to the
+ * (read-only) register before reading and the second time we write
+ * 0xff first. If the two reads do not match or they read back as 0xff
+ * or 0x00 then we have version 1 hardware.
+ */
+static u8 viper_hw_version(void)
+{
+        u8 v1, v2;
+        unsigned long flags;
+
+        local_irq_save(flags);
+
+        VIPER_VERSION = 0;
+        v1 = VIPER_VERSION;
+        VIPER_VERSION = 0xff;
+        v2 = VIPER_VERSION;
+
+        v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1;
+
+        local_irq_restore(flags);
+        return v1;
+}
+
+/* CPU sysdev */
+static int viper_cpu_suspend(struct sys_device *sysdev, pm_message_t state)
+{
+        viper_icr_set_bit(VIPER_ICR_R_DIS);
+        return 0;
+}
+
+static int viper_cpu_resume(struct sys_device *sysdev)
+{
+        viper_icr_clear_bit(VIPER_ICR_R_DIS);
+        return 0;
+}
+
+static struct sysdev_driver viper_cpu_sysdev_driver = {
+        .suspend        = viper_cpu_suspend,
+        .resume         = viper_cpu_resume,
+};
+
+static unsigned int current_voltage_divisor;
+
+/*
+ * If force is not true then step from existing to new divisor. If
+ * force is true then jump straight to the new divisor. Stepping is
+ * used because if the jump in voltage is too large, the VCC can dip
+ * too low and the regulator cuts out.
+ *
+ * force can be used to initialize the divisor to a know state by
+ * setting the value for the current clock speed, since we are already
+ * running at that speed we know the voltage should be pretty close so
+ * the jump won't be too large
+ */
+static void viper_set_core_cpu_voltage(unsigned long khz, int force)
+{
+        int i = 0;
+        unsigned int divisor = 0;
+        const char *v;
+
+        if (khz < 200000) {
+                v = "1.0"; divisor = 0xfff;
+        } else if (khz < 300000) {
+                v = "1.1"; divisor = 0xde5;
+        } else {
+                v = "1.3"; divisor = 0x325;
+        }
+
+        pr_debug("viper: setting CPU core voltage to %sV at %d.%03dMHz\n",
+                 v, (int)khz / 1000, (int)khz % 1000);
+
+#define STEP 0x100
+        do {
+                int step;
+
+                if (force)
+                        step = divisor;
+                else if (current_voltage_divisor < divisor - STEP)
+                        step = current_voltage_divisor + STEP;
+                else if (current_voltage_divisor > divisor + STEP)
+                        step = current_voltage_divisor - STEP;
+                else
+                        step = divisor;
+                force = 0;
+
+                gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
+                gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
+
+                for (i = 1 << 11 ; i > 0 ; i >>= 1) {
+                        udelay(1);
+
+                        gpio_set_value(VIPER_PSU_DATA_GPIO, step & i);
+                        udelay(1);
+
+                        gpio_set_value(VIPER_PSU_CLK_GPIO, 1);
+                        udelay(1);
+
+                        gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
+                }
+                udelay(1);
+
+                gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 1);
+                udelay(1);
+
+                gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
+
+                current_voltage_divisor = step;
+        } while (current_voltage_divisor != divisor);
+}
+
+/* Interrupt handling */
+static unsigned long viper_irq_enabled_mask;
+
+static void viper_ack_irq(unsigned int irq)
+{
+        int viper_irq = irq - PXA_ISA_IRQ(0);
+
+        if (viper_irq < 8)
+                VIPER_LO_IRQ_STATUS = 1 << viper_irq;
+        else
+                VIPER_HI_IRQ_STATUS = 1 << (viper_irq - 8);
+}
+
+static void viper_mask_irq(unsigned int irq)
+{
+        viper_irq_enabled_mask &= ~(1 << (irq - PXA_ISA_IRQ(0)));
+}
+
+static void viper_unmask_irq(unsigned int irq)
+{
+        viper_irq_enabled_mask |= (1 << (irq - PXA_ISA_IRQ(0)));
+}
+
+static inline unsigned long viper_irq_pending(void)
+{
+        return (VIPER_HI_IRQ_STATUS << 8 | VIPER_LO_IRQ_STATUS) &
+                        viper_irq_enabled_mask;
+}
+
+static void viper_irq_handler(unsigned int irq, struct irq_desc *desc)
+{
+        unsigned long pending;
+
+        pending = viper_irq_pending();
+        do {
+                if (likely(pending)) {
+                        irq = PXA_ISA_IRQ(0) + __ffs(pending);
+                        generic_handle_irq(irq);
+                }
+                pending = viper_irq_pending();
+        } while (pending);
+}
+
+static struct irq_chip viper_irq_chip = {
+        .name   = "ISA",
+        .ack    = viper_ack_irq,
+        .mask   = viper_mask_irq,
+        .unmask = viper_unmask_irq
+};
+
+static void __init viper_init_irq(void)
+{
+        const int isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 };
+        int irq;
+        int isa_irq;
+
+        pxa25x_init_irq();
+
+        /* setup ISA IRQs */
+        for (irq = 0; irq < ARRAY_SIZE(isa_irqs); irq++) {
+                isa_irq = isa_irqs[irq];
+                set_irq_chip(isa_irq, &viper_irq_chip);
+                set_irq_handler(isa_irq, handle_edge_irq);
+                set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE);
+        }
+
+        set_irq_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
+                                viper_irq_handler);
+        set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
+
+#ifndef CONFIG_SERIAL_PXA
+        /*
+         * 8250 doesn't support IRQ_TYPE being passed as part
+         * of the plat_serial8250_port structure...
+         */
+        set_irq_type(gpio_to_irq(VIPER_UARTA_GPIO), IRQ_TYPE_EDGE_RISING);
+        set_irq_type(gpio_to_irq(VIPER_UARTB_GPIO), IRQ_TYPE_EDGE_RISING);
+#endif
+}
+
+/* Flat Panel */
+static struct pxafb_mode_info fb_mode_info[] = {
+        {
+                .pixclock       = 157500,
+
+                .xres           = 320,
+                .yres           = 240,
+
+                .bpp            = 16,
+
+                .hsync_len      = 63,
+                .left_margin    = 7,
+                .right_margin   = 13,
+
+                .vsync_len      = 20,
+                .upper_margin   = 0,
+                .lower_margin   = 0,
+
+                .sync           = 0,
+        },
+};
+
+static struct pxafb_mach_info fb_info = {
+        .modes                  = fb_mode_info,
+        .num_modes              = 1,
+        .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
+};
+
+static int viper_backlight_init(struct device *dev)
+{
+        int ret;
+
+        /* GPIO9 and 10 control FB backlight. Initialise to off */
+        ret = gpio_request(VIPER_BCKLIGHT_EN_GPIO, "Backlight");
+        if (ret)
+                goto err_request_bckl;
+
+        ret = gpio_request(VIPER_LCD_EN_GPIO, "LCD");
+        if (ret)
+                goto err_request_lcd;
+
+        ret = gpio_direction_output(VIPER_BCKLIGHT_EN_GPIO, 0);
+        if (ret)
+                goto err_dir;
+
+        ret = gpio_direction_output(VIPER_LCD_EN_GPIO, 0);
+        if (ret)
+                goto err_dir;
+
+        return 0;
+
+err_dir:
+        gpio_free(VIPER_LCD_EN_GPIO);
+err_request_lcd:
+        gpio_free(VIPER_BCKLIGHT_EN_GPIO);
+err_request_bckl:
+        dev_err(dev, "Failed to setup LCD GPIOs\n");
+
+        return ret;
+}
+
+static int viper_backlight_notify(int brightness)
+{
+        gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness);
+        gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness);
+
+        return brightness;
+}
+
+static void viper_backlight_exit(struct device *dev)
+{
+        gpio_free(VIPER_LCD_EN_GPIO);
+        gpio_free(VIPER_BCKLIGHT_EN_GPIO);
+}
+
+static struct platform_pwm_backlight_data viper_backlight_data = {
+        .pwm_id         = 0,
+        .max_brightness = 100,
+        .dft_brightness = 100,
+        .pwm_period_ns  = 1000000,
+        .init           = viper_backlight_init,
+        .notify         = viper_backlight_notify,
+        .exit           = viper_backlight_exit,
+};
+
+static struct platform_device viper_backlight_device = {
+        .name           = "pwm-backlight",
+        .dev            = {
+                .parent         = &pxa25x_device_pwm0.dev,
+                .platform_data  = &viper_backlight_data,
+        },
+};
+
+/* Ethernet */
+static struct resource smc91x_resources[] = {
+        [0] = {
+                .name   = "smc91x-regs",
+                .start  = VIPER_ETH_PHYS + 0x300,
+                .end    = VIPER_ETH_PHYS + 0x30f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = gpio_to_irq(VIPER_ETH_GPIO),
+                .end    = gpio_to_irq(VIPER_ETH_GPIO),
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
+        },
+        [2] = {
+                .name   = "smc91x-data32",
+                .start  = VIPER_ETH_DATA_PHYS,
+                .end    = VIPER_ETH_DATA_PHYS + 3,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct smc91x_platdata viper_smc91x_info = {
+        .flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+        .leda   = RPC_LED_100_10,
+        .ledb   = RPC_LED_TX_RX,
+};
+
+static struct platform_device smc91x_device = {
+        .name           = "smc91x",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(smc91x_resources),
+        .resource       = smc91x_resources,
+        .dev            = {
+                .platform_data  = &viper_smc91x_info,
+        },
+};
+
+/* i2c */
+static struct i2c_gpio_platform_data i2c_bus_data = {
+        .sda_pin = VIPER_RTC_I2C_SDA_GPIO,
+        .scl_pin = VIPER_RTC_I2C_SCL_GPIO,
+        .udelay  = 10,
+        .timeout = 100,
+};
+
+static struct platform_device i2c_bus_device = {
+        .name           = "i2c-gpio",
+        .id             = 1, /* pxa2xx-i2c is bus 0, so start at 1 */
+        .dev = {
+                .platform_data = &i2c_bus_data,
+        }
+};
+
+static struct i2c_board_info __initdata viper_i2c_devices[] = {
+        {
+                I2C_BOARD_INFO("ds1338", 0x68),
+        },
+};
+
+/*
+ * Serial configuration:
+ * You can either have the standard PXA ports driven by the PXA driver,
+ * or all the ports (PXA + 16850) driven by the 8250 driver.
+ * Choose your poison.
+ */
+
+static struct resource viper_serial_resources[] = {
+#ifndef CONFIG_SERIAL_PXA
+        {
+                .start  = 0x40100000,
+                .end    = 0x4010001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = 0x40200000,
+                .end    = 0x4020001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = 0x40700000,
+                .end    = 0x4070001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = VIPER_UARTA_PHYS,
+                .end    = VIPER_UARTA_PHYS + 0xf,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = VIPER_UARTB_PHYS,
+                .end    = VIPER_UARTB_PHYS + 0xf,
+                .flags  = IORESOURCE_MEM,
+        },
+#else
+        {
+                0,
+        },
+#endif
+};
+
+static struct plat_serial8250_port serial_platform_data[] = {
+#ifndef CONFIG_SERIAL_PXA
+        /* Internal UARTs */
+        {
+                .membase        = (void *)&FFUART,
+                .mapbase        = __PREG(FFUART),
+                .irq            = IRQ_FFUART,
+                .uartclk        = 921600 * 16,
+                .regshift       = 2,
+                .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
+                .iotype         = UPIO_MEM,
+        },
+        {
+                .membase        = (void *)&BTUART,
+                .mapbase        = __PREG(BTUART),
+                .irq            = IRQ_BTUART,
+                .uartclk        = 921600 * 16,
+                .regshift       = 2,
+                .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
+                .iotype         = UPIO_MEM,
+        },
+        {
+                .membase        = (void *)&STUART,
+                .mapbase        = __PREG(STUART),
+                .irq            = IRQ_STUART,
+                .uartclk        = 921600 * 16,
+                .regshift       = 2,
+                .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
+                .iotype         = UPIO_MEM,
+        },
+        /* External UARTs */
+        {
+                .mapbase        = VIPER_UARTA_PHYS,
+                .irq            = gpio_to_irq(VIPER_UARTA_GPIO),
+                .uartclk        = 1843200,
+                .regshift       = 1,
+                .iotype         = UPIO_MEM,
+                .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
+                                  UPF_SKIP_TEST,
+        },
+        {
+                .mapbase        = VIPER_UARTB_PHYS,
+                .irq            = gpio_to_irq(VIPER_UARTB_GPIO),
+                .uartclk        = 1843200,
+                .regshift       = 1,
+                .iotype         = UPIO_MEM,
+                .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
+                                  UPF_SKIP_TEST,
+        },
+#endif
+        { },
+};
+
+static struct platform_device serial_device = {
+        .name                   = "serial8250",
+        .id                     = 0,
+        .dev                    = {
+                .platform_data  = serial_platform_data,
+        },
+        .num_resources          = ARRAY_SIZE(viper_serial_resources),
+        .resource               = viper_serial_resources,
+};
+
+/* USB */
+static void isp116x_delay(struct device *dev, int delay)
+{
+        ndelay(delay);
+}
+
+static struct resource isp116x_resources[] = {
+        [0] = { /* DATA */
+                .start  = VIPER_USB_PHYS + 0,
+                .end    = VIPER_USB_PHYS + 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = { /* ADDR */
+                .start  = VIPER_USB_PHYS + 2,
+                .end    = VIPER_USB_PHYS + 3,
+                .flags  = IORESOURCE_MEM,
+        },
+        [2] = {
+                .start  = gpio_to_irq(VIPER_USB_GPIO),
+                .end    = gpio_to_irq(VIPER_USB_GPIO),
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
+        },
+};
+
+/* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */
+static struct isp116x_platform_data isp116x_platform_data = {
+        /* Enable internal resistors on downstream ports */
+        .sel15Kres              = 1,
+        /* On-chip overcurrent protection */
+        .oc_enable              = 1,
+        /* INT output polarity */
+        .int_act_high           = 1,
+        /* INT edge or level triggered */
+        .int_edge_triggered     = 0,
+
+        /* WAKEUP pin connected - NOT SUPPORTED  */
+        /* .remote_wakeup_connected = 0, */
+        /* Wakeup by devices on usb bus enabled */
+        .remote_wakeup_enable   = 0,
+        .delay                  = isp116x_delay,
+};
+
+static struct platform_device isp116x_device = {
+        .name                   = "isp116x-hcd",
+        .id                     = -1,
+        .num_resources          = ARRAY_SIZE(isp116x_resources),
+        .resource               = isp116x_resources,
+        .dev                    = {
+                .platform_data  = &isp116x_platform_data,
+        },
+
+};
+
+/* MTD */
+static struct resource mtd_resources[] = {
+        [0] = { /* RedBoot config + filesystem flash */
+                .start  = VIPER_FLASH_PHYS,
+                .end    = VIPER_FLASH_PHYS + SZ_32M - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = { /* Boot flash */
+                .start  = VIPER_BOOT_PHYS,
+                .end    = VIPER_BOOT_PHYS + SZ_1M - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [2] = { /*
+                 * SRAM size is actually 256KB, 8bits, with a sparse mapping
+                 * (each byte is on a 16bit boundary).
+                 */
+                .start  = _VIPER_SRAM_BASE,
+                .end    = _VIPER_SRAM_BASE + SZ_512K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct mtd_partition viper_boot_flash_partition = {
+        .name           = "RedBoot",
+        .size           = SZ_1M,
+        .offset         = 0,
+        .mask_flags     = MTD_WRITEABLE,        /* force R/O */
+};
+
+static struct physmap_flash_data viper_flash_data[] = {
+        [0] = {
+                .width          = 2,
+                .parts          = NULL,
+                .nr_parts       = 0,
+        },
+        [1] = {
+                .width          = 2,
+                .parts          = &viper_boot_flash_partition,
+                .nr_parts       = 1,
+        },
+};
+
+static struct platform_device viper_mtd_devices[] = {
+        [0] = {
+                .name           = "physmap-flash",
+                .id             = 0,
+                .dev            = {
+                        .platform_data  = &viper_flash_data[0],
+                },
+                .resource       = &mtd_resources[0],
+                .num_resources  = 1,
+        },
+        [1] = {
+                .name           = "physmap-flash",
+                .id             = 1,
+                .dev            = {
+                        .platform_data  = &viper_flash_data[1],
+                },
+                .resource       = &mtd_resources[1],
+                .num_resources  = 1,
+        },
+};
+
+static struct platform_device *viper_devs[] __initdata = {
+        &smc91x_device,
+        &i2c_bus_device,
+        &serial_device,
+        &isp116x_device,
+        &viper_mtd_devices[0],
+        &viper_mtd_devices[1],
+        &viper_backlight_device,
+};
+
+static mfp_cfg_t viper_pin_config[] __initdata = {
+        /* Chip selects */
+        GPIO15_nCS_1,
+        GPIO78_nCS_2,
+        GPIO79_nCS_3,
+        GPIO80_nCS_4,
+        GPIO33_nCS_5,
+
+        /* FP Backlight */
+        GPIO9_GPIO,                             /* VIPER_BCKLIGHT_EN_GPIO */
+        GPIO10_GPIO,                            /* VIPER_LCD_EN_GPIO */
+        GPIO16_PWM0_OUT,
+
+        /* Ethernet PHY Ready */
+        GPIO18_RDY,
+
+        /* Serial shutdown */
+        GPIO12_GPIO | MFP_LPM_DRIVE_HIGH,       /* VIPER_UART_SHDN_GPIO */
+
+        /* Compact-Flash / PC104 */
+        GPIO48_nPOE,
+        GPIO49_nPWE,
+        GPIO50_nPIOR,
+        GPIO51_nPIOW,
+        GPIO52_nPCE_1,
+        GPIO53_nPCE_2,
+        GPIO54_nPSKTSEL,
+        GPIO55_nPREG,
+        GPIO56_nPWAIT,
+        GPIO57_nIOIS16,
+        GPIO8_GPIO,                             /* VIPER_CF_RDY_GPIO */
+        GPIO32_GPIO,                            /* VIPER_CF_CD_GPIO */
+        GPIO82_GPIO,                            /* VIPER_CF_POWER_GPIO */
+
+        /* Integrated UPS control */
+        GPIO20_GPIO,                            /* VIPER_UPS_GPIO */
+
+        /* Vcc regulator control */
+        GPIO6_GPIO,                             /* VIPER_PSU_DATA_GPIO */
+        GPIO11_GPIO,                            /* VIPER_PSU_CLK_GPIO */
+        GPIO19_GPIO,                            /* VIPER_PSU_nCS_LD_GPIO */
+
+        /* i2c busses */
+        GPIO26_GPIO,                            /* VIPER_TPM_I2C_SDA_GPIO */
+        GPIO27_GPIO,                            /* VIPER_TPM_I2C_SCL_GPIO */
+        GPIO83_GPIO,                            /* VIPER_RTC_I2C_SDA_GPIO */
+        GPIO84_GPIO,                            /* VIPER_RTC_I2C_SCL_GPIO */
+
+        /* PC/104 Interrupt */
+        GPIO1_GPIO | WAKEUP_ON_EDGE_RISE,       /* VIPER_CPLD_GPIO */
+};
+
+static unsigned long viper_tpm;
+
+static int __init viper_tpm_setup(char *str)
+{
+        strict_strtoul(str, 10, &viper_tpm);
+        return 1;
+}
+
+__setup("tpm=", viper_tpm_setup);
+
+static void __init viper_tpm_init(void)
+{
+        struct platform_device *tpm_device;
+        struct i2c_gpio_platform_data i2c_tpm_data = {
+                .sda_pin = VIPER_TPM_I2C_SDA_GPIO,
+                .scl_pin = VIPER_TPM_I2C_SCL_GPIO,
+                .udelay  = 10,
+                .timeout = 100,
+        };
+        char *errstr;
+
+        /* Allocate TPM i2c bus if requested */
+        if (!viper_tpm)
+                return;
+
+        tpm_device = platform_device_alloc("i2c-gpio", 2);
+        if (tpm_device) {
+                if (!platform_device_add_data(tpm_device,
+                                              &i2c_tpm_data,
+                                              sizeof(i2c_tpm_data))) {
+                        if (platform_device_add(tpm_device)) {
+                                errstr = "register TPM i2c bus";
+                                goto error_free_tpm;
+                        }
+                } else {
+                        errstr = "allocate TPM i2c bus data";
+                        goto error_free_tpm;
+                }
+        } else {
+                errstr = "allocate TPM i2c device";
+                goto error_tpm;
+        }
+
+        return;
+
+error_free_tpm:
+        kfree(tpm_device);
+error_tpm:
+        pr_err("viper: Couldn't %s, giving up\n", errstr);
+}
+
+static void __init viper_init_vcore_gpios(void)
+{
+        if (gpio_request(VIPER_PSU_DATA_GPIO, "PSU data"))
+                goto err_request_data;
+
+        if (gpio_request(VIPER_PSU_CLK_GPIO, "PSU clock"))
+                goto err_request_clk;
+
+        if (gpio_request(VIPER_PSU_nCS_LD_GPIO, "PSU cs"))
+                goto err_request_cs;
+
+        if (gpio_direction_output(VIPER_PSU_DATA_GPIO, 0) ||
+            gpio_direction_output(VIPER_PSU_CLK_GPIO, 0) ||
+            gpio_direction_output(VIPER_PSU_nCS_LD_GPIO, 0))
+                goto err_dir;
+
+        /* c/should assume redboot set the correct level ??? */
+        viper_set_core_cpu_voltage(get_clk_frequency_khz(0), 1);
+
+        return;
+
+err_dir:
+        gpio_free(VIPER_PSU_nCS_LD_GPIO);
+err_request_cs:
+        gpio_free(VIPER_PSU_CLK_GPIO);
+err_request_clk:
+        gpio_free(VIPER_PSU_DATA_GPIO);
+err_request_data:
+        pr_err("viper: Failed to setup vcore control GPIOs\n");
+}
+
+static void __init viper_init_serial_gpio(void)
+{
+        if (gpio_request(VIPER_UART_SHDN_GPIO, "UARTs shutdown"))
+                goto err_request;
+
+        if (gpio_direction_output(VIPER_UART_SHDN_GPIO, 0))
+                goto err_dir;
+
+        return;
+
+err_dir:
+        gpio_free(VIPER_UART_SHDN_GPIO);
+err_request:
+        pr_err("viper: Failed to setup UART shutdown GPIO\n");
+}
+
+#ifdef CONFIG_CPU_FREQ
+static int viper_cpufreq_notifier(struct notifier_block *nb,
+                                  unsigned long val, void *data)
+{
+        struct cpufreq_freqs *freq = data;
+
+        /* TODO: Adjust timings??? */
+
+        switch (val) {
+        case CPUFREQ_PRECHANGE:
+                if (freq->old < freq->new) {
+                        /* we are getting faster so raise the voltage
+                         * before we change freq */
+                        viper_set_core_cpu_voltage(freq->new, 0);
+                }
+                break;
+        case CPUFREQ_POSTCHANGE:
+                if (freq->old > freq->new) {
+                        /* we are slowing down so drop the power
+                         * after we change freq */
+                        viper_set_core_cpu_voltage(freq->new, 0);
+                }
+                break;
+        case CPUFREQ_RESUMECHANGE:
+                viper_set_core_cpu_voltage(freq->new, 0);
+                break;
+        default:
+                /* ignore */
+                break;
+        }
+
+        return 0;
+}
+
+static struct notifier_block viper_cpufreq_notifier_block = {
+        .notifier_call  = viper_cpufreq_notifier
+};
+
+static void __init viper_init_cpufreq(void)
+{
+        if (cpufreq_register_notifier(&viper_cpufreq_notifier_block,
+                                      CPUFREQ_TRANSITION_NOTIFIER))
+                pr_err("viper: Failed to setup cpufreq notifier\n");
+}
+#else
+static inline void viper_init_cpufreq(void) {}
+#endif
+
+static void viper_power_off(void)
+{
+        pr_notice("Shutting off UPS\n");
+        gpio_set_value(VIPER_UPS_GPIO, 1);
+        /* Spin to death... */
+        while (1);
+}
+
+static void __init viper_init(void)
+{
+        u8 version;
+
+        pm_power_off = viper_power_off;
+
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config));
+
+        /* Wake-up serial console */
+        viper_init_serial_gpio();
+
+        set_pxa_fb_info(&fb_info);
+
+        /* v1 hardware cannot use the datacs line */
+        version = viper_hw_version();
+        if (version == 0)
+                smc91x_device.num_resources--;
+
+        pxa_set_i2c_info(NULL);
+        platform_add_devices(viper_devs, ARRAY_SIZE(viper_devs));
+
+        viper_init_vcore_gpios();
+        viper_init_cpufreq();
+
+        sysdev_driver_register(&cpu_sysdev_class, &viper_cpu_sysdev_driver);
+
+        if (version) {
+                pr_info("viper: hardware v%di%d detected. "
+                        "CPLD revision %d.\n",
+                        VIPER_BOARD_VERSION(version),
+                        VIPER_BOARD_ISSUE(version),
+                        VIPER_CPLD_REVISION(version));
+                system_rev = (VIPER_BOARD_VERSION(version) << 8) |
+                             (VIPER_BOARD_ISSUE(version) << 4) |
+                             VIPER_CPLD_REVISION(version);
+        } else {
+                pr_info("viper: No version register.\n");
+        }
+
+        i2c_register_board_info(1, ARRAY_AND_SIZE(viper_i2c_devices));
+
+        viper_tpm_init();
+        pxa_set_ac97_info(NULL);
+}
+
+static struct map_desc viper_io_desc[] __initdata = {
+        {
+                .virtual = VIPER_CPLD_BASE,
+                .pfn     = __phys_to_pfn(VIPER_CPLD_PHYS),
+                .length  = 0x00300000,
+                .type    = MT_DEVICE,
+        },
+        {
+                .virtual = VIPER_PC104IO_BASE,
+                .pfn     = __phys_to_pfn(_PCMCIA1IO),
+                .length  = 0x00800000,
+                .type    = MT_DEVICE,
+        },
+};
+
+static void __init viper_map_io(void)
+{
+        pxa_map_io();
+
+        iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc));
+
+        PCFR |= PCFR_OPDE;
+}
+
+MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
+        /* Maintainer: Marc Zyngier <maz@misterjones.org> */
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params    = 0xa0000100,
+        .map_io         = viper_map_io,
+        .init_irq       = viper_init_irq,
+        .timer          = &pxa_timer,
+        .init_machine   = viper_init,
+MACHINE_END
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index 0cb65b5772fe..813804433466 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -29,6 +29,7 @@
 #include <mach/pxafb.h>
 #include <mach/zylonite.h>
 #include <mach/mmc.h>
+#include <mach/ohci.h>
 #include <mach/pxa27x_keypad.h>
 #include <mach/pxa3xx_nand.h>
 
@@ -423,6 +424,21 @@ static void __init zylonite_init_nand(void)
 static inline void zylonite_init_nand(void) {}
 #endif /* CONFIG_MTD_NAND_PXA3xx || CONFIG_MTD_NAND_PXA3xx_MODULE */
 
+#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
+static struct pxaohci_platform_data zylonite_ohci_info = {
+        .port_mode      = PMM_PERPORT_MODE,
+        .flags          = ENABLE_PORT1 | ENABLE_PORT2 |
+                          POWER_CONTROL_LOW | POWER_SENSE_LOW,
+};
+
+static void __init zylonite_init_ohci(void)
+{
+        pxa_set_ohci_info(&zylonite_ohci_info);
+}
+#else
+static inline void zylonite_init_ohci(void) {}
+#endif /* CONFIG_USB_OHCI_HCD || CONFIG_USB_OHCI_HCD_MODULE */
+
 static void __init zylonite_init(void)
 {
         /* board-processor specific initialization */
@@ -443,6 +459,7 @@ static void __init zylonite_init(void)
         zylonite_init_keypad();
         zylonite_init_nand();
         zylonite_init_leds();
+        zylonite_init_ohci();
 }
 
 MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)")
diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c
index 095f5c648236..46538885a58a 100644
--- a/arch/arm/mach-pxa/zylonite_pxa300.c
+++ b/arch/arm/mach-pxa/zylonite_pxa300.c
@@ -73,6 +73,12 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = {
         GPIO27_AC97_SDATA_OUT,
         GPIO28_AC97_SYNC,
 
+        /* SSP3 */
+        GPIO91_SSP3_SCLK,
+        GPIO92_SSP3_FRM,
+        GPIO93_SSP3_TXD,
+        GPIO94_SSP3_RXD,
+
         /* WM9713 IRQ */
         GPIO26_GPIO,
 
@@ -113,6 +119,10 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = {
         GPIO13_MMC2_CLK,
         GPIO14_MMC2_CMD,
 
+        /* USB Host */
+        GPIO0_2_USBH_PEN,
+        GPIO1_2_USBH_PWR,
+
         /* Standard I2C */
         GPIO21_I2C_SCL,
         GPIO22_I2C_SDA,
@@ -209,7 +219,7 @@ static struct pca953x_platform_data gpio_exp[] = {
         },
 };
 
-struct i2c_board_info zylonite_i2c_board_info[] = {
+static struct i2c_board_info zylonite_i2c_board_info[] = {
         {
                 .type           = "pca9539",
                 .addr           = 0x74,
diff --git a/arch/arm/mach-pxa/zylonite_pxa320.c b/arch/arm/mach-pxa/zylonite_pxa320.c
index 9879d7da2df5..0f244744daae 100644
--- a/arch/arm/mach-pxa/zylonite_pxa320.c
+++ b/arch/arm/mach-pxa/zylonite_pxa320.c
@@ -69,6 +69,12 @@ static mfp_cfg_t mfp_cfg[] __initdata = {
         GPIO39_AC97_BITCLK,
         GPIO40_AC97_nACRESET,
 
+        /* SSP3 */
+        GPIO89_SSP3_SCLK,
+        GPIO90_SSP3_FRM,
+        GPIO91_SSP3_TXD,
+        GPIO92_SSP3_RXD,
+
         /* WM9713 IRQ */
         GPIO15_GPIO,
 
@@ -117,6 +123,10 @@ static mfp_cfg_t mfp_cfg[] __initdata = {
         GPIO28_MMC2_CLK,
         GPIO29_MMC2_CMD,
 
+        /* USB Host */
+        GPIO2_2_USBH_PEN,
+        GPIO3_2_USBH_PWR,
+
         /* Debug LEDs */
         GPIO1_2_GPIO | MFP_LPM_DRIVE_HIGH,
         GPIO4_2_GPIO | MFP_LPM_DRIVE_HIGH,
diff --git a/arch/arm/mach-s3c2410/bast-irq.c b/arch/arm/mach-s3c2410/bast-irq.c
index 604224a2d9a6..75738000272b 100644
--- a/arch/arm/mach-s3c2410/bast-irq.c
+++ b/arch/arm/mach-s3c2410/bast-irq.c
@@ -130,8 +130,7 @@ bast_irq_pc104_demux(unsigned int irq,
                 for (i = 0; stat != 0; i++, stat >>= 1) {
                         if (stat & 1) {
                                 irqno = bast_pc104_irqs[i];
-                                desc = irq_desc + irqno;
-                                desc_handle_irq(irqno, desc);
+                                generic_handle_irq(irqno);
                         }
                 }
         }
diff --git a/arch/arm/mach-s3c2412/irq.c b/arch/arm/mach-s3c2412/irq.c
index 1686950fa557..41720f2c1fea 100644
--- a/arch/arm/mach-s3c2412/irq.c
+++ b/arch/arm/mach-s3c2412/irq.c
@@ -123,10 +123,10 @@ static void s3c2412_irq_demux_cfsdi(unsigned int irq, struct irq_desc *desc)
         subsrc  &= ~submsk;
 
         if (subsrc & INTBIT(IRQ_S3C2412_SDI))
-                desc_handle_irq(IRQ_S3C2412_SDI, irq_desc + IRQ_S3C2412_SDI);
+                generic_handle_irq(IRQ_S3C2412_SDI);
 
         if (subsrc & INTBIT(IRQ_S3C2412_CF))
-                desc_handle_irq(IRQ_S3C2412_CF, irq_desc + IRQ_S3C2412_CF);
+                generic_handle_irq(IRQ_S3C2412_CF);
 }
 
 #define INTMSK_CFSDI    (1UL << (IRQ_S3C2412_CFSDI - IRQ_EINT0))
diff --git a/arch/arm/mach-s3c2440/irq.c b/arch/arm/mach-s3c2440/irq.c
index 93fff75220cf..33e3ede0a2b3 100644
--- a/arch/arm/mach-s3c2440/irq.c
+++ b/arch/arm/mach-s3c2440/irq.c
@@ -44,7 +44,6 @@ static void s3c_irq_demux_wdtac97(unsigned int irq,
                                   struct irq_desc *desc)
 {
         unsigned int subsrc, submsk;
-        struct irq_desc *mydesc;
 
         /* read the current pending interrupts, and the mask
          * for what it is available */
@@ -58,12 +57,10 @@ static void s3c_irq_demux_wdtac97(unsigned int irq,
 
         if (subsrc != 0) {
                 if (subsrc & 1) {
-                        mydesc = irq_desc + IRQ_S3C2440_WDT;
-                        desc_handle_irq(IRQ_S3C2440_WDT, mydesc);
+                        generic_handle_irq(IRQ_S3C2440_WDT);
                 }
                 if (subsrc & 2) {
-                        mydesc = irq_desc + IRQ_S3C2440_AC97;
-                        desc_handle_irq(IRQ_S3C2440_AC97, mydesc);
+                        generic_handle_irq(IRQ_S3C2440_AC97);
                 }
         }
 }
diff --git a/arch/arm/mach-s3c2443/irq.c b/arch/arm/mach-s3c2443/irq.c
index bd89c8361b3c..e44341d7dfef 100644
--- a/arch/arm/mach-s3c2443/irq.c
+++ b/arch/arm/mach-s3c2443/irq.c
@@ -44,7 +44,6 @@ static inline void s3c2443_irq_demux(unsigned int irq, unsigned int len)
 {
         unsigned int subsrc, submsk;
         unsigned int end;
-        struct irq_desc *mydesc;
 
         /* read the current pending interrupts, and the mask
          * for what it is available */
@@ -57,13 +56,11 @@ static inline void s3c2443_irq_demux(unsigned int irq, unsigned int len)
         subsrc  &= (1 << len)-1;
 
         end = len + irq;
-        mydesc = irq_desc + irq;
 
         for (; irq < end && subsrc; irq++) {
                 if (subsrc & 1)
-                        desc_handle_irq(irq, mydesc);
+                        generic_handle_irq(irq);
 
-                mydesc++;
                 subsrc >>= 1;
         }
 }
diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c
index 86369a8f0cea..3093d46a9c6f 100644
--- a/arch/arm/mach-sa1100/irq.c
+++ b/arch/arm/mach-sa1100/irq.c
@@ -122,14 +122,12 @@ sa1100_high_gpio_handler(unsigned int irq, struct irq_desc *desc)
                 GEDR = mask;
 
                 irq = IRQ_GPIO11;
-                desc = irq_desc + irq;
                 mask >>= 11;
                 do {
                         if (mask & 1)
-                                desc_handle_irq(irq, desc);
+                                generic_handle_irq(irq);
                         mask >>= 1;
                         irq++;
-                        desc++;
                 } while (mask);
 
                 mask = GEDR & 0xfffff800;
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index 4856a6bd2482..6ccd175bc4cf 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -33,8 +33,6 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc)
         unsigned int irr;
 
         while (1) {
-                struct irq_desc *d;
-
                 /*
                  * Acknowledge the parent IRQ.
                  */
@@ -67,21 +65,18 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc)
                         desc->chip->ack(irq);
 
                         if (irr & IRR_ETHERNET) {
-                                d = irq_desc + IRQ_NEPONSET_SMC9196;
-                                desc_handle_irq(IRQ_NEPONSET_SMC9196, d);
+                                generic_handle_irq(IRQ_NEPONSET_SMC9196);
                         }
 
                         if (irr & IRR_USAR) {
-                                d = irq_desc + IRQ_NEPONSET_USAR;
-                                desc_handle_irq(IRQ_NEPONSET_USAR, d);
+                                generic_handle_irq(IRQ_NEPONSET_USAR);
                         }
 
                         desc->chip->unmask(irq);
                 }
 
                 if (irr & IRR_SA1111) {
-                        d = irq_desc + IRQ_NEPONSET_SA1111;
-                        desc_handle_irq(IRQ_NEPONSET_SA1111, d);
+                        generic_handle_irq(IRQ_NEPONSET_SA1111);
                 }
         }
 }
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 534f93282177..824121d52b8d 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -95,8 +95,7 @@ sic_handle_irq(unsigned int irq, struct irq_desc *desc)
 
                 irq += IRQ_SIC_START;
 
-                desc = irq_desc + irq;
-                desc_handle_irq(irq, desc);
+                generic_handle_irq(irq);
         } while (status);
 }
 
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 5764bce98cf3..5935ae4e550b 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -1050,13 +1050,10 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 
                 gpio_irq = bank->virtual_irq_start;
                 for (; isr != 0; isr >>= 1, gpio_irq++) {
-                        struct irq_desc *d;
-
                         if (!(isr & 1))
                                 continue;
-                        d = irq_desc + gpio_irq;
 
-                        desc_handle_irq(gpio_irq, d);
+                        generic_handle_irq(gpio_irq);
                 }
         }
         /* if bank has any level sensitive GPIO pin interrupt
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c
index fa70d34eb4a5..590fc5a3ab06 100644
--- a/arch/arm/plat-s3c24xx/irq.c
+++ b/arch/arm/plat-s3c24xx/irq.c
@@ -468,7 +468,6 @@ static void s3c_irq_demux_adc(unsigned int irq,
 {
         unsigned int subsrc, submsk;
         unsigned int offset = 9;
-        struct irq_desc *mydesc;
 
         /* read the current pending interrupts, and the mask
          * for what it is available */
@@ -482,12 +481,10 @@ static void s3c_irq_demux_adc(unsigned int irq,
 
         if (subsrc != 0) {
                 if (subsrc & 1) {
-                        mydesc = irq_desc + IRQ_TC;
-                        desc_handle_irq(IRQ_TC, mydesc);
+                        generic_handle_irq(IRQ_TC);
                 }
                 if (subsrc & 2) {
-                        mydesc = irq_desc + IRQ_ADC;
-                        desc_handle_irq(IRQ_ADC, mydesc);
+                        generic_handle_irq(IRQ_ADC);
                 }
         }
 }
@@ -496,7 +493,6 @@ static void s3c_irq_demux_uart(unsigned int start)
 {
         unsigned int subsrc, submsk;
         unsigned int offset = start - IRQ_S3CUART_RX0;
-        struct irq_desc *desc;
 
         /* read the current pending interrupts, and the mask
          * for what it is available */
@@ -512,20 +508,14 @@ static void s3c_irq_demux_uart(unsigned int start)
         subsrc &= 7;
 
         if (subsrc != 0) {
-                desc = irq_desc + start;
-
                 if (subsrc & 1)
-                        desc_handle_irq(start, desc);
-
-                desc++;
+                        generic_handle_irq(start);
 
                 if (subsrc & 2)
-                        desc_handle_irq(start+1, desc);
-
-                desc++;
+                        generic_handle_irq(start+1);
 
                 if (subsrc & 4)
-                        desc_handle_irq(start+2, desc);
+                        generic_handle_irq(start+2);
         }
 }
 
@@ -572,7 +562,7 @@ s3c_irq_demux_extint8(unsigned int irq,
                 eintpnd &= ~(1<<irq);
 
                 irq += (IRQ_EINT4 - 4);
-                desc_handle_irq(irq, irq_desc + irq);
+                generic_handle_irq(irq);
         }
 
 }
@@ -595,7 +585,7 @@ s3c_irq_demux_extint4t7(unsigned int irq,
 
                 irq += (IRQ_EINT4 - 4);
 
-                desc_handle_irq(irq, irq_desc + irq);
+                generic_handle_irq(irq);
         }
 }
 
diff --git a/arch/arm/plat-s3c24xx/s3c244x-irq.c b/arch/arm/plat-s3c24xx/s3c244x-irq.c
index 13bc655e1b6e..0601c5f3230b 100644
--- a/arch/arm/plat-s3c24xx/s3c244x-irq.c
+++ b/arch/arm/plat-s3c24xx/s3c244x-irq.c
@@ -44,7 +44,6 @@ static void s3c_irq_demux_cam(unsigned int irq,
                               struct irq_desc *desc)
 {
         unsigned int subsrc, submsk;
-        struct irq_desc *mydesc;
 
         /* read the current pending interrupts, and the mask
          * for what it is available */
@@ -58,12 +57,10 @@ static void s3c_irq_demux_cam(unsigned int irq,
 
         if (subsrc != 0) {
                 if (subsrc & 1) {
-                        mydesc = irq_desc + IRQ_S3C2440_CAM_C;
-                        desc_handle_irq(IRQ_S3C2440_CAM_C, mydesc);
+                        generic_handle_irq(IRQ_S3C2440_CAM_C);
                 }
                 if (subsrc & 2) {
-                        mydesc = irq_desc + IRQ_S3C2440_CAM_P;
-                        desc_handle_irq(IRQ_S3C2440_CAM_P, mydesc);
+                        generic_handle_irq(IRQ_S3C2440_CAM_P);
                 }
         }
 }