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-rw-r--r--arch/arm/mach-omap2/omap-mpuss-lowpower.c55
1 files changed, 34 insertions, 21 deletions
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index fad6e8c7e69e..53d8de5764e8 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -118,7 +118,8 @@ static inline void set_cpu_wakeup_addr(unsigned int cpu_id, u32 addr)
118{ 118{
119 struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu_id); 119 struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu_id);
120 120
121 writel_relaxed(addr, pm_info->wkup_sar_addr); 121 if (pm_info->wkup_sar_addr)
122 writel_relaxed(addr, pm_info->wkup_sar_addr);
122} 123}
123 124
124/* 125/*
@@ -143,7 +144,8 @@ static void scu_pwrst_prepare(unsigned int cpu_id, unsigned int cpu_state)
143 break; 144 break;
144 } 145 }
145 146
146 writel_relaxed(scu_pwr_st, pm_info->scu_sar_addr); 147 if (pm_info->scu_sar_addr)
148 writel_relaxed(scu_pwr_st, pm_info->scu_sar_addr);
147} 149}
148 150
149/* Helper functions for MPUSS OSWR */ 151/* Helper functions for MPUSS OSWR */
@@ -181,7 +183,8 @@ static void l2x0_pwrst_prepare(unsigned int cpu_id, unsigned int save_state)
181{ 183{
182 struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu_id); 184 struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu_id);
183 185
184 writel_relaxed(save_state, pm_info->l2x0_sar_addr); 186 if (pm_info->l2x0_sar_addr)
187 writel_relaxed(save_state, pm_info->l2x0_sar_addr);
185} 188}
186 189
187/* 190/*
@@ -191,10 +194,14 @@ static void l2x0_pwrst_prepare(unsigned int cpu_id, unsigned int save_state)
191#ifdef CONFIG_CACHE_L2X0 194#ifdef CONFIG_CACHE_L2X0
192static void __init save_l2x0_context(void) 195static void __init save_l2x0_context(void)
193{ 196{
194 writel_relaxed(l2x0_saved_regs.aux_ctrl, 197 void __iomem *l2x0_base = omap4_get_l2cache_base();
195 sar_base + L2X0_AUXCTRL_OFFSET); 198
196 writel_relaxed(l2x0_saved_regs.prefetch_ctrl, 199 if (l2x0_base && sar_base) {
197 sar_base + L2X0_PREFETCH_CTRL_OFFSET); 200 writel_relaxed(l2x0_saved_regs.aux_ctrl,
201 sar_base + L2X0_AUXCTRL_OFFSET);
202 writel_relaxed(l2x0_saved_regs.prefetch_ctrl,
203 sar_base + L2X0_PREFETCH_CTRL_OFFSET);
204 }
198} 205}
199#else 206#else
200static void __init save_l2x0_context(void) 207static void __init save_l2x0_context(void)
@@ -347,13 +354,17 @@ int __init omap4_mpuss_init(void)
347 return -ENODEV; 354 return -ENODEV;
348 } 355 }
349 356
350 sar_base = omap4_get_sar_ram_base(); 357 if (cpu_is_omap44xx())
358 sar_base = omap4_get_sar_ram_base();
351 359
352 /* Initilaise per CPU PM information */ 360 /* Initilaise per CPU PM information */
353 pm_info = &per_cpu(omap4_pm_info, 0x0); 361 pm_info = &per_cpu(omap4_pm_info, 0x0);
354 pm_info->scu_sar_addr = sar_base + SCU_OFFSET0; 362 if (sar_base) {
355 pm_info->wkup_sar_addr = sar_base + CPU0_WAKEUP_NS_PA_ADDR_OFFSET; 363 pm_info->scu_sar_addr = sar_base + SCU_OFFSET0;
356 pm_info->l2x0_sar_addr = sar_base + L2X0_SAVE_OFFSET0; 364 pm_info->wkup_sar_addr = sar_base +
365 CPU0_WAKEUP_NS_PA_ADDR_OFFSET;
366 pm_info->l2x0_sar_addr = sar_base + L2X0_SAVE_OFFSET0;
367 }
357 pm_info->pwrdm = pwrdm_lookup("cpu0_pwrdm"); 368 pm_info->pwrdm = pwrdm_lookup("cpu0_pwrdm");
358 if (!pm_info->pwrdm) { 369 if (!pm_info->pwrdm) {
359 pr_err("Lookup failed for CPU0 pwrdm\n"); 370 pr_err("Lookup failed for CPU0 pwrdm\n");
@@ -368,9 +379,12 @@ int __init omap4_mpuss_init(void)
368 pwrdm_set_next_pwrst(pm_info->pwrdm, PWRDM_POWER_ON); 379 pwrdm_set_next_pwrst(pm_info->pwrdm, PWRDM_POWER_ON);
369 380
370 pm_info = &per_cpu(omap4_pm_info, 0x1); 381 pm_info = &per_cpu(omap4_pm_info, 0x1);
371 pm_info->scu_sar_addr = sar_base + SCU_OFFSET1; 382 if (sar_base) {
372 pm_info->wkup_sar_addr = sar_base + CPU1_WAKEUP_NS_PA_ADDR_OFFSET; 383 pm_info->scu_sar_addr = sar_base + SCU_OFFSET1;
373 pm_info->l2x0_sar_addr = sar_base + L2X0_SAVE_OFFSET1; 384 pm_info->wkup_sar_addr = sar_base +
385 CPU1_WAKEUP_NS_PA_ADDR_OFFSET;
386 pm_info->l2x0_sar_addr = sar_base + L2X0_SAVE_OFFSET1;
387 }
374 if (cpu_is_omap446x()) 388 if (cpu_is_omap446x())
375 pm_info->secondary_startup = omap4460_secondary_startup; 389 pm_info->secondary_startup = omap4460_secondary_startup;
376 else 390 else
@@ -397,13 +411,12 @@ int __init omap4_mpuss_init(void)
397 pwrdm_clear_all_prev_pwrst(mpuss_pd); 411 pwrdm_clear_all_prev_pwrst(mpuss_pd);
398 mpuss_clear_prev_logic_pwrst(); 412 mpuss_clear_prev_logic_pwrst();
399 413
400 /* Save device type on scratchpad for low level code to use */ 414 if (sar_base) {
401 if (omap_type() != OMAP2_DEVICE_TYPE_GP) 415 /* Save device type on scratchpad for low level code to use */
402 writel_relaxed(1, sar_base + OMAP_TYPE_OFFSET); 416 writel_relaxed((omap_type() != OMAP2_DEVICE_TYPE_GP) ? 1 : 0,
403 else 417 sar_base + OMAP_TYPE_OFFSET);
404 writel_relaxed(0, sar_base + OMAP_TYPE_OFFSET); 418 save_l2x0_context();
405 419 }
406 save_l2x0_context();
407 420
408 if (cpu_is_omap44xx()) { 421 if (cpu_is_omap44xx()) {
409 omap_pm_ops.finish_suspend = omap4_finish_suspend; 422 omap_pm_ops.finish_suspend = omap4_finish_suspend;