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-rw-r--r--arch/arm/Kconfig34
-rw-r--r--arch/arm/common/gic.c28
-rw-r--r--arch/arm/include/asm/hardware/it8152.h2
-rw-r--r--arch/arm/kernel/hw_breakpoint.c3
-rw-r--r--arch/arm/kernel/perf_event.c2
-rw-r--r--arch/arm/kernel/stacktrace.c2
-rw-r--r--arch/arm/kernel/traps.c5
-rw-r--r--arch/arm/kernel/unwind.c2
-rw-r--r--arch/arm/mach-ep93xx/include/mach/dma.h111
-rw-r--r--arch/arm/mach-kirkwood/common.c7
-rw-r--r--arch/arm/mach-kirkwood/d2net_v2-setup.c2
-rw-r--r--arch/arm/mach-kirkwood/lacie_v2-common.c14
-rw-r--r--arch/arm/mach-kirkwood/lacie_v2-common.h2
-rw-r--r--arch/arm/mach-kirkwood/mpp.c4
-rw-r--r--arch/arm/mach-kirkwood/netspace_v2-setup.c6
-rw-r--r--arch/arm/mach-kirkwood/netxbig_v2-setup.c4
-rw-r--r--arch/arm/mach-kirkwood/ts41x-setup.c14
-rw-r--r--arch/arm/mach-mmp/include/mach/cputype.h3
-rw-r--r--arch/arm/mach-mv78xx0/mpp.c4
-rw-r--r--arch/arm/mach-omap1/devices.c5
-rw-r--r--arch/arm/mach-omap1/include/mach/camera.h2
-rw-r--r--arch/arm/mach-omap2/board-devkit8000.c3
-rw-r--r--arch/arm/mach-orion5x/mpp.c4
-rw-r--r--arch/arm/mach-orion5x/ts78xx-setup.c2
-rw-r--r--arch/arm/mach-pxa/cm-x2xx.c2
-rw-r--r--arch/arm/mach-pxa/saar.c2
-rw-r--r--arch/arm/mach-s3c64xx/Kconfig2
-rw-r--r--arch/arm/mach-shmobile/Kconfig2
-rw-r--r--arch/arm/mach-shmobile/board-ap4evb.c52
-rw-r--r--arch/arm/mach-shmobile/clock-sh7372.c102
-rw-r--r--arch/arm/mach-shmobile/include/mach/gpio.h4
-rw-r--r--arch/arm/mach-shmobile/include/mach/sh7372.h2
-rw-r--r--arch/arm/mach-shmobile/intc-sh7372.c2
-rw-r--r--arch/arm/mach-vexpress/ct-ca9x4.c2
-rw-r--r--arch/arm/mm/dma-mapping.c2
-rw-r--r--arch/arm/plat-omap/devices.c4
-rw-r--r--arch/arm/plat-omap/dma.c2
-rw-r--r--arch/arm/plat-orion/include/plat/pcie.h3
-rw-r--r--arch/arm/plat-orion/pcie.c5
-rw-r--r--arch/m68k/include/asm/irqflags.h2
-rw-r--r--arch/m68k/include/asm/machdep.h1
-rw-r--r--arch/powerpc/kernel/kvm.c2
-rw-r--r--arch/powerpc/kvm/booke_interrupts.S2
-rw-r--r--arch/powerpc/kvm/e500.c2
-rw-r--r--arch/powerpc/kvm/powerpc.c1
-rw-r--r--arch/powerpc/kvm/timing.c2
-rw-r--r--arch/sh/Kconfig1
-rw-r--r--arch/sh/Makefile3
-rw-r--r--arch/sh/boards/Kconfig7
-rw-r--r--arch/sh/boards/Makefile2
-rw-r--r--arch/sh/boards/board-edosk7705.c78
-rw-r--r--arch/sh/boards/board-secureedge5410.c (renamed from arch/sh/boards/mach-snapgear/setup.c)38
-rw-r--r--arch/sh/boards/mach-edosk7705/Makefile5
-rw-r--r--arch/sh/boards/mach-edosk7705/io.c71
-rw-r--r--arch/sh/boards/mach-edosk7705/setup.c36
-rw-r--r--arch/sh/boards/mach-microdev/io.c246
-rw-r--r--arch/sh/boards/mach-microdev/setup.c23
-rw-r--r--arch/sh/boards/mach-se/7206/Makefile2
-rw-r--r--arch/sh/boards/mach-se/7206/io.c104
-rw-r--r--arch/sh/boards/mach-se/7206/irq.c4
-rw-r--r--arch/sh/boards/mach-se/7206/setup.c15
-rw-r--r--arch/sh/boards/mach-se/770x/Makefile2
-rw-r--r--arch/sh/boards/mach-se/770x/io.c156
-rw-r--r--arch/sh/boards/mach-se/770x/setup.c22
-rw-r--r--arch/sh/boards/mach-se/7751/Makefile2
-rw-r--r--arch/sh/boards/mach-se/7751/io.c119
-rw-r--r--arch/sh/boards/mach-se/7751/setup.c18
-rw-r--r--arch/sh/boards/mach-snapgear/Makefile5
-rw-r--r--arch/sh/boards/mach-snapgear/io.c121
-rw-r--r--arch/sh/boards/mach-systemh/Makefile13
-rw-r--r--arch/sh/boards/mach-systemh/io.c158
-rw-r--r--arch/sh/boards/mach-systemh/irq.c61
-rw-r--r--arch/sh/boards/mach-systemh/setup.c57
-rw-r--r--arch/sh/configs/secureedge5410_defconfig (renamed from arch/sh/configs/snapgear_defconfig)0
-rw-r--r--arch/sh/configs/systemh_defconfig28
-rw-r--r--arch/sh/include/asm/addrspace.h8
-rw-r--r--arch/sh/include/asm/pgtable.h12
-rw-r--r--arch/sh/include/asm/system.h4
-rw-r--r--arch/sh/include/asm/system_32.h36
-rw-r--r--arch/sh/include/asm/system_64.h3
-rw-r--r--arch/sh/include/asm/uncached.h40
-rw-r--r--arch/sh/include/mach-common/mach/edosk7705.h7
-rw-r--r--arch/sh/include/mach-common/mach/microdev.h9
-rw-r--r--arch/sh/include/mach-common/mach/secureedge5410.h (renamed from arch/sh/include/mach-common/mach/snapgear.h)22
-rw-r--r--arch/sh/include/mach-common/mach/systemh7751.h71
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7724.c6
-rw-r--r--arch/sh/mm/Kconfig2
-rw-r--r--arch/sh/mm/consistent.c15
-rw-r--r--arch/sh/mm/uncached.c2
-rw-r--r--arch/sh/tools/mach-types1
-rw-r--r--arch/tile/include/asm/highmem.h1
-rw-r--r--arch/tile/include/asm/kmap_types.h34
-rw-r--r--arch/tile/include/asm/pgtable.h6
-rw-r--r--arch/tile/include/asm/stat.h3
-rw-r--r--arch/tile/include/asm/unistd.h1
-rw-r--r--arch/tile/kernel/compat.c10
-rw-r--r--arch/tile/kernel/early_printk.c2
-rw-r--r--arch/tile/kernel/hardwall.c6
-rw-r--r--arch/tile/kernel/irq.c4
-rw-r--r--arch/tile/kernel/machine_kexec.c6
-rw-r--r--arch/tile/kernel/messaging.c2
-rw-r--r--arch/tile/kernel/ptrace.c39
-rw-r--r--arch/tile/kernel/reboot.c6
-rw-r--r--arch/tile/kernel/setup.c8
-rw-r--r--arch/tile/kernel/signal.c9
-rw-r--r--arch/tile/kernel/smp.c2
-rw-r--r--arch/tile/kernel/time.c8
-rw-r--r--arch/tile/lib/memcpy_tile64.c11
-rw-r--r--arch/tile/mm/highmem.c2
-rw-r--r--arch/tile/mm/init.c8
-rw-r--r--arch/tile/mm/pgtable.c4
-rw-r--r--arch/um/include/asm/ptrace-generic.h4
-rw-r--r--arch/um/kernel/ptrace.c2
-rw-r--r--arch/x86/include/asm/apic.h10
-rw-r--r--arch/x86/include/asm/uv/uv_mmrs.h189
-rw-r--r--arch/x86/kernel/apic/apic.c1
-rw-r--r--arch/x86/kernel/apic/x2apic_uv_x.c12
-rw-r--r--arch/x86/kernel/cpu/perf_event_amd.c4
-rw-r--r--arch/x86/kernel/microcode_amd.c2
-rw-r--r--arch/x86/kernel/mmconf-fam10h_64.c7
-rw-r--r--arch/x86/kernel/pvclock.c38
-rw-r--r--arch/x86/kvm/mmu.c9
-rw-r--r--arch/x86/kvm/x86.c16
-rw-r--r--arch/x86/mm/tlb.c2
-rw-r--r--arch/x86/pci/acpi.c103
-rw-r--r--arch/x86/pci/xen.c8
-rw-r--r--arch/x86/platform/uv/tlb_uv.c13
-rw-r--r--arch/x86/xen/mmu.c2
-rw-r--r--arch/x86/xen/setup.c18
129 files changed, 863 insertions, 1849 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a19a5266d5fc..db524e75c4a2 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -6,7 +6,7 @@ config ARM
6 select HAVE_MEMBLOCK 6 select HAVE_MEMBLOCK
7 select RTC_LIB 7 select RTC_LIB
8 select SYS_SUPPORTS_APM_EMULATION 8 select SYS_SUPPORTS_APM_EMULATION
9 select GENERIC_ATOMIC64 if (!CPU_32v6K) 9 select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
10 select HAVE_OPROFILE if (HAVE_PERF_EVENTS) 10 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
11 select HAVE_ARCH_KGDB 11 select HAVE_ARCH_KGDB
12 select HAVE_KPROBES if (!XIP_KERNEL) 12 select HAVE_KPROBES if (!XIP_KERNEL)
@@ -646,7 +646,7 @@ config ARCH_S3C2410
646 select ARCH_HAS_CPUFREQ 646 select ARCH_HAS_CPUFREQ
647 select HAVE_CLK 647 select HAVE_CLK
648 select ARCH_USES_GETTIMEOFFSET 648 select ARCH_USES_GETTIMEOFFSET
649 select HAVE_S3C2410_I2C 649 select HAVE_S3C2410_I2C if I2C
650 help 650 help
651 Samsung S3C2410X CPU based systems, such as the Simtec Electronics 651 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
652 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or 652 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
@@ -676,8 +676,8 @@ config ARCH_S3C64XX
676 select S3C_DEV_NAND 676 select S3C_DEV_NAND
677 select USB_ARCH_HAS_OHCI 677 select USB_ARCH_HAS_OHCI
678 select SAMSUNG_GPIOLIB_4BIT 678 select SAMSUNG_GPIOLIB_4BIT
679 select HAVE_S3C2410_I2C 679 select HAVE_S3C2410_I2C if I2C
680 select HAVE_S3C2410_WATCHDOG 680 select HAVE_S3C2410_WATCHDOG if WATCHDOG
681 help 681 help
682 Samsung S3C64XX series based systems 682 Samsung S3C64XX series based systems
683 683
@@ -686,10 +686,10 @@ config ARCH_S5P64X0
686 select CPU_V6 686 select CPU_V6
687 select GENERIC_GPIO 687 select GENERIC_GPIO
688 select HAVE_CLK 688 select HAVE_CLK
689 select HAVE_S3C2410_WATCHDOG 689 select HAVE_S3C2410_WATCHDOG if WATCHDOG
690 select ARCH_USES_GETTIMEOFFSET 690 select ARCH_USES_GETTIMEOFFSET
691 select HAVE_S3C2410_I2C 691 select HAVE_S3C2410_I2C if I2C
692 select HAVE_S3C_RTC 692 select HAVE_S3C_RTC if RTC_CLASS
693 help 693 help
694 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440, 694 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
695 SMDK6450. 695 SMDK6450.
@@ -700,7 +700,7 @@ config ARCH_S5P6442
700 select GENERIC_GPIO 700 select GENERIC_GPIO
701 select HAVE_CLK 701 select HAVE_CLK
702 select ARCH_USES_GETTIMEOFFSET 702 select ARCH_USES_GETTIMEOFFSET
703 select HAVE_S3C2410_WATCHDOG 703 select HAVE_S3C2410_WATCHDOG if WATCHDOG
704 help 704 help
705 Samsung S5P6442 CPU based systems 705 Samsung S5P6442 CPU based systems
706 706
@@ -711,9 +711,9 @@ config ARCH_S5PC100
711 select CPU_V7 711 select CPU_V7
712 select ARM_L1_CACHE_SHIFT_6 712 select ARM_L1_CACHE_SHIFT_6
713 select ARCH_USES_GETTIMEOFFSET 713 select ARCH_USES_GETTIMEOFFSET
714 select HAVE_S3C2410_I2C 714 select HAVE_S3C2410_I2C if I2C
715 select HAVE_S3C_RTC 715 select HAVE_S3C_RTC if RTC_CLASS
716 select HAVE_S3C2410_WATCHDOG 716 select HAVE_S3C2410_WATCHDOG if WATCHDOG
717 help 717 help
718 Samsung S5PC100 series based systems 718 Samsung S5PC100 series based systems
719 719
@@ -726,9 +726,9 @@ config ARCH_S5PV210
726 select ARM_L1_CACHE_SHIFT_6 726 select ARM_L1_CACHE_SHIFT_6
727 select ARCH_HAS_CPUFREQ 727 select ARCH_HAS_CPUFREQ
728 select ARCH_USES_GETTIMEOFFSET 728 select ARCH_USES_GETTIMEOFFSET
729 select HAVE_S3C2410_I2C 729 select HAVE_S3C2410_I2C if I2C
730 select HAVE_S3C_RTC 730 select HAVE_S3C_RTC if RTC_CLASS
731 select HAVE_S3C2410_WATCHDOG 731 select HAVE_S3C2410_WATCHDOG if WATCHDOG
732 help 732 help
733 Samsung S5PV210/S5PC110 series based systems 733 Samsung S5PV210/S5PC110 series based systems
734 734
@@ -739,9 +739,9 @@ config ARCH_S5PV310
739 select GENERIC_GPIO 739 select GENERIC_GPIO
740 select HAVE_CLK 740 select HAVE_CLK
741 select GENERIC_CLOCKEVENTS 741 select GENERIC_CLOCKEVENTS
742 select HAVE_S3C_RTC 742 select HAVE_S3C_RTC if RTC_CLASS
743 select HAVE_S3C2410_I2C 743 select HAVE_S3C2410_I2C if I2C
744 select HAVE_S3C2410_WATCHDOG 744 select HAVE_S3C2410_WATCHDOG if WATCHDOG
745 help 745 help
746 Samsung S5PV310 series based systems 746 Samsung S5PV310 series based systems
747 747
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index ada6359160eb..772f95f1aecd 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -251,15 +251,16 @@ void __init gic_dist_init(unsigned int gic_nr, void __iomem *base,
251 writel(cpumask, base + GIC_DIST_TARGET + i * 4 / 4); 251 writel(cpumask, base + GIC_DIST_TARGET + i * 4 / 4);
252 252
253 /* 253 /*
254 * Set priority on all interrupts. 254 * Set priority on all global interrupts.
255 */ 255 */
256 for (i = 0; i < max_irq; i += 4) 256 for (i = 32; i < max_irq; i += 4)
257 writel(0xa0a0a0a0, base + GIC_DIST_PRI + i * 4 / 4); 257 writel(0xa0a0a0a0, base + GIC_DIST_PRI + i * 4 / 4);
258 258
259 /* 259 /*
260 * Disable all interrupts. 260 * Disable all interrupts. Leave the PPI and SGIs alone
261 * as these enables are banked registers.
261 */ 262 */
262 for (i = 0; i < max_irq; i += 32) 263 for (i = 32; i < max_irq; i += 32)
263 writel(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32); 264 writel(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32);
264 265
265 /* 266 /*
@@ -277,11 +278,30 @@ void __init gic_dist_init(unsigned int gic_nr, void __iomem *base,
277 278
278void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base) 279void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base)
279{ 280{
281 void __iomem *dist_base;
282 int i;
283
280 if (gic_nr >= MAX_GIC_NR) 284 if (gic_nr >= MAX_GIC_NR)
281 BUG(); 285 BUG();
282 286
287 dist_base = gic_data[gic_nr].dist_base;
288 BUG_ON(!dist_base);
289
283 gic_data[gic_nr].cpu_base = base; 290 gic_data[gic_nr].cpu_base = base;
284 291
292 /*
293 * Deal with the banked PPI and SGI interrupts - disable all
294 * PPI interrupts, ensure all SGI interrupts are enabled.
295 */
296 writel(0xffff0000, dist_base + GIC_DIST_ENABLE_CLEAR);
297 writel(0x0000ffff, dist_base + GIC_DIST_ENABLE_SET);
298
299 /*
300 * Set priority on PPI and SGI interrupts
301 */
302 for (i = 0; i < 32; i += 4)
303 writel(0xa0a0a0a0, dist_base + GIC_DIST_PRI + i * 4 / 4);
304
285 writel(0xf0, base + GIC_CPU_PRIMASK); 305 writel(0xf0, base + GIC_CPU_PRIMASK);
286 writel(1, base + GIC_CPU_CTRL); 306 writel(1, base + GIC_CPU_CTRL);
287} 307}
diff --git a/arch/arm/include/asm/hardware/it8152.h b/arch/arm/include/asm/hardware/it8152.h
index 6700c7fc7ebd..21fa272301f8 100644
--- a/arch/arm/include/asm/hardware/it8152.h
+++ b/arch/arm/include/asm/hardware/it8152.h
@@ -75,7 +75,7 @@ extern unsigned long it8152_base_address;
75 IT8152_PD_IRQ(1) USB (USBR) 75 IT8152_PD_IRQ(1) USB (USBR)
76 IT8152_PD_IRQ(0) Audio controller (ACR) 76 IT8152_PD_IRQ(0) Audio controller (ACR)
77 */ 77 */
78#define IT8152_IRQ(x) (IRQ_BOARD_END + (x)) 78#define IT8152_IRQ(x) (IRQ_BOARD_START + (x))
79 79
80/* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */ 80/* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */
81#define IT8152_LD_IRQ_COUNT 9 81#define IT8152_LD_IRQ_COUNT 9
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index 54593b0c241b..21e3a4ab3b8c 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -748,8 +748,7 @@ static int hw_breakpoint_pending(unsigned long addr, unsigned int fsr,
748 breakpoint_handler(addr, regs); 748 breakpoint_handler(addr, regs);
749 break; 749 break;
750 case ARM_ENTRY_ASYNC_WATCHPOINT: 750 case ARM_ENTRY_ASYNC_WATCHPOINT:
751 WARN_ON("Asynchronous watchpoint exception taken. " 751 WARN(1, "Asynchronous watchpoint exception taken. Debugging results may be unreliable\n");
752 "Debugging results may be unreliable");
753 case ARM_ENTRY_SYNC_WATCHPOINT: 752 case ARM_ENTRY_SYNC_WATCHPOINT:
754 watchpoint_handler(addr, regs); 753 watchpoint_handler(addr, regs);
755 break; 754 break;
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 49643b1467e6..07a50357492a 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -1749,7 +1749,7 @@ static inline int armv7_pmnc_has_overflowed(unsigned long pmnc)
1749static inline int armv7_pmnc_counter_has_overflowed(unsigned long pmnc, 1749static inline int armv7_pmnc_counter_has_overflowed(unsigned long pmnc,
1750 enum armv7_counters counter) 1750 enum armv7_counters counter)
1751{ 1751{
1752 int ret; 1752 int ret = 0;
1753 1753
1754 if (counter == ARMV7_CYCLE_COUNTER) 1754 if (counter == ARMV7_CYCLE_COUNTER)
1755 ret = pmnc & ARMV7_FLAG_C; 1755 ret = pmnc & ARMV7_FLAG_C;
diff --git a/arch/arm/kernel/stacktrace.c b/arch/arm/kernel/stacktrace.c
index 20b7411e47fd..c2e112e1a05f 100644
--- a/arch/arm/kernel/stacktrace.c
+++ b/arch/arm/kernel/stacktrace.c
@@ -28,7 +28,7 @@ int notrace unwind_frame(struct stackframe *frame)
28 28
29 /* only go to a higher address on the stack */ 29 /* only go to a higher address on the stack */
30 low = frame->sp; 30 low = frame->sp;
31 high = ALIGN(low, THREAD_SIZE) + THREAD_SIZE; 31 high = ALIGN(low, THREAD_SIZE);
32 32
33 /* check current frame pointer is within bounds */ 33 /* check current frame pointer is within bounds */
34 if (fp < (low + 12) || fp + 4 >= high) 34 if (fp < (low + 12) || fp + 4 >= high)
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index cda78d59aa31..446aee97436f 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -53,10 +53,7 @@ static void dump_mem(const char *, const char *, unsigned long, unsigned long);
53void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame) 53void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame)
54{ 54{
55#ifdef CONFIG_KALLSYMS 55#ifdef CONFIG_KALLSYMS
56 char sym1[KSYM_SYMBOL_LEN], sym2[KSYM_SYMBOL_LEN]; 56 printk("[<%08lx>] (%pS) from [<%08lx>] (%pS)\n", where, (void *)where, from, (void *)from);
57 sprint_symbol(sym1, where);
58 sprint_symbol(sym2, from);
59 printk("[<%08lx>] (%s) from [<%08lx>] (%s)\n", where, sym1, from, sym2);
60#else 57#else
61 printk("Function entered at [<%08lx>] from [<%08lx>]\n", where, from); 58 printk("Function entered at [<%08lx>] from [<%08lx>]\n", where, from);
62#endif 59#endif
diff --git a/arch/arm/kernel/unwind.c b/arch/arm/kernel/unwind.c
index 2a161765f6d5..d2cb0b3c9872 100644
--- a/arch/arm/kernel/unwind.c
+++ b/arch/arm/kernel/unwind.c
@@ -279,7 +279,7 @@ int unwind_frame(struct stackframe *frame)
279 279
280 /* only go to a higher address on the stack */ 280 /* only go to a higher address on the stack */
281 low = frame->sp; 281 low = frame->sp;
282 high = ALIGN(low, THREAD_SIZE) + THREAD_SIZE; 282 high = ALIGN(low, THREAD_SIZE);
283 283
284 pr_debug("%s(pc = %08lx lr = %08lx sp = %08lx)\n", __func__, 284 pr_debug("%s(pc = %08lx lr = %08lx sp = %08lx)\n", __func__,
285 frame->pc, frame->lr, frame->sp); 285 frame->pc, frame->lr, frame->sp);
diff --git a/arch/arm/mach-ep93xx/include/mach/dma.h b/arch/arm/mach-ep93xx/include/mach/dma.h
index 3a5961d3f3b1..5e31b2b25da9 100644
--- a/arch/arm/mach-ep93xx/include/mach/dma.h
+++ b/arch/arm/mach-ep93xx/include/mach/dma.h
@@ -1,5 +1,13 @@
1/* 1/**
2 * arch/arm/mach-ep93xx/include/mach/dma.h 2 * DOC: EP93xx DMA M2P memory to peripheral and peripheral to memory engine
3 *
4 * The EP93xx DMA M2P subsystem handles DMA transfers between memory and
5 * peripherals. DMA M2P channels are available for audio, UARTs and IrDA.
6 * See chapter 10 of the EP93xx users guide for full details on the DMA M2P
7 * engine.
8 *
9 * See sound/soc/ep93xx/ep93xx-pcm.c for an example use of the DMA M2P code.
10 *
3 */ 11 */
4 12
5#ifndef __ASM_ARCH_DMA_H 13#ifndef __ASM_ARCH_DMA_H
@@ -8,12 +16,34 @@
8#include <linux/list.h> 16#include <linux/list.h>
9#include <linux/types.h> 17#include <linux/types.h>
10 18
19/**
20 * struct ep93xx_dma_buffer - Information about a buffer to be transferred
21 * using the DMA M2P engine
22 *
23 * @list: Entry in DMA buffer list
24 * @bus_addr: Physical address of the buffer
25 * @size: Size of the buffer in bytes
26 */
11struct ep93xx_dma_buffer { 27struct ep93xx_dma_buffer {
12 struct list_head list; 28 struct list_head list;
13 u32 bus_addr; 29 u32 bus_addr;
14 u16 size; 30 u16 size;
15}; 31};
16 32
33/**
34 * struct ep93xx_dma_m2p_client - Information about a DMA M2P client
35 *
36 * @name: Unique name for this client
37 * @flags: Client flags
38 * @cookie: User data to pass to callback functions
39 * @buffer_started: Non NULL function to call when a transfer is started.
40 * The arguments are the user data cookie and the DMA
41 * buffer which is starting.
42 * @buffer_finished: Non NULL function to call when a transfer is completed.
43 * The arguments are the user data cookie, the DMA buffer
44 * which has completed, and a boolean flag indicating if
45 * the transfer had an error.
46 */
17struct ep93xx_dma_m2p_client { 47struct ep93xx_dma_m2p_client {
18 char *name; 48 char *name;
19 u8 flags; 49 u8 flags;
@@ -24,10 +54,11 @@ struct ep93xx_dma_m2p_client {
24 struct ep93xx_dma_buffer *buf, 54 struct ep93xx_dma_buffer *buf,
25 int bytes, int error); 55 int bytes, int error);
26 56
27 /* Internal to the DMA code. */ 57 /* private: Internal use only */
28 void *channel; 58 void *channel;
29}; 59};
30 60
61/* DMA M2P ports */
31#define EP93XX_DMA_M2P_PORT_I2S1 0x00 62#define EP93XX_DMA_M2P_PORT_I2S1 0x00
32#define EP93XX_DMA_M2P_PORT_I2S2 0x01 63#define EP93XX_DMA_M2P_PORT_I2S2 0x01
33#define EP93XX_DMA_M2P_PORT_AAC1 0x02 64#define EP93XX_DMA_M2P_PORT_AAC1 0x02
@@ -39,18 +70,80 @@ struct ep93xx_dma_m2p_client {
39#define EP93XX_DMA_M2P_PORT_UART3 0x08 70#define EP93XX_DMA_M2P_PORT_UART3 0x08
40#define EP93XX_DMA_M2P_PORT_IRDA 0x09 71#define EP93XX_DMA_M2P_PORT_IRDA 0x09
41#define EP93XX_DMA_M2P_PORT_MASK 0x0f 72#define EP93XX_DMA_M2P_PORT_MASK 0x0f
42#define EP93XX_DMA_M2P_TX 0x00
43#define EP93XX_DMA_M2P_RX 0x10
44#define EP93XX_DMA_M2P_ABORT_ON_ERROR 0x20
45#define EP93XX_DMA_M2P_IGNORE_ERROR 0x40
46#define EP93XX_DMA_M2P_ERROR_MASK 0x60
47 73
48int ep93xx_dma_m2p_client_register(struct ep93xx_dma_m2p_client *m2p); 74/* DMA M2P client flags */
75#define EP93XX_DMA_M2P_TX 0x00 /* Memory to peripheral */
76#define EP93XX_DMA_M2P_RX 0x10 /* Peripheral to memory */
77
78/*
79 * DMA M2P client error handling flags. See the EP93xx users guide
80 * documentation on the DMA M2P CONTROL register for more details
81 */
82#define EP93XX_DMA_M2P_ABORT_ON_ERROR 0x20 /* Abort on peripheral error */
83#define EP93XX_DMA_M2P_IGNORE_ERROR 0x40 /* Ignore peripheral errors */
84#define EP93XX_DMA_M2P_ERROR_MASK 0x60 /* Mask of error bits */
85
86/**
87 * ep93xx_dma_m2p_client_register - Register a client with the DMA M2P
88 * subsystem
89 *
90 * @m2p: Client information to register
91 * returns 0 on success
92 *
93 * The DMA M2P subsystem allocates a channel and an interrupt line for the DMA
94 * client
95 */
96int ep93xx_dma_m2p_client_register(struct ep93xx_dma_m2p_client *m2p);
97
98/**
99 * ep93xx_dma_m2p_client_unregister - Unregister a client from the DMA M2P
100 * subsystem
101 *
102 * @m2p: Client to unregister
103 *
104 * Any transfers currently in progress will be completed in hardware, but
105 * ignored in software.
106 */
49void ep93xx_dma_m2p_client_unregister(struct ep93xx_dma_m2p_client *m2p); 107void ep93xx_dma_m2p_client_unregister(struct ep93xx_dma_m2p_client *m2p);
108
109/**
110 * ep93xx_dma_m2p_submit - Submit a DMA M2P transfer
111 *
112 * @m2p: DMA Client to submit the transfer on
113 * @buf: DMA Buffer to submit
114 *
115 * If the current or next transfer positions are free on the M2P client then
116 * the transfer is started immediately. If not, the transfer is added to the
117 * list of pending transfers. This function must not be called from the
118 * buffer_finished callback for an M2P channel.
119 *
120 */
50void ep93xx_dma_m2p_submit(struct ep93xx_dma_m2p_client *m2p, 121void ep93xx_dma_m2p_submit(struct ep93xx_dma_m2p_client *m2p,
51 struct ep93xx_dma_buffer *buf); 122 struct ep93xx_dma_buffer *buf);
123
124/**
125 * ep93xx_dma_m2p_submit_recursive - Put a DMA transfer on the pending list
126 * for an M2P channel
127 *
128 * @m2p: DMA Client to submit the transfer on
129 * @buf: DMA Buffer to submit
130 *
131 * This function must only be called from the buffer_finished callback for an
132 * M2P channel. It is commonly used to add the next transfer in a chained list
133 * of DMA transfers.
134 */
52void ep93xx_dma_m2p_submit_recursive(struct ep93xx_dma_m2p_client *m2p, 135void ep93xx_dma_m2p_submit_recursive(struct ep93xx_dma_m2p_client *m2p,
53 struct ep93xx_dma_buffer *buf); 136 struct ep93xx_dma_buffer *buf);
137
138/**
139 * ep93xx_dma_m2p_flush - Flush all pending transfers on a DMA M2P client
140 *
141 * @m2p: DMA client to flush transfers on
142 *
143 * Any transfers currently in progress will be completed in hardware, but
144 * ignored in software.
145 *
146 */
54void ep93xx_dma_m2p_flush(struct ep93xx_dma_m2p_client *m2p); 147void ep93xx_dma_m2p_flush(struct ep93xx_dma_m2p_client *m2p);
55 148
56#endif /* __ASM_ARCH_DMA_H */ 149#endif /* __ASM_ARCH_DMA_H */
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 51ff23b72d3a..3688123b5ad8 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -854,10 +854,9 @@ int __init kirkwood_find_tclk(void)
854 854
855 kirkwood_pcie_id(&dev, &rev); 855 kirkwood_pcie_id(&dev, &rev);
856 856
857 if ((dev == MV88F6281_DEV_ID && (rev == MV88F6281_REV_A0 || 857 if (dev == MV88F6281_DEV_ID || dev == MV88F6282_DEV_ID)
858 rev == MV88F6281_REV_A1)) || 858 if (((readl(SAMPLE_AT_RESET) >> 21) & 1) == 0)
859 (dev == MV88F6282_DEV_ID)) 859 return 200000000;
860 return 200000000;
861 860
862 return 166666667; 861 return 166666667;
863} 862}
diff --git a/arch/arm/mach-kirkwood/d2net_v2-setup.c b/arch/arm/mach-kirkwood/d2net_v2-setup.c
index 4aa86e4a152c..a31c9499ab36 100644
--- a/arch/arm/mach-kirkwood/d2net_v2-setup.c
+++ b/arch/arm/mach-kirkwood/d2net_v2-setup.c
@@ -225,5 +225,5 @@ MACHINE_START(D2NET_V2, "LaCie d2 Network v2")
225 .init_machine = d2net_v2_init, 225 .init_machine = d2net_v2_init,
226 .map_io = kirkwood_map_io, 226 .map_io = kirkwood_map_io,
227 .init_irq = kirkwood_init_irq, 227 .init_irq = kirkwood_init_irq,
228 .timer = &lacie_v2_timer, 228 .timer = &kirkwood_timer,
229MACHINE_END 229MACHINE_END
diff --git a/arch/arm/mach-kirkwood/lacie_v2-common.c b/arch/arm/mach-kirkwood/lacie_v2-common.c
index d3ea1b6c8a02..285edab776e9 100644
--- a/arch/arm/mach-kirkwood/lacie_v2-common.c
+++ b/arch/arm/mach-kirkwood/lacie_v2-common.c
@@ -111,17 +111,3 @@ void __init lacie_v2_hdd_power_init(int hdd_num)
111 pr_err("Failed to power up HDD%d\n", i + 1); 111 pr_err("Failed to power up HDD%d\n", i + 1);
112 } 112 }
113} 113}
114
115/*****************************************************************************
116 * Timer
117 ****************************************************************************/
118
119static void lacie_v2_timer_init(void)
120{
121 kirkwood_tclk = 166666667;
122 orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
123}
124
125struct sys_timer lacie_v2_timer = {
126 .init = lacie_v2_timer_init,
127};
diff --git a/arch/arm/mach-kirkwood/lacie_v2-common.h b/arch/arm/mach-kirkwood/lacie_v2-common.h
index af521315b87b..fc64f578536e 100644
--- a/arch/arm/mach-kirkwood/lacie_v2-common.h
+++ b/arch/arm/mach-kirkwood/lacie_v2-common.h
@@ -13,6 +13,4 @@ void lacie_v2_register_flash(void);
13void lacie_v2_register_i2c_devices(void); 13void lacie_v2_register_i2c_devices(void);
14void lacie_v2_hdd_power_init(int hdd_num); 14void lacie_v2_hdd_power_init(int hdd_num);
15 15
16extern struct sys_timer lacie_v2_timer;
17
18#endif 16#endif
diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c
index 065187d177c6..27901f702feb 100644
--- a/arch/arm/mach-kirkwood/mpp.c
+++ b/arch/arm/mach-kirkwood/mpp.c
@@ -59,7 +59,7 @@ void __init kirkwood_mpp_conf(unsigned int *mpp_list)
59 } 59 }
60 printk("\n"); 60 printk("\n");
61 61
62 while (*mpp_list) { 62 for ( ; *mpp_list; mpp_list++) {
63 unsigned int num = MPP_NUM(*mpp_list); 63 unsigned int num = MPP_NUM(*mpp_list);
64 unsigned int sel = MPP_SEL(*mpp_list); 64 unsigned int sel = MPP_SEL(*mpp_list);
65 int shift, gpio_mode; 65 int shift, gpio_mode;
@@ -88,8 +88,6 @@ void __init kirkwood_mpp_conf(unsigned int *mpp_list)
88 if (sel != 0) 88 if (sel != 0)
89 gpio_mode = 0; 89 gpio_mode = 0;
90 orion_gpio_set_valid(num, gpio_mode); 90 orion_gpio_set_valid(num, gpio_mode);
91
92 mpp_list++;
93 } 91 }
94 92
95 printk(KERN_DEBUG " final MPP regs:"); 93 printk(KERN_DEBUG " final MPP regs:");
diff --git a/arch/arm/mach-kirkwood/netspace_v2-setup.c b/arch/arm/mach-kirkwood/netspace_v2-setup.c
index 5ea66f1f4178..65ee21fd2f3b 100644
--- a/arch/arm/mach-kirkwood/netspace_v2-setup.c
+++ b/arch/arm/mach-kirkwood/netspace_v2-setup.c
@@ -262,7 +262,7 @@ MACHINE_START(NETSPACE_V2, "LaCie Network Space v2")
262 .init_machine = netspace_v2_init, 262 .init_machine = netspace_v2_init,
263 .map_io = kirkwood_map_io, 263 .map_io = kirkwood_map_io,
264 .init_irq = kirkwood_init_irq, 264 .init_irq = kirkwood_init_irq,
265 .timer = &lacie_v2_timer, 265 .timer = &kirkwood_timer,
266MACHINE_END 266MACHINE_END
267#endif 267#endif
268 268
@@ -272,7 +272,7 @@ MACHINE_START(INETSPACE_V2, "LaCie Internet Space v2")
272 .init_machine = netspace_v2_init, 272 .init_machine = netspace_v2_init,
273 .map_io = kirkwood_map_io, 273 .map_io = kirkwood_map_io,
274 .init_irq = kirkwood_init_irq, 274 .init_irq = kirkwood_init_irq,
275 .timer = &lacie_v2_timer, 275 .timer = &kirkwood_timer,
276MACHINE_END 276MACHINE_END
277#endif 277#endif
278 278
@@ -282,6 +282,6 @@ MACHINE_START(NETSPACE_MAX_V2, "LaCie Network Space Max v2")
282 .init_machine = netspace_v2_init, 282 .init_machine = netspace_v2_init,
283 .map_io = kirkwood_map_io, 283 .map_io = kirkwood_map_io,
284 .init_irq = kirkwood_init_irq, 284 .init_irq = kirkwood_init_irq,
285 .timer = &lacie_v2_timer, 285 .timer = &kirkwood_timer,
286MACHINE_END 286MACHINE_END
287#endif 287#endif
diff --git a/arch/arm/mach-kirkwood/netxbig_v2-setup.c b/arch/arm/mach-kirkwood/netxbig_v2-setup.c
index a1b45d501aef..93afd3c8bfd8 100644
--- a/arch/arm/mach-kirkwood/netxbig_v2-setup.c
+++ b/arch/arm/mach-kirkwood/netxbig_v2-setup.c
@@ -403,7 +403,7 @@ MACHINE_START(NET2BIG_V2, "LaCie 2Big Network v2")
403 .init_machine = netxbig_v2_init, 403 .init_machine = netxbig_v2_init,
404 .map_io = kirkwood_map_io, 404 .map_io = kirkwood_map_io,
405 .init_irq = kirkwood_init_irq, 405 .init_irq = kirkwood_init_irq,
406 .timer = &lacie_v2_timer, 406 .timer = &kirkwood_timer,
407MACHINE_END 407MACHINE_END
408#endif 408#endif
409 409
@@ -413,6 +413,6 @@ MACHINE_START(NET5BIG_V2, "LaCie 5Big Network v2")
413 .init_machine = netxbig_v2_init, 413 .init_machine = netxbig_v2_init,
414 .map_io = kirkwood_map_io, 414 .map_io = kirkwood_map_io,
415 .init_irq = kirkwood_init_irq, 415 .init_irq = kirkwood_init_irq,
416 .timer = &lacie_v2_timer, 416 .timer = &kirkwood_timer,
417MACHINE_END 417MACHINE_END
418#endif 418#endif
diff --git a/arch/arm/mach-kirkwood/ts41x-setup.c b/arch/arm/mach-kirkwood/ts41x-setup.c
index 8be09a0ce4ac..3587a281d993 100644
--- a/arch/arm/mach-kirkwood/ts41x-setup.c
+++ b/arch/arm/mach-kirkwood/ts41x-setup.c
@@ -27,6 +27,10 @@
27#include "mpp.h" 27#include "mpp.h"
28#include "tsx1x-common.h" 28#include "tsx1x-common.h"
29 29
30/* for the PCIe reset workaround */
31#include <plat/pcie.h>
32
33
30#define QNAP_TS41X_JUMPER_JP1 45 34#define QNAP_TS41X_JUMPER_JP1 45
31 35
32static struct i2c_board_info __initdata qnap_ts41x_i2c_rtc = { 36static struct i2c_board_info __initdata qnap_ts41x_i2c_rtc = {
@@ -140,8 +144,16 @@ static void __init qnap_ts41x_init(void)
140 144
141static int __init ts41x_pci_init(void) 145static int __init ts41x_pci_init(void)
142{ 146{
143 if (machine_is_ts41x()) 147 if (machine_is_ts41x()) {
148 /*
149 * Without this explicit reset, the PCIe SATA controller
150 * (Marvell 88sx7042/sata_mv) is known to stop working
151 * after a few minutes.
152 */
153 orion_pcie_reset((void __iomem *)PCIE_VIRT_BASE);
154
144 kirkwood_pcie_init(KW_PCIE0); 155 kirkwood_pcie_init(KW_PCIE0);
156 }
145 157
146 return 0; 158 return 0;
147} 159}
diff --git a/arch/arm/mach-mmp/include/mach/cputype.h b/arch/arm/mach-mmp/include/mach/cputype.h
index f43a68b213f1..8a3b56dfd35d 100644
--- a/arch/arm/mach-mmp/include/mach/cputype.h
+++ b/arch/arm/mach-mmp/include/mach/cputype.h
@@ -46,7 +46,8 @@ static inline int cpu_is_pxa910(void)
46#ifdef CONFIG_CPU_MMP2 46#ifdef CONFIG_CPU_MMP2
47static inline int cpu_is_mmp2(void) 47static inline int cpu_is_mmp2(void)
48{ 48{
49 return (((cpu_readid_id() >> 8) & 0xff) == 0x58); 49 return (((read_cpuid_id() >> 8) & 0xff) == 0x58);
50}
50#else 51#else
51#define cpu_is_mmp2() (0) 52#define cpu_is_mmp2() (0)
52#endif 53#endif
diff --git a/arch/arm/mach-mv78xx0/mpp.c b/arch/arm/mach-mv78xx0/mpp.c
index 354ac514eb89..84db2dfc475c 100644
--- a/arch/arm/mach-mv78xx0/mpp.c
+++ b/arch/arm/mach-mv78xx0/mpp.c
@@ -54,7 +54,7 @@ void __init mv78xx0_mpp_conf(unsigned int *mpp_list)
54 } 54 }
55 printk("\n"); 55 printk("\n");
56 56
57 while (*mpp_list) { 57 for ( ; *mpp_list; mpp_list++) {
58 unsigned int num = MPP_NUM(*mpp_list); 58 unsigned int num = MPP_NUM(*mpp_list);
59 unsigned int sel = MPP_SEL(*mpp_list); 59 unsigned int sel = MPP_SEL(*mpp_list);
60 int shift, gpio_mode; 60 int shift, gpio_mode;
@@ -83,8 +83,6 @@ void __init mv78xx0_mpp_conf(unsigned int *mpp_list)
83 if (sel != 0) 83 if (sel != 0)
84 gpio_mode = 0; 84 gpio_mode = 0;
85 orion_gpio_set_valid(num, gpio_mode); 85 orion_gpio_set_valid(num, gpio_mode);
86
87 mpp_list++;
88 } 86 }
89 87
90 printk(KERN_DEBUG " final MPP regs:"); 88 printk(KERN_DEBUG " final MPP regs:");
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index ea0d80a89da7..e7f9ee63dce5 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -321,10 +321,9 @@ static struct platform_device omap_wdt_device = {
321static int __init omap_init_wdt(void) 321static int __init omap_init_wdt(void)
322{ 322{
323 if (!cpu_is_omap16xx()) 323 if (!cpu_is_omap16xx())
324 return; 324 return -ENODEV;
325 325
326 platform_device_register(&omap_wdt_device); 326 return platform_device_register(&omap_wdt_device);
327 return 0;
328} 327}
329subsys_initcall(omap_init_wdt); 328subsys_initcall(omap_init_wdt);
330#endif 329#endif
diff --git a/arch/arm/mach-omap1/include/mach/camera.h b/arch/arm/mach-omap1/include/mach/camera.h
index fd54b452eb22..847d00f0bb0a 100644
--- a/arch/arm/mach-omap1/include/mach/camera.h
+++ b/arch/arm/mach-omap1/include/mach/camera.h
@@ -1,6 +1,8 @@
1#ifndef __ASM_ARCH_CAMERA_H_ 1#ifndef __ASM_ARCH_CAMERA_H_
2#define __ASM_ARCH_CAMERA_H_ 2#define __ASM_ARCH_CAMERA_H_
3 3
4#include <media/omap1_camera.h>
5
4void omap1_camera_init(void *); 6void omap1_camera_init(void *);
5 7
6static inline void omap1_set_camera_info(struct omap1_cam_platform_data *info) 8static inline void omap1_set_camera_info(struct omap1_cam_platform_data *info)
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 067f4379c87f..53ac762518bd 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -242,9 +242,6 @@ static int devkit8000_twl_gpio_setup(struct device *dev,
242 mmc[0].gpio_cd = gpio + 0; 242 mmc[0].gpio_cd = gpio + 0;
243 omap2_hsmmc_init(mmc); 243 omap2_hsmmc_init(mmc);
244 244
245 /* link regulators to MMC adapters */
246 devkit8000_vmmc1_supply.dev = mmc[0].dev;
247
248 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ 245 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
249 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; 246 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
250 247
diff --git a/arch/arm/mach-orion5x/mpp.c b/arch/arm/mach-orion5x/mpp.c
index bc4c3b9aaf83..db485d3b8144 100644
--- a/arch/arm/mach-orion5x/mpp.c
+++ b/arch/arm/mach-orion5x/mpp.c
@@ -127,7 +127,7 @@ void __init orion5x_mpp_conf(struct orion5x_mpp_mode *mode)
127 /* Initialize gpiolib. */ 127 /* Initialize gpiolib. */
128 orion_gpio_init(); 128 orion_gpio_init();
129 129
130 while (mode->mpp >= 0) { 130 for ( ; mode->mpp >= 0; mode++) {
131 u32 *reg; 131 u32 *reg;
132 int num_type; 132 int num_type;
133 int shift; 133 int shift;
@@ -160,8 +160,6 @@ void __init orion5x_mpp_conf(struct orion5x_mpp_mode *mode)
160 orion_gpio_set_unused(mode->mpp); 160 orion_gpio_set_unused(mode->mpp);
161 161
162 orion_gpio_set_valid(mode->mpp, !!(mode->type == MPP_GPIO)); 162 orion_gpio_set_valid(mode->mpp, !!(mode->type == MPP_GPIO));
163
164 mode++;
165 } 163 }
166 164
167 writel(mpp_0_7_ctrl, MPP_0_7_CTRL); 165 writel(mpp_0_7_ctrl, MPP_0_7_CTRL);
diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c
index 16f1bd5324be..c1c1cd04bdde 100644
--- a/arch/arm/mach-orion5x/ts78xx-setup.c
+++ b/arch/arm/mach-orion5x/ts78xx-setup.c
@@ -239,7 +239,7 @@ static struct platform_nand_data ts78xx_ts_nand_data = {
239static struct resource ts78xx_ts_nand_resources = { 239static struct resource ts78xx_ts_nand_resources = {
240 .start = TS_NAND_DATA, 240 .start = TS_NAND_DATA,
241 .end = TS_NAND_DATA + 4, 241 .end = TS_NAND_DATA + 4,
242 .flags = IORESOURCE_IO, 242 .flags = IORESOURCE_MEM,
243}; 243};
244 244
245static struct platform_device ts78xx_ts_nand_device = { 245static struct platform_device ts78xx_ts_nand_device = {
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
index ac5598ce9724..d34b99febeb9 100644
--- a/arch/arm/mach-pxa/cm-x2xx.c
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -476,8 +476,6 @@ static void __init cmx2xx_init(void)
476 476
477static void __init cmx2xx_init_irq(void) 477static void __init cmx2xx_init_irq(void)
478{ 478{
479 pxa27x_init_irq();
480
481 if (cpu_is_pxa25x()) { 479 if (cpu_is_pxa25x()) {
482 pxa25x_init_irq(); 480 pxa25x_init_irq();
483 cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ); 481 cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ);
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c
index 4b521e045d75..ffa50e633ee6 100644
--- a/arch/arm/mach-pxa/saar.c
+++ b/arch/arm/mach-pxa/saar.c
@@ -116,7 +116,7 @@ static struct platform_device smc91x_device = {
116 }, 116 },
117}; 117};
118 118
119#if defined(CONFIG_FB_PXA) || (CONFIG_FB_PXA_MODULE) 119#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
120static uint16_t lcd_power_on[] = { 120static uint16_t lcd_power_on[] = {
121 /* single frame */ 121 /* single frame */
122 SMART_CMD_NOOP, 122 SMART_CMD_NOOP,
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index 1ca7bdc6485c..579d2f0f4dd0 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -143,7 +143,7 @@ config MACH_SMDK6410
143 select S3C_DEV_USB_HSOTG 143 select S3C_DEV_USB_HSOTG
144 select S3C_DEV_WDT 144 select S3C_DEV_WDT
145 select SAMSUNG_DEV_KEYPAD 145 select SAMSUNG_DEV_KEYPAD
146 select HAVE_S3C2410_WATCHDOG 146 select HAVE_S3C2410_WATCHDOG if WATCHDOG
147 select S3C64XX_SETUP_SDHCI 147 select S3C64XX_SETUP_SDHCI
148 select S3C64XX_SETUP_I2C1 148 select S3C64XX_SETUP_I2C1
149 select S3C64XX_SETUP_IDE 149 select S3C64XX_SETUP_IDE
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 54b479c35ee0..51dcd59eda6a 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -116,4 +116,6 @@ endmenu
116config SH_CLK_CPG 116config SH_CLK_CPG
117 bool 117 bool
118 118
119source "drivers/sh/Kconfig"
120
119endif 121endif
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index 46ca4d4abf91..d3260542b943 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -163,11 +163,13 @@ static struct mtd_partition nor_flash_partitions[] = {
163 .name = "loader", 163 .name = "loader",
164 .offset = 0x00000000, 164 .offset = 0x00000000,
165 .size = 512 * 1024, 165 .size = 512 * 1024,
166 .mask_flags = MTD_WRITEABLE,
166 }, 167 },
167 { 168 {
168 .name = "bootenv", 169 .name = "bootenv",
169 .offset = MTDPART_OFS_APPEND, 170 .offset = MTDPART_OFS_APPEND,
170 .size = 512 * 1024, 171 .size = 512 * 1024,
172 .mask_flags = MTD_WRITEABLE,
171 }, 173 },
172 { 174 {
173 .name = "kernel_ro", 175 .name = "kernel_ro",
@@ -565,12 +567,54 @@ static struct platform_device *qhd_devices[] __initdata = {
565 567
566/* FSI */ 568/* FSI */
567#define IRQ_FSI evt2irq(0x1840) 569#define IRQ_FSI evt2irq(0x1840)
570
571static int fsi_set_rate(int is_porta, int rate)
572{
573 struct clk *fsib_clk;
574 struct clk *fdiv_clk = &sh7372_fsidivb_clk;
575 int ret;
576
577 /* set_rate is not needed if port A */
578 if (is_porta)
579 return 0;
580
581 fsib_clk = clk_get(NULL, "fsib_clk");
582 if (IS_ERR(fsib_clk))
583 return -EINVAL;
584
585 switch (rate) {
586 case 44100:
587 clk_set_rate(fsib_clk, clk_round_rate(fsib_clk, 11283000));
588 ret = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
589 break;
590 case 48000:
591 clk_set_rate(fsib_clk, clk_round_rate(fsib_clk, 85428000));
592 clk_set_rate(fdiv_clk, clk_round_rate(fdiv_clk, 12204000));
593 ret = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
594 break;
595 default:
596 pr_err("unsupported rate in FSI2 port B\n");
597 ret = -EINVAL;
598 break;
599 }
600
601 clk_put(fsib_clk);
602
603 return ret;
604}
605
568static struct sh_fsi_platform_info fsi_info = { 606static struct sh_fsi_platform_info fsi_info = {
569 .porta_flags = SH_FSI_BRS_INV | 607 .porta_flags = SH_FSI_BRS_INV |
570 SH_FSI_OUT_SLAVE_MODE | 608 SH_FSI_OUT_SLAVE_MODE |
571 SH_FSI_IN_SLAVE_MODE | 609 SH_FSI_IN_SLAVE_MODE |
572 SH_FSI_OFMT(PCM) | 610 SH_FSI_OFMT(PCM) |
573 SH_FSI_IFMT(PCM), 611 SH_FSI_IFMT(PCM),
612
613 .portb_flags = SH_FSI_BRS_INV |
614 SH_FSI_BRM_INV |
615 SH_FSI_LRS_INV |
616 SH_FSI_OFMT(SPDIF),
617 .set_rate = fsi_set_rate,
574}; 618};
575 619
576static struct resource fsi_resources[] = { 620static struct resource fsi_resources[] = {
@@ -634,6 +678,7 @@ static struct platform_device lcdc1_device = {
634static struct sh_mobile_hdmi_info hdmi_info = { 678static struct sh_mobile_hdmi_info hdmi_info = {
635 .lcd_chan = &sh_mobile_lcdc1_info.ch[0], 679 .lcd_chan = &sh_mobile_lcdc1_info.ch[0],
636 .lcd_dev = &lcdc1_device.dev, 680 .lcd_dev = &lcdc1_device.dev,
681 .flags = HDMI_SND_SRC_SPDIF,
637}; 682};
638 683
639static struct resource hdmi_resources[] = { 684static struct resource hdmi_resources[] = {
@@ -992,6 +1037,7 @@ static void __init ap4evb_map_io(void)
992 1037
993#define GPIO_PORT9CR 0xE6051009 1038#define GPIO_PORT9CR 0xE6051009
994#define GPIO_PORT10CR 0xE605100A 1039#define GPIO_PORT10CR 0xE605100A
1040#define USCCR1 0xE6058144
995static void __init ap4evb_init(void) 1041static void __init ap4evb_init(void)
996{ 1042{
997 u32 srcr4; 1043 u32 srcr4;
@@ -1062,7 +1108,7 @@ static void __init ap4evb_init(void)
1062 /* setup USB phy */ 1108 /* setup USB phy */
1063 __raw_writew(0x8a0a, 0xE6058130); /* USBCR2 */ 1109 __raw_writew(0x8a0a, 0xE6058130); /* USBCR2 */
1064 1110
1065 /* enable FSI2 */ 1111 /* enable FSI2 port A (ak4643) */
1066 gpio_request(GPIO_FN_FSIAIBT, NULL); 1112 gpio_request(GPIO_FN_FSIAIBT, NULL);
1067 gpio_request(GPIO_FN_FSIAILR, NULL); 1113 gpio_request(GPIO_FN_FSIAILR, NULL);
1068 gpio_request(GPIO_FN_FSIAISLD, NULL); 1114 gpio_request(GPIO_FN_FSIAISLD, NULL);
@@ -1079,6 +1125,10 @@ static void __init ap4evb_init(void)
1079 gpio_request(GPIO_PORT41, NULL); 1125 gpio_request(GPIO_PORT41, NULL);
1080 gpio_direction_input(GPIO_PORT41); 1126 gpio_direction_input(GPIO_PORT41);
1081 1127
1128 /* setup FSI2 port B (HDMI) */
1129 gpio_request(GPIO_FN_FSIBCK, NULL);
1130 __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
1131
1082 /* set SPU2 clock to 119.6 MHz */ 1132 /* set SPU2 clock to 119.6 MHz */
1083 clk = clk_get(NULL, "spu_clk"); 1133 clk = clk_get(NULL, "spu_clk");
1084 if (!IS_ERR(clk)) { 1134 if (!IS_ERR(clk)) {
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 8565aefa21fd..7db31e6c6bf2 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -50,6 +50,9 @@
50#define SMSTPCR3 0xe615013c 50#define SMSTPCR3 0xe615013c
51#define SMSTPCR4 0xe6150140 51#define SMSTPCR4 0xe6150140
52 52
53#define FSIDIVA 0xFE1F8000
54#define FSIDIVB 0xFE1F8008
55
53/* Platforms must set frequency on their DV_CLKI pin */ 56/* Platforms must set frequency on their DV_CLKI pin */
54struct clk sh7372_dv_clki_clk = { 57struct clk sh7372_dv_clki_clk = {
55}; 58};
@@ -288,6 +291,7 @@ struct clk sh7372_pllc2_clk = {
288 .ops = &pllc2_clk_ops, 291 .ops = &pllc2_clk_ops,
289 .parent = &extal1_div2_clk, 292 .parent = &extal1_div2_clk,
290 .freq_table = pllc2_freq_table, 293 .freq_table = pllc2_freq_table,
294 .nr_freqs = ARRAY_SIZE(pllc2_freq_table) - 1,
291 .parent_table = pllc2_parent, 295 .parent_table = pllc2_parent,
292 .parent_num = ARRAY_SIZE(pllc2_parent), 296 .parent_num = ARRAY_SIZE(pllc2_parent),
293}; 297};
@@ -417,6 +421,101 @@ static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
417 fsibckcr_parent, ARRAY_SIZE(fsibckcr_parent), 6, 2), 421 fsibckcr_parent, ARRAY_SIZE(fsibckcr_parent), 6, 2),
418}; 422};
419 423
424/* FSI DIV */
425static unsigned long fsidiv_recalc(struct clk *clk)
426{
427 unsigned long value;
428
429 value = __raw_readl(clk->mapping->base);
430
431 if ((value & 0x3) != 0x3)
432 return 0;
433
434 value >>= 16;
435 if (value < 2)
436 return 0;
437
438 return clk->parent->rate / value;
439}
440
441static long fsidiv_round_rate(struct clk *clk, unsigned long rate)
442{
443 return clk_rate_div_range_round(clk, 2, 0xffff, rate);
444}
445
446static void fsidiv_disable(struct clk *clk)
447{
448 __raw_writel(0, clk->mapping->base);
449}
450
451static int fsidiv_enable(struct clk *clk)
452{
453 unsigned long value;
454
455 value = __raw_readl(clk->mapping->base) >> 16;
456 if (value < 2) {
457 fsidiv_disable(clk);
458 return -ENOENT;
459 }
460
461 __raw_writel((value << 16) | 0x3, clk->mapping->base);
462
463 return 0;
464}
465
466static int fsidiv_set_rate(struct clk *clk,
467 unsigned long rate, int algo_id)
468{
469 int idx;
470
471 if (clk->parent->rate == rate) {
472 fsidiv_disable(clk);
473 return 0;
474 }
475
476 idx = (clk->parent->rate / rate) & 0xffff;
477 if (idx < 2)
478 return -ENOENT;
479
480 __raw_writel(idx << 16, clk->mapping->base);
481 return fsidiv_enable(clk);
482}
483
484static struct clk_ops fsidiv_clk_ops = {
485 .recalc = fsidiv_recalc,
486 .round_rate = fsidiv_round_rate,
487 .set_rate = fsidiv_set_rate,
488 .enable = fsidiv_enable,
489 .disable = fsidiv_disable,
490};
491
492static struct clk_mapping sh7372_fsidiva_clk_mapping = {
493 .phys = FSIDIVA,
494 .len = 8,
495};
496
497struct clk sh7372_fsidiva_clk = {
498 .ops = &fsidiv_clk_ops,
499 .parent = &div6_reparent_clks[DIV6_FSIA], /* late install */
500 .mapping = &sh7372_fsidiva_clk_mapping,
501};
502
503static struct clk_mapping sh7372_fsidivb_clk_mapping = {
504 .phys = FSIDIVB,
505 .len = 8,
506};
507
508struct clk sh7372_fsidivb_clk = {
509 .ops = &fsidiv_clk_ops,
510 .parent = &div6_reparent_clks[DIV6_FSIB], /* late install */
511 .mapping = &sh7372_fsidivb_clk_mapping,
512};
513
514static struct clk *late_main_clks[] = {
515 &sh7372_fsidiva_clk,
516 &sh7372_fsidivb_clk,
517};
518
420enum { MSTP001, 519enum { MSTP001,
421 MSTP131, MSTP130, 520 MSTP131, MSTP130,
422 MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, 521 MSTP129, MSTP128, MSTP127, MSTP126, MSTP125,
@@ -585,6 +684,9 @@ void __init sh7372_clock_init(void)
585 if (!ret) 684 if (!ret)
586 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); 685 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
587 686
687 for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++)
688 ret = clk_register(late_main_clks[k]);
689
588 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 690 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
589 691
590 if (!ret) 692 if (!ret)
diff --git a/arch/arm/mach-shmobile/include/mach/gpio.h b/arch/arm/mach-shmobile/include/mach/gpio.h
index 5bc6bd444d72..2b1bb9e43dda 100644
--- a/arch/arm/mach-shmobile/include/mach/gpio.h
+++ b/arch/arm/mach-shmobile/include/mach/gpio.h
@@ -35,12 +35,12 @@ static inline int gpio_cansleep(unsigned gpio)
35 35
36static inline int gpio_to_irq(unsigned gpio) 36static inline int gpio_to_irq(unsigned gpio)
37{ 37{
38 return -ENOSYS; 38 return __gpio_to_irq(gpio);
39} 39}
40 40
41static inline int irq_to_gpio(unsigned int irq) 41static inline int irq_to_gpio(unsigned int irq)
42{ 42{
43 return -EINVAL; 43 return -ENOSYS;
44} 44}
45 45
46#endif /* CONFIG_GPIOLIB */ 46#endif /* CONFIG_GPIOLIB */
diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h
index 147775a94bce..e4f9004e7103 100644
--- a/arch/arm/mach-shmobile/include/mach/sh7372.h
+++ b/arch/arm/mach-shmobile/include/mach/sh7372.h
@@ -464,5 +464,7 @@ extern struct clk sh7372_dv_clki_div2_clk;
464extern struct clk sh7372_pllc2_clk; 464extern struct clk sh7372_pllc2_clk;
465extern struct clk sh7372_fsiack_clk; 465extern struct clk sh7372_fsiack_clk;
466extern struct clk sh7372_fsibck_clk; 466extern struct clk sh7372_fsibck_clk;
467extern struct clk sh7372_fsidiva_clk;
468extern struct clk sh7372_fsidivb_clk;
467 469
468#endif /* __ASM_SH7372_H__ */ 470#endif /* __ASM_SH7372_H__ */
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
index 4cd3cae38e72..30b2f400666a 100644
--- a/arch/arm/mach-shmobile/intc-sh7372.c
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -98,7 +98,7 @@ static struct intc_vect intca_vectors[] __initdata = {
98 INTC_VECT(IRQ14A, 0x03c0), INTC_VECT(IRQ15A, 0x03e0), 98 INTC_VECT(IRQ14A, 0x03c0), INTC_VECT(IRQ15A, 0x03e0),
99 INTC_VECT(IRQ16A, 0x3200), INTC_VECT(IRQ17A, 0x3220), 99 INTC_VECT(IRQ16A, 0x3200), INTC_VECT(IRQ17A, 0x3220),
100 INTC_VECT(IRQ18A, 0x3240), INTC_VECT(IRQ19A, 0x3260), 100 INTC_VECT(IRQ18A, 0x3240), INTC_VECT(IRQ19A, 0x3260),
101 INTC_VECT(IRQ20A, 0x3280), INTC_VECT(IRQ31A, 0x32a0), 101 INTC_VECT(IRQ20A, 0x3280), INTC_VECT(IRQ21A, 0x32a0),
102 INTC_VECT(IRQ22A, 0x32c0), INTC_VECT(IRQ23A, 0x32e0), 102 INTC_VECT(IRQ22A, 0x32c0), INTC_VECT(IRQ23A, 0x32e0),
103 INTC_VECT(IRQ24A, 0x3300), INTC_VECT(IRQ25A, 0x3320), 103 INTC_VECT(IRQ24A, 0x3300), INTC_VECT(IRQ25A, 0x3320),
104 INTC_VECT(IRQ26A, 0x3340), INTC_VECT(IRQ27A, 0x3360), 104 INTC_VECT(IRQ26A, 0x3340), INTC_VECT(IRQ27A, 0x3360),
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c
index c2e405a9e025..fd25ccd7272f 100644
--- a/arch/arm/mach-vexpress/ct-ca9x4.c
+++ b/arch/arm/mach-vexpress/ct-ca9x4.c
@@ -54,7 +54,9 @@ static struct map_desc ct_ca9x4_io_desc[] __initdata = {
54 54
55static void __init ct_ca9x4_map_io(void) 55static void __init ct_ca9x4_map_io(void)
56{ 56{
57#ifdef CONFIG_LOCAL_TIMERS
57 twd_base = MMIO_P2V(A9_MPCORE_TWD); 58 twd_base = MMIO_P2V(A9_MPCORE_TWD);
59#endif
58 v2m_map_io(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc)); 60 v2m_map_io(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc));
59} 61}
60 62
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index e4dd0646e859..ac6a36142fcd 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -198,7 +198,7 @@ __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot)
198 * fragmentation of the DMA space, and also prevents allocations 198 * fragmentation of the DMA space, and also prevents allocations
199 * smaller than a section from crossing a section boundary. 199 * smaller than a section from crossing a section boundary.
200 */ 200 */
201 bit = fls(size - 1) + 1; 201 bit = fls(size - 1);
202 if (bit > SECTION_SHIFT) 202 if (bit > SECTION_SHIFT)
203 bit = SECTION_SHIFT; 203 bit = SECTION_SHIFT;
204 align = 1 << bit; 204 align = 1 << bit;
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index 6f42a18b8aa4..fc819120978d 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -284,12 +284,14 @@ void __init omap_dsp_reserve_sdram_memblock(void)
284 if (!size) 284 if (!size)
285 return; 285 return;
286 286
287 paddr = __memblock_alloc_base(size, SZ_1M, MEMBLOCK_REAL_LIMIT); 287 paddr = memblock_alloc(size, SZ_1M);
288 if (!paddr) { 288 if (!paddr) {
289 pr_err("%s: failed to reserve %x bytes\n", 289 pr_err("%s: failed to reserve %x bytes\n",
290 __func__, size); 290 __func__, size);
291 return; 291 return;
292 } 292 }
293 memblock_free(paddr, size);
294 memblock_remove(paddr, size);
293 295
294 omap_dsp_phys_mempool_base = paddr; 296 omap_dsp_phys_mempool_base = paddr;
295} 297}
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index f5c5b8da9a87..2c2826571d45 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -1983,6 +1983,8 @@ static int omap2_dma_handle_ch(int ch)
1983 1983
1984 dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(ch)); 1984 dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(ch));
1985 dma_write(1 << ch, IRQSTATUS_L0); 1985 dma_write(1 << ch, IRQSTATUS_L0);
1986 /* read back the register to flush the write */
1987 dma_read(IRQSTATUS_L0);
1986 1988
1987 /* If the ch is not chained then chain_id will be -1 */ 1989 /* If the ch is not chained then chain_id will be -1 */
1988 if (dma_chan[ch].chain_id != -1) { 1990 if (dma_chan[ch].chain_id != -1) {
diff --git a/arch/arm/plat-orion/include/plat/pcie.h b/arch/arm/plat-orion/include/plat/pcie.h
index 3ebfef72b4e7..cc99163e73fd 100644
--- a/arch/arm/plat-orion/include/plat/pcie.h
+++ b/arch/arm/plat-orion/include/plat/pcie.h
@@ -11,12 +11,15 @@
11#ifndef __PLAT_PCIE_H 11#ifndef __PLAT_PCIE_H
12#define __PLAT_PCIE_H 12#define __PLAT_PCIE_H
13 13
14struct pci_bus;
15
14u32 orion_pcie_dev_id(void __iomem *base); 16u32 orion_pcie_dev_id(void __iomem *base);
15u32 orion_pcie_rev(void __iomem *base); 17u32 orion_pcie_rev(void __iomem *base);
16int orion_pcie_link_up(void __iomem *base); 18int orion_pcie_link_up(void __iomem *base);
17int orion_pcie_x4_mode(void __iomem *base); 19int orion_pcie_x4_mode(void __iomem *base);
18int orion_pcie_get_local_bus_nr(void __iomem *base); 20int orion_pcie_get_local_bus_nr(void __iomem *base);
19void orion_pcie_set_local_bus_nr(void __iomem *base, int nr); 21void orion_pcie_set_local_bus_nr(void __iomem *base, int nr);
22void orion_pcie_reset(void __iomem *base);
20void orion_pcie_setup(void __iomem *base, 23void orion_pcie_setup(void __iomem *base,
21 struct mbus_dram_target_info *dram); 24 struct mbus_dram_target_info *dram);
22int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus, 25int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus,
diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c
index 779553a1595e..af2d733c50b5 100644
--- a/arch/arm/plat-orion/pcie.c
+++ b/arch/arm/plat-orion/pcie.c
@@ -182,11 +182,6 @@ void __init orion_pcie_setup(void __iomem *base,
182 u32 mask; 182 u32 mask;
183 183
184 /* 184 /*
185 * soft reset PCIe unit
186 */
187 orion_pcie_reset(base);
188
189 /*
190 * Point PCIe unit MBUS decode windows to DRAM space. 185 * Point PCIe unit MBUS decode windows to DRAM space.
191 */ 186 */
192 orion_pcie_setup_wins(base, dram); 187 orion_pcie_setup_wins(base, dram);
diff --git a/arch/m68k/include/asm/irqflags.h b/arch/m68k/include/asm/irqflags.h
index 4a5b284a1550..7ef4115b8c4a 100644
--- a/arch/m68k/include/asm/irqflags.h
+++ b/arch/m68k/include/asm/irqflags.h
@@ -2,7 +2,9 @@
2#define _M68K_IRQFLAGS_H 2#define _M68K_IRQFLAGS_H
3 3
4#include <linux/types.h> 4#include <linux/types.h>
5#ifdef CONFIG_MMU
5#include <linux/hardirq.h> 6#include <linux/hardirq.h>
7#endif
6#include <linux/preempt.h> 8#include <linux/preempt.h>
7#include <asm/thread_info.h> 9#include <asm/thread_info.h>
8#include <asm/entry.h> 10#include <asm/entry.h>
diff --git a/arch/m68k/include/asm/machdep.h b/arch/m68k/include/asm/machdep.h
index 789f3b2de0e9..415d5484916c 100644
--- a/arch/m68k/include/asm/machdep.h
+++ b/arch/m68k/include/asm/machdep.h
@@ -40,5 +40,6 @@ extern unsigned long hw_timer_offset(void);
40extern irqreturn_t arch_timer_interrupt(int irq, void *dummy); 40extern irqreturn_t arch_timer_interrupt(int irq, void *dummy);
41 41
42extern void config_BSP(char *command, int len); 42extern void config_BSP(char *command, int len);
43extern void do_IRQ(int irq, struct pt_regs *fp);
43 44
44#endif /* _M68K_MACHDEP_H */ 45#endif /* _M68K_MACHDEP_H */
diff --git a/arch/powerpc/kernel/kvm.c b/arch/powerpc/kernel/kvm.c
index 428d0e538aec..b06bdae04064 100644
--- a/arch/powerpc/kernel/kvm.c
+++ b/arch/powerpc/kernel/kvm.c
@@ -127,7 +127,7 @@ static void kvm_patch_ins_nop(u32 *inst)
127 127
128static void kvm_patch_ins_b(u32 *inst, int addr) 128static void kvm_patch_ins_b(u32 *inst, int addr)
129{ 129{
130#ifdef CONFIG_RELOCATABLE 130#if defined(CONFIG_RELOCATABLE) && defined(CONFIG_PPC_BOOK3S)
131 /* On relocatable kernels interrupts handlers and our code 131 /* On relocatable kernels interrupts handlers and our code
132 can be in different regions, so we don't patch them */ 132 can be in different regions, so we don't patch them */
133 133
diff --git a/arch/powerpc/kvm/booke_interrupts.S b/arch/powerpc/kvm/booke_interrupts.S
index 049846911ce4..1cc471faac2d 100644
--- a/arch/powerpc/kvm/booke_interrupts.S
+++ b/arch/powerpc/kvm/booke_interrupts.S
@@ -416,7 +416,7 @@ lightweight_exit:
416 lwz r3, VCPU_PC(r4) 416 lwz r3, VCPU_PC(r4)
417 mtsrr0 r3 417 mtsrr0 r3
418 lwz r3, VCPU_SHARED(r4) 418 lwz r3, VCPU_SHARED(r4)
419 lwz r3, VCPU_SHARED_MSR(r3) 419 lwz r3, (VCPU_SHARED_MSR + 4)(r3)
420 oris r3, r3, KVMPPC_MSR_MASK@h 420 oris r3, r3, KVMPPC_MSR_MASK@h
421 ori r3, r3, KVMPPC_MSR_MASK@l 421 ori r3, r3, KVMPPC_MSR_MASK@l
422 mtsrr1 r3 422 mtsrr1 r3
diff --git a/arch/powerpc/kvm/e500.c b/arch/powerpc/kvm/e500.c
index 71750f2dd5d3..e3768ee9b595 100644
--- a/arch/powerpc/kvm/e500.c
+++ b/arch/powerpc/kvm/e500.c
@@ -138,8 +138,8 @@ void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
138 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); 138 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
139 139
140 free_page((unsigned long)vcpu->arch.shared); 140 free_page((unsigned long)vcpu->arch.shared);
141 kvmppc_e500_tlb_uninit(vcpu_e500);
142 kvm_vcpu_uninit(vcpu); 141 kvm_vcpu_uninit(vcpu);
142 kvmppc_e500_tlb_uninit(vcpu_e500);
143 kmem_cache_free(kvm_vcpu_cache, vcpu_e500); 143 kmem_cache_free(kvm_vcpu_cache, vcpu_e500);
144} 144}
145 145
diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
index 2f87a1627f6c..38f756f25053 100644
--- a/arch/powerpc/kvm/powerpc.c
+++ b/arch/powerpc/kvm/powerpc.c
@@ -617,6 +617,7 @@ long kvm_arch_vm_ioctl(struct file *filp,
617 switch (ioctl) { 617 switch (ioctl) {
618 case KVM_PPC_GET_PVINFO: { 618 case KVM_PPC_GET_PVINFO: {
619 struct kvm_ppc_pvinfo pvinfo; 619 struct kvm_ppc_pvinfo pvinfo;
620 memset(&pvinfo, 0, sizeof(pvinfo));
620 r = kvm_vm_ioctl_get_pvinfo(&pvinfo); 621 r = kvm_vm_ioctl_get_pvinfo(&pvinfo);
621 if (copy_to_user(argp, &pvinfo, sizeof(pvinfo))) { 622 if (copy_to_user(argp, &pvinfo, sizeof(pvinfo))) {
622 r = -EFAULT; 623 r = -EFAULT;
diff --git a/arch/powerpc/kvm/timing.c b/arch/powerpc/kvm/timing.c
index 46fa04f12a9b..a021f5827a33 100644
--- a/arch/powerpc/kvm/timing.c
+++ b/arch/powerpc/kvm/timing.c
@@ -35,7 +35,6 @@ void kvmppc_init_timing_stats(struct kvm_vcpu *vcpu)
35 int i; 35 int i;
36 36
37 /* pause guest execution to avoid concurrent updates */ 37 /* pause guest execution to avoid concurrent updates */
38 local_irq_disable();
39 mutex_lock(&vcpu->mutex); 38 mutex_lock(&vcpu->mutex);
40 39
41 vcpu->arch.last_exit_type = 0xDEAD; 40 vcpu->arch.last_exit_type = 0xDEAD;
@@ -51,7 +50,6 @@ void kvmppc_init_timing_stats(struct kvm_vcpu *vcpu)
51 vcpu->arch.timing_last_enter.tv64 = 0; 50 vcpu->arch.timing_last_enter.tv64 = 0;
52 51
53 mutex_unlock(&vcpu->mutex); 52 mutex_unlock(&vcpu->mutex);
54 local_irq_enable();
55} 53}
56 54
57static void add_exit_timing(struct kvm_vcpu *vcpu, u64 duration, int type) 55static void add_exit_timing(struct kvm_vcpu *vcpu, u64 duration, int type)
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 5c075f562eba..7f217b3a50a8 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -193,6 +193,7 @@ config CPU_SH2
193config CPU_SH2A 193config CPU_SH2A
194 bool 194 bool
195 select CPU_SH2 195 select CPU_SH2
196 select UNCACHED_MAPPING
196 197
197config CPU_SH3 198config CPU_SH3
198 bool 199 bool
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index 307b3a4a790b..9c8c6e1a2a15 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -133,10 +133,7 @@ machdir-$(CONFIG_SOLUTION_ENGINE) += mach-se
133machdir-$(CONFIG_SH_HP6XX) += mach-hp6xx 133machdir-$(CONFIG_SH_HP6XX) += mach-hp6xx
134machdir-$(CONFIG_SH_DREAMCAST) += mach-dreamcast 134machdir-$(CONFIG_SH_DREAMCAST) += mach-dreamcast
135machdir-$(CONFIG_SH_SH03) += mach-sh03 135machdir-$(CONFIG_SH_SH03) += mach-sh03
136machdir-$(CONFIG_SH_SECUREEDGE5410) += mach-snapgear
137machdir-$(CONFIG_SH_RTS7751R2D) += mach-r2d 136machdir-$(CONFIG_SH_RTS7751R2D) += mach-r2d
138machdir-$(CONFIG_SH_7751_SYSTEMH) += mach-systemh
139machdir-$(CONFIG_SH_EDOSK7705) += mach-edosk7705
140machdir-$(CONFIG_SH_HIGHLANDER) += mach-highlander 137machdir-$(CONFIG_SH_HIGHLANDER) += mach-highlander
141machdir-$(CONFIG_SH_MIGOR) += mach-migor 138machdir-$(CONFIG_SH_MIGOR) += mach-migor
142machdir-$(CONFIG_SH_AP325RXA) += mach-ap325rxa 139machdir-$(CONFIG_SH_AP325RXA) += mach-ap325rxa
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index 9c94711aa6ca..2018c7ea4c93 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -81,13 +81,6 @@ config SH_7343_SOLUTION_ENGINE
81 Select 7343 SolutionEngine if configuring for a Hitachi 81 Select 7343 SolutionEngine if configuring for a Hitachi
82 SH7343 (SH-Mobile 3AS) evaluation board. 82 SH7343 (SH-Mobile 3AS) evaluation board.
83 83
84config SH_7751_SYSTEMH
85 bool "SystemH7751R"
86 depends on CPU_SUBTYPE_SH7751R
87 help
88 Select SystemH if you are configuring for a Renesas SystemH
89 7751R evaluation board.
90
91config SH_HP6XX 84config SH_HP6XX
92 bool "HP6XX" 85 bool "HP6XX"
93 select SYS_SUPPORTS_APM_EMULATION 86 select SYS_SUPPORTS_APM_EMULATION
diff --git a/arch/sh/boards/Makefile b/arch/sh/boards/Makefile
index 38ef655cc0f0..be7d11d04b26 100644
--- a/arch/sh/boards/Makefile
+++ b/arch/sh/boards/Makefile
@@ -2,10 +2,12 @@
2# Specific board support, not covered by a mach group. 2# Specific board support, not covered by a mach group.
3# 3#
4obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o 4obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o
5obj-$(CONFIG_SH_SECUREEDGE5410) += board-secureedge5410.o
5obj-$(CONFIG_SH_SH2007) += board-sh2007.o 6obj-$(CONFIG_SH_SH2007) += board-sh2007.o
6obj-$(CONFIG_SH_SH7785LCR) += board-sh7785lcr.o 7obj-$(CONFIG_SH_SH7785LCR) += board-sh7785lcr.o
7obj-$(CONFIG_SH_URQUELL) += board-urquell.o 8obj-$(CONFIG_SH_URQUELL) += board-urquell.o
8obj-$(CONFIG_SH_SHMIN) += board-shmin.o 9obj-$(CONFIG_SH_SHMIN) += board-shmin.o
10obj-$(CONFIG_SH_EDOSK7705) += board-edosk7705.o
9obj-$(CONFIG_SH_EDOSK7760) += board-edosk7760.o 11obj-$(CONFIG_SH_EDOSK7760) += board-edosk7760.o
10obj-$(CONFIG_SH_ESPT) += board-espt.o 12obj-$(CONFIG_SH_ESPT) += board-espt.o
11obj-$(CONFIG_SH_POLARIS) += board-polaris.o 13obj-$(CONFIG_SH_POLARIS) += board-polaris.o
diff --git a/arch/sh/boards/board-edosk7705.c b/arch/sh/boards/board-edosk7705.c
new file mode 100644
index 000000000000..4cb3bb74c36f
--- /dev/null
+++ b/arch/sh/boards/board-edosk7705.c
@@ -0,0 +1,78 @@
1/*
2 * arch/sh/boards/renesas/edosk7705/setup.c
3 *
4 * Copyright (C) 2000 Kazumoto Kojima
5 *
6 * Hitachi SolutionEngine Support.
7 *
8 * Modified for edosk7705 development
9 * board by S. Dunn, 2003.
10 */
11#include <linux/init.h>
12#include <linux/irq.h>
13#include <linux/platform_device.h>
14#include <linux/interrupt.h>
15#include <linux/smc91x.h>
16#include <asm/machvec.h>
17#include <asm/sizes.h>
18
19#define SMC_IOBASE 0xA2000000
20#define SMC_IO_OFFSET 0x300
21#define SMC_IOADDR (SMC_IOBASE + SMC_IO_OFFSET)
22
23#define ETHERNET_IRQ 0x09
24
25static void __init sh_edosk7705_init_irq(void)
26{
27 make_imask_irq(ETHERNET_IRQ);
28}
29
30/* eth initialization functions */
31static struct smc91x_platdata smc91x_info = {
32 .flags = SMC91X_USE_16BIT | SMC91X_IO_SHIFT_1 | IORESOURCE_IRQ_LOWLEVEL,
33};
34
35static struct resource smc91x_res[] = {
36 [0] = {
37 .start = SMC_IOADDR,
38 .end = SMC_IOADDR + SZ_32 - 1,
39 .flags = IORESOURCE_MEM,
40 },
41 [1] = {
42 .start = ETHERNET_IRQ,
43 .end = ETHERNET_IRQ,
44 .flags = IORESOURCE_IRQ ,
45 }
46};
47
48static struct platform_device smc91x_dev = {
49 .name = "smc91x",
50 .id = -1,
51 .num_resources = ARRAY_SIZE(smc91x_res),
52 .resource = smc91x_res,
53
54 .dev = {
55 .platform_data = &smc91x_info,
56 },
57};
58
59/* platform init code */
60static struct platform_device *edosk7705_devices[] __initdata = {
61 &smc91x_dev,
62};
63
64static int __init init_edosk7705_devices(void)
65{
66 return platform_add_devices(edosk7705_devices,
67 ARRAY_SIZE(edosk7705_devices));
68}
69__initcall(init_edosk7705_devices);
70
71/*
72 * The Machine Vector
73 */
74static struct sh_machine_vector mv_edosk7705 __initmv = {
75 .mv_name = "EDOSK7705",
76 .mv_nr_irqs = 80,
77 .mv_init_irq = sh_edosk7705_init_irq,
78};
diff --git a/arch/sh/boards/mach-snapgear/setup.c b/arch/sh/boards/board-secureedge5410.c
index 331745dee379..32f875e8493d 100644
--- a/arch/sh/boards/mach-snapgear/setup.c
+++ b/arch/sh/boards/board-secureedge5410.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/sh/boards/snapgear/setup.c
3 *
4 * Copyright (C) 2002 David McCullough <davidm@snapgear.com> 2 * Copyright (C) 2002 David McCullough <davidm@snapgear.com>
5 * Copyright (C) 2003 Paul Mundt <lethal@linux-sh.org> 3 * Copyright (C) 2003 Paul Mundt <lethal@linux-sh.org>
6 * 4 *
@@ -19,18 +17,19 @@
19#include <linux/module.h> 17#include <linux/module.h>
20#include <linux/sched.h> 18#include <linux/sched.h>
21#include <asm/machvec.h> 19#include <asm/machvec.h>
22#include <mach/snapgear.h> 20#include <mach/secureedge5410.h>
23#include <asm/irq.h> 21#include <asm/irq.h>
24#include <asm/io.h> 22#include <asm/io.h>
25#include <cpu/timer.h> 23#include <cpu/timer.h>
26 24
25unsigned short secureedge5410_ioport;
26
27/* 27/*
28 * EraseConfig handling functions 28 * EraseConfig handling functions
29 */ 29 */
30
31static irqreturn_t eraseconfig_interrupt(int irq, void *dev_id) 30static irqreturn_t eraseconfig_interrupt(int irq, void *dev_id)
32{ 31{
33 (void)__raw_readb(0xb8000000); /* dummy read */ 32 ctrl_delay(); /* dummy read */
34 33
35 printk("SnapGear: erase switch interrupt!\n"); 34 printk("SnapGear: erase switch interrupt!\n");
36 35
@@ -39,21 +38,22 @@ static irqreturn_t eraseconfig_interrupt(int irq, void *dev_id)
39 38
40static int __init eraseconfig_init(void) 39static int __init eraseconfig_init(void)
41{ 40{
41 unsigned int irq = evt2irq(0x240);
42
42 printk("SnapGear: EraseConfig init\n"); 43 printk("SnapGear: EraseConfig init\n");
44
43 /* Setup "EraseConfig" switch on external IRQ 0 */ 45 /* Setup "EraseConfig" switch on external IRQ 0 */
44 if (request_irq(IRL0_IRQ, eraseconfig_interrupt, IRQF_DISABLED, 46 if (request_irq(irq, eraseconfig_interrupt, IRQF_DISABLED,
45 "Erase Config", NULL)) 47 "Erase Config", NULL))
46 printk("SnapGear: failed to register IRQ%d for Reset witch\n", 48 printk("SnapGear: failed to register IRQ%d for Reset witch\n",
47 IRL0_IRQ); 49 irq);
48 else 50 else
49 printk("SnapGear: registered EraseConfig switch on IRQ%d\n", 51 printk("SnapGear: registered EraseConfig switch on IRQ%d\n",
50 IRL0_IRQ); 52 irq);
51 return(0); 53 return 0;
52} 54}
53
54module_init(eraseconfig_init); 55module_init(eraseconfig_init);
55 56
56/****************************************************************************/
57/* 57/*
58 * Initialize IRQ setting 58 * Initialize IRQ setting
59 * 59 *
@@ -62,7 +62,6 @@ module_init(eraseconfig_init);
62 * IRL2 = eth1 62 * IRL2 = eth1
63 * IRL3 = crypto 63 * IRL3 = crypto
64 */ 64 */
65
66static void __init init_snapgear_IRQ(void) 65static void __init init_snapgear_IRQ(void)
67{ 66{
68 printk("Setup SnapGear IRQ/IPR ...\n"); 67 printk("Setup SnapGear IRQ/IPR ...\n");
@@ -76,20 +75,5 @@ static void __init init_snapgear_IRQ(void)
76static struct sh_machine_vector mv_snapgear __initmv = { 75static struct sh_machine_vector mv_snapgear __initmv = {
77 .mv_name = "SnapGear SecureEdge5410", 76 .mv_name = "SnapGear SecureEdge5410",
78 .mv_nr_irqs = 72, 77 .mv_nr_irqs = 72,
79
80 .mv_inb = snapgear_inb,
81 .mv_inw = snapgear_inw,
82 .mv_inl = snapgear_inl,
83 .mv_outb = snapgear_outb,
84 .mv_outw = snapgear_outw,
85 .mv_outl = snapgear_outl,
86
87 .mv_inb_p = snapgear_inb_p,
88 .mv_inw_p = snapgear_inw,
89 .mv_inl_p = snapgear_inl,
90 .mv_outb_p = snapgear_outb_p,
91 .mv_outw_p = snapgear_outw,
92 .mv_outl_p = snapgear_outl,
93
94 .mv_init_irq = init_snapgear_IRQ, 78 .mv_init_irq = init_snapgear_IRQ,
95}; 79};
diff --git a/arch/sh/boards/mach-edosk7705/Makefile b/arch/sh/boards/mach-edosk7705/Makefile
deleted file mode 100644
index cd54acb51499..000000000000
--- a/arch/sh/boards/mach-edosk7705/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
1#
2# Makefile for the EDOSK7705 specific parts of the kernel
3#
4
5obj-y := setup.o io.o
diff --git a/arch/sh/boards/mach-edosk7705/io.c b/arch/sh/boards/mach-edosk7705/io.c
deleted file mode 100644
index 5b9c57c43241..000000000000
--- a/arch/sh/boards/mach-edosk7705/io.c
+++ /dev/null
@@ -1,71 +0,0 @@
1/*
2 * arch/sh/boards/renesas/edosk7705/io.c
3 *
4 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
5 * Based largely on io_se.c.
6 *
7 * I/O routines for Hitachi EDOSK7705 board.
8 *
9 */
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/io.h>
14#include <mach/edosk7705.h>
15#include <asm/addrspace.h>
16
17#define SMC_IOADDR 0xA2000000
18
19/* Map the Ethernet addresses as if it is at 0x300 - 0x320 */
20static unsigned long sh_edosk7705_isa_port2addr(unsigned long port)
21{
22 /*
23 * SMC91C96 registers are 4 byte aligned rather than the
24 * usual 2 byte!
25 */
26 if (port >= 0x300 && port < 0x320)
27 return SMC_IOADDR + ((port - 0x300) * 2);
28
29 maybebadio(port);
30 return port;
31}
32
33/* Trying to read / write bytes on odd-byte boundaries to the Ethernet
34 * registers causes problems. So we bit-shift the value and read / write
35 * in 2 byte chunks. Setting the low byte to 0 does not cause problems
36 * now as odd byte writes are only made on the bit mask / interrupt
37 * register. This may not be the case in future Mar-2003 SJD
38 */
39unsigned char sh_edosk7705_inb(unsigned long port)
40{
41 if (port >= 0x300 && port < 0x320 && port & 0x01)
42 return __raw_readw(port - 1) >> 8;
43
44 return __raw_readb(sh_edosk7705_isa_port2addr(port));
45}
46
47void sh_edosk7705_outb(unsigned char value, unsigned long port)
48{
49 if (port >= 0x300 && port < 0x320 && port & 0x01) {
50 __raw_writew(((unsigned short)value << 8), port - 1);
51 return;
52 }
53
54 __raw_writeb(value, sh_edosk7705_isa_port2addr(port));
55}
56
57void sh_edosk7705_insb(unsigned long port, void *addr, unsigned long count)
58{
59 unsigned char *p = addr;
60
61 while (count--)
62 *p++ = sh_edosk7705_inb(port);
63}
64
65void sh_edosk7705_outsb(unsigned long port, const void *addr, unsigned long count)
66{
67 unsigned char *p = (unsigned char *)addr;
68
69 while (count--)
70 sh_edosk7705_outb(*p++, port);
71}
diff --git a/arch/sh/boards/mach-edosk7705/setup.c b/arch/sh/boards/mach-edosk7705/setup.c
deleted file mode 100644
index d59225e26fb9..000000000000
--- a/arch/sh/boards/mach-edosk7705/setup.c
+++ /dev/null
@@ -1,36 +0,0 @@
1/*
2 * arch/sh/boards/renesas/edosk7705/setup.c
3 *
4 * Copyright (C) 2000 Kazumoto Kojima
5 *
6 * Hitachi SolutionEngine Support.
7 *
8 * Modified for edosk7705 development
9 * board by S. Dunn, 2003.
10 */
11#include <linux/init.h>
12#include <linux/irq.h>
13#include <asm/machvec.h>
14#include <mach/edosk7705.h>
15
16static void __init sh_edosk7705_init_irq(void)
17{
18 /* This is the Ethernet interrupt */
19 make_imask_irq(0x09);
20}
21
22/*
23 * The Machine Vector
24 */
25static struct sh_machine_vector mv_edosk7705 __initmv = {
26 .mv_name = "EDOSK7705",
27 .mv_nr_irqs = 80,
28
29 .mv_inb = sh_edosk7705_inb,
30 .mv_outb = sh_edosk7705_outb,
31
32 .mv_insb = sh_edosk7705_insb,
33 .mv_outsb = sh_edosk7705_outsb,
34
35 .mv_init_irq = sh_edosk7705_init_irq,
36};
diff --git a/arch/sh/boards/mach-microdev/io.c b/arch/sh/boards/mach-microdev/io.c
index 2960c659020e..acdafb0c6404 100644
--- a/arch/sh/boards/mach-microdev/io.c
+++ b/arch/sh/boards/mach-microdev/io.c
@@ -54,7 +54,7 @@
54/* 54/*
55 * map I/O ports to memory-mapped addresses 55 * map I/O ports to memory-mapped addresses
56 */ 56 */
57static unsigned long microdev_isa_port2addr(unsigned long offset) 57void __iomem *microdev_ioport_map(unsigned long offset, unsigned int len)
58{ 58{
59 unsigned long result; 59 unsigned long result;
60 60
@@ -72,16 +72,6 @@ static unsigned long microdev_isa_port2addr(unsigned long offset)
72 * Configuration Registers 72 * Configuration Registers
73 */ 73 */
74 result = IO_SUPERIO_PHYS + (offset << 1); 74 result = IO_SUPERIO_PHYS + (offset << 1);
75#if 0
76 } else if (offset == KBD_DATA_REG || offset == KBD_CNTL_REG ||
77 offset == KBD_STATUS_REG) {
78 /*
79 * SMSC FDC37C93xAPM SuperIO chip
80 *
81 * PS/2 Keyboard + Mouse (ports 0x60 and 0x64).
82 */
83 result = IO_SUPERIO_PHYS + (offset << 1);
84#endif
85 } else if (((offset >= IO_IDE1_BASE) && 75 } else if (((offset >= IO_IDE1_BASE) &&
86 (offset < IO_IDE1_BASE + IO_IDE_EXTENT)) || 76 (offset < IO_IDE1_BASE + IO_IDE_EXTENT)) ||
87 (offset == IO_IDE1_MISC)) { 77 (offset == IO_IDE1_MISC)) {
@@ -131,237 +121,5 @@ static unsigned long microdev_isa_port2addr(unsigned long offset)
131 result = PVR; 121 result = PVR;
132 } 122 }
133 123
134 return result; 124 return (void __iomem *)result;
135}
136
137#define PORT2ADDR(x) (microdev_isa_port2addr(x))
138
139static inline void delay(void)
140{
141#if defined(CONFIG_PCI)
142 /* System board present, just make a dummy SRAM access. (CS0 will be
143 mapped to PCI memory, probably good to avoid it.) */
144 __raw_readw(0xa6800000);
145#else
146 /* CS0 will be mapped to flash, ROM etc so safe to access it. */
147 __raw_readw(0xa0000000);
148#endif
149}
150
151unsigned char microdev_inb(unsigned long port)
152{
153#ifdef CONFIG_PCI
154 if (port >= PCIBIOS_MIN_IO)
155 return microdev_pci_inb(port);
156#endif
157 return *(volatile unsigned char*)PORT2ADDR(port);
158}
159
160unsigned short microdev_inw(unsigned long port)
161{
162#ifdef CONFIG_PCI
163 if (port >= PCIBIOS_MIN_IO)
164 return microdev_pci_inw(port);
165#endif
166 return *(volatile unsigned short*)PORT2ADDR(port);
167}
168
169unsigned int microdev_inl(unsigned long port)
170{
171#ifdef CONFIG_PCI
172 if (port >= PCIBIOS_MIN_IO)
173 return microdev_pci_inl(port);
174#endif
175 return *(volatile unsigned int*)PORT2ADDR(port);
176}
177
178void microdev_outw(unsigned short b, unsigned long port)
179{
180#ifdef CONFIG_PCI
181 if (port >= PCIBIOS_MIN_IO) {
182 microdev_pci_outw(b, port);
183 return;
184 }
185#endif
186 *(volatile unsigned short*)PORT2ADDR(port) = b;
187}
188
189void microdev_outb(unsigned char b, unsigned long port)
190{
191#ifdef CONFIG_PCI
192 if (port >= PCIBIOS_MIN_IO) {
193 microdev_pci_outb(b, port);
194 return;
195 }
196#endif
197
198 /*
199 * There is a board feature with the current SH4-202 MicroDev in
200 * that the 2 byte enables (nBE0 and nBE1) are tied together (and
201 * to the Chip Select Line (Ethernet_CS)). Due to this connectivity,
202 * it is not possible to safely perform 8-bit writes to the
203 * Ethernet registers, as 16-bits will be consumed from the Data
204 * lines (corrupting the other byte). Hence, this function is
205 * written to implement 16-bit read/modify/write for all byte-wide
206 * accesses.
207 *
208 * Note: there is no problem with byte READS (even or odd).
209 *
210 * Sean McGoogan - 16th June 2003.
211 */
212 if ((port >= IO_LAN91C111_BASE) &&
213 (port < IO_LAN91C111_BASE + IO_LAN91C111_EXTENT)) {
214 /*
215 * Then are trying to perform a byte-write to the
216 * LAN91C111. This needs special care.
217 */
218 if (port % 2 == 1) { /* is the port odd ? */
219 /* unset bit-0, i.e. make even */
220 const unsigned long evenPort = port-1;
221 unsigned short word;
222
223 /*
224 * do a 16-bit read/write to write to 'port',
225 * preserving even byte.
226 *
227 * Even addresses are bits 0-7
228 * Odd addresses are bits 8-15
229 */
230 word = microdev_inw(evenPort);
231 word = (word & 0xffu) | (b << 8);
232 microdev_outw(word, evenPort);
233 } else {
234 /* else, we are trying to do an even byte write */
235 unsigned short word;
236
237 /*
238 * do a 16-bit read/write to write to 'port',
239 * preserving odd byte.
240 *
241 * Even addresses are bits 0-7
242 * Odd addresses are bits 8-15
243 */
244 word = microdev_inw(port);
245 word = (word & 0xff00u) | (b);
246 microdev_outw(word, port);
247 }
248 } else {
249 *(volatile unsigned char*)PORT2ADDR(port) = b;
250 }
251}
252
253void microdev_outl(unsigned int b, unsigned long port)
254{
255#ifdef CONFIG_PCI
256 if (port >= PCIBIOS_MIN_IO) {
257 microdev_pci_outl(b, port);
258 return;
259 }
260#endif
261 *(volatile unsigned int*)PORT2ADDR(port) = b;
262}
263
264unsigned char microdev_inb_p(unsigned long port)
265{
266 unsigned char v = microdev_inb(port);
267 delay();
268 return v;
269}
270
271unsigned short microdev_inw_p(unsigned long port)
272{
273 unsigned short v = microdev_inw(port);
274 delay();
275 return v;
276}
277
278unsigned int microdev_inl_p(unsigned long port)
279{
280 unsigned int v = microdev_inl(port);
281 delay();
282 return v;
283}
284
285void microdev_outb_p(unsigned char b, unsigned long port)
286{
287 microdev_outb(b, port);
288 delay();
289}
290
291void microdev_outw_p(unsigned short b, unsigned long port)
292{
293 microdev_outw(b, port);
294 delay();
295}
296
297void microdev_outl_p(unsigned int b, unsigned long port)
298{
299 microdev_outl(b, port);
300 delay();
301}
302
303void microdev_insb(unsigned long port, void *buffer, unsigned long count)
304{
305 volatile unsigned char *port_addr;
306 unsigned char *buf = buffer;
307
308 port_addr = (volatile unsigned char *)PORT2ADDR(port);
309
310 while (count--)
311 *buf++ = *port_addr;
312}
313
314void microdev_insw(unsigned long port, void *buffer, unsigned long count)
315{
316 volatile unsigned short *port_addr;
317 unsigned short *buf = buffer;
318
319 port_addr = (volatile unsigned short *)PORT2ADDR(port);
320
321 while (count--)
322 *buf++ = *port_addr;
323}
324
325void microdev_insl(unsigned long port, void *buffer, unsigned long count)
326{
327 volatile unsigned long *port_addr;
328 unsigned int *buf = buffer;
329
330 port_addr = (volatile unsigned long *)PORT2ADDR(port);
331
332 while (count--)
333 *buf++ = *port_addr;
334}
335
336void microdev_outsb(unsigned long port, const void *buffer, unsigned long count)
337{
338 volatile unsigned char *port_addr;
339 const unsigned char *buf = buffer;
340
341 port_addr = (volatile unsigned char *)PORT2ADDR(port);
342
343 while (count--)
344 *port_addr = *buf++;
345}
346
347void microdev_outsw(unsigned long port, const void *buffer, unsigned long count)
348{
349 volatile unsigned short *port_addr;
350 const unsigned short *buf = buffer;
351
352 port_addr = (volatile unsigned short *)PORT2ADDR(port);
353
354 while (count--)
355 *port_addr = *buf++;
356}
357
358void microdev_outsl(unsigned long port, const void *buffer, unsigned long count)
359{
360 volatile unsigned long *port_addr;
361 const unsigned int *buf = buffer;
362
363 port_addr = (volatile unsigned long *)PORT2ADDR(port);
364
365 while (count--)
366 *port_addr = *buf++;
367} 125}
diff --git a/arch/sh/boards/mach-microdev/setup.c b/arch/sh/boards/mach-microdev/setup.c
index d1df2a4fb9b8..d8a747291e03 100644
--- a/arch/sh/boards/mach-microdev/setup.c
+++ b/arch/sh/boards/mach-microdev/setup.c
@@ -195,27 +195,6 @@ device_initcall(microdev_devices_setup);
195static struct sh_machine_vector mv_sh4202_microdev __initmv = { 195static struct sh_machine_vector mv_sh4202_microdev __initmv = {
196 .mv_name = "SH4-202 MicroDev", 196 .mv_name = "SH4-202 MicroDev",
197 .mv_nr_irqs = 72, 197 .mv_nr_irqs = 72,
198 198 .mv_ioport_map = microdev_ioport_map,
199 .mv_inb = microdev_inb,
200 .mv_inw = microdev_inw,
201 .mv_inl = microdev_inl,
202 .mv_outb = microdev_outb,
203 .mv_outw = microdev_outw,
204 .mv_outl = microdev_outl,
205
206 .mv_inb_p = microdev_inb_p,
207 .mv_inw_p = microdev_inw_p,
208 .mv_inl_p = microdev_inl_p,
209 .mv_outb_p = microdev_outb_p,
210 .mv_outw_p = microdev_outw_p,
211 .mv_outl_p = microdev_outl_p,
212
213 .mv_insb = microdev_insb,
214 .mv_insw = microdev_insw,
215 .mv_insl = microdev_insl,
216 .mv_outsb = microdev_outsb,
217 .mv_outsw = microdev_outsw,
218 .mv_outsl = microdev_outsl,
219
220 .mv_init_irq = init_microdev_irq, 199 .mv_init_irq = init_microdev_irq,
221}; 200};
diff --git a/arch/sh/boards/mach-se/7206/Makefile b/arch/sh/boards/mach-se/7206/Makefile
index 63e7ed699f39..5c9eaa0535b9 100644
--- a/arch/sh/boards/mach-se/7206/Makefile
+++ b/arch/sh/boards/mach-se/7206/Makefile
@@ -2,4 +2,4 @@
2# Makefile for the 7206 SolutionEngine specific parts of the kernel 2# Makefile for the 7206 SolutionEngine specific parts of the kernel
3# 3#
4 4
5obj-y := setup.o io.o irq.o 5obj-y := setup.o irq.o
diff --git a/arch/sh/boards/mach-se/7206/io.c b/arch/sh/boards/mach-se/7206/io.c
deleted file mode 100644
index adadc77532ee..000000000000
--- a/arch/sh/boards/mach-se/7206/io.c
+++ /dev/null
@@ -1,104 +0,0 @@
1/* $Id: io.c,v 1.5 2004/02/22 23:08:43 kkojima Exp $
2 *
3 * linux/arch/sh/boards/se/7206/io.c
4 *
5 * Copyright (C) 2006 Yoshinori Sato
6 *
7 * I/O routine for Hitachi 7206 SolutionEngine.
8 *
9 */
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <asm/io.h>
14#include <mach-se/mach/se7206.h>
15
16
17static inline void delay(void)
18{
19 __raw_readw(0x20000000); /* P2 ROM Area */
20}
21
22/* MS7750 requires special versions of in*, out* routines, since
23 PC-like io ports are located at upper half byte of 16-bit word which
24 can be accessed only with 16-bit wide. */
25
26static inline volatile __u16 *
27port2adr(unsigned int port)
28{
29 if (port >= 0x2000 && port < 0x2020)
30 return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
31 else if (port >= 0x300 && port < 0x310)
32 return (volatile __u16 *) (PA_SMSC + (port - 0x300));
33
34 return (volatile __u16 *)port;
35}
36
37unsigned char se7206_inb(unsigned long port)
38{
39 return (*port2adr(port)) & 0xff;
40}
41
42unsigned char se7206_inb_p(unsigned long port)
43{
44 unsigned long v;
45
46 v = (*port2adr(port)) & 0xff;
47 delay();
48 return v;
49}
50
51unsigned short se7206_inw(unsigned long port)
52{
53 return *port2adr(port);
54}
55
56void se7206_outb(unsigned char value, unsigned long port)
57{
58 *(port2adr(port)) = value;
59}
60
61void se7206_outb_p(unsigned char value, unsigned long port)
62{
63 *(port2adr(port)) = value;
64 delay();
65}
66
67void se7206_outw(unsigned short value, unsigned long port)
68{
69 *port2adr(port) = value;
70}
71
72void se7206_insb(unsigned long port, void *addr, unsigned long count)
73{
74 volatile __u16 *p = port2adr(port);
75 __u8 *ap = addr;
76
77 while (count--)
78 *ap++ = *p;
79}
80
81void se7206_insw(unsigned long port, void *addr, unsigned long count)
82{
83 volatile __u16 *p = port2adr(port);
84 __u16 *ap = addr;
85 while (count--)
86 *ap++ = *p;
87}
88
89void se7206_outsb(unsigned long port, const void *addr, unsigned long count)
90{
91 volatile __u16 *p = port2adr(port);
92 const __u8 *ap = addr;
93
94 while (count--)
95 *p = *ap++;
96}
97
98void se7206_outsw(unsigned long port, const void *addr, unsigned long count)
99{
100 volatile __u16 *p = port2adr(port);
101 const __u16 *ap = addr;
102 while (count--)
103 *p = *ap++;
104}
diff --git a/arch/sh/boards/mach-se/7206/irq.c b/arch/sh/boards/mach-se/7206/irq.c
index 883b21eacaa6..d961949600fd 100644
--- a/arch/sh/boards/mach-se/7206/irq.c
+++ b/arch/sh/boards/mach-se/7206/irq.c
@@ -139,11 +139,13 @@ void __init init_se7206_IRQ(void)
139 make_se7206_irq(IRQ0_IRQ); /* SMC91C111 */ 139 make_se7206_irq(IRQ0_IRQ); /* SMC91C111 */
140 make_se7206_irq(IRQ1_IRQ); /* ATA */ 140 make_se7206_irq(IRQ1_IRQ); /* ATA */
141 make_se7206_irq(IRQ3_IRQ); /* SLOT / PCM */ 141 make_se7206_irq(IRQ3_IRQ); /* SLOT / PCM */
142 __raw_writew(inw(INTC_ICR1) | 0x000b ,INTC_ICR1 ) ; /* ICR1 */ 142
143 __raw_writew(__raw_readw(INTC_ICR1) | 0x000b, INTC_ICR); /* ICR1 */
143 144
144 /* FPGA System register setup*/ 145 /* FPGA System register setup*/
145 __raw_writew(0x0000,INTSTS0); /* Clear INTSTS0 */ 146 __raw_writew(0x0000,INTSTS0); /* Clear INTSTS0 */
146 __raw_writew(0x0000,INTSTS1); /* Clear INTSTS1 */ 147 __raw_writew(0x0000,INTSTS1); /* Clear INTSTS1 */
148
147 /* IRQ0=LAN, IRQ1=ATA, IRQ3=SLT,PCM */ 149 /* IRQ0=LAN, IRQ1=ATA, IRQ3=SLT,PCM */
148 __raw_writew(0x0001,INTSEL); 150 __raw_writew(0x0001,INTSEL);
149} 151}
diff --git a/arch/sh/boards/mach-se/7206/setup.c b/arch/sh/boards/mach-se/7206/setup.c
index 8f5c65d43d1d..7f4871c71a01 100644
--- a/arch/sh/boards/mach-se/7206/setup.c
+++ b/arch/sh/boards/mach-se/7206/setup.c
@@ -86,20 +86,5 @@ __initcall(se7206_devices_setup);
86static struct sh_machine_vector mv_se __initmv = { 86static struct sh_machine_vector mv_se __initmv = {
87 .mv_name = "SolutionEngine", 87 .mv_name = "SolutionEngine",
88 .mv_nr_irqs = 256, 88 .mv_nr_irqs = 256,
89 .mv_inb = se7206_inb,
90 .mv_inw = se7206_inw,
91 .mv_outb = se7206_outb,
92 .mv_outw = se7206_outw,
93
94 .mv_inb_p = se7206_inb_p,
95 .mv_inw_p = se7206_inw,
96 .mv_outb_p = se7206_outb_p,
97 .mv_outw_p = se7206_outw,
98
99 .mv_insb = se7206_insb,
100 .mv_insw = se7206_insw,
101 .mv_outsb = se7206_outsb,
102 .mv_outsw = se7206_outsw,
103
104 .mv_init_irq = init_se7206_IRQ, 89 .mv_init_irq = init_se7206_IRQ,
105}; 90};
diff --git a/arch/sh/boards/mach-se/770x/Makefile b/arch/sh/boards/mach-se/770x/Makefile
index 8e624b06d5ea..43ea14feef51 100644
--- a/arch/sh/boards/mach-se/770x/Makefile
+++ b/arch/sh/boards/mach-se/770x/Makefile
@@ -2,4 +2,4 @@
2# Makefile for the 770x SolutionEngine specific parts of the kernel 2# Makefile for the 770x SolutionEngine specific parts of the kernel
3# 3#
4 4
5obj-y := setup.o io.o irq.o 5obj-y := setup.o irq.o
diff --git a/arch/sh/boards/mach-se/770x/io.c b/arch/sh/boards/mach-se/770x/io.c
deleted file mode 100644
index 28833c8786ea..000000000000
--- a/arch/sh/boards/mach-se/770x/io.c
+++ /dev/null
@@ -1,156 +0,0 @@
1/*
2 * Copyright (C) 2000 Kazumoto Kojima
3 *
4 * I/O routine for Hitachi SolutionEngine.
5 */
6#include <linux/kernel.h>
7#include <linux/types.h>
8#include <asm/io.h>
9#include <mach-se/mach/se.h>
10
11/* MS7750 requires special versions of in*, out* routines, since
12 PC-like io ports are located at upper half byte of 16-bit word which
13 can be accessed only with 16-bit wide. */
14
15static inline volatile __u16 *
16port2adr(unsigned int port)
17{
18 if (port & 0xff000000)
19 return ( volatile __u16 *) port;
20 if (port >= 0x2000)
21 return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
22 else if (port >= 0x1000)
23 return (volatile __u16 *) (PA_83902 + (port << 1));
24 else
25 return (volatile __u16 *) (PA_SUPERIO + (port << 1));
26}
27
28static inline int
29shifted_port(unsigned long port)
30{
31 /* For IDE registers, value is not shifted */
32 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
33 return 0;
34 else
35 return 1;
36}
37
38unsigned char se_inb(unsigned long port)
39{
40 if (shifted_port(port))
41 return (*port2adr(port) >> 8);
42 else
43 return (*port2adr(port))&0xff;
44}
45
46unsigned char se_inb_p(unsigned long port)
47{
48 unsigned long v;
49
50 if (shifted_port(port))
51 v = (*port2adr(port) >> 8);
52 else
53 v = (*port2adr(port))&0xff;
54 ctrl_delay();
55 return v;
56}
57
58unsigned short se_inw(unsigned long port)
59{
60 if (port >= 0x2000)
61 return *port2adr(port);
62 else
63 maybebadio(port);
64 return 0;
65}
66
67unsigned int se_inl(unsigned long port)
68{
69 maybebadio(port);
70 return 0;
71}
72
73void se_outb(unsigned char value, unsigned long port)
74{
75 if (shifted_port(port))
76 *(port2adr(port)) = value << 8;
77 else
78 *(port2adr(port)) = value;
79}
80
81void se_outb_p(unsigned char value, unsigned long port)
82{
83 if (shifted_port(port))
84 *(port2adr(port)) = value << 8;
85 else
86 *(port2adr(port)) = value;
87 ctrl_delay();
88}
89
90void se_outw(unsigned short value, unsigned long port)
91{
92 if (port >= 0x2000)
93 *port2adr(port) = value;
94 else
95 maybebadio(port);
96}
97
98void se_outl(unsigned int value, unsigned long port)
99{
100 maybebadio(port);
101}
102
103void se_insb(unsigned long port, void *addr, unsigned long count)
104{
105 volatile __u16 *p = port2adr(port);
106 __u8 *ap = addr;
107
108 if (shifted_port(port)) {
109 while (count--)
110 *ap++ = *p >> 8;
111 } else {
112 while (count--)
113 *ap++ = *p;
114 }
115}
116
117void se_insw(unsigned long port, void *addr, unsigned long count)
118{
119 volatile __u16 *p = port2adr(port);
120 __u16 *ap = addr;
121 while (count--)
122 *ap++ = *p;
123}
124
125void se_insl(unsigned long port, void *addr, unsigned long count)
126{
127 maybebadio(port);
128}
129
130void se_outsb(unsigned long port, const void *addr, unsigned long count)
131{
132 volatile __u16 *p = port2adr(port);
133 const __u8 *ap = addr;
134
135 if (shifted_port(port)) {
136 while (count--)
137 *p = *ap++ << 8;
138 } else {
139 while (count--)
140 *p = *ap++;
141 }
142}
143
144void se_outsw(unsigned long port, const void *addr, unsigned long count)
145{
146 volatile __u16 *p = port2adr(port);
147 const __u16 *ap = addr;
148
149 while (count--)
150 *p = *ap++;
151}
152
153void se_outsl(unsigned long port, const void *addr, unsigned long count)
154{
155 maybebadio(port);
156}
diff --git a/arch/sh/boards/mach-se/770x/setup.c b/arch/sh/boards/mach-se/770x/setup.c
index 66d39d1b0901..31330c65c0ce 100644
--- a/arch/sh/boards/mach-se/770x/setup.c
+++ b/arch/sh/boards/mach-se/770x/setup.c
@@ -195,27 +195,5 @@ static struct sh_machine_vector mv_se __initmv = {
195#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) 195#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
196 .mv_nr_irqs = 104, 196 .mv_nr_irqs = 104,
197#endif 197#endif
198
199 .mv_inb = se_inb,
200 .mv_inw = se_inw,
201 .mv_inl = se_inl,
202 .mv_outb = se_outb,
203 .mv_outw = se_outw,
204 .mv_outl = se_outl,
205
206 .mv_inb_p = se_inb_p,
207 .mv_inw_p = se_inw,
208 .mv_inl_p = se_inl,
209 .mv_outb_p = se_outb_p,
210 .mv_outw_p = se_outw,
211 .mv_outl_p = se_outl,
212
213 .mv_insb = se_insb,
214 .mv_insw = se_insw,
215 .mv_insl = se_insl,
216 .mv_outsb = se_outsb,
217 .mv_outsw = se_outsw,
218 .mv_outsl = se_outsl,
219
220 .mv_init_irq = init_se_IRQ, 198 .mv_init_irq = init_se_IRQ,
221}; 199};
diff --git a/arch/sh/boards/mach-se/7751/Makefile b/arch/sh/boards/mach-se/7751/Makefile
index e6f4341bfe6e..a338fd9d5039 100644
--- a/arch/sh/boards/mach-se/7751/Makefile
+++ b/arch/sh/boards/mach-se/7751/Makefile
@@ -2,4 +2,4 @@
2# Makefile for the 7751 SolutionEngine specific parts of the kernel 2# Makefile for the 7751 SolutionEngine specific parts of the kernel
3# 3#
4 4
5obj-y := setup.o io.o irq.o 5obj-y := setup.o irq.o
diff --git a/arch/sh/boards/mach-se/7751/io.c b/arch/sh/boards/mach-se/7751/io.c
deleted file mode 100644
index 6e75bd4459e5..000000000000
--- a/arch/sh/boards/mach-se/7751/io.c
+++ /dev/null
@@ -1,119 +0,0 @@
1/*
2 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
3 * Based largely on io_se.c.
4 *
5 * I/O routine for Hitachi 7751 SolutionEngine.
6 *
7 * Initial version only to support LAN access; some
8 * placeholder code from io_se.c left in with the
9 * expectation of later SuperIO and PCMCIA access.
10 */
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/pci.h>
14#include <asm/io.h>
15#include <mach-se/mach/se7751.h>
16#include <asm/addrspace.h>
17
18static inline volatile u16 *port2adr(unsigned int port)
19{
20 if (port >= 0x2000)
21 return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
22 maybebadio((unsigned long)port);
23 return (volatile __u16*)port;
24}
25
26/*
27 * General outline: remap really low stuff [eventually] to SuperIO,
28 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
29 * is mapped through the PCI IO window. Stuff with high bits (PXSEG)
30 * should be way beyond the window, and is used w/o translation for
31 * compatibility.
32 */
33unsigned char sh7751se_inb(unsigned long port)
34{
35 if (PXSEG(port))
36 return *(volatile unsigned char *)port;
37 else
38 return (*port2adr(port)) & 0xff;
39}
40
41unsigned char sh7751se_inb_p(unsigned long port)
42{
43 unsigned char v;
44
45 if (PXSEG(port))
46 v = *(volatile unsigned char *)port;
47 else
48 v = (*port2adr(port)) & 0xff;
49 ctrl_delay();
50 return v;
51}
52
53unsigned short sh7751se_inw(unsigned long port)
54{
55 if (PXSEG(port))
56 return *(volatile unsigned short *)port;
57 else if (port >= 0x2000)
58 return *port2adr(port);
59 else
60 maybebadio(port);
61 return 0;
62}
63
64unsigned int sh7751se_inl(unsigned long port)
65{
66 if (PXSEG(port))
67 return *(volatile unsigned long *)port;
68 else if (port >= 0x2000)
69 return *port2adr(port);
70 else
71 maybebadio(port);
72 return 0;
73}
74
75void sh7751se_outb(unsigned char value, unsigned long port)
76{
77
78 if (PXSEG(port))
79 *(volatile unsigned char *)port = value;
80 else
81 *(port2adr(port)) = value;
82}
83
84void sh7751se_outb_p(unsigned char value, unsigned long port)
85{
86 if (PXSEG(port))
87 *(volatile unsigned char *)port = value;
88 else
89 *(port2adr(port)) = value;
90 ctrl_delay();
91}
92
93void sh7751se_outw(unsigned short value, unsigned long port)
94{
95 if (PXSEG(port))
96 *(volatile unsigned short *)port = value;
97 else if (port >= 0x2000)
98 *port2adr(port) = value;
99 else
100 maybebadio(port);
101}
102
103void sh7751se_outl(unsigned int value, unsigned long port)
104{
105 if (PXSEG(port))
106 *(volatile unsigned long *)port = value;
107 else
108 maybebadio(port);
109}
110
111void sh7751se_insl(unsigned long port, void *addr, unsigned long count)
112{
113 maybebadio(port);
114}
115
116void sh7751se_outsl(unsigned long port, const void *addr, unsigned long count)
117{
118 maybebadio(port);
119}
diff --git a/arch/sh/boards/mach-se/7751/setup.c b/arch/sh/boards/mach-se/7751/setup.c
index 50572512e3e8..9fbc51beb181 100644
--- a/arch/sh/boards/mach-se/7751/setup.c
+++ b/arch/sh/boards/mach-se/7751/setup.c
@@ -56,23 +56,5 @@ __initcall(se7751_devices_setup);
56static struct sh_machine_vector mv_7751se __initmv = { 56static struct sh_machine_vector mv_7751se __initmv = {
57 .mv_name = "7751 SolutionEngine", 57 .mv_name = "7751 SolutionEngine",
58 .mv_nr_irqs = 72, 58 .mv_nr_irqs = 72,
59
60 .mv_inb = sh7751se_inb,
61 .mv_inw = sh7751se_inw,
62 .mv_inl = sh7751se_inl,
63 .mv_outb = sh7751se_outb,
64 .mv_outw = sh7751se_outw,
65 .mv_outl = sh7751se_outl,
66
67 .mv_inb_p = sh7751se_inb_p,
68 .mv_inw_p = sh7751se_inw,
69 .mv_inl_p = sh7751se_inl,
70 .mv_outb_p = sh7751se_outb_p,
71 .mv_outw_p = sh7751se_outw,
72 .mv_outl_p = sh7751se_outl,
73
74 .mv_insl = sh7751se_insl,
75 .mv_outsl = sh7751se_outsl,
76
77 .mv_init_irq = init_7751se_IRQ, 59 .mv_init_irq = init_7751se_IRQ,
78}; 60};
diff --git a/arch/sh/boards/mach-snapgear/Makefile b/arch/sh/boards/mach-snapgear/Makefile
deleted file mode 100644
index d2d2f4b6a502..000000000000
--- a/arch/sh/boards/mach-snapgear/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
1#
2# Makefile for the SnapGear specific parts of the kernel
3#
4
5obj-y := setup.o io.o
diff --git a/arch/sh/boards/mach-snapgear/io.c b/arch/sh/boards/mach-snapgear/io.c
deleted file mode 100644
index 476650e42dbc..000000000000
--- a/arch/sh/boards/mach-snapgear/io.c
+++ /dev/null
@@ -1,121 +0,0 @@
1/*
2 * Copyright (C) 2002 David McCullough <davidm@snapgear.com>
3 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
4 * Based largely on io_se.c.
5 *
6 * I/O routine for Hitachi 7751 SolutionEngine.
7 *
8 * Initial version only to support LAN access; some
9 * placeholder code from io_se.c left in with the
10 * expectation of later SuperIO and PCMCIA access.
11 */
12#include <linux/kernel.h>
13#include <linux/types.h>
14#include <linux/pci.h>
15#include <asm/io.h>
16#include <asm/addrspace.h>
17
18#ifdef CONFIG_SH_SECUREEDGE5410
19unsigned short secureedge5410_ioport;
20#endif
21
22static inline volatile __u16 *port2adr(unsigned int port)
23{
24 maybebadio((unsigned long)port);
25 return (volatile __u16*)port;
26}
27
28/*
29 * General outline: remap really low stuff [eventually] to SuperIO,
30 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
31 * is mapped through the PCI IO window. Stuff with high bits (PXSEG)
32 * should be way beyond the window, and is used w/o translation for
33 * compatibility.
34 */
35unsigned char snapgear_inb(unsigned long port)
36{
37 if (PXSEG(port))
38 return *(volatile unsigned char *)port;
39 else
40 return (*port2adr(port)) & 0xff;
41}
42
43unsigned char snapgear_inb_p(unsigned long port)
44{
45 unsigned char v;
46
47 if (PXSEG(port))
48 v = *(volatile unsigned char *)port;
49 else
50 v = (*port2adr(port))&0xff;
51 ctrl_delay();
52 return v;
53}
54
55unsigned short snapgear_inw(unsigned long port)
56{
57 if (PXSEG(port))
58 return *(volatile unsigned short *)port;
59 else if (port >= 0x2000)
60 return *port2adr(port);
61 else
62 maybebadio(port);
63 return 0;
64}
65
66unsigned int snapgear_inl(unsigned long port)
67{
68 if (PXSEG(port))
69 return *(volatile unsigned long *)port;
70 else if (port >= 0x2000)
71 return *port2adr(port);
72 else
73 maybebadio(port);
74 return 0;
75}
76
77void snapgear_outb(unsigned char value, unsigned long port)
78{
79
80 if (PXSEG(port))
81 *(volatile unsigned char *)port = value;
82 else
83 *(port2adr(port)) = value;
84}
85
86void snapgear_outb_p(unsigned char value, unsigned long port)
87{
88 if (PXSEG(port))
89 *(volatile unsigned char *)port = value;
90 else
91 *(port2adr(port)) = value;
92 ctrl_delay();
93}
94
95void snapgear_outw(unsigned short value, unsigned long port)
96{
97 if (PXSEG(port))
98 *(volatile unsigned short *)port = value;
99 else if (port >= 0x2000)
100 *port2adr(port) = value;
101 else
102 maybebadio(port);
103}
104
105void snapgear_outl(unsigned int value, unsigned long port)
106{
107 if (PXSEG(port))
108 *(volatile unsigned long *)port = value;
109 else
110 maybebadio(port);
111}
112
113void snapgear_insl(unsigned long port, void *addr, unsigned long count)
114{
115 maybebadio(port);
116}
117
118void snapgear_outsl(unsigned long port, const void *addr, unsigned long count)
119{
120 maybebadio(port);
121}
diff --git a/arch/sh/boards/mach-systemh/Makefile b/arch/sh/boards/mach-systemh/Makefile
deleted file mode 100644
index 2cc6a23d9d39..000000000000
--- a/arch/sh/boards/mach-systemh/Makefile
+++ /dev/null
@@ -1,13 +0,0 @@
1#
2# Makefile for the SystemH specific parts of the kernel
3#
4
5obj-y := setup.o irq.o io.o
6
7# XXX: This wants to be consolidated in arch/sh/drivers/pci, and more
8# importantly, with the generic sh7751_pcic_init() code. For now, we'll
9# just abuse the hell out of kbuild, because we can..
10
11obj-$(CONFIG_PCI) += pci.o
12pci-y := ../../se/7751/pci.o
13
diff --git a/arch/sh/boards/mach-systemh/io.c b/arch/sh/boards/mach-systemh/io.c
deleted file mode 100644
index 15577ff1f715..000000000000
--- a/arch/sh/boards/mach-systemh/io.c
+++ /dev/null
@@ -1,158 +0,0 @@
1/*
2 * linux/arch/sh/boards/renesas/systemh/io.c
3 *
4 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
5 * Based largely on io_se.c.
6 *
7 * I/O routine for Hitachi 7751 Systemh.
8 */
9#include <linux/kernel.h>
10#include <linux/types.h>
11#include <linux/pci.h>
12#include <mach/systemh7751.h>
13#include <asm/addrspace.h>
14#include <asm/io.h>
15
16#define ETHER_IOMAP(adr) (0xB3000000 + (adr)) /*map to 16bits access area
17 of smc lan chip*/
18static inline volatile __u16 *
19port2adr(unsigned int port)
20{
21 if (port >= 0x2000)
22 return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
23 maybebadio((unsigned long)port);
24 return (volatile __u16*)port;
25}
26
27/*
28 * General outline: remap really low stuff [eventually] to SuperIO,
29 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
30 * is mapped through the PCI IO window. Stuff with high bits (PXSEG)
31 * should be way beyond the window, and is used w/o translation for
32 * compatibility.
33 */
34unsigned char sh7751systemh_inb(unsigned long port)
35{
36 if (PXSEG(port))
37 return *(volatile unsigned char *)port;
38 else if (port <= 0x3F1)
39 return *(volatile unsigned char *)ETHER_IOMAP(port);
40 else
41 return (*port2adr(port))&0xff;
42}
43
44unsigned char sh7751systemh_inb_p(unsigned long port)
45{
46 unsigned char v;
47
48 if (PXSEG(port))
49 v = *(volatile unsigned char *)port;
50 else if (port <= 0x3F1)
51 v = *(volatile unsigned char *)ETHER_IOMAP(port);
52 else
53 v = (*port2adr(port))&0xff;
54 ctrl_delay();
55 return v;
56}
57
58unsigned short sh7751systemh_inw(unsigned long port)
59{
60 if (PXSEG(port))
61 return *(volatile unsigned short *)port;
62 else if (port >= 0x2000)
63 return *port2adr(port);
64 else if (port <= 0x3F1)
65 return *(volatile unsigned int *)ETHER_IOMAP(port);
66 else
67 maybebadio(port);
68 return 0;
69}
70
71unsigned int sh7751systemh_inl(unsigned long port)
72{
73 if (PXSEG(port))
74 return *(volatile unsigned long *)port;
75 else if (port >= 0x2000)
76 return *port2adr(port);
77 else if (port <= 0x3F1)
78 return *(volatile unsigned int *)ETHER_IOMAP(port);
79 else
80 maybebadio(port);
81 return 0;
82}
83
84void sh7751systemh_outb(unsigned char value, unsigned long port)
85{
86
87 if (PXSEG(port))
88 *(volatile unsigned char *)port = value;
89 else if (port <= 0x3F1)
90 *(volatile unsigned char *)ETHER_IOMAP(port) = value;
91 else
92 *(port2adr(port)) = value;
93}
94
95void sh7751systemh_outb_p(unsigned char value, unsigned long port)
96{
97 if (PXSEG(port))
98 *(volatile unsigned char *)port = value;
99 else if (port <= 0x3F1)
100 *(volatile unsigned char *)ETHER_IOMAP(port) = value;
101 else
102 *(port2adr(port)) = value;
103 ctrl_delay();
104}
105
106void sh7751systemh_outw(unsigned short value, unsigned long port)
107{
108 if (PXSEG(port))
109 *(volatile unsigned short *)port = value;
110 else if (port >= 0x2000)
111 *port2adr(port) = value;
112 else if (port <= 0x3F1)
113 *(volatile unsigned short *)ETHER_IOMAP(port) = value;
114 else
115 maybebadio(port);
116}
117
118void sh7751systemh_outl(unsigned int value, unsigned long port)
119{
120 if (PXSEG(port))
121 *(volatile unsigned long *)port = value;
122 else
123 maybebadio(port);
124}
125
126void sh7751systemh_insb(unsigned long port, void *addr, unsigned long count)
127{
128 unsigned char *p = addr;
129 while (count--) *p++ = sh7751systemh_inb(port);
130}
131
132void sh7751systemh_insw(unsigned long port, void *addr, unsigned long count)
133{
134 unsigned short *p = addr;
135 while (count--) *p++ = sh7751systemh_inw(port);
136}
137
138void sh7751systemh_insl(unsigned long port, void *addr, unsigned long count)
139{
140 maybebadio(port);
141}
142
143void sh7751systemh_outsb(unsigned long port, const void *addr, unsigned long count)
144{
145 unsigned char *p = (unsigned char*)addr;
146 while (count--) sh7751systemh_outb(*p++, port);
147}
148
149void sh7751systemh_outsw(unsigned long port, const void *addr, unsigned long count)
150{
151 unsigned short *p = (unsigned short*)addr;
152 while (count--) sh7751systemh_outw(*p++, port);
153}
154
155void sh7751systemh_outsl(unsigned long port, const void *addr, unsigned long count)
156{
157 maybebadio(port);
158}
diff --git a/arch/sh/boards/mach-systemh/irq.c b/arch/sh/boards/mach-systemh/irq.c
deleted file mode 100644
index e5ee13adeff4..000000000000
--- a/arch/sh/boards/mach-systemh/irq.c
+++ /dev/null
@@ -1,61 +0,0 @@
1/*
2 * linux/arch/sh/boards/renesas/systemh/irq.c
3 *
4 * Copyright (C) 2000 Kazumoto Kojima
5 *
6 * Hitachi SystemH Support.
7 *
8 * Modified for 7751 SystemH by
9 * Jonathan Short.
10 */
11
12#include <linux/init.h>
13#include <linux/irq.h>
14#include <linux/interrupt.h>
15#include <linux/io.h>
16
17#include <mach/systemh7751.h>
18#include <asm/smc37c93x.h>
19
20/* address of external interrupt mask register
21 * address must be set prior to use these (maybe in init_XXX_irq())
22 * XXX : is it better to use .config than specifying it in code? */
23static unsigned long *systemh_irq_mask_register = (unsigned long *)0xB3F10004;
24static unsigned long *systemh_irq_request_register = (unsigned long *)0xB3F10000;
25
26static void disable_systemh_irq(struct irq_data *data)
27{
28 unsigned long val, mask = 0x01 << 1;
29
30 /* Clear the "irq"th bit in the mask and set it in the request */
31 val = __raw_readl((unsigned long)systemh_irq_mask_register);
32 val &= ~mask;
33 __raw_writel(val, (unsigned long)systemh_irq_mask_register);
34
35 val = __raw_readl((unsigned long)systemh_irq_request_register);
36 val |= mask;
37 __raw_writel(val, (unsigned long)systemh_irq_request_register);
38}
39
40static void enable_systemh_irq(struct irq_data *data)
41{
42 unsigned long val, mask = 0x01 << 1;
43
44 /* Set "irq"th bit in the mask register */
45 val = __raw_readl((unsigned long)systemh_irq_mask_register);
46 val |= mask;
47 __raw_writel(val, (unsigned long)systemh_irq_mask_register);
48}
49
50static struct irq_chip systemh_irq_type = {
51 .name = "SystemH Register",
52 .irq_unmask = enable_systemh_irq,
53 .irq_mask = disable_systemh_irq,
54};
55
56void make_systemh_irq(unsigned int irq)
57{
58 disable_irq_nosync(irq);
59 set_irq_chip_and_handler(irq, &systemh_irq_type, handle_level_irq);
60 disable_systemh_irq(irq_get_irq_data(irq));
61}
diff --git a/arch/sh/boards/mach-systemh/setup.c b/arch/sh/boards/mach-systemh/setup.c
deleted file mode 100644
index 219fd800a43f..000000000000
--- a/arch/sh/boards/mach-systemh/setup.c
+++ /dev/null
@@ -1,57 +0,0 @@
1/*
2 * linux/arch/sh/boards/renesas/systemh/setup.c
3 *
4 * Copyright (C) 2000 Kazumoto Kojima
5 * Copyright (C) 2003 Paul Mundt
6 *
7 * Hitachi SystemH Support.
8 *
9 * Modified for 7751 SystemH by Jonathan Short.
10 *
11 * Rewritten for 2.6 by Paul Mundt.
12 *
13 * This file is subject to the terms and conditions of the GNU General Public
14 * License. See the file "COPYING" in the main directory of this archive
15 * for more details.
16 */
17#include <linux/init.h>
18#include <asm/machvec.h>
19#include <mach/systemh7751.h>
20
21extern void make_systemh_irq(unsigned int irq);
22
23/*
24 * Initialize IRQ setting
25 */
26static void __init sh7751systemh_init_irq(void)
27{
28 make_systemh_irq(0xb); /* Ethernet interrupt */
29}
30
31static struct sh_machine_vector mv_7751systemh __initmv = {
32 .mv_name = "7751 SystemH",
33 .mv_nr_irqs = 72,
34
35 .mv_inb = sh7751systemh_inb,
36 .mv_inw = sh7751systemh_inw,
37 .mv_inl = sh7751systemh_inl,
38 .mv_outb = sh7751systemh_outb,
39 .mv_outw = sh7751systemh_outw,
40 .mv_outl = sh7751systemh_outl,
41
42 .mv_inb_p = sh7751systemh_inb_p,
43 .mv_inw_p = sh7751systemh_inw,
44 .mv_inl_p = sh7751systemh_inl,
45 .mv_outb_p = sh7751systemh_outb_p,
46 .mv_outw_p = sh7751systemh_outw,
47 .mv_outl_p = sh7751systemh_outl,
48
49 .mv_insb = sh7751systemh_insb,
50 .mv_insw = sh7751systemh_insw,
51 .mv_insl = sh7751systemh_insl,
52 .mv_outsb = sh7751systemh_outsb,
53 .mv_outsw = sh7751systemh_outsw,
54 .mv_outsl = sh7751systemh_outsl,
55
56 .mv_init_irq = sh7751systemh_init_irq,
57};
diff --git a/arch/sh/configs/snapgear_defconfig b/arch/sh/configs/secureedge5410_defconfig
index 7eae4e59d7f0..7eae4e59d7f0 100644
--- a/arch/sh/configs/snapgear_defconfig
+++ b/arch/sh/configs/secureedge5410_defconfig
diff --git a/arch/sh/configs/systemh_defconfig b/arch/sh/configs/systemh_defconfig
deleted file mode 100644
index b58dfc505efe..000000000000
--- a/arch/sh/configs/systemh_defconfig
+++ /dev/null
@@ -1,28 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_LOG_BUF_SHIFT=14
3CONFIG_BLK_DEV_INITRD=y
4# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
5# CONFIG_SYSCTL_SYSCALL is not set
6# CONFIG_HOTPLUG is not set
7CONFIG_SLAB=y
8CONFIG_MODULES=y
9CONFIG_MODULE_UNLOAD=y
10# CONFIG_BLK_DEV_BSG is not set
11CONFIG_CPU_SUBTYPE_SH7751R=y
12CONFIG_MEMORY_START=0x0c000000
13CONFIG_MEMORY_SIZE=0x00400000
14CONFIG_FLATMEM_MANUAL=y
15CONFIG_SH_7751_SYSTEMH=y
16CONFIG_PREEMPT=y
17# CONFIG_STANDALONE is not set
18CONFIG_BLK_DEV_RAM=y
19CONFIG_BLK_DEV_RAM_SIZE=1024
20# CONFIG_INPUT is not set
21# CONFIG_SERIO_SERPORT is not set
22# CONFIG_VT is not set
23CONFIG_HW_RANDOM=y
24CONFIG_PROC_KCORE=y
25CONFIG_TMPFS=y
26CONFIG_CRAMFS=y
27CONFIG_ROMFS_FS=y
28# CONFIG_RCU_CPU_STALL_DETECTOR is not set
diff --git a/arch/sh/include/asm/addrspace.h b/arch/sh/include/asm/addrspace.h
index 446b3831c214..3d1ae2bfaa6f 100644
--- a/arch/sh/include/asm/addrspace.h
+++ b/arch/sh/include/asm/addrspace.h
@@ -44,10 +44,10 @@
44/* 44/*
45 * These will never work in 32-bit, don't even bother. 45 * These will never work in 32-bit, don't even bother.
46 */ 46 */
47#define P1SEGADDR(a) __futile_remapping_attempt 47#define P1SEGADDR(a) ({ (void)(a); BUG(); NULL; })
48#define P2SEGADDR(a) __futile_remapping_attempt 48#define P2SEGADDR(a) ({ (void)(a); BUG(); NULL; })
49#define P3SEGADDR(a) __futile_remapping_attempt 49#define P3SEGADDR(a) ({ (void)(a); BUG(); NULL; })
50#define P4SEGADDR(a) __futile_remapping_attempt 50#define P4SEGADDR(a) ({ (void)(a); BUG(); NULL; })
51#endif 51#endif
52#endif /* P1SEG */ 52#endif /* P1SEG */
53 53
diff --git a/arch/sh/include/asm/pgtable.h b/arch/sh/include/asm/pgtable.h
index a15f1058bbf4..083ea068e819 100644
--- a/arch/sh/include/asm/pgtable.h
+++ b/arch/sh/include/asm/pgtable.h
@@ -66,7 +66,6 @@ static inline unsigned long long neff_sign_extend(unsigned long val)
66#define PHYS_ADDR_MASK29 0x1fffffff 66#define PHYS_ADDR_MASK29 0x1fffffff
67#define PHYS_ADDR_MASK32 0xffffffff 67#define PHYS_ADDR_MASK32 0xffffffff
68 68
69#ifdef CONFIG_PMB
70static inline unsigned long phys_addr_mask(void) 69static inline unsigned long phys_addr_mask(void)
71{ 70{
72 /* Is the MMU in 29bit mode? */ 71 /* Is the MMU in 29bit mode? */
@@ -75,17 +74,6 @@ static inline unsigned long phys_addr_mask(void)
75 74
76 return PHYS_ADDR_MASK32; 75 return PHYS_ADDR_MASK32;
77} 76}
78#elif defined(CONFIG_32BIT)
79static inline unsigned long phys_addr_mask(void)
80{
81 return PHYS_ADDR_MASK32;
82}
83#else
84static inline unsigned long phys_addr_mask(void)
85{
86 return PHYS_ADDR_MASK29;
87}
88#endif
89 77
90#define PTE_PHYS_MASK (phys_addr_mask() & PAGE_MASK) 78#define PTE_PHYS_MASK (phys_addr_mask() & PAGE_MASK)
91#define PTE_FLAGS_MASK (~(PTE_PHYS_MASK) << PAGE_SHIFT) 79#define PTE_FLAGS_MASK (~(PTE_PHYS_MASK) << PAGE_SHIFT)
diff --git a/arch/sh/include/asm/system.h b/arch/sh/include/asm/system.h
index 1f1af5afff03..10c8b1823a18 100644
--- a/arch/sh/include/asm/system.h
+++ b/arch/sh/include/asm/system.h
@@ -10,6 +10,7 @@
10#include <linux/compiler.h> 10#include <linux/compiler.h>
11#include <linux/linkage.h> 11#include <linux/linkage.h>
12#include <asm/types.h> 12#include <asm/types.h>
13#include <asm/uncached.h>
13 14
14#define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */ 15#define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */
15 16
@@ -137,9 +138,6 @@ extern unsigned int instruction_size(unsigned int insn);
137#define instruction_size(insn) (4) 138#define instruction_size(insn) (4)
138#endif 139#endif
139 140
140extern unsigned long cached_to_uncached;
141extern unsigned long uncached_size;
142
143void per_cpu_trap_init(void); 141void per_cpu_trap_init(void);
144void default_idle(void); 142void default_idle(void);
145void cpu_idle_wait(void); 143void cpu_idle_wait(void);
diff --git a/arch/sh/include/asm/system_32.h b/arch/sh/include/asm/system_32.h
index c941b2739405..a4ad1cd9bc4d 100644
--- a/arch/sh/include/asm/system_32.h
+++ b/arch/sh/include/asm/system_32.h
@@ -145,42 +145,6 @@ do { \
145 __restore_dsp(prev); \ 145 __restore_dsp(prev); \
146} while (0) 146} while (0)
147 147
148/*
149 * Jump to uncached area.
150 * When handling TLB or caches, we need to do it from an uncached area.
151 */
152#define jump_to_uncached() \
153do { \
154 unsigned long __dummy; \
155 \
156 __asm__ __volatile__( \
157 "mova 1f, %0\n\t" \
158 "add %1, %0\n\t" \
159 "jmp @%0\n\t" \
160 " nop\n\t" \
161 ".balign 4\n" \
162 "1:" \
163 : "=&z" (__dummy) \
164 : "r" (cached_to_uncached)); \
165} while (0)
166
167/*
168 * Back to cached area.
169 */
170#define back_to_cached() \
171do { \
172 unsigned long __dummy; \
173 ctrl_barrier(); \
174 __asm__ __volatile__( \
175 "mov.l 1f, %0\n\t" \
176 "jmp @%0\n\t" \
177 " nop\n\t" \
178 ".balign 4\n" \
179 "1: .long 2f\n" \
180 "2:" \
181 : "=&r" (__dummy)); \
182} while (0)
183
184#ifdef CONFIG_CPU_HAS_SR_RB 148#ifdef CONFIG_CPU_HAS_SR_RB
185#define lookup_exception_vector() \ 149#define lookup_exception_vector() \
186({ \ 150({ \
diff --git a/arch/sh/include/asm/system_64.h b/arch/sh/include/asm/system_64.h
index 36338646dfc8..8593bc8d1a4e 100644
--- a/arch/sh/include/asm/system_64.h
+++ b/arch/sh/include/asm/system_64.h
@@ -34,9 +34,6 @@ do { \
34 &next->thread); \ 34 &next->thread); \
35} while (0) 35} while (0)
36 36
37#define jump_to_uncached() do { } while (0)
38#define back_to_cached() do { } while (0)
39
40#define __icbi(addr) __asm__ __volatile__ ( "icbi %0, 0\n\t" : : "r" (addr)) 37#define __icbi(addr) __asm__ __volatile__ ( "icbi %0, 0\n\t" : : "r" (addr))
41#define __ocbp(addr) __asm__ __volatile__ ( "ocbp %0, 0\n\t" : : "r" (addr)) 38#define __ocbp(addr) __asm__ __volatile__ ( "ocbp %0, 0\n\t" : : "r" (addr))
42#define __ocbi(addr) __asm__ __volatile__ ( "ocbi %0, 0\n\t" : : "r" (addr)) 39#define __ocbi(addr) __asm__ __volatile__ ( "ocbi %0, 0\n\t" : : "r" (addr))
diff --git a/arch/sh/include/asm/uncached.h b/arch/sh/include/asm/uncached.h
index e3419f96626a..6f8816b79cf1 100644
--- a/arch/sh/include/asm/uncached.h
+++ b/arch/sh/include/asm/uncached.h
@@ -4,15 +4,55 @@
4#include <linux/bug.h> 4#include <linux/bug.h>
5 5
6#ifdef CONFIG_UNCACHED_MAPPING 6#ifdef CONFIG_UNCACHED_MAPPING
7extern unsigned long cached_to_uncached;
8extern unsigned long uncached_size;
7extern unsigned long uncached_start, uncached_end; 9extern unsigned long uncached_start, uncached_end;
8 10
9extern int virt_addr_uncached(unsigned long kaddr); 11extern int virt_addr_uncached(unsigned long kaddr);
10extern void uncached_init(void); 12extern void uncached_init(void);
11extern void uncached_resize(unsigned long size); 13extern void uncached_resize(unsigned long size);
14
15/*
16 * Jump to uncached area.
17 * When handling TLB or caches, we need to do it from an uncached area.
18 */
19#define jump_to_uncached() \
20do { \
21 unsigned long __dummy; \
22 \
23 __asm__ __volatile__( \
24 "mova 1f, %0\n\t" \
25 "add %1, %0\n\t" \
26 "jmp @%0\n\t" \
27 " nop\n\t" \
28 ".balign 4\n" \
29 "1:" \
30 : "=&z" (__dummy) \
31 : "r" (cached_to_uncached)); \
32} while (0)
33
34/*
35 * Back to cached area.
36 */
37#define back_to_cached() \
38do { \
39 unsigned long __dummy; \
40 ctrl_barrier(); \
41 __asm__ __volatile__( \
42 "mov.l 1f, %0\n\t" \
43 "jmp @%0\n\t" \
44 " nop\n\t" \
45 ".balign 4\n" \
46 "1: .long 2f\n" \
47 "2:" \
48 : "=&r" (__dummy)); \
49} while (0)
12#else 50#else
13#define virt_addr_uncached(kaddr) (0) 51#define virt_addr_uncached(kaddr) (0)
14#define uncached_init() do { } while (0) 52#define uncached_init() do { } while (0)
15#define uncached_resize(size) BUG() 53#define uncached_resize(size) BUG()
54#define jump_to_uncached() do { } while (0)
55#define back_to_cached() do { } while (0)
16#endif 56#endif
17 57
18#endif /* __ASM_SH_UNCACHED_H */ 58#endif /* __ASM_SH_UNCACHED_H */
diff --git a/arch/sh/include/mach-common/mach/edosk7705.h b/arch/sh/include/mach-common/mach/edosk7705.h
deleted file mode 100644
index efc43b323466..000000000000
--- a/arch/sh/include/mach-common/mach/edosk7705.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef __ASM_SH_EDOSK7705_H
2#define __ASM_SH_EDOSK7705_H
3
4#define __IO_PREFIX sh_edosk7705
5#include <asm/io_generic.h>
6
7#endif /* __ASM_SH_EDOSK7705_H */
diff --git a/arch/sh/include/mach-common/mach/microdev.h b/arch/sh/include/mach-common/mach/microdev.h
index 1aed15856e11..dcb05fa8c164 100644
--- a/arch/sh/include/mach-common/mach/microdev.h
+++ b/arch/sh/include/mach-common/mach/microdev.h
@@ -68,13 +68,4 @@ extern void microdev_print_fpga_intc_status(void);
68#define __IO_PREFIX microdev 68#define __IO_PREFIX microdev
69#include <asm/io_generic.h> 69#include <asm/io_generic.h>
70 70
71#if defined(CONFIG_PCI)
72unsigned char microdev_pci_inb(unsigned long port);
73unsigned short microdev_pci_inw(unsigned long port);
74unsigned long microdev_pci_inl(unsigned long port);
75void microdev_pci_outb(unsigned char data, unsigned long port);
76void microdev_pci_outw(unsigned short data, unsigned long port);
77void microdev_pci_outl(unsigned long data, unsigned long port);
78#endif
79
80#endif /* __ASM_SH_MICRODEV_H */ 71#endif /* __ASM_SH_MICRODEV_H */
diff --git a/arch/sh/include/mach-common/mach/snapgear.h b/arch/sh/include/mach-common/mach/secureedge5410.h
index 042d95f51c4d..3653b9a4bacc 100644
--- a/arch/sh/include/mach-common/mach/snapgear.h
+++ b/arch/sh/include/mach-common/mach/secureedge5410.h
@@ -12,30 +12,9 @@
12#ifndef _ASM_SH_IO_SNAPGEAR_H 12#ifndef _ASM_SH_IO_SNAPGEAR_H
13#define _ASM_SH_IO_SNAPGEAR_H 13#define _ASM_SH_IO_SNAPGEAR_H
14 14
15#if defined(CONFIG_CPU_SH4)
16/*
17 * The external interrupt lines, these take up ints 0 - 15 inclusive
18 * depending on the priority for the interrupt. In fact the priority
19 * is the interrupt :-)
20 */
21
22#define IRL0_IRQ 2
23#define IRL0_PRIORITY 13
24
25#define IRL1_IRQ 5
26#define IRL1_PRIORITY 10
27
28#define IRL2_IRQ 8
29#define IRL2_PRIORITY 7
30
31#define IRL3_IRQ 11
32#define IRL3_PRIORITY 4
33#endif
34
35#define __IO_PREFIX snapgear 15#define __IO_PREFIX snapgear
36#include <asm/io_generic.h> 16#include <asm/io_generic.h>
37 17
38#ifdef CONFIG_SH_SECUREEDGE5410
39/* 18/*
40 * We need to remember what was written to the ioport as some bits 19 * We need to remember what was written to the ioport as some bits
41 * are shared with other functions and you cannot read back what was 20 * are shared with other functions and you cannot read back what was
@@ -66,6 +45,5 @@ extern unsigned short secureedge5410_ioport;
66 ((secureedge5410_ioport & ~(mask)) | ((val) & (mask))))) 45 ((secureedge5410_ioport & ~(mask)) | ((val) & (mask)))))
67#define SECUREEDGE_READ_IOPORT() \ 46#define SECUREEDGE_READ_IOPORT() \
68 ((*SECUREEDGE_IOPORT_ADDR&0x0817) | (secureedge5410_ioport&~0x0817)) 47 ((*SECUREEDGE_IOPORT_ADDR&0x0817) | (secureedge5410_ioport&~0x0817))
69#endif
70 48
71#endif /* _ASM_SH_IO_SNAPGEAR_H */ 49#endif /* _ASM_SH_IO_SNAPGEAR_H */
diff --git a/arch/sh/include/mach-common/mach/systemh7751.h b/arch/sh/include/mach-common/mach/systemh7751.h
deleted file mode 100644
index 4161122c84ef..000000000000
--- a/arch/sh/include/mach-common/mach/systemh7751.h
+++ /dev/null
@@ -1,71 +0,0 @@
1#ifndef __ASM_SH_SYSTEMH_7751SYSTEMH_H
2#define __ASM_SH_SYSTEMH_7751SYSTEMH_H
3
4/*
5 * linux/include/asm-sh/systemh/7751systemh.h
6 *
7 * Copyright (C) 2000 Kazumoto Kojima
8 *
9 * Hitachi SystemH support
10
11 * Modified for 7751 SystemH by
12 * Jonathan Short, 2002.
13 */
14
15/* Box specific addresses. */
16
17#define PA_ROM 0x00000000 /* EPROM */
18#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */
19#define PA_FROM 0x01000000 /* EPROM */
20#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */
21#define PA_EXT1 0x04000000
22#define PA_EXT1_SIZE 0x04000000
23#define PA_EXT2 0x08000000
24#define PA_EXT2_SIZE 0x04000000
25#define PA_SDRAM 0x0c000000
26#define PA_SDRAM_SIZE 0x04000000
27
28#define PA_EXT4 0x12000000
29#define PA_EXT4_SIZE 0x02000000
30#define PA_EXT5 0x14000000
31#define PA_EXT5_SIZE 0x04000000
32#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */
33
34#define PA_DIPSW0 0xb9000000 /* Dip switch 5,6 */
35#define PA_DIPSW1 0xb9000002 /* Dip switch 7,8 */
36#define PA_LED 0xba000000 /* LED */
37#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */
38
39#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controller */
40#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */
41#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */
42#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */
43#define MRSHPC_MODE (PA_MRSHPC + 4)
44#define MRSHPC_OPTION (PA_MRSHPC + 6)
45#define MRSHPC_CSR (PA_MRSHPC + 8)
46#define MRSHPC_ISR (PA_MRSHPC + 10)
47#define MRSHPC_ICR (PA_MRSHPC + 12)
48#define MRSHPC_CPWCR (PA_MRSHPC + 14)
49#define MRSHPC_MW0CR1 (PA_MRSHPC + 16)
50#define MRSHPC_MW1CR1 (PA_MRSHPC + 18)
51#define MRSHPC_IOWCR1 (PA_MRSHPC + 20)
52#define MRSHPC_MW0CR2 (PA_MRSHPC + 22)
53#define MRSHPC_MW1CR2 (PA_MRSHPC + 24)
54#define MRSHPC_IOWCR2 (PA_MRSHPC + 26)
55#define MRSHPC_CDCR (PA_MRSHPC + 28)
56#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
57
58#define BCR_ILCRA (PA_BCR + 0)
59#define BCR_ILCRB (PA_BCR + 2)
60#define BCR_ILCRC (PA_BCR + 4)
61#define BCR_ILCRD (PA_BCR + 6)
62#define BCR_ILCRE (PA_BCR + 8)
63#define BCR_ILCRF (PA_BCR + 10)
64#define BCR_ILCRG (PA_BCR + 12)
65
66#define IRQ_79C973 13
67
68#define __IO_PREFIX sh7751systemh
69#include <asm/io_generic.h>
70
71#endif /* __ASM_SH_SYSTEMH_7751SYSTEMH_H */
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index 2d9700c6b53a..0fe2e9329cb2 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -48,7 +48,7 @@ static struct clk r_clk = {
48 * Default rate for the root input clock, reset this with clk_set_rate() 48 * Default rate for the root input clock, reset this with clk_set_rate()
49 * from the platform code. 49 * from the platform code.
50 */ 50 */
51struct clk extal_clk = { 51static struct clk extal_clk = {
52 .rate = 33333333, 52 .rate = 33333333,
53}; 53};
54 54
@@ -111,7 +111,7 @@ static struct clk div3_clk = {
111 .parent = &pll_clk, 111 .parent = &pll_clk,
112}; 112};
113 113
114struct clk *main_clks[] = { 114static struct clk *main_clks[] = {
115 &r_clk, 115 &r_clk,
116 &extal_clk, 116 &extal_clk,
117 &fll_clk, 117 &fll_clk,
@@ -156,7 +156,7 @@ struct clk div4_clks[DIV4_NR] = {
156 156
157enum { DIV6_V, DIV6_FA, DIV6_FB, DIV6_I, DIV6_S, DIV6_NR }; 157enum { DIV6_V, DIV6_FA, DIV6_FB, DIV6_I, DIV6_S, DIV6_NR };
158 158
159struct clk div6_clks[DIV6_NR] = { 159static struct clk div6_clks[DIV6_NR] = {
160 [DIV6_V] = SH_CLK_DIV6(&div3_clk, VCLKCR, 0), 160 [DIV6_V] = SH_CLK_DIV6(&div3_clk, VCLKCR, 0),
161 [DIV6_FA] = SH_CLK_DIV6(&div3_clk, FCLKACR, 0), 161 [DIV6_FA] = SH_CLK_DIV6(&div3_clk, FCLKACR, 0),
162 [DIV6_FB] = SH_CLK_DIV6(&div3_clk, FCLKBCR, 0), 162 [DIV6_FB] = SH_CLK_DIV6(&div3_clk, FCLKBCR, 0),
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig
index 09370392aff1..c3e61b366493 100644
--- a/arch/sh/mm/Kconfig
+++ b/arch/sh/mm/Kconfig
@@ -79,7 +79,7 @@ config 29BIT
79 79
80config 32BIT 80config 32BIT
81 bool 81 bool
82 default y if CPU_SH5 82 default y if CPU_SH5 || !MMU
83 83
84config PMB 84config PMB
85 bool "Support 32-bit physical addressing through PMB" 85 bool "Support 32-bit physical addressing through PMB"
diff --git a/arch/sh/mm/consistent.c b/arch/sh/mm/consistent.c
index 038793286990..40733a952402 100644
--- a/arch/sh/mm/consistent.c
+++ b/arch/sh/mm/consistent.c
@@ -79,21 +79,20 @@ void dma_generic_free_coherent(struct device *dev, size_t size,
79void dma_cache_sync(struct device *dev, void *vaddr, size_t size, 79void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
80 enum dma_data_direction direction) 80 enum dma_data_direction direction)
81{ 81{
82#if defined(CONFIG_CPU_SH5) || defined(CONFIG_PMB) 82 void *addr;
83 void *p1addr = vaddr; 83
84#else 84 addr = __in_29bit_mode() ?
85 void *p1addr = (void*) P1SEGADDR((unsigned long)vaddr); 85 (void *)P1SEGADDR((unsigned long)vaddr) : vaddr;
86#endif
87 86
88 switch (direction) { 87 switch (direction) {
89 case DMA_FROM_DEVICE: /* invalidate only */ 88 case DMA_FROM_DEVICE: /* invalidate only */
90 __flush_invalidate_region(p1addr, size); 89 __flush_invalidate_region(addr, size);
91 break; 90 break;
92 case DMA_TO_DEVICE: /* writeback only */ 91 case DMA_TO_DEVICE: /* writeback only */
93 __flush_wback_region(p1addr, size); 92 __flush_wback_region(addr, size);
94 break; 93 break;
95 case DMA_BIDIRECTIONAL: /* writeback and invalidate */ 94 case DMA_BIDIRECTIONAL: /* writeback and invalidate */
96 __flush_purge_region(p1addr, size); 95 __flush_purge_region(addr, size);
97 break; 96 break;
98 default: 97 default:
99 BUG(); 98 BUG();
diff --git a/arch/sh/mm/uncached.c b/arch/sh/mm/uncached.c
index 8a4eca551fc0..a7767da815e9 100644
--- a/arch/sh/mm/uncached.c
+++ b/arch/sh/mm/uncached.c
@@ -28,7 +28,7 @@ EXPORT_SYMBOL(virt_addr_uncached);
28 28
29void __init uncached_init(void) 29void __init uncached_init(void)
30{ 30{
31#ifdef CONFIG_29BIT 31#if defined(CONFIG_29BIT) || !defined(CONFIG_MMU)
32 uncached_start = P2SEG; 32 uncached_start = P2SEG;
33#else 33#else
34 uncached_start = memory_end; 34 uncached_start = memory_end;
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types
index 9f56eb978024..0e68465e7b50 100644
--- a/arch/sh/tools/mach-types
+++ b/arch/sh/tools/mach-types
@@ -26,7 +26,6 @@ HD64461 HD64461
267724SE SH_7724_SOLUTION_ENGINE 267724SE SH_7724_SOLUTION_ENGINE
277751SE SH_7751_SOLUTION_ENGINE 277751SE SH_7751_SOLUTION_ENGINE
287780SE SH_7780_SOLUTION_ENGINE 287780SE SH_7780_SOLUTION_ENGINE
297751SYSTEMH SH_7751_SYSTEMH
30HP6XX SH_HP6XX 29HP6XX SH_HP6XX
31DREAMCAST SH_DREAMCAST 30DREAMCAST SH_DREAMCAST
32SNAPGEAR SH_SECUREEDGE5410 31SNAPGEAR SH_SECUREEDGE5410
diff --git a/arch/tile/include/asm/highmem.h b/arch/tile/include/asm/highmem.h
index e0f7ee186721..b2a6c5de79ab 100644
--- a/arch/tile/include/asm/highmem.h
+++ b/arch/tile/include/asm/highmem.h
@@ -23,7 +23,6 @@
23 23
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25#include <linux/threads.h> 25#include <linux/threads.h>
26#include <asm/kmap_types.h>
27#include <asm/tlbflush.h> 26#include <asm/tlbflush.h>
28#include <asm/homecache.h> 27#include <asm/homecache.h>
29 28
diff --git a/arch/tile/include/asm/kmap_types.h b/arch/tile/include/asm/kmap_types.h
index 1480106d1c05..3d0f20246260 100644
--- a/arch/tile/include/asm/kmap_types.h
+++ b/arch/tile/include/asm/kmap_types.h
@@ -16,28 +16,42 @@
16#define _ASM_TILE_KMAP_TYPES_H 16#define _ASM_TILE_KMAP_TYPES_H
17 17
18/* 18/*
19 * In TILE Linux each set of four of these uses another 16MB chunk of 19 * In 32-bit TILE Linux we have to balance the desire to have a lot of
20 * address space, given 64 tiles and 64KB pages, so we only enable 20 * nested atomic mappings with the fact that large page sizes and many
21 * ones that are required by the kernel configuration. 21 * processors chew up address space quickly. In a typical
22 * 64-processor, 64KB-page layout build, making KM_TYPE_NR one larger
23 * adds 4MB of required address-space. For now we leave KM_TYPE_NR
24 * set to depth 8.
22 */ 25 */
23enum km_type { 26enum km_type {
27 KM_TYPE_NR = 8
28};
29
30/*
31 * We provide dummy definitions of all the stray values that used to be
32 * required for kmap_atomic() and no longer are.
33 */
34enum {
24 KM_BOUNCE_READ, 35 KM_BOUNCE_READ,
25 KM_SKB_SUNRPC_DATA, 36 KM_SKB_SUNRPC_DATA,
26 KM_SKB_DATA_SOFTIRQ, 37 KM_SKB_DATA_SOFTIRQ,
27 KM_USER0, 38 KM_USER0,
28 KM_USER1, 39 KM_USER1,
29 KM_BIO_SRC_IRQ, 40 KM_BIO_SRC_IRQ,
41 KM_BIO_DST_IRQ,
42 KM_PTE0,
43 KM_PTE1,
30 KM_IRQ0, 44 KM_IRQ0,
31 KM_IRQ1, 45 KM_IRQ1,
32 KM_SOFTIRQ0, 46 KM_SOFTIRQ0,
33 KM_SOFTIRQ1, 47 KM_SOFTIRQ1,
34 KM_MEMCPY0, 48 KM_SYNC_ICACHE,
35 KM_MEMCPY1, 49 KM_SYNC_DCACHE,
36#if defined(CONFIG_HIGHPTE) 50 KM_UML_USERCOPY,
37 KM_PTE0, 51 KM_IRQ_PTE,
38 KM_PTE1, 52 KM_NMI,
39#endif 53 KM_NMI_PTE,
40 KM_TYPE_NR 54 KM_KDB
41}; 55};
42 56
43#endif /* _ASM_TILE_KMAP_TYPES_H */ 57#endif /* _ASM_TILE_KMAP_TYPES_H */
diff --git a/arch/tile/include/asm/pgtable.h b/arch/tile/include/asm/pgtable.h
index dc4ccdd855bc..a6604e9485da 100644
--- a/arch/tile/include/asm/pgtable.h
+++ b/arch/tile/include/asm/pgtable.h
@@ -344,10 +344,8 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
344#define pgd_offset_k(address) pgd_offset(&init_mm, address) 344#define pgd_offset_k(address) pgd_offset(&init_mm, address)
345 345
346#if defined(CONFIG_HIGHPTE) 346#if defined(CONFIG_HIGHPTE)
347extern pte_t *_pte_offset_map(pmd_t *, unsigned long address, enum km_type); 347extern pte_t *pte_offset_map(pmd_t *, unsigned long address);
348#define pte_offset_map(dir, address) \ 348#define pte_unmap(pte) kunmap_atomic(pte)
349 _pte_offset_map(dir, address, KM_PTE0)
350#define pte_unmap(pte) kunmap_atomic(pte, KM_PTE0)
351#else 349#else
352#define pte_offset_map(dir, address) pte_offset_kernel(dir, address) 350#define pte_offset_map(dir, address) pte_offset_kernel(dir, address)
353#define pte_unmap(pte) do { } while (0) 351#define pte_unmap(pte) do { } while (0)
diff --git a/arch/tile/include/asm/stat.h b/arch/tile/include/asm/stat.h
index 3dc90fa92c70..b16e5db8f0e7 100644
--- a/arch/tile/include/asm/stat.h
+++ b/arch/tile/include/asm/stat.h
@@ -1 +1,4 @@
1#ifdef CONFIG_COMPAT
2#define __ARCH_WANT_STAT64 /* Used for compat_sys_stat64() etc. */
3#endif
1#include <asm-generic/stat.h> 4#include <asm-generic/stat.h>
diff --git a/arch/tile/include/asm/unistd.h b/arch/tile/include/asm/unistd.h
index f2e3ff485333..b35c2db71199 100644
--- a/arch/tile/include/asm/unistd.h
+++ b/arch/tile/include/asm/unistd.h
@@ -41,6 +41,7 @@ __SYSCALL(__NR_cmpxchg_badaddr, sys_cmpxchg_badaddr)
41#ifdef CONFIG_COMPAT 41#ifdef CONFIG_COMPAT
42#define __ARCH_WANT_SYS_LLSEEK 42#define __ARCH_WANT_SYS_LLSEEK
43#endif 43#endif
44#define __ARCH_WANT_SYS_NEWFSTATAT
44#endif 45#endif
45 46
46#endif /* _ASM_TILE_UNISTD_H */ 47#endif /* _ASM_TILE_UNISTD_H */
diff --git a/arch/tile/kernel/compat.c b/arch/tile/kernel/compat.c
index 77739cdd9462..67617a05e602 100644
--- a/arch/tile/kernel/compat.c
+++ b/arch/tile/kernel/compat.c
@@ -148,11 +148,11 @@ long tile_compat_sys_msgrcv(int msqid,
148#define compat_sys_readahead sys32_readahead 148#define compat_sys_readahead sys32_readahead
149#define compat_sys_sync_file_range compat_sys_sync_file_range2 149#define compat_sys_sync_file_range compat_sys_sync_file_range2
150 150
151/* The native 64-bit "struct stat" matches the 32-bit "struct stat64". */ 151/* We leverage the "struct stat64" type for 32-bit time_t/nsec. */
152#define compat_sys_stat64 sys_newstat 152#define compat_sys_stat64 sys_stat64
153#define compat_sys_lstat64 sys_newlstat 153#define compat_sys_lstat64 sys_lstat64
154#define compat_sys_fstat64 sys_newfstat 154#define compat_sys_fstat64 sys_fstat64
155#define compat_sys_fstatat64 sys_newfstatat 155#define compat_sys_fstatat64 sys_fstatat64
156 156
157/* The native sys_ptrace dynamically handles compat binaries. */ 157/* The native sys_ptrace dynamically handles compat binaries. */
158#define compat_sys_ptrace sys_ptrace 158#define compat_sys_ptrace sys_ptrace
diff --git a/arch/tile/kernel/early_printk.c b/arch/tile/kernel/early_printk.c
index 2c54fd43a8a0..493a0e66d916 100644
--- a/arch/tile/kernel/early_printk.c
+++ b/arch/tile/kernel/early_printk.c
@@ -54,7 +54,7 @@ void early_printk(const char *fmt, ...)
54void early_panic(const char *fmt, ...) 54void early_panic(const char *fmt, ...)
55{ 55{
56 va_list ap; 56 va_list ap;
57 raw_local_irq_disable_all(); 57 arch_local_irq_disable_all();
58 va_start(ap, fmt); 58 va_start(ap, fmt);
59 early_printk("Kernel panic - not syncing: "); 59 early_printk("Kernel panic - not syncing: ");
60 early_vprintk(fmt, ap); 60 early_vprintk(fmt, ap);
diff --git a/arch/tile/kernel/hardwall.c b/arch/tile/kernel/hardwall.c
index 1e54a7843410..e910530436e6 100644
--- a/arch/tile/kernel/hardwall.c
+++ b/arch/tile/kernel/hardwall.c
@@ -151,12 +151,12 @@ enum direction_protect {
151 151
152static void enable_firewall_interrupts(void) 152static void enable_firewall_interrupts(void)
153{ 153{
154 raw_local_irq_unmask_now(INT_UDN_FIREWALL); 154 arch_local_irq_unmask_now(INT_UDN_FIREWALL);
155} 155}
156 156
157static void disable_firewall_interrupts(void) 157static void disable_firewall_interrupts(void)
158{ 158{
159 raw_local_irq_mask_now(INT_UDN_FIREWALL); 159 arch_local_irq_mask_now(INT_UDN_FIREWALL);
160} 160}
161 161
162/* Set up hardwall on this cpu based on the passed hardwall_info. */ 162/* Set up hardwall on this cpu based on the passed hardwall_info. */
@@ -768,13 +768,13 @@ static int hardwall_release(struct inode *inode, struct file *file)
768} 768}
769 769
770static const struct file_operations dev_hardwall_fops = { 770static const struct file_operations dev_hardwall_fops = {
771 .open = nonseekable_open,
771 .unlocked_ioctl = hardwall_ioctl, 772 .unlocked_ioctl = hardwall_ioctl,
772#ifdef CONFIG_COMPAT 773#ifdef CONFIG_COMPAT
773 .compat_ioctl = hardwall_compat_ioctl, 774 .compat_ioctl = hardwall_compat_ioctl,
774#endif 775#endif
775 .flush = hardwall_flush, 776 .flush = hardwall_flush,
776 .release = hardwall_release, 777 .release = hardwall_release,
777 .llseek = noop_llseek,
778}; 778};
779 779
780static struct cdev hardwall_dev; 780static struct cdev hardwall_dev;
diff --git a/arch/tile/kernel/irq.c b/arch/tile/kernel/irq.c
index e63917687e99..128805ef8f2c 100644
--- a/arch/tile/kernel/irq.c
+++ b/arch/tile/kernel/irq.c
@@ -26,7 +26,7 @@
26#define IS_HW_CLEARED 1 26#define IS_HW_CLEARED 1
27 27
28/* 28/*
29 * The set of interrupts we enable for raw_local_irq_enable(). 29 * The set of interrupts we enable for arch_local_irq_enable().
30 * This is initialized to have just a single interrupt that the kernel 30 * This is initialized to have just a single interrupt that the kernel
31 * doesn't actually use as a sentinel. During kernel init, 31 * doesn't actually use as a sentinel. During kernel init,
32 * interrupts are added as the kernel gets prepared to support them. 32 * interrupts are added as the kernel gets prepared to support them.
@@ -225,7 +225,7 @@ void __cpuinit setup_irq_regs(void)
225 /* Enable interrupt delivery. */ 225 /* Enable interrupt delivery. */
226 unmask_irqs(~0UL); 226 unmask_irqs(~0UL);
227#if CHIP_HAS_IPI() 227#if CHIP_HAS_IPI()
228 raw_local_irq_unmask(INT_IPI_K); 228 arch_local_irq_unmask(INT_IPI_K);
229#endif 229#endif
230} 230}
231 231
diff --git a/arch/tile/kernel/machine_kexec.c b/arch/tile/kernel/machine_kexec.c
index ba7a265d6179..0d8b9e933487 100644
--- a/arch/tile/kernel/machine_kexec.c
+++ b/arch/tile/kernel/machine_kexec.c
@@ -182,13 +182,13 @@ static void kexec_find_and_set_command_line(struct kimage *image)
182 182
183 if ((entry & IND_SOURCE)) { 183 if ((entry & IND_SOURCE)) {
184 void *va = 184 void *va =
185 kmap_atomic_pfn(entry >> PAGE_SHIFT, KM_USER0); 185 kmap_atomic_pfn(entry >> PAGE_SHIFT);
186 r = kexec_bn2cl(va); 186 r = kexec_bn2cl(va);
187 if (r) { 187 if (r) {
188 command_line = r; 188 command_line = r;
189 break; 189 break;
190 } 190 }
191 kunmap_atomic(va, KM_USER0); 191 kunmap_atomic(va);
192 } 192 }
193 } 193 }
194 194
@@ -198,7 +198,7 @@ static void kexec_find_and_set_command_line(struct kimage *image)
198 198
199 hverr = hv_set_command_line( 199 hverr = hv_set_command_line(
200 (HV_VirtAddr) command_line, strlen(command_line)); 200 (HV_VirtAddr) command_line, strlen(command_line));
201 kunmap_atomic(command_line, KM_USER0); 201 kunmap_atomic(command_line);
202 } else { 202 } else {
203 pr_info("%s: no command line found; making empty\n", 203 pr_info("%s: no command line found; making empty\n",
204 __func__); 204 __func__);
diff --git a/arch/tile/kernel/messaging.c b/arch/tile/kernel/messaging.c
index 997e3933f726..0858ee6b520f 100644
--- a/arch/tile/kernel/messaging.c
+++ b/arch/tile/kernel/messaging.c
@@ -34,7 +34,7 @@ void __cpuinit init_messaging(void)
34 panic("hv_register_message_state: error %d", rc); 34 panic("hv_register_message_state: error %d", rc);
35 35
36 /* Make sure downcall interrupts will be enabled. */ 36 /* Make sure downcall interrupts will be enabled. */
37 raw_local_irq_unmask(INT_INTCTRL_K); 37 arch_local_irq_unmask(INT_INTCTRL_K);
38} 38}
39 39
40void hv_message_intr(struct pt_regs *regs, int intnum) 40void hv_message_intr(struct pt_regs *regs, int intnum)
diff --git a/arch/tile/kernel/ptrace.c b/arch/tile/kernel/ptrace.c
index 9cd29884c09f..e92e40527d6d 100644
--- a/arch/tile/kernel/ptrace.c
+++ b/arch/tile/kernel/ptrace.c
@@ -50,10 +50,10 @@ long arch_ptrace(struct task_struct *child, long request,
50{ 50{
51 unsigned long __user *datap = (long __user __force *)data; 51 unsigned long __user *datap = (long __user __force *)data;
52 unsigned long tmp; 52 unsigned long tmp;
53 int i;
54 long ret = -EIO; 53 long ret = -EIO;
55 unsigned long *childregs;
56 char *childreg; 54 char *childreg;
55 struct pt_regs copyregs;
56 int ex1_offset;
57 57
58 switch (request) { 58 switch (request) {
59 59
@@ -80,6 +80,16 @@ long arch_ptrace(struct task_struct *child, long request,
80 if (addr >= PTREGS_SIZE) 80 if (addr >= PTREGS_SIZE)
81 break; 81 break;
82 childreg = (char *)task_pt_regs(child) + addr; 82 childreg = (char *)task_pt_regs(child) + addr;
83
84 /* Guard against overwrites of the privilege level. */
85 ex1_offset = PTREGS_OFFSET_EX1;
86#if defined(CONFIG_COMPAT) && defined(__BIG_ENDIAN)
87 if (is_compat_task()) /* point at low word */
88 ex1_offset += sizeof(compat_long_t);
89#endif
90 if (addr == ex1_offset)
91 data = PL_ICS_EX1(USER_PL, EX1_ICS(data));
92
83#ifdef CONFIG_COMPAT 93#ifdef CONFIG_COMPAT
84 if (is_compat_task()) { 94 if (is_compat_task()) {
85 if (addr & (sizeof(compat_long_t)-1)) 95 if (addr & (sizeof(compat_long_t)-1))
@@ -96,26 +106,19 @@ long arch_ptrace(struct task_struct *child, long request,
96 break; 106 break;
97 107
98 case PTRACE_GETREGS: /* Get all registers from the child. */ 108 case PTRACE_GETREGS: /* Get all registers from the child. */
99 if (!access_ok(VERIFY_WRITE, datap, PTREGS_SIZE)) 109 if (copy_to_user(datap, task_pt_regs(child),
100 break; 110 sizeof(struct pt_regs)) == 0) {
101 childregs = (long *)task_pt_regs(child); 111 ret = 0;
102 for (i = 0; i < sizeof(struct pt_regs)/sizeof(unsigned long);
103 ++i) {
104 ret = __put_user(childregs[i], &datap[i]);
105 if (ret != 0)
106 break;
107 } 112 }
108 break; 113 break;
109 114
110 case PTRACE_SETREGS: /* Set all registers in the child. */ 115 case PTRACE_SETREGS: /* Set all registers in the child. */
111 if (!access_ok(VERIFY_READ, datap, PTREGS_SIZE)) 116 if (copy_from_user(&copyregs, datap,
112 break; 117 sizeof(struct pt_regs)) == 0) {
113 childregs = (long *)task_pt_regs(child); 118 copyregs.ex1 =
114 for (i = 0; i < sizeof(struct pt_regs)/sizeof(unsigned long); 119 PL_ICS_EX1(USER_PL, EX1_ICS(copyregs.ex1));
115 ++i) { 120 *task_pt_regs(child) = copyregs;
116 ret = __get_user(childregs[i], &datap[i]); 121 ret = 0;
117 if (ret != 0)
118 break;
119 } 122 }
120 break; 123 break;
121 124
diff --git a/arch/tile/kernel/reboot.c b/arch/tile/kernel/reboot.c
index acd86d20beba..baa3d905fee2 100644
--- a/arch/tile/kernel/reboot.c
+++ b/arch/tile/kernel/reboot.c
@@ -27,7 +27,7 @@
27void machine_halt(void) 27void machine_halt(void)
28{ 28{
29 warn_early_printk(); 29 warn_early_printk();
30 raw_local_irq_disable_all(); 30 arch_local_irq_disable_all();
31 smp_send_stop(); 31 smp_send_stop();
32 hv_halt(); 32 hv_halt();
33} 33}
@@ -35,14 +35,14 @@ void machine_halt(void)
35void machine_power_off(void) 35void machine_power_off(void)
36{ 36{
37 warn_early_printk(); 37 warn_early_printk();
38 raw_local_irq_disable_all(); 38 arch_local_irq_disable_all();
39 smp_send_stop(); 39 smp_send_stop();
40 hv_power_off(); 40 hv_power_off();
41} 41}
42 42
43void machine_restart(char *cmd) 43void machine_restart(char *cmd)
44{ 44{
45 raw_local_irq_disable_all(); 45 arch_local_irq_disable_all();
46 smp_send_stop(); 46 smp_send_stop();
47 hv_restart((HV_VirtAddr) "vmlinux", (HV_VirtAddr) cmd); 47 hv_restart((HV_VirtAddr) "vmlinux", (HV_VirtAddr) cmd);
48} 48}
diff --git a/arch/tile/kernel/setup.c b/arch/tile/kernel/setup.c
index ae51cad12da0..fb0b3cbeae14 100644
--- a/arch/tile/kernel/setup.c
+++ b/arch/tile/kernel/setup.c
@@ -868,14 +868,14 @@ void __cpuinit setup_cpu(int boot)
868 868
869 /* Allow asynchronous TLB interrupts. */ 869 /* Allow asynchronous TLB interrupts. */
870#if CHIP_HAS_TILE_DMA() 870#if CHIP_HAS_TILE_DMA()
871 raw_local_irq_unmask(INT_DMATLB_MISS); 871 arch_local_irq_unmask(INT_DMATLB_MISS);
872 raw_local_irq_unmask(INT_DMATLB_ACCESS); 872 arch_local_irq_unmask(INT_DMATLB_ACCESS);
873#endif 873#endif
874#if CHIP_HAS_SN_PROC() 874#if CHIP_HAS_SN_PROC()
875 raw_local_irq_unmask(INT_SNITLB_MISS); 875 arch_local_irq_unmask(INT_SNITLB_MISS);
876#endif 876#endif
877#ifdef __tilegx__ 877#ifdef __tilegx__
878 raw_local_irq_unmask(INT_SINGLE_STEP_K); 878 arch_local_irq_unmask(INT_SINGLE_STEP_K);
879#endif 879#endif
880 880
881 /* 881 /*
diff --git a/arch/tile/kernel/signal.c b/arch/tile/kernel/signal.c
index fb28e85ae3ae..687719d4abd1 100644
--- a/arch/tile/kernel/signal.c
+++ b/arch/tile/kernel/signal.c
@@ -71,6 +71,9 @@ int restore_sigcontext(struct pt_regs *regs,
71 for (i = 0; i < sizeof(struct pt_regs)/sizeof(long); ++i) 71 for (i = 0; i < sizeof(struct pt_regs)/sizeof(long); ++i)
72 err |= __get_user(regs->regs[i], &sc->gregs[i]); 72 err |= __get_user(regs->regs[i], &sc->gregs[i]);
73 73
74 /* Ensure that the PL is always set to USER_PL. */
75 regs->ex1 = PL_ICS_EX1(USER_PL, EX1_ICS(regs->ex1));
76
74 regs->faultnum = INT_SWINT_1_SIGRETURN; 77 regs->faultnum = INT_SWINT_1_SIGRETURN;
75 78
76 err |= __get_user(*pr0, &sc->gregs[0]); 79 err |= __get_user(*pr0, &sc->gregs[0]);
@@ -330,7 +333,7 @@ void do_signal(struct pt_regs *regs)
330 current_thread_info()->status &= ~TS_RESTORE_SIGMASK; 333 current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
331 } 334 }
332 335
333 return; 336 goto done;
334 } 337 }
335 338
336 /* Did we come from a system call? */ 339 /* Did we come from a system call? */
@@ -358,4 +361,8 @@ void do_signal(struct pt_regs *regs)
358 current_thread_info()->status &= ~TS_RESTORE_SIGMASK; 361 current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
359 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL); 362 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
360 } 363 }
364
365done:
366 /* Avoid double syscall restart if there are nested signals. */
367 regs->faultnum = INT_SWINT_1_SIGRETURN;
361} 368}
diff --git a/arch/tile/kernel/smp.c b/arch/tile/kernel/smp.c
index 75255d90aff3..9575b37a8b75 100644
--- a/arch/tile/kernel/smp.c
+++ b/arch/tile/kernel/smp.c
@@ -115,7 +115,7 @@ static void smp_start_cpu_interrupt(void)
115static void smp_stop_cpu_interrupt(void) 115static void smp_stop_cpu_interrupt(void)
116{ 116{
117 set_cpu_online(smp_processor_id(), 0); 117 set_cpu_online(smp_processor_id(), 0);
118 raw_local_irq_disable_all(); 118 arch_local_irq_disable_all();
119 for (;;) 119 for (;;)
120 asm("nap"); 120 asm("nap");
121} 121}
diff --git a/arch/tile/kernel/time.c b/arch/tile/kernel/time.c
index 6bed820e1421..f2e156e44692 100644
--- a/arch/tile/kernel/time.c
+++ b/arch/tile/kernel/time.c
@@ -132,7 +132,7 @@ static int tile_timer_set_next_event(unsigned long ticks,
132{ 132{
133 BUG_ON(ticks > MAX_TICK); 133 BUG_ON(ticks > MAX_TICK);
134 __insn_mtspr(SPR_TILE_TIMER_CONTROL, ticks); 134 __insn_mtspr(SPR_TILE_TIMER_CONTROL, ticks);
135 raw_local_irq_unmask_now(INT_TILE_TIMER); 135 arch_local_irq_unmask_now(INT_TILE_TIMER);
136 return 0; 136 return 0;
137} 137}
138 138
@@ -143,7 +143,7 @@ static int tile_timer_set_next_event(unsigned long ticks,
143static void tile_timer_set_mode(enum clock_event_mode mode, 143static void tile_timer_set_mode(enum clock_event_mode mode,
144 struct clock_event_device *evt) 144 struct clock_event_device *evt)
145{ 145{
146 raw_local_irq_mask_now(INT_TILE_TIMER); 146 arch_local_irq_mask_now(INT_TILE_TIMER);
147} 147}
148 148
149/* 149/*
@@ -172,7 +172,7 @@ void __cpuinit setup_tile_timer(void)
172 evt->cpumask = cpumask_of(smp_processor_id()); 172 evt->cpumask = cpumask_of(smp_processor_id());
173 173
174 /* Start out with timer not firing. */ 174 /* Start out with timer not firing. */
175 raw_local_irq_mask_now(INT_TILE_TIMER); 175 arch_local_irq_mask_now(INT_TILE_TIMER);
176 176
177 /* Register tile timer. */ 177 /* Register tile timer. */
178 clockevents_register_device(evt); 178 clockevents_register_device(evt);
@@ -188,7 +188,7 @@ void do_timer_interrupt(struct pt_regs *regs, int fault_num)
188 * Mask the timer interrupt here, since we are a oneshot timer 188 * Mask the timer interrupt here, since we are a oneshot timer
189 * and there are now by definition no events pending. 189 * and there are now by definition no events pending.
190 */ 190 */
191 raw_local_irq_mask(INT_TILE_TIMER); 191 arch_local_irq_mask(INT_TILE_TIMER);
192 192
193 /* Track time spent here in an interrupt context */ 193 /* Track time spent here in an interrupt context */
194 irq_enter(); 194 irq_enter();
diff --git a/arch/tile/lib/memcpy_tile64.c b/arch/tile/lib/memcpy_tile64.c
index dfedea7b266b..f7d4a6ad61e8 100644
--- a/arch/tile/lib/memcpy_tile64.c
+++ b/arch/tile/lib/memcpy_tile64.c
@@ -54,7 +54,7 @@ typedef unsigned long (*memcpy_t)(void *, const void *, unsigned long);
54 * we must run with interrupts disabled to avoid the risk of some 54 * we must run with interrupts disabled to avoid the risk of some
55 * other code seeing the incoherent data in our cache. (Recall that 55 * other code seeing the incoherent data in our cache. (Recall that
56 * our cache is indexed by PA, so even if the other code doesn't use 56 * our cache is indexed by PA, so even if the other code doesn't use
57 * our KM_MEMCPY virtual addresses, they'll still hit in cache using 57 * our kmap_atomic virtual addresses, they'll still hit in cache using
58 * the normal VAs that aren't supposed to hit in cache.) 58 * the normal VAs that aren't supposed to hit in cache.)
59 */ 59 */
60static void memcpy_multicache(void *dest, const void *source, 60static void memcpy_multicache(void *dest, const void *source,
@@ -64,6 +64,7 @@ static void memcpy_multicache(void *dest, const void *source,
64 unsigned long flags, newsrc, newdst; 64 unsigned long flags, newsrc, newdst;
65 pmd_t *pmdp; 65 pmd_t *pmdp;
66 pte_t *ptep; 66 pte_t *ptep;
67 int type0, type1;
67 int cpu = get_cpu(); 68 int cpu = get_cpu();
68 69
69 /* 70 /*
@@ -77,7 +78,8 @@ static void memcpy_multicache(void *dest, const void *source,
77 sim_allow_multiple_caching(1); 78 sim_allow_multiple_caching(1);
78 79
79 /* Set up the new dest mapping */ 80 /* Set up the new dest mapping */
80 idx = FIX_KMAP_BEGIN + (KM_TYPE_NR * cpu) + KM_MEMCPY0; 81 type0 = kmap_atomic_idx_push();
82 idx = FIX_KMAP_BEGIN + (KM_TYPE_NR * cpu) + type0;
81 newdst = __fix_to_virt(idx) + ((unsigned long)dest & (PAGE_SIZE-1)); 83 newdst = __fix_to_virt(idx) + ((unsigned long)dest & (PAGE_SIZE-1));
82 pmdp = pmd_offset(pud_offset(pgd_offset_k(newdst), newdst), newdst); 84 pmdp = pmd_offset(pud_offset(pgd_offset_k(newdst), newdst), newdst);
83 ptep = pte_offset_kernel(pmdp, newdst); 85 ptep = pte_offset_kernel(pmdp, newdst);
@@ -87,7 +89,8 @@ static void memcpy_multicache(void *dest, const void *source,
87 } 89 }
88 90
89 /* Set up the new source mapping */ 91 /* Set up the new source mapping */
90 idx += (KM_MEMCPY0 - KM_MEMCPY1); 92 type1 = kmap_atomic_idx_push();
93 idx += (type0 - type1);
91 src_pte = hv_pte_set_nc(src_pte); 94 src_pte = hv_pte_set_nc(src_pte);
92 src_pte = hv_pte_clear_writable(src_pte); /* be paranoid */ 95 src_pte = hv_pte_clear_writable(src_pte); /* be paranoid */
93 newsrc = __fix_to_virt(idx) + ((unsigned long)source & (PAGE_SIZE-1)); 96 newsrc = __fix_to_virt(idx) + ((unsigned long)source & (PAGE_SIZE-1));
@@ -119,6 +122,8 @@ static void memcpy_multicache(void *dest, const void *source,
119 * We're done: notify the simulator that all is back to normal, 122 * We're done: notify the simulator that all is back to normal,
120 * and re-enable interrupts and pre-emption. 123 * and re-enable interrupts and pre-emption.
121 */ 124 */
125 kmap_atomic_idx_pop();
126 kmap_atomic_idx_pop();
122 sim_allow_multiple_caching(0); 127 sim_allow_multiple_caching(0);
123 local_irq_restore(flags); 128 local_irq_restore(flags);
124 put_cpu(); 129 put_cpu();
diff --git a/arch/tile/mm/highmem.c b/arch/tile/mm/highmem.c
index abb57331cf6e..31dbbd9afe47 100644
--- a/arch/tile/mm/highmem.c
+++ b/arch/tile/mm/highmem.c
@@ -227,7 +227,7 @@ EXPORT_SYMBOL(kmap_atomic_prot);
227void *__kmap_atomic(struct page *page) 227void *__kmap_atomic(struct page *page)
228{ 228{
229 /* PAGE_NONE is a magic value that tells us to check immutability. */ 229 /* PAGE_NONE is a magic value that tells us to check immutability. */
230 return kmap_atomic_prot(page, type, PAGE_NONE); 230 return kmap_atomic_prot(page, PAGE_NONE);
231} 231}
232EXPORT_SYMBOL(__kmap_atomic); 232EXPORT_SYMBOL(__kmap_atomic);
233 233
diff --git a/arch/tile/mm/init.c b/arch/tile/mm/init.c
index 78e1982cb6c9..0b9ce69b0ee5 100644
--- a/arch/tile/mm/init.c
+++ b/arch/tile/mm/init.c
@@ -988,8 +988,12 @@ static long __write_once initfree = 1;
988/* Select whether to free (1) or mark unusable (0) the __init pages. */ 988/* Select whether to free (1) or mark unusable (0) the __init pages. */
989static int __init set_initfree(char *str) 989static int __init set_initfree(char *str)
990{ 990{
991 strict_strtol(str, 0, &initfree); 991 long val;
992 pr_info("initfree: %s free init pages\n", initfree ? "will" : "won't"); 992 if (strict_strtol(str, 0, &val)) {
993 initfree = val;
994 pr_info("initfree: %s free init pages\n",
995 initfree ? "will" : "won't");
996 }
993 return 1; 997 return 1;
994} 998}
995__setup("initfree=", set_initfree); 999__setup("initfree=", set_initfree);
diff --git a/arch/tile/mm/pgtable.c b/arch/tile/mm/pgtable.c
index 335c24621c41..1f5430c53d0d 100644
--- a/arch/tile/mm/pgtable.c
+++ b/arch/tile/mm/pgtable.c
@@ -134,9 +134,9 @@ void __set_fixmap(enum fixed_addresses idx, unsigned long phys, pgprot_t flags)
134} 134}
135 135
136#if defined(CONFIG_HIGHPTE) 136#if defined(CONFIG_HIGHPTE)
137pte_t *_pte_offset_map(pmd_t *dir, unsigned long address, enum km_type type) 137pte_t *_pte_offset_map(pmd_t *dir, unsigned long address)
138{ 138{
139 pte_t *pte = kmap_atomic(pmd_page(*dir), type) + 139 pte_t *pte = kmap_atomic(pmd_page(*dir)) +
140 (pmd_ptfn(*dir) << HV_LOG2_PAGE_TABLE_ALIGN) & ~PAGE_MASK; 140 (pmd_ptfn(*dir) << HV_LOG2_PAGE_TABLE_ALIGN) & ~PAGE_MASK;
141 return &pte[pte_index(address)]; 141 return &pte[pte_index(address)];
142} 142}
diff --git a/arch/um/include/asm/ptrace-generic.h b/arch/um/include/asm/ptrace-generic.h
index 2cd899f75a3c..b7c5bab9bd77 100644
--- a/arch/um/include/asm/ptrace-generic.h
+++ b/arch/um/include/asm/ptrace-generic.h
@@ -38,8 +38,8 @@ struct pt_regs {
38 38
39struct task_struct; 39struct task_struct;
40 40
41extern long subarch_ptrace(struct task_struct *child, long request, long addr, 41extern long subarch_ptrace(struct task_struct *child, long request,
42 long data); 42 unsigned long addr, unsigned long data);
43extern unsigned long getreg(struct task_struct *child, int regno); 43extern unsigned long getreg(struct task_struct *child, int regno);
44extern int putreg(struct task_struct *child, int regno, unsigned long value); 44extern int putreg(struct task_struct *child, int regno, unsigned long value);
45extern int get_fpregs(struct user_i387_struct __user *buf, 45extern int get_fpregs(struct user_i387_struct __user *buf,
diff --git a/arch/um/kernel/ptrace.c b/arch/um/kernel/ptrace.c
index a5e33f29bbeb..701b672c1122 100644
--- a/arch/um/kernel/ptrace.c
+++ b/arch/um/kernel/ptrace.c
@@ -122,7 +122,7 @@ long arch_ptrace(struct task_struct *child, long request,
122 break; 122 break;
123 123
124 case PTRACE_SET_THREAD_AREA: 124 case PTRACE_SET_THREAD_AREA:
125 ret = ptrace_set_thread_area(child, addr, datavp); 125 ret = ptrace_set_thread_area(child, addr, vp);
126 break; 126 break;
127 127
128 case PTRACE_FAULTINFO: { 128 case PTRACE_FAULTINFO: {
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 286de34b0ed6..f6ce0bda3b98 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -141,13 +141,13 @@ static inline void native_apic_msr_write(u32 reg, u32 v)
141 141
142static inline u32 native_apic_msr_read(u32 reg) 142static inline u32 native_apic_msr_read(u32 reg)
143{ 143{
144 u32 low, high; 144 u64 msr;
145 145
146 if (reg == APIC_DFR) 146 if (reg == APIC_DFR)
147 return -1; 147 return -1;
148 148
149 rdmsr(APIC_BASE_MSR + (reg >> 4), low, high); 149 rdmsrl(APIC_BASE_MSR + (reg >> 4), msr);
150 return low; 150 return (u32)msr;
151} 151}
152 152
153static inline void native_x2apic_wait_icr_idle(void) 153static inline void native_x2apic_wait_icr_idle(void)
@@ -181,12 +181,12 @@ extern void enable_x2apic(void);
181extern void x2apic_icr_write(u32 low, u32 id); 181extern void x2apic_icr_write(u32 low, u32 id);
182static inline int x2apic_enabled(void) 182static inline int x2apic_enabled(void)
183{ 183{
184 int msr, msr2; 184 u64 msr;
185 185
186 if (!cpu_has_x2apic) 186 if (!cpu_has_x2apic)
187 return 0; 187 return 0;
188 188
189 rdmsr(MSR_IA32_APICBASE, msr, msr2); 189 rdmsrl(MSR_IA32_APICBASE, msr);
190 if (msr & X2APIC_ENABLE) 190 if (msr & X2APIC_ENABLE)
191 return 1; 191 return 1;
192 return 0; 192 return 0;
diff --git a/arch/x86/include/asm/uv/uv_mmrs.h b/arch/x86/include/asm/uv/uv_mmrs.h
index b2f2d2e05cec..6d90adf4428a 100644
--- a/arch/x86/include/asm/uv/uv_mmrs.h
+++ b/arch/x86/include/asm/uv/uv_mmrs.h
@@ -806,6 +806,78 @@ union uvh_node_present_table_u {
806}; 806};
807 807
808/* ========================================================================= */ 808/* ========================================================================= */
809/* UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_0_MMR */
810/* ========================================================================= */
811#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_0_MMR 0x16000c8UL
812
813#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_0_MMR_BASE_SHFT 24
814#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_0_MMR_BASE_MASK 0x00000000ff000000UL
815#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_0_MMR_M_ALIAS_SHFT 48
816#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_0_MMR_M_ALIAS_MASK 0x001f000000000000UL
817#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_0_MMR_ENABLE_SHFT 63
818#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_0_MMR_ENABLE_MASK 0x8000000000000000UL
819
820union uvh_rh_gam_alias210_overlay_config_0_mmr_u {
821 unsigned long v;
822 struct uvh_rh_gam_alias210_overlay_config_0_mmr_s {
823 unsigned long rsvd_0_23: 24; /* */
824 unsigned long base : 8; /* RW */
825 unsigned long rsvd_32_47: 16; /* */
826 unsigned long m_alias : 5; /* RW */
827 unsigned long rsvd_53_62: 10; /* */
828 unsigned long enable : 1; /* RW */
829 } s;
830};
831
832/* ========================================================================= */
833/* UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_1_MMR */
834/* ========================================================================= */
835#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_1_MMR 0x16000d8UL
836
837#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_1_MMR_BASE_SHFT 24
838#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_1_MMR_BASE_MASK 0x00000000ff000000UL
839#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_1_MMR_M_ALIAS_SHFT 48
840#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_1_MMR_M_ALIAS_MASK 0x001f000000000000UL
841#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_1_MMR_ENABLE_SHFT 63
842#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_1_MMR_ENABLE_MASK 0x8000000000000000UL
843
844union uvh_rh_gam_alias210_overlay_config_1_mmr_u {
845 unsigned long v;
846 struct uvh_rh_gam_alias210_overlay_config_1_mmr_s {
847 unsigned long rsvd_0_23: 24; /* */
848 unsigned long base : 8; /* RW */
849 unsigned long rsvd_32_47: 16; /* */
850 unsigned long m_alias : 5; /* RW */
851 unsigned long rsvd_53_62: 10; /* */
852 unsigned long enable : 1; /* RW */
853 } s;
854};
855
856/* ========================================================================= */
857/* UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_2_MMR */
858/* ========================================================================= */
859#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_2_MMR 0x16000e8UL
860
861#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_2_MMR_BASE_SHFT 24
862#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_2_MMR_BASE_MASK 0x00000000ff000000UL
863#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_2_MMR_M_ALIAS_SHFT 48
864#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_2_MMR_M_ALIAS_MASK 0x001f000000000000UL
865#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_2_MMR_ENABLE_SHFT 63
866#define UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_2_MMR_ENABLE_MASK 0x8000000000000000UL
867
868union uvh_rh_gam_alias210_overlay_config_2_mmr_u {
869 unsigned long v;
870 struct uvh_rh_gam_alias210_overlay_config_2_mmr_s {
871 unsigned long rsvd_0_23: 24; /* */
872 unsigned long base : 8; /* RW */
873 unsigned long rsvd_32_47: 16; /* */
874 unsigned long m_alias : 5; /* RW */
875 unsigned long rsvd_53_62: 10; /* */
876 unsigned long enable : 1; /* RW */
877 } s;
878};
879
880/* ========================================================================= */
809/* UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR */ 881/* UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR */
810/* ========================================================================= */ 882/* ========================================================================= */
811#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR 0x16000d0UL 883#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR 0x16000d0UL
@@ -857,6 +929,29 @@ union uvh_rh_gam_alias210_redirect_config_2_mmr_u {
857}; 929};
858 930
859/* ========================================================================= */ 931/* ========================================================================= */
932/* UVH_RH_GAM_CONFIG_MMR */
933/* ========================================================================= */
934#define UVH_RH_GAM_CONFIG_MMR 0x1600000UL
935
936#define UVH_RH_GAM_CONFIG_MMR_M_SKT_SHFT 0
937#define UVH_RH_GAM_CONFIG_MMR_M_SKT_MASK 0x000000000000003fUL
938#define UVH_RH_GAM_CONFIG_MMR_N_SKT_SHFT 6
939#define UVH_RH_GAM_CONFIG_MMR_N_SKT_MASK 0x00000000000003c0UL
940#define UVH_RH_GAM_CONFIG_MMR_MMIOL_CFG_SHFT 12
941#define UVH_RH_GAM_CONFIG_MMR_MMIOL_CFG_MASK 0x0000000000001000UL
942
943union uvh_rh_gam_config_mmr_u {
944 unsigned long v;
945 struct uvh_rh_gam_config_mmr_s {
946 unsigned long m_skt : 6; /* RW */
947 unsigned long n_skt : 4; /* RW */
948 unsigned long rsvd_10_11: 2; /* */
949 unsigned long mmiol_cfg : 1; /* RW */
950 unsigned long rsvd_13_63: 51; /* */
951 } s;
952};
953
954/* ========================================================================= */
860/* UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR */ 955/* UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR */
861/* ========================================================================= */ 956/* ========================================================================= */
862#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR 0x1600010UL 957#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR 0x1600010UL
@@ -987,97 +1082,5 @@ union uvh_rtc1_int_config_u {
987 } s; 1082 } s;
988}; 1083};
989 1084
990/* ========================================================================= */
991/* UVH_SI_ADDR_MAP_CONFIG */
992/* ========================================================================= */
993#define UVH_SI_ADDR_MAP_CONFIG 0xc80000UL
994
995#define UVH_SI_ADDR_MAP_CONFIG_M_SKT_SHFT 0
996#define UVH_SI_ADDR_MAP_CONFIG_M_SKT_MASK 0x000000000000003fUL
997#define UVH_SI_ADDR_MAP_CONFIG_N_SKT_SHFT 8
998#define UVH_SI_ADDR_MAP_CONFIG_N_SKT_MASK 0x0000000000000f00UL
999
1000union uvh_si_addr_map_config_u {
1001 unsigned long v;
1002 struct uvh_si_addr_map_config_s {
1003 unsigned long m_skt : 6; /* RW */
1004 unsigned long rsvd_6_7: 2; /* */
1005 unsigned long n_skt : 4; /* RW */
1006 unsigned long rsvd_12_63: 52; /* */
1007 } s;
1008};
1009
1010/* ========================================================================= */
1011/* UVH_SI_ALIAS0_OVERLAY_CONFIG */
1012/* ========================================================================= */
1013#define UVH_SI_ALIAS0_OVERLAY_CONFIG 0xc80008UL
1014
1015#define UVH_SI_ALIAS0_OVERLAY_CONFIG_BASE_SHFT 24
1016#define UVH_SI_ALIAS0_OVERLAY_CONFIG_BASE_MASK 0x00000000ff000000UL
1017#define UVH_SI_ALIAS0_OVERLAY_CONFIG_M_ALIAS_SHFT 48
1018#define UVH_SI_ALIAS0_OVERLAY_CONFIG_M_ALIAS_MASK 0x001f000000000000UL
1019#define UVH_SI_ALIAS0_OVERLAY_CONFIG_ENABLE_SHFT 63
1020#define UVH_SI_ALIAS0_OVERLAY_CONFIG_ENABLE_MASK 0x8000000000000000UL
1021
1022union uvh_si_alias0_overlay_config_u {
1023 unsigned long v;
1024 struct uvh_si_alias0_overlay_config_s {
1025 unsigned long rsvd_0_23: 24; /* */
1026 unsigned long base : 8; /* RW */
1027 unsigned long rsvd_32_47: 16; /* */
1028 unsigned long m_alias : 5; /* RW */
1029 unsigned long rsvd_53_62: 10; /* */
1030 unsigned long enable : 1; /* RW */
1031 } s;
1032};
1033
1034/* ========================================================================= */
1035/* UVH_SI_ALIAS1_OVERLAY_CONFIG */
1036/* ========================================================================= */
1037#define UVH_SI_ALIAS1_OVERLAY_CONFIG 0xc80010UL
1038
1039#define UVH_SI_ALIAS1_OVERLAY_CONFIG_BASE_SHFT 24
1040#define UVH_SI_ALIAS1_OVERLAY_CONFIG_BASE_MASK 0x00000000ff000000UL
1041#define UVH_SI_ALIAS1_OVERLAY_CONFIG_M_ALIAS_SHFT 48
1042#define UVH_SI_ALIAS1_OVERLAY_CONFIG_M_ALIAS_MASK 0x001f000000000000UL
1043#define UVH_SI_ALIAS1_OVERLAY_CONFIG_ENABLE_SHFT 63
1044#define UVH_SI_ALIAS1_OVERLAY_CONFIG_ENABLE_MASK 0x8000000000000000UL
1045
1046union uvh_si_alias1_overlay_config_u {
1047 unsigned long v;
1048 struct uvh_si_alias1_overlay_config_s {
1049 unsigned long rsvd_0_23: 24; /* */
1050 unsigned long base : 8; /* RW */
1051 unsigned long rsvd_32_47: 16; /* */
1052 unsigned long m_alias : 5; /* RW */
1053 unsigned long rsvd_53_62: 10; /* */
1054 unsigned long enable : 1; /* RW */
1055 } s;
1056};
1057
1058/* ========================================================================= */
1059/* UVH_SI_ALIAS2_OVERLAY_CONFIG */
1060/* ========================================================================= */
1061#define UVH_SI_ALIAS2_OVERLAY_CONFIG 0xc80018UL
1062
1063#define UVH_SI_ALIAS2_OVERLAY_CONFIG_BASE_SHFT 24
1064#define UVH_SI_ALIAS2_OVERLAY_CONFIG_BASE_MASK 0x00000000ff000000UL
1065#define UVH_SI_ALIAS2_OVERLAY_CONFIG_M_ALIAS_SHFT 48
1066#define UVH_SI_ALIAS2_OVERLAY_CONFIG_M_ALIAS_MASK 0x001f000000000000UL
1067#define UVH_SI_ALIAS2_OVERLAY_CONFIG_ENABLE_SHFT 63
1068#define UVH_SI_ALIAS2_OVERLAY_CONFIG_ENABLE_MASK 0x8000000000000000UL
1069
1070union uvh_si_alias2_overlay_config_u {
1071 unsigned long v;
1072 struct uvh_si_alias2_overlay_config_s {
1073 unsigned long rsvd_0_23: 24; /* */
1074 unsigned long base : 8; /* RW */
1075 unsigned long rsvd_32_47: 16; /* */
1076 unsigned long m_alias : 5; /* RW */
1077 unsigned long rsvd_53_62: 10; /* */
1078 unsigned long enable : 1; /* RW */
1079 } s;
1080};
1081
1082 1085
1083#endif /* _ASM_X86_UV_UV_MMRS_H */ 1086#endif /* __ASM_UV_MMRS_X86_H__ */
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 850657d1b0ed..3f838d537392 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -52,7 +52,6 @@
52#include <asm/mce.h> 52#include <asm/mce.h>
53#include <asm/kvm_para.h> 53#include <asm/kvm_para.h>
54#include <asm/tsc.h> 54#include <asm/tsc.h>
55#include <asm/atomic.h>
56 55
57unsigned int num_processors; 56unsigned int num_processors;
58 57
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index ed4118de249e..194539aea175 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -379,14 +379,14 @@ struct redir_addr {
379#define DEST_SHIFT UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR_DEST_BASE_SHFT 379#define DEST_SHIFT UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR_DEST_BASE_SHFT
380 380
381static __initdata struct redir_addr redir_addrs[] = { 381static __initdata struct redir_addr redir_addrs[] = {
382 {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR, UVH_SI_ALIAS0_OVERLAY_CONFIG}, 382 {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR, UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_0_MMR},
383 {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR, UVH_SI_ALIAS1_OVERLAY_CONFIG}, 383 {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR, UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_1_MMR},
384 {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR, UVH_SI_ALIAS2_OVERLAY_CONFIG}, 384 {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR, UVH_RH_GAM_ALIAS210_OVERLAY_CONFIG_2_MMR},
385}; 385};
386 386
387static __init void get_lowmem_redirect(unsigned long *base, unsigned long *size) 387static __init void get_lowmem_redirect(unsigned long *base, unsigned long *size)
388{ 388{
389 union uvh_si_alias0_overlay_config_u alias; 389 union uvh_rh_gam_alias210_overlay_config_2_mmr_u alias;
390 union uvh_rh_gam_alias210_redirect_config_2_mmr_u redirect; 390 union uvh_rh_gam_alias210_redirect_config_2_mmr_u redirect;
391 int i; 391 int i;
392 392
@@ -660,7 +660,7 @@ void uv_nmi_init(void)
660 660
661void __init uv_system_init(void) 661void __init uv_system_init(void)
662{ 662{
663 union uvh_si_addr_map_config_u m_n_config; 663 union uvh_rh_gam_config_mmr_u m_n_config;
664 union uvh_node_id_u node_id; 664 union uvh_node_id_u node_id;
665 unsigned long gnode_upper, lowmem_redir_base, lowmem_redir_size; 665 unsigned long gnode_upper, lowmem_redir_base, lowmem_redir_size;
666 int bytes, nid, cpu, lcpu, pnode, blade, i, j, m_val, n_val; 666 int bytes, nid, cpu, lcpu, pnode, blade, i, j, m_val, n_val;
@@ -670,7 +670,7 @@ void __init uv_system_init(void)
670 670
671 map_low_mmrs(); 671 map_low_mmrs();
672 672
673 m_n_config.v = uv_read_local_mmr(UVH_SI_ADDR_MAP_CONFIG); 673 m_n_config.v = uv_read_local_mmr(UVH_RH_GAM_CONFIG_MMR );
674 m_val = m_n_config.s.m_skt; 674 m_val = m_n_config.s.m_skt;
675 n_val = m_n_config.s.n_skt; 675 n_val = m_n_config.s.n_skt;
676 mmr_base = 676 mmr_base =
diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c
index 46d58448c3af..e421b8cd6944 100644
--- a/arch/x86/kernel/cpu/perf_event_amd.c
+++ b/arch/x86/kernel/cpu/perf_event_amd.c
@@ -280,11 +280,11 @@ static struct amd_nb *amd_alloc_nb(int cpu, int nb_id)
280 struct amd_nb *nb; 280 struct amd_nb *nb;
281 int i; 281 int i;
282 282
283 nb = kmalloc(sizeof(struct amd_nb), GFP_KERNEL); 283 nb = kmalloc_node(sizeof(struct amd_nb), GFP_KERNEL | __GFP_ZERO,
284 cpu_to_node(cpu));
284 if (!nb) 285 if (!nb)
285 return NULL; 286 return NULL;
286 287
287 memset(nb, 0, sizeof(*nb));
288 nb->nb_id = nb_id; 288 nb->nb_id = nb_id;
289 289
290 /* 290 /*
diff --git a/arch/x86/kernel/microcode_amd.c b/arch/x86/kernel/microcode_amd.c
index e1af7c055c7d..ce0cb4721c9a 100644
--- a/arch/x86/kernel/microcode_amd.c
+++ b/arch/x86/kernel/microcode_amd.c
@@ -212,7 +212,7 @@ static int install_equiv_cpu_table(const u8 *buf)
212 return 0; 212 return 0;
213 } 213 }
214 214
215 equiv_cpu_table = (struct equiv_cpu_entry *) vmalloc(size); 215 equiv_cpu_table = vmalloc(size);
216 if (!equiv_cpu_table) { 216 if (!equiv_cpu_table) {
217 pr_err("failed to allocate equivalent CPU table\n"); 217 pr_err("failed to allocate equivalent CPU table\n");
218 return 0; 218 return 0;
diff --git a/arch/x86/kernel/mmconf-fam10h_64.c b/arch/x86/kernel/mmconf-fam10h_64.c
index 71825806cd44..6da143c2a6b8 100644
--- a/arch/x86/kernel/mmconf-fam10h_64.c
+++ b/arch/x86/kernel/mmconf-fam10h_64.c
@@ -217,13 +217,13 @@ void __cpuinit fam10h_check_enable_mmcfg(void)
217 wrmsrl(address, val); 217 wrmsrl(address, val);
218} 218}
219 219
220static int __devinit set_check_enable_amd_mmconf(const struct dmi_system_id *d) 220static int __init set_check_enable_amd_mmconf(const struct dmi_system_id *d)
221{ 221{
222 pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF; 222 pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF;
223 return 0; 223 return 0;
224} 224}
225 225
226static const struct dmi_system_id __cpuinitconst mmconf_dmi_table[] = { 226static const struct dmi_system_id __initconst mmconf_dmi_table[] = {
227 { 227 {
228 .callback = set_check_enable_amd_mmconf, 228 .callback = set_check_enable_amd_mmconf,
229 .ident = "Sun Microsystems Machine", 229 .ident = "Sun Microsystems Machine",
@@ -234,7 +234,8 @@ static const struct dmi_system_id __cpuinitconst mmconf_dmi_table[] = {
234 {} 234 {}
235}; 235};
236 236
237void __cpuinit check_enable_amd_mmconf_dmi(void) 237/* Called from a __cpuinit function, but only on the BSP. */
238void __ref check_enable_amd_mmconf_dmi(void)
238{ 239{
239 dmi_check_system(mmconf_dmi_table); 240 dmi_check_system(mmconf_dmi_table);
240} 241}
diff --git a/arch/x86/kernel/pvclock.c b/arch/x86/kernel/pvclock.c
index bab3b9e6f66d..008b91eefa18 100644
--- a/arch/x86/kernel/pvclock.c
+++ b/arch/x86/kernel/pvclock.c
@@ -41,44 +41,6 @@ void pvclock_set_flags(u8 flags)
41 valid_flags = flags; 41 valid_flags = flags;
42} 42}
43 43
44/*
45 * Scale a 64-bit delta by scaling and multiplying by a 32-bit fraction,
46 * yielding a 64-bit result.
47 */
48static inline u64 scale_delta(u64 delta, u32 mul_frac, int shift)
49{
50 u64 product;
51#ifdef __i386__
52 u32 tmp1, tmp2;
53#endif
54
55 if (shift < 0)
56 delta >>= -shift;
57 else
58 delta <<= shift;
59
60#ifdef __i386__
61 __asm__ (
62 "mul %5 ; "
63 "mov %4,%%eax ; "
64 "mov %%edx,%4 ; "
65 "mul %5 ; "
66 "xor %5,%5 ; "
67 "add %4,%%eax ; "
68 "adc %5,%%edx ; "
69 : "=A" (product), "=r" (tmp1), "=r" (tmp2)
70 : "a" ((u32)delta), "1" ((u32)(delta >> 32)), "2" (mul_frac) );
71#elif defined(__x86_64__)
72 __asm__ (
73 "mul %%rdx ; shrd $32,%%rdx,%%rax"
74 : "=a" (product) : "0" (delta), "d" ((u64)mul_frac) );
75#else
76#error implement me!
77#endif
78
79 return product;
80}
81
82static u64 pvclock_get_nsec_offset(struct pvclock_shadow_time *shadow) 44static u64 pvclock_get_nsec_offset(struct pvclock_shadow_time *shadow)
83{ 45{
84 u64 delta = native_read_tsc() - shadow->tsc_timestamp; 46 u64 delta = native_read_tsc() - shadow->tsc_timestamp;
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index 908ea5464a51..fb8b376bf28c 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -720,7 +720,7 @@ static void rmap_remove(struct kvm *kvm, u64 *spte)
720 } 720 }
721} 721}
722 722
723static void set_spte_track_bits(u64 *sptep, u64 new_spte) 723static int set_spte_track_bits(u64 *sptep, u64 new_spte)
724{ 724{
725 pfn_t pfn; 725 pfn_t pfn;
726 u64 old_spte = *sptep; 726 u64 old_spte = *sptep;
@@ -731,19 +731,20 @@ static void set_spte_track_bits(u64 *sptep, u64 new_spte)
731 old_spte = __xchg_spte(sptep, new_spte); 731 old_spte = __xchg_spte(sptep, new_spte);
732 732
733 if (!is_rmap_spte(old_spte)) 733 if (!is_rmap_spte(old_spte))
734 return; 734 return 0;
735 735
736 pfn = spte_to_pfn(old_spte); 736 pfn = spte_to_pfn(old_spte);
737 if (!shadow_accessed_mask || old_spte & shadow_accessed_mask) 737 if (!shadow_accessed_mask || old_spte & shadow_accessed_mask)
738 kvm_set_pfn_accessed(pfn); 738 kvm_set_pfn_accessed(pfn);
739 if (!shadow_dirty_mask || (old_spte & shadow_dirty_mask)) 739 if (!shadow_dirty_mask || (old_spte & shadow_dirty_mask))
740 kvm_set_pfn_dirty(pfn); 740 kvm_set_pfn_dirty(pfn);
741 return 1;
741} 742}
742 743
743static void drop_spte(struct kvm *kvm, u64 *sptep, u64 new_spte) 744static void drop_spte(struct kvm *kvm, u64 *sptep, u64 new_spte)
744{ 745{
745 set_spte_track_bits(sptep, new_spte); 746 if (set_spte_track_bits(sptep, new_spte))
746 rmap_remove(kvm, sptep); 747 rmap_remove(kvm, sptep);
747} 748}
748 749
749static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte) 750static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 2288ad829b32..cdac9e592aa5 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -2560,6 +2560,7 @@ static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2560 !kvm_exception_is_soft(vcpu->arch.exception.nr); 2560 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2561 events->exception.nr = vcpu->arch.exception.nr; 2561 events->exception.nr = vcpu->arch.exception.nr;
2562 events->exception.has_error_code = vcpu->arch.exception.has_error_code; 2562 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2563 events->exception.pad = 0;
2563 events->exception.error_code = vcpu->arch.exception.error_code; 2564 events->exception.error_code = vcpu->arch.exception.error_code;
2564 2565
2565 events->interrupt.injected = 2566 events->interrupt.injected =
@@ -2573,12 +2574,14 @@ static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2573 events->nmi.injected = vcpu->arch.nmi_injected; 2574 events->nmi.injected = vcpu->arch.nmi_injected;
2574 events->nmi.pending = vcpu->arch.nmi_pending; 2575 events->nmi.pending = vcpu->arch.nmi_pending;
2575 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu); 2576 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2577 events->nmi.pad = 0;
2576 2578
2577 events->sipi_vector = vcpu->arch.sipi_vector; 2579 events->sipi_vector = vcpu->arch.sipi_vector;
2578 2580
2579 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING 2581 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2580 | KVM_VCPUEVENT_VALID_SIPI_VECTOR 2582 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2581 | KVM_VCPUEVENT_VALID_SHADOW); 2583 | KVM_VCPUEVENT_VALID_SHADOW);
2584 memset(&events->reserved, 0, sizeof(events->reserved));
2582} 2585}
2583 2586
2584static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu, 2587static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
@@ -2623,6 +2626,7 @@ static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2623 dbgregs->dr6 = vcpu->arch.dr6; 2626 dbgregs->dr6 = vcpu->arch.dr6;
2624 dbgregs->dr7 = vcpu->arch.dr7; 2627 dbgregs->dr7 = vcpu->arch.dr7;
2625 dbgregs->flags = 0; 2628 dbgregs->flags = 0;
2629 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2626} 2630}
2627 2631
2628static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu, 2632static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
@@ -3106,6 +3110,7 @@ static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3106 sizeof(ps->channels)); 3110 sizeof(ps->channels));
3107 ps->flags = kvm->arch.vpit->pit_state.flags; 3111 ps->flags = kvm->arch.vpit->pit_state.flags;
3108 mutex_unlock(&kvm->arch.vpit->pit_state.lock); 3112 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3113 memset(&ps->reserved, 0, sizeof(ps->reserved));
3109 return r; 3114 return r;
3110} 3115}
3111 3116
@@ -3169,10 +3174,6 @@ int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3169 struct kvm_memslots *slots, *old_slots; 3174 struct kvm_memslots *slots, *old_slots;
3170 unsigned long *dirty_bitmap; 3175 unsigned long *dirty_bitmap;
3171 3176
3172 spin_lock(&kvm->mmu_lock);
3173 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3174 spin_unlock(&kvm->mmu_lock);
3175
3176 r = -ENOMEM; 3177 r = -ENOMEM;
3177 dirty_bitmap = vmalloc(n); 3178 dirty_bitmap = vmalloc(n);
3178 if (!dirty_bitmap) 3179 if (!dirty_bitmap)
@@ -3194,6 +3195,10 @@ int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3194 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap; 3195 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3195 kfree(old_slots); 3196 kfree(old_slots);
3196 3197
3198 spin_lock(&kvm->mmu_lock);
3199 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3200 spin_unlock(&kvm->mmu_lock);
3201
3197 r = -EFAULT; 3202 r = -EFAULT;
3198 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n)) { 3203 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n)) {
3199 vfree(dirty_bitmap); 3204 vfree(dirty_bitmap);
@@ -3486,6 +3491,7 @@ long kvm_arch_vm_ioctl(struct file *filp,
3486 user_ns.clock = kvm->arch.kvmclock_offset + now_ns; 3491 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3487 local_irq_enable(); 3492 local_irq_enable();
3488 user_ns.flags = 0; 3493 user_ns.flags = 0;
3494 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3489 3495
3490 r = -EFAULT; 3496 r = -EFAULT;
3491 if (copy_to_user(argp, &user_ns, sizeof(user_ns))) 3497 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
@@ -3972,8 +3978,10 @@ int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
3972 return X86EMUL_CONTINUE; 3978 return X86EMUL_CONTINUE;
3973 3979
3974 if (kvm_x86_ops->has_wbinvd_exit()) { 3980 if (kvm_x86_ops->has_wbinvd_exit()) {
3981 preempt_disable();
3975 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask, 3982 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
3976 wbinvd_ipi, NULL, 1); 3983 wbinvd_ipi, NULL, 1);
3984 preempt_enable();
3977 cpumask_clear(vcpu->arch.wbinvd_dirty_mask); 3985 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
3978 } 3986 }
3979 wbinvd(); 3987 wbinvd();
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index 49358481c733..12cdbb17ad18 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -251,7 +251,7 @@ static void __cpuinit calculate_tlb_offset(void)
251 } 251 }
252} 252}
253 253
254static int tlb_cpuhp_notify(struct notifier_block *n, 254static int __cpuinit tlb_cpuhp_notify(struct notifier_block *n,
255 unsigned long action, void *hcpu) 255 unsigned long action, void *hcpu)
256{ 256{
257 switch (action & 0xf) { 257 switch (action & 0xf) {
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index 15466c096ba5..0972315c3860 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -138,7 +138,6 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
138 struct acpi_resource_address64 addr; 138 struct acpi_resource_address64 addr;
139 acpi_status status; 139 acpi_status status;
140 unsigned long flags; 140 unsigned long flags;
141 struct resource *root, *conflict;
142 u64 start, end; 141 u64 start, end;
143 142
144 status = resource_to_addr(acpi_res, &addr); 143 status = resource_to_addr(acpi_res, &addr);
@@ -146,12 +145,10 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
146 return AE_OK; 145 return AE_OK;
147 146
148 if (addr.resource_type == ACPI_MEMORY_RANGE) { 147 if (addr.resource_type == ACPI_MEMORY_RANGE) {
149 root = &iomem_resource;
150 flags = IORESOURCE_MEM; 148 flags = IORESOURCE_MEM;
151 if (addr.info.mem.caching == ACPI_PREFETCHABLE_MEMORY) 149 if (addr.info.mem.caching == ACPI_PREFETCHABLE_MEMORY)
152 flags |= IORESOURCE_PREFETCH; 150 flags |= IORESOURCE_PREFETCH;
153 } else if (addr.resource_type == ACPI_IO_RANGE) { 151 } else if (addr.resource_type == ACPI_IO_RANGE) {
154 root = &ioport_resource;
155 flags = IORESOURCE_IO; 152 flags = IORESOURCE_IO;
156 } else 153 } else
157 return AE_OK; 154 return AE_OK;
@@ -172,25 +169,90 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
172 return AE_OK; 169 return AE_OK;
173 } 170 }
174 171
175 conflict = insert_resource_conflict(root, res); 172 info->res_num++;
176 if (conflict) { 173 if (addr.translation_offset)
177 dev_err(&info->bridge->dev, 174 dev_info(&info->bridge->dev, "host bridge window %pR "
178 "address space collision: host bridge window %pR " 175 "(PCI address [%#llx-%#llx])\n",
179 "conflicts with %s %pR\n", 176 res, res->start - addr.translation_offset,
180 res, conflict->name, conflict); 177 res->end - addr.translation_offset);
181 } else { 178 else
182 pci_bus_add_resource(info->bus, res, 0); 179 dev_info(&info->bridge->dev, "host bridge window %pR\n", res);
183 info->res_num++; 180
184 if (addr.translation_offset) 181 return AE_OK;
185 dev_info(&info->bridge->dev, "host bridge window %pR " 182}
186 "(PCI address [%#llx-%#llx])\n", 183
187 res, res->start - addr.translation_offset, 184static bool resource_contains(struct resource *res, resource_size_t point)
188 res->end - addr.translation_offset); 185{
186 if (res->start <= point && point <= res->end)
187 return true;
188 return false;
189}
190
191static void coalesce_windows(struct pci_root_info *info, int type)
192{
193 int i, j;
194 struct resource *res1, *res2;
195
196 for (i = 0; i < info->res_num; i++) {
197 res1 = &info->res[i];
198 if (!(res1->flags & type))
199 continue;
200
201 for (j = i + 1; j < info->res_num; j++) {
202 res2 = &info->res[j];
203 if (!(res2->flags & type))
204 continue;
205
206 /*
207 * I don't like throwing away windows because then
208 * our resources no longer match the ACPI _CRS, but
209 * the kernel resource tree doesn't allow overlaps.
210 */
211 if (resource_contains(res1, res2->start) ||
212 resource_contains(res1, res2->end) ||
213 resource_contains(res2, res1->start) ||
214 resource_contains(res2, res1->end)) {
215 res1->start = min(res1->start, res2->start);
216 res1->end = max(res1->end, res2->end);
217 dev_info(&info->bridge->dev,
218 "host bridge window expanded to %pR; %pR ignored\n",
219 res1, res2);
220 res2->flags = 0;
221 }
222 }
223 }
224}
225
226static void add_resources(struct pci_root_info *info)
227{
228 int i;
229 struct resource *res, *root, *conflict;
230
231 if (!pci_use_crs)
232 return;
233
234 coalesce_windows(info, IORESOURCE_MEM);
235 coalesce_windows(info, IORESOURCE_IO);
236
237 for (i = 0; i < info->res_num; i++) {
238 res = &info->res[i];
239
240 if (res->flags & IORESOURCE_MEM)
241 root = &iomem_resource;
242 else if (res->flags & IORESOURCE_IO)
243 root = &ioport_resource;
189 else 244 else
190 dev_info(&info->bridge->dev, 245 continue;
191 "host bridge window %pR\n", res); 246
247 conflict = insert_resource_conflict(root, res);
248 if (conflict)
249 dev_err(&info->bridge->dev,
250 "address space collision: host bridge window %pR "
251 "conflicts with %s %pR\n",
252 res, conflict->name, conflict);
253 else
254 pci_bus_add_resource(info->bus, res, 0);
192 } 255 }
193 return AE_OK;
194} 256}
195 257
196static void 258static void
@@ -224,6 +286,7 @@ get_current_resources(struct acpi_device *device, int busnum,
224 acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource, 286 acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource,
225 &info); 287 &info);
226 288
289 add_resources(&info);
227 return; 290 return;
228 291
229name_alloc_fail: 292name_alloc_fail:
diff --git a/arch/x86/pci/xen.c b/arch/x86/pci/xen.c
index 117f5b8daf75..d7b5109f7a9c 100644
--- a/arch/x86/pci/xen.c
+++ b/arch/x86/pci/xen.c
@@ -147,8 +147,10 @@ static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
147 irq = xen_allocate_pirq(v[i], 0, /* not sharable */ 147 irq = xen_allocate_pirq(v[i], 0, /* not sharable */
148 (type == PCI_CAP_ID_MSIX) ? 148 (type == PCI_CAP_ID_MSIX) ?
149 "pcifront-msi-x" : "pcifront-msi"); 149 "pcifront-msi-x" : "pcifront-msi");
150 if (irq < 0) 150 if (irq < 0) {
151 return -1; 151 ret = -1;
152 goto free;
153 }
152 154
153 ret = set_irq_msi(irq, msidesc); 155 ret = set_irq_msi(irq, msidesc);
154 if (ret) 156 if (ret)
@@ -164,7 +166,7 @@ error:
164 if (ret == -ENODEV) 166 if (ret == -ENODEV)
165 dev_err(&dev->dev, "Xen PCI frontend has not registered" \ 167 dev_err(&dev->dev, "Xen PCI frontend has not registered" \
166 " MSI/MSI-X support!\n"); 168 " MSI/MSI-X support!\n");
167 169free:
168 kfree(v); 170 kfree(v);
169 return ret; 171 return ret;
170} 172}
diff --git a/arch/x86/platform/uv/tlb_uv.c b/arch/x86/platform/uv/tlb_uv.c
index 20ea20a39e2a..a318194002b5 100644
--- a/arch/x86/platform/uv/tlb_uv.c
+++ b/arch/x86/platform/uv/tlb_uv.c
@@ -1343,8 +1343,8 @@ uv_activation_descriptor_init(int node, int pnode)
1343 * each bau_desc is 64 bytes; there are 8 (UV_ITEMS_PER_DESCRIPTOR) 1343 * each bau_desc is 64 bytes; there are 8 (UV_ITEMS_PER_DESCRIPTOR)
1344 * per cpu; and up to 32 (UV_ADP_SIZE) cpu's per uvhub 1344 * per cpu; and up to 32 (UV_ADP_SIZE) cpu's per uvhub
1345 */ 1345 */
1346 bau_desc = (struct bau_desc *)kmalloc_node(sizeof(struct bau_desc)* 1346 bau_desc = kmalloc_node(sizeof(struct bau_desc) * UV_ADP_SIZE
1347 UV_ADP_SIZE*UV_ITEMS_PER_DESCRIPTOR, GFP_KERNEL, node); 1347 * UV_ITEMS_PER_DESCRIPTOR, GFP_KERNEL, node);
1348 BUG_ON(!bau_desc); 1348 BUG_ON(!bau_desc);
1349 1349
1350 pa = uv_gpa(bau_desc); /* need the real nasid*/ 1350 pa = uv_gpa(bau_desc); /* need the real nasid*/
@@ -1402,9 +1402,9 @@ uv_payload_queue_init(int node, int pnode)
1402 struct bau_payload_queue_entry *pqp_malloc; 1402 struct bau_payload_queue_entry *pqp_malloc;
1403 struct bau_control *bcp; 1403 struct bau_control *bcp;
1404 1404
1405 pqp = (struct bau_payload_queue_entry *) kmalloc_node( 1405 pqp = kmalloc_node((DEST_Q_SIZE + 1)
1406 (DEST_Q_SIZE + 1) * sizeof(struct bau_payload_queue_entry), 1406 * sizeof(struct bau_payload_queue_entry),
1407 GFP_KERNEL, node); 1407 GFP_KERNEL, node);
1408 BUG_ON(!pqp); 1408 BUG_ON(!pqp);
1409 pqp_malloc = pqp; 1409 pqp_malloc = pqp;
1410 1410
@@ -1520,8 +1520,7 @@ static void __init uv_init_per_cpu(int nuvhubs)
1520 1520
1521 timeout_us = calculate_destination_timeout(); 1521 timeout_us = calculate_destination_timeout();
1522 1522
1523 uvhub_descs = (struct uvhub_desc *) 1523 uvhub_descs = kmalloc(nuvhubs * sizeof(struct uvhub_desc), GFP_KERNEL);
1524 kmalloc(nuvhubs * sizeof(struct uvhub_desc), GFP_KERNEL);
1525 memset(uvhub_descs, 0, nuvhubs * sizeof(struct uvhub_desc)); 1524 memset(uvhub_descs, 0, nuvhubs * sizeof(struct uvhub_desc));
1526 uvhub_mask = kzalloc((nuvhubs+7)/8, GFP_KERNEL); 1525 uvhub_mask = kzalloc((nuvhubs+7)/8, GFP_KERNEL);
1527 for_each_present_cpu(cpu) { 1526 for_each_present_cpu(cpu) {
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index c237b810b03f..21ed8d7f75a5 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -2126,7 +2126,7 @@ __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
2126{ 2126{
2127 pmd_t *kernel_pmd; 2127 pmd_t *kernel_pmd;
2128 2128
2129 level2_kernel_pgt = extend_brk(sizeof(pmd_t *) * PTRS_PER_PMD, PAGE_SIZE); 2129 level2_kernel_pgt = extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
2130 2130
2131 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->pt_base) + 2131 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->pt_base) +
2132 xen_start_info->nr_pt_frames * PAGE_SIZE + 2132 xen_start_info->nr_pt_frames * PAGE_SIZE +
diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c
index b1dbdaa23ecc..769c4b01fa32 100644
--- a/arch/x86/xen/setup.c
+++ b/arch/x86/xen/setup.c
@@ -118,16 +118,18 @@ static unsigned long __init xen_return_unused_memory(unsigned long max_pfn,
118 const struct e820map *e820) 118 const struct e820map *e820)
119{ 119{
120 phys_addr_t max_addr = PFN_PHYS(max_pfn); 120 phys_addr_t max_addr = PFN_PHYS(max_pfn);
121 phys_addr_t last_end = 0; 121 phys_addr_t last_end = ISA_END_ADDRESS;
122 unsigned long released = 0; 122 unsigned long released = 0;
123 int i; 123 int i;
124 124
125 /* Free any unused memory above the low 1Mbyte. */
125 for (i = 0; i < e820->nr_map && last_end < max_addr; i++) { 126 for (i = 0; i < e820->nr_map && last_end < max_addr; i++) {
126 phys_addr_t end = e820->map[i].addr; 127 phys_addr_t end = e820->map[i].addr;
127 end = min(max_addr, end); 128 end = min(max_addr, end);
128 129
129 released += xen_release_chunk(last_end, end); 130 if (last_end < end)
130 last_end = e820->map[i].addr + e820->map[i].size; 131 released += xen_release_chunk(last_end, end);
132 last_end = max(last_end, e820->map[i].addr + e820->map[i].size);
131 } 133 }
132 134
133 if (last_end < max_addr) 135 if (last_end < max_addr)
@@ -164,6 +166,7 @@ char * __init xen_memory_setup(void)
164 XENMEM_memory_map; 166 XENMEM_memory_map;
165 rc = HYPERVISOR_memory_op(op, &memmap); 167 rc = HYPERVISOR_memory_op(op, &memmap);
166 if (rc == -ENOSYS) { 168 if (rc == -ENOSYS) {
169 BUG_ON(xen_initial_domain());
167 memmap.nr_entries = 1; 170 memmap.nr_entries = 1;
168 map[0].addr = 0ULL; 171 map[0].addr = 0ULL;
169 map[0].size = mem_end; 172 map[0].size = mem_end;
@@ -201,12 +204,13 @@ char * __init xen_memory_setup(void)
201 } 204 }
202 205
203 /* 206 /*
204 * Even though this is normal, usable memory under Xen, reserve 207 * In domU, the ISA region is normal, usable memory, but we
205 * ISA memory anyway because too many things think they can poke 208 * reserve ISA memory anyway because too many things poke
206 * about in there. 209 * about in there.
207 * 210 *
208 * In a dom0 kernel, this region is identity mapped with the 211 * In Dom0, the host E820 information can leave gaps in the
209 * hardware ISA area, so it really is out of bounds. 212 * ISA range, which would cause us to release those pages. To
213 * avoid this, we unconditionally reserve them here.
210 */ 214 */
211 e820_add_region(ISA_START_ADDRESS, ISA_END_ADDRESS - ISA_START_ADDRESS, 215 e820_add_region(ISA_START_ADDRESS, ISA_END_ADDRESS - ISA_START_ADDRESS,
212 E820_RESERVED); 216 E820_RESERVED);