diff options
Diffstat (limited to 'arch')
26 files changed, 0 insertions, 896 deletions
diff --git a/arch/blackfin/mach-bf518/boards/ezbrd.c b/arch/blackfin/mach-bf518/boards/ezbrd.c index c0ccadcfa44e..d78fc2cc7d16 100644 --- a/arch/blackfin/mach-bf518/boards/ezbrd.c +++ b/arch/blackfin/mach-bf518/boards/ezbrd.c | |||
@@ -187,43 +187,16 @@ static struct flash_platform_data bfin_spi_flash_data = { | |||
187 | /* SPI flash chip (m25p64) */ | 187 | /* SPI flash chip (m25p64) */ |
188 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | 188 | static struct bfin5xx_spi_chip spi_flash_chip_info = { |
189 | .enable_dma = 0, /* use dma transfer with this chip*/ | 189 | .enable_dma = 0, /* use dma transfer with this chip*/ |
190 | .bits_per_word = 8, | ||
191 | }; | 190 | }; |
192 | #endif | 191 | #endif |
193 | 192 | ||
194 | #if defined(CONFIG_BFIN_SPI_ADC) \ | ||
195 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
196 | /* SPI ADC chip */ | ||
197 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | ||
198 | .enable_dma = 1, /* use dma transfer with this chip*/ | ||
199 | .bits_per_word = 16, | ||
200 | }; | ||
201 | #endif | ||
202 | |||
203 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | ||
204 | #if defined(CONFIG_NET_DSA_KSZ8893M) \ | ||
205 | || defined(CONFIG_NET_DSA_KSZ8893M_MODULE) | ||
206 | /* SPI SWITCH CHIP */ | ||
207 | static struct bfin5xx_spi_chip spi_switch_info = { | ||
208 | .enable_dma = 0, | ||
209 | .bits_per_word = 8, | ||
210 | }; | ||
211 | #endif | ||
212 | #endif | ||
213 | |||
214 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | 193 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
215 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { | 194 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
216 | .enable_dma = 0, | 195 | .enable_dma = 0, |
217 | .bits_per_word = 8, | ||
218 | }; | 196 | }; |
219 | #endif | 197 | #endif |
220 | 198 | ||
221 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) | 199 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) |
222 | static struct bfin5xx_spi_chip spi_ad7877_chip_info = { | ||
223 | .enable_dma = 0, | ||
224 | .bits_per_word = 16, | ||
225 | }; | ||
226 | |||
227 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { | 200 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { |
228 | .model = 7877, | 201 | .model = 7877, |
229 | .vref_delay_usecs = 50, /* internal, no capacitor */ | 202 | .vref_delay_usecs = 50, /* internal, no capacitor */ |
@@ -239,21 +212,6 @@ static const struct ad7877_platform_data bfin_ad7877_ts_info = { | |||
239 | }; | 212 | }; |
240 | #endif | 213 | #endif |
241 | 214 | ||
242 | #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \ | ||
243 | && defined(CONFIG_SND_SOC_WM8731_SPI) | ||
244 | static struct bfin5xx_spi_chip spi_wm8731_chip_info = { | ||
245 | .enable_dma = 0, | ||
246 | .bits_per_word = 16, | ||
247 | }; | ||
248 | #endif | ||
249 | |||
250 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
251 | static struct bfin5xx_spi_chip spidev_chip_info = { | ||
252 | .enable_dma = 0, | ||
253 | .bits_per_word = 8, | ||
254 | }; | ||
255 | #endif | ||
256 | |||
257 | static struct spi_board_info bfin_spi_board_info[] __initdata = { | 215 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
258 | #if defined(CONFIG_MTD_M25P80) \ | 216 | #if defined(CONFIG_MTD_M25P80) \ |
259 | || defined(CONFIG_MTD_M25P80_MODULE) | 217 | || defined(CONFIG_MTD_M25P80_MODULE) |
@@ -269,18 +227,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
269 | }, | 227 | }, |
270 | #endif | 228 | #endif |
271 | 229 | ||
272 | #if defined(CONFIG_BFIN_SPI_ADC) \ | ||
273 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
274 | { | ||
275 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | ||
276 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | ||
277 | .bus_num = 0, /* Framework bus number */ | ||
278 | .chip_select = 1, /* Framework chip select. */ | ||
279 | .platform_data = NULL, /* No spi_driver specific config */ | ||
280 | .controller_data = &spi_adc_chip_info, | ||
281 | }, | ||
282 | #endif | ||
283 | |||
284 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) | 230 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
285 | #if defined(CONFIG_NET_DSA_KSZ8893M) \ | 231 | #if defined(CONFIG_NET_DSA_KSZ8893M) \ |
286 | || defined(CONFIG_NET_DSA_KSZ8893M_MODULE) | 232 | || defined(CONFIG_NET_DSA_KSZ8893M_MODULE) |
@@ -290,7 +236,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
290 | .bus_num = 0, | 236 | .bus_num = 0, |
291 | .chip_select = 1, | 237 | .chip_select = 1, |
292 | .platform_data = NULL, | 238 | .platform_data = NULL, |
293 | .controller_data = &spi_switch_info, | ||
294 | .mode = SPI_MODE_3, | 239 | .mode = SPI_MODE_3, |
295 | }, | 240 | }, |
296 | #endif | 241 | #endif |
@@ -314,7 +259,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
314 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | 259 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ |
315 | .bus_num = 0, | 260 | .bus_num = 0, |
316 | .chip_select = 2, | 261 | .chip_select = 2, |
317 | .controller_data = &spi_ad7877_chip_info, | ||
318 | }, | 262 | }, |
319 | #endif | 263 | #endif |
320 | #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \ | 264 | #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \ |
@@ -324,7 +268,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
324 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 268 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
325 | .bus_num = 0, | 269 | .bus_num = 0, |
326 | .chip_select = 5, | 270 | .chip_select = 5, |
327 | .controller_data = &spi_wm8731_chip_info, | ||
328 | .mode = SPI_MODE_0, | 271 | .mode = SPI_MODE_0, |
329 | }, | 272 | }, |
330 | #endif | 273 | #endif |
@@ -334,7 +277,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
334 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 277 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
335 | .bus_num = 0, | 278 | .bus_num = 0, |
336 | .chip_select = 1, | 279 | .chip_select = 1, |
337 | .controller_data = &spidev_chip_info, | ||
338 | }, | 280 | }, |
339 | #endif | 281 | #endif |
340 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) | 282 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) |
@@ -343,7 +285,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
343 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ | 285 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
344 | .bus_num = 0, | 286 | .bus_num = 0, |
345 | .chip_select = 1, | 287 | .chip_select = 1, |
346 | .controller_data = &lq035q1_spi_chip_info, | ||
347 | .mode = SPI_CPHA | SPI_CPOL, | 288 | .mode = SPI_CPHA | SPI_CPOL, |
348 | }, | 289 | }, |
349 | #endif | 290 | #endif |
diff --git a/arch/blackfin/mach-bf518/boards/tcm-bf518.c b/arch/blackfin/mach-bf518/boards/tcm-bf518.c index 50fc5c89e379..55c127908815 100644 --- a/arch/blackfin/mach-bf518/boards/tcm-bf518.c +++ b/arch/blackfin/mach-bf518/boards/tcm-bf518.c | |||
@@ -138,32 +138,16 @@ static struct flash_platform_data bfin_spi_flash_data = { | |||
138 | /* SPI flash chip (m25p64) */ | 138 | /* SPI flash chip (m25p64) */ |
139 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | 139 | static struct bfin5xx_spi_chip spi_flash_chip_info = { |
140 | .enable_dma = 0, /* use dma transfer with this chip*/ | 140 | .enable_dma = 0, /* use dma transfer with this chip*/ |
141 | .bits_per_word = 8, | ||
142 | }; | ||
143 | #endif | ||
144 | |||
145 | #if defined(CONFIG_BFIN_SPI_ADC) \ | ||
146 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
147 | /* SPI ADC chip */ | ||
148 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | ||
149 | .enable_dma = 1, /* use dma transfer with this chip*/ | ||
150 | .bits_per_word = 16, | ||
151 | }; | 141 | }; |
152 | #endif | 142 | #endif |
153 | 143 | ||
154 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | 144 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
155 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { | 145 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
156 | .enable_dma = 0, | 146 | .enable_dma = 0, |
157 | .bits_per_word = 8, | ||
158 | }; | 147 | }; |
159 | #endif | 148 | #endif |
160 | 149 | ||
161 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) | 150 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) |
162 | static struct bfin5xx_spi_chip spi_ad7877_chip_info = { | ||
163 | .enable_dma = 0, | ||
164 | .bits_per_word = 16, | ||
165 | }; | ||
166 | |||
167 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { | 151 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { |
168 | .model = 7877, | 152 | .model = 7877, |
169 | .vref_delay_usecs = 50, /* internal, no capacitor */ | 153 | .vref_delay_usecs = 50, /* internal, no capacitor */ |
@@ -179,21 +163,6 @@ static const struct ad7877_platform_data bfin_ad7877_ts_info = { | |||
179 | }; | 163 | }; |
180 | #endif | 164 | #endif |
181 | 165 | ||
182 | #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \ | ||
183 | && defined(CONFIG_SND_SOC_WM8731_SPI) | ||
184 | static struct bfin5xx_spi_chip spi_wm8731_chip_info = { | ||
185 | .enable_dma = 0, | ||
186 | .bits_per_word = 16, | ||
187 | }; | ||
188 | #endif | ||
189 | |||
190 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
191 | static struct bfin5xx_spi_chip spidev_chip_info = { | ||
192 | .enable_dma = 0, | ||
193 | .bits_per_word = 8, | ||
194 | }; | ||
195 | #endif | ||
196 | |||
197 | static struct spi_board_info bfin_spi_board_info[] __initdata = { | 166 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
198 | #if defined(CONFIG_MTD_M25P80) \ | 167 | #if defined(CONFIG_MTD_M25P80) \ |
199 | || defined(CONFIG_MTD_M25P80_MODULE) | 168 | || defined(CONFIG_MTD_M25P80_MODULE) |
@@ -209,18 +178,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
209 | }, | 178 | }, |
210 | #endif | 179 | #endif |
211 | 180 | ||
212 | #if defined(CONFIG_BFIN_SPI_ADC) \ | ||
213 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
214 | { | ||
215 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | ||
216 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | ||
217 | .bus_num = 0, /* Framework bus number */ | ||
218 | .chip_select = 1, /* Framework chip select. */ | ||
219 | .platform_data = NULL, /* No spi_driver specific config */ | ||
220 | .controller_data = &spi_adc_chip_info, | ||
221 | }, | ||
222 | #endif | ||
223 | |||
224 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | 181 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
225 | { | 182 | { |
226 | .modalias = "mmc_spi", | 183 | .modalias = "mmc_spi", |
@@ -239,7 +196,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
239 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | 196 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ |
240 | .bus_num = 0, | 197 | .bus_num = 0, |
241 | .chip_select = 2, | 198 | .chip_select = 2, |
242 | .controller_data = &spi_ad7877_chip_info, | ||
243 | }, | 199 | }, |
244 | #endif | 200 | #endif |
245 | #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \ | 201 | #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \ |
@@ -249,7 +205,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
249 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 205 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
250 | .bus_num = 0, | 206 | .bus_num = 0, |
251 | .chip_select = 5, | 207 | .chip_select = 5, |
252 | .controller_data = &spi_wm8731_chip_info, | ||
253 | .mode = SPI_MODE_0, | 208 | .mode = SPI_MODE_0, |
254 | }, | 209 | }, |
255 | #endif | 210 | #endif |
@@ -259,7 +214,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
259 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 214 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
260 | .bus_num = 0, | 215 | .bus_num = 0, |
261 | .chip_select = 1, | 216 | .chip_select = 1, |
262 | .controller_data = &spidev_chip_info, | ||
263 | }, | 217 | }, |
264 | #endif | 218 | #endif |
265 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) | 219 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) |
@@ -268,7 +222,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
268 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ | 222 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
269 | .bus_num = 0, | 223 | .bus_num = 0, |
270 | .chip_select = 1, | 224 | .chip_select = 1, |
271 | .controller_data = &lq035q1_spi_chip_info, | ||
272 | .mode = SPI_CPHA | SPI_CPOL, | 225 | .mode = SPI_CPHA | SPI_CPOL, |
273 | }, | 226 | }, |
274 | #endif | 227 | #endif |
diff --git a/arch/blackfin/mach-bf527/boards/ad7160eval.c b/arch/blackfin/mach-bf527/boards/ad7160eval.c index ccab4c689dc3..c04df43f6391 100644 --- a/arch/blackfin/mach-bf527/boards/ad7160eval.c +++ b/arch/blackfin/mach-bf527/boards/ad7160eval.c | |||
@@ -265,29 +265,12 @@ static struct flash_platform_data bfin_spi_flash_data = { | |||
265 | /* SPI flash chip (m25p64) */ | 265 | /* SPI flash chip (m25p64) */ |
266 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | 266 | static struct bfin5xx_spi_chip spi_flash_chip_info = { |
267 | .enable_dma = 0, /* use dma transfer with this chip*/ | 267 | .enable_dma = 0, /* use dma transfer with this chip*/ |
268 | .bits_per_word = 8, | ||
269 | }; | ||
270 | #endif | ||
271 | |||
272 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \ | ||
273 | || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) | ||
274 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | ||
275 | .enable_dma = 0, | ||
276 | .bits_per_word = 16, | ||
277 | }; | 268 | }; |
278 | #endif | 269 | #endif |
279 | 270 | ||
280 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | 271 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
281 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { | 272 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
282 | .enable_dma = 0, | 273 | .enable_dma = 0, |
283 | .bits_per_word = 8, | ||
284 | }; | ||
285 | #endif | ||
286 | |||
287 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
288 | static struct bfin5xx_spi_chip spidev_chip_info = { | ||
289 | .enable_dma = 0, | ||
290 | .bits_per_word = 8, | ||
291 | }; | 274 | }; |
292 | #endif | 275 | #endif |
293 | 276 | ||
@@ -328,7 +311,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
328 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 311 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
329 | .bus_num = 0, | 312 | .bus_num = 0, |
330 | .chip_select = 4, | 313 | .chip_select = 4, |
331 | .controller_data = &ad1836_spi_chip_info, | ||
332 | }, | 314 | }, |
333 | #endif | 315 | #endif |
334 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | 316 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
@@ -347,7 +329,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
347 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 329 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
348 | .bus_num = 0, | 330 | .bus_num = 0, |
349 | .chip_select = 1, | 331 | .chip_select = 1, |
350 | .controller_data = &spidev_chip_info, | ||
351 | }, | 332 | }, |
352 | #endif | 333 | #endif |
353 | }; | 334 | }; |
diff --git a/arch/blackfin/mach-bf527/boards/cm_bf527.c b/arch/blackfin/mach-bf527/boards/cm_bf527.c index c9d6dc88f0e6..6400341cc230 100644 --- a/arch/blackfin/mach-bf527/boards/cm_bf527.c +++ b/arch/blackfin/mach-bf527/boards/cm_bf527.c | |||
@@ -354,40 +354,16 @@ static struct flash_platform_data bfin_spi_flash_data = { | |||
354 | /* SPI flash chip (m25p64) */ | 354 | /* SPI flash chip (m25p64) */ |
355 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | 355 | static struct bfin5xx_spi_chip spi_flash_chip_info = { |
356 | .enable_dma = 0, /* use dma transfer with this chip*/ | 356 | .enable_dma = 0, /* use dma transfer with this chip*/ |
357 | .bits_per_word = 8, | ||
358 | }; | ||
359 | #endif | ||
360 | |||
361 | #if defined(CONFIG_BFIN_SPI_ADC) \ | ||
362 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
363 | /* SPI ADC chip */ | ||
364 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | ||
365 | .enable_dma = 1, /* use dma transfer with this chip*/ | ||
366 | .bits_per_word = 16, | ||
367 | }; | ||
368 | #endif | ||
369 | |||
370 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \ | ||
371 | || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) | ||
372 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | ||
373 | .enable_dma = 0, | ||
374 | .bits_per_word = 16, | ||
375 | }; | 357 | }; |
376 | #endif | 358 | #endif |
377 | 359 | ||
378 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | 360 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
379 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { | 361 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
380 | .enable_dma = 0, | 362 | .enable_dma = 0, |
381 | .bits_per_word = 8, | ||
382 | }; | 363 | }; |
383 | #endif | 364 | #endif |
384 | 365 | ||
385 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) | 366 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) |
386 | static struct bfin5xx_spi_chip spi_ad7877_chip_info = { | ||
387 | .enable_dma = 0, | ||
388 | .bits_per_word = 16, | ||
389 | }; | ||
390 | |||
391 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { | 367 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { |
392 | .model = 7877, | 368 | .model = 7877, |
393 | .vref_delay_usecs = 50, /* internal, no capacitor */ | 369 | .vref_delay_usecs = 50, /* internal, no capacitor */ |
@@ -403,21 +379,6 @@ static const struct ad7877_platform_data bfin_ad7877_ts_info = { | |||
403 | }; | 379 | }; |
404 | #endif | 380 | #endif |
405 | 381 | ||
406 | #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \ | ||
407 | && defined(CONFIG_SND_SOC_WM8731_SPI) | ||
408 | static struct bfin5xx_spi_chip spi_wm8731_chip_info = { | ||
409 | .enable_dma = 0, | ||
410 | .bits_per_word = 16, | ||
411 | }; | ||
412 | #endif | ||
413 | |||
414 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
415 | static struct bfin5xx_spi_chip spidev_chip_info = { | ||
416 | .enable_dma = 0, | ||
417 | .bits_per_word = 8, | ||
418 | }; | ||
419 | #endif | ||
420 | |||
421 | static struct spi_board_info bfin_spi_board_info[] __initdata = { | 382 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
422 | #if defined(CONFIG_MTD_M25P80) \ | 383 | #if defined(CONFIG_MTD_M25P80) \ |
423 | || defined(CONFIG_MTD_M25P80_MODULE) | 384 | || defined(CONFIG_MTD_M25P80_MODULE) |
@@ -433,18 +394,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
433 | }, | 394 | }, |
434 | #endif | 395 | #endif |
435 | 396 | ||
436 | #if defined(CONFIG_BFIN_SPI_ADC) \ | ||
437 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
438 | { | ||
439 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | ||
440 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | ||
441 | .bus_num = 0, /* Framework bus number */ | ||
442 | .chip_select = 1, /* Framework chip select. */ | ||
443 | .platform_data = NULL, /* No spi_driver specific config */ | ||
444 | .controller_data = &spi_adc_chip_info, | ||
445 | }, | ||
446 | #endif | ||
447 | |||
448 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \ | 397 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \ |
449 | || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) | 398 | || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) |
450 | { | 399 | { |
@@ -452,7 +401,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
452 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 401 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
453 | .bus_num = 0, | 402 | .bus_num = 0, |
454 | .chip_select = 4, | 403 | .chip_select = 4, |
455 | .controller_data = &ad1836_spi_chip_info, | ||
456 | }, | 404 | }, |
457 | #endif | 405 | #endif |
458 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | 406 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
@@ -473,7 +421,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
473 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | 421 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ |
474 | .bus_num = 0, | 422 | .bus_num = 0, |
475 | .chip_select = 2, | 423 | .chip_select = 2, |
476 | .controller_data = &spi_ad7877_chip_info, | ||
477 | }, | 424 | }, |
478 | #endif | 425 | #endif |
479 | #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \ | 426 | #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \ |
@@ -483,7 +430,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
483 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 430 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
484 | .bus_num = 0, | 431 | .bus_num = 0, |
485 | .chip_select = 5, | 432 | .chip_select = 5, |
486 | .controller_data = &spi_wm8731_chip_info, | ||
487 | .mode = SPI_MODE_0, | 433 | .mode = SPI_MODE_0, |
488 | }, | 434 | }, |
489 | #endif | 435 | #endif |
@@ -493,7 +439,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
493 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 439 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
494 | .bus_num = 0, | 440 | .bus_num = 0, |
495 | .chip_select = 1, | 441 | .chip_select = 1, |
496 | .controller_data = &spidev_chip_info, | ||
497 | }, | 442 | }, |
498 | #endif | 443 | #endif |
499 | }; | 444 | }; |
diff --git a/arch/blackfin/mach-bf527/boards/ezbrd.c b/arch/blackfin/mach-bf527/boards/ezbrd.c index b7101aa6e3aa..6dbb1b403763 100644 --- a/arch/blackfin/mach-bf527/boards/ezbrd.c +++ b/arch/blackfin/mach-bf527/boards/ezbrd.c | |||
@@ -253,32 +253,16 @@ static struct flash_platform_data bfin_spi_flash_data = { | |||
253 | /* SPI flash chip (sst25wf040) */ | 253 | /* SPI flash chip (sst25wf040) */ |
254 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | 254 | static struct bfin5xx_spi_chip spi_flash_chip_info = { |
255 | .enable_dma = 0, /* use dma transfer with this chip*/ | 255 | .enable_dma = 0, /* use dma transfer with this chip*/ |
256 | .bits_per_word = 8, | ||
257 | }; | ||
258 | #endif | ||
259 | |||
260 | #if defined(CONFIG_BFIN_SPI_ADC) \ | ||
261 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
262 | /* SPI ADC chip */ | ||
263 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | ||
264 | .enable_dma = 1, /* use dma transfer with this chip*/ | ||
265 | .bits_per_word = 16, | ||
266 | }; | 256 | }; |
267 | #endif | 257 | #endif |
268 | 258 | ||
269 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | 259 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
270 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { | 260 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
271 | .enable_dma = 0, | 261 | .enable_dma = 0, |
272 | .bits_per_word = 8, | ||
273 | }; | 262 | }; |
274 | #endif | 263 | #endif |
275 | 264 | ||
276 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) | 265 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) |
277 | static struct bfin5xx_spi_chip spi_ad7877_chip_info = { | ||
278 | .enable_dma = 0, | ||
279 | .bits_per_word = 16, | ||
280 | }; | ||
281 | |||
282 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { | 266 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { |
283 | .model = 7877, | 267 | .model = 7877, |
284 | .vref_delay_usecs = 50, /* internal, no capacitor */ | 268 | .vref_delay_usecs = 50, /* internal, no capacitor */ |
@@ -311,35 +295,6 @@ static const struct ad7879_platform_data bfin_ad7879_ts_info = { | |||
311 | }; | 295 | }; |
312 | #endif | 296 | #endif |
313 | 297 | ||
314 | #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) | ||
315 | static struct bfin5xx_spi_chip spi_ad7879_chip_info = { | ||
316 | .enable_dma = 0, | ||
317 | .bits_per_word = 16, | ||
318 | }; | ||
319 | #endif | ||
320 | |||
321 | #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \ | ||
322 | && defined(CONFIG_SND_SOC_WM8731_SPI) | ||
323 | static struct bfin5xx_spi_chip spi_wm8731_chip_info = { | ||
324 | .enable_dma = 0, | ||
325 | .bits_per_word = 16, | ||
326 | }; | ||
327 | #endif | ||
328 | |||
329 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
330 | static struct bfin5xx_spi_chip spidev_chip_info = { | ||
331 | .enable_dma = 0, | ||
332 | .bits_per_word = 8, | ||
333 | }; | ||
334 | #endif | ||
335 | |||
336 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) | ||
337 | static struct bfin5xx_spi_chip lq035q1_spi_chip_info = { | ||
338 | .enable_dma = 0, | ||
339 | .bits_per_word = 8, | ||
340 | }; | ||
341 | #endif | ||
342 | |||
343 | static struct spi_board_info bfin_spi_board_info[] __initdata = { | 298 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
344 | #if defined(CONFIG_MTD_M25P80) \ | 299 | #if defined(CONFIG_MTD_M25P80) \ |
345 | || defined(CONFIG_MTD_M25P80_MODULE) | 300 | || defined(CONFIG_MTD_M25P80_MODULE) |
@@ -355,18 +310,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
355 | }, | 310 | }, |
356 | #endif | 311 | #endif |
357 | 312 | ||
358 | #if defined(CONFIG_BFIN_SPI_ADC) \ | ||
359 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
360 | { | ||
361 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | ||
362 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | ||
363 | .bus_num = 0, /* Framework bus number */ | ||
364 | .chip_select = 1, /* Framework chip select. */ | ||
365 | .platform_data = NULL, /* No spi_driver specific config */ | ||
366 | .controller_data = &spi_adc_chip_info, | ||
367 | }, | ||
368 | #endif | ||
369 | |||
370 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | 313 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
371 | { | 314 | { |
372 | .modalias = "mmc_spi", | 315 | .modalias = "mmc_spi", |
@@ -385,7 +328,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
385 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | 328 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ |
386 | .bus_num = 0, | 329 | .bus_num = 0, |
387 | .chip_select = 2, | 330 | .chip_select = 2, |
388 | .controller_data = &spi_ad7877_chip_info, | ||
389 | }, | 331 | }, |
390 | #endif | 332 | #endif |
391 | #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) | 333 | #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) |
@@ -396,7 +338,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
396 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ | 338 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ |
397 | .bus_num = 0, | 339 | .bus_num = 0, |
398 | .chip_select = 5, | 340 | .chip_select = 5, |
399 | .controller_data = &spi_ad7879_chip_info, | ||
400 | .mode = SPI_CPHA | SPI_CPOL, | 341 | .mode = SPI_CPHA | SPI_CPOL, |
401 | }, | 342 | }, |
402 | #endif | 343 | #endif |
@@ -407,7 +348,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
407 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 348 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
408 | .bus_num = 0, | 349 | .bus_num = 0, |
409 | .chip_select = 5, | 350 | .chip_select = 5, |
410 | .controller_data = &spi_wm8731_chip_info, | ||
411 | .mode = SPI_MODE_0, | 351 | .mode = SPI_MODE_0, |
412 | }, | 352 | }, |
413 | #endif | 353 | #endif |
@@ -417,7 +357,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
417 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 357 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
418 | .bus_num = 0, | 358 | .bus_num = 0, |
419 | .chip_select = 1, | 359 | .chip_select = 1, |
420 | .controller_data = &spidev_chip_info, | ||
421 | }, | 360 | }, |
422 | #endif | 361 | #endif |
423 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) | 362 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) |
@@ -426,7 +365,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
426 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ | 365 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
427 | .bus_num = 0, | 366 | .bus_num = 0, |
428 | .chip_select = 1, | 367 | .chip_select = 1, |
429 | .controller_data = &lq035q1_spi_chip_info, | ||
430 | .mode = SPI_CPHA | SPI_CPOL, | 368 | .mode = SPI_CPHA | SPI_CPOL, |
431 | }, | 369 | }, |
432 | #endif | 370 | #endif |
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c index 3f967b1c5792..094853ac3c0d 100644 --- a/arch/blackfin/mach-bf527/boards/ezkit.c +++ b/arch/blackfin/mach-bf527/boards/ezkit.c | |||
@@ -451,40 +451,16 @@ static struct flash_platform_data bfin_spi_flash_data = { | |||
451 | /* SPI flash chip (m25p64) */ | 451 | /* SPI flash chip (m25p64) */ |
452 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | 452 | static struct bfin5xx_spi_chip spi_flash_chip_info = { |
453 | .enable_dma = 0, /* use dma transfer with this chip*/ | 453 | .enable_dma = 0, /* use dma transfer with this chip*/ |
454 | .bits_per_word = 8, | ||
455 | }; | ||
456 | #endif | ||
457 | |||
458 | #if defined(CONFIG_BFIN_SPI_ADC) \ | ||
459 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
460 | /* SPI ADC chip */ | ||
461 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | ||
462 | .enable_dma = 1, /* use dma transfer with this chip*/ | ||
463 | .bits_per_word = 16, | ||
464 | }; | ||
465 | #endif | ||
466 | |||
467 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \ | ||
468 | || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) | ||
469 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | ||
470 | .enable_dma = 0, | ||
471 | .bits_per_word = 16, | ||
472 | }; | 454 | }; |
473 | #endif | 455 | #endif |
474 | 456 | ||
475 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | 457 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
476 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { | 458 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
477 | .enable_dma = 0, | 459 | .enable_dma = 0, |
478 | .bits_per_word = 8, | ||
479 | }; | 460 | }; |
480 | #endif | 461 | #endif |
481 | 462 | ||
482 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) | 463 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) |
483 | static struct bfin5xx_spi_chip spi_ad7877_chip_info = { | ||
484 | .enable_dma = 0, | ||
485 | .bits_per_word = 16, | ||
486 | }; | ||
487 | |||
488 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { | 464 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { |
489 | .model = 7877, | 465 | .model = 7877, |
490 | .vref_delay_usecs = 50, /* internal, no capacitor */ | 466 | .vref_delay_usecs = 50, /* internal, no capacitor */ |
@@ -516,20 +492,6 @@ static const struct ad7879_platform_data bfin_ad7879_ts_info = { | |||
516 | }; | 492 | }; |
517 | #endif | 493 | #endif |
518 | 494 | ||
519 | #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) | ||
520 | static struct bfin5xx_spi_chip spi_ad7879_chip_info = { | ||
521 | .enable_dma = 0, | ||
522 | .bits_per_word = 16, | ||
523 | }; | ||
524 | #endif | ||
525 | |||
526 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
527 | static struct bfin5xx_spi_chip spidev_chip_info = { | ||
528 | .enable_dma = 0, | ||
529 | .bits_per_word = 8, | ||
530 | }; | ||
531 | #endif | ||
532 | |||
533 | #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \ | 495 | #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \ |
534 | defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) | 496 | defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) |
535 | 497 | ||
@@ -608,13 +570,6 @@ static struct platform_device bfin_tdm = { | |||
608 | }; | 570 | }; |
609 | #endif | 571 | #endif |
610 | 572 | ||
611 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) | ||
612 | static struct bfin5xx_spi_chip lq035q1_spi_chip_info = { | ||
613 | .enable_dma = 0, | ||
614 | .bits_per_word = 8, | ||
615 | }; | ||
616 | #endif | ||
617 | |||
618 | static struct spi_board_info bfin_spi_board_info[] __initdata = { | 573 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
619 | #if defined(CONFIG_MTD_M25P80) \ | 574 | #if defined(CONFIG_MTD_M25P80) \ |
620 | || defined(CONFIG_MTD_M25P80_MODULE) | 575 | || defined(CONFIG_MTD_M25P80_MODULE) |
@@ -630,18 +585,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
630 | }, | 585 | }, |
631 | #endif | 586 | #endif |
632 | 587 | ||
633 | #if defined(CONFIG_BFIN_SPI_ADC) \ | ||
634 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
635 | { | ||
636 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | ||
637 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | ||
638 | .bus_num = 0, /* Framework bus number */ | ||
639 | .chip_select = 1, /* Framework chip select. */ | ||
640 | .platform_data = NULL, /* No spi_driver specific config */ | ||
641 | .controller_data = &spi_adc_chip_info, | ||
642 | }, | ||
643 | #endif | ||
644 | |||
645 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \ | 588 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \ |
646 | || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) | 589 | || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) |
647 | { | 590 | { |
@@ -650,7 +593,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
650 | .bus_num = 0, | 593 | .bus_num = 0, |
651 | .chip_select = 4, | 594 | .chip_select = 4, |
652 | .platform_data = "ad1836", | 595 | .platform_data = "ad1836", |
653 | .controller_data = &ad1836_spi_chip_info, | ||
654 | .mode = SPI_MODE_3, | 596 | .mode = SPI_MODE_3, |
655 | }, | 597 | }, |
656 | #endif | 598 | #endif |
@@ -673,7 +615,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
673 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | 615 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ |
674 | .bus_num = 0, | 616 | .bus_num = 0, |
675 | .chip_select = 2, | 617 | .chip_select = 2, |
676 | .controller_data = &spi_ad7877_chip_info, | ||
677 | }, | 618 | }, |
678 | #endif | 619 | #endif |
679 | #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) | 620 | #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) |
@@ -684,7 +625,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
684 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ | 625 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ |
685 | .bus_num = 0, | 626 | .bus_num = 0, |
686 | .chip_select = 3, | 627 | .chip_select = 3, |
687 | .controller_data = &spi_ad7879_chip_info, | ||
688 | .mode = SPI_CPHA | SPI_CPOL, | 628 | .mode = SPI_CPHA | SPI_CPOL, |
689 | }, | 629 | }, |
690 | #endif | 630 | #endif |
@@ -694,7 +634,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
694 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 634 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
695 | .bus_num = 0, | 635 | .bus_num = 0, |
696 | .chip_select = 1, | 636 | .chip_select = 1, |
697 | .controller_data = &spidev_chip_info, | ||
698 | }, | 637 | }, |
699 | #endif | 638 | #endif |
700 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) | 639 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) |
@@ -703,7 +642,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
703 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ | 642 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
704 | .bus_num = 0, | 643 | .bus_num = 0, |
705 | .chip_select = 7, | 644 | .chip_select = 7, |
706 | .controller_data = &lq035q1_spi_chip_info, | ||
707 | .mode = SPI_CPHA | SPI_CPOL, | 645 | .mode = SPI_CPHA | SPI_CPOL, |
708 | }, | 646 | }, |
709 | #endif | 647 | #endif |
diff --git a/arch/blackfin/mach-bf527/boards/tll6527m.c b/arch/blackfin/mach-bf527/boards/tll6527m.c index 18d303dd5627..ec4bc7429c9f 100644 --- a/arch/blackfin/mach-bf527/boards/tll6527m.c +++ b/arch/blackfin/mach-bf527/boards/tll6527m.c | |||
@@ -314,29 +314,12 @@ static struct flash_platform_data bfin_spi_flash_data = { | |||
314 | /* SPI flash chip (m25p64) */ | 314 | /* SPI flash chip (m25p64) */ |
315 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | 315 | static struct bfin5xx_spi_chip spi_flash_chip_info = { |
316 | .enable_dma = 0, /* use dma transfer with this chip*/ | 316 | .enable_dma = 0, /* use dma transfer with this chip*/ |
317 | .bits_per_word = 8, | ||
318 | }; | ||
319 | #endif | ||
320 | |||
321 | #if defined(CONFIG_BFIN_SPI_ADC) \ | ||
322 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
323 | /* SPI ADC chip */ | ||
324 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | ||
325 | .enable_dma = 0, /* use dma transfer with this chip*/ | ||
326 | /* | ||
327 | * tll6527m V1.0 does not support native spi slave selects | ||
328 | * hence DMA mode will not be useful since the ADC needs | ||
329 | * CS to toggle for each sample and cs_change_per_word | ||
330 | * seems to be removed from spi_bfin5xx.c | ||
331 | */ | ||
332 | .bits_per_word = 16, | ||
333 | }; | 317 | }; |
334 | #endif | 318 | #endif |
335 | 319 | ||
336 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | 320 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
337 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { | 321 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
338 | .enable_dma = 0, | 322 | .enable_dma = 0, |
339 | .bits_per_word = 8, | ||
340 | }; | 323 | }; |
341 | #endif | 324 | #endif |
342 | 325 | ||
@@ -359,21 +342,6 @@ static const struct ad7879_platform_data bfin_ad7879_ts_info = { | |||
359 | }; | 342 | }; |
360 | #endif | 343 | #endif |
361 | 344 | ||
362 | #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) \ | ||
363 | || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) | ||
364 | static struct bfin5xx_spi_chip spi_ad7879_chip_info = { | ||
365 | .enable_dma = 0, | ||
366 | .bits_per_word = 16, | ||
367 | }; | ||
368 | #endif | ||
369 | |||
370 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
371 | static struct bfin5xx_spi_chip spidev_chip_info = { | ||
372 | .enable_dma = 0, | ||
373 | .bits_per_word = 8, | ||
374 | }; | ||
375 | #endif | ||
376 | |||
377 | #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) | 345 | #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) |
378 | static struct platform_device bfin_i2s = { | 346 | static struct platform_device bfin_i2s = { |
379 | .name = "bfin-i2s", | 347 | .name = "bfin-i2s", |
@@ -382,24 +350,7 @@ static struct platform_device bfin_i2s = { | |||
382 | }; | 350 | }; |
383 | #endif | 351 | #endif |
384 | 352 | ||
385 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) | ||
386 | static struct bfin5xx_spi_chip lq035q1_spi_chip_info = { | ||
387 | .enable_dma = 0, | ||
388 | .bits_per_word = 8, | ||
389 | }; | ||
390 | #endif | ||
391 | |||
392 | #if defined(CONFIG_GPIO_MCP23S08) || defined(CONFIG_GPIO_MCP23S08_MODULE) | 353 | #if defined(CONFIG_GPIO_MCP23S08) || defined(CONFIG_GPIO_MCP23S08_MODULE) |
393 | static struct bfin5xx_spi_chip spi_mcp23s08_sys_chip_info = { | ||
394 | .enable_dma = 0, | ||
395 | .bits_per_word = 8, | ||
396 | }; | ||
397 | |||
398 | static struct bfin5xx_spi_chip spi_mcp23s08_usr_chip_info = { | ||
399 | .enable_dma = 0, | ||
400 | .bits_per_word = 8, | ||
401 | }; | ||
402 | |||
403 | #include <linux/spi/mcp23s08.h> | 354 | #include <linux/spi/mcp23s08.h> |
404 | static const struct mcp23s08_platform_data bfin_mcp23s08_sys_gpio_info = { | 355 | static const struct mcp23s08_platform_data bfin_mcp23s08_sys_gpio_info = { |
405 | .chip[0].is_present = true, | 356 | .chip[0].is_present = true, |
@@ -429,22 +380,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
429 | }, | 380 | }, |
430 | #endif | 381 | #endif |
431 | 382 | ||
432 | #if defined(CONFIG_BFIN_SPI_ADC) | ||
433 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
434 | { | ||
435 | .modalias = "bfin_spi_adc", | ||
436 | /* Name of spi_driver for this device */ | ||
437 | .max_speed_hz = 10000000, | ||
438 | /* max spi clock (SCK) speed in HZ */ | ||
439 | .bus_num = 0, /* Framework bus number */ | ||
440 | .chip_select = EXP_GPIO_SPISEL_BASE + 0x04 + MAX_CTRL_CS, | ||
441 | /* Framework chip select. */ | ||
442 | .platform_data = NULL, /* No spi_driver specific config */ | ||
443 | .controller_data = &spi_adc_chip_info, | ||
444 | .mode = SPI_MODE_0, | ||
445 | }, | ||
446 | #endif | ||
447 | |||
448 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | 383 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
449 | { | 384 | { |
450 | .modalias = "mmc_spi", | 385 | .modalias = "mmc_spi", |
@@ -470,7 +405,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
470 | /* max spi clock (SCK) speed in HZ */ | 405 | /* max spi clock (SCK) speed in HZ */ |
471 | .bus_num = 0, | 406 | .bus_num = 0, |
472 | .chip_select = EXP_GPIO_SPISEL_BASE + 0x07 + MAX_CTRL_CS, | 407 | .chip_select = EXP_GPIO_SPISEL_BASE + 0x07 + MAX_CTRL_CS, |
473 | .controller_data = &spi_ad7879_chip_info, | ||
474 | .mode = SPI_CPHA | SPI_CPOL, | 408 | .mode = SPI_CPHA | SPI_CPOL, |
475 | }, | 409 | }, |
476 | #endif | 410 | #endif |
@@ -482,7 +416,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
482 | .bus_num = 0, | 416 | .bus_num = 0, |
483 | .chip_select = EXP_GPIO_SPISEL_BASE + 0x03 + MAX_CTRL_CS, | 417 | .chip_select = EXP_GPIO_SPISEL_BASE + 0x03 + MAX_CTRL_CS, |
484 | .mode = SPI_CPHA | SPI_CPOL, | 418 | .mode = SPI_CPHA | SPI_CPOL, |
485 | .controller_data = &spidev_chip_info, | ||
486 | }, | 419 | }, |
487 | #endif | 420 | #endif |
488 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) | 421 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) |
@@ -491,7 +424,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
491 | .max_speed_hz = 20000000, | 424 | .max_speed_hz = 20000000, |
492 | .bus_num = 0, | 425 | .bus_num = 0, |
493 | .chip_select = EXP_GPIO_SPISEL_BASE + 0x06 + MAX_CTRL_CS, | 426 | .chip_select = EXP_GPIO_SPISEL_BASE + 0x06 + MAX_CTRL_CS, |
494 | .controller_data = &lq035q1_spi_chip_info, | ||
495 | .mode = SPI_CPHA | SPI_CPOL, | 427 | .mode = SPI_CPHA | SPI_CPOL, |
496 | }, | 428 | }, |
497 | #endif | 429 | #endif |
@@ -502,7 +434,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
502 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ | 434 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ |
503 | .bus_num = 0, | 435 | .bus_num = 0, |
504 | .chip_select = EXP_GPIO_SPISEL_BASE + 0x01 + MAX_CTRL_CS, | 436 | .chip_select = EXP_GPIO_SPISEL_BASE + 0x01 + MAX_CTRL_CS, |
505 | .controller_data = &spi_mcp23s08_sys_chip_info, | ||
506 | .mode = SPI_CPHA | SPI_CPOL, | 437 | .mode = SPI_CPHA | SPI_CPOL, |
507 | }, | 438 | }, |
508 | { | 439 | { |
@@ -511,7 +442,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
511 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ | 442 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ |
512 | .bus_num = 0, | 443 | .bus_num = 0, |
513 | .chip_select = EXP_GPIO_SPISEL_BASE + 0x02 + MAX_CTRL_CS, | 444 | .chip_select = EXP_GPIO_SPISEL_BASE + 0x02 + MAX_CTRL_CS, |
514 | .controller_data = &spi_mcp23s08_usr_chip_info, | ||
515 | .mode = SPI_CPHA | SPI_CPOL, | 445 | .mode = SPI_CPHA | SPI_CPOL, |
516 | }, | 446 | }, |
517 | #endif | 447 | #endif |
diff --git a/arch/blackfin/mach-bf533/boards/H8606.c b/arch/blackfin/mach-bf533/boards/H8606.c index d4bfcea56828..eb325ed6607e 100644 --- a/arch/blackfin/mach-bf533/boards/H8606.c +++ b/arch/blackfin/mach-bf533/boards/H8606.c | |||
@@ -159,22 +159,6 @@ static struct flash_platform_data bfin_spi_flash_data = { | |||
159 | /* SPI flash chip (m25p64) */ | 159 | /* SPI flash chip (m25p64) */ |
160 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | 160 | static struct bfin5xx_spi_chip spi_flash_chip_info = { |
161 | .enable_dma = 0, /* use dma transfer with this chip*/ | 161 | .enable_dma = 0, /* use dma transfer with this chip*/ |
162 | .bits_per_word = 8, | ||
163 | }; | ||
164 | #endif | ||
165 | |||
166 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
167 | /* SPI ADC chip */ | ||
168 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | ||
169 | .enable_dma = 1, /* use dma transfer with this chip*/ | ||
170 | .bits_per_word = 16, | ||
171 | }; | ||
172 | #endif | ||
173 | |||
174 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) | ||
175 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | ||
176 | .enable_dma = 0, | ||
177 | .bits_per_word = 16, | ||
178 | }; | 162 | }; |
179 | #endif | 163 | #endif |
180 | 164 | ||
@@ -195,24 +179,12 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
195 | }, | 179 | }, |
196 | #endif | 180 | #endif |
197 | 181 | ||
198 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
199 | { | ||
200 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | ||
201 | .max_speed_hz = 4, /* actual baudrate is SCLK/(2xspeed_hz) */ | ||
202 | .bus_num = 1, /* Framework bus number */ | ||
203 | .chip_select = 1, /* Framework chip select. */ | ||
204 | .platform_data = NULL, /* No spi_driver specific config */ | ||
205 | .controller_data = &spi_adc_chip_info, | ||
206 | }, | ||
207 | #endif | ||
208 | |||
209 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) | 182 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) |
210 | { | 183 | { |
211 | .modalias = "ad183x", | 184 | .modalias = "ad183x", |
212 | .max_speed_hz = 16, | 185 | .max_speed_hz = 16, |
213 | .bus_num = 1, | 186 | .bus_num = 1, |
214 | .chip_select = 4, | 187 | .chip_select = 4, |
215 | .controller_data = &ad1836_spi_chip_info, | ||
216 | }, | 188 | }, |
217 | #endif | 189 | #endif |
218 | 190 | ||
diff --git a/arch/blackfin/mach-bf533/boards/blackstamp.c b/arch/blackfin/mach-bf533/boards/blackstamp.c index 87b5af3693c1..b0ec825fb4ec 100644 --- a/arch/blackfin/mach-bf533/boards/blackstamp.c +++ b/arch/blackfin/mach-bf533/boards/blackstamp.c | |||
@@ -102,21 +102,12 @@ static struct flash_platform_data bfin_spi_flash_data = { | |||
102 | /* SPI flash chip (m25p64) */ | 102 | /* SPI flash chip (m25p64) */ |
103 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | 103 | static struct bfin5xx_spi_chip spi_flash_chip_info = { |
104 | .enable_dma = 0, /* use dma transfer with this chip*/ | 104 | .enable_dma = 0, /* use dma transfer with this chip*/ |
105 | .bits_per_word = 8, | ||
106 | }; | 105 | }; |
107 | #endif | 106 | #endif |
108 | 107 | ||
109 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | 108 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
110 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { | 109 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
111 | .enable_dma = 0, | 110 | .enable_dma = 0, |
112 | .bits_per_word = 8, | ||
113 | }; | ||
114 | #endif | ||
115 | |||
116 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
117 | static struct bfin5xx_spi_chip spidev_chip_info = { | ||
118 | .enable_dma = 0, | ||
119 | .bits_per_word = 8, | ||
120 | }; | 111 | }; |
121 | #endif | 112 | #endif |
122 | 113 | ||
@@ -151,7 +142,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
151 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 142 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
152 | .bus_num = 0, | 143 | .bus_num = 0, |
153 | .chip_select = 7, | 144 | .chip_select = 7, |
154 | .controller_data = &spidev_chip_info, | ||
155 | }, | 145 | }, |
156 | #endif | 146 | #endif |
157 | }; | 147 | }; |
diff --git a/arch/blackfin/mach-bf533/boards/cm_bf533.c b/arch/blackfin/mach-bf533/boards/cm_bf533.c index 4d5604eaa7c2..14f54a31e74c 100644 --- a/arch/blackfin/mach-bf533/boards/cm_bf533.c +++ b/arch/blackfin/mach-bf533/boards/cm_bf533.c | |||
@@ -59,29 +59,12 @@ static struct flash_platform_data bfin_spi_flash_data = { | |||
59 | /* SPI flash chip (m25p64) */ | 59 | /* SPI flash chip (m25p64) */ |
60 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | 60 | static struct bfin5xx_spi_chip spi_flash_chip_info = { |
61 | .enable_dma = 0, /* use dma transfer with this chip*/ | 61 | .enable_dma = 0, /* use dma transfer with this chip*/ |
62 | .bits_per_word = 8, | ||
63 | }; | ||
64 | #endif | ||
65 | |||
66 | /* SPI ADC chip */ | ||
67 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
68 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | ||
69 | .enable_dma = 1, /* use dma transfer with this chip*/ | ||
70 | .bits_per_word = 16, | ||
71 | }; | ||
72 | #endif | ||
73 | |||
74 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) | ||
75 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | ||
76 | .enable_dma = 0, | ||
77 | .bits_per_word = 16, | ||
78 | }; | 62 | }; |
79 | #endif | 63 | #endif |
80 | 64 | ||
81 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | 65 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
82 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { | 66 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
83 | .enable_dma = 0, | 67 | .enable_dma = 0, |
84 | .bits_per_word = 8, | ||
85 | }; | 68 | }; |
86 | #endif | 69 | #endif |
87 | 70 | ||
@@ -99,24 +82,12 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
99 | }, | 82 | }, |
100 | #endif | 83 | #endif |
101 | 84 | ||
102 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
103 | { | ||
104 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | ||
105 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | ||
106 | .bus_num = 0, /* Framework bus number */ | ||
107 | .chip_select = 2, /* Framework chip select. */ | ||
108 | .platform_data = NULL, /* No spi_driver specific config */ | ||
109 | .controller_data = &spi_adc_chip_info, | ||
110 | }, | ||
111 | #endif | ||
112 | |||
113 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) | 85 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) |
114 | { | 86 | { |
115 | .modalias = "ad183x", | 87 | .modalias = "ad183x", |
116 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 88 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
117 | .bus_num = 0, | 89 | .bus_num = 0, |
118 | .chip_select = 4, | 90 | .chip_select = 4, |
119 | .controller_data = &ad1836_spi_chip_info, | ||
120 | }, | 91 | }, |
121 | #endif | 92 | #endif |
122 | 93 | ||
diff --git a/arch/blackfin/mach-bf533/boards/ezkit.c b/arch/blackfin/mach-bf533/boards/ezkit.c index b67b91d82242..ecd2801f050d 100644 --- a/arch/blackfin/mach-bf533/boards/ezkit.c +++ b/arch/blackfin/mach-bf533/boards/ezkit.c | |||
@@ -210,29 +210,6 @@ static struct flash_platform_data bfin_spi_flash_data = { | |||
210 | /* SPI flash chip (m25p64) */ | 210 | /* SPI flash chip (m25p64) */ |
211 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | 211 | static struct bfin5xx_spi_chip spi_flash_chip_info = { |
212 | .enable_dma = 0, /* use dma transfer with this chip*/ | 212 | .enable_dma = 0, /* use dma transfer with this chip*/ |
213 | .bits_per_word = 8, | ||
214 | }; | ||
215 | #endif | ||
216 | |||
217 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
218 | /* SPI ADC chip */ | ||
219 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | ||
220 | .enable_dma = 1, /* use dma transfer with this chip*/ | ||
221 | .bits_per_word = 16, | ||
222 | }; | ||
223 | #endif | ||
224 | |||
225 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) | ||
226 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | ||
227 | .enable_dma = 0, | ||
228 | .bits_per_word = 16, | ||
229 | }; | ||
230 | #endif | ||
231 | |||
232 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
233 | static struct bfin5xx_spi_chip spidev_chip_info = { | ||
234 | .enable_dma = 0, | ||
235 | .bits_per_word = 8, | ||
236 | }; | 213 | }; |
237 | #endif | 214 | #endif |
238 | 215 | ||
@@ -250,24 +227,12 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
250 | }, | 227 | }, |
251 | #endif | 228 | #endif |
252 | 229 | ||
253 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
254 | { | ||
255 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | ||
256 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | ||
257 | .bus_num = 0, /* Framework bus number */ | ||
258 | .chip_select = 1, /* Framework chip select. */ | ||
259 | .platform_data = NULL, /* No spi_driver specific config */ | ||
260 | .controller_data = &spi_adc_chip_info, | ||
261 | }, | ||
262 | #endif | ||
263 | |||
264 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) | 230 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) |
265 | { | 231 | { |
266 | .modalias = "ad183x", | 232 | .modalias = "ad183x", |
267 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 233 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
268 | .bus_num = 0, | 234 | .bus_num = 0, |
269 | .chip_select = 4, | 235 | .chip_select = 4, |
270 | .controller_data = &ad1836_spi_chip_info, | ||
271 | }, | 236 | }, |
272 | #endif | 237 | #endif |
273 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | 238 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) |
@@ -276,7 +241,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
276 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 241 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
277 | .bus_num = 0, | 242 | .bus_num = 0, |
278 | .chip_select = 1, | 243 | .chip_select = 1, |
279 | .controller_data = &spidev_chip_info, | ||
280 | }, | 244 | }, |
281 | #endif | 245 | #endif |
282 | }; | 246 | }; |
diff --git a/arch/blackfin/mach-bf533/boards/ip0x.c b/arch/blackfin/mach-bf533/boards/ip0x.c index a377d8afea03..fbee77fa9211 100644 --- a/arch/blackfin/mach-bf533/boards/ip0x.c +++ b/arch/blackfin/mach-bf533/boards/ip0x.c | |||
@@ -110,7 +110,6 @@ static struct platform_device dm9000_device2 = { | |||
110 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | 110 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
111 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { | 111 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
112 | .enable_dma = 0, /* if 1 - block!!! */ | 112 | .enable_dma = 0, /* if 1 - block!!! */ |
113 | .bits_per_word = 8, | ||
114 | }; | 113 | }; |
115 | #endif | 114 | #endif |
116 | 115 | ||
diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c index eccb82036c0c..964a8e5f79b4 100644 --- a/arch/blackfin/mach-bf533/boards/stamp.c +++ b/arch/blackfin/mach-bf533/boards/stamp.c | |||
@@ -175,29 +175,6 @@ static struct flash_platform_data bfin_spi_flash_data = { | |||
175 | /* SPI flash chip (m25p64) */ | 175 | /* SPI flash chip (m25p64) */ |
176 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | 176 | static struct bfin5xx_spi_chip spi_flash_chip_info = { |
177 | .enable_dma = 0, /* use dma transfer with this chip*/ | 177 | .enable_dma = 0, /* use dma transfer with this chip*/ |
178 | .bits_per_word = 8, | ||
179 | }; | ||
180 | #endif | ||
181 | |||
182 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
183 | /* SPI ADC chip */ | ||
184 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | ||
185 | .enable_dma = 1, /* use dma transfer with this chip*/ | ||
186 | .bits_per_word = 16, | ||
187 | }; | ||
188 | #endif | ||
189 | |||
190 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) | ||
191 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | ||
192 | .enable_dma = 0, | ||
193 | .bits_per_word = 16, | ||
194 | }; | ||
195 | #endif | ||
196 | |||
197 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
198 | static struct bfin5xx_spi_chip spidev_chip_info = { | ||
199 | .enable_dma = 0, | ||
200 | .bits_per_word = 8, | ||
201 | }; | 178 | }; |
202 | #endif | 179 | #endif |
203 | 180 | ||
@@ -224,7 +201,6 @@ static struct mmc_spi_platform_data bfin_mmc_spi_pdata = { | |||
224 | 201 | ||
225 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { | 202 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
226 | .enable_dma = 0, | 203 | .enable_dma = 0, |
227 | .bits_per_word = 8, | ||
228 | .pio_interrupt = 0, | 204 | .pio_interrupt = 0, |
229 | }; | 205 | }; |
230 | #endif | 206 | #endif |
@@ -243,17 +219,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
243 | }, | 219 | }, |
244 | #endif | 220 | #endif |
245 | 221 | ||
246 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
247 | { | ||
248 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | ||
249 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | ||
250 | .bus_num = 0, /* Framework bus number */ | ||
251 | .chip_select = 1, /* Framework chip select. */ | ||
252 | .platform_data = NULL, /* No spi_driver specific config */ | ||
253 | .controller_data = &spi_adc_chip_info, | ||
254 | }, | ||
255 | #endif | ||
256 | |||
257 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) | 222 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) |
258 | { | 223 | { |
259 | .modalias = "ad183x", | 224 | .modalias = "ad183x", |
@@ -261,7 +226,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
261 | .bus_num = 0, | 226 | .bus_num = 0, |
262 | .chip_select = 4, | 227 | .chip_select = 4, |
263 | .platform_data = "ad1836", /* only includes chip name for the moment */ | 228 | .platform_data = "ad1836", /* only includes chip name for the moment */ |
264 | .controller_data = &ad1836_spi_chip_info, | ||
265 | .mode = SPI_MODE_3, | 229 | .mode = SPI_MODE_3, |
266 | }, | 230 | }, |
267 | #endif | 231 | #endif |
@@ -272,7 +236,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
272 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 236 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
273 | .bus_num = 0, | 237 | .bus_num = 0, |
274 | .chip_select = 1, | 238 | .chip_select = 1, |
275 | .controller_data = &spidev_chip_info, | ||
276 | }, | 239 | }, |
277 | #endif | 240 | #endif |
278 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | 241 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537e.c b/arch/blackfin/mach-bf537/boards/cm_bf537e.c index f3ff4207b429..44fd8409db10 100644 --- a/arch/blackfin/mach-bf537/boards/cm_bf537e.c +++ b/arch/blackfin/mach-bf537/boards/cm_bf537e.c | |||
@@ -61,29 +61,12 @@ static struct flash_platform_data bfin_spi_flash_data = { | |||
61 | /* SPI flash chip (m25p64) */ | 61 | /* SPI flash chip (m25p64) */ |
62 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | 62 | static struct bfin5xx_spi_chip spi_flash_chip_info = { |
63 | .enable_dma = 0, /* use dma transfer with this chip*/ | 63 | .enable_dma = 0, /* use dma transfer with this chip*/ |
64 | .bits_per_word = 8, | ||
65 | }; | ||
66 | #endif | ||
67 | |||
68 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
69 | /* SPI ADC chip */ | ||
70 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | ||
71 | .enable_dma = 1, /* use dma transfer with this chip*/ | ||
72 | .bits_per_word = 16, | ||
73 | }; | ||
74 | #endif | ||
75 | |||
76 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) | ||
77 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | ||
78 | .enable_dma = 0, | ||
79 | .bits_per_word = 16, | ||
80 | }; | 64 | }; |
81 | #endif | 65 | #endif |
82 | 66 | ||
83 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | 67 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
84 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { | 68 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
85 | .enable_dma = 0, | 69 | .enable_dma = 0, |
86 | .bits_per_word = 8, | ||
87 | }; | 70 | }; |
88 | #endif | 71 | #endif |
89 | 72 | ||
@@ -101,24 +84,12 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
101 | }, | 84 | }, |
102 | #endif | 85 | #endif |
103 | 86 | ||
104 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
105 | { | ||
106 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | ||
107 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | ||
108 | .bus_num = 0, /* Framework bus number */ | ||
109 | .chip_select = 1, /* Framework chip select. */ | ||
110 | .platform_data = NULL, /* No spi_driver specific config */ | ||
111 | .controller_data = &spi_adc_chip_info, | ||
112 | }, | ||
113 | #endif | ||
114 | |||
115 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) | 87 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) |
116 | { | 88 | { |
117 | .modalias = "ad183x", | 89 | .modalias = "ad183x", |
118 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 90 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
119 | .bus_num = 0, | 91 | .bus_num = 0, |
120 | .chip_select = 4, | 92 | .chip_select = 4, |
121 | .controller_data = &ad1836_spi_chip_info, | ||
122 | }, | 93 | }, |
123 | #endif | 94 | #endif |
124 | 95 | ||
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537u.c b/arch/blackfin/mach-bf537/boards/cm_bf537u.c index e1b7287084f8..1b4ac5c64aae 100644 --- a/arch/blackfin/mach-bf537/boards/cm_bf537u.c +++ b/arch/blackfin/mach-bf537/boards/cm_bf537u.c | |||
@@ -62,29 +62,12 @@ static struct flash_platform_data bfin_spi_flash_data = { | |||
62 | /* SPI flash chip (m25p64) */ | 62 | /* SPI flash chip (m25p64) */ |
63 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | 63 | static struct bfin5xx_spi_chip spi_flash_chip_info = { |
64 | .enable_dma = 0, /* use dma transfer with this chip*/ | 64 | .enable_dma = 0, /* use dma transfer with this chip*/ |
65 | .bits_per_word = 8, | ||
66 | }; | ||
67 | #endif | ||
68 | |||
69 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
70 | /* SPI ADC chip */ | ||
71 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | ||
72 | .enable_dma = 1, /* use dma transfer with this chip*/ | ||
73 | .bits_per_word = 16, | ||
74 | }; | ||
75 | #endif | ||
76 | |||
77 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) | ||
78 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | ||
79 | .enable_dma = 0, | ||
80 | .bits_per_word = 16, | ||
81 | }; | 65 | }; |
82 | #endif | 66 | #endif |
83 | 67 | ||
84 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | 68 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
85 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { | 69 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
86 | .enable_dma = 0, | 70 | .enable_dma = 0, |
87 | .bits_per_word = 8, | ||
88 | }; | 71 | }; |
89 | #endif | 72 | #endif |
90 | 73 | ||
@@ -102,24 +85,12 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
102 | }, | 85 | }, |
103 | #endif | 86 | #endif |
104 | 87 | ||
105 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
106 | { | ||
107 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | ||
108 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | ||
109 | .bus_num = 0, /* Framework bus number */ | ||
110 | .chip_select = 1, /* Framework chip select. */ | ||
111 | .platform_data = NULL, /* No spi_driver specific config */ | ||
112 | .controller_data = &spi_adc_chip_info, | ||
113 | }, | ||
114 | #endif | ||
115 | |||
116 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) | 88 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) |
117 | { | 89 | { |
118 | .modalias = "ad183x", | 90 | .modalias = "ad183x", |
119 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 91 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
120 | .bus_num = 0, | 92 | .bus_num = 0, |
121 | .chip_select = 4, | 93 | .chip_select = 4, |
122 | .controller_data = &ad1836_spi_chip_info, | ||
123 | }, | 94 | }, |
124 | #endif | 95 | #endif |
125 | 96 | ||
diff --git a/arch/blackfin/mach-bf537/boards/dnp5370.c b/arch/blackfin/mach-bf537/boards/dnp5370.c index 6b4ff4605bff..8bc951de979d 100644 --- a/arch/blackfin/mach-bf537/boards/dnp5370.c +++ b/arch/blackfin/mach-bf537/boards/dnp5370.c | |||
@@ -130,7 +130,6 @@ static struct platform_device asmb_flash_device = { | |||
130 | 130 | ||
131 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { | 131 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
132 | .enable_dma = 0, /* use no dma transfer with this chip*/ | 132 | .enable_dma = 0, /* use no dma transfer with this chip*/ |
133 | .bits_per_word = 8, | ||
134 | }; | 133 | }; |
135 | 134 | ||
136 | #endif | 135 | #endif |
@@ -161,7 +160,6 @@ static struct flash_platform_data bfin_spi_dataflash_data = { | |||
161 | 160 | ||
162 | static struct bfin5xx_spi_chip spi_dataflash_chip_info = { | 161 | static struct bfin5xx_spi_chip spi_dataflash_chip_info = { |
163 | .enable_dma = 0, /* use no dma transfer with this chip*/ | 162 | .enable_dma = 0, /* use no dma transfer with this chip*/ |
164 | .bits_per_word = 8, | ||
165 | }; | 163 | }; |
166 | #endif | 164 | #endif |
167 | 165 | ||
diff --git a/arch/blackfin/mach-bf537/boards/minotaur.c b/arch/blackfin/mach-bf537/boards/minotaur.c index bfb3671a78da..c62f9dccd9f7 100644 --- a/arch/blackfin/mach-bf537/boards/minotaur.c +++ b/arch/blackfin/mach-bf537/boards/minotaur.c | |||
@@ -159,14 +159,12 @@ static struct flash_platform_data bfin_spi_flash_data = { | |||
159 | /* SPI flash chip (m25p64) */ | 159 | /* SPI flash chip (m25p64) */ |
160 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | 160 | static struct bfin5xx_spi_chip spi_flash_chip_info = { |
161 | .enable_dma = 0, /* use dma transfer with this chip*/ | 161 | .enable_dma = 0, /* use dma transfer with this chip*/ |
162 | .bits_per_word = 8, | ||
163 | }; | 162 | }; |
164 | #endif | 163 | #endif |
165 | 164 | ||
166 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | 165 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
167 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { | 166 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
168 | .enable_dma = 0, | 167 | .enable_dma = 0, |
169 | .bits_per_word = 8, | ||
170 | }; | 168 | }; |
171 | #endif | 169 | #endif |
172 | 170 | ||
diff --git a/arch/blackfin/mach-bf537/boards/pnav10.c b/arch/blackfin/mach-bf537/boards/pnav10.c index 9389f03e3b0a..3b8151d99b9a 100644 --- a/arch/blackfin/mach-bf537/boards/pnav10.c +++ b/arch/blackfin/mach-bf537/boards/pnav10.c | |||
@@ -184,40 +184,16 @@ static struct flash_platform_data bfin_spi_flash_data = { | |||
184 | /* SPI flash chip (m25p64) */ | 184 | /* SPI flash chip (m25p64) */ |
185 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | 185 | static struct bfin5xx_spi_chip spi_flash_chip_info = { |
186 | .enable_dma = 0, /* use dma transfer with this chip*/ | 186 | .enable_dma = 0, /* use dma transfer with this chip*/ |
187 | .bits_per_word = 8, | ||
188 | }; | ||
189 | #endif | ||
190 | |||
191 | #if defined(CONFIG_BFIN_SPI_ADC) \ | ||
192 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
193 | /* SPI ADC chip */ | ||
194 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | ||
195 | .enable_dma = 1, /* use dma transfer with this chip*/ | ||
196 | .bits_per_word = 16, | ||
197 | }; | ||
198 | #endif | ||
199 | |||
200 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \ | ||
201 | || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) | ||
202 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | ||
203 | .enable_dma = 0, | ||
204 | .bits_per_word = 16, | ||
205 | }; | 187 | }; |
206 | #endif | 188 | #endif |
207 | 189 | ||
208 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | 190 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
209 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { | 191 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
210 | .enable_dma = 0, | 192 | .enable_dma = 0, |
211 | .bits_per_word = 8, | ||
212 | }; | 193 | }; |
213 | #endif | 194 | #endif |
214 | 195 | ||
215 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) | 196 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) |
216 | static struct bfin5xx_spi_chip spi_ad7877_chip_info = { | ||
217 | .enable_dma = 0, | ||
218 | .bits_per_word = 16, | ||
219 | }; | ||
220 | |||
221 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { | 197 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { |
222 | .model = 7877, | 198 | .model = 7877, |
223 | .vref_delay_usecs = 50, /* internal, no capacitor */ | 199 | .vref_delay_usecs = 50, /* internal, no capacitor */ |
@@ -248,18 +224,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
248 | }, | 224 | }, |
249 | #endif | 225 | #endif |
250 | 226 | ||
251 | #if defined(CONFIG_BFIN_SPI_ADC) \ | ||
252 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
253 | { | ||
254 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | ||
255 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | ||
256 | .bus_num = 0, /* Framework bus number */ | ||
257 | .chip_select = 1, /* Framework chip select. */ | ||
258 | .platform_data = NULL, /* No spi_driver specific config */ | ||
259 | .controller_data = &spi_adc_chip_info, | ||
260 | }, | ||
261 | #endif | ||
262 | |||
263 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \ | 227 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \ |
264 | || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) | 228 | || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) |
265 | { | 229 | { |
@@ -267,7 +231,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
267 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 231 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
268 | .bus_num = 0, | 232 | .bus_num = 0, |
269 | .chip_select = 4, | 233 | .chip_select = 4, |
270 | .controller_data = &ad1836_spi_chip_info, | ||
271 | }, | 234 | }, |
272 | #endif | 235 | #endif |
273 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | 236 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
@@ -288,7 +251,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
288 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | 251 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ |
289 | .bus_num = 0, | 252 | .bus_num = 0, |
290 | .chip_select = 5, | 253 | .chip_select = 5, |
291 | .controller_data = &spi_ad7877_chip_info, | ||
292 | }, | 254 | }, |
293 | #endif | 255 | #endif |
294 | 256 | ||
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c index 3d166e362135..664588923dac 100644 --- a/arch/blackfin/mach-bf537/boards/stamp.c +++ b/arch/blackfin/mach-bf537/boards/stamp.c | |||
@@ -536,49 +536,11 @@ static struct flash_platform_data bfin_spi_flash_data = { | |||
536 | /* SPI flash chip (m25p64) */ | 536 | /* SPI flash chip (m25p64) */ |
537 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | 537 | static struct bfin5xx_spi_chip spi_flash_chip_info = { |
538 | .enable_dma = 0, /* use dma transfer with this chip*/ | 538 | .enable_dma = 0, /* use dma transfer with this chip*/ |
539 | .bits_per_word = 8, | ||
540 | }; | ||
541 | #endif | ||
542 | |||
543 | #if defined(CONFIG_BFIN_SPI_ADC) \ | ||
544 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
545 | /* SPI ADC chip */ | ||
546 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | ||
547 | .enable_dma = 1, /* use dma transfer with this chip*/ | ||
548 | .bits_per_word = 16, | ||
549 | }; | ||
550 | #endif | ||
551 | |||
552 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \ | ||
553 | || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) | ||
554 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | ||
555 | .enable_dma = 0, | ||
556 | .bits_per_word = 16, | ||
557 | }; | ||
558 | #endif | ||
559 | |||
560 | #if defined(CONFIG_SND_BF5XX_SOC_AD193X) \ | ||
561 | || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE) | ||
562 | static struct bfin5xx_spi_chip ad1938_spi_chip_info = { | ||
563 | .enable_dma = 0, | ||
564 | .bits_per_word = 8, | ||
565 | }; | ||
566 | #endif | ||
567 | |||
568 | #if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) \ | ||
569 | || defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE) | ||
570 | static struct bfin5xx_spi_chip adav801_spi_chip_info = { | ||
571 | .enable_dma = 0, | ||
572 | .bits_per_word = 8, | ||
573 | }; | 539 | }; |
574 | #endif | 540 | #endif |
575 | 541 | ||
576 | #if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE) | 542 | #if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE) |
577 | #include <linux/input/ad714x.h> | 543 | #include <linux/input/ad714x.h> |
578 | static struct bfin5xx_spi_chip ad7147_spi_chip_info = { | ||
579 | .enable_dma = 0, | ||
580 | .bits_per_word = 16, | ||
581 | }; | ||
582 | 544 | ||
583 | static struct ad714x_slider_plat ad7147_spi_slider_plat[] = { | 545 | static struct ad714x_slider_plat ad7147_spi_slider_plat[] = { |
584 | { | 546 | { |
@@ -688,7 +650,6 @@ static struct ad714x_platform_data ad7142_i2c_platform_data = { | |||
688 | #if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE) | 650 | #if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE) |
689 | static struct bfin5xx_spi_chip ad2s90_spi_chip_info = { | 651 | static struct bfin5xx_spi_chip ad2s90_spi_chip_info = { |
690 | .enable_dma = 0, | 652 | .enable_dma = 0, |
691 | .bits_per_word = 16, | ||
692 | }; | 653 | }; |
693 | #endif | 654 | #endif |
694 | 655 | ||
@@ -700,7 +661,6 @@ static unsigned short ad2s120x_platform_data[] = { | |||
700 | 661 | ||
701 | static struct bfin5xx_spi_chip ad2s120x_spi_chip_info = { | 662 | static struct bfin5xx_spi_chip ad2s120x_spi_chip_info = { |
702 | .enable_dma = 0, | 663 | .enable_dma = 0, |
703 | .bits_per_word = 16, | ||
704 | }; | 664 | }; |
705 | #endif | 665 | #endif |
706 | 666 | ||
@@ -717,14 +677,12 @@ static unsigned short ad2s1210_platform_data[] = { | |||
717 | 677 | ||
718 | static struct bfin5xx_spi_chip ad2s1210_spi_chip_info = { | 678 | static struct bfin5xx_spi_chip ad2s1210_spi_chip_info = { |
719 | .enable_dma = 0, | 679 | .enable_dma = 0, |
720 | .bits_per_word = 8, | ||
721 | }; | 680 | }; |
722 | #endif | 681 | #endif |
723 | 682 | ||
724 | #if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE) | 683 | #if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE) |
725 | static struct bfin5xx_spi_chip ad7314_spi_chip_info = { | 684 | static struct bfin5xx_spi_chip ad7314_spi_chip_info = { |
726 | .enable_dma = 0, | 685 | .enable_dma = 0, |
727 | .bits_per_word = 16, | ||
728 | }; | 686 | }; |
729 | #endif | 687 | #endif |
730 | 688 | ||
@@ -738,7 +696,6 @@ static unsigned short ad7816_platform_data[] = { | |||
738 | 696 | ||
739 | static struct bfin5xx_spi_chip ad7816_spi_chip_info = { | 697 | static struct bfin5xx_spi_chip ad7816_spi_chip_info = { |
740 | .enable_dma = 0, | 698 | .enable_dma = 0, |
741 | .bits_per_word = 8, | ||
742 | }; | 699 | }; |
743 | #endif | 700 | #endif |
744 | 701 | ||
@@ -752,7 +709,6 @@ static unsigned long adt7310_platform_data[3] = { | |||
752 | 709 | ||
753 | static struct bfin5xx_spi_chip adt7310_spi_chip_info = { | 710 | static struct bfin5xx_spi_chip adt7310_spi_chip_info = { |
754 | .enable_dma = 0, | 711 | .enable_dma = 0, |
755 | .bits_per_word = 8, | ||
756 | }; | 712 | }; |
757 | #endif | 713 | #endif |
758 | 714 | ||
@@ -761,11 +717,6 @@ static unsigned short ad7298_platform_data[] = { | |||
761 | GPIO_PF7, /* busy_pin */ | 717 | GPIO_PF7, /* busy_pin */ |
762 | 0, | 718 | 0, |
763 | }; | 719 | }; |
764 | |||
765 | static struct bfin5xx_spi_chip ad7298_spi_chip_info = { | ||
766 | .enable_dma = 0, | ||
767 | .bits_per_word = 16, | ||
768 | }; | ||
769 | #endif | 720 | #endif |
770 | 721 | ||
771 | #if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE) | 722 | #if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE) |
@@ -776,7 +727,6 @@ static unsigned long adt7316_spi_data[2] = { | |||
776 | 727 | ||
777 | static struct bfin5xx_spi_chip adt7316_spi_chip_info = { | 728 | static struct bfin5xx_spi_chip adt7316_spi_chip_info = { |
778 | .enable_dma = 0, | 729 | .enable_dma = 0, |
779 | .bits_per_word = 8, | ||
780 | }; | 730 | }; |
781 | #endif | 731 | #endif |
782 | 732 | ||
@@ -803,18 +753,12 @@ static struct mmc_spi_platform_data bfin_mmc_spi_pdata = { | |||
803 | 753 | ||
804 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { | 754 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
805 | .enable_dma = 0, | 755 | .enable_dma = 0, |
806 | .bits_per_word = 8, | ||
807 | .pio_interrupt = 0, | 756 | .pio_interrupt = 0, |
808 | }; | 757 | }; |
809 | #endif | 758 | #endif |
810 | 759 | ||
811 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) | 760 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) |
812 | #include <linux/spi/ad7877.h> | 761 | #include <linux/spi/ad7877.h> |
813 | static struct bfin5xx_spi_chip spi_ad7877_chip_info = { | ||
814 | .enable_dma = 0, | ||
815 | .bits_per_word = 16, | ||
816 | }; | ||
817 | |||
818 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { | 762 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { |
819 | .model = 7877, | 763 | .model = 7877, |
820 | .vref_delay_usecs = 50, /* internal, no capacitor */ | 764 | .vref_delay_usecs = 50, /* internal, no capacitor */ |
@@ -886,39 +830,13 @@ static const struct adxl34x_platform_data adxl34x_info = { | |||
886 | }; | 830 | }; |
887 | #endif | 831 | #endif |
888 | 832 | ||
889 | #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) | ||
890 | static struct bfin5xx_spi_chip spi_ad7879_chip_info = { | ||
891 | .enable_dma = 0, | ||
892 | .bits_per_word = 16, | ||
893 | }; | ||
894 | #endif | ||
895 | |||
896 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
897 | static struct bfin5xx_spi_chip spidev_chip_info = { | ||
898 | .enable_dma = 0, | ||
899 | .bits_per_word = 8, | ||
900 | }; | ||
901 | #endif | ||
902 | |||
903 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) | ||
904 | static struct bfin5xx_spi_chip lq035q1_spi_chip_info = { | ||
905 | .enable_dma = 0, | ||
906 | .bits_per_word = 8, | ||
907 | }; | ||
908 | #endif | ||
909 | |||
910 | #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE) | 833 | #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE) |
911 | static struct bfin5xx_spi_chip enc28j60_spi_chip_info = { | 834 | static struct bfin5xx_spi_chip enc28j60_spi_chip_info = { |
912 | .enable_dma = 1, | 835 | .enable_dma = 1, |
913 | .bits_per_word = 8, | ||
914 | }; | 836 | }; |
915 | #endif | 837 | #endif |
916 | 838 | ||
917 | #if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE) | 839 | #if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE) |
918 | static struct bfin5xx_spi_chip adf7021_spi_chip_info = { | ||
919 | .bits_per_word = 16, | ||
920 | }; | ||
921 | |||
922 | #include <linux/spi/adf702x.h> | 840 | #include <linux/spi/adf702x.h> |
923 | #define TXREG 0x0160A470 | 841 | #define TXREG 0x0160A470 |
924 | static const u32 adf7021_regs[] = { | 842 | static const u32 adf7021_regs[] = { |
@@ -962,10 +880,6 @@ static inline void adf702x_mac_init(void) {} | |||
962 | 880 | ||
963 | #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) | 881 | #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) |
964 | #include <linux/spi/ads7846.h> | 882 | #include <linux/spi/ads7846.h> |
965 | static struct bfin5xx_spi_chip ad7873_spi_chip_info = { | ||
966 | .bits_per_word = 8, | ||
967 | }; | ||
968 | |||
969 | static int ads7873_get_pendown_state(void) | 883 | static int ads7873_get_pendown_state(void) |
970 | { | 884 | { |
971 | return gpio_get_value(GPIO_PF6); | 885 | return gpio_get_value(GPIO_PF6); |
@@ -1012,21 +926,12 @@ static struct flash_platform_data bfin_spi_dataflash_data = { | |||
1012 | /* DataFlash chip */ | 926 | /* DataFlash chip */ |
1013 | static struct bfin5xx_spi_chip data_flash_chip_info = { | 927 | static struct bfin5xx_spi_chip data_flash_chip_info = { |
1014 | .enable_dma = 0, /* use dma transfer with this chip*/ | 928 | .enable_dma = 0, /* use dma transfer with this chip*/ |
1015 | .bits_per_word = 8, | ||
1016 | }; | ||
1017 | #endif | ||
1018 | |||
1019 | #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE) | ||
1020 | static struct bfin5xx_spi_chip spi_adxl34x_chip_info = { | ||
1021 | .enable_dma = 0, /* use dma transfer with this chip*/ | ||
1022 | .bits_per_word = 8, | ||
1023 | }; | 929 | }; |
1024 | #endif | 930 | #endif |
1025 | 931 | ||
1026 | #if defined(CONFIG_AD7476) || defined(CONFIG_AD7476_MODULE) | 932 | #if defined(CONFIG_AD7476) || defined(CONFIG_AD7476_MODULE) |
1027 | static struct bfin5xx_spi_chip spi_ad7476_chip_info = { | 933 | static struct bfin5xx_spi_chip spi_ad7476_chip_info = { |
1028 | .enable_dma = 0, /* use dma transfer with this chip*/ | 934 | .enable_dma = 0, /* use dma transfer with this chip*/ |
1029 | .bits_per_word = 8, | ||
1030 | }; | 935 | }; |
1031 | #endif | 936 | #endif |
1032 | 937 | ||
@@ -1056,17 +961,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
1056 | .mode = SPI_MODE_3, | 961 | .mode = SPI_MODE_3, |
1057 | }, | 962 | }, |
1058 | #endif | 963 | #endif |
1059 | #if defined(CONFIG_BFIN_SPI_ADC) \ | ||
1060 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
1061 | { | ||
1062 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | ||
1063 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | ||
1064 | .bus_num = 0, /* Framework bus number */ | ||
1065 | .chip_select = 1, /* Framework chip select. */ | ||
1066 | .platform_data = NULL, /* No spi_driver specific config */ | ||
1067 | .controller_data = &spi_adc_chip_info, | ||
1068 | }, | ||
1069 | #endif | ||
1070 | 964 | ||
1071 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \ | 965 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \ |
1072 | || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) | 966 | || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) |
@@ -1076,7 +970,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
1076 | .bus_num = 0, | 970 | .bus_num = 0, |
1077 | .chip_select = 4, | 971 | .chip_select = 4, |
1078 | .platform_data = "ad1836", /* only includes chip name for the moment */ | 972 | .platform_data = "ad1836", /* only includes chip name for the moment */ |
1079 | .controller_data = &ad1836_spi_chip_info, | ||
1080 | .mode = SPI_MODE_3, | 973 | .mode = SPI_MODE_3, |
1081 | }, | 974 | }, |
1082 | #endif | 975 | #endif |
@@ -1087,7 +980,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
1087 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 980 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
1088 | .bus_num = 0, | 981 | .bus_num = 0, |
1089 | .chip_select = 5, | 982 | .chip_select = 5, |
1090 | .controller_data = &ad1938_spi_chip_info, | ||
1091 | .mode = SPI_MODE_3, | 983 | .mode = SPI_MODE_3, |
1092 | }, | 984 | }, |
1093 | #endif | 985 | #endif |
@@ -1098,7 +990,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
1098 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 990 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
1099 | .bus_num = 0, | 991 | .bus_num = 0, |
1100 | .chip_select = 1, | 992 | .chip_select = 1, |
1101 | .controller_data = &adav801_spi_chip_info, | ||
1102 | .mode = SPI_MODE_3, | 993 | .mode = SPI_MODE_3, |
1103 | }, | 994 | }, |
1104 | #endif | 995 | #endif |
@@ -1112,7 +1003,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
1112 | .chip_select = 5, | 1003 | .chip_select = 5, |
1113 | .mode = SPI_MODE_3, | 1004 | .mode = SPI_MODE_3, |
1114 | .platform_data = &ad7147_spi_platform_data, | 1005 | .platform_data = &ad7147_spi_platform_data, |
1115 | .controller_data = &ad7147_spi_chip_info, | ||
1116 | }, | 1006 | }, |
1117 | #endif | 1007 | #endif |
1118 | 1008 | ||
@@ -1191,7 +1081,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
1191 | .bus_num = 0, | 1081 | .bus_num = 0, |
1192 | .chip_select = 4, /* CS, change it for your board */ | 1082 | .chip_select = 4, /* CS, change it for your board */ |
1193 | .platform_data = ad7298_platform_data, | 1083 | .platform_data = ad7298_platform_data, |
1194 | .controller_data = &ad7298_spi_chip_info, | ||
1195 | .mode = SPI_MODE_3, | 1084 | .mode = SPI_MODE_3, |
1196 | }, | 1085 | }, |
1197 | #endif | 1086 | #endif |
@@ -1228,7 +1117,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
1228 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | 1117 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ |
1229 | .bus_num = 0, | 1118 | .bus_num = 0, |
1230 | .chip_select = 1, | 1119 | .chip_select = 1, |
1231 | .controller_data = &spi_ad7877_chip_info, | ||
1232 | }, | 1120 | }, |
1233 | #endif | 1121 | #endif |
1234 | #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) | 1122 | #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) |
@@ -1239,7 +1127,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
1239 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ | 1127 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ |
1240 | .bus_num = 0, | 1128 | .bus_num = 0, |
1241 | .chip_select = 1, | 1129 | .chip_select = 1, |
1242 | .controller_data = &spi_ad7879_chip_info, | ||
1243 | .mode = SPI_CPHA | SPI_CPOL, | 1130 | .mode = SPI_CPHA | SPI_CPOL, |
1244 | }, | 1131 | }, |
1245 | #endif | 1132 | #endif |
@@ -1249,7 +1136,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
1249 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 1136 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
1250 | .bus_num = 0, | 1137 | .bus_num = 0, |
1251 | .chip_select = 1, | 1138 | .chip_select = 1, |
1252 | .controller_data = &spidev_chip_info, | ||
1253 | }, | 1139 | }, |
1254 | #endif | 1140 | #endif |
1255 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) | 1141 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) |
@@ -1258,7 +1144,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
1258 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ | 1144 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
1259 | .bus_num = 0, | 1145 | .bus_num = 0, |
1260 | .chip_select = 2, | 1146 | .chip_select = 2, |
1261 | .controller_data = &lq035q1_spi_chip_info, | ||
1262 | .mode = SPI_CPHA | SPI_CPOL, | 1147 | .mode = SPI_CPHA | SPI_CPOL, |
1263 | }, | 1148 | }, |
1264 | #endif | 1149 | #endif |
@@ -1281,7 +1166,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
1281 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ | 1166 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ |
1282 | .bus_num = 0, | 1167 | .bus_num = 0, |
1283 | .chip_select = 2, | 1168 | .chip_select = 2, |
1284 | .controller_data = &spi_adxl34x_chip_info, | ||
1285 | .mode = SPI_MODE_3, | 1169 | .mode = SPI_MODE_3, |
1286 | }, | 1170 | }, |
1287 | #endif | 1171 | #endif |
@@ -1291,7 +1175,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
1291 | .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */ | 1175 | .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */ |
1292 | .bus_num = 0, | 1176 | .bus_num = 0, |
1293 | .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */ | 1177 | .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */ |
1294 | .controller_data = &adf7021_spi_chip_info, | ||
1295 | .platform_data = &adf7021_platform_data, | 1178 | .platform_data = &adf7021_platform_data, |
1296 | .mode = SPI_MODE_0, | 1179 | .mode = SPI_MODE_0, |
1297 | }, | 1180 | }, |
@@ -1303,7 +1186,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
1303 | .bus_num = 0, | 1186 | .bus_num = 0, |
1304 | .irq = IRQ_PF6, | 1187 | .irq = IRQ_PF6, |
1305 | .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */ | 1188 | .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */ |
1306 | .controller_data = &ad7873_spi_chip_info, | ||
1307 | .platform_data = &ad7873_pdata, | 1189 | .platform_data = &ad7873_pdata, |
1308 | .mode = SPI_MODE_0, | 1190 | .mode = SPI_MODE_0, |
1309 | }, | 1191 | }, |
diff --git a/arch/blackfin/mach-bf537/boards/tcm_bf537.c b/arch/blackfin/mach-bf537/boards/tcm_bf537.c index 6d4c1caaa945..9b7287abdfa1 100644 --- a/arch/blackfin/mach-bf537/boards/tcm_bf537.c +++ b/arch/blackfin/mach-bf537/boards/tcm_bf537.c | |||
@@ -62,29 +62,12 @@ static struct flash_platform_data bfin_spi_flash_data = { | |||
62 | /* SPI flash chip (m25p64) */ | 62 | /* SPI flash chip (m25p64) */ |
63 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | 63 | static struct bfin5xx_spi_chip spi_flash_chip_info = { |
64 | .enable_dma = 0, /* use dma transfer with this chip*/ | 64 | .enable_dma = 0, /* use dma transfer with this chip*/ |
65 | .bits_per_word = 8, | ||
66 | }; | ||
67 | #endif | ||
68 | |||
69 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
70 | /* SPI ADC chip */ | ||
71 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | ||
72 | .enable_dma = 1, /* use dma transfer with this chip*/ | ||
73 | .bits_per_word = 16, | ||
74 | }; | ||
75 | #endif | ||
76 | |||
77 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) | ||
78 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | ||
79 | .enable_dma = 0, | ||
80 | .bits_per_word = 16, | ||
81 | }; | 65 | }; |
82 | #endif | 66 | #endif |
83 | 67 | ||
84 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | 68 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
85 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { | 69 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
86 | .enable_dma = 0, | 70 | .enable_dma = 0, |
87 | .bits_per_word = 8, | ||
88 | }; | 71 | }; |
89 | #endif | 72 | #endif |
90 | 73 | ||
@@ -102,24 +85,12 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
102 | }, | 85 | }, |
103 | #endif | 86 | #endif |
104 | 87 | ||
105 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
106 | { | ||
107 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | ||
108 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | ||
109 | .bus_num = 0, /* Framework bus number */ | ||
110 | .chip_select = 1, /* Framework chip select. */ | ||
111 | .platform_data = NULL, /* No spi_driver specific config */ | ||
112 | .controller_data = &spi_adc_chip_info, | ||
113 | }, | ||
114 | #endif | ||
115 | |||
116 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) | 88 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) |
117 | { | 89 | { |
118 | .modalias = "ad183x", | 90 | .modalias = "ad183x", |
119 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 91 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
120 | .bus_num = 0, | 92 | .bus_num = 0, |
121 | .chip_select = 4, | 93 | .chip_select = 4, |
122 | .controller_data = &ad1836_spi_chip_info, | ||
123 | }, | 94 | }, |
124 | #endif | 95 | #endif |
125 | 96 | ||
diff --git a/arch/blackfin/mach-bf538/boards/ezkit.c b/arch/blackfin/mach-bf538/boards/ezkit.c index e61424ef35eb..629f3c333415 100644 --- a/arch/blackfin/mach-bf538/boards/ezkit.c +++ b/arch/blackfin/mach-bf538/boards/ezkit.c | |||
@@ -502,7 +502,6 @@ static struct flash_platform_data bfin_spi_flash_data = { | |||
502 | 502 | ||
503 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | 503 | static struct bfin5xx_spi_chip spi_flash_chip_info = { |
504 | .enable_dma = 0, /* use dma transfer with this chip*/ | 504 | .enable_dma = 0, /* use dma transfer with this chip*/ |
505 | .bits_per_word = 8, | ||
506 | }; | 505 | }; |
507 | #endif | 506 | #endif |
508 | 507 | ||
@@ -523,13 +522,6 @@ static const struct ad7879_platform_data bfin_ad7879_ts_info = { | |||
523 | }; | 522 | }; |
524 | #endif | 523 | #endif |
525 | 524 | ||
526 | #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) | ||
527 | static struct bfin5xx_spi_chip spi_ad7879_chip_info = { | ||
528 | .enable_dma = 0, | ||
529 | .bits_per_word = 16, | ||
530 | }; | ||
531 | #endif | ||
532 | |||
533 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) | 525 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) |
534 | #include <asm/bfin-lq035q1.h> | 526 | #include <asm/bfin-lq035q1.h> |
535 | 527 | ||
@@ -559,20 +551,6 @@ static struct platform_device bfin_lq035q1_device = { | |||
559 | }; | 551 | }; |
560 | #endif | 552 | #endif |
561 | 553 | ||
562 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
563 | static struct bfin5xx_spi_chip spidev_chip_info = { | ||
564 | .enable_dma = 0, | ||
565 | .bits_per_word = 8, | ||
566 | }; | ||
567 | #endif | ||
568 | |||
569 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) | ||
570 | static struct bfin5xx_spi_chip lq035q1_spi_chip_info = { | ||
571 | .enable_dma = 0, | ||
572 | .bits_per_word = 8, | ||
573 | }; | ||
574 | #endif | ||
575 | |||
576 | static struct spi_board_info bf538_spi_board_info[] __initdata = { | 554 | static struct spi_board_info bf538_spi_board_info[] __initdata = { |
577 | #if defined(CONFIG_MTD_M25P80) \ | 555 | #if defined(CONFIG_MTD_M25P80) \ |
578 | || defined(CONFIG_MTD_M25P80_MODULE) | 556 | || defined(CONFIG_MTD_M25P80_MODULE) |
@@ -595,7 +573,6 @@ static struct spi_board_info bf538_spi_board_info[] __initdata = { | |||
595 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ | 573 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ |
596 | .bus_num = 0, | 574 | .bus_num = 0, |
597 | .chip_select = 1, | 575 | .chip_select = 1, |
598 | .controller_data = &spi_ad7879_chip_info, | ||
599 | .mode = SPI_CPHA | SPI_CPOL, | 576 | .mode = SPI_CPHA | SPI_CPOL, |
600 | }, | 577 | }, |
601 | #endif | 578 | #endif |
@@ -605,7 +582,6 @@ static struct spi_board_info bf538_spi_board_info[] __initdata = { | |||
605 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ | 582 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
606 | .bus_num = 0, | 583 | .bus_num = 0, |
607 | .chip_select = 2, | 584 | .chip_select = 2, |
608 | .controller_data = &lq035q1_spi_chip_info, | ||
609 | .mode = SPI_CPHA | SPI_CPOL, | 585 | .mode = SPI_CPHA | SPI_CPOL, |
610 | }, | 586 | }, |
611 | #endif | 587 | #endif |
@@ -615,7 +591,6 @@ static struct spi_board_info bf538_spi_board_info[] __initdata = { | |||
615 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 591 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
616 | .bus_num = 0, | 592 | .bus_num = 0, |
617 | .chip_select = 1, | 593 | .chip_select = 1, |
618 | .controller_data = &spidev_chip_info, | ||
619 | }, | 594 | }, |
620 | #endif | 595 | #endif |
621 | }; | 596 | }; |
diff --git a/arch/blackfin/mach-bf548/boards/cm_bf548.c b/arch/blackfin/mach-bf548/boards/cm_bf548.c index d11502ac5623..212b9e0a08c8 100644 --- a/arch/blackfin/mach-bf548/boards/cm_bf548.c +++ b/arch/blackfin/mach-bf548/boards/cm_bf548.c | |||
@@ -861,16 +861,10 @@ static struct flash_platform_data bfin_spi_flash_data = { | |||
861 | 861 | ||
862 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | 862 | static struct bfin5xx_spi_chip spi_flash_chip_info = { |
863 | .enable_dma = 0, /* use dma transfer with this chip*/ | 863 | .enable_dma = 0, /* use dma transfer with this chip*/ |
864 | .bits_per_word = 8, | ||
865 | }; | 864 | }; |
866 | #endif | 865 | #endif |
867 | 866 | ||
868 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) | 867 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) |
869 | static struct bfin5xx_spi_chip spi_ad7877_chip_info = { | ||
870 | .enable_dma = 0, | ||
871 | .bits_per_word = 16, | ||
872 | }; | ||
873 | |||
874 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { | 868 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { |
875 | .model = 7877, | 869 | .model = 7877, |
876 | .vref_delay_usecs = 50, /* internal, no capacitor */ | 870 | .vref_delay_usecs = 50, /* internal, no capacitor */ |
@@ -886,13 +880,6 @@ static const struct ad7877_platform_data bfin_ad7877_ts_info = { | |||
886 | }; | 880 | }; |
887 | #endif | 881 | #endif |
888 | 882 | ||
889 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
890 | static struct bfin5xx_spi_chip spidev_chip_info = { | ||
891 | .enable_dma = 0, | ||
892 | .bits_per_word = 8, | ||
893 | }; | ||
894 | #endif | ||
895 | |||
896 | static struct spi_board_info bf54x_spi_board_info[] __initdata = { | 883 | static struct spi_board_info bf54x_spi_board_info[] __initdata = { |
897 | #if defined(CONFIG_MTD_M25P80) \ | 884 | #if defined(CONFIG_MTD_M25P80) \ |
898 | || defined(CONFIG_MTD_M25P80_MODULE) | 885 | || defined(CONFIG_MTD_M25P80_MODULE) |
@@ -915,7 +902,6 @@ static struct spi_board_info bf54x_spi_board_info[] __initdata = { | |||
915 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | 902 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ |
916 | .bus_num = 0, | 903 | .bus_num = 0, |
917 | .chip_select = 2, | 904 | .chip_select = 2, |
918 | .controller_data = &spi_ad7877_chip_info, | ||
919 | }, | 905 | }, |
920 | #endif | 906 | #endif |
921 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | 907 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) |
@@ -924,7 +910,6 @@ static struct spi_board_info bf54x_spi_board_info[] __initdata = { | |||
924 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 910 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
925 | .bus_num = 0, | 911 | .bus_num = 0, |
926 | .chip_select = 1, | 912 | .chip_select = 1, |
927 | .controller_data = &spidev_chip_info, | ||
928 | }, | 913 | }, |
929 | #endif | 914 | #endif |
930 | }; | 915 | }; |
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c index 311bf9970fe7..cd9cbb68de69 100644 --- a/arch/blackfin/mach-bf548/boards/ezkit.c +++ b/arch/blackfin/mach-bf548/boards/ezkit.c | |||
@@ -1018,24 +1018,10 @@ static struct flash_platform_data bfin_spi_flash_data = { | |||
1018 | 1018 | ||
1019 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | 1019 | static struct bfin5xx_spi_chip spi_flash_chip_info = { |
1020 | .enable_dma = 0, /* use dma transfer with this chip*/ | 1020 | .enable_dma = 0, /* use dma transfer with this chip*/ |
1021 | .bits_per_word = 8, | ||
1022 | }; | ||
1023 | #endif | ||
1024 | |||
1025 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \ | ||
1026 | || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) | ||
1027 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | ||
1028 | .enable_dma = 0, | ||
1029 | .bits_per_word = 16, | ||
1030 | }; | 1021 | }; |
1031 | #endif | 1022 | #endif |
1032 | 1023 | ||
1033 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) | 1024 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) |
1034 | static struct bfin5xx_spi_chip spi_ad7877_chip_info = { | ||
1035 | .enable_dma = 0, | ||
1036 | .bits_per_word = 16, | ||
1037 | }; | ||
1038 | |||
1039 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { | 1025 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { |
1040 | .model = 7877, | 1026 | .model = 7877, |
1041 | .vref_delay_usecs = 50, /* internal, no capacitor */ | 1027 | .vref_delay_usecs = 50, /* internal, no capacitor */ |
@@ -1051,20 +1037,6 @@ static const struct ad7877_platform_data bfin_ad7877_ts_info = { | |||
1051 | }; | 1037 | }; |
1052 | #endif | 1038 | #endif |
1053 | 1039 | ||
1054 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
1055 | static struct bfin5xx_spi_chip spidev_chip_info = { | ||
1056 | .enable_dma = 0, | ||
1057 | .bits_per_word = 8, | ||
1058 | }; | ||
1059 | #endif | ||
1060 | |||
1061 | #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE) | ||
1062 | static struct bfin5xx_spi_chip spi_adxl34x_chip_info = { | ||
1063 | .enable_dma = 0, /* use dma transfer with this chip*/ | ||
1064 | .bits_per_word = 8, | ||
1065 | }; | ||
1066 | #endif | ||
1067 | |||
1068 | static struct spi_board_info bfin_spi_board_info[] __initdata = { | 1040 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
1069 | #if defined(CONFIG_MTD_M25P80) \ | 1041 | #if defined(CONFIG_MTD_M25P80) \ |
1070 | || defined(CONFIG_MTD_M25P80_MODULE) | 1042 | || defined(CONFIG_MTD_M25P80_MODULE) |
@@ -1086,7 +1058,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
1086 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 1058 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
1087 | .bus_num = 1, | 1059 | .bus_num = 1, |
1088 | .chip_select = 4, | 1060 | .chip_select = 4, |
1089 | .controller_data = &ad1836_spi_chip_info, | ||
1090 | }, | 1061 | }, |
1091 | #endif | 1062 | #endif |
1092 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) | 1063 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) |
@@ -1097,7 +1068,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
1097 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | 1068 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ |
1098 | .bus_num = 0, | 1069 | .bus_num = 0, |
1099 | .chip_select = 2, | 1070 | .chip_select = 2, |
1100 | .controller_data = &spi_ad7877_chip_info, | ||
1101 | }, | 1071 | }, |
1102 | #endif | 1072 | #endif |
1103 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | 1073 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) |
@@ -1106,7 +1076,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
1106 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 1076 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
1107 | .bus_num = 0, | 1077 | .bus_num = 0, |
1108 | .chip_select = 1, | 1078 | .chip_select = 1, |
1109 | .controller_data = &spidev_chip_info, | ||
1110 | }, | 1079 | }, |
1111 | #endif | 1080 | #endif |
1112 | #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE) | 1081 | #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE) |
@@ -1117,7 +1086,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
1117 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ | 1086 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ |
1118 | .bus_num = 1, | 1087 | .bus_num = 1, |
1119 | .chip_select = 2, | 1088 | .chip_select = 2, |
1120 | .controller_data = &spi_adxl34x_chip_info, | ||
1121 | .mode = SPI_MODE_3, | 1089 | .mode = SPI_MODE_3, |
1122 | }, | 1090 | }, |
1123 | #endif | 1091 | #endif |
diff --git a/arch/blackfin/mach-bf561/boards/acvilon.c b/arch/blackfin/mach-bf561/boards/acvilon.c index 9231a942892b..972e1347c6bc 100644 --- a/arch/blackfin/mach-bf561/boards/acvilon.c +++ b/arch/blackfin/mach-bf561/boards/acvilon.c | |||
@@ -364,14 +364,6 @@ static struct flash_platform_data bfin_spi_dataflash_data = { | |||
364 | /* DataFlash chip */ | 364 | /* DataFlash chip */ |
365 | static struct bfin5xx_spi_chip data_flash_chip_info = { | 365 | static struct bfin5xx_spi_chip data_flash_chip_info = { |
366 | .enable_dma = 0, /* use dma transfer with this chip */ | 366 | .enable_dma = 0, /* use dma transfer with this chip */ |
367 | .bits_per_word = 8, | ||
368 | }; | ||
369 | #endif | ||
370 | |||
371 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
372 | static struct bfin5xx_spi_chip spidev_chip_info = { | ||
373 | .enable_dma = 0, | ||
374 | .bits_per_word = 8, | ||
375 | }; | 367 | }; |
376 | #endif | 368 | #endif |
377 | 369 | ||
@@ -420,7 +412,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
420 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 412 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
421 | .bus_num = 0, | 413 | .bus_num = 0, |
422 | .chip_select = 3, | 414 | .chip_select = 3, |
423 | .controller_data = &spidev_chip_info, | ||
424 | }, | 415 | }, |
425 | #endif | 416 | #endif |
426 | #if defined(CONFIG_MTD_DATAFLASH) || defined(CONFIG_MTD_DATAFLASH_MODULE) | 417 | #if defined(CONFIG_MTD_DATAFLASH) || defined(CONFIG_MTD_DATAFLASH_MODULE) |
diff --git a/arch/blackfin/mach-bf561/boards/cm_bf561.c b/arch/blackfin/mach-bf561/boards/cm_bf561.c index 2e481362065b..e4f397d1d65b 100644 --- a/arch/blackfin/mach-bf561/boards/cm_bf561.c +++ b/arch/blackfin/mach-bf561/boards/cm_bf561.c | |||
@@ -60,29 +60,6 @@ static struct flash_platform_data bfin_spi_flash_data = { | |||
60 | /* SPI flash chip (m25p64) */ | 60 | /* SPI flash chip (m25p64) */ |
61 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | 61 | static struct bfin5xx_spi_chip spi_flash_chip_info = { |
62 | .enable_dma = 0, /* use dma transfer with this chip*/ | 62 | .enable_dma = 0, /* use dma transfer with this chip*/ |
63 | .bits_per_word = 8, | ||
64 | }; | ||
65 | #endif | ||
66 | |||
67 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
68 | /* SPI ADC chip */ | ||
69 | static struct bfin5xx_spi_chip spi_adc_chip_info = { | ||
70 | .enable_dma = 1, /* use dma transfer with this chip*/ | ||
71 | .bits_per_word = 16, | ||
72 | }; | ||
73 | #endif | ||
74 | |||
75 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) | ||
76 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | ||
77 | .enable_dma = 0, | ||
78 | .bits_per_word = 16, | ||
79 | }; | ||
80 | #endif | ||
81 | |||
82 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | ||
83 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { | ||
84 | .enable_dma = 0, | ||
85 | .bits_per_word = 8, | ||
86 | }; | 63 | }; |
87 | #endif | 64 | #endif |
88 | 65 | ||
@@ -100,24 +77,12 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
100 | }, | 77 | }, |
101 | #endif | 78 | #endif |
102 | 79 | ||
103 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) | ||
104 | { | ||
105 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ | ||
106 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ | ||
107 | .bus_num = 0, /* Framework bus number */ | ||
108 | .chip_select = 1, /* Framework chip select. */ | ||
109 | .platform_data = NULL, /* No spi_driver specific config */ | ||
110 | .controller_data = &spi_adc_chip_info, | ||
111 | }, | ||
112 | #endif | ||
113 | |||
114 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) | 80 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) |
115 | { | 81 | { |
116 | .modalias = "ad183x", | 82 | .modalias = "ad183x", |
117 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 83 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
118 | .bus_num = 0, | 84 | .bus_num = 0, |
119 | .chip_select = 4, | 85 | .chip_select = 4, |
120 | .controller_data = &ad1836_spi_chip_info, | ||
121 | }, | 86 | }, |
122 | #endif | 87 | #endif |
123 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) | 88 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
@@ -126,7 +91,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
126 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ | 91 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
127 | .bus_num = 0, | 92 | .bus_num = 0, |
128 | .chip_select = 1, | 93 | .chip_select = 1, |
129 | .controller_data = &mmc_spi_chip_info, | ||
130 | .mode = SPI_MODE_3, | 94 | .mode = SPI_MODE_3, |
131 | }, | 95 | }, |
132 | #endif | 96 | #endif |
diff --git a/arch/blackfin/mach-bf561/boards/ezkit.c b/arch/blackfin/mach-bf561/boards/ezkit.c index ba8149858714..9490dc800ca5 100644 --- a/arch/blackfin/mach-bf561/boards/ezkit.c +++ b/arch/blackfin/mach-bf561/boards/ezkit.c | |||
@@ -286,21 +286,6 @@ static struct platform_device ezkit_flash_device = { | |||
286 | }; | 286 | }; |
287 | #endif | 287 | #endif |
288 | 288 | ||
289 | #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \ | ||
290 | || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) | ||
291 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | ||
292 | .enable_dma = 0, | ||
293 | .bits_per_word = 16, | ||
294 | }; | ||
295 | #endif | ||
296 | |||
297 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) | ||
298 | static struct bfin5xx_spi_chip spidev_chip_info = { | ||
299 | .enable_dma = 0, | ||
300 | .bits_per_word = 8, | ||
301 | }; | ||
302 | #endif | ||
303 | |||
304 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | 289 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
305 | /* SPI (0) */ | 290 | /* SPI (0) */ |
306 | static struct resource bfin_spi0_resource[] = { | 291 | static struct resource bfin_spi0_resource[] = { |
@@ -348,7 +333,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
348 | .bus_num = 0, | 333 | .bus_num = 0, |
349 | .chip_select = 4, | 334 | .chip_select = 4, |
350 | .platform_data = "ad1836", /* only includes chip name for the moment */ | 335 | .platform_data = "ad1836", /* only includes chip name for the moment */ |
351 | .controller_data = &ad1836_spi_chip_info, | ||
352 | .mode = SPI_MODE_3, | 336 | .mode = SPI_MODE_3, |
353 | }, | 337 | }, |
354 | #endif | 338 | #endif |
@@ -358,7 +342,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
358 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 342 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
359 | .bus_num = 0, | 343 | .bus_num = 0, |
360 | .chip_select = 1, | 344 | .chip_select = 1, |
361 | .controller_data = &spidev_chip_info, | ||
362 | }, | 345 | }, |
363 | #endif | 346 | #endif |
364 | }; | 347 | }; |