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-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/Makefile6
-rw-r--r--arch/arm/mach-omap1/common.h9
-rw-r--r--arch/arm/mach-omap1/devices.c121
-rw-r--r--arch/arm/mach-omap1/time.c16
-rw-r--r--arch/arm/mach-omap1/timer32k.c28
-rw-r--r--arch/arm/mach-omap2/Kconfig8
-rw-r--r--arch/arm/mach-omap2/Makefile167
-rw-r--r--arch/arm/mach-omap2/common.h4
-rw-r--r--arch/arm/mach-omap2/devices.c19
-rw-r--r--arch/arm/mach-omap2/dma.c11
-rw-r--r--arch/arm/mach-omap2/dsp.c27
-rw-r--r--arch/arm/mach-omap2/gpmc.c30
-rw-r--r--arch/arm/mach-omap2/hsmmc.c8
-rw-r--r--arch/arm/mach-omap2/id.c7
-rw-r--r--arch/arm/mach-omap2/include/mach/omap-wakeupgen.h8
-rw-r--r--arch/arm/mach-omap2/io.c38
-rw-r--r--arch/arm/mach-omap2/iomap.h28
-rw-r--r--arch/arm/mach-omap2/irq.c2
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/powerdomains3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/timer.c118
-rw-r--r--arch/arm/mach-omap2/usb-musb.c2
-rw-r--r--arch/arm/mach-omap2/voltagedomains3xxx_data.c2
-rw-r--r--arch/arm/mach-s3c24xx/Makefile6
-rw-r--r--arch/arm/mach-s3c24xx/common.c (renamed from arch/arm/plat-s3c24xx/cpu.c)69
-rw-r--r--arch/arm/mach-s3c24xx/irq-pm.c (renamed from arch/arm/plat-s3c24xx/irq-pm.c)0
-rw-r--r--arch/arm/mach-s3c24xx/pm.c (renamed from arch/arm/plat-s3c24xx/pm.c)0
-rw-r--r--arch/arm/mach-s3c24xx/sleep.S (renamed from arch/arm/plat-s3c24xx/sleep.S)0
-rw-r--r--arch/arm/plat-omap/counter_32k.c93
-rw-r--r--arch/arm/plat-omap/devices.c122
-rw-r--r--arch/arm/plat-omap/dma.c4
-rw-r--r--arch/arm/plat-omap/dmtimer.c2
-rw-r--r--arch/arm/plat-omap/include/plat/common.h2
-rw-r--r--arch/arm/plat-omap/include/plat/cpu.h8
-rw-r--r--arch/arm/plat-omap/include/plat/dma.h5
-rw-r--r--arch/arm/plat-omap/include/plat/dmtimer.h1
-rw-r--r--arch/arm/plat-omap/include/plat/mmc.h9
-rw-r--r--arch/arm/plat-s3c24xx/Makefile6
-rw-r--r--arch/arm/plat-s3c24xx/clock.c59
-rw-r--r--arch/arm/plat-s3c24xx/dev-uart.c100
-rw-r--r--arch/arm/plat-s5p/Kconfig132
-rw-r--r--arch/arm/plat-s5p/Makefile27
-rw-r--r--arch/arm/plat-samsung/Kconfig140
-rw-r--r--arch/arm/plat-samsung/Makefile13
-rw-r--r--arch/arm/plat-samsung/s5p-clock.c (renamed from arch/arm/plat-s5p/clock.c)3
-rw-r--r--arch/arm/plat-samsung/s5p-dev-mfc.c (renamed from arch/arm/plat-s5p/dev-mfc.c)4
-rw-r--r--arch/arm/plat-samsung/s5p-dev-uart.c (renamed from arch/arm/plat-s5p/dev-uart.c)78
-rw-r--r--arch/arm/plat-samsung/s5p-irq-eint.c (renamed from arch/arm/plat-s5p/irq-eint.c)3
-rw-r--r--arch/arm/plat-samsung/s5p-irq-gpioint.c (renamed from arch/arm/plat-s5p/irq-gpioint.c)3
-rw-r--r--arch/arm/plat-samsung/s5p-irq-pm.c (renamed from arch/arm/plat-s5p/irq-pm.c)3
-rw-r--r--arch/arm/plat-samsung/s5p-irq.c (renamed from arch/arm/plat-s5p/irq.c)3
-rw-r--r--arch/arm/plat-samsung/s5p-pm.c (renamed from arch/arm/plat-s5p/pm.c)3
-rw-r--r--arch/arm/plat-samsung/s5p-sleep.S (renamed from arch/arm/plat-s5p/sleep.S)3
-rw-r--r--arch/arm/plat-samsung/s5p-time.c (renamed from arch/arm/plat-s5p/s5p-time.c)3
-rw-r--r--arch/arm/plat-samsung/setup-mipiphy.c (renamed from arch/arm/plat-s5p/setup-mipiphy.c)0
56 files changed, 718 insertions, 850 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3ca1ba981efb..4c3e10cc9511 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1051,7 +1051,6 @@ source "arch/arm/mach-sa1100/Kconfig"
1051 1051
1052source "arch/arm/plat-samsung/Kconfig" 1052source "arch/arm/plat-samsung/Kconfig"
1053source "arch/arm/plat-s3c24xx/Kconfig" 1053source "arch/arm/plat-s3c24xx/Kconfig"
1054source "arch/arm/plat-s5p/Kconfig"
1055 1054
1056source "arch/arm/plat-spear/Kconfig" 1055source "arch/arm/plat-spear/Kconfig"
1057 1056
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 157900da8782..18194acab493 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -160,9 +160,7 @@ machine-$(CONFIG_ARCH_MXS) := mxs
160machine-$(CONFIG_ARCH_NETX) := netx 160machine-$(CONFIG_ARCH_NETX) := netx
161machine-$(CONFIG_ARCH_NOMADIK) := nomadik 161machine-$(CONFIG_ARCH_NOMADIK) := nomadik
162machine-$(CONFIG_ARCH_OMAP1) := omap1 162machine-$(CONFIG_ARCH_OMAP1) := omap1
163machine-$(CONFIG_ARCH_OMAP2) := omap2 163machine-$(CONFIG_ARCH_OMAP2PLUS) := omap2
164machine-$(CONFIG_ARCH_OMAP3) := omap2
165machine-$(CONFIG_ARCH_OMAP4) := omap2
166machine-$(CONFIG_ARCH_ORION5X) := orion5x 164machine-$(CONFIG_ARCH_ORION5X) := orion5x
167machine-$(CONFIG_ARCH_PICOXCELL) := picoxcell 165machine-$(CONFIG_ARCH_PICOXCELL) := picoxcell
168machine-$(CONFIG_ARCH_PNX4008) := pnx4008 166machine-$(CONFIG_ARCH_PNX4008) := pnx4008
@@ -205,7 +203,7 @@ plat-$(CONFIG_PLAT_NOMADIK) := nomadik
205plat-$(CONFIG_PLAT_ORION) := orion 203plat-$(CONFIG_PLAT_ORION) := orion
206plat-$(CONFIG_PLAT_PXA) := pxa 204plat-$(CONFIG_PLAT_PXA) := pxa
207plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx samsung 205plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx samsung
208plat-$(CONFIG_PLAT_S5P) := s5p samsung 206plat-$(CONFIG_PLAT_S5P) := samsung
209plat-$(CONFIG_PLAT_SPEAR) := spear 207plat-$(CONFIG_PLAT_SPEAR) := spear
210plat-$(CONFIG_PLAT_VERSATILE) := versatile 208plat-$(CONFIG_PLAT_VERSATILE) := versatile
211 209
diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h
index bb7779b57795..64ce3bbe22b5 100644
--- a/arch/arm/mach-omap1/common.h
+++ b/arch/arm/mach-omap1/common.h
@@ -63,7 +63,14 @@ extern void omap1_nand_cmd_ctl(struct mtd_info *mtd, int cmd,
63 unsigned int ctrl); 63 unsigned int ctrl);
64 64
65extern struct sys_timer omap1_timer; 65extern struct sys_timer omap1_timer;
66extern bool omap_32k_timer_init(void); 66#ifdef CONFIG_OMAP_32K_TIMER
67extern int omap_32k_timer_init(void);
68#else
69static inline int __init omap_32k_timer_init(void)
70{
71 return -ENODEV;
72}
73#endif
67 74
68extern u32 omap_irq_flags; 75extern u32 omap_irq_flags;
69 76
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index dcd8ddbec2bb..fa1fa4deb6aa 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -22,6 +22,7 @@
22#include <plat/tc.h> 22#include <plat/tc.h>
23#include <plat/board.h> 23#include <plat/board.h>
24#include <plat/mux.h> 24#include <plat/mux.h>
25#include <plat/dma.h>
25#include <plat/mmc.h> 26#include <plat/mmc.h>
26#include <plat/omap7xx.h> 27#include <plat/omap7xx.h>
27 28
@@ -31,6 +32,22 @@
31#include "common.h" 32#include "common.h"
32#include "clock.h" 33#include "clock.h"
33 34
35#if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
36
37static struct platform_device omap_pcm = {
38 .name = "omap-pcm-audio",
39 .id = -1,
40};
41
42static void omap_init_audio(void)
43{
44 platform_device_register(&omap_pcm);
45}
46
47#else
48static inline void omap_init_audio(void) {}
49#endif
50
34/*-------------------------------------------------------------------------*/ 51/*-------------------------------------------------------------------------*/
35 52
36#if defined(CONFIG_RTC_DRV_OMAP) || defined(CONFIG_RTC_DRV_OMAP_MODULE) 53#if defined(CONFIG_RTC_DRV_OMAP) || defined(CONFIG_RTC_DRV_OMAP_MODULE)
@@ -128,6 +145,56 @@ static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
128 } 145 }
129} 146}
130 147
148#define OMAP_MMC_NR_RES 4
149
150/*
151 * Register MMC devices.
152 */
153static int __init omap_mmc_add(const char *name, int id, unsigned long base,
154 unsigned long size, unsigned int irq,
155 unsigned rx_req, unsigned tx_req,
156 struct omap_mmc_platform_data *data)
157{
158 struct platform_device *pdev;
159 struct resource res[OMAP_MMC_NR_RES];
160 int ret;
161
162 pdev = platform_device_alloc(name, id);
163 if (!pdev)
164 return -ENOMEM;
165
166 memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource));
167 res[0].start = base;
168 res[0].end = base + size - 1;
169 res[0].flags = IORESOURCE_MEM;
170 res[1].start = res[1].end = irq;
171 res[1].flags = IORESOURCE_IRQ;
172 res[2].start = rx_req;
173 res[2].name = "rx";
174 res[2].flags = IORESOURCE_DMA;
175 res[3].start = tx_req;
176 res[3].name = "tx";
177 res[3].flags = IORESOURCE_DMA;
178
179 ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
180 if (ret == 0)
181 ret = platform_device_add_data(pdev, data, sizeof(*data));
182 if (ret)
183 goto fail;
184
185 ret = platform_device_add(pdev);
186 if (ret)
187 goto fail;
188
189 /* return device handle to board setup code */
190 data->dev = &pdev->dev;
191 return 0;
192
193fail:
194 platform_device_put(pdev);
195 return ret;
196}
197
131void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, 198void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
132 int nr_controllers) 199 int nr_controllers)
133{ 200{
@@ -135,6 +202,7 @@ void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
135 202
136 for (i = 0; i < nr_controllers; i++) { 203 for (i = 0; i < nr_controllers; i++) {
137 unsigned long base, size; 204 unsigned long base, size;
205 unsigned rx_req, tx_req;
138 unsigned int irq = 0; 206 unsigned int irq = 0;
139 207
140 if (!mmc_data[i]) 208 if (!mmc_data[i])
@@ -146,19 +214,24 @@ void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
146 case 0: 214 case 0:
147 base = OMAP1_MMC1_BASE; 215 base = OMAP1_MMC1_BASE;
148 irq = INT_MMC; 216 irq = INT_MMC;
217 rx_req = OMAP_DMA_MMC_RX;
218 tx_req = OMAP_DMA_MMC_TX;
149 break; 219 break;
150 case 1: 220 case 1:
151 if (!cpu_is_omap16xx()) 221 if (!cpu_is_omap16xx())
152 return; 222 return;
153 base = OMAP1_MMC2_BASE; 223 base = OMAP1_MMC2_BASE;
154 irq = INT_1610_MMC2; 224 irq = INT_1610_MMC2;
225 rx_req = OMAP_DMA_MMC2_RX;
226 tx_req = OMAP_DMA_MMC2_TX;
155 break; 227 break;
156 default: 228 default:
157 continue; 229 continue;
158 } 230 }
159 size = OMAP1_MMC_SIZE; 231 size = OMAP1_MMC_SIZE;
160 232
161 omap_mmc_add("mmci-omap", i, base, size, irq, mmc_data[i]); 233 omap_mmc_add("mmci-omap", i, base, size, irq,
234 rx_req, tx_req, mmc_data[i]);
162 }; 235 };
163} 236}
164 237
@@ -242,23 +315,48 @@ void __init omap1_camera_init(void *info)
242 315
243static inline void omap_init_sti(void) {} 316static inline void omap_init_sti(void) {}
244 317
245#if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE) 318/* Numbering for the SPI-capable controllers when used for SPI:
319 * spi = 1
320 * uwire = 2
321 * mmc1..2 = 3..4
322 * mcbsp1..3 = 5..7
323 */
246 324
247static struct platform_device omap_pcm = { 325#if defined(CONFIG_SPI_OMAP_UWIRE) || defined(CONFIG_SPI_OMAP_UWIRE_MODULE)
248 .name = "omap-pcm-audio", 326
249 .id = -1, 327#define OMAP_UWIRE_BASE 0xfffb3000
328
329static struct resource uwire_resources[] = {
330 {
331 .start = OMAP_UWIRE_BASE,
332 .end = OMAP_UWIRE_BASE + 0x20,
333 .flags = IORESOURCE_MEM,
334 },
250}; 335};
251 336
252static void omap_init_audio(void) 337static struct platform_device omap_uwire_device = {
338 .name = "omap_uwire",
339 .id = -1,
340 .num_resources = ARRAY_SIZE(uwire_resources),
341 .resource = uwire_resources,
342};
343
344static void omap_init_uwire(void)
253{ 345{
254 platform_device_register(&omap_pcm); 346 /* FIXME define and use a boot tag; not all boards will be hooking
255} 347 * up devices to the microwire controller, and multi-board configs
348 * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
349 */
256 350
351 /* board-specific code must configure chipselects (only a few
352 * are normally used) and SCLK/SDI/SDO (each has two choices).
353 */
354 (void) platform_device_register(&omap_uwire_device);
355}
257#else 356#else
258static inline void omap_init_audio(void) {} 357static inline void omap_init_uwire(void) {}
259#endif 358#endif
260 359
261/*-------------------------------------------------------------------------*/
262 360
263/* 361/*
264 * This gets called after board-specific INIT_MACHINE, and initializes most 362 * This gets called after board-specific INIT_MACHINE, and initializes most
@@ -292,11 +390,12 @@ static int __init omap1_init_devices(void)
292 * in alphabetical order so they're easier to sort through. 390 * in alphabetical order so they're easier to sort through.
293 */ 391 */
294 392
393 omap_init_audio();
295 omap_init_mbox(); 394 omap_init_mbox();
296 omap_init_rtc(); 395 omap_init_rtc();
297 omap_init_spi100k(); 396 omap_init_spi100k();
298 omap_init_sti(); 397 omap_init_sti();
299 omap_init_audio(); 398 omap_init_uwire();
300 399
301 return 0; 400 return 0;
302} 401}
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index 4d8dd9a1b04c..4062480bfec7 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -232,20 +232,6 @@ static inline void omap_mpu_timer_init(void)
232} 232}
233#endif /* CONFIG_OMAP_MPU_TIMER */ 233#endif /* CONFIG_OMAP_MPU_TIMER */
234 234
235static inline int omap_32k_timer_usable(void)
236{
237 int res = false;
238
239 if (cpu_is_omap730() || cpu_is_omap15xx())
240 return res;
241
242#ifdef CONFIG_OMAP_32K_TIMER
243 res = omap_32k_timer_init();
244#endif
245
246 return res;
247}
248
249/* 235/*
250 * --------------------------------------------------------------------------- 236 * ---------------------------------------------------------------------------
251 * Timer initialization 237 * Timer initialization
@@ -253,7 +239,7 @@ static inline int omap_32k_timer_usable(void)
253 */ 239 */
254static void __init omap1_timer_init(void) 240static void __init omap1_timer_init(void)
255{ 241{
256 if (!omap_32k_timer_usable()) 242 if (omap_32k_timer_init() != 0)
257 omap_mpu_timer_init(); 243 omap_mpu_timer_init();
258} 244}
259 245
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 325b9a0aa4a0..eae49c3980c9 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -71,6 +71,7 @@
71 71
72/* 16xx specific defines */ 72/* 16xx specific defines */
73#define OMAP1_32K_TIMER_BASE 0xfffb9000 73#define OMAP1_32K_TIMER_BASE 0xfffb9000
74#define OMAP1_32KSYNC_TIMER_BASE 0xfffbc400
74#define OMAP1_32K_TIMER_CR 0x08 75#define OMAP1_32K_TIMER_CR 0x08
75#define OMAP1_32K_TIMER_TVR 0x00 76#define OMAP1_32K_TIMER_TVR 0x00
76#define OMAP1_32K_TIMER_TCR 0x04 77#define OMAP1_32K_TIMER_TCR 0x04
@@ -182,10 +183,29 @@ static __init void omap_init_32k_timer(void)
182 * Timer initialization 183 * Timer initialization
183 * --------------------------------------------------------------------------- 184 * ---------------------------------------------------------------------------
184 */ 185 */
185bool __init omap_32k_timer_init(void) 186int __init omap_32k_timer_init(void)
186{ 187{
187 omap_init_clocksource_32k(); 188 int ret = -ENODEV;
188 omap_init_32k_timer();
189 189
190 return true; 190 if (cpu_is_omap16xx()) {
191 void __iomem *base;
192 struct clk *sync32k_ick;
193
194 base = ioremap(OMAP1_32KSYNC_TIMER_BASE, SZ_1K);
195 if (!base) {
196 pr_err("32k_counter: failed to map base addr\n");
197 return -ENODEV;
198 }
199
200 sync32k_ick = clk_get(NULL, "omap_32ksync_ick");
201 if (!IS_ERR(sync32k_ick))
202 clk_enable(sync32k_ick);
203
204 ret = omap_init_clocksource_32k(base);
205 }
206
207 if (!ret)
208 omap_init_32k_timer();
209
210 return ret;
191} 211}
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 964ee67a3b77..4cf5142f22cc 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -78,12 +78,12 @@ config SOC_OMAP3430
78 default y 78 default y
79 select ARCH_OMAP_OTG 79 select ARCH_OMAP_OTG
80 80
81config SOC_OMAPTI81XX 81config SOC_TI81XX
82 bool "TI81XX support" 82 bool "TI81XX support"
83 depends on ARCH_OMAP3 83 depends on ARCH_OMAP3
84 default y 84 default y
85 85
86config SOC_OMAPAM33XX 86config SOC_AM33XX
87 bool "AM33XX support" 87 bool "AM33XX support"
88 depends on ARCH_OMAP3 88 depends on ARCH_OMAP3
89 default y 89 default y
@@ -320,12 +320,12 @@ config MACH_OMAP_3630SDP
320 320
321config MACH_TI8168EVM 321config MACH_TI8168EVM
322 bool "TI8168 Evaluation Module" 322 bool "TI8168 Evaluation Module"
323 depends on SOC_OMAPTI81XX 323 depends on SOC_TI81XX
324 default y 324 default y
325 325
326config MACH_TI8148EVM 326config MACH_TI8148EVM
327 bool "TI8148 Evaluation Module" 327 bool "TI8148 Evaluation Module"
328 depends on SOC_OMAPTI81XX 328 depends on SOC_TI81XX
329 default y 329 default y
330 330
331config MACH_OMAP_4430SDP 331config MACH_OMAP_4430SDP
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 385c083d24b2..fa742f3c2629 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -24,10 +24,11 @@ endif
24obj-$(CONFIG_TWL4030_CORE) += omap_twl.o 24obj-$(CONFIG_TWL4030_CORE) += omap_twl.o
25 25
26# SMP support ONLY available for OMAP4 26# SMP support ONLY available for OMAP4
27
27obj-$(CONFIG_SMP) += omap-smp.o omap-headsmp.o 28obj-$(CONFIG_SMP) += omap-smp.o omap-headsmp.o
28obj-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o 29obj-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o
29obj-$(CONFIG_ARCH_OMAP4) += omap4-common.o omap-wakeupgen.o \ 30obj-$(CONFIG_ARCH_OMAP4) += omap4-common.o omap-wakeupgen.o
30 sleep44xx.o 31obj-$(CONFIG_ARCH_OMAP4) += sleep44xx.o
31 32
32plus_sec := $(call as-instr,.arch_extension sec,+sec) 33plus_sec := $(call as-instr,.arch_extension sec,+sec)
33AFLAGS_omap-headsmp.o :=-Wa,-march=armv7-a$(plus_sec) 34AFLAGS_omap-headsmp.o :=-Wa,-march=armv7-a$(plus_sec)
@@ -64,10 +65,10 @@ endif
64ifeq ($(CONFIG_PM),y) 65ifeq ($(CONFIG_PM),y)
65obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o 66obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o
66obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o 67obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o
67obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o \ 68obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o
68 cpuidle34xx.o 69obj-$(CONFIG_ARCH_OMAP3) += cpuidle34xx.o
69obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o omap-mpuss-lowpower.o \ 70obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o omap-mpuss-lowpower.o
70 cpuidle44xx.o 71obj-$(CONFIG_ARCH_OMAP4) += cpuidle44xx.o
71obj-$(CONFIG_PM_DEBUG) += pm-debug.o 72obj-$(CONFIG_PM_DEBUG) += pm-debug.o
72obj-$(CONFIG_OMAP_SMARTREFLEX) += sr_device.o smartreflex.o 73obj-$(CONFIG_OMAP_SMARTREFLEX) += sr_device.o smartreflex.o
73obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3) += smartreflex-class3.o 74obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3) += smartreflex-class3.o
@@ -84,90 +85,86 @@ endif
84# PRCM 85# PRCM
85obj-y += prm_common.o 86obj-y += prm_common.o
86obj-$(CONFIG_ARCH_OMAP2) += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o 87obj-$(CONFIG_ARCH_OMAP2) += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o
87obj-$(CONFIG_ARCH_OMAP3) += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o \ 88obj-$(CONFIG_ARCH_OMAP3) += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o
88 vc3xxx_data.o vp3xxx_data.o 89obj-$(CONFIG_ARCH_OMAP3) += vc3xxx_data.o vp3xxx_data.o
89# XXX The presence of cm2xxx_3xxx.o on the line below is temporary and 90obj-$(CONFIG_ARCH_OMAP4) += prcm.o cminst44xx.o cm44xx.o
90# will be removed once the OMAP4 part of the codebase is converted to 91obj-$(CONFIG_ARCH_OMAP4) += prcm_mpu44xx.o prminst44xx.o
91# use OMAP4-specific PRCM functions. 92obj-$(CONFIG_ARCH_OMAP4) += vc44xx_data.o vp44xx_data.o prm44xx.o
92obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cminst44xx.o \
93 cm44xx.o prcm_mpu44xx.o \
94 prminst44xx.o vc44xx_data.o \
95 vp44xx_data.o prm44xx.o
96 93
97# OMAP voltage domains 94# OMAP voltage domains
98voltagedomain-common := voltage.o vc.o vp.o 95voltagedomain-common := voltage.o vc.o vp.o
99obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) \ 96obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common)
100 voltagedomains2xxx_data.o 97obj-$(CONFIG_ARCH_OMAP2) += voltagedomains2xxx_data.o
101obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) \ 98obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common)
102 voltagedomains3xxx_data.o 99obj-$(CONFIG_ARCH_OMAP3) += voltagedomains3xxx_data.o
103obj-$(CONFIG_ARCH_OMAP4) += $(voltagedomain-common) \ 100obj-$(CONFIG_ARCH_OMAP4) += $(voltagedomain-common)
104 voltagedomains44xx_data.o 101obj-$(CONFIG_ARCH_OMAP4) += voltagedomains44xx_data.o
105 102
106# OMAP powerdomain framework 103# OMAP powerdomain framework
107powerdomain-common += powerdomain.o powerdomain-common.o 104powerdomain-common += powerdomain.o powerdomain-common.o
108obj-$(CONFIG_ARCH_OMAP2) += $(powerdomain-common) \ 105obj-$(CONFIG_ARCH_OMAP2) += $(powerdomain-common)
109 powerdomain2xxx_3xxx.o \ 106obj-$(CONFIG_ARCH_OMAP2) += powerdomains2xxx_data.o
110 powerdomains2xxx_data.o \ 107obj-$(CONFIG_ARCH_OMAP2) += powerdomain2xxx_3xxx.o
111 powerdomains2xxx_3xxx_data.o 108obj-$(CONFIG_ARCH_OMAP2) += powerdomains2xxx_3xxx_data.o
112obj-$(CONFIG_ARCH_OMAP3) += $(powerdomain-common) \ 109obj-$(CONFIG_ARCH_OMAP3) += $(powerdomain-common)
113 powerdomain2xxx_3xxx.o \ 110obj-$(CONFIG_ARCH_OMAP3) += powerdomain2xxx_3xxx.o
114 powerdomains3xxx_data.o \ 111obj-$(CONFIG_ARCH_OMAP3) += powerdomains3xxx_data.o
115 powerdomains2xxx_3xxx_data.o 112obj-$(CONFIG_ARCH_OMAP3) += powerdomains2xxx_3xxx_data.o
116obj-$(CONFIG_ARCH_OMAP4) += $(powerdomain-common) \ 113obj-$(CONFIG_ARCH_OMAP4) += $(powerdomain-common)
117 powerdomain44xx.o \ 114obj-$(CONFIG_ARCH_OMAP4) += powerdomain44xx.o
118 powerdomains44xx_data.o 115obj-$(CONFIG_ARCH_OMAP4) += powerdomains44xx_data.o
119 116
120# PRCM clockdomain control 117# PRCM clockdomain control
121clockdomain-common += clockdomain.o \ 118clockdomain-common += clockdomain.o
122 clockdomains_common_data.o 119clockdomain-common += clockdomains_common_data.o
123obj-$(CONFIG_ARCH_OMAP2) += $(clockdomain-common) \ 120obj-$(CONFIG_ARCH_OMAP2) += $(clockdomain-common)
124 clockdomain2xxx_3xxx.o \ 121obj-$(CONFIG_ARCH_OMAP2) += clockdomain2xxx_3xxx.o
125 clockdomains2xxx_3xxx_data.o 122obj-$(CONFIG_ARCH_OMAP2) += clockdomains2xxx_3xxx_data.o
126obj-$(CONFIG_SOC_OMAP2420) += clockdomains2420_data.o 123obj-$(CONFIG_SOC_OMAP2420) += clockdomains2420_data.o
127obj-$(CONFIG_SOC_OMAP2430) += clockdomains2430_data.o 124obj-$(CONFIG_SOC_OMAP2430) += clockdomains2430_data.o
128obj-$(CONFIG_ARCH_OMAP3) += $(clockdomain-common) \ 125obj-$(CONFIG_ARCH_OMAP3) += $(clockdomain-common)
129 clockdomain2xxx_3xxx.o \ 126obj-$(CONFIG_ARCH_OMAP3) += clockdomain2xxx_3xxx.o
130 clockdomains2xxx_3xxx_data.o \ 127obj-$(CONFIG_ARCH_OMAP3) += clockdomains2xxx_3xxx_data.o
131 clockdomains3xxx_data.o 128obj-$(CONFIG_ARCH_OMAP3) += clockdomains3xxx_data.o
132obj-$(CONFIG_ARCH_OMAP4) += $(clockdomain-common) \ 129obj-$(CONFIG_ARCH_OMAP4) += $(clockdomain-common)
133 clockdomain44xx.o \ 130obj-$(CONFIG_ARCH_OMAP4) += clockdomain44xx.o
134 clockdomains44xx_data.o 131obj-$(CONFIG_ARCH_OMAP4) += clockdomains44xx_data.o
135 132
136# Clock framework 133# Clock framework
137obj-$(CONFIG_ARCH_OMAP2) += $(clock-common) clock2xxx.o \ 134obj-$(CONFIG_ARCH_OMAP2) += $(clock-common) clock2xxx.o
138 clkt2xxx_sys.o \ 135obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_sys.o
139 clkt2xxx_dpllcore.o \ 136obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_dpllcore.o
140 clkt2xxx_virt_prcm_set.o \ 137obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_virt_prcm_set.o
141 clkt2xxx_apll.o clkt2xxx_osc.o \ 138obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_apll.o clkt2xxx_osc.o
142 clkt2xxx_dpll.o clkt_iclk.o 139obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_dpll.o clkt_iclk.o
143obj-$(CONFIG_SOC_OMAP2420) += clock2420_data.o 140obj-$(CONFIG_SOC_OMAP2420) += clock2420_data.o
144obj-$(CONFIG_SOC_OMAP2430) += clock2430.o clock2430_data.o 141obj-$(CONFIG_SOC_OMAP2430) += clock2430.o clock2430_data.o
145obj-$(CONFIG_ARCH_OMAP3) += $(clock-common) clock3xxx.o \ 142obj-$(CONFIG_ARCH_OMAP3) += $(clock-common) clock3xxx.o
146 clock34xx.o clkt34xx_dpll3m2.o \ 143obj-$(CONFIG_ARCH_OMAP3) += clock34xx.o clkt34xx_dpll3m2.o
147 clock3517.o clock36xx.o \ 144obj-$(CONFIG_ARCH_OMAP3) += clock3517.o clock36xx.o
148 dpll3xxx.o clock3xxx_data.o \ 145obj-$(CONFIG_ARCH_OMAP3) += dpll3xxx.o clock3xxx_data.o
149 clkt_iclk.o 146obj-$(CONFIG_ARCH_OMAP3) += clkt_iclk.o
150obj-$(CONFIG_ARCH_OMAP4) += $(clock-common) clock44xx_data.o \ 147obj-$(CONFIG_ARCH_OMAP4) += $(clock-common) clock44xx_data.o
151 dpll3xxx.o dpll44xx.o 148obj-$(CONFIG_ARCH_OMAP4) += dpll3xxx.o dpll44xx.o
152 149
153# OMAP2 clock rate set data (old "OPP" data) 150# OMAP2 clock rate set data (old "OPP" data)
154obj-$(CONFIG_SOC_OMAP2420) += opp2420_data.o 151obj-$(CONFIG_SOC_OMAP2420) += opp2420_data.o
155obj-$(CONFIG_SOC_OMAP2430) += opp2430_data.o 152obj-$(CONFIG_SOC_OMAP2430) += opp2430_data.o
156 153
157# hwmod data 154# hwmod data
158obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_ipblock_data.o \ 155obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_ipblock_data.o
159 omap_hwmod_2xxx_3xxx_ipblock_data.o \ 156obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_3xxx_ipblock_data.o
160 omap_hwmod_2xxx_interconnect_data.o \ 157obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_interconnect_data.o
161 omap_hwmod_2xxx_3xxx_interconnect_data.o \ 158obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_3xxx_interconnect_data.o
162 omap_hwmod_2420_data.o 159obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2420_data.o
163obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_ipblock_data.o \ 160obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_ipblock_data.o
164 omap_hwmod_2xxx_3xxx_ipblock_data.o \ 161obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_3xxx_ipblock_data.o
165 omap_hwmod_2xxx_interconnect_data.o \ 162obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_interconnect_data.o
166 omap_hwmod_2xxx_3xxx_interconnect_data.o \ 163obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_3xxx_interconnect_data.o
167 omap_hwmod_2430_data.o 164obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2430_data.o
168obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_ipblock_data.o \ 165obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_ipblock_data.o
169 omap_hwmod_2xxx_3xxx_interconnect_data.o \ 166obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_interconnect_data.o
170 omap_hwmod_3xxx_data.o 167obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_3xxx_data.o
171obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o 168obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o
172 169
173# EMU peripherals 170# EMU peripherals
@@ -208,23 +205,19 @@ obj-$(CONFIG_MACH_OMAP3EVM) += board-omap3evm.o
208obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o 205obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o
209obj-$(CONFIG_MACH_OMAP_3430SDP) += board-3430sdp.o 206obj-$(CONFIG_MACH_OMAP_3430SDP) += board-3430sdp.o
210obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0.o 207obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0.o
211obj-$(CONFIG_MACH_NOKIA_RM680) += board-rm680.o \ 208obj-$(CONFIG_MACH_NOKIA_RM680) += board-rm680.o sdram-nokia.o
212 sdram-nokia.o 209obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o sdram-nokia.o
213obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \ 210obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51-peripherals.o
214 sdram-nokia.o \ 211obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51-video.o
215 board-rx51-peripherals.o \ 212obj-$(CONFIG_MACH_OMAP_ZOOM2) += board-zoom.o board-zoom-peripherals.o
216 board-rx51-video.o 213obj-$(CONFIG_MACH_OMAP_ZOOM2) += board-zoom-display.o
217obj-$(CONFIG_MACH_OMAP_ZOOM2) += board-zoom.o \ 214obj-$(CONFIG_MACH_OMAP_ZOOM2) += board-zoom-debugboard.o
218 board-zoom-peripherals.o \ 215obj-$(CONFIG_MACH_OMAP_ZOOM3) += board-zoom.o board-zoom-peripherals.o
219 board-zoom-display.o \ 216obj-$(CONFIG_MACH_OMAP_ZOOM3) += board-zoom-display.o
220 board-zoom-debugboard.o 217obj-$(CONFIG_MACH_OMAP_ZOOM3) += board-zoom-debugboard.o
221obj-$(CONFIG_MACH_OMAP_ZOOM3) += board-zoom.o \ 218obj-$(CONFIG_MACH_OMAP_3630SDP) += board-3630sdp.o
222 board-zoom-peripherals.o \ 219obj-$(CONFIG_MACH_OMAP_3630SDP) += board-zoom-peripherals.o
223 board-zoom-display.o \ 220obj-$(CONFIG_MACH_OMAP_3630SDP) += board-zoom-display.o
224 board-zoom-debugboard.o
225obj-$(CONFIG_MACH_OMAP_3630SDP) += board-3630sdp.o \
226 board-zoom-peripherals.o \
227 board-zoom-display.o
228obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o 221obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o
229obj-$(CONFIG_MACH_CM_T3517) += board-cm-t3517.o 222obj-$(CONFIG_MACH_CM_T3517) += board-cm-t3517.o
230obj-$(CONFIG_MACH_IGEP0020) += board-igep0020.o 223obj-$(CONFIG_MACH_IGEP0020) += board-igep0020.o
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index d6c9e6180318..4cb1fe666311 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -55,7 +55,7 @@ static inline void omap34xx_map_common_io(void)
55} 55}
56#endif 56#endif
57 57
58#ifdef CONFIG_SOC_OMAPTI81XX 58#ifdef CONFIG_SOC_TI81XX
59extern void omapti81xx_map_common_io(void); 59extern void omapti81xx_map_common_io(void);
60#else 60#else
61static inline void omapti81xx_map_common_io(void) 61static inline void omapti81xx_map_common_io(void)
@@ -63,7 +63,7 @@ static inline void omapti81xx_map_common_io(void)
63} 63}
64#endif 64#endif
65 65
66#ifdef CONFIG_SOC_OMAPAM33XX 66#ifdef CONFIG_SOC_AM33XX
67extern void omapam33xx_map_common_io(void); 67extern void omapam33xx_map_common_io(void);
68#else 68#else
69static inline void omapam33xx_map_common_io(void) 69static inline void omapam33xx_map_common_io(void)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index ae62ece04ef9..7b4b9327e543 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -645,7 +645,11 @@ static inline void omap242x_mmc_mux(struct omap_mmc_platform_data
645 645
646void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data) 646void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
647{ 647{
648 char *name = "mmci-omap"; 648 struct platform_device *pdev;
649 struct omap_hwmod *oh;
650 int id = 0;
651 char *oh_name = "msdi1";
652 char *dev_name = "mmci-omap";
649 653
650 if (!mmc_data[0]) { 654 if (!mmc_data[0]) {
651 pr_err("%s fails: Incomplete platform data\n", __func__); 655 pr_err("%s fails: Incomplete platform data\n", __func__);
@@ -653,8 +657,17 @@ void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
653 } 657 }
654 658
655 omap242x_mmc_mux(mmc_data[0]); 659 omap242x_mmc_mux(mmc_data[0]);
656 omap_mmc_add(name, 0, OMAP2_MMC1_BASE, OMAP2420_MMC_SIZE, 660
657 INT_24XX_MMC_IRQ, mmc_data[0]); 661 oh = omap_hwmod_lookup(oh_name);
662 if (!oh) {
663 pr_err("Could not look up %s\n", oh_name);
664 return;
665 }
666 pdev = omap_device_build(dev_name, id, oh, mmc_data[0],
667 sizeof(struct omap_mmc_platform_data), NULL, 0, 0);
668 if (IS_ERR(pdev))
669 WARN(1, "Can'd build omap_device for %s:%s.\n",
670 dev_name, oh->name);
658} 671}
659 672
660#endif 673#endif
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
index b19d8496c16e..ff75abe60af2 100644
--- a/arch/arm/mach-omap2/dma.c
+++ b/arch/arm/mach-omap2/dma.c
@@ -227,10 +227,6 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
227 227
228 dma_stride = OMAP2_DMA_STRIDE; 228 dma_stride = OMAP2_DMA_STRIDE;
229 dma_common_ch_start = CSDP; 229 dma_common_ch_start = CSDP;
230 if (cpu_is_omap3630() || cpu_is_omap44xx())
231 dma_common_ch_end = CCDN;
232 else
233 dma_common_ch_end = CCFN;
234 230
235 p = kzalloc(sizeof(struct omap_system_dma_plat_info), GFP_KERNEL); 231 p = kzalloc(sizeof(struct omap_system_dma_plat_info), GFP_KERNEL);
236 if (!p) { 232 if (!p) {
@@ -277,6 +273,13 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
277 dev_err(&pdev->dev, "%s: kzalloc fail\n", __func__); 273 dev_err(&pdev->dev, "%s: kzalloc fail\n", __func__);
278 return -ENOMEM; 274 return -ENOMEM;
279 } 275 }
276
277 /* Check the capabilities register for descriptor loading feature */
278 if (dma_read(CAPS_0, 0) & DMA_HAS_DESCRIPTOR_CAPS)
279 dma_common_ch_end = CCDN;
280 else
281 dma_common_ch_end = CCFN;
282
280 return 0; 283 return 0;
281} 284}
282 285
diff --git a/arch/arm/mach-omap2/dsp.c b/arch/arm/mach-omap2/dsp.c
index 3376388b317a..845309f146fe 100644
--- a/arch/arm/mach-omap2/dsp.c
+++ b/arch/arm/mach-omap2/dsp.c
@@ -28,8 +28,6 @@
28 28
29#include <plat/dsp.h> 29#include <plat/dsp.h>
30 30
31extern phys_addr_t omap_dsp_get_mempool_base(void);
32
33static struct platform_device *omap_dsp_pdev; 31static struct platform_device *omap_dsp_pdev;
34 32
35static struct omap_dsp_platform_data omap_dsp_pdata __initdata = { 33static struct omap_dsp_platform_data omap_dsp_pdata __initdata = {
@@ -47,6 +45,31 @@ static struct omap_dsp_platform_data omap_dsp_pdata __initdata = {
47 .dsp_cm_rmw_bits = omap2_cm_rmw_mod_reg_bits, 45 .dsp_cm_rmw_bits = omap2_cm_rmw_mod_reg_bits,
48}; 46};
49 47
48static phys_addr_t omap_dsp_phys_mempool_base;
49
50void __init omap_dsp_reserve_sdram_memblock(void)
51{
52 phys_addr_t size = CONFIG_TIDSPBRIDGE_MEMPOOL_SIZE;
53 phys_addr_t paddr;
54
55 if (!size)
56 return;
57
58 paddr = arm_memblock_steal(size, SZ_1M);
59 if (!paddr) {
60 pr_err("%s: failed to reserve %llx bytes\n",
61 __func__, (unsigned long long)size);
62 return;
63 }
64
65 omap_dsp_phys_mempool_base = paddr;
66}
67
68static phys_addr_t omap_dsp_get_mempool_base(void)
69{
70 return omap_dsp_phys_mempool_base;
71}
72
50static int __init omap_dsp_init(void) 73static int __init omap_dsp_init(void)
51{ 74{
52 struct platform_device *pdev; 75 struct platform_device *pdev;
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 580e684e8825..46b09dae770e 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -50,6 +50,19 @@
50#define GPMC_ECC_SIZE_CONFIG 0x1fc 50#define GPMC_ECC_SIZE_CONFIG 0x1fc
51#define GPMC_ECC1_RESULT 0x200 51#define GPMC_ECC1_RESULT 0x200
52 52
53/* GPMC ECC control settings */
54#define GPMC_ECC_CTRL_ECCCLEAR 0x100
55#define GPMC_ECC_CTRL_ECCDISABLE 0x000
56#define GPMC_ECC_CTRL_ECCREG1 0x001
57#define GPMC_ECC_CTRL_ECCREG2 0x002
58#define GPMC_ECC_CTRL_ECCREG3 0x003
59#define GPMC_ECC_CTRL_ECCREG4 0x004
60#define GPMC_ECC_CTRL_ECCREG5 0x005
61#define GPMC_ECC_CTRL_ECCREG6 0x006
62#define GPMC_ECC_CTRL_ECCREG7 0x007
63#define GPMC_ECC_CTRL_ECCREG8 0x008
64#define GPMC_ECC_CTRL_ECCREG9 0x009
65
53#define GPMC_CS0_OFFSET 0x60 66#define GPMC_CS0_OFFSET 0x60
54#define GPMC_CS_SIZE 0x30 67#define GPMC_CS_SIZE 0x30
55 68
@@ -860,8 +873,9 @@ int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size)
860 gpmc_ecc_used = cs; 873 gpmc_ecc_used = cs;
861 874
862 /* clear ecc and enable bits */ 875 /* clear ecc and enable bits */
863 val = ((0x00000001<<8) | 0x00000001); 876 gpmc_write_reg(GPMC_ECC_CONTROL,
864 gpmc_write_reg(GPMC_ECC_CONTROL, val); 877 GPMC_ECC_CTRL_ECCCLEAR |
878 GPMC_ECC_CTRL_ECCREG1);
865 879
866 /* program ecc and result sizes */ 880 /* program ecc and result sizes */
867 val = ((((ecc_size >> 1) - 1) << 22) | (0x0000000F)); 881 val = ((((ecc_size >> 1) - 1) << 22) | (0x0000000F));
@@ -869,13 +883,15 @@ int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size)
869 883
870 switch (mode) { 884 switch (mode) {
871 case GPMC_ECC_READ: 885 case GPMC_ECC_READ:
872 gpmc_write_reg(GPMC_ECC_CONTROL, 0x101); 886 case GPMC_ECC_WRITE:
887 gpmc_write_reg(GPMC_ECC_CONTROL,
888 GPMC_ECC_CTRL_ECCCLEAR |
889 GPMC_ECC_CTRL_ECCREG1);
873 break; 890 break;
874 case GPMC_ECC_READSYN: 891 case GPMC_ECC_READSYN:
875 gpmc_write_reg(GPMC_ECC_CONTROL, 0x100); 892 gpmc_write_reg(GPMC_ECC_CONTROL,
876 break; 893 GPMC_ECC_CTRL_ECCCLEAR |
877 case GPMC_ECC_WRITE: 894 GPMC_ECC_CTRL_ECCDISABLE);
878 gpmc_write_reg(GPMC_ECC_CONTROL, 0x101);
879 break; 895 break;
880 default: 896 default:
881 printk(KERN_INFO "Error: Unrecognized Mode[%d]!\n", mode); 897 printk(KERN_INFO "Error: Unrecognized Mode[%d]!\n", mode);
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index b0268eaffe13..be697d4e0843 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -355,7 +355,7 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
355 * 355 *
356 * temporary HACK: ocr_mask instead of fixed supply 356 * temporary HACK: ocr_mask instead of fixed supply
357 */ 357 */
358 if (cpu_is_omap3505() || cpu_is_omap3517()) 358 if (soc_is_am35xx())
359 mmc->slots[0].ocr_mask = MMC_VDD_165_195 | 359 mmc->slots[0].ocr_mask = MMC_VDD_165_195 |
360 MMC_VDD_26_27 | 360 MMC_VDD_26_27 |
361 MMC_VDD_27_28 | 361 MMC_VDD_27_28 |
@@ -365,7 +365,7 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
365 else 365 else
366 mmc->slots[0].ocr_mask = c->ocr_mask; 366 mmc->slots[0].ocr_mask = c->ocr_mask;
367 367
368 if (!cpu_is_omap3517() && !cpu_is_omap3505()) 368 if (!soc_is_am35xx())
369 mmc->slots[0].features |= HSMMC_HAS_PBIAS; 369 mmc->slots[0].features |= HSMMC_HAS_PBIAS;
370 370
371 if (cpu_is_omap44xx() && (omap_rev() > OMAP4430_REV_ES1_0)) 371 if (cpu_is_omap44xx() && (omap_rev() > OMAP4430_REV_ES1_0))
@@ -388,7 +388,7 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
388 } 388 }
389 } 389 }
390 390
391 if (cpu_is_omap3517() || cpu_is_omap3505()) 391 if (soc_is_am35xx())
392 mmc->slots[0].set_power = nop_mmc_set_power; 392 mmc->slots[0].set_power = nop_mmc_set_power;
393 393
394 /* OMAP3630 HSMMC1 supports only 4-bit */ 394 /* OMAP3630 HSMMC1 supports only 4-bit */
@@ -400,7 +400,7 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
400 } 400 }
401 break; 401 break;
402 case 2: 402 case 2:
403 if (cpu_is_omap3517() || cpu_is_omap3505()) 403 if (soc_is_am35xx())
404 mmc->slots[0].set_power = am35x_hsmmc2_set_power; 404 mmc->slots[0].set_power = am35x_hsmmc2_set_power;
405 405
406 if (c->ext_clock) 406 if (c->ext_clock)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index f1398171d8a2..0389b3264abe 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -185,8 +185,7 @@ static void __init omap3_cpuinfo(void)
185 */ 185 */
186 if (cpu_is_omap3630()) { 186 if (cpu_is_omap3630()) {
187 cpu_name = "OMAP3630"; 187 cpu_name = "OMAP3630";
188 } else if (cpu_is_omap3517()) { 188 } else if (soc_is_am35xx()) {
189 /* AM35xx devices */
190 cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505"; 189 cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505";
191 } else if (cpu_is_ti816x()) { 190 } else if (cpu_is_ti816x()) {
192 cpu_name = "TI816X"; 191 cpu_name = "TI816X";
@@ -352,13 +351,13 @@ void __init omap3xxx_check_revision(void)
352 */ 351 */
353 switch (rev) { 352 switch (rev) {
354 case 0: 353 case 0:
355 omap_revision = OMAP3517_REV_ES1_0; 354 omap_revision = AM35XX_REV_ES1_0;
356 cpu_rev = "1.0"; 355 cpu_rev = "1.0";
357 break; 356 break;
358 case 1: 357 case 1:
359 /* FALLTHROUGH */ 358 /* FALLTHROUGH */
360 default: 359 default:
361 omap_revision = OMAP3517_REV_ES1_1; 360 omap_revision = AM35XX_REV_ES1_1;
362 cpu_rev = "1.1"; 361 cpu_rev = "1.1";
363 } 362 }
364 break; 363 break;
diff --git a/arch/arm/mach-omap2/include/mach/omap-wakeupgen.h b/arch/arm/mach-omap2/include/mach/omap-wakeupgen.h
index d79321b0f2a2..548de90b58c2 100644
--- a/arch/arm/mach-omap2/include/mach/omap-wakeupgen.h
+++ b/arch/arm/mach-omap2/include/mach/omap-wakeupgen.h
@@ -16,18 +16,10 @@
16#define OMAP_WKG_ENB_B_0 0x14 16#define OMAP_WKG_ENB_B_0 0x14
17#define OMAP_WKG_ENB_C_0 0x18 17#define OMAP_WKG_ENB_C_0 0x18
18#define OMAP_WKG_ENB_D_0 0x1c 18#define OMAP_WKG_ENB_D_0 0x1c
19#define OMAP_WKG_ENB_SECURE_A_0 0x20
20#define OMAP_WKG_ENB_SECURE_B_0 0x24
21#define OMAP_WKG_ENB_SECURE_C_0 0x28
22#define OMAP_WKG_ENB_SECURE_D_0 0x2c
23#define OMAP_WKG_ENB_A_1 0x410 19#define OMAP_WKG_ENB_A_1 0x410
24#define OMAP_WKG_ENB_B_1 0x414 20#define OMAP_WKG_ENB_B_1 0x414
25#define OMAP_WKG_ENB_C_1 0x418 21#define OMAP_WKG_ENB_C_1 0x418
26#define OMAP_WKG_ENB_D_1 0x41c 22#define OMAP_WKG_ENB_D_1 0x41c
27#define OMAP_WKG_ENB_SECURE_A_1 0x420
28#define OMAP_WKG_ENB_SECURE_B_1 0x424
29#define OMAP_WKG_ENB_SECURE_C_1 0x428
30#define OMAP_WKG_ENB_SECURE_D_1 0x42c
31#define OMAP_AUX_CORE_BOOT_0 0x800 23#define OMAP_AUX_CORE_BOOT_0 0x800
32#define OMAP_AUX_CORE_BOOT_1 0x804 24#define OMAP_AUX_CORE_BOOT_1 0x804
33#define OMAP_PTMSYNCREQ_MASK 0xc00 25#define OMAP_PTMSYNCREQ_MASK 0xc00
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 4b9491aa36fa..e1f9c6fc0414 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -173,7 +173,7 @@ static struct map_desc omap34xx_io_desc[] __initdata = {
173}; 173};
174#endif 174#endif
175 175
176#ifdef CONFIG_SOC_OMAPTI81XX 176#ifdef CONFIG_SOC_TI81XX
177static struct map_desc omapti81xx_io_desc[] __initdata = { 177static struct map_desc omapti81xx_io_desc[] __initdata = {
178 { 178 {
179 .virtual = L4_34XX_VIRT, 179 .virtual = L4_34XX_VIRT,
@@ -184,7 +184,7 @@ static struct map_desc omapti81xx_io_desc[] __initdata = {
184}; 184};
185#endif 185#endif
186 186
187#ifdef CONFIG_SOC_OMAPAM33XX 187#ifdef CONFIG_SOC_AM33XX
188static struct map_desc omapam33xx_io_desc[] __initdata = { 188static struct map_desc omapam33xx_io_desc[] __initdata = {
189 { 189 {
190 .virtual = L4_34XX_VIRT, 190 .virtual = L4_34XX_VIRT,
@@ -216,41 +216,11 @@ static struct map_desc omap44xx_io_desc[] __initdata = {
216 .type = MT_DEVICE, 216 .type = MT_DEVICE,
217 }, 217 },
218 { 218 {
219 .virtual = OMAP44XX_GPMC_VIRT,
220 .pfn = __phys_to_pfn(OMAP44XX_GPMC_PHYS),
221 .length = OMAP44XX_GPMC_SIZE,
222 .type = MT_DEVICE,
223 },
224 {
225 .virtual = OMAP44XX_EMIF1_VIRT,
226 .pfn = __phys_to_pfn(OMAP44XX_EMIF1_PHYS),
227 .length = OMAP44XX_EMIF1_SIZE,
228 .type = MT_DEVICE,
229 },
230 {
231 .virtual = OMAP44XX_EMIF2_VIRT,
232 .pfn = __phys_to_pfn(OMAP44XX_EMIF2_PHYS),
233 .length = OMAP44XX_EMIF2_SIZE,
234 .type = MT_DEVICE,
235 },
236 {
237 .virtual = OMAP44XX_DMM_VIRT,
238 .pfn = __phys_to_pfn(OMAP44XX_DMM_PHYS),
239 .length = OMAP44XX_DMM_SIZE,
240 .type = MT_DEVICE,
241 },
242 {
243 .virtual = L4_PER_44XX_VIRT, 219 .virtual = L4_PER_44XX_VIRT,
244 .pfn = __phys_to_pfn(L4_PER_44XX_PHYS), 220 .pfn = __phys_to_pfn(L4_PER_44XX_PHYS),
245 .length = L4_PER_44XX_SIZE, 221 .length = L4_PER_44XX_SIZE,
246 .type = MT_DEVICE, 222 .type = MT_DEVICE,
247 }, 223 },
248 {
249 .virtual = L4_EMU_44XX_VIRT,
250 .pfn = __phys_to_pfn(L4_EMU_44XX_PHYS),
251 .length = L4_EMU_44XX_SIZE,
252 .type = MT_DEVICE,
253 },
254#ifdef CONFIG_OMAP4_ERRATA_I688 224#ifdef CONFIG_OMAP4_ERRATA_I688
255 { 225 {
256 .virtual = OMAP4_SRAM_VA, 226 .virtual = OMAP4_SRAM_VA,
@@ -286,14 +256,14 @@ void __init omap34xx_map_common_io(void)
286} 256}
287#endif 257#endif
288 258
289#ifdef CONFIG_SOC_OMAPTI81XX 259#ifdef CONFIG_SOC_TI81XX
290void __init omapti81xx_map_common_io(void) 260void __init omapti81xx_map_common_io(void)
291{ 261{
292 iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc)); 262 iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc));
293} 263}
294#endif 264#endif
295 265
296#ifdef CONFIG_SOC_OMAPAM33XX 266#ifdef CONFIG_SOC_AM33XX
297void __init omapam33xx_map_common_io(void) 267void __init omapam33xx_map_common_io(void)
298{ 268{
299 iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc)); 269 iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
diff --git a/arch/arm/mach-omap2/iomap.h b/arch/arm/mach-omap2/iomap.h
index 0812b154f5b5..80b88921faba 100644
--- a/arch/arm/mach-omap2/iomap.h
+++ b/arch/arm/mach-omap2/iomap.h
@@ -37,9 +37,6 @@
37#define OMAP4_L3_PER_IO_OFFSET 0xb1100000 37#define OMAP4_L3_PER_IO_OFFSET 0xb1100000
38#define OMAP4_L3_PER_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_PER_IO_OFFSET) 38#define OMAP4_L3_PER_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_PER_IO_OFFSET)
39 39
40#define OMAP4_GPMC_IO_OFFSET 0xa9000000
41#define OMAP4_GPMC_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_GPMC_IO_OFFSET)
42
43#define OMAP2_EMU_IO_OFFSET 0xaa800000 /* Emulation */ 40#define OMAP2_EMU_IO_OFFSET 0xaa800000 /* Emulation */
44#define OMAP2_EMU_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_EMU_IO_OFFSET) 41#define OMAP2_EMU_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_EMU_IO_OFFSET)
45 42
@@ -170,28 +167,3 @@
170#define L4_ABE_44XX_VIRT (L4_ABE_44XX_PHYS + OMAP2_L4_IO_OFFSET) 167#define L4_ABE_44XX_VIRT (L4_ABE_44XX_PHYS + OMAP2_L4_IO_OFFSET)
171#define L4_ABE_44XX_SIZE SZ_1M 168#define L4_ABE_44XX_SIZE SZ_1M
172 169
173#define L4_EMU_44XX_PHYS L4_EMU_44XX_BASE
174 /* 0x54000000 --> 0xfe800000 */
175#define L4_EMU_44XX_VIRT (L4_EMU_44XX_PHYS + OMAP2_EMU_IO_OFFSET)
176#define L4_EMU_44XX_SIZE SZ_8M
177
178#define OMAP44XX_GPMC_PHYS OMAP44XX_GPMC_BASE
179 /* 0x50000000 --> 0xf9000000 */
180#define OMAP44XX_GPMC_VIRT (OMAP44XX_GPMC_PHYS + OMAP4_GPMC_IO_OFFSET)
181#define OMAP44XX_GPMC_SIZE SZ_1M
182
183
184#define OMAP44XX_EMIF1_PHYS OMAP44XX_EMIF1_BASE
185 /* 0x4c000000 --> 0xfd100000 */
186#define OMAP44XX_EMIF1_VIRT (OMAP44XX_EMIF1_PHYS + OMAP4_L3_PER_IO_OFFSET)
187#define OMAP44XX_EMIF1_SIZE SZ_1M
188
189#define OMAP44XX_EMIF2_PHYS OMAP44XX_EMIF2_BASE
190 /* 0x4d000000 --> 0xfd200000 */
191#define OMAP44XX_EMIF2_SIZE SZ_1M
192#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF1_VIRT + OMAP44XX_EMIF1_SIZE)
193
194#define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE
195 /* 0x4e000000 --> 0xfd300000 */
196#define OMAP44XX_DMM_SIZE SZ_1M
197#define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + OMAP44XX_EMIF2_SIZE)
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 1ecf54565fe2..fdc4303be563 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -231,7 +231,7 @@ static inline void omap_intc_handle_irq(void __iomem *base_addr, struct pt_regs
231 goto out; 231 goto out;
232 232
233 irqnr = readl_relaxed(base_addr + 0xd8); 233 irqnr = readl_relaxed(base_addr + 0xd8);
234#ifdef CONFIG_SOC_OMAPTI81XX 234#ifdef CONFIG_SOC_TI81XX
235 if (irqnr) 235 if (irqnr)
236 goto out; 236 goto out;
237 irqnr = readl_relaxed(base_addr + 0xf8); 237 irqnr = readl_relaxed(base_addr + 0xf8);
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index fd48797fa95a..b26d3c9bca16 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -3306,7 +3306,7 @@ int __init omap3xxx_hwmod_init(void)
3306 rev == OMAP3430_REV_ES2_1 || rev == OMAP3430_REV_ES3_0 || 3306 rev == OMAP3430_REV_ES2_1 || rev == OMAP3430_REV_ES3_0 ||
3307 rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_1_2) { 3307 rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_1_2) {
3308 h = omap34xx_hwmod_ocp_ifs; 3308 h = omap34xx_hwmod_ocp_ifs;
3309 } else if (rev == OMAP3517_REV_ES1_0 || rev == OMAP3517_REV_ES1_1) { 3309 } else if (rev == AM35XX_REV_ES1_0 || rev == AM35XX_REV_ES1_1) {
3310 h = am35xx_hwmod_ocp_ifs; 3310 h = am35xx_hwmod_ocp_ifs;
3311 } else if (rev == OMAP3630_REV_ES1_0 || rev == OMAP3630_REV_ES1_1 || 3311 } else if (rev == OMAP3630_REV_ES1_0 || rev == OMAP3630_REV_ES1_1 ||
3312 rev == OMAP3630_REV_ES1_2) { 3312 rev == OMAP3630_REV_ES1_2) {
diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c b/arch/arm/mach-omap2/powerdomains3xxx_data.c
index b7ea468eea32..fb0a0a6869d1 100644
--- a/arch/arm/mach-omap2/powerdomains3xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c
@@ -311,7 +311,7 @@ void __init omap3xxx_powerdomains_init(void)
311 rev == OMAP3430_REV_ES3_0 || rev == OMAP3630_REV_ES1_0) 311 rev == OMAP3430_REV_ES3_0 || rev == OMAP3630_REV_ES1_0)
312 pwrdm_register_pwrdms(powerdomains_omap3430es2_es3_0); 312 pwrdm_register_pwrdms(powerdomains_omap3430es2_es3_0);
313 else if (rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_1_2 || 313 else if (rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_1_2 ||
314 rev == OMAP3517_REV_ES1_0 || rev == OMAP3517_REV_ES1_1 || 314 rev == AM35XX_REV_ES1_0 || rev == AM35XX_REV_ES1_1 ||
315 rev == OMAP3630_REV_ES1_1 || rev == OMAP3630_REV_ES1_2) 315 rev == OMAP3630_REV_ES1_1 || rev == OMAP3630_REV_ES1_2)
316 pwrdm_register_pwrdms(powerdomains_omap3430es3_1plus); 316 pwrdm_register_pwrdms(powerdomains_omap3430es3_1plus);
317 else 317 else
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 1b7835865c83..840929bd9dae 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -90,7 +90,7 @@ static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
90} 90}
91 91
92static struct irqaction omap2_gp_timer_irq = { 92static struct irqaction omap2_gp_timer_irq = {
93 .name = "gp timer", 93 .name = "gp_timer",
94 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, 94 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
95 .handler = omap2_gp_timer_interrupt, 95 .handler = omap2_gp_timer_interrupt,
96}; 96};
@@ -132,7 +132,7 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
132} 132}
133 133
134static struct clock_event_device clockevent_gpt = { 134static struct clock_event_device clockevent_gpt = {
135 .name = "gp timer", 135 .name = "gp_timer",
136 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 136 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
137 .shift = 32, 137 .shift = 32,
138 .set_next_event = omap2_gp_timer_set_next_event, 138 .set_next_event = omap2_gp_timer_set_next_event,
@@ -236,22 +236,8 @@ static void __init omap2_gp_clockevent_init(int gptimer_id,
236} 236}
237 237
238/* Clocksource code */ 238/* Clocksource code */
239
240#ifdef CONFIG_OMAP_32K_TIMER
241/*
242 * When 32k-timer is enabled, don't use GPTimer for clocksource
243 * instead, just leave default clocksource which uses the 32k
244 * sync counter. See clocksource setup in plat-omap/counter_32k.c
245 */
246
247static void __init omap2_gp_clocksource_init(int unused, const char *dummy)
248{
249 omap_init_clocksource_32k();
250}
251
252#else
253
254static struct omap_dm_timer clksrc; 239static struct omap_dm_timer clksrc;
240static bool use_gptimer_clksrc;
255 241
256/* 242/*
257 * clocksource 243 * clocksource
@@ -262,7 +248,7 @@ static cycle_t clocksource_read_cycles(struct clocksource *cs)
262} 248}
263 249
264static struct clocksource clocksource_gpt = { 250static struct clocksource clocksource_gpt = {
265 .name = "gp timer", 251 .name = "gp_timer",
266 .rating = 300, 252 .rating = 300,
267 .read = clocksource_read_cycles, 253 .read = clocksource_read_cycles,
268 .mask = CLOCKSOURCE_MASK(32), 254 .mask = CLOCKSOURCE_MASK(32),
@@ -278,7 +264,46 @@ static u32 notrace dmtimer_read_sched_clock(void)
278} 264}
279 265
280/* Setup free-running counter for clocksource */ 266/* Setup free-running counter for clocksource */
281static void __init omap2_gp_clocksource_init(int gptimer_id, 267static int __init omap2_sync32k_clocksource_init(void)
268{
269 int ret;
270 struct omap_hwmod *oh;
271 void __iomem *vbase;
272 const char *oh_name = "counter_32k";
273
274 /*
275 * First check hwmod data is available for sync32k counter
276 */
277 oh = omap_hwmod_lookup(oh_name);
278 if (!oh || oh->slaves_cnt == 0)
279 return -ENODEV;
280
281 omap_hwmod_setup_one(oh_name);
282
283 vbase = omap_hwmod_get_mpu_rt_va(oh);
284 if (!vbase) {
285 pr_warn("%s: failed to get counter_32k resource\n", __func__);
286 return -ENXIO;
287 }
288
289 ret = omap_hwmod_enable(oh);
290 if (ret) {
291 pr_warn("%s: failed to enable counter_32k module (%d)\n",
292 __func__, ret);
293 return ret;
294 }
295
296 ret = omap_init_clocksource_32k(vbase);
297 if (ret) {
298 pr_warn("%s: failed to initialize counter_32k as a clocksource (%d)\n",
299 __func__, ret);
300 omap_hwmod_idle(oh);
301 }
302
303 return ret;
304}
305
306static void __init omap2_gptimer_clocksource_init(int gptimer_id,
282 const char *fck_source) 307 const char *fck_source)
283{ 308{
284 int res; 309 int res;
@@ -286,9 +311,6 @@ static void __init omap2_gp_clocksource_init(int gptimer_id,
286 res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source); 311 res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source);
287 BUG_ON(res); 312 BUG_ON(res);
288 313
289 pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n",
290 gptimer_id, clksrc.rate);
291
292 __omap_dm_timer_load_start(&clksrc, 314 __omap_dm_timer_load_start(&clksrc,
293 OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1); 315 OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1);
294 setup_sched_clock(dmtimer_read_sched_clock, 32, clksrc.rate); 316 setup_sched_clock(dmtimer_read_sched_clock, 32, clksrc.rate);
@@ -296,15 +318,36 @@ static void __init omap2_gp_clocksource_init(int gptimer_id,
296 if (clocksource_register_hz(&clocksource_gpt, clksrc.rate)) 318 if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
297 pr_err("Could not register clocksource %s\n", 319 pr_err("Could not register clocksource %s\n",
298 clocksource_gpt.name); 320 clocksource_gpt.name);
321 else
322 pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n",
323 gptimer_id, clksrc.rate);
324}
325
326static void __init omap2_clocksource_init(int gptimer_id,
327 const char *fck_source)
328{
329 /*
330 * First give preference to kernel parameter configuration
331 * by user (clocksource="gp_timer").
332 *
333 * In case of missing kernel parameter for clocksource,
334 * first check for availability for 32k-sync timer, in case
335 * of failure in finding 32k_counter module or registering
336 * it as clocksource, execution will fallback to gp-timer.
337 */
338 if (use_gptimer_clksrc == true)
339 omap2_gptimer_clocksource_init(gptimer_id, fck_source);
340 else if (omap2_sync32k_clocksource_init())
341 /* Fall back to gp-timer code */
342 omap2_gptimer_clocksource_init(gptimer_id, fck_source);
299} 343}
300#endif
301 344
302#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src, \ 345#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src, \
303 clksrc_nr, clksrc_src) \ 346 clksrc_nr, clksrc_src) \
304static void __init omap##name##_timer_init(void) \ 347static void __init omap##name##_timer_init(void) \
305{ \ 348{ \
306 omap2_gp_clockevent_init((clkev_nr), clkev_src); \ 349 omap2_gp_clockevent_init((clkev_nr), clkev_src); \
307 omap2_gp_clocksource_init((clksrc_nr), clksrc_src); \ 350 omap2_clocksource_init((clksrc_nr), clksrc_src); \
308} 351}
309 352
310#define OMAP_SYS_TIMER(name) \ 353#define OMAP_SYS_TIMER(name) \
@@ -335,7 +378,7 @@ static DEFINE_TWD_LOCAL_TIMER(twd_local_timer,
335static void __init omap4_timer_init(void) 378static void __init omap4_timer_init(void)
336{ 379{
337 omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE); 380 omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE);
338 omap2_gp_clocksource_init(2, OMAP4_MPU_SOURCE); 381 omap2_clocksource_init(2, OMAP4_MPU_SOURCE);
339#ifdef CONFIG_LOCAL_TIMERS 382#ifdef CONFIG_LOCAL_TIMERS
340 /* Local timers are not supprted on OMAP4430 ES1.0 */ 383 /* Local timers are not supprted on OMAP4430 ES1.0 */
341 if (omap_rev() != OMAP4430_REV_ES1_0) { 384 if (omap_rev() != OMAP4430_REV_ES1_0) {
@@ -503,3 +546,28 @@ static int __init omap2_dm_timer_init(void)
503 return 0; 546 return 0;
504} 547}
505arch_initcall(omap2_dm_timer_init); 548arch_initcall(omap2_dm_timer_init);
549
550/**
551 * omap2_override_clocksource - clocksource override with user configuration
552 *
553 * Allows user to override default clocksource, using kernel parameter
554 * clocksource="gp_timer" (For all OMAP2PLUS architectures)
555 *
556 * Note that, here we are using same standard kernel parameter "clocksource=",
557 * and not introducing any OMAP specific interface.
558 */
559static int __init omap2_override_clocksource(char *str)
560{
561 if (!str)
562 return 0;
563 /*
564 * For OMAP architecture, we only have two options
565 * - sync_32k (default)
566 * - gp_timer (sys_clk based)
567 */
568 if (!strcmp(str, "gp_timer"))
569 use_gptimer_clksrc = true;
570
571 return 0;
572}
573early_param("clocksource", omap2_override_clocksource);
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index 8d5ed775dd56..b19d1b43c12e 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -90,7 +90,7 @@ void __init usb_musb_init(struct omap_musb_board_data *musb_board_data)
90 musb_plat.mode = board_data->mode; 90 musb_plat.mode = board_data->mode;
91 musb_plat.extvbus = board_data->extvbus; 91 musb_plat.extvbus = board_data->extvbus;
92 92
93 if (cpu_is_omap3517() || cpu_is_omap3505()) { 93 if (soc_is_am35xx()) {
94 oh_name = "am35x_otg_hs"; 94 oh_name = "am35x_otg_hs";
95 name = "musb-am35x"; 95 name = "musb-am35x";
96 } else if (cpu_is_ti81xx()) { 96 } else if (cpu_is_ti81xx()) {
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index 57db2038b23c..d0103c80d040 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -118,7 +118,7 @@ void __init omap3xxx_voltagedomains_init(void)
118 } 118 }
119#endif 119#endif
120 120
121 if (cpu_is_omap3517() || cpu_is_omap3505()) 121 if (soc_is_am35xx())
122 voltdms = voltagedomains_am35xx; 122 voltdms = voltagedomains_am35xx;
123 else 123 else
124 voltdms = voltagedomains_omap3; 124 voltdms = voltagedomains_omap3;
diff --git a/arch/arm/mach-s3c24xx/Makefile b/arch/arm/mach-s3c24xx/Makefile
index 3518fe812d5f..270a0b6f4f22 100644
--- a/arch/arm/mach-s3c24xx/Makefile
+++ b/arch/arm/mach-s3c24xx/Makefile
@@ -14,6 +14,8 @@ obj- :=
14 14
15# core 15# core
16 16
17obj-y += common.o
18
17obj-$(CONFIG_CPU_S3C2410) += s3c2410.o 19obj-$(CONFIG_CPU_S3C2410) += s3c2410.o
18obj-$(CONFIG_S3C2410_DMA) += dma-s3c2410.o 20obj-$(CONFIG_S3C2410_DMA) += dma-s3c2410.o
19obj-$(CONFIG_S3C2410_PM) += pm-s3c2410.o sleep-s3c2410.o 21obj-$(CONFIG_S3C2410_PM) += pm-s3c2410.o sleep-s3c2410.o
@@ -33,6 +35,10 @@ obj-$(CONFIG_S3C2440_DMA) += dma-s3c2440.o
33 35
34obj-$(CONFIG_CPU_S3C2443) += s3c2443.o irq-s3c2443.o clock-s3c2443.o 36obj-$(CONFIG_CPU_S3C2443) += s3c2443.o irq-s3c2443.o clock-s3c2443.o
35 37
38# PM
39
40obj-$(CONFIG_PM) += pm.o irq-pm.o sleep.o
41
36# common code 42# common code
37 43
38obj-$(CONFIG_S3C2443_COMMON) += common-s3c2443.o 44obj-$(CONFIG_S3C2443_COMMON) += common-s3c2443.o
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/mach-s3c24xx/common.c
index 290942d9adda..56cdd34cce41 100644
--- a/arch/arm/plat-s3c24xx/cpu.c
+++ b/arch/arm/mach-s3c24xx/common.c
@@ -4,7 +4,7 @@
4 * http://www.simtec.co.uk/products/SWLINUX/ 4 * http://www.simtec.co.uk/products/SWLINUX/
5 * Ben Dooks <ben@simtec.co.uk> 5 * Ben Dooks <ben@simtec.co.uk>
6 * 6 *
7 * S3C24XX CPU Support 7 * Common code for S3C24XX machines
8 * 8 *
9 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by 10 * it under the terms of the GNU General Public License as published by
@@ -41,6 +41,7 @@
41#include <asm/mach/arch.h> 41#include <asm/mach/arch.h>
42#include <asm/mach/map.h> 42#include <asm/mach/map.h>
43 43
44#include <mach/regs-clock.h>
44#include <mach/regs-gpio.h> 45#include <mach/regs-gpio.h>
45#include <plat/regs-serial.h> 46#include <plat/regs-serial.h>
46 47
@@ -52,6 +53,8 @@
52#include <plat/s3c2416.h> 53#include <plat/s3c2416.h>
53#include <plat/s3c244x.h> 54#include <plat/s3c244x.h>
54#include <plat/s3c2443.h> 55#include <plat/s3c2443.h>
56#include <plat/cpu-freq.h>
57#include <plat/pll.h>
55 58
56/* table of supported CPUs */ 59/* table of supported CPUs */
57 60
@@ -234,3 +237,67 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
234 237
235 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); 238 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
236} 239}
240
241/* Serial port registrations */
242
243static struct resource s3c2410_uart0_resource[] = {
244 [0] = DEFINE_RES_MEM(S3C2410_PA_UART0, SZ_16K),
245 [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX0, \
246 IRQ_S3CUART_ERR0 - IRQ_S3CUART_RX0 + 1, \
247 NULL, IORESOURCE_IRQ)
248};
249
250static struct resource s3c2410_uart1_resource[] = {
251 [0] = DEFINE_RES_MEM(S3C2410_PA_UART1, SZ_16K),
252 [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX1, \
253 IRQ_S3CUART_ERR1 - IRQ_S3CUART_RX1 + 1, \
254 NULL, IORESOURCE_IRQ)
255};
256
257static struct resource s3c2410_uart2_resource[] = {
258 [0] = DEFINE_RES_MEM(S3C2410_PA_UART2, SZ_16K),
259 [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX2, \
260 IRQ_S3CUART_ERR2 - IRQ_S3CUART_RX2 + 1, \
261 NULL, IORESOURCE_IRQ)
262};
263
264static struct resource s3c2410_uart3_resource[] = {
265 [0] = DEFINE_RES_MEM(S3C2443_PA_UART3, SZ_16K),
266 [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX3, \
267 IRQ_S3CUART_ERR3 - IRQ_S3CUART_RX3 + 1, \
268 NULL, IORESOURCE_IRQ)
269};
270
271struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
272 [0] = {
273 .resources = s3c2410_uart0_resource,
274 .nr_resources = ARRAY_SIZE(s3c2410_uart0_resource),
275 },
276 [1] = {
277 .resources = s3c2410_uart1_resource,
278 .nr_resources = ARRAY_SIZE(s3c2410_uart1_resource),
279 },
280 [2] = {
281 .resources = s3c2410_uart2_resource,
282 .nr_resources = ARRAY_SIZE(s3c2410_uart2_resource),
283 },
284 [3] = {
285 .resources = s3c2410_uart3_resource,
286 .nr_resources = ARRAY_SIZE(s3c2410_uart3_resource),
287 },
288};
289
290/* initialise all the clocks */
291
292void __init_or_cpufreq s3c24xx_setup_clocks(unsigned long fclk,
293 unsigned long hclk,
294 unsigned long pclk)
295{
296 clk_upll.rate = s3c24xx_get_pll(__raw_readl(S3C2410_UPLLCON),
297 clk_xtal.rate);
298
299 clk_mpll.rate = fclk;
300 clk_h.rate = hclk;
301 clk_p.rate = pclk;
302 clk_f.rate = fclk;
303}
diff --git a/arch/arm/plat-s3c24xx/irq-pm.c b/arch/arm/mach-s3c24xx/irq-pm.c
index 0efb2e2848c8..0efb2e2848c8 100644
--- a/arch/arm/plat-s3c24xx/irq-pm.c
+++ b/arch/arm/mach-s3c24xx/irq-pm.c
diff --git a/arch/arm/plat-s3c24xx/pm.c b/arch/arm/mach-s3c24xx/pm.c
index 60627e63a254..60627e63a254 100644
--- a/arch/arm/plat-s3c24xx/pm.c
+++ b/arch/arm/mach-s3c24xx/pm.c
diff --git a/arch/arm/plat-s3c24xx/sleep.S b/arch/arm/mach-s3c24xx/sleep.S
index c56612569b40..c56612569b40 100644
--- a/arch/arm/plat-s3c24xx/sleep.S
+++ b/arch/arm/mach-s3c24xx/sleep.S
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index 44ae077dbc28..2132c4f389e1 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -28,19 +28,20 @@
28 28
29#include <plat/clock.h> 29#include <plat/clock.h>
30 30
31/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */
32#define OMAP2_32KSYNCNT_CR_OFF 0x10
33
31/* 34/*
32 * 32KHz clocksource ... always available, on pretty most chips except 35 * 32KHz clocksource ... always available, on pretty most chips except
33 * OMAP 730 and 1510. Other timers could be used as clocksources, with 36 * OMAP 730 and 1510. Other timers could be used as clocksources, with
34 * higher resolution in free-running counter modes (e.g. 12 MHz xtal), 37 * higher resolution in free-running counter modes (e.g. 12 MHz xtal),
35 * but systems won't necessarily want to spend resources that way. 38 * but systems won't necessarily want to spend resources that way.
36 */ 39 */
37static void __iomem *timer_32k_base; 40static void __iomem *sync32k_cnt_reg;
38
39#define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410
40 41
41static u32 notrace omap_32k_read_sched_clock(void) 42static u32 notrace omap_32k_read_sched_clock(void)
42{ 43{
43 return timer_32k_base ? __raw_readl(timer_32k_base) : 0; 44 return sync32k_cnt_reg ? __raw_readl(sync32k_cnt_reg) : 0;
44} 45}
45 46
46/** 47/**
@@ -60,7 +61,7 @@ static void omap_read_persistent_clock(struct timespec *ts)
60 struct timespec *tsp = &persistent_ts; 61 struct timespec *tsp = &persistent_ts;
61 62
62 last_cycles = cycles; 63 last_cycles = cycles;
63 cycles = timer_32k_base ? __raw_readl(timer_32k_base) : 0; 64 cycles = sync32k_cnt_reg ? __raw_readl(sync32k_cnt_reg) : 0;
64 delta = cycles - last_cycles; 65 delta = cycles - last_cycles;
65 66
66 nsecs = clocksource_cyc2ns(delta, persistent_mult, persistent_shift); 67 nsecs = clocksource_cyc2ns(delta, persistent_mult, persistent_shift);
@@ -69,55 +70,41 @@ static void omap_read_persistent_clock(struct timespec *ts)
69 *ts = *tsp; 70 *ts = *tsp;
70} 71}
71 72
72int __init omap_init_clocksource_32k(void) 73/**
74 * omap_init_clocksource_32k - setup and register counter 32k as a
75 * kernel clocksource
76 * @pbase: base addr of counter_32k module
77 * @size: size of counter_32k to map
78 *
79 * Returns 0 upon success or negative error code upon failure.
80 *
81 */
82int __init omap_init_clocksource_32k(void __iomem *vbase)
73{ 83{
74 static char err[] __initdata = KERN_ERR 84 int ret;
75 "%s: can't register clocksource!\n"; 85
76 86 /*
77 if (cpu_is_omap16xx() || cpu_class_is_omap2()) { 87 * 32k sync Counter register offset is at 0x10
78 u32 pbase; 88 */
79 unsigned long size = SZ_4K; 89 sync32k_cnt_reg = vbase + OMAP2_32KSYNCNT_CR_OFF;
80 void __iomem *base; 90
81 struct clk *sync_32k_ick; 91 /*
82 92 * 120000 rough estimate from the calculations in
83 if (cpu_is_omap16xx()) { 93 * __clocksource_updatefreq_scale.
84 pbase = OMAP16XX_TIMER_32K_SYNCHRONIZED; 94 */
85 size = SZ_1K; 95 clocks_calc_mult_shift(&persistent_mult, &persistent_shift,
86 } else if (cpu_is_omap2420()) 96 32768, NSEC_PER_SEC, 120000);
87 pbase = OMAP2420_32KSYNCT_BASE + 0x10; 97
88 else if (cpu_is_omap2430()) 98 ret = clocksource_mmio_init(sync32k_cnt_reg, "32k_counter", 32768,
89 pbase = OMAP2430_32KSYNCT_BASE + 0x10; 99 250, 32, clocksource_mmio_readl_up);
90 else if (cpu_is_omap34xx()) 100 if (ret) {
91 pbase = OMAP3430_32KSYNCT_BASE + 0x10; 101 pr_err("32k_counter: can't register clocksource\n");
92 else if (cpu_is_omap44xx()) 102 return ret;
93 pbase = OMAP4430_32KSYNCT_BASE + 0x10;
94 else
95 return -ENODEV;
96
97 /* For this to work we must have a static mapping in io.c for this area */
98 base = ioremap(pbase, size);
99 if (!base)
100 return -ENODEV;
101
102 sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
103 if (!IS_ERR(sync_32k_ick))
104 clk_enable(sync_32k_ick);
105
106 timer_32k_base = base;
107
108 /*
109 * 120000 rough estimate from the calculations in
110 * __clocksource_updatefreq_scale.
111 */
112 clocks_calc_mult_shift(&persistent_mult, &persistent_shift,
113 32768, NSEC_PER_SEC, 120000);
114
115 if (clocksource_mmio_init(base, "32k_counter", 32768, 250, 32,
116 clocksource_mmio_readl_up))
117 printk(err, "32k_counter");
118
119 setup_sched_clock(omap_32k_read_sched_clock, 32, 32768);
120 register_persistent_clock(NULL, omap_read_persistent_clock);
121 } 103 }
104
105 setup_sched_clock(omap_32k_read_sched_clock, 32, 32768);
106 register_persistent_clock(NULL, omap_read_persistent_clock);
107 pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n");
108
122 return 0; 109 return 0;
123} 110}
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index 09b07d252892..1cba9273d2cb 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -28,54 +28,6 @@
28#include <plat/menelaus.h> 28#include <plat/menelaus.h>
29#include <plat/omap44xx.h> 29#include <plat/omap44xx.h>
30 30
31#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
32 defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
33
34#define OMAP_MMC_NR_RES 2
35
36/*
37 * Register MMC devices. Called from mach-omap1 and mach-omap2 device init.
38 */
39int __init omap_mmc_add(const char *name, int id, unsigned long base,
40 unsigned long size, unsigned int irq,
41 struct omap_mmc_platform_data *data)
42{
43 struct platform_device *pdev;
44 struct resource res[OMAP_MMC_NR_RES];
45 int ret;
46
47 pdev = platform_device_alloc(name, id);
48 if (!pdev)
49 return -ENOMEM;
50
51 memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource));
52 res[0].start = base;
53 res[0].end = base + size - 1;
54 res[0].flags = IORESOURCE_MEM;
55 res[1].start = res[1].end = irq;
56 res[1].flags = IORESOURCE_IRQ;
57
58 ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
59 if (ret == 0)
60 ret = platform_device_add_data(pdev, data, sizeof(*data));
61 if (ret)
62 goto fail;
63
64 ret = platform_device_add(pdev);
65 if (ret)
66 goto fail;
67
68 /* return device handle to board setup code */
69 data->dev = &pdev->dev;
70 return 0;
71
72fail:
73 platform_device_put(pdev);
74 return ret;
75}
76
77#endif
78
79/*-------------------------------------------------------------------------*/ 31/*-------------------------------------------------------------------------*/
80 32
81#if defined(CONFIG_HW_RANDOM_OMAP) || defined(CONFIG_HW_RANDOM_OMAP_MODULE) 33#if defined(CONFIG_HW_RANDOM_OMAP) || defined(CONFIG_HW_RANDOM_OMAP_MODULE)
@@ -109,79 +61,6 @@ static void omap_init_rng(void)
109static inline void omap_init_rng(void) {} 61static inline void omap_init_rng(void) {}
110#endif 62#endif
111 63
112/*-------------------------------------------------------------------------*/
113
114/* Numbering for the SPI-capable controllers when used for SPI:
115 * spi = 1
116 * uwire = 2
117 * mmc1..2 = 3..4
118 * mcbsp1..3 = 5..7
119 */
120
121#if defined(CONFIG_SPI_OMAP_UWIRE) || defined(CONFIG_SPI_OMAP_UWIRE_MODULE)
122
123#define OMAP_UWIRE_BASE 0xfffb3000
124
125static struct resource uwire_resources[] = {
126 {
127 .start = OMAP_UWIRE_BASE,
128 .end = OMAP_UWIRE_BASE + 0x20,
129 .flags = IORESOURCE_MEM,
130 },
131};
132
133static struct platform_device omap_uwire_device = {
134 .name = "omap_uwire",
135 .id = -1,
136 .num_resources = ARRAY_SIZE(uwire_resources),
137 .resource = uwire_resources,
138};
139
140static void omap_init_uwire(void)
141{
142 /* FIXME define and use a boot tag; not all boards will be hooking
143 * up devices to the microwire controller, and multi-board configs
144 * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
145 */
146
147 /* board-specific code must configure chipselects (only a few
148 * are normally used) and SCLK/SDI/SDO (each has two choices).
149 */
150 (void) platform_device_register(&omap_uwire_device);
151}
152#else
153static inline void omap_init_uwire(void) {}
154#endif
155
156#if defined(CONFIG_TIDSPBRIDGE) || defined(CONFIG_TIDSPBRIDGE_MODULE)
157
158static phys_addr_t omap_dsp_phys_mempool_base;
159
160void __init omap_dsp_reserve_sdram_memblock(void)
161{
162 phys_addr_t size = CONFIG_TIDSPBRIDGE_MEMPOOL_SIZE;
163 phys_addr_t paddr;
164
165 if (!size)
166 return;
167
168 paddr = arm_memblock_steal(size, SZ_1M);
169 if (!paddr) {
170 pr_err("%s: failed to reserve %llx bytes\n",
171 __func__, (unsigned long long)size);
172 return;
173 }
174
175 omap_dsp_phys_mempool_base = paddr;
176}
177
178phys_addr_t omap_dsp_get_mempool_base(void)
179{
180 return omap_dsp_phys_mempool_base;
181}
182EXPORT_SYMBOL(omap_dsp_get_mempool_base);
183#endif
184
185/* 64/*
186 * This gets called after board-specific INIT_MACHINE, and initializes most 65 * This gets called after board-specific INIT_MACHINE, and initializes most
187 * on-chip peripherals accessible on this board (except for few like USB): 66 * on-chip peripherals accessible on this board (except for few like USB):
@@ -208,7 +87,6 @@ static int __init omap_init_devices(void)
208 * in alphabetical order so they're easier to sort through. 87 * in alphabetical order so they're easier to sort through.
209 */ 88 */
210 omap_init_rng(); 89 omap_init_rng();
211 omap_init_uwire();
212 return 0; 90 return 0;
213} 91}
214arch_initcall(omap_init_devices); 92arch_initcall(omap_init_devices);
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 987e6101267d..cb16ade437cb 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -852,7 +852,7 @@ omap_dma_set_prio_lch(int lch, unsigned char read_prio,
852 } 852 }
853 l = p->dma_read(CCR, lch); 853 l = p->dma_read(CCR, lch);
854 l &= ~((1 << 6) | (1 << 26)); 854 l &= ~((1 << 6) | (1 << 26));
855 if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) 855 if (cpu_class_is_omap2() && !cpu_is_omap242x())
856 l |= ((read_prio & 0x1) << 6) | ((write_prio & 0x1) << 26); 856 l |= ((read_prio & 0x1) << 6) | ((write_prio & 0x1) << 26);
857 else 857 else
858 l |= ((read_prio & 0x1) << 6); 858 l |= ((read_prio & 0x1) << 6);
@@ -2080,7 +2080,7 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev)
2080 } 2080 }
2081 } 2081 }
2082 2082
2083 if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) 2083 if (cpu_class_is_omap2() && !cpu_is_omap242x())
2084 omap_dma_set_global_params(DMA_DEFAULT_ARB_RATE, 2084 omap_dma_set_global_params(DMA_DEFAULT_ARB_RATE,
2085 DMA_DEFAULT_FIFO_DEPTH, 0); 2085 DMA_DEFAULT_FIFO_DEPTH, 0);
2086 2086
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index c4ed35e89fbd..3b0cfeb33d05 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -82,8 +82,6 @@ static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg,
82 82
83static void omap_timer_restore_context(struct omap_dm_timer *timer) 83static void omap_timer_restore_context(struct omap_dm_timer *timer)
84{ 84{
85 __raw_writel(timer->context.tiocp_cfg,
86 timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET);
87 if (timer->revision == 1) 85 if (timer->revision == 1)
88 __raw_writel(timer->context.tistat, timer->sys_stat); 86 __raw_writel(timer->context.tistat, timer->sys_stat);
89 87
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index a557b8484e6c..d1cb6f527b7e 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -30,7 +30,7 @@
30#include <plat/i2c.h> 30#include <plat/i2c.h>
31#include <plat/omap_hwmod.h> 31#include <plat/omap_hwmod.h>
32 32
33extern int __init omap_init_clocksource_32k(void); 33extern int __init omap_init_clocksource_32k(void __iomem *vbase);
34 34
35extern void __init omap_check_revision(void); 35extern void __init omap_check_revision(void);
36 36
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 4bdf14ec6747..297245dba66e 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -121,6 +121,7 @@ IS_OMAP_CLASS(16xx, 0x16)
121IS_OMAP_CLASS(24xx, 0x24) 121IS_OMAP_CLASS(24xx, 0x24)
122IS_OMAP_CLASS(34xx, 0x34) 122IS_OMAP_CLASS(34xx, 0x34)
123IS_OMAP_CLASS(44xx, 0x44) 123IS_OMAP_CLASS(44xx, 0x44)
124IS_AM_CLASS(35xx, 0x35)
124IS_AM_CLASS(33xx, 0x33) 125IS_AM_CLASS(33xx, 0x33)
125 126
126IS_TI_CLASS(81xx, 0x81) 127IS_TI_CLASS(81xx, 0x81)
@@ -148,6 +149,7 @@ IS_AM_SUBCLASS(335x, 0x335)
148#define cpu_is_ti81xx() 0 149#define cpu_is_ti81xx() 0
149#define cpu_is_ti816x() 0 150#define cpu_is_ti816x() 0
150#define cpu_is_ti814x() 0 151#define cpu_is_ti814x() 0
152#define soc_is_am35xx() 0
151#define cpu_is_am33xx() 0 153#define cpu_is_am33xx() 0
152#define cpu_is_am335x() 0 154#define cpu_is_am335x() 0
153#define cpu_is_omap44xx() 0 155#define cpu_is_omap44xx() 0
@@ -357,6 +359,7 @@ IS_OMAP_TYPE(3517, 0x3517)
357# undef cpu_is_ti81xx 359# undef cpu_is_ti81xx
358# undef cpu_is_ti816x 360# undef cpu_is_ti816x
359# undef cpu_is_ti814x 361# undef cpu_is_ti814x
362# undef soc_is_am35xx
360# undef cpu_is_am33xx 363# undef cpu_is_am33xx
361# undef cpu_is_am335x 364# undef cpu_is_am335x
362# define cpu_is_omap3430() is_omap3430() 365# define cpu_is_omap3430() is_omap3430()
@@ -378,6 +381,7 @@ IS_OMAP_TYPE(3517, 0x3517)
378# define cpu_is_ti81xx() is_ti81xx() 381# define cpu_is_ti81xx() is_ti81xx()
379# define cpu_is_ti816x() is_ti816x() 382# define cpu_is_ti816x() is_ti816x()
380# define cpu_is_ti814x() is_ti814x() 383# define cpu_is_ti814x() is_ti814x()
384# define soc_is_am35xx() is_am35xx()
381# define cpu_is_am33xx() is_am33xx() 385# define cpu_is_am33xx() is_am33xx()
382# define cpu_is_am335x() is_am335x() 386# define cpu_is_am335x() is_am335x()
383#endif 387#endif
@@ -433,6 +437,10 @@ IS_OMAP_TYPE(3517, 0x3517)
433#define TI8148_REV_ES2_0 (TI814X_CLASS | (0x1 << 8)) 437#define TI8148_REV_ES2_0 (TI814X_CLASS | (0x1 << 8))
434#define TI8148_REV_ES2_1 (TI814X_CLASS | (0x2 << 8)) 438#define TI8148_REV_ES2_1 (TI814X_CLASS | (0x2 << 8))
435 439
440#define AM35XX_CLASS 0x35170034
441#define AM35XX_REV_ES1_0 AM35XX_CLASS
442#define AM35XX_REV_ES1_1 (AM35XX_CLASS | (0x1 << 8))
443
436#define AM335X_CLASS 0x33500034 444#define AM335X_CLASS 0x33500034
437#define AM335X_REV_ES1_0 AM335X_CLASS 445#define AM335X_REV_ES1_0 AM335X_CLASS
438 446
diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat/dma.h
index 42afb4c45517..c5811d4409b0 100644
--- a/arch/arm/plat-omap/include/plat/dma.h
+++ b/arch/arm/plat-omap/include/plat/dma.h
@@ -312,6 +312,11 @@
312#define CLEAR_CSR_ON_READ BIT(0xC) 312#define CLEAR_CSR_ON_READ BIT(0xC)
313#define IS_WORD_16 BIT(0xD) 313#define IS_WORD_16 BIT(0xD)
314 314
315/* Defines for DMA Capabilities */
316#define DMA_HAS_TRANSPARENT_CAPS (0x1 << 18)
317#define DMA_HAS_CONSTANT_FILL_CAPS (0x1 << 19)
318#define DMA_HAS_DESCRIPTOR_CAPS (0x3 << 20)
319
315enum omap_reg_offsets { 320enum omap_reg_offsets {
316 321
317GCR, GSCR, GRST1, HW_ID, 322GCR, GSCR, GRST1, HW_ID,
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
index bdf871a84d62..5da73562e486 100644
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -75,7 +75,6 @@ struct clk;
75 75
76struct timer_regs { 76struct timer_regs {
77 u32 tidr; 77 u32 tidr;
78 u32 tiocp_cfg;
79 u32 tistat; 78 u32 tistat;
80 u32 tisr; 79 u32 tisr;
81 u32 tier; 80 u32 tier;
diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h
index 3e7ae0f0215f..a7754a886d42 100644
--- a/arch/arm/plat-omap/include/plat/mmc.h
+++ b/arch/arm/plat-omap/include/plat/mmc.h
@@ -177,9 +177,6 @@ extern void omap_mmc_notify_cover_event(struct device *dev, int slot,
177void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, 177void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
178 int nr_controllers); 178 int nr_controllers);
179void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data); 179void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data);
180int omap_mmc_add(const char *name, int id, unsigned long base,
181 unsigned long size, unsigned int irq,
182 struct omap_mmc_platform_data *data);
183#else 180#else
184static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, 181static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
185 int nr_controllers) 182 int nr_controllers)
@@ -188,12 +185,6 @@ static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
188static inline void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data) 185static inline void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
189{ 186{
190} 187}
191static inline int omap_mmc_add(const char *name, int id, unsigned long base,
192 unsigned long size, unsigned int irq,
193 struct omap_mmc_platform_data *data)
194{
195 return 0;
196}
197 188
198#endif 189#endif
199 190
diff --git a/arch/arm/plat-s3c24xx/Makefile b/arch/arm/plat-s3c24xx/Makefile
index 2467b800cc76..9f60549c8da1 100644
--- a/arch/arm/plat-s3c24xx/Makefile
+++ b/arch/arm/plat-s3c24xx/Makefile
@@ -12,10 +12,7 @@ obj- :=
12 12
13# Core files 13# Core files
14 14
15obj-y += cpu.o
16obj-y += irq.o 15obj-y += irq.o
17obj-y += dev-uart.o
18obj-y += clock.o
19obj-$(CONFIG_S3C24XX_DCLK) += clock-dclk.o 16obj-$(CONFIG_S3C24XX_DCLK) += clock-dclk.o
20 17
21obj-$(CONFIG_CPU_FREQ_S3C24XX) += cpu-freq.o 18obj-$(CONFIG_CPU_FREQ_S3C24XX) += cpu-freq.o
@@ -23,9 +20,6 @@ obj-$(CONFIG_CPU_FREQ_S3C24XX_DEBUGFS) += cpu-freq-debugfs.o
23 20
24# Architecture dependent builds 21# Architecture dependent builds
25 22
26obj-$(CONFIG_PM) += pm.o
27obj-$(CONFIG_PM) += irq-pm.o
28obj-$(CONFIG_PM) += sleep.o
29obj-$(CONFIG_S3C2410_CLOCK) += s3c2410-clock.o 23obj-$(CONFIG_S3C2410_CLOCK) += s3c2410-clock.o
30obj-$(CONFIG_S3C24XX_DMA) += dma.o 24obj-$(CONFIG_S3C24XX_DMA) += dma.o
31obj-$(CONFIG_S3C2410_IOTIMING) += s3c2410-iotiming.o 25obj-$(CONFIG_S3C2410_IOTIMING) += s3c2410-iotiming.o
diff --git a/arch/arm/plat-s3c24xx/clock.c b/arch/arm/plat-s3c24xx/clock.c
deleted file mode 100644
index 931d26d1a54b..000000000000
--- a/arch/arm/plat-s3c24xx/clock.c
+++ /dev/null
@@ -1,59 +0,0 @@
1/* linux/arch/arm/plat-s3c24xx/clock.c
2 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C24XX Core clock control support
7 *
8 * Based on, and code from linux/arch/arm/mach-versatile/clock.c
9 **
10 ** Copyright (C) 2004 ARM Limited.
11 ** Written by Deep Blue Solutions Limited.
12 *
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27*/
28
29#include <linux/init.h>
30#include <linux/kernel.h>
31#include <linux/clk.h>
32#include <linux/io.h>
33
34#include <mach/hardware.h>
35#include <asm/irq.h>
36
37#include <mach/regs-clock.h>
38#include <mach/regs-gpio.h>
39
40#include <plat/cpu-freq.h>
41
42#include <plat/clock.h>
43#include <plat/cpu.h>
44#include <plat/pll.h>
45
46/* initialise all the clocks */
47
48void __init_or_cpufreq s3c24xx_setup_clocks(unsigned long fclk,
49 unsigned long hclk,
50 unsigned long pclk)
51{
52 clk_upll.rate = s3c24xx_get_pll(__raw_readl(S3C2410_UPLLCON),
53 clk_xtal.rate);
54
55 clk_mpll.rate = fclk;
56 clk_h.rate = hclk;
57 clk_p.rate = pclk;
58 clk_f.rate = fclk;
59}
diff --git a/arch/arm/plat-s3c24xx/dev-uart.c b/arch/arm/plat-s3c24xx/dev-uart.c
deleted file mode 100644
index 9ab22e662fff..000000000000
--- a/arch/arm/plat-s3c24xx/dev-uart.c
+++ /dev/null
@@ -1,100 +0,0 @@
1/* linux/arch/arm/plat-s3c24xx/dev-uart.c
2 *
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Base S3C24XX UART resource and platform device definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/list.h>
17#include <linux/serial_core.h>
18#include <linux/platform_device.h>
19
20#include <asm/mach/arch.h>
21#include <asm/mach/map.h>
22#include <asm/mach/irq.h>
23#include <mach/hardware.h>
24#include <mach/map.h>
25
26#include <plat/devs.h>
27#include <plat/regs-serial.h>
28
29/* Serial port registrations */
30
31static struct resource s3c2410_uart0_resource[] = {
32 [0] = {
33 .start = S3C2410_PA_UART0,
34 .end = S3C2410_PA_UART0 + 0x3fff,
35 .flags = IORESOURCE_MEM,
36 },
37 [1] = {
38 .start = IRQ_S3CUART_RX0,
39 .end = IRQ_S3CUART_ERR0,
40 .flags = IORESOURCE_IRQ,
41 }
42};
43
44static struct resource s3c2410_uart1_resource[] = {
45 [0] = {
46 .start = S3C2410_PA_UART1,
47 .end = S3C2410_PA_UART1 + 0x3fff,
48 .flags = IORESOURCE_MEM,
49 },
50 [1] = {
51 .start = IRQ_S3CUART_RX1,
52 .end = IRQ_S3CUART_ERR1,
53 .flags = IORESOURCE_IRQ,
54 }
55};
56
57static struct resource s3c2410_uart2_resource[] = {
58 [0] = {
59 .start = S3C2410_PA_UART2,
60 .end = S3C2410_PA_UART2 + 0x3fff,
61 .flags = IORESOURCE_MEM,
62 },
63 [1] = {
64 .start = IRQ_S3CUART_RX2,
65 .end = IRQ_S3CUART_ERR2,
66 .flags = IORESOURCE_IRQ,
67 }
68};
69
70static struct resource s3c2410_uart3_resource[] = {
71 [0] = {
72 .start = S3C2443_PA_UART3,
73 .end = S3C2443_PA_UART3 + 0x3fff,
74 .flags = IORESOURCE_MEM,
75 },
76 [1] = {
77 .start = IRQ_S3CUART_RX3,
78 .end = IRQ_S3CUART_ERR3,
79 .flags = IORESOURCE_IRQ,
80 },
81};
82
83struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
84 [0] = {
85 .resources = s3c2410_uart0_resource,
86 .nr_resources = ARRAY_SIZE(s3c2410_uart0_resource),
87 },
88 [1] = {
89 .resources = s3c2410_uart1_resource,
90 .nr_resources = ARRAY_SIZE(s3c2410_uart1_resource),
91 },
92 [2] = {
93 .resources = s3c2410_uart2_resource,
94 .nr_resources = ARRAY_SIZE(s3c2410_uart2_resource),
95 },
96 [3] = {
97 .resources = s3c2410_uart3_resource,
98 .nr_resources = ARRAY_SIZE(s3c2410_uart3_resource),
99 },
100};
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
deleted file mode 100644
index 2c1193c59928..000000000000
--- a/arch/arm/plat-s5p/Kconfig
+++ /dev/null
@@ -1,132 +0,0 @@
1# arch/arm/plat-s5p/Kconfig
2#
3# Copyright (c) 2009 Samsung Electronics Co., Ltd.
4# http://www.samsung.com/
5#
6# Licensed under GPLv2
7
8config PLAT_S5P
9 bool
10 depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
11 default y
12 select ARM_VIC if !ARCH_EXYNOS
13 select ARM_GIC if ARCH_EXYNOS
14 select GIC_NON_BANKED if ARCH_EXYNOS4
15 select NO_IOPORT
16 select ARCH_REQUIRE_GPIOLIB
17 select S3C_GPIO_TRACK
18 select S5P_GPIO_DRVSTR
19 select SAMSUNG_GPIOLIB_4BIT
20 select PLAT_SAMSUNG
21 select SAMSUNG_CLKSRC
22 select SAMSUNG_IRQ_VIC_TIMER
23 help
24 Base platform code for Samsung's S5P series SoC.
25
26config S5P_EXT_INT
27 bool
28 help
29 Use the external interrupts (other than GPIO interrupts.)
30 Note: Do not choose this for S5P6440 and S5P6450.
31
32config S5P_GPIO_INT
33 bool
34 help
35 Common code for the GPIO interrupts (other than external interrupts.)
36
37config S5P_HRT
38 bool
39 select SAMSUNG_DEV_PWM
40 help
41 Use the High Resolution timer support
42
43config S5P_DEV_UART
44 def_bool y
45 depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210)
46
47config S5P_PM
48 bool
49 help
50 Common code for power management support on S5P and newer SoCs
51 Note: Do not select this for S5P6440 and S5P6450.
52
53config S5P_SLEEP
54 bool
55 help
56 Internal config node to apply common S5P sleep management code.
57 Can be selected by S5P and newer SoCs with similar sleep procedure.
58
59config S5P_DEV_FIMC0
60 bool
61 help
62 Compile in platform device definitions for FIMC controller 0
63
64config S5P_DEV_FIMC1
65 bool
66 help
67 Compile in platform device definitions for FIMC controller 1
68
69config S5P_DEV_FIMC2
70 bool
71 help
72 Compile in platform device definitions for FIMC controller 2
73
74config S5P_DEV_FIMC3
75 bool
76 help
77 Compile in platform device definitions for FIMC controller 3
78
79config S5P_DEV_JPEG
80 bool
81 help
82 Compile in platform device definitions for JPEG codec
83
84config S5P_DEV_G2D
85 bool
86 help
87 Compile in platform device definitions for G2D device
88
89config S5P_DEV_FIMD0
90 bool
91 help
92 Compile in platform device definitions for FIMD controller 0
93
94config S5P_DEV_I2C_HDMIPHY
95 bool
96 help
97 Compile in platform device definitions for I2C HDMIPHY controller
98
99config S5P_DEV_MFC
100 bool
101 help
102 Compile in platform device definitions for MFC
103
104config S5P_DEV_ONENAND
105 bool
106 help
107 Compile in platform device definition for OneNAND controller
108
109config S5P_DEV_CSIS0
110 bool
111 help
112 Compile in platform device definitions for MIPI-CSIS channel 0
113
114config S5P_DEV_CSIS1
115 bool
116 help
117 Compile in platform device definitions for MIPI-CSIS channel 1
118
119config S5P_DEV_TV
120 bool
121 help
122 Compile in platform device definition for TV interface
123
124config S5P_DEV_USB_EHCI
125 bool
126 help
127 Compile in platform device definition for USB EHCI
128
129config S5P_SETUP_MIPIPHY
130 bool
131 help
132 Compile in common setup code for MIPI-CSIS and MIPI-DSIM devices
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
deleted file mode 100644
index 4953d50707be..000000000000
--- a/arch/arm/plat-s5p/Makefile
+++ /dev/null
@@ -1,27 +0,0 @@
1# arch/arm/plat-s5p/Makefile
2#
3# Copyright (c) 2009 Samsung Electronics Co., Ltd.
4# http://www.samsung.com/
5#
6# Licensed under GPLv2
7
8obj-y :=
9obj-m :=
10obj-n := dummy.o
11obj- :=
12
13# Core files
14
15obj-y += clock.o
16obj-y += irq.o
17obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o
18obj-$(CONFIG_S5P_GPIO_INT) += irq-gpioint.o
19obj-$(CONFIG_S5P_PM) += pm.o irq-pm.o
20obj-$(CONFIG_S5P_SLEEP) += sleep.o
21obj-$(CONFIG_S5P_HRT) += s5p-time.o
22
23# devices
24
25obj-$(CONFIG_S5P_DEV_UART) += dev-uart.o
26obj-$(CONFIG_S5P_DEV_MFC) += dev-mfc.o
27obj-$(CONFIG_S5P_SETUP_MIPIPHY) += setup-mipiphy.o
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index a0ffc77da809..f8c571031da8 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -13,6 +13,24 @@ config PLAT_SAMSUNG
13 help 13 help
14 Base platform code for all Samsung SoC based systems 14 Base platform code for all Samsung SoC based systems
15 15
16config PLAT_S5P
17 bool
18 depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
19 default y
20 select ARM_VIC if !ARCH_EXYNOS
21 select ARM_GIC if ARCH_EXYNOS
22 select GIC_NON_BANKED if ARCH_EXYNOS4
23 select NO_IOPORT
24 select ARCH_REQUIRE_GPIOLIB
25 select S3C_GPIO_TRACK
26 select S5P_GPIO_DRVSTR
27 select SAMSUNG_GPIOLIB_4BIT
28 select PLAT_SAMSUNG
29 select SAMSUNG_CLKSRC
30 select SAMSUNG_IRQ_VIC_TIMER
31 help
32 Base platform code for Samsung's S5P series SoC.
33
16if PLAT_SAMSUNG 34if PLAT_SAMSUNG
17 35
18# boot configurations 36# boot configurations
@@ -50,6 +68,14 @@ config S3C_LOWLEVEL_UART_PORT
50 this configuration should be between zero and two. The port 68 this configuration should be between zero and two. The port
51 must have been initialised by the boot-loader before use. 69 must have been initialised by the boot-loader before use.
52 70
71# timer options
72
73config S5P_HRT
74 bool
75 select SAMSUNG_DEV_PWM
76 help
77 Use the High Resolution timer support
78
53# clock options 79# clock options
54 80
55config SAMSUNG_CLKSRC 81config SAMSUNG_CLKSRC
@@ -58,6 +84,11 @@ config SAMSUNG_CLKSRC
58 Select the clock code for the clksrc implementation 84 Select the clock code for the clksrc implementation
59 used by newer systems such as the S3C64XX. 85 used by newer systems such as the S3C64XX.
60 86
87config S5P_CLOCK
88 def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
89 help
90 Support common clock part for ARCH_S5P and ARCH_EXYNOS SoCs
91
61# options for IRQ support 92# options for IRQ support
62 93
63config SAMSUNG_IRQ_VIC_TIMER 94config SAMSUNG_IRQ_VIC_TIMER
@@ -65,6 +96,22 @@ config SAMSUNG_IRQ_VIC_TIMER
65 help 96 help
66 Internal configuration to build the VIC timer interrupt code. 97 Internal configuration to build the VIC timer interrupt code.
67 98
99config S5P_IRQ
100 def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
101 help
102 Support common interrup part for ARCH_S5P and ARCH_EXYNOS SoCs
103
104config S5P_EXT_INT
105 bool
106 help
107 Use the external interrupts (other than GPIO interrupts.)
108 Note: Do not choose this for S5P6440 and S5P6450.
109
110config S5P_GPIO_INT
111 bool
112 help
113 Common code for the GPIO interrupts (other than external interrupts.)
114
68# options for gpio configuration support 115# options for gpio configuration support
69 116
70config SAMSUNG_GPIOLIB_4BIT 117config SAMSUNG_GPIOLIB_4BIT
@@ -117,6 +164,12 @@ config S3C_GPIO_TRACK
117 Internal configuration option to enable the s3c specific gpio 164 Internal configuration option to enable the s3c specific gpio
118 chip tracking if the platform requires it. 165 chip tracking if the platform requires it.
119 166
167# uart options
168
169config S5P_DEV_UART
170 def_bool y
171 depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210)
172
120# ADC driver 173# ADC driver
121 174
122config S3C_ADC 175config S3C_ADC
@@ -274,6 +327,76 @@ config SAMSUNG_DEV_BACKLIGHT
274 help 327 help
275 Compile in platform device definition LCD backlight with PWM Timer 328 Compile in platform device definition LCD backlight with PWM Timer
276 329
330config S5P_DEV_CSIS0
331 bool
332 help
333 Compile in platform device definitions for MIPI-CSIS channel 0
334
335config S5P_DEV_CSIS1
336 bool
337 help
338 Compile in platform device definitions for MIPI-CSIS channel 1
339
340config S5P_DEV_FIMC0
341 bool
342 help
343 Compile in platform device definitions for FIMC controller 0
344
345config S5P_DEV_FIMC1
346 bool
347 help
348 Compile in platform device definitions for FIMC controller 1
349
350config S5P_DEV_FIMC2
351 bool
352 help
353 Compile in platform device definitions for FIMC controller 2
354
355config S5P_DEV_FIMC3
356 bool
357 help
358 Compile in platform device definitions for FIMC controller 3
359
360config S5P_DEV_FIMD0
361 bool
362 help
363 Compile in platform device definitions for FIMD controller 0
364
365config S5P_DEV_G2D
366 bool
367 help
368 Compile in platform device definitions for G2D device
369
370config S5P_DEV_I2C_HDMIPHY
371 bool
372 help
373 Compile in platform device definitions for I2C HDMIPHY controller
374
375config S5P_DEV_JPEG
376 bool
377 help
378 Compile in platform device definitions for JPEG codec
379
380config S5P_DEV_MFC
381 bool
382 help
383 Compile in setup memory (init) code for MFC
384
385config S5P_DEV_ONENAND
386 bool
387 help
388 Compile in platform device definition for OneNAND controller
389
390config S5P_DEV_TV
391 bool
392 help
393 Compile in platform device definition for TV interface
394
395config S5P_DEV_USB_EHCI
396 bool
397 help
398 Compile in platform device definition for USB EHCI
399
277config S3C24XX_PWM 400config S3C24XX_PWM
278 bool "PWM device support" 401 bool "PWM device support"
279 select HAVE_PWM 402 select HAVE_PWM
@@ -281,6 +404,11 @@ config S3C24XX_PWM
281 Support for exporting the PWM timer blocks via the pwm device 404 Support for exporting the PWM timer blocks via the pwm device
282 system 405 system
283 406
407config S5P_SETUP_MIPIPHY
408 bool
409 help
410 Compile in common setup code for MIPI-CSIS and MIPI-DSIM devices
411
284# DMA 412# DMA
285 413
286config S3C_DMA 414config S3C_DMA
@@ -351,6 +479,18 @@ config SAMSUNG_WAKEMASK
351 and above. This code allows a set of interrupt to wakeup-mask 479 and above. This code allows a set of interrupt to wakeup-mask
352 mappings. See <plat/wakeup-mask.h> 480 mappings. See <plat/wakeup-mask.h>
353 481
482config S5P_PM
483 bool
484 help
485 Common code for power management support on S5P and newer SoCs
486 Note: Do not select this for S5P6440 and S5P6450.
487
488config S5P_SLEEP
489 bool
490 help
491 Internal config node to apply common S5P sleep management code.
492 Can be selected by S5P and newer SoCs with similar sleep procedure.
493
354comment "Power Domain" 494comment "Power Domain"
355 495
356config SAMSUNG_PD 496config SAMSUNG_PD
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 6012366f33cb..860b2db4db15 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -13,12 +13,18 @@ obj- :=
13 13
14obj-y += init.o cpu.o 14obj-y += init.o cpu.o
15obj-$(CONFIG_ARCH_USES_GETTIMEOFFSET) += time.o 15obj-$(CONFIG_ARCH_USES_GETTIMEOFFSET) += time.o
16obj-$(CONFIG_S5P_HRT) += s5p-time.o
17
16obj-y += clock.o 18obj-y += clock.o
17obj-y += pwm-clock.o 19obj-y += pwm-clock.o
18 20
19obj-$(CONFIG_SAMSUNG_CLKSRC) += clock-clksrc.o 21obj-$(CONFIG_SAMSUNG_CLKSRC) += clock-clksrc.o
22obj-$(CONFIG_S5P_CLOCK) += s5p-clock.o
20 23
21obj-$(CONFIG_SAMSUNG_IRQ_VIC_TIMER) += irq-vic-timer.o 24obj-$(CONFIG_SAMSUNG_IRQ_VIC_TIMER) += irq-vic-timer.o
25obj-$(CONFIG_S5P_IRQ) += s5p-irq.o
26obj-$(CONFIG_S5P_EXT_INT) += s5p-irq-eint.o
27obj-$(CONFIG_S5P_GPIO_INT) += s5p-irq-gpioint.o
22 28
23# ADC 29# ADC
24 30
@@ -30,9 +36,13 @@ obj-y += platformdata.o
30 36
31obj-y += devs.o 37obj-y += devs.o
32obj-y += dev-uart.o 38obj-y += dev-uart.o
39obj-$(CONFIG_S5P_DEV_MFC) += s5p-dev-mfc.o
40obj-$(CONFIG_S5P_DEV_UART) += s5p-dev-uart.o
33 41
34obj-$(CONFIG_SAMSUNG_DEV_BACKLIGHT) += dev-backlight.o 42obj-$(CONFIG_SAMSUNG_DEV_BACKLIGHT) += dev-backlight.o
35 43
44obj-$(CONFIG_S5P_SETUP_MIPIPHY) += setup-mipiphy.o
45
36# DMA support 46# DMA support
37 47
38obj-$(CONFIG_S3C_DMA) += dma.o s3c-dma-ops.o 48obj-$(CONFIG_S3C_DMA) += dma.o s3c-dma-ops.o
@@ -47,6 +57,9 @@ obj-$(CONFIG_SAMSUNG_PM_CHECK) += pm-check.o
47 57
48obj-$(CONFIG_SAMSUNG_WAKEMASK) += wakeup-mask.o 58obj-$(CONFIG_SAMSUNG_WAKEMASK) += wakeup-mask.o
49 59
60obj-$(CONFIG_S5P_PM) += s5p-pm.o s5p-irq-pm.o
61obj-$(CONFIG_S5P_SLEEP) += s5p-sleep.o
62
50# PD support 63# PD support
51 64
52obj-$(CONFIG_SAMSUNG_PD) += pd.o 65obj-$(CONFIG_SAMSUNG_PD) += pd.o
diff --git a/arch/arm/plat-s5p/clock.c b/arch/arm/plat-samsung/s5p-clock.c
index f68a9bb11948..41d3dfd5dddb 100644
--- a/arch/arm/plat-s5p/clock.c
+++ b/arch/arm/plat-samsung/s5p-clock.c
@@ -1,5 +1,4 @@
1/* linux/arch/arm/plat-s5p/clock.c 1/*
2 *
3 * Copyright 2009 Samsung Electronics Co., Ltd. 2 * Copyright 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/ 3 * http://www.samsung.com/
5 * 4 *
diff --git a/arch/arm/plat-s5p/dev-mfc.c b/arch/arm/plat-samsung/s5p-dev-mfc.c
index a30d36b7f61b..ad6089465e2a 100644
--- a/arch/arm/plat-s5p/dev-mfc.c
+++ b/arch/arm/plat-samsung/s5p-dev-mfc.c
@@ -1,5 +1,4 @@
1/* linux/arch/arm/plat-s5p/dev-mfc.c 1/*
2 *
3 * Copyright (C) 2010-2011 Samsung Electronics Co.Ltd 2 * Copyright (C) 2010-2011 Samsung Electronics Co.Ltd
4 * 3 *
5 * Base S5P MFC resource and device definitions 4 * Base S5P MFC resource and device definitions
@@ -9,7 +8,6 @@
9 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
10 */ 9 */
11 10
12
13#include <linux/kernel.h> 11#include <linux/kernel.h>
14#include <linux/interrupt.h> 12#include <linux/interrupt.h>
15#include <linux/platform_device.h> 13#include <linux/platform_device.h>
diff --git a/arch/arm/plat-s5p/dev-uart.c b/arch/arm/plat-samsung/s5p-dev-uart.c
index c9308db36183..cafa3deddcc1 100644
--- a/arch/arm/plat-s5p/dev-uart.c
+++ b/arch/arm/plat-samsung/s5p-dev-uart.c
@@ -1,6 +1,5 @@
1/* linux/arch/arm/plat-s5p/dev-uart.c 1/*
2 * 2 * Copyright (c) 2009,2012 Samsung Electronics Co., Ltd.
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/ 3 * http://www.samsung.com/
5 * 4 *
6 * Base S5P UART resource and device definitions 5 * Base S5P UART resource and device definitions
@@ -14,6 +13,7 @@
14#include <linux/types.h> 13#include <linux/types.h>
15#include <linux/interrupt.h> 14#include <linux/interrupt.h>
16#include <linux/list.h> 15#include <linux/list.h>
16#include <linux/ioport.h>
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18 18
19#include <asm/mach/arch.h> 19#include <asm/mach/arch.h>
@@ -26,86 +26,38 @@
26 /* Serial port registrations */ 26 /* Serial port registrations */
27 27
28static struct resource s5p_uart0_resource[] = { 28static struct resource s5p_uart0_resource[] = {
29 [0] = { 29 [0] = DEFINE_RES_MEM(S5P_PA_UART0, S5P_SZ_UART),
30 .start = S5P_PA_UART0, 30 [1] = DEFINE_RES_IRQ(IRQ_UART0),
31 .end = S5P_PA_UART0 + S5P_SZ_UART - 1,
32 .flags = IORESOURCE_MEM,
33 },
34 [1] = {
35 .start = IRQ_UART0,
36 .end = IRQ_UART0,
37 .flags = IORESOURCE_IRQ,
38 },
39}; 31};
40 32
41static struct resource s5p_uart1_resource[] = { 33static struct resource s5p_uart1_resource[] = {
42 [0] = { 34 [0] = DEFINE_RES_MEM(S5P_PA_UART1, S5P_SZ_UART),
43 .start = S5P_PA_UART1, 35 [1] = DEFINE_RES_IRQ(IRQ_UART1),
44 .end = S5P_PA_UART1 + S5P_SZ_UART - 1,
45 .flags = IORESOURCE_MEM,
46 },
47 [1] = {
48 .start = IRQ_UART1,
49 .end = IRQ_UART1,
50 .flags = IORESOURCE_IRQ,
51 },
52}; 36};
53 37
54static struct resource s5p_uart2_resource[] = { 38static struct resource s5p_uart2_resource[] = {
55 [0] = { 39 [0] = DEFINE_RES_MEM(S5P_PA_UART2, S5P_SZ_UART),
56 .start = S5P_PA_UART2, 40 [1] = DEFINE_RES_IRQ(IRQ_UART2),
57 .end = S5P_PA_UART2 + S5P_SZ_UART - 1,
58 .flags = IORESOURCE_MEM,
59 },
60 [1] = {
61 .start = IRQ_UART2,
62 .end = IRQ_UART2,
63 .flags = IORESOURCE_IRQ,
64 },
65}; 41};
66 42
67static struct resource s5p_uart3_resource[] = { 43static struct resource s5p_uart3_resource[] = {
68#if CONFIG_SERIAL_SAMSUNG_UARTS > 3 44#if CONFIG_SERIAL_SAMSUNG_UARTS > 3
69 [0] = { 45 [0] = DEFINE_RES_MEM(S5P_PA_UART3, S5P_SZ_UART),
70 .start = S5P_PA_UART3, 46 [1] = DEFINE_RES_IRQ(IRQ_UART3),
71 .end = S5P_PA_UART3 + S5P_SZ_UART - 1,
72 .flags = IORESOURCE_MEM,
73 },
74 [1] = {
75 .start = IRQ_UART3,
76 .end = IRQ_UART3,
77 .flags = IORESOURCE_IRQ,
78 },
79#endif 47#endif
80}; 48};
81 49
82static struct resource s5p_uart4_resource[] = { 50static struct resource s5p_uart4_resource[] = {
83#if CONFIG_SERIAL_SAMSUNG_UARTS > 4 51#if CONFIG_SERIAL_SAMSUNG_UARTS > 4
84 [0] = { 52 [0] = DEFINE_RES_MEM(S5P_PA_UART4, S5P_SZ_UART),
85 .start = S5P_PA_UART4, 53 [1] = DEFINE_RES_IRQ(IRQ_UART4),
86 .end = S5P_PA_UART4 + S5P_SZ_UART - 1,
87 .flags = IORESOURCE_MEM,
88 },
89 [1] = {
90 .start = IRQ_UART4,
91 .end = IRQ_UART4,
92 .flags = IORESOURCE_IRQ,
93 },
94#endif 54#endif
95}; 55};
96 56
97static struct resource s5p_uart5_resource[] = { 57static struct resource s5p_uart5_resource[] = {
98#if CONFIG_SERIAL_SAMSUNG_UARTS > 5 58#if CONFIG_SERIAL_SAMSUNG_UARTS > 5
99 [0] = { 59 [0] = DEFINE_RES_MEM(S5P_PA_UART5, S5P_SZ_UART),
100 .start = S5P_PA_UART5, 60 [1] = DEFINE_RES_IRQ(IRQ_UART5),
101 .end = S5P_PA_UART5 + S5P_SZ_UART - 1,
102 .flags = IORESOURCE_MEM,
103 },
104 [1] = {
105 .start = IRQ_UART5,
106 .end = IRQ_UART5,
107 .flags = IORESOURCE_IRQ,
108 },
109#endif 61#endif
110}; 62};
111 63
diff --git a/arch/arm/plat-s5p/irq-eint.c b/arch/arm/plat-samsung/s5p-irq-eint.c
index 139c050918c5..33bd3f3d20f5 100644
--- a/arch/arm/plat-s5p/irq-eint.c
+++ b/arch/arm/plat-samsung/s5p-irq-eint.c
@@ -1,5 +1,4 @@
1/* linux/arch/arm/plat-s5p/irq-eint.c 1/*
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd. 2 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com 3 * http://www.samsung.com
5 * 4 *
diff --git a/arch/arm/plat-s5p/irq-gpioint.c b/arch/arm/plat-samsung/s5p-irq-gpioint.c
index 82c7311017a2..f9431fe5b06e 100644
--- a/arch/arm/plat-s5p/irq-gpioint.c
+++ b/arch/arm/plat-samsung/s5p-irq-gpioint.c
@@ -1,5 +1,4 @@
1/* linux/arch/arm/plat-s5p/irq-gpioint.c 1/*
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd. 2 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * Author: Kyungmin Park <kyungmin.park@samsung.com> 3 * Author: Kyungmin Park <kyungmin.park@samsung.com>
5 * Author: Joonyoung Shim <jy0922.shim@samsung.com> 4 * Author: Joonyoung Shim <jy0922.shim@samsung.com>
diff --git a/arch/arm/plat-s5p/irq-pm.c b/arch/arm/plat-samsung/s5p-irq-pm.c
index d1bfecae6c9f..7c1e3b7072fc 100644
--- a/arch/arm/plat-s5p/irq-pm.c
+++ b/arch/arm/plat-samsung/s5p-irq-pm.c
@@ -1,5 +1,4 @@
1/* linux/arch/arm/plat-s5p/irq-pm.c 1/*
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd. 2 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com 3 * http://www.samsung.com
5 * 4 *
diff --git a/arch/arm/plat-s5p/irq.c b/arch/arm/plat-samsung/s5p-irq.c
index afdaa1082b9f..dfb47d638f03 100644
--- a/arch/arm/plat-s5p/irq.c
+++ b/arch/arm/plat-samsung/s5p-irq.c
@@ -1,5 +1,4 @@
1/* arch/arm/plat-s5p/irq.c 1/*
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd. 2 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/ 3 * http://www.samsung.com/
5 * 4 *
diff --git a/arch/arm/plat-s5p/pm.c b/arch/arm/plat-samsung/s5p-pm.c
index d15dc47b0e3d..0747468f0936 100644
--- a/arch/arm/plat-s5p/pm.c
+++ b/arch/arm/plat-samsung/s5p-pm.c
@@ -1,5 +1,4 @@
1/* linux/arch/arm/plat-s5p/pm.c 1/*
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd. 2 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com 3 * http://www.samsung.com
5 * 4 *
diff --git a/arch/arm/plat-s5p/sleep.S b/arch/arm/plat-samsung/s5p-sleep.S
index 006bd01eda02..bdf6dadf8790 100644
--- a/arch/arm/plat-s5p/sleep.S
+++ b/arch/arm/plat-samsung/s5p-sleep.S
@@ -1,5 +1,4 @@
1/* linux/arch/arm/plat-s5p/sleep.S 1/*
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd. 2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com 3 * http://www.samsung.com
5 * 4 *
diff --git a/arch/arm/plat-s5p/s5p-time.c b/arch/arm/plat-samsung/s5p-time.c
index 17c0a2c58dfd..028b6e877eb9 100644
--- a/arch/arm/plat-s5p/s5p-time.c
+++ b/arch/arm/plat-samsung/s5p-time.c
@@ -1,5 +1,4 @@
1/* linux/arch/arm/plat-s5p/s5p-time.c 1/*
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd. 2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/ 3 * http://www.samsung.com/
5 * 4 *
diff --git a/arch/arm/plat-s5p/setup-mipiphy.c b/arch/arm/plat-samsung/setup-mipiphy.c
index 683c466c0e6a..683c466c0e6a 100644
--- a/arch/arm/plat-s5p/setup-mipiphy.c
+++ b/arch/arm/plat-samsung/setup-mipiphy.c
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-21 17:38:38 -0400