12 files changed, 583 insertions, 0 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index c1f1a7eee953..121153f57796 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -911,6 +911,8 @@ source "arch/arm/mach-bcm/Kconfig"
 
 source "arch/arm/mach-bcm2835/Kconfig"
 
+source "arch/arm/mach-berlin/Kconfig"
+
 source "arch/arm/mach-clps711x/Kconfig"
 
 source "arch/arm/mach-cns3xxx/Kconfig"
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 5765abf5ce84..257155874bce 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -94,6 +94,14 @@ choice
                 depends on ARCH_BCM2835
                 select DEBUG_UART_PL01X
 
+        config DEBUG_BERLIN_UART
+                bool "Marvell Berlin SoC Debug UART"
+                depends on ARCH_BERLIN
+                select DEBUG_UART_8250
+                help
+                  Say Y here if you want kernel low-level debugging support
+                  on Marvell Berlin SoC based platforms.
+
         config DEBUG_CLPS711X_UART1
                 bool "Kernel low-level debugging messages via UART1"
                 depends on ARCH_CLPS711X
@@ -1011,6 +1019,7 @@ config DEBUG_UART_PHYS
         default 0xf1012000 if DEBUG_MVEBU_UART_ALTERNATE
         default 0xf1012000 if ARCH_DOVE || ARCH_KIRKWOOD || ARCH_MV78XX0 || \
                                 ARCH_ORION5X
+        default 0xf7fc9000 if DEBUG_BERLIN_UART
         default 0xf8b00000 if DEBUG_HI3716_UART
         default 0xfcb00000 if DEBUG_HI3620_UART
         default 0xfe800000 if ARCH_IOP32X
@@ -1036,6 +1045,7 @@ config DEBUG_UART_VIRT
         default 0xf2100000 if DEBUG_PXA_UART1
         default 0xf4090000 if ARCH_LPC32XX
         default 0xf4200000 if ARCH_GEMINI
+        default 0xf7fc9000 if DEBUG_BERLIN_UART
         default 0xf8009000 if DEBUG_VEXPRESS_UART0_CA9
         default 0xf8090000 if DEBUG_VEXPRESS_UART0_RS1
         default 0xfb009000 if DEBUG_REALVIEW_STD_PORT
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index c99b1086d83d..483abc7a9834 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -148,6 +148,7 @@ textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000
 machine-$(CONFIG_ARCH_AT91)             += at91
 machine-$(CONFIG_ARCH_BCM)              += bcm
 machine-$(CONFIG_ARCH_BCM2835)          += bcm2835
+machine-$(CONFIG_ARCH_BERLIN)           += berlin
 machine-$(CONFIG_ARCH_CLPS711X)         += clps711x
 machine-$(CONFIG_ARCH_CNS3XXX)          += cns3xxx
 machine-$(CONFIG_ARCH_DAVINCI)          += davinci
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index d57c1a65b24f..5c92212ee3a7 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -45,6 +45,9 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
 dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm11351-brt.dtb \
         bcm28155-ap.dtb
 dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
+dtb-$(CONFIG_ARCH_BERLIN) += \
+        berlin2-sony-nsz-gs7.dtb        \
+        berlin2cd-google-chromecast.dtb
 dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \
         da850-evm.dtb
 dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \
diff --git a/arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts b/arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts
new file mode 100644
index 000000000000..c72bfd468d10
--- /dev/null
+++ b/arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts
@@ -0,0 +1,29 @@
+/*
+ * Device Tree file for Sony NSZ-GS7
+ *
+ * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+#include "berlin2.dtsi"
+
+/ {
+        model = "Sony NSZ-GS7";
+        compatible = "sony,nsz-gs7", "marvell,berlin2", "marvell,berlin";
+
+        chosen {
+                bootargs = "console=ttyS0,115200 earlyprintk";
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x40000000>; /* 1 GB */
+        };
+};
+
+&uart0 { status = "okay"; };
diff --git a/arch/arm/boot/dts/berlin2.dtsi b/arch/arm/boot/dts/berlin2.dtsi
new file mode 100644
index 000000000000..56a1af2f1052
--- /dev/null
+++ b/arch/arm/boot/dts/berlin2.dtsi
@@ -0,0 +1,227 @@
+/*
+ * Device Tree Include file for Marvell Armada 1500 (Berlin BG2) SoC
+ *
+ * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ *
+ * based on GPL'ed 2.6 kernel sources
+ *  (c) Marvell International Ltd.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include "skeleton.dtsi"
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+        model = "Marvell Armada 1500 (BG2) SoC";
+        compatible = "marvell,berlin2", "marvell,berlin";
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        compatible = "marvell,pj4b";
+                        device_type = "cpu";
+                        next-level-cache = <&l2>;
+                        reg = <0>;
+                };
+
+                cpu@1 {
+                        compatible = "marvell,pj4b";
+                        device_type = "cpu";
+                        next-level-cache = <&l2>;
+                        reg = <1>;
+                };
+        };
+
+        clocks {
+                smclk: sysmgr-clock {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <25000000>;
+                };
+
+                cfgclk: cfg-clock {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <100000000>;
+                };
+
+                sysclk: system-clock {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <400000000>;
+                };
+        };
+
+        soc {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                interrupt-parent = <&gic>;
+
+                ranges = <0 0xf7000000 0x1000000>;
+
+                l2: l2-cache-controller@ac0000 {
+                        compatible = "marvell,tauros3-cache", "arm,pl310-cache";
+                        reg = <0xac0000 0x1000>;
+                        cache-unified;
+                        cache-level = <2>;
+                };
+
+                gic: interrupt-controller@ad1000 {
+                        compatible = "arm,cortex-a9-gic";
+                        reg = <0xad1000 0x1000>, <0xad0100 0x0100>;
+                        interrupt-controller;
+                        #interrupt-cells = <3>;
+                };
+
+                local-timer@ad0600 {
+                        compatible = "arm,cortex-a9-twd-timer";
+                        reg = <0xad0600 0x20>;
+                        interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&sysclk>;
+                };
+
+                apb@e80000 {
+                        compatible = "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+
+                        ranges = <0 0xe80000 0x10000>;
+                        interrupt-parent = <&aic>;
+
+                        timer0: timer@2c00 {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c00 0x14>;
+                                interrupts = <8>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "okay";
+                        };
+
+                        timer1: timer@2c14 {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c14 0x14>;
+                                interrupts = <9>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "okay";
+                        };
+
+                        timer2: timer@2c28 {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c28 0x14>;
+                                interrupts = <10>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "disabled";
+                        };
+
+                        timer3: timer@2c3c {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c3c 0x14>;
+                                interrupts = <11>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "disabled";
+                        };
+
+                        timer4: timer@2c50 {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c50 0x14>;
+                                interrupts = <12>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "disabled";
+                        };
+
+                        timer5: timer@2c64 {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c64 0x14>;
+                                interrupts = <13>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "disabled";
+                        };
+
+                        timer6: timer@2c78 {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c78 0x14>;
+                                interrupts = <14>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "disabled";
+                        };
+
+                        timer7: timer@2c8c {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c8c 0x14>;
+                                interrupts = <15>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "disabled";
+                        };
+
+                        aic: interrupt-controller@3000 {
+                                compatible = "snps,dw-apb-ictl";
+                                reg = <0x3000 0xc00>;
+                                interrupt-controller;
+                                #interrupt-cells = <1>;
+                                interrupt-parent = <&gic>;
+                                interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+                        };
+                };
+
+                apb@fc0000 {
+                        compatible = "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+
+                        ranges = <0 0xfc0000 0x10000>;
+                        interrupt-parent = <&sic>;
+
+                        uart0: serial@9000 {
+                                compatible = "snps,dw-apb-uart";
+                                reg = <0x9000 0x100>;
+                                reg-shift = <2>;
+                                reg-io-width = <1>;
+                                interrupts = <8>;
+                                clocks = <&smclk>;
+                                status = "disabled";
+                        };
+
+                        uart1: serial@a000 {
+                                compatible = "snps,dw-apb-uart";
+                                reg = <0xa000 0x100>;
+                                reg-shift = <2>;
+                                reg-io-width = <1>;
+                                interrupts = <9>;
+                                clocks = <&smclk>;
+                                status = "disabled";
+                        };
+
+                        uart2: serial@b000 {
+                                compatible = "snps,dw-apb-uart";
+                                reg = <0xb000 0x100>;
+                                reg-shift = <2>;
+                                reg-io-width = <1>;
+                                interrupts = <10>;
+                                clocks = <&smclk>;
+                                status = "disabled";
+                        };
+
+                        sic: interrupt-controller@e000 {
+                                compatible = "snps,dw-apb-ictl";
+                                reg = <0xe000 0x400>;
+                                interrupt-controller;
+                                #interrupt-cells = <1>;
+                                interrupt-parent = <&gic>;
+                                interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/berlin2cd-google-chromecast.dts b/arch/arm/boot/dts/berlin2cd-google-chromecast.dts
new file mode 100644
index 000000000000..bcd81ffc495d
--- /dev/null
+++ b/arch/arm/boot/dts/berlin2cd-google-chromecast.dts
@@ -0,0 +1,29 @@
+/*
+ * Device Tree file for Google Chromecast
+ *
+ * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+#include "berlin2cd.dtsi"
+
+/ {
+        model = "Google Chromecast";
+        compatible = "google,chromecast", "marvell,berlin2cd", "marvell,berlin";
+
+        chosen {
+                bootargs = "console=ttyS0,115200 earlyprintk";
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x20000000>; /* 512 MB */
+        };
+};
+
+&uart0 { status = "okay"; };
diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi
new file mode 100644
index 000000000000..094968c27533
--- /dev/null
+++ b/arch/arm/boot/dts/berlin2cd.dtsi
@@ -0,0 +1,210 @@
+/*
+ * Device Tree Include file for Marvell Armada 1500-mini (Berlin BG2CD) SoC
+ *
+ * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ *
+ * based on GPL'ed 2.6 kernel sources
+ *  (c) Marvell International Ltd.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include "skeleton.dtsi"
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+        model = "Marvell Armada 1500-mini (BG2CD) SoC";
+        compatible = "marvell,berlin2cd", "marvell,berlin";
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        compatible = "arm,cortex-a9";
+                        device_type = "cpu";
+                        next-level-cache = <&l2>;
+                        reg = <0>;
+                };
+        };
+
+        clocks {
+                smclk: sysmgr-clock {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <25000000>;
+                };
+
+                cfgclk: cfg-clock {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <75000000>;
+                };
+
+                sysclk: system-clock {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <300000000>;
+                };
+        };
+
+        soc {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                interrupt-parent = <&gic>;
+
+                ranges = <0 0xf7000000 0x1000000>;
+
+                l2: l2-cache-controller@ac0000 {
+                        compatible = "arm,pl310-cache";
+                        reg = <0xac0000 0x1000>;
+                        cache-unified;
+                        cache-level = <2>;
+                };
+
+                gic: interrupt-controller@ad1000 {
+                        compatible = "arm,cortex-a9-gic";
+                        reg = <0xad1000 0x1000>, <0xad0100 0x0100>;
+                        interrupt-controller;
+                        #interrupt-cells = <3>;
+                };
+
+                local-timer@ad0600 {
+                        compatible = "arm,cortex-a9-twd-timer";
+                        reg = <0xad0600 0x20>;
+                        interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&sysclk>;
+                };
+
+                apb@e80000 {
+                        compatible = "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+
+                        ranges = <0 0xe80000 0x10000>;
+                        interrupt-parent = <&aic>;
+
+                        timer0: timer@2c00 {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c00 0x14>;
+                                interrupts = <8>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "okay";
+                        };
+
+                        timer1: timer@2c14 {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c14 0x14>;
+                                interrupts = <9>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "okay";
+                        };
+
+                        timer2: timer@2c28 {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c28 0x14>;
+                                interrupts = <10>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "disabled";
+                        };
+
+                        timer3: timer@2c3c {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c3c 0x14>;
+                                interrupts = <11>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "disabled";
+                        };
+
+                        timer4: timer@2c50 {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c50 0x14>;
+                                interrupts = <12>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "disabled";
+                        };
+
+                        timer5: timer@2c64 {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c64 0x14>;
+                                interrupts = <13>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "disabled";
+                        };
+
+                        timer6: timer@2c78 {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c78 0x14>;
+                                interrupts = <14>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "disabled";
+                        };
+
+                        timer7: timer@2c8c {
+                                compatible = "snps,dw-apb-timer";
+                                reg = <0x2c8c 0x14>;
+                                interrupts = <15>;
+                                clocks = <&cfgclk>;
+                                clock-names = "timer";
+                                status = "disabled";
+                        };
+
+                        aic: interrupt-controller@3000 {
+                                compatible = "snps,dw-apb-ictl";
+                                reg = <0x3000 0xc00>;
+                                interrupt-controller;
+                                #interrupt-cells = <1>;
+                                interrupt-parent = <&gic>;
+                                interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+                        };
+                };
+
+                apb@fc0000 {
+                        compatible = "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+
+                        ranges = <0 0xfc0000 0x10000>;
+                        interrupt-parent = <&sic>;
+
+                        uart0: serial@9000 {
+                                compatible = "snps,dw-apb-uart";
+                                reg = <0x9000 0x100>;
+                                reg-shift = <2>;
+                                reg-io-width = <1>;
+                                interrupts = <8>;
+                                clocks = <&smclk>;
+                                status = "disabled";
+                        };
+
+                        uart1: serial@a000 {
+                                compatible = "snps,dw-apb-uart";
+                                reg = <0xa000 0x100>;
+                                reg-shift = <2>;
+                                reg-io-width = <1>;
+                                interrupts = <9>;
+                                clocks = <&smclk>;
+                                status = "disabled";
+                        };
+
+                        sic: interrupt-controller@e000 {
+                                compatible = "snps,dw-apb-ictl";
+                                reg = <0xe000 0x400>;
+                                interrupt-controller;
+                                #interrupt-cells = <1>;
+                                interrupt-parent = <&gic>;
+                                interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+                        };
+                };
+        };
+};
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index 4a5903e04827..cce415045668 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -7,6 +7,9 @@ CONFIG_MACH_ARMADA_370=y
 CONFIG_MACH_ARMADA_XP=y
 CONFIG_ARCH_BCM=y
 CONFIG_ARCH_BCM_MOBILE=y
+CONFIG_ARCH_BERLIN=y
+CONFIG_MACH_BERLIN_BG2=y
+CONFIG_MACH_BERLIN_BG2CD=y
 CONFIG_GPIO_PCA953X=y
 CONFIG_ARCH_HIGHBANK=y
 CONFIG_ARCH_KEYSTONE=y
diff --git a/arch/arm/mach-berlin/Kconfig b/arch/arm/mach-berlin/Kconfig
new file mode 100644
index 000000000000..7a02d222c378
--- /dev/null
+++ b/arch/arm/mach-berlin/Kconfig
@@ -0,0 +1,29 @@
+config ARCH_BERLIN
+        bool "Marvell Berlin SoCs" if ARCH_MULTI_V7
+        select ARM_GIC
+        select GENERIC_CLOCKEVENTS
+        select GENERIC_IRQ_CHIP
+        select COMMON_CLK
+        select DW_APB_ICTL
+        select DW_APB_TIMER_OF
+
+if ARCH_BERLIN
+
+menu "Marvell Berlin SoC variants"
+
+config MACH_BERLIN_BG2
+        bool "Marvell Armada 1500 (BG2)"
+        select CACHE_L2X0
+        select CPU_PJ4B
+        select HAVE_ARM_TWD if SMP
+        select HAVE_SMP
+
+config MACH_BERLIN_BG2CD
+        bool "Marvell Armada 1500-mini (BG2CD)"
+        select CACHE_L2X0
+        select CPU_V7
+        select HAVE_ARM_TWD if SMP
+
+endmenu
+
+endif
diff --git a/arch/arm/mach-berlin/Makefile b/arch/arm/mach-berlin/Makefile
new file mode 100644
index 000000000000..ab69fe956f49
--- /dev/null
+++ b/arch/arm/mach-berlin/Makefile
@@ -0,0 +1 @@
+obj-y += berlin.o
diff --git a/arch/arm/mach-berlin/berlin.c b/arch/arm/mach-berlin/berlin.c
new file mode 100644
index 000000000000..025bcb5473eb
--- /dev/null
+++ b/arch/arm/mach-berlin/berlin.c
@@ -0,0 +1,39 @@
+/*
+ * Device Tree support for Marvell Berlin SoCs.
+ *
+ * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ *
+ * based on GPL'ed 2.6 kernel sources
+ *  (c) Marvell International Ltd.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/of_platform.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/mach/arch.h>
+
+static void __init berlin_init_machine(void)
+{
+        /*
+         * with DT probing for L2CCs, berlin_init_machine can be removed.
+         * Note: 88DE3005 (Armada 1500-mini) uses pl310 l2cc
+         */
+        l2x0_of_init(0x70c00000, 0xfeffffff);
+        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}
+
+static const char * const berlin_dt_compat[] = {
+        "marvell,berlin",
+        NULL,
+};
+
+DT_MACHINE_START(BERLIN_DT, "Marvell Berlin")
+        .dt_compat      = berlin_dt_compat,
+        .init_machine   = berlin_init_machine,
+MACHINE_END