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-rw-r--r--arch/mips/au1000/common/dbdma.c4
-rw-r--r--arch/mips/au1000/common/dbg_io.c2
-rw-r--r--arch/mips/au1000/common/power.c2
-rw-r--r--arch/mips/au1000/pb1200/irqmap.c2
-rw-r--r--arch/mips/boot/addinitrd.c10
-rw-r--r--arch/mips/boot/elf2ecoff.c2
-rw-r--r--arch/mips/kernel/binfmt_elfo32.c2
-rw-r--r--arch/mips/kernel/gdb-stub.c8
-rw-r--r--arch/mips/kernel/i8259.c14
-rw-r--r--arch/mips/kernel/irixelf.c8
-rw-r--r--arch/mips/kernel/irixsig.c8
-rw-r--r--arch/mips/kernel/irq.c4
-rw-r--r--arch/mips/kernel/kspd.c2
-rw-r--r--arch/mips/kernel/linux32.c10
-rw-r--r--arch/mips/kernel/signal.c4
-rw-r--r--arch/mips/kernel/smtc.c6
-rw-r--r--arch/mips/kernel/syscall.c2
-rw-r--r--arch/mips/kernel/sysirix.c2
-rw-r--r--arch/mips/kernel/vpe.c2
-rw-r--r--arch/mips/math-emu/cp1emu.c24
-rw-r--r--arch/mips/math-emu/dp_mul.c2
-rw-r--r--arch/mips/math-emu/ieee754.c12
-rw-r--r--arch/mips/math-emu/ieee754dp.h12
-rw-r--r--arch/mips/math-emu/ieee754int.h30
-rw-r--r--arch/mips/math-emu/ieee754sp.h12
-rw-r--r--arch/mips/mips-boards/atlas/atlas_gdb.c2
-rw-r--r--arch/mips/mips-boards/malta/malta_int.c2
-rw-r--r--arch/mips/mips-boards/malta/malta_setup.c2
-rw-r--r--arch/mips/mm/c-r4k.c8
-rw-r--r--arch/mips/mm/cerr-sb1.c24
-rw-r--r--arch/mips/mm/pg-sb1.c4
-rw-r--r--arch/mips/mm/pgtable.c8
-rw-r--r--arch/mips/mm/tlb-r8k.c2
-rw-r--r--arch/mips/mm/tlbex.c94
-rw-r--r--arch/mips/pci/pci-bcm1480.c6
-rw-r--r--arch/mips/pci/pci-bcm1480ht.c4
-rw-r--r--arch/mips/pci/pci-sb1250.c4
-rw-r--r--arch/mips/philips/pnx8550/common/proc.c32
-rw-r--r--arch/mips/pmc-sierra/msp71xx/msp_serial.c8
-rw-r--r--arch/mips/pmc-sierra/yosemite/ht.c2
-rw-r--r--arch/mips/sgi-ip27/ip27-smp.c2
-rw-r--r--arch/mips/sibyte/bcm1480/irq.c8
-rw-r--r--arch/mips/sibyte/cfe/console.c2
-rw-r--r--arch/mips/sibyte/cfe/setup.c2
-rw-r--r--arch/mips/sibyte/sb1250/irq.c8
-rw-r--r--arch/mips/sibyte/sb1250/prom.c2
-rw-r--r--arch/mips/sibyte/swarm/dbg_io.c4
-rw-r--r--arch/mips/sni/reset.c2
-rw-r--r--arch/mips/sni/sniprom.c2
-rw-r--r--arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c2
-rw-r--r--arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c4
-rw-r--r--arch/mips/tx4938/toshiba_rbtx4938/setup.c4
-rw-r--r--arch/mips/vr41xx/nec-cmbvr4133/init.c6
-rw-r--r--arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c6
54 files changed, 225 insertions, 217 deletions
diff --git a/arch/mips/au1000/common/dbdma.c b/arch/mips/au1000/common/dbdma.c
index d15b047d480d..461cf0139737 100644
--- a/arch/mips/au1000/common/dbdma.c
+++ b/arch/mips/au1000/common/dbdma.c
@@ -213,7 +213,7 @@ au1xxx_ddma_add_device(dbdev_tab_t *dev)
213 if ( NULL != p ) 213 if ( NULL != p )
214 { 214 {
215 memcpy(p, dev, sizeof(dbdev_tab_t)); 215 memcpy(p, dev, sizeof(dbdev_tab_t));
216 p->dev_id = DSCR_DEV2CUSTOM_ID(new_id,dev->dev_id); 216 p->dev_id = DSCR_DEV2CUSTOM_ID(new_id, dev->dev_id);
217 ret = p->dev_id; 217 ret = p->dev_id;
218 new_id++; 218 new_id++;
219#if 0 219#if 0
@@ -671,7 +671,7 @@ _au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes, u32 flags)
671 * parts. If it is fixedin the future, these dma_cache_inv will just 671 * parts. If it is fixedin the future, these dma_cache_inv will just
672 * be nothing more than empty macros. See io.h. 672 * be nothing more than empty macros. See io.h.
673 * */ 673 * */
674 dma_cache_inv((unsigned long)buf,nbytes); 674 dma_cache_inv((unsigned long)buf, nbytes);
675 dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */ 675 dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
676 au_sync(); 676 au_sync();
677 dma_cache_wback_inv((unsigned long)dp, sizeof(dp)); 677 dma_cache_wback_inv((unsigned long)dp, sizeof(dp));
diff --git a/arch/mips/au1000/common/dbg_io.c b/arch/mips/au1000/common/dbg_io.c
index 0a50af7f34b8..79e0b0a51ace 100644
--- a/arch/mips/au1000/common/dbg_io.c
+++ b/arch/mips/au1000/common/dbg_io.c
@@ -53,7 +53,7 @@ typedef unsigned int uint32;
53 53
54/* memory-mapped read/write of the port */ 54/* memory-mapped read/write of the port */
55#define UART16550_READ(y) (au_readl(DEBUG_BASE + y) & 0xff) 55#define UART16550_READ(y) (au_readl(DEBUG_BASE + y) & 0xff)
56#define UART16550_WRITE(y,z) (au_writel(z&0xff, DEBUG_BASE + y)) 56#define UART16550_WRITE(y, z) (au_writel(z&0xff, DEBUG_BASE + y))
57 57
58extern unsigned long get_au1x00_uart_baud_base(void); 58extern unsigned long get_au1x00_uart_baud_base(void);
59extern unsigned long cal_r4koff(void); 59extern unsigned long cal_r4koff(void);
diff --git a/arch/mips/au1000/common/power.c b/arch/mips/au1000/common/power.c
index 3901e8e04755..6f57f72a7d57 100644
--- a/arch/mips/au1000/common/power.c
+++ b/arch/mips/au1000/common/power.c
@@ -211,7 +211,7 @@ int au_sleep(void)
211 unsigned long wakeup, flags; 211 unsigned long wakeup, flags;
212 extern void save_and_sleep(void); 212 extern void save_and_sleep(void);
213 213
214 spin_lock_irqsave(&pm_lock,flags); 214 spin_lock_irqsave(&pm_lock, flags);
215 215
216 save_core_regs(); 216 save_core_regs();
217 217
diff --git a/arch/mips/au1000/pb1200/irqmap.c b/arch/mips/au1000/pb1200/irqmap.c
index b73b2d18bf56..7c708db04a88 100644
--- a/arch/mips/au1000/pb1200/irqmap.c
+++ b/arch/mips/au1000/pb1200/irqmap.c
@@ -132,7 +132,7 @@ static void pb1200_shutdown_irq( unsigned int irq_nr )
132 pb1200_disable_irq(irq_nr); 132 pb1200_disable_irq(irq_nr);
133 if (--pb1200_cascade_en == 0) 133 if (--pb1200_cascade_en == 0)
134 { 134 {
135 free_irq(AU1000_GPIO_7,&pb1200_cascade_handler ); 135 free_irq(AU1000_GPIO_7, &pb1200_cascade_handler );
136 } 136 }
137 return; 137 return;
138} 138}
diff --git a/arch/mips/boot/addinitrd.c b/arch/mips/boot/addinitrd.c
index 193e4be52e79..b5b3febc10cc 100644
--- a/arch/mips/boot/addinitrd.c
+++ b/arch/mips/boot/addinitrd.c
@@ -40,7 +40,7 @@ void die(char *s)
40 40
41int main(int argc, char *argv[]) 41int main(int argc, char *argv[])
42{ 42{
43 int fd_vmlinux,fd_initrd,fd_outfile; 43 int fd_vmlinux, fd_initrd, fd_outfile;
44 FILHDR efile; 44 FILHDR efile;
45 AOUTHDR eaout; 45 AOUTHDR eaout;
46 SCNHDR esecs[3]; 46 SCNHDR esecs[3];
@@ -48,15 +48,15 @@ int main(int argc, char *argv[])
48 char buf[1024]; 48 char buf[1024];
49 unsigned long loadaddr; 49 unsigned long loadaddr;
50 unsigned long initrd_header[2]; 50 unsigned long initrd_header[2];
51 int i,cnt; 51 int i, cnt;
52 int swab = 0; 52 int swab = 0;
53 53
54 if (argc != 4) { 54 if (argc != 4) {
55 printf("Usage: %s <vmlinux> <initrd> <outfile>\n",argv[0]); 55 printf("Usage: %s <vmlinux> <initrd> <outfile>\n", argv[0]);
56 exit(1); 56 exit(1);
57 } 57 }
58 58
59 if ((fd_vmlinux = open (argv[1],O_RDONLY)) < 0) 59 if ((fd_vmlinux = open (argv[1], O_RDONLY)) < 0)
60 die("open vmlinux"); 60 die("open vmlinux");
61 if (read (fd_vmlinux, &efile, sizeof efile) != sizeof efile) 61 if (read (fd_vmlinux, &efile, sizeof efile) != sizeof efile)
62 die("read file header"); 62 die("read file header");
@@ -98,7 +98,7 @@ int main(int argc, char *argv[])
98 eaout.dsize = esecs[1].s_size = initrd_header[1] = SWAB(st.st_size+8); 98 eaout.dsize = esecs[1].s_size = initrd_header[1] = SWAB(st.st_size+8);
99 eaout.data_start = esecs[1].s_vaddr = esecs[1].s_paddr = SWAB(loadaddr); 99 eaout.data_start = esecs[1].s_vaddr = esecs[1].s_paddr = SWAB(loadaddr);
100 100
101 if ((fd_outfile = open (argv[3], O_RDWR|O_CREAT|O_TRUNC,0666)) < 0) 101 if ((fd_outfile = open (argv[3], O_RDWR|O_CREAT|O_TRUNC, 0666)) < 0)
102 die("open outfile"); 102 die("open outfile");
103 if (write (fd_outfile, &efile, sizeof efile) != sizeof efile) 103 if (write (fd_outfile, &efile, sizeof efile) != sizeof efile)
104 die("write file header"); 104 die("write file header");
diff --git a/arch/mips/boot/elf2ecoff.c b/arch/mips/boot/elf2ecoff.c
index c3543d9eb266..c5a7f308c405 100644
--- a/arch/mips/boot/elf2ecoff.c
+++ b/arch/mips/boot/elf2ecoff.c
@@ -467,7 +467,7 @@ int main(int argc, char *argv[])
467 esecs[0].s_scnptr = N_TXTOFF(efh, eah); 467 esecs[0].s_scnptr = N_TXTOFF(efh, eah);
468 esecs[1].s_scnptr = N_DATOFF(efh, eah); 468 esecs[1].s_scnptr = N_DATOFF(efh, eah);
469#define ECOFF_SEGMENT_ALIGNMENT(a) 0x10 469#define ECOFF_SEGMENT_ALIGNMENT(a) 0x10
470#define ECOFF_ROUND(s,a) (((s)+(a)-1)&~((a)-1)) 470#define ECOFF_ROUND(s, a) (((s)+(a)-1)&~((a)-1))
471 esecs[2].s_scnptr = esecs[1].s_scnptr + 471 esecs[2].s_scnptr = esecs[1].s_scnptr +
472 ECOFF_ROUND(esecs[1].s_size, ECOFF_SEGMENT_ALIGNMENT(&eah)); 472 ECOFF_ROUND(esecs[1].s_size, ECOFF_SEGMENT_ALIGNMENT(&eah));
473 if (addflag) { 473 if (addflag) {
diff --git a/arch/mips/kernel/binfmt_elfo32.c b/arch/mips/kernel/binfmt_elfo32.c
index 993f7ec70f35..da41eac195ca 100644
--- a/arch/mips/kernel/binfmt_elfo32.c
+++ b/arch/mips/kernel/binfmt_elfo32.c
@@ -110,7 +110,7 @@ jiffies_to_compat_timeval(unsigned long jiffies, struct compat_timeval *value)
110} 110}
111 111
112#undef ELF_CORE_COPY_REGS 112#undef ELF_CORE_COPY_REGS
113#define ELF_CORE_COPY_REGS(_dest,_regs) elf32_core_copy_regs(_dest,_regs); 113#define ELF_CORE_COPY_REGS(_dest, _regs) elf32_core_copy_regs(_dest, _regs);
114 114
115void elf32_core_copy_regs(elf_gregset_t grp, struct pt_regs *regs) 115void elf32_core_copy_regs(elf_gregset_t grp, struct pt_regs *regs)
116{ 116{
diff --git a/arch/mips/kernel/gdb-stub.c b/arch/mips/kernel/gdb-stub.c
index 989d06c3827b..c33f6f22d86a 100644
--- a/arch/mips/kernel/gdb-stub.c
+++ b/arch/mips/kernel/gdb-stub.c
@@ -902,7 +902,7 @@ void handle_exception(struct gdb_regs *regs)
902 hex2mem(ptr, (char *)&regs->frame_ptr, 2*sizeof(long), 0, 0); 902 hex2mem(ptr, (char *)&regs->frame_ptr, 2*sizeof(long), 0, 0);
903 ptr += 2*(2*sizeof(long)); 903 ptr += 2*(2*sizeof(long));
904 hex2mem(ptr, (char *)&regs->cp0_index, 16*sizeof(long), 0, 0); 904 hex2mem(ptr, (char *)&regs->cp0_index, 16*sizeof(long), 0, 0);
905 strcpy(output_buffer,"OK"); 905 strcpy(output_buffer, "OK");
906 } 906 }
907 break; 907 break;
908 908
@@ -919,7 +919,7 @@ void handle_exception(struct gdb_regs *regs)
919 break; 919 break;
920 strcpy(output_buffer, "E03"); 920 strcpy(output_buffer, "E03");
921 } else 921 } else
922 strcpy(output_buffer,"E01"); 922 strcpy(output_buffer, "E01");
923 break; 923 break;
924 924
925 /* 925 /*
@@ -996,7 +996,7 @@ void handle_exception(struct gdb_regs *regs)
996 ptr = &input_buffer[1]; 996 ptr = &input_buffer[1];
997 if (!hexToInt(&ptr, &baudrate)) 997 if (!hexToInt(&ptr, &baudrate))
998 { 998 {
999 strcpy(output_buffer,"B01"); 999 strcpy(output_buffer, "B01");
1000 break; 1000 break;
1001 } 1001 }
1002 1002
@@ -1015,7 +1015,7 @@ void handle_exception(struct gdb_regs *regs)
1015 break; 1015 break;
1016 default: 1016 default:
1017 baudrate = 0; 1017 baudrate = 0;
1018 strcpy(output_buffer,"B02"); 1018 strcpy(output_buffer, "B02");
1019 goto x1; 1019 goto x1;
1020 } 1020 }
1021 1021
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c
index a860b21e63e9..471013577108 100644
--- a/arch/mips/kernel/i8259.c
+++ b/arch/mips/kernel/i8259.c
@@ -127,14 +127,14 @@ static inline int i8259A_irq_real(unsigned int irq)
127 int irqmask = 1 << irq; 127 int irqmask = 1 << irq;
128 128
129 if (irq < 8) { 129 if (irq < 8) {
130 outb(0x0B,PIC_MASTER_CMD); /* ISR register */ 130 outb(0x0B, PIC_MASTER_CMD); /* ISR register */
131 value = inb(PIC_MASTER_CMD) & irqmask; 131 value = inb(PIC_MASTER_CMD) & irqmask;
132 outb(0x0A,PIC_MASTER_CMD); /* back to the IRR register */ 132 outb(0x0A, PIC_MASTER_CMD); /* back to the IRR register */
133 return value; 133 return value;
134 } 134 }
135 outb(0x0B,PIC_SLAVE_CMD); /* ISR register */ 135 outb(0x0B, PIC_SLAVE_CMD); /* ISR register */
136 value = inb(PIC_SLAVE_CMD) & (irqmask >> 8); 136 value = inb(PIC_SLAVE_CMD) & (irqmask >> 8);
137 outb(0x0A,PIC_SLAVE_CMD); /* back to the IRR register */ 137 outb(0x0A, PIC_SLAVE_CMD); /* back to the IRR register */
138 return value; 138 return value;
139} 139}
140 140
@@ -175,12 +175,12 @@ handle_real_irq:
175 if (irq & 8) { 175 if (irq & 8) {
176 inb(PIC_SLAVE_IMR); /* DUMMY - (do we need this?) */ 176 inb(PIC_SLAVE_IMR); /* DUMMY - (do we need this?) */
177 outb(cached_slave_mask, PIC_SLAVE_IMR); 177 outb(cached_slave_mask, PIC_SLAVE_IMR);
178 outb(0x60+(irq&7),PIC_SLAVE_CMD);/* 'Specific EOI' to slave */ 178 outb(0x60+(irq&7), PIC_SLAVE_CMD);/* 'Specific EOI' to slave */
179 outb(0x60+PIC_CASCADE_IR,PIC_MASTER_CMD); /* 'Specific EOI' to master-IRQ2 */ 179 outb(0x60+PIC_CASCADE_IR, PIC_MASTER_CMD); /* 'Specific EOI' to master-IRQ2 */
180 } else { 180 } else {
181 inb(PIC_MASTER_IMR); /* DUMMY - (do we need this?) */ 181 inb(PIC_MASTER_IMR); /* DUMMY - (do we need this?) */
182 outb(cached_master_mask, PIC_MASTER_IMR); 182 outb(cached_master_mask, PIC_MASTER_IMR);
183 outb(0x60+irq,PIC_MASTER_CMD); /* 'Specific EOI to master */ 183 outb(0x60+irq, PIC_MASTER_CMD); /* 'Specific EOI to master */
184 } 184 }
185 smtc_im_ack_irq(irq); 185 smtc_im_ack_irq(irq);
186 spin_unlock_irqrestore(&i8259A_lock, flags); 186 spin_unlock_irqrestore(&i8259A_lock, flags);
diff --git a/arch/mips/kernel/irixelf.c b/arch/mips/kernel/irixelf.c
index e3b4b547a822..8ef5cf4cc423 100644
--- a/arch/mips/kernel/irixelf.c
+++ b/arch/mips/kernel/irixelf.c
@@ -231,16 +231,16 @@ static unsigned long * create_irix_tables(char * p, int argc, int envc,
231 sp -= argc+1; 231 sp -= argc+1;
232 argv = sp; 232 argv = sp;
233 233
234 __put_user((elf_addr_t)argc,--sp); 234 __put_user((elf_addr_t)argc, --sp);
235 current->mm->arg_start = (unsigned long) p; 235 current->mm->arg_start = (unsigned long) p;
236 while (argc-->0) { 236 while (argc-->0) {
237 __put_user((unsigned long)p,argv++); 237 __put_user((unsigned long)p, argv++);
238 p += strlen_user(p); 238 p += strlen_user(p);
239 } 239 }
240 __put_user((unsigned long) NULL, argv); 240 __put_user((unsigned long) NULL, argv);
241 current->mm->arg_end = current->mm->env_start = (unsigned long) p; 241 current->mm->arg_end = current->mm->env_start = (unsigned long) p;
242 while (envc-->0) { 242 while (envc-->0) {
243 __put_user((unsigned long)p,envp++); 243 __put_user((unsigned long)p, envp++);
244 p += strlen_user(p); 244 p += strlen_user(p);
245 } 245 }
246 __put_user((unsigned long) NULL, envp); 246 __put_user((unsigned long) NULL, envp);
@@ -831,7 +831,7 @@ static int load_irix_library(struct file *file)
831 int retval; 831 int retval;
832 unsigned int bss; 832 unsigned int bss;
833 int error; 833 int error;
834 int i,j, k; 834 int i, j, k;
835 835
836 error = kernel_read(file, 0, (char *) &elf_ex, sizeof(elf_ex)); 836 error = kernel_read(file, 0, (char *) &elf_ex, sizeof(elf_ex));
837 if (error != sizeof(elf_ex)) 837 if (error != sizeof(elf_ex))
diff --git a/arch/mips/kernel/irixsig.c b/arch/mips/kernel/irixsig.c
index 28b2a8f00911..85c2e389edd6 100644
--- a/arch/mips/kernel/irixsig.c
+++ b/arch/mips/kernel/irixsig.c
@@ -163,9 +163,9 @@ static inline int handle_signal(unsigned long sig, siginfo_t *info,
163 ret = setup_irix_frame(ka, regs, sig, oldset); 163 ret = setup_irix_frame(ka, regs, sig, oldset);
164 164
165 spin_lock_irq(&current->sighand->siglock); 165 spin_lock_irq(&current->sighand->siglock);
166 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask); 166 sigorsets(&current->blocked, &current->blocked, &ka->sa.sa_mask);
167 if (!(ka->sa.sa_flags & SA_NODEFER)) 167 if (!(ka->sa.sa_flags & SA_NODEFER))
168 sigaddset(&current->blocked,sig); 168 sigaddset(&current->blocked, sig);
169 recalc_sigpending(); 169 recalc_sigpending();
170 spin_unlock_irq(&current->sighand->siglock); 170 spin_unlock_irq(&current->sighand->siglock);
171 171
@@ -605,8 +605,8 @@ repeat:
605 current->state = TASK_INTERRUPTIBLE; 605 current->state = TASK_INTERRUPTIBLE;
606 read_lock(&tasklist_lock); 606 read_lock(&tasklist_lock);
607 tsk = current; 607 tsk = current;
608 list_for_each(_p,&tsk->children) { 608 list_for_each(_p, &tsk->children) {
609 p = list_entry(_p,struct task_struct,sibling); 609 p = list_entry(_p, struct task_struct, sibling);
610 if ((type == IRIX_P_PID) && p->pid != pid) 610 if ((type == IRIX_P_PID) && p->pid != pid)
611 continue; 611 continue;
612 if ((type == IRIX_P_PGID) && process_group(p) != pid) 612 if ((type == IRIX_P_PGID) && process_group(p) != pid)
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
index a990aad2f049..d06e9c9af790 100644
--- a/arch/mips/kernel/irq.c
+++ b/arch/mips/kernel/irq.c
@@ -93,7 +93,7 @@ int show_interrupts(struct seq_file *p, void *v)
93 if (i == 0) { 93 if (i == 0) {
94 seq_printf(p, " "); 94 seq_printf(p, " ");
95 for_each_online_cpu(j) 95 for_each_online_cpu(j)
96 seq_printf(p, "CPU%d ",j); 96 seq_printf(p, "CPU%d ", j);
97 seq_putc(p, '\n'); 97 seq_putc(p, '\n');
98 } 98 }
99 99
@@ -102,7 +102,7 @@ int show_interrupts(struct seq_file *p, void *v)
102 action = irq_desc[i].action; 102 action = irq_desc[i].action;
103 if (!action) 103 if (!action)
104 goto skip; 104 goto skip;
105 seq_printf(p, "%3d: ",i); 105 seq_printf(p, "%3d: ", i);
106#ifndef CONFIG_SMP 106#ifndef CONFIG_SMP
107 seq_printf(p, "%10u ", kstat_irqs(i)); 107 seq_printf(p, "%10u ", kstat_irqs(i));
108#else 108#else
diff --git a/arch/mips/kernel/kspd.c b/arch/mips/kernel/kspd.c
index 1ed176606548..d2c2e00e5864 100644
--- a/arch/mips/kernel/kspd.c
+++ b/arch/mips/kernel/kspd.c
@@ -239,7 +239,7 @@ void sp_work_handle_request(void)
239 case MTSP_SYSCALL_GETTOD: 239 case MTSP_SYSCALL_GETTOD:
240 memset(&tz, 0, sizeof(tz)); 240 memset(&tz, 0, sizeof(tz));
241 if ((ret.retval = sp_syscall(__NR_gettimeofday, (int)&tv, 241 if ((ret.retval = sp_syscall(__NR_gettimeofday, (int)&tv,
242 (int)&tz, 0,0)) == 0) 242 (int)&tz, 0, 0)) == 0)
243 ret.retval = tv.tv_sec; 243 ret.retval = tv.tv_sec;
244 break; 244 break;
245 245
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c
index a6de17081cad..d6e01215fb2b 100644
--- a/arch/mips/kernel/linux32.c
+++ b/arch/mips/kernel/linux32.c
@@ -58,10 +58,10 @@
58#define AA(__x) ((unsigned long)((int)__x)) 58#define AA(__x) ((unsigned long)((int)__x))
59 59
60#ifdef __MIPSEB__ 60#ifdef __MIPSEB__
61#define merge_64(r1,r2) ((((r1) & 0xffffffffUL) << 32) + ((r2) & 0xffffffffUL)) 61#define merge_64(r1, r2) ((((r1) & 0xffffffffUL) << 32) + ((r2) & 0xffffffffUL))
62#endif 62#endif
63#ifdef __MIPSEL__ 63#ifdef __MIPSEL__
64#define merge_64(r1,r2) ((((r2) & 0xffffffffUL) << 32) + ((r1) & 0xffffffffUL)) 64#define merge_64(r1, r2) ((((r2) & 0xffffffffUL) << 32) + ((r1) & 0xffffffffUL))
65#endif 65#endif
66 66
67/* 67/*
@@ -96,7 +96,7 @@ int cp_compat_stat(struct kstat *stat, struct compat_stat __user *statbuf)
96#endif 96#endif
97 tmp.st_blocks = stat->blocks; 97 tmp.st_blocks = stat->blocks;
98 tmp.st_blksize = stat->blksize; 98 tmp.st_blksize = stat->blksize;
99 return copy_to_user(statbuf,&tmp,sizeof(tmp)) ? -EFAULT : 0; 99 return copy_to_user(statbuf, &tmp, sizeof(tmp)) ? -EFAULT : 0;
100} 100}
101 101
102asmlinkage unsigned long 102asmlinkage unsigned long
@@ -510,11 +510,11 @@ asmlinkage int sys32_ustat(dev_t dev, struct ustat32 __user * ubuf32)
510 if (err) 510 if (err)
511 goto out; 511 goto out;
512 512
513 memset(&tmp32,0,sizeof(struct ustat32)); 513 memset(&tmp32, 0, sizeof(struct ustat32));
514 tmp32.f_tfree = tmp.f_tfree; 514 tmp32.f_tfree = tmp.f_tfree;
515 tmp32.f_tinode = tmp.f_tinode; 515 tmp32.f_tinode = tmp.f_tinode;
516 516
517 err = copy_to_user(ubuf32,&tmp32,sizeof(struct ustat32)) ? -EFAULT : 0; 517 err = copy_to_user(ubuf32, &tmp32, sizeof(struct ustat32)) ? -EFAULT : 0;
518 518
519out: 519out:
520 return err; 520 return err;
diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c
index 2a08ce41bf2b..a4e106c56ab5 100644
--- a/arch/mips/kernel/signal.c
+++ b/arch/mips/kernel/signal.c
@@ -613,9 +613,9 @@ static int handle_signal(unsigned long sig, siginfo_t *info,
613 ret = current->thread.abi->setup_frame(ka, regs, sig, oldset); 613 ret = current->thread.abi->setup_frame(ka, regs, sig, oldset);
614 614
615 spin_lock_irq(&current->sighand->siglock); 615 spin_lock_irq(&current->sighand->siglock);
616 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask); 616 sigorsets(&current->blocked, &current->blocked, &ka->sa.sa_mask);
617 if (!(ka->sa.sa_flags & SA_NODEFER)) 617 if (!(ka->sa.sa_flags & SA_NODEFER))
618 sigaddset(&current->blocked,sig); 618 sigaddset(&current->blocked, sig);
619 recalc_sigpending(); 619 recalc_sigpending();
620 spin_unlock_irq(&current->sighand->siglock); 620 spin_unlock_irq(&current->sighand->siglock);
621 621
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 770182887c5b..4d91e2f455c0 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -180,7 +180,7 @@ void __init sanitize_tlb_entries(void)
180 180
181static void smtc_configure_tlb(void) 181static void smtc_configure_tlb(void)
182{ 182{
183 int i,tlbsiz,vpes; 183 int i, tlbsiz, vpes;
184 unsigned long mvpconf0; 184 unsigned long mvpconf0;
185 unsigned long config1val; 185 unsigned long config1val;
186 186
@@ -423,7 +423,7 @@ void mipsmt_prepare_cpus(void)
423 * code. Leave it alone! 423 * code. Leave it alone!
424 */ 424 */
425 if (tc != 0) { 425 if (tc != 0) {
426 smtc_tc_setup(vpe,tc, cpu); 426 smtc_tc_setup(vpe, tc, cpu);
427 cpu++; 427 cpu++;
428 } 428 }
429 printk(" %d", tc); 429 printk(" %d", tc);
@@ -431,7 +431,7 @@ void mipsmt_prepare_cpus(void)
431 } 431 }
432 if (slop) { 432 if (slop) {
433 if (tc != 0) { 433 if (tc != 0) {
434 smtc_tc_setup(vpe,tc, cpu); 434 smtc_tc_setup(vpe, tc, cpu);
435 cpu++; 435 cpu++;
436 } 436 }
437 printk(" %d", tc); 437 printk(" %d", tc);
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index ef2c6360d052..17c4374d2209 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -245,7 +245,7 @@ asmlinkage int sys_olduname(struct oldold_utsname __user * name)
245 245
246 if (!name) 246 if (!name)
247 return -EFAULT; 247 return -EFAULT;
248 if (!access_ok(VERIFY_WRITE,name,sizeof(struct oldold_utsname))) 248 if (!access_ok(VERIFY_WRITE, name, sizeof(struct oldold_utsname)))
249 return -EFAULT; 249 return -EFAULT;
250 250
251 error = __copy_to_user(&name->sysname, &utsname()->sysname, 251 error = __copy_to_user(&name->sysname, &utsname()->sysname,
diff --git a/arch/mips/kernel/sysirix.c b/arch/mips/kernel/sysirix.c
index b50239574c95..ee7790d9debe 100644
--- a/arch/mips/kernel/sysirix.c
+++ b/arch/mips/kernel/sysirix.c
@@ -778,7 +778,7 @@ asmlinkage int irix_times(struct tms __user *tbuf)
778 int err = 0; 778 int err = 0;
779 779
780 if (tbuf) { 780 if (tbuf) {
781 if (!access_ok(VERIFY_WRITE,tbuf,sizeof *tbuf)) 781 if (!access_ok(VERIFY_WRITE, tbuf, sizeof *tbuf))
782 return -EFAULT; 782 return -EFAULT;
783 783
784 err = __put_user(current->utime, &tbuf->tms_utime); 784 err = __put_user(current->utime, &tbuf->tms_utime);
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c
index 3c09b9785f4c..45077c4b2e22 100644
--- a/arch/mips/kernel/vpe.c
+++ b/arch/mips/kernel/vpe.c
@@ -1044,7 +1044,7 @@ static int getcwd(char *buff, int size)
1044 old_fs = get_fs(); 1044 old_fs = get_fs();
1045 set_fs(KERNEL_DS); 1045 set_fs(KERNEL_DS);
1046 1046
1047 ret = sys_getcwd(buff,size); 1047 ret = sys_getcwd(buff, size);
1048 1048
1049 set_fs(old_fs); 1049 set_fs(old_fs);
1050 1050
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index c44e9cc2b19c..b08fc65c13a6 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -178,24 +178,24 @@ static int isBranchInstr(mips_instruction * i)
178#define FR_BIT 0 178#define FR_BIT 0
179#endif 179#endif
180 180
181#define SIFROMREG(si,x) ((si) = \ 181#define SIFROMREG(si, x) ((si) = \
182 (xcp->cp0_status & FR_BIT) || !(x & 1) ? \ 182 (xcp->cp0_status & FR_BIT) || !(x & 1) ? \
183 (int)ctx->fpr[x] : \ 183 (int)ctx->fpr[x] : \
184 (int)(ctx->fpr[x & ~1] >> 32 )) 184 (int)(ctx->fpr[x & ~1] >> 32 ))
185#define SITOREG(si,x) (ctx->fpr[x & ~((xcp->cp0_status & FR_BIT) == 0)] = \ 185#define SITOREG(si, x) (ctx->fpr[x & ~((xcp->cp0_status & FR_BIT) == 0)] = \
186 (xcp->cp0_status & FR_BIT) || !(x & 1) ? \ 186 (xcp->cp0_status & FR_BIT) || !(x & 1) ? \
187 ctx->fpr[x & ~1] >> 32 << 32 | (u32)(si) : \ 187 ctx->fpr[x & ~1] >> 32 << 32 | (u32)(si) : \
188 ctx->fpr[x & ~1] << 32 >> 32 | (u64)(si) << 32) 188 ctx->fpr[x & ~1] << 32 >> 32 | (u64)(si) << 32)
189 189
190#define DIFROMREG(di,x) ((di) = \ 190#define DIFROMREG(di, x) ((di) = \
191 ctx->fpr[x & ~((xcp->cp0_status & FR_BIT) == 0)]) 191 ctx->fpr[x & ~((xcp->cp0_status & FR_BIT) == 0)])
192#define DITOREG(di,x) (ctx->fpr[x & ~((xcp->cp0_status & FR_BIT) == 0)] \ 192#define DITOREG(di, x) (ctx->fpr[x & ~((xcp->cp0_status & FR_BIT) == 0)] \
193 = (di)) 193 = (di))
194 194
195#define SPFROMREG(sp,x) SIFROMREG((sp).bits,x) 195#define SPFROMREG(sp, x) SIFROMREG((sp).bits, x)
196#define SPTOREG(sp,x) SITOREG((sp).bits,x) 196#define SPTOREG(sp, x) SITOREG((sp).bits, x)
197#define DPFROMREG(dp,x) DIFROMREG((dp).bits,x) 197#define DPFROMREG(dp, x) DIFROMREG((dp).bits, x)
198#define DPTOREG(dp,x) DITOREG((dp).bits,x) 198#define DPTOREG(dp, x) DITOREG((dp).bits, x)
199 199
200/* 200/*
201 * Emulate the single floating point instruction pointed at by EPC. 201 * Emulate the single floating point instruction pointed at by EPC.
@@ -584,12 +584,12 @@ static ieee754sp fpemu_sp_rsqrt(ieee754sp s)
584 return ieee754sp_div(ieee754sp_one(0), ieee754sp_sqrt(s)); 584 return ieee754sp_div(ieee754sp_one(0), ieee754sp_sqrt(s));
585} 585}
586 586
587DEF3OP(madd, sp, ieee754sp_mul, ieee754sp_add,); 587DEF3OP(madd, sp, ieee754sp_mul, ieee754sp_add, );
588DEF3OP(msub, sp, ieee754sp_mul, ieee754sp_sub,); 588DEF3OP(msub, sp, ieee754sp_mul, ieee754sp_sub, );
589DEF3OP(nmadd, sp, ieee754sp_mul, ieee754sp_add, ieee754sp_neg); 589DEF3OP(nmadd, sp, ieee754sp_mul, ieee754sp_add, ieee754sp_neg);
590DEF3OP(nmsub, sp, ieee754sp_mul, ieee754sp_sub, ieee754sp_neg); 590DEF3OP(nmsub, sp, ieee754sp_mul, ieee754sp_sub, ieee754sp_neg);
591DEF3OP(madd, dp, ieee754dp_mul, ieee754dp_add,); 591DEF3OP(madd, dp, ieee754dp_mul, ieee754dp_add, );
592DEF3OP(msub, dp, ieee754dp_mul, ieee754dp_sub,); 592DEF3OP(msub, dp, ieee754dp_mul, ieee754dp_sub, );
593DEF3OP(nmadd, dp, ieee754dp_mul, ieee754dp_add, ieee754dp_neg); 593DEF3OP(nmadd, dp, ieee754dp_mul, ieee754dp_add, ieee754dp_neg);
594DEF3OP(nmsub, dp, ieee754dp_mul, ieee754dp_sub, ieee754dp_neg); 594DEF3OP(nmsub, dp, ieee754dp_mul, ieee754dp_sub, ieee754dp_neg);
595 595
diff --git a/arch/mips/math-emu/dp_mul.c b/arch/mips/math-emu/dp_mul.c
index f2373902f524..48908a809c17 100644
--- a/arch/mips/math-emu/dp_mul.c
+++ b/arch/mips/math-emu/dp_mul.c
@@ -121,7 +121,7 @@ ieee754dp ieee754dp_mul(ieee754dp x, ieee754dp y)
121 */ 121 */
122 122
123 /* 32 * 32 => 64 */ 123 /* 32 * 32 => 64 */
124#define DPXMULT(x,y) ((u64)(x) * (u64)y) 124#define DPXMULT(x, y) ((u64)(x) * (u64)y)
125 125
126 { 126 {
127 unsigned lxm = xm; 127 unsigned lxm = xm;
diff --git a/arch/mips/math-emu/ieee754.c b/arch/mips/math-emu/ieee754.c
index a93c45dbdefd..946aee331788 100644
--- a/arch/mips/math-emu/ieee754.c
+++ b/arch/mips/math-emu/ieee754.c
@@ -47,13 +47,13 @@
47 47
48 48
49#if (defined(BYTE_ORDER) && BYTE_ORDER == LITTLE_ENDIAN) || defined(__MIPSEL__) 49#if (defined(BYTE_ORDER) && BYTE_ORDER == LITTLE_ENDIAN) || defined(__MIPSEL__)
50#define SPSTR(s,b,m) {m,b,s} 50#define SPSTR(s, b, m) {m, b, s}
51#define DPSTR(s,b,mh,ml) {ml,mh,b,s} 51#define DPSTR(s, b, mh, ml) {ml, mh, b, s}
52#endif 52#endif
53 53
54#ifdef __MIPSEB__ 54#ifdef __MIPSEB__
55#define SPSTR(s,b,m) {s,b,m} 55#define SPSTR(s, b, m) {s, b, m}
56#define DPSTR(s,b,mh,ml) {s,b,mh,ml} 56#define DPSTR(s, b, mh, ml) {s, b, mh, ml}
57#endif 57#endif
58 58
59const struct ieee754dp_konst __ieee754dp_spcvals[] = { 59const struct ieee754dp_konst __ieee754dp_spcvals[] = {
@@ -65,7 +65,7 @@ const struct ieee754dp_konst __ieee754dp_spcvals[] = {
65 DPSTR(1, 3 + DP_EBIAS, 0x40000, 0), /* - 10.0 */ 65 DPSTR(1, 3 + DP_EBIAS, 0x40000, 0), /* - 10.0 */
66 DPSTR(0, DP_EMAX + 1 + DP_EBIAS, 0, 0), /* + infinity */ 66 DPSTR(0, DP_EMAX + 1 + DP_EBIAS, 0, 0), /* + infinity */
67 DPSTR(1, DP_EMAX + 1 + DP_EBIAS, 0, 0), /* - infinity */ 67 DPSTR(1, DP_EMAX + 1 + DP_EBIAS, 0, 0), /* - infinity */
68 DPSTR(0,DP_EMAX+1+DP_EBIAS,0x7FFFF,0xFFFFFFFF), /* + indef quiet Nan */ 68 DPSTR(0, DP_EMAX+1+DP_EBIAS, 0x7FFFF, 0xFFFFFFFF), /* + indef quiet Nan */
69 DPSTR(0, DP_EMAX + DP_EBIAS, 0xFFFFF, 0xFFFFFFFF), /* + max */ 69 DPSTR(0, DP_EMAX + DP_EBIAS, 0xFFFFF, 0xFFFFFFFF), /* + max */
70 DPSTR(1, DP_EMAX + DP_EBIAS, 0xFFFFF, 0xFFFFFFFF), /* - max */ 70 DPSTR(1, DP_EMAX + DP_EBIAS, 0xFFFFF, 0xFFFFFFFF), /* - max */
71 DPSTR(0, DP_EMIN + DP_EBIAS, 0, 0), /* + min normal */ 71 DPSTR(0, DP_EMIN + DP_EBIAS, 0, 0), /* + min normal */
@@ -85,7 +85,7 @@ const struct ieee754sp_konst __ieee754sp_spcvals[] = {
85 SPSTR(1, 3 + SP_EBIAS, 0x200000), /* - 10.0 */ 85 SPSTR(1, 3 + SP_EBIAS, 0x200000), /* - 10.0 */
86 SPSTR(0, SP_EMAX + 1 + SP_EBIAS, 0), /* + infinity */ 86 SPSTR(0, SP_EMAX + 1 + SP_EBIAS, 0), /* + infinity */
87 SPSTR(1, SP_EMAX + 1 + SP_EBIAS, 0), /* - infinity */ 87 SPSTR(1, SP_EMAX + 1 + SP_EBIAS, 0), /* - infinity */
88 SPSTR(0,SP_EMAX+1+SP_EBIAS,0x3FFFFF), /* + indef quiet Nan */ 88 SPSTR(0, SP_EMAX+1+SP_EBIAS, 0x3FFFFF), /* + indef quiet Nan */
89 SPSTR(0, SP_EMAX + SP_EBIAS, 0x7FFFFF), /* + max normal */ 89 SPSTR(0, SP_EMAX + SP_EBIAS, 0x7FFFFF), /* + max normal */
90 SPSTR(1, SP_EMAX + SP_EBIAS, 0x7FFFFF), /* - max normal */ 90 SPSTR(1, SP_EMAX + SP_EBIAS, 0x7FFFFF), /* - max normal */
91 SPSTR(0, SP_EMIN + SP_EBIAS, 0), /* + min normal */ 91 SPSTR(0, SP_EMIN + SP_EBIAS, 0), /* + min normal */
diff --git a/arch/mips/math-emu/ieee754dp.h b/arch/mips/math-emu/ieee754dp.h
index a37370dae232..8977eb585a37 100644
--- a/arch/mips/math-emu/ieee754dp.h
+++ b/arch/mips/math-emu/ieee754dp.h
@@ -43,8 +43,8 @@
43/* convert denormal to normalized with extended exponent */ 43/* convert denormal to normalized with extended exponent */
44#define DPDNORMx(m,e) \ 44#define DPDNORMx(m,e) \
45 while( (m >> DP_MBITS) == 0) { m <<= 1; e--; } 45 while( (m >> DP_MBITS) == 0) { m <<= 1; e--; }
46#define DPDNORMX DPDNORMx(xm,xe) 46#define DPDNORMX DPDNORMx(xm, xe)
47#define DPDNORMY DPDNORMx(ym,ye) 47#define DPDNORMY DPDNORMx(ym, ye)
48 48
49static __inline ieee754dp builddp(int s, int bx, u64 m) 49static __inline ieee754dp builddp(int s, int bx, u64 m)
50{ 50{
@@ -71,13 +71,13 @@ extern ieee754dp ieee754dp_bestnan(ieee754dp, ieee754dp);
71extern ieee754dp ieee754dp_format(int, int, u64); 71extern ieee754dp ieee754dp_format(int, int, u64);
72 72
73 73
74#define DPNORMRET2(s,e,m,name,a0,a1) \ 74#define DPNORMRET2(s, e, m, name, a0, a1) \
75{ \ 75{ \
76 ieee754dp V = ieee754dp_format(s,e,m); \ 76 ieee754dp V = ieee754dp_format(s, e, m); \
77 if(TSTX()) \ 77 if(TSTX()) \
78 return ieee754dp_xcpt(V,name,a0,a1); \ 78 return ieee754dp_xcpt(V, name, a0, a1); \
79 else \ 79 else \
80 return V; \ 80 return V; \
81} 81}
82 82
83#define DPNORMRET1(s,e,m,name,a0) DPNORMRET2(s,e,m,name,a0,a0) 83#define DPNORMRET1(s, e, m, name, a0) DPNORMRET2(s, e, m, name, a0, a0)
diff --git a/arch/mips/math-emu/ieee754int.h b/arch/mips/math-emu/ieee754int.h
index 4a5a81d6b893..1a846c5425cd 100644
--- a/arch/mips/math-emu/ieee754int.h
+++ b/arch/mips/math-emu/ieee754int.h
@@ -55,16 +55,16 @@
55#define DPBEXP(dp) (dp.parts.bexp) 55#define DPBEXP(dp) (dp.parts.bexp)
56#define DPMANT(dp) (dp.parts.mant) 56#define DPMANT(dp) (dp.parts.mant)
57 57
58#define CLPAIR(x,y) ((x)*6+(y)) 58#define CLPAIR(x, y) ((x)*6+(y))
59 59
60#define CLEARCX \ 60#define CLEARCX \
61 (ieee754_csr.cx = 0) 61 (ieee754_csr.cx = 0)
62 62
63#define SETCX(x) \ 63#define SETCX(x) \
64 (ieee754_csr.cx |= (x),ieee754_csr.sx |= (x)) 64 (ieee754_csr.cx |= (x), ieee754_csr.sx |= (x))
65 65
66#define SETANDTESTCX(x) \ 66#define SETANDTESTCX(x) \
67 (SETCX(x),ieee754_csr.mx & (x)) 67 (SETCX(x), ieee754_csr.mx & (x))
68 68
69#define TSTX() \ 69#define TSTX() \
70 (ieee754_csr.cx & ieee754_csr.mx) 70 (ieee754_csr.cx & ieee754_csr.mx)
@@ -76,7 +76,7 @@
76#define COMPYSP \ 76#define COMPYSP \
77 unsigned ym; int ye; int ys; int yc 77 unsigned ym; int ye; int ys; int yc
78 78
79#define EXPLODESP(v,vc,vs,ve,vm) \ 79#define EXPLODESP(v, vc, vs, ve, vm) \
80{\ 80{\
81 vs = SPSIGN(v);\ 81 vs = SPSIGN(v);\
82 ve = SPBEXP(v);\ 82 ve = SPBEXP(v);\
@@ -100,8 +100,8 @@
100 vc = IEEE754_CLASS_NORM;\ 100 vc = IEEE754_CLASS_NORM;\
101 }\ 101 }\
102} 102}
103#define EXPLODEXSP EXPLODESP(x,xc,xs,xe,xm) 103#define EXPLODEXSP EXPLODESP(x, xc, xs, xe, xm)
104#define EXPLODEYSP EXPLODESP(y,yc,ys,ye,ym) 104#define EXPLODEYSP EXPLODESP(y, yc, ys, ye, ym)
105 105
106 106
107#define COMPXDP \ 107#define COMPXDP \
@@ -110,7 +110,7 @@ u64 xm; int xe; int xs; int xc
110#define COMPYDP \ 110#define COMPYDP \
111u64 ym; int ye; int ys; int yc 111u64 ym; int ye; int ys; int yc
112 112
113#define EXPLODEDP(v,vc,vs,ve,vm) \ 113#define EXPLODEDP(v, vc, vs, ve, vm) \
114{\ 114{\
115 vm = DPMANT(v);\ 115 vm = DPMANT(v);\
116 vs = DPSIGN(v);\ 116 vs = DPSIGN(v);\
@@ -134,10 +134,10 @@ u64 ym; int ye; int ys; int yc
134 vc = IEEE754_CLASS_NORM;\ 134 vc = IEEE754_CLASS_NORM;\
135 }\ 135 }\
136} 136}
137#define EXPLODEXDP EXPLODEDP(x,xc,xs,xe,xm) 137#define EXPLODEXDP EXPLODEDP(x, xc, xs, xe, xm)
138#define EXPLODEYDP EXPLODEDP(y,yc,ys,ye,ym) 138#define EXPLODEYDP EXPLODEDP(y, yc, ys, ye, ym)
139 139
140#define FLUSHDP(v,vc,vs,ve,vm) \ 140#define FLUSHDP(v, vc, vs, ve, vm) \
141 if(vc==IEEE754_CLASS_DNORM) {\ 141 if(vc==IEEE754_CLASS_DNORM) {\
142 if(ieee754_csr.nod) {\ 142 if(ieee754_csr.nod) {\
143 SETCX(IEEE754_INEXACT);\ 143 SETCX(IEEE754_INEXACT);\
@@ -148,7 +148,7 @@ u64 ym; int ye; int ys; int yc
148 }\ 148 }\
149 } 149 }
150 150
151#define FLUSHSP(v,vc,vs,ve,vm) \ 151#define FLUSHSP(v, vc, vs, ve, vm) \
152 if(vc==IEEE754_CLASS_DNORM) {\ 152 if(vc==IEEE754_CLASS_DNORM) {\
153 if(ieee754_csr.nod) {\ 153 if(ieee754_csr.nod) {\
154 SETCX(IEEE754_INEXACT);\ 154 SETCX(IEEE754_INEXACT);\
@@ -159,7 +159,7 @@ u64 ym; int ye; int ys; int yc
159 }\ 159 }\
160 } 160 }
161 161
162#define FLUSHXDP FLUSHDP(x,xc,xs,xe,xm) 162#define FLUSHXDP FLUSHDP(x, xc, xs, xe, xm)
163#define FLUSHYDP FLUSHDP(y,yc,ys,ye,ym) 163#define FLUSHYDP FLUSHDP(y, yc, ys, ye, ym)
164#define FLUSHXSP FLUSHSP(x,xc,xs,xe,xm) 164#define FLUSHXSP FLUSHSP(x, xc, xs, xe, xm)
165#define FLUSHYSP FLUSHSP(y,yc,ys,ye,ym) 165#define FLUSHYSP FLUSHSP(y, yc, ys, ye, ym)
diff --git a/arch/mips/math-emu/ieee754sp.h b/arch/mips/math-emu/ieee754sp.h
index ae82f51297e5..9917c1e4d947 100644
--- a/arch/mips/math-emu/ieee754sp.h
+++ b/arch/mips/math-emu/ieee754sp.h
@@ -48,8 +48,8 @@
48/* convert denormal to normalized with extended exponent */ 48/* convert denormal to normalized with extended exponent */
49#define SPDNORMx(m,e) \ 49#define SPDNORMx(m,e) \
50 while( (m >> SP_MBITS) == 0) { m <<= 1; e--; } 50 while( (m >> SP_MBITS) == 0) { m <<= 1; e--; }
51#define SPDNORMX SPDNORMx(xm,xe) 51#define SPDNORMX SPDNORMx(xm, xe)
52#define SPDNORMY SPDNORMx(ym,ye) 52#define SPDNORMY SPDNORMx(ym, ye)
53 53
54static __inline ieee754sp buildsp(int s, int bx, unsigned m) 54static __inline ieee754sp buildsp(int s, int bx, unsigned m)
55{ 55{
@@ -77,13 +77,13 @@ extern ieee754sp ieee754sp_bestnan(ieee754sp, ieee754sp);
77extern ieee754sp ieee754sp_format(int, int, unsigned); 77extern ieee754sp ieee754sp_format(int, int, unsigned);
78 78
79 79
80#define SPNORMRET2(s,e,m,name,a0,a1) \ 80#define SPNORMRET2(s, e, m, name, a0, a1) \
81{ \ 81{ \
82 ieee754sp V = ieee754sp_format(s,e,m); \ 82 ieee754sp V = ieee754sp_format(s, e, m); \
83 if(TSTX()) \ 83 if(TSTX()) \
84 return ieee754sp_xcpt(V,name,a0,a1); \ 84 return ieee754sp_xcpt(V, name, a0, a1); \
85 else \ 85 else \
86 return V; \ 86 return V; \
87} 87}
88 88
89#define SPNORMRET1(s,e,m,name,a0) SPNORMRET2(s,e,m,name,a0,a0) 89#define SPNORMRET1(s, e, m, name, a0) SPNORMRET2(s, e, m, name, a0, a0)
diff --git a/arch/mips/mips-boards/atlas/atlas_gdb.c b/arch/mips/mips-boards/atlas/atlas_gdb.c
index fb65280f1780..00c98cff62dc 100644
--- a/arch/mips/mips-boards/atlas/atlas_gdb.c
+++ b/arch/mips/mips-boards/atlas/atlas_gdb.c
@@ -22,7 +22,7 @@
22#include <asm/mips-boards/saa9730_uart.h> 22#include <asm/mips-boards/saa9730_uart.h>
23 23
24#define INB(a) inb((unsigned long)a) 24#define INB(a) inb((unsigned long)a)
25#define OUTB(x,a) outb(x,(unsigned long)a) 25#define OUTB(x, a) outb(x, (unsigned long)a)
26 26
27/* 27/*
28 * This is the interface to the remote debugger stub 28 * This is the interface to the remote debugger stub
diff --git a/arch/mips/mips-boards/malta/malta_int.c b/arch/mips/mips-boards/malta/malta_int.c
index 8232392750a8..f010261b75d8 100644
--- a/arch/mips/mips-boards/malta/malta_int.c
+++ b/arch/mips/mips-boards/malta/malta_int.c
@@ -124,7 +124,7 @@ static void corehi_irqdispatch(void)
124{ 124{
125 unsigned int intedge, intsteer, pcicmd, pcibadaddr; 125 unsigned int intedge, intsteer, pcicmd, pcibadaddr;
126 unsigned int pcimstat, intisr, inten, intpol; 126 unsigned int pcimstat, intisr, inten, intpol;
127 unsigned int intrcause,datalo,datahi; 127 unsigned int intrcause, datalo, datahi;
128 struct pt_regs *regs = get_irq_regs(); 128 struct pt_regs *regs = get_irq_regs();
129 129
130 printk("CoreHI interrupt, shouldn't happen, so we die here!!!\n"); 130 printk("CoreHI interrupt, shouldn't happen, so we die here!!!\n");
diff --git a/arch/mips/mips-boards/malta/malta_setup.c b/arch/mips/mips-boards/malta/malta_setup.c
index e243d5efcb38..9a2636e56243 100644
--- a/arch/mips/mips-boards/malta/malta_setup.c
+++ b/arch/mips/mips-boards/malta/malta_setup.c
@@ -176,7 +176,7 @@ void __init plat_mem_setup(void)
176 0, /* orig-video-page */ 176 0, /* orig-video-page */
177 0, /* orig-video-mode */ 177 0, /* orig-video-mode */
178 80, /* orig-video-cols */ 178 80, /* orig-video-cols */
179 0,0,0, /* ega_ax, ega_bx, ega_cx */ 179 0, 0, 0, /* ega_ax, ega_bx, ega_cx */
180 25, /* orig-video-lines */ 180 25, /* orig-video-lines */
181 VIDEO_TYPE_VGAC, /* orig-video-isVGA */ 181 VIDEO_TYPE_VGAC, /* orig-video-isVGA */
182 16 /* orig-video-points */ 182 16 /* orig-video-points */
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 8b7b7c57baca..971f6c047b8a 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -164,12 +164,12 @@ static inline void tx49_blast_icache32(void)
164 /* I'm in even chunk. blast odd chunks */ 164 /* I'm in even chunk. blast odd chunks */
165 for (ws = 0; ws < ws_end; ws += ws_inc) 165 for (ws = 0; ws < ws_end; ws += ws_inc)
166 for (addr = start + 0x400; addr < end; addr += 0x400 * 2) 166 for (addr = start + 0x400; addr < end; addr += 0x400 * 2)
167 cache32_unroll32(addr|ws,Index_Invalidate_I); 167 cache32_unroll32(addr|ws, Index_Invalidate_I);
168 CACHE32_UNROLL32_ALIGN; 168 CACHE32_UNROLL32_ALIGN;
169 /* I'm in odd chunk. blast even chunks */ 169 /* I'm in odd chunk. blast even chunks */
170 for (ws = 0; ws < ws_end; ws += ws_inc) 170 for (ws = 0; ws < ws_end; ws += ws_inc)
171 for (addr = start; addr < end; addr += 0x400 * 2) 171 for (addr = start; addr < end; addr += 0x400 * 2)
172 cache32_unroll32(addr|ws,Index_Invalidate_I); 172 cache32_unroll32(addr|ws, Index_Invalidate_I);
173} 173}
174 174
175static inline void blast_icache32_r4600_v1_page_indexed(unsigned long page) 175static inline void blast_icache32_r4600_v1_page_indexed(unsigned long page)
@@ -195,12 +195,12 @@ static inline void tx49_blast_icache32_page_indexed(unsigned long page)
195 /* I'm in even chunk. blast odd chunks */ 195 /* I'm in even chunk. blast odd chunks */
196 for (ws = 0; ws < ws_end; ws += ws_inc) 196 for (ws = 0; ws < ws_end; ws += ws_inc)
197 for (addr = start + 0x400; addr < end; addr += 0x400 * 2) 197 for (addr = start + 0x400; addr < end; addr += 0x400 * 2)
198 cache32_unroll32(addr|ws,Index_Invalidate_I); 198 cache32_unroll32(addr|ws, Index_Invalidate_I);
199 CACHE32_UNROLL32_ALIGN; 199 CACHE32_UNROLL32_ALIGN;
200 /* I'm in odd chunk. blast even chunks */ 200 /* I'm in odd chunk. blast even chunks */
201 for (ws = 0; ws < ws_end; ws += ws_inc) 201 for (ws = 0; ws < ws_end; ws += ws_inc)
202 for (addr = start; addr < end; addr += 0x400 * 2) 202 for (addr = start; addr < end; addr += 0x400 * 2)
203 cache32_unroll32(addr|ws,Index_Invalidate_I); 203 cache32_unroll32(addr|ws, Index_Invalidate_I);
204} 204}
205 205
206static void (* r4k_blast_icache_page)(unsigned long addr); 206static void (* r4k_blast_icache_page)(unsigned long addr);
diff --git a/arch/mips/mm/cerr-sb1.c b/arch/mips/mm/cerr-sb1.c
index 4c72e650f9b6..e7f539e3284b 100644
--- a/arch/mips/mm/cerr-sb1.c
+++ b/arch/mips/mm/cerr-sb1.c
@@ -271,14 +271,22 @@ asmlinkage void sb1_cache_error(void)
271 271
272/* Parity lookup table. */ 272/* Parity lookup table. */
273static const uint8_t parity[256] = { 273static const uint8_t parity[256] = {
274 0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1, 274 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
275 1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0, 275 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
276 1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0, 276 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
277 0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1, 277 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
278 1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0, 278 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
279 0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1, 279 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
280 0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1, 280 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
281 1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,1,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0 281 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
282 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
283 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
284 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
285 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
286 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
287 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
288 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
289 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0
282}; 290};
283 291
284/* Masks to select bits for Hamming parity, mask_72_64[i] for bit[i] */ 292/* Masks to select bits for Hamming parity, mask_72_64[i] for bit[i] */
diff --git a/arch/mips/mm/pg-sb1.c b/arch/mips/mm/pg-sb1.c
index 82f42ace73c8..a3e98c243a89 100644
--- a/arch/mips/mm/pg-sb1.c
+++ b/arch/mips/mm/pg-sb1.c
@@ -188,9 +188,9 @@ static inline void copy_page_cpu(void *to, void *from)
188 : "+r" (src), "+r" (dst) 188 : "+r" (src), "+r" (dst)
189 : "r" (end) 189 : "r" (end)
190#ifdef CONFIG_64BIT 190#ifdef CONFIG_64BIT
191 : "$8","$9","$10","$11","memory"); 191 : "$8", "$9", "$10", "$11", "memory");
192#else 192#else
193 : "$2","$3","$6","$7","$8","$9","$10","$11","memory"); 193 : "$2", "$3", "$6", "$7", "$8", "$9", "$10", "$11", "memory");
194#endif 194#endif
195} 195}
196 196
diff --git a/arch/mips/mm/pgtable.c b/arch/mips/mm/pgtable.c
index c93aa6cbcaca..57df1c38e303 100644
--- a/arch/mips/mm/pgtable.c
+++ b/arch/mips/mm/pgtable.c
@@ -29,9 +29,9 @@ void show_mem(void)
29 shared += page_count(page) - 1; 29 shared += page_count(page) - 1;
30 } 30 }
31 printk("%d pages of RAM\n", total); 31 printk("%d pages of RAM\n", total);
32 printk("%d pages of HIGHMEM\n",highmem); 32 printk("%d pages of HIGHMEM\n", highmem);
33 printk("%d reserved pages\n",reserved); 33 printk("%d reserved pages\n", reserved);
34 printk("%d pages shared\n",shared); 34 printk("%d pages shared\n", shared);
35 printk("%d pages swap cached\n",cached); 35 printk("%d pages swap cached\n", cached);
36#endif 36#endif
37} 37}
diff --git a/arch/mips/mm/tlb-r8k.c b/arch/mips/mm/tlb-r8k.c
index 266a47d65eed..bd8409d8ff62 100644
--- a/arch/mips/mm/tlb-r8k.c
+++ b/arch/mips/mm/tlb-r8k.c
@@ -56,7 +56,7 @@ void local_flush_tlb_mm(struct mm_struct *mm)
56 int cpu = smp_processor_id(); 56 int cpu = smp_processor_id();
57 57
58 if (cpu_context(cpu, mm) != 0) 58 if (cpu_context(cpu, mm) != 0)
59 drop_mmu_context(mm,cpu); 59 drop_mmu_context(mm, cpu);
60} 60}
61 61
62void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, 62void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index c3da4fefbcb4..a61246d3533d 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -141,53 +141,53 @@ struct insn {
141 | (f) << FUNC_SH) 141 | (f) << FUNC_SH)
142 142
143static __initdata struct insn insn_table[] = { 143static __initdata struct insn insn_table[] = {
144 { insn_addiu, M(addiu_op,0,0,0,0,0), RS | RT | SIMM }, 144 { insn_addiu, M(addiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
145 { insn_addu, M(spec_op,0,0,0,0,addu_op), RS | RT | RD }, 145 { insn_addu, M(spec_op, 0, 0, 0, 0, addu_op), RS | RT | RD },
146 { insn_and, M(spec_op,0,0,0,0,and_op), RS | RT | RD }, 146 { insn_and, M(spec_op, 0, 0, 0, 0, and_op), RS | RT | RD },
147 { insn_andi, M(andi_op,0,0,0,0,0), RS | RT | UIMM }, 147 { insn_andi, M(andi_op, 0, 0, 0, 0, 0), RS | RT | UIMM },
148 { insn_beq, M(beq_op,0,0,0,0,0), RS | RT | BIMM }, 148 { insn_beq, M(beq_op, 0, 0, 0, 0, 0), RS | RT | BIMM },
149 { insn_beql, M(beql_op,0,0,0,0,0), RS | RT | BIMM }, 149 { insn_beql, M(beql_op, 0, 0, 0, 0, 0), RS | RT | BIMM },
150 { insn_bgez, M(bcond_op,0,bgez_op,0,0,0), RS | BIMM }, 150 { insn_bgez, M(bcond_op, 0, bgez_op, 0, 0, 0), RS | BIMM },
151 { insn_bgezl, M(bcond_op,0,bgezl_op,0,0,0), RS | BIMM }, 151 { insn_bgezl, M(bcond_op, 0, bgezl_op, 0, 0, 0), RS | BIMM },
152 { insn_bltz, M(bcond_op,0,bltz_op,0,0,0), RS | BIMM }, 152 { insn_bltz, M(bcond_op, 0, bltz_op, 0, 0, 0), RS | BIMM },
153 { insn_bltzl, M(bcond_op,0,bltzl_op,0,0,0), RS | BIMM }, 153 { insn_bltzl, M(bcond_op, 0, bltzl_op, 0, 0, 0), RS | BIMM },
154 { insn_bne, M(bne_op,0,0,0,0,0), RS | RT | BIMM }, 154 { insn_bne, M(bne_op, 0, 0, 0, 0, 0), RS | RT | BIMM },
155 { insn_daddiu, M(daddiu_op,0,0,0,0,0), RS | RT | SIMM }, 155 { insn_daddiu, M(daddiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
156 { insn_daddu, M(spec_op,0,0,0,0,daddu_op), RS | RT | RD }, 156 { insn_daddu, M(spec_op, 0, 0, 0, 0, daddu_op), RS | RT | RD },
157 { insn_dmfc0, M(cop0_op,dmfc_op,0,0,0,0), RT | RD | SET}, 157 { insn_dmfc0, M(cop0_op, dmfc_op, 0, 0, 0, 0), RT | RD | SET},
158 { insn_dmtc0, M(cop0_op,dmtc_op,0,0,0,0), RT | RD | SET}, 158 { insn_dmtc0, M(cop0_op, dmtc_op, 0, 0, 0, 0), RT | RD | SET},
159 { insn_dsll, M(spec_op,0,0,0,0,dsll_op), RT | RD | RE }, 159 { insn_dsll, M(spec_op, 0, 0, 0, 0, dsll_op), RT | RD | RE },
160 { insn_dsll32, M(spec_op,0,0,0,0,dsll32_op), RT | RD | RE }, 160 { insn_dsll32, M(spec_op, 0, 0, 0, 0, dsll32_op), RT | RD | RE },
161 { insn_dsra, M(spec_op,0,0,0,0,dsra_op), RT | RD | RE }, 161 { insn_dsra, M(spec_op, 0, 0, 0, 0, dsra_op), RT | RD | RE },
162 { insn_dsrl, M(spec_op,0,0,0,0,dsrl_op), RT | RD | RE }, 162 { insn_dsrl, M(spec_op, 0, 0, 0, 0, dsrl_op), RT | RD | RE },
163 { insn_dsrl32, M(spec_op,0,0,0,0,dsrl32_op), RT | RD | RE }, 163 { insn_dsrl32, M(spec_op, 0, 0, 0, 0, dsrl32_op), RT | RD | RE },
164 { insn_dsubu, M(spec_op,0,0,0,0,dsubu_op), RS | RT | RD }, 164 { insn_dsubu, M(spec_op, 0, 0, 0, 0, dsubu_op), RS | RT | RD },
165 { insn_eret, M(cop0_op,cop_op,0,0,0,eret_op), 0 }, 165 { insn_eret, M(cop0_op, cop_op, 0, 0, 0, eret_op), 0 },
166 { insn_j, M(j_op,0,0,0,0,0), JIMM }, 166 { insn_j, M(j_op, 0, 0, 0, 0, 0), JIMM },
167 { insn_jal, M(jal_op,0,0,0,0,0), JIMM }, 167 { insn_jal, M(jal_op, 0, 0, 0, 0, 0), JIMM },
168 { insn_jr, M(spec_op,0,0,0,0,jr_op), RS }, 168 { insn_jr, M(spec_op, 0, 0, 0, 0, jr_op), RS },
169 { insn_ld, M(ld_op,0,0,0,0,0), RS | RT | SIMM }, 169 { insn_ld, M(ld_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
170 { insn_ll, M(ll_op,0,0,0,0,0), RS | RT | SIMM }, 170 { insn_ll, M(ll_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
171 { insn_lld, M(lld_op,0,0,0,0,0), RS | RT | SIMM }, 171 { insn_lld, M(lld_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
172 { insn_lui, M(lui_op,0,0,0,0,0), RT | SIMM }, 172 { insn_lui, M(lui_op, 0, 0, 0, 0, 0), RT | SIMM },
173 { insn_lw, M(lw_op,0,0,0,0,0), RS | RT | SIMM }, 173 { insn_lw, M(lw_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
174 { insn_mfc0, M(cop0_op,mfc_op,0,0,0,0), RT | RD | SET}, 174 { insn_mfc0, M(cop0_op, mfc_op, 0, 0, 0, 0), RT | RD | SET},
175 { insn_mtc0, M(cop0_op,mtc_op,0,0,0,0), RT | RD | SET}, 175 { insn_mtc0, M(cop0_op, mtc_op, 0, 0, 0, 0), RT | RD | SET},
176 { insn_ori, M(ori_op,0,0,0,0,0), RS | RT | UIMM }, 176 { insn_ori, M(ori_op, 0, 0, 0, 0, 0), RS | RT | UIMM },
177 { insn_rfe, M(cop0_op,cop_op,0,0,0,rfe_op), 0 }, 177 { insn_rfe, M(cop0_op, cop_op, 0, 0, 0, rfe_op), 0 },
178 { insn_sc, M(sc_op,0,0,0,0,0), RS | RT | SIMM }, 178 { insn_sc, M(sc_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
179 { insn_scd, M(scd_op,0,0,0,0,0), RS | RT | SIMM }, 179 { insn_scd, M(scd_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
180 { insn_sd, M(sd_op,0,0,0,0,0), RS | RT | SIMM }, 180 { insn_sd, M(sd_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
181 { insn_sll, M(spec_op,0,0,0,0,sll_op), RT | RD | RE }, 181 { insn_sll, M(spec_op, 0, 0, 0, 0, sll_op), RT | RD | RE },
182 { insn_sra, M(spec_op,0,0,0,0,sra_op), RT | RD | RE }, 182 { insn_sra, M(spec_op, 0, 0, 0, 0, sra_op), RT | RD | RE },
183 { insn_srl, M(spec_op,0,0,0,0,srl_op), RT | RD | RE }, 183 { insn_srl, M(spec_op, 0, 0, 0, 0, srl_op), RT | RD | RE },
184 { insn_subu, M(spec_op,0,0,0,0,subu_op), RS | RT | RD }, 184 { insn_subu, M(spec_op, 0, 0, 0, 0, subu_op), RS | RT | RD },
185 { insn_sw, M(sw_op,0,0,0,0,0), RS | RT | SIMM }, 185 { insn_sw, M(sw_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
186 { insn_tlbp, M(cop0_op,cop_op,0,0,0,tlbp_op), 0 }, 186 { insn_tlbp, M(cop0_op, cop_op, 0, 0, 0, tlbp_op), 0 },
187 { insn_tlbwi, M(cop0_op,cop_op,0,0,0,tlbwi_op), 0 }, 187 { insn_tlbwi, M(cop0_op, cop_op, 0, 0, 0, tlbwi_op), 0 },
188 { insn_tlbwr, M(cop0_op,cop_op,0,0,0,tlbwr_op), 0 }, 188 { insn_tlbwr, M(cop0_op, cop_op, 0, 0, 0, tlbwr_op), 0 },
189 { insn_xor, M(spec_op,0,0,0,0,xor_op), RS | RT | RD }, 189 { insn_xor, M(spec_op, 0, 0, 0, 0, xor_op), RS | RT | RD },
190 { insn_xori, M(xori_op,0,0,0,0,0), RS | RT | UIMM }, 190 { insn_xori, M(xori_op, 0, 0, 0, 0, 0), RS | RT | UIMM },
191 { insn_invalid, 0, 0 } 191 { insn_invalid, 0, 0 }
192}; 192};
193 193
diff --git a/arch/mips/pci/pci-bcm1480.c b/arch/mips/pci/pci-bcm1480.c
index 2b4e30c7d105..5443ea3596f8 100644
--- a/arch/mips/pci/pci-bcm1480.c
+++ b/arch/mips/pci/pci-bcm1480.c
@@ -49,8 +49,8 @@
49 * Macros for calculating offsets into config space given a device 49 * Macros for calculating offsets into config space given a device
50 * structure or dev/fun/reg 50 * structure or dev/fun/reg
51 */ 51 */
52#define CFGOFFSET(bus,devfn,where) (((bus)<<16)+((devfn)<<8)+(where)) 52#define CFGOFFSET(bus, devfn, where) (((bus)<<16)+((devfn)<<8)+(where))
53#define CFGADDR(bus,devfn,where) CFGOFFSET((bus)->number,(devfn),where) 53#define CFGADDR(bus, devfn, where) CFGOFFSET((bus)->number, (devfn), where)
54 54
55static void *cfg_space; 55static void *cfg_space;
56 56
@@ -255,7 +255,7 @@ static int __init bcm1480_pcibios_init(void)
255 register_pci_controller(&bcm1480_controller); 255 register_pci_controller(&bcm1480_controller);
256 256
257#ifdef CONFIG_VGA_CONSOLE 257#ifdef CONFIG_VGA_CONSOLE
258 take_over_console(&vga_con,0,MAX_NR_CONSOLES-1,1); 258 take_over_console(&vga_con, 0, MAX_NR_CONSOLES-1, 1);
259#endif 259#endif
260 return 0; 260 return 0;
261} 261}
diff --git a/arch/mips/pci/pci-bcm1480ht.c b/arch/mips/pci/pci-bcm1480ht.c
index ba2e34b09231..a63e3bd6b0ac 100644
--- a/arch/mips/pci/pci-bcm1480ht.c
+++ b/arch/mips/pci/pci-bcm1480ht.c
@@ -48,8 +48,8 @@
48 * Macros for calculating offsets into config space given a device 48 * Macros for calculating offsets into config space given a device
49 * structure or dev/fun/reg 49 * structure or dev/fun/reg
50 */ 50 */
51#define CFGOFFSET(bus,devfn,where) (((bus)<<16)+((devfn)<<8)+(where)) 51#define CFGOFFSET(bus, devfn, where) (((bus)<<16)+((devfn)<<8)+(where))
52#define CFGADDR(bus,devfn,where) CFGOFFSET((bus)->number,(devfn),where) 52#define CFGADDR(bus, devfn, where) CFGOFFSET((bus)->number, (devfn), where)
53 53
54static void *ht_cfg_space; 54static void *ht_cfg_space;
55 55
diff --git a/arch/mips/pci/pci-sb1250.c b/arch/mips/pci/pci-sb1250.c
index c1ac6493155e..42e4d2c800fa 100644
--- a/arch/mips/pci/pci-sb1250.c
+++ b/arch/mips/pci/pci-sb1250.c
@@ -49,8 +49,8 @@
49 * Macros for calculating offsets into config space given a device 49 * Macros for calculating offsets into config space given a device
50 * structure or dev/fun/reg 50 * structure or dev/fun/reg
51 */ 51 */
52#define CFGOFFSET(bus,devfn,where) (((bus)<<16) + ((devfn)<<8) + (where)) 52#define CFGOFFSET(bus, devfn, where) (((bus)<<16) + ((devfn)<<8) + (where))
53#define CFGADDR(bus,devfn,where) CFGOFFSET((bus)->number,(devfn),where) 53#define CFGADDR(bus, devfn, where) CFGOFFSET((bus)->number, (devfn), where)
54 54
55static void *cfg_space; 55static void *cfg_space;
56 56
diff --git a/arch/mips/philips/pnx8550/common/proc.c b/arch/mips/philips/pnx8550/common/proc.c
index 416f834784bc..18b125e3b65d 100644
--- a/arch/mips/philips/pnx8550/common/proc.c
+++ b/arch/mips/philips/pnx8550/common/proc.c
@@ -33,14 +33,14 @@ static int pnx8550_timers_read(char* page, char** start, off_t offset, int count
33 int configPR = read_c0_config7(); 33 int configPR = read_c0_config7();
34 34
35 if (offset==0) { 35 if (offset==0) {
36 len += sprintf(&page[len],"Timer: count, compare, tc, status\n"); 36 len += sprintf(&page[len], "Timer: count, compare, tc, status\n");
37 len += sprintf(&page[len]," 1: %11i, %8i, %1i, %s\n", 37 len += sprintf(&page[len], " 1: %11i, %8i, %1i, %s\n",
38 read_c0_count(), read_c0_compare(), 38 read_c0_count(), read_c0_compare(),
39 (configPR>>6)&0x1, ((configPR>>3)&0x1)? "off":"on"); 39 (configPR>>6)&0x1, ((configPR>>3)&0x1)? "off":"on");
40 len += sprintf(&page[len]," 2: %11i, %8i, %1i, %s\n", 40 len += sprintf(&page[len], " 2: %11i, %8i, %1i, %s\n",
41 read_c0_count2(), read_c0_compare2(), 41 read_c0_count2(), read_c0_compare2(),
42 (configPR>>7)&0x1, ((configPR>>4)&0x1)? "off":"on"); 42 (configPR>>7)&0x1, ((configPR>>4)&0x1)? "off":"on");
43 len += sprintf(&page[len]," 3: %11i, %8i, %1i, %s\n", 43 len += sprintf(&page[len], " 3: %11i, %8i, %1i, %s\n",
44 read_c0_count3(), read_c0_compare3(), 44 read_c0_count3(), read_c0_compare3(),
45 (configPR>>8)&0x1, ((configPR>>5)&0x1)? "off":"on"); 45 (configPR>>8)&0x1, ((configPR>>5)&0x1)? "off":"on");
46 } 46 }
@@ -53,18 +53,18 @@ static int pnx8550_registers_read(char* page, char** start, off_t offset, int co
53 int len = 0; 53 int len = 0;
54 54
55 if (offset==0) { 55 if (offset==0) {
56 len += sprintf(&page[len],"config1: %#10.8x\n",read_c0_config1()); 56 len += sprintf(&page[len], "config1: %#10.8x\n", read_c0_config1());
57 len += sprintf(&page[len],"config2: %#10.8x\n",read_c0_config2()); 57 len += sprintf(&page[len], "config2: %#10.8x\n", read_c0_config2());
58 len += sprintf(&page[len],"config3: %#10.8x\n",read_c0_config3()); 58 len += sprintf(&page[len], "config3: %#10.8x\n", read_c0_config3());
59 len += sprintf(&page[len],"configPR: %#10.8x\n",read_c0_config7()); 59 len += sprintf(&page[len], "configPR: %#10.8x\n", read_c0_config7());
60 len += sprintf(&page[len],"status: %#10.8x\n",read_c0_status()); 60 len += sprintf(&page[len], "status: %#10.8x\n", read_c0_status());
61 len += sprintf(&page[len],"cause: %#10.8x\n",read_c0_cause()); 61 len += sprintf(&page[len], "cause: %#10.8x\n", read_c0_cause());
62 len += sprintf(&page[len],"count: %#10.8x\n",read_c0_count()); 62 len += sprintf(&page[len], "count: %#10.8x\n", read_c0_count());
63 len += sprintf(&page[len],"count_2: %#10.8x\n",read_c0_count2()); 63 len += sprintf(&page[len], "count_2: %#10.8x\n", read_c0_count2());
64 len += sprintf(&page[len],"count_3: %#10.8x\n",read_c0_count3()); 64 len += sprintf(&page[len], "count_3: %#10.8x\n", read_c0_count3());
65 len += sprintf(&page[len],"compare: %#10.8x\n",read_c0_compare()); 65 len += sprintf(&page[len], "compare: %#10.8x\n", read_c0_compare());
66 len += sprintf(&page[len],"compare_2: %#10.8x\n",read_c0_compare2()); 66 len += sprintf(&page[len], "compare_2: %#10.8x\n", read_c0_compare2());
67 len += sprintf(&page[len],"compare_3: %#10.8x\n",read_c0_compare3()); 67 len += sprintf(&page[len], "compare_3: %#10.8x\n", read_c0_compare3());
68 } 68 }
69 69
70 return len; 70 return len;
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_serial.c b/arch/mips/pmc-sierra/msp71xx/msp_serial.c
index e25bac537d77..15e7b8000b4c 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_serial.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_serial.c
@@ -117,7 +117,7 @@ void __init msp_serial_setup(void)
117 117
118 /* Initialize first serial port */ 118 /* Initialize first serial port */
119 up.mapbase = MSP_UART0_BASE; 119 up.mapbase = MSP_UART0_BASE;
120 up.membase = ioremap_nocache(up.mapbase,MSP_UART_REG_LEN); 120 up.membase = ioremap_nocache(up.mapbase, MSP_UART_REG_LEN);
121 up.irq = MSP_INT_UART0; 121 up.irq = MSP_INT_UART0;
122 up.uartclk = uartclk; 122 up.uartclk = uartclk;
123 up.regshift = 2; 123 up.regshift = 2;
@@ -145,9 +145,9 @@ void __init msp_serial_setup(void)
145 if( DEBUG_PORT_BASE == KSEG1ADDR(MSP_UART1_BASE) ) { 145 if( DEBUG_PORT_BASE == KSEG1ADDR(MSP_UART1_BASE) ) {
146 if( mips_machtype == MACH_MSP4200_FPGA 146 if( mips_machtype == MACH_MSP4200_FPGA
147 || mips_machtype == MACH_MSP7120_FPGA ) 147 || mips_machtype == MACH_MSP7120_FPGA )
148 initDebugPort(uartclk,19200); 148 initDebugPort(uartclk, 19200);
149 else 149 else
150 initDebugPort(uartclk,57600); 150 initDebugPort(uartclk, 57600);
151 } 151 }
152#endif 152#endif
153 break; 153 break;
@@ -157,7 +157,7 @@ void __init msp_serial_setup(void)
157 } 157 }
158 158
159 up.mapbase = MSP_UART1_BASE; 159 up.mapbase = MSP_UART1_BASE;
160 up.membase = ioremap_nocache(up.mapbase,MSP_UART_REG_LEN); 160 up.membase = ioremap_nocache(up.mapbase, MSP_UART_REG_LEN);
161 up.irq = MSP_INT_UART1; 161 up.irq = MSP_INT_UART1;
162 up.line = 1; 162 up.line = 1;
163 up.private_data = (void*)UART1_STATUS_REG; 163 up.private_data = (void*)UART1_STATUS_REG;
diff --git a/arch/mips/pmc-sierra/yosemite/ht.c b/arch/mips/pmc-sierra/yosemite/ht.c
index 1f7c999eb7c6..6380662bbf3c 100644
--- a/arch/mips/pmc-sierra/yosemite/ht.c
+++ b/arch/mips/pmc-sierra/yosemite/ht.c
@@ -115,7 +115,7 @@ static int titan_ht_config_read_word(struct pci_dev *device,
115 115
116u32 longswap(unsigned long l) 116u32 longswap(unsigned long l)
117{ 117{
118 unsigned char b1,b2,b3,b4; 118 unsigned char b1, b2, b3, b4;
119 119
120 b1 = l&255; 120 b1 = l&255;
121 b2 = (l>>8)&255; 121 b2 = (l>>8)&255;
diff --git a/arch/mips/sgi-ip27/ip27-smp.c b/arch/mips/sgi-ip27/ip27-smp.c
index 493777e39a01..a70656d42191 100644
--- a/arch/mips/sgi-ip27/ip27-smp.c
+++ b/arch/mips/sgi-ip27/ip27-smp.c
@@ -176,7 +176,7 @@ void __cpuinit prom_boot_secondary(int cpu, struct task_struct *idle)
176 unsigned long gp = (unsigned long)task_thread_info(idle); 176 unsigned long gp = (unsigned long)task_thread_info(idle);
177 unsigned long sp = __KSTK_TOS(idle); 177 unsigned long sp = __KSTK_TOS(idle);
178 178
179 LAUNCH_SLAVE(cputonasid(cpu),cputoslice(cpu), 179 LAUNCH_SLAVE(cputonasid(cpu), cputoslice(cpu),
180 (launch_proc_t)MAPPED_KERN_RW_TO_K0(smp_bootstrap), 180 (launch_proc_t)MAPPED_KERN_RW_TO_K0(smp_bootstrap),
181 0, (void *) sp, (void *) gp); 181 0, (void *) sp, (void *) gp);
182} 182}
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c
index cf979dbb282d..7aa79bf63c4a 100644
--- a/arch/mips/sibyte/bcm1480/irq.c
+++ b/arch/mips/sibyte/bcm1480/irq.c
@@ -289,7 +289,7 @@ int bcm1480_steal_irq(int irq)
289 if (irq >= BCM1480_NR_IRQS) 289 if (irq >= BCM1480_NR_IRQS)
290 return -EINVAL; 290 return -EINVAL;
291 291
292 spin_lock_irqsave(&desc->lock,flags); 292 spin_lock_irqsave(&desc->lock, flags);
293 /* Don't allow sharing at all for these */ 293 /* Don't allow sharing at all for these */
294 if (desc->action != NULL) 294 if (desc->action != NULL)
295 retval = -EBUSY; 295 retval = -EBUSY;
@@ -297,7 +297,7 @@ int bcm1480_steal_irq(int irq)
297 desc->action = &bcm1480_dummy_action; 297 desc->action = &bcm1480_dummy_action;
298 desc->depth = 0; 298 desc->depth = 0;
299 } 299 }
300 spin_unlock_irqrestore(&desc->lock,flags); 300 spin_unlock_irqrestore(&desc->lock, flags);
301 return 0; 301 return 0;
302} 302}
303 303
@@ -431,8 +431,8 @@ void __init arch_init_irq(void)
431 431
432#include <linux/delay.h> 432#include <linux/delay.h>
433 433
434#define duart_out(reg, val) csr_out32(val, IOADDR(A_DUART_CHANREG(kgdb_port,reg))) 434#define duart_out(reg, val) csr_out32(val, IOADDR(A_DUART_CHANREG(kgdb_port, reg)))
435#define duart_in(reg) csr_in32(IOADDR(A_DUART_CHANREG(kgdb_port,reg))) 435#define duart_in(reg) csr_in32(IOADDR(A_DUART_CHANREG(kgdb_port, reg)))
436 436
437static void bcm1480_kgdb_interrupt(void) 437static void bcm1480_kgdb_interrupt(void)
438{ 438{
diff --git a/arch/mips/sibyte/cfe/console.c b/arch/mips/sibyte/cfe/console.c
index 7a4ecfcde48d..81e3d54376e9 100644
--- a/arch/mips/sibyte/cfe/console.c
+++ b/arch/mips/sibyte/cfe/console.c
@@ -14,7 +14,7 @@ static void cfe_console_write(struct console *cons, const char *str,
14{ 14{
15 int i, last, written; 15 int i, last, written;
16 16
17 for (i=0,last=0; i<count; i++) { 17 for (i=0, last=0; i<count; i++) {
18 if (!str[i]) 18 if (!str[i])
19 /* XXXKW can/should this ever happen? */ 19 /* XXXKW can/should this ever happen? */
20 return; 20 return;
diff --git a/arch/mips/sibyte/cfe/setup.c b/arch/mips/sibyte/cfe/setup.c
index 147b7fb02e64..dbd6e6fdd3f9 100644
--- a/arch/mips/sibyte/cfe/setup.c
+++ b/arch/mips/sibyte/cfe/setup.c
@@ -309,7 +309,7 @@ void __init prom_init(void)
309 } 309 }
310 310
311#ifdef CONFIG_KGDB 311#ifdef CONFIG_KGDB
312 if ((arg = strstr(arcs_cmdline,"kgdb=duart")) != NULL) 312 if ((arg = strstr(arcs_cmdline, "kgdb=duart")) != NULL)
313 kgdb_port = (arg[10] == '0') ? 0 : 1; 313 kgdb_port = (arg[10] == '0') ? 0 : 1;
314 else 314 else
315 kgdb_port = 1; 315 kgdb_port = 1;
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
index 6a4cc84194a9..7659174819c6 100644
--- a/arch/mips/sibyte/sb1250/irq.c
+++ b/arch/mips/sibyte/sb1250/irq.c
@@ -259,7 +259,7 @@ int sb1250_steal_irq(int irq)
259 if (irq >= SB1250_NR_IRQS) 259 if (irq >= SB1250_NR_IRQS)
260 return -EINVAL; 260 return -EINVAL;
261 261
262 spin_lock_irqsave(&desc->lock,flags); 262 spin_lock_irqsave(&desc->lock, flags);
263 /* Don't allow sharing at all for these */ 263 /* Don't allow sharing at all for these */
264 if (desc->action != NULL) 264 if (desc->action != NULL)
265 retval = -EBUSY; 265 retval = -EBUSY;
@@ -267,7 +267,7 @@ int sb1250_steal_irq(int irq)
267 desc->action = &sb1250_dummy_action; 267 desc->action = &sb1250_dummy_action;
268 desc->depth = 0; 268 desc->depth = 0;
269 } 269 }
270 spin_unlock_irqrestore(&desc->lock,flags); 270 spin_unlock_irqrestore(&desc->lock, flags);
271 return 0; 271 return 0;
272} 272}
273 273
@@ -381,8 +381,8 @@ void __init arch_init_irq(void)
381 381
382#include <linux/delay.h> 382#include <linux/delay.h>
383 383
384#define duart_out(reg, val) csr_out32(val, IOADDR(A_DUART_CHANREG(kgdb_port,reg))) 384#define duart_out(reg, val) csr_out32(val, IOADDR(A_DUART_CHANREG(kgdb_port, reg)))
385#define duart_in(reg) csr_in32(IOADDR(A_DUART_CHANREG(kgdb_port,reg))) 385#define duart_in(reg) csr_in32(IOADDR(A_DUART_CHANREG(kgdb_port, reg)))
386 386
387static void sb1250_kgdb_interrupt(void) 387static void sb1250_kgdb_interrupt(void)
388{ 388{
diff --git a/arch/mips/sibyte/sb1250/prom.c b/arch/mips/sibyte/sb1250/prom.c
index f07ad3baccab..cf8f6b3de86c 100644
--- a/arch/mips/sibyte/sb1250/prom.c
+++ b/arch/mips/sibyte/sb1250/prom.c
@@ -66,7 +66,7 @@ static void prom_linux_exit(void)
66{ 66{
67#ifdef CONFIG_SMP 67#ifdef CONFIG_SMP
68 if (smp_processor_id()) { 68 if (smp_processor_id()) {
69 smp_call_function(prom_cpu0_exit,NULL,1,1); 69 smp_call_function(prom_cpu0_exit, NULL, 1, 1);
70 } 70 }
71#endif 71#endif
72 while(1); 72 while(1);
diff --git a/arch/mips/sibyte/swarm/dbg_io.c b/arch/mips/sibyte/swarm/dbg_io.c
index 75ce14c8eb69..b97ae3048482 100644
--- a/arch/mips/sibyte/swarm/dbg_io.c
+++ b/arch/mips/sibyte/swarm/dbg_io.c
@@ -37,8 +37,8 @@ static int duart_initialized = 0; /* 0: need to be init'ed by kgdb */
37/* -------------------- END OF CONFIG --------------------- */ 37/* -------------------- END OF CONFIG --------------------- */
38extern int kgdb_port; 38extern int kgdb_port;
39 39
40#define duart_out(reg, val) csr_out32(val, IOADDR(A_DUART_CHANREG(kgdb_port,reg))) 40#define duart_out(reg, val) csr_out32(val, IOADDR(A_DUART_CHANREG(kgdb_port, reg)))
41#define duart_in(reg) csr_in32(IOADDR(A_DUART_CHANREG(kgdb_port,reg))) 41#define duart_in(reg) csr_in32(IOADDR(A_DUART_CHANREG(kgdb_port, reg)))
42 42
43void putDebugChar(unsigned char c); 43void putDebugChar(unsigned char c);
44unsigned char getDebugChar(void); 44unsigned char getDebugChar(void);
diff --git a/arch/mips/sni/reset.c b/arch/mips/sni/reset.c
index 38b6a97a31b5..79f8d70f48c9 100644
--- a/arch/mips/sni/reset.c
+++ b/arch/mips/sni/reset.c
@@ -35,7 +35,7 @@ void sni_machine_restart(char *command)
35 kb_wait(); 35 kb_wait();
36 for (j = 0; j < 100000 ; j++) 36 for (j = 0; j < 100000 ; j++)
37 /* nothing */; 37 /* nothing */;
38 outb_p(0xfe,0x64); /* pulse reset low */ 38 outb_p(0xfe, 0x64); /* pulse reset low */
39 } 39 }
40 } 40 }
41} 41}
diff --git a/arch/mips/sni/sniprom.c b/arch/mips/sni/sniprom.c
index 11eddd43458d..eff4b89d7b75 100644
--- a/arch/mips/sni/sniprom.c
+++ b/arch/mips/sni/sniprom.c
@@ -233,7 +233,7 @@ void __init prom_init(void)
233 systype = "RM300-Exx"; 233 systype = "RM300-Exx";
234 break; 234 break;
235 } 235 }
236 pr_debug("Found SNI brdtype %02x name %s\n", sni_brd_type,systype); 236 pr_debug("Found SNI brdtype %02x name %s\n", sni_brd_type, systype);
237 237
238#ifdef DEBUG 238#ifdef DEBUG
239 sni_idprom_dump(); 239 sni_idprom_dump();
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
index 305eb12f84cc..3f808b629242 100644
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
+++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
@@ -176,7 +176,7 @@ static const u32 toshiba_rbtx4927_irq_debug_flag =
176 printk( "%s(%s:%u)::%s", __FUNCTION__, __FILE__, __LINE__, tmp ); \ 176 printk( "%s(%s:%u)::%s", __FUNCTION__, __FILE__, __LINE__, tmp ); \
177 } 177 }
178#else 178#else
179#define TOSHIBA_RBTX4927_IRQ_DPRINTK(flag,str...) 179#define TOSHIBA_RBTX4927_IRQ_DPRINTK(flag, str...)
180#endif 180#endif
181 181
182 182
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
index 4f302062b2d6..acaf613358c7 100644
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
+++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
@@ -122,7 +122,7 @@ static const u32 toshiba_rbtx4927_setup_debug_flag =
122 printk( "%s(%s:%u)::%s", __FUNCTION__, __FILE__, __LINE__, tmp ); \ 122 printk( "%s(%s:%u)::%s", __FUNCTION__, __FILE__, __LINE__, tmp ); \
123 } 123 }
124#else 124#else
125#define TOSHIBA_RBTX4927_SETUP_DPRINTK(flag,str...) 125#define TOSHIBA_RBTX4927_SETUP_DPRINTK(flag, str...)
126#endif 126#endif
127 127
128/* These functions are used for rebooting or halting the machine*/ 128/* These functions are used for rebooting or halting the machine*/
@@ -497,7 +497,7 @@ void __init tx4927_pci_setup(void)
497 "Internal"); 497 "Internal");
498 called = 1; 498 called = 1;
499 } 499 }
500 printk("%s PCIC --%s PCICLK:",toshiba_name, 500 printk("%s PCIC --%s PCICLK:", toshiba_name,
501 (tx4927_ccfgptr->ccfg & TX4927_CCFG_PCI66) ? " PCI66" : ""); 501 (tx4927_ccfgptr->ccfg & TX4927_CCFG_PCI66) ? " PCI66" : "");
502 if (tx4927_ccfgptr->pcfg & TX4927_PCFG_PCICLKEN_ALL) { 502 if (tx4927_ccfgptr->pcfg & TX4927_PCFG_PCICLKEN_ALL) {
503 int pciclk = 0; 503 int pciclk = 0;
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/setup.c b/arch/mips/tx4938/toshiba_rbtx4938/setup.c
index 304b406fcb9d..ceecaf498957 100644
--- a/arch/mips/tx4938/toshiba_rbtx4938/setup.c
+++ b/arch/mips/tx4938/toshiba_rbtx4938/setup.c
@@ -457,9 +457,9 @@ extern struct pci_controller tx4938_pci_controller[];
457static int __init tx4938_pcibios_init(void) 457static int __init tx4938_pcibios_init(void)
458{ 458{
459 unsigned long mem_base[2]; 459 unsigned long mem_base[2];
460 unsigned long mem_size[2] = {TX4938_PCIMEM_SIZE_0,TX4938_PCIMEM_SIZE_1}; /* MAX 128M,64K */ 460 unsigned long mem_size[2] = {TX4938_PCIMEM_SIZE_0, TX4938_PCIMEM_SIZE_1}; /* MAX 128M,64K */
461 unsigned long io_base[2]; 461 unsigned long io_base[2];
462 unsigned long io_size[2] = {TX4938_PCIIO_SIZE_0,TX4938_PCIIO_SIZE_1}; /* MAX 16M,64K */ 462 unsigned long io_size[2] = {TX4938_PCIIO_SIZE_0, TX4938_PCIIO_SIZE_1}; /* MAX 16M,64K */
463 /* TX4938 PCIC1: 64K MEM/IO is enough for ETH0,ETH1 */ 463 /* TX4938 PCIC1: 64K MEM/IO is enough for ETH0,ETH1 */
464 int extarb = !(tx4938_ccfgptr->ccfg & TX4938_CCFG_PCIXARB); 464 int extarb = !(tx4938_ccfgptr->ccfg & TX4938_CCFG_PCIXARB);
465 465
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/init.c b/arch/mips/vr41xx/nec-cmbvr4133/init.c
index ae1af6b21c45..7c5e18ee2231 100644
--- a/arch/mips/vr41xx/nec-cmbvr4133/init.c
+++ b/arch/mips/vr41xx/nec-cmbvr4133/init.c
@@ -36,7 +36,7 @@ void disable_pcnet(void)
36 */ 36 */
37 37
38 writel((2 << 16) | 38 writel((2 << 16) |
39 (PCI_DEVFN(1,0) << 8) | 39 (PCI_DEVFN(1, 0) << 8) |
40 (0 & 0xfc) | 40 (0 & 0xfc) |
41 1UL, 41 1UL,
42 PCICONFAREG); 42 PCICONFAREG);
@@ -44,7 +44,7 @@ void disable_pcnet(void)
44 data = readl(PCICONFDREG); 44 data = readl(PCICONFDREG);
45 45
46 writel((2 << 16) | 46 writel((2 << 16) |
47 (PCI_DEVFN(1,0) << 8) | 47 (PCI_DEVFN(1, 0) << 8) |
48 (4 & 0xfc) | 48 (4 & 0xfc) |
49 1UL, 49 1UL,
50 PCICONFAREG); 50 PCICONFAREG);
@@ -52,7 +52,7 @@ void disable_pcnet(void)
52 data = readl(PCICONFDREG); 52 data = readl(PCICONFDREG);
53 53
54 writel((2 << 16) | 54 writel((2 << 16) |
55 (PCI_DEVFN(1,0) << 8) | 55 (PCI_DEVFN(1, 0) << 8) |
56 (4 & 0xfc) | 56 (4 & 0xfc) |
57 1UL, 57 1UL,
58 PCICONFAREG); 58 PCICONFAREG);
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c b/arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c
index f45caccedc07..1341f3287d04 100644
--- a/arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c
+++ b/arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c
@@ -38,7 +38,7 @@
38 outb_p((dev_no), DATA_PORT(port)); \ 38 outb_p((dev_no), DATA_PORT(port)); \
39 } while(0) 39 } while(0)
40 40
41#define WRITE_CONFIG_DATA(port,index,data) \ 41#define WRITE_CONFIG_DATA(port, index, data) \
42 do { \ 42 do { \
43 outb_p((index), INDEX_PORT(port)); \ 43 outb_p((index), INDEX_PORT(port)); \
44 outb_p((data), DATA_PORT(port)); \ 44 outb_p((data), DATA_PORT(port)); \
@@ -206,8 +206,8 @@ static inline u16 ali_config_readw(u8 reg, int devfn)
206int vr4133_rockhopper = 0; 206int vr4133_rockhopper = 0;
207void __init ali_m5229_preinit(void) 207void __init ali_m5229_preinit(void)
208{ 208{
209 if (ali_config_readw(PCI_VENDOR_ID,16) == PCI_VENDOR_ID_AL && 209 if (ali_config_readw(PCI_VENDOR_ID, 16) == PCI_VENDOR_ID_AL &&
210 ali_config_readw(PCI_DEVICE_ID,16) == PCI_DEVICE_ID_AL_M1533) { 210 ali_config_readw(PCI_DEVICE_ID, 16) == PCI_DEVICE_ID_AL_M1533) {
211 printk(KERN_INFO "Found an NEC Rockhopper \n"); 211 printk(KERN_INFO "Found an NEC Rockhopper \n");
212 vr4133_rockhopper = 1; 212 vr4133_rockhopper = 1;
213 /* 213 /*
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-20 05:59:58 -0400