diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/powerpc/include/asm/reg_booke.h | 1 | ||||
-rw-r--r-- | arch/powerpc/kernel/Makefile | 1 | ||||
-rw-r--r-- | arch/powerpc/kernel/cpu_setup_fsl_booke.S | 31 | ||||
-rw-r--r-- | arch/powerpc/kernel/cputable.c | 8 | ||||
-rw-r--r-- | arch/powerpc/kernel/head_booke.h | 6 | ||||
-rw-r--r-- | arch/powerpc/kernel/head_fsl_booke.S | 81 |
6 files changed, 98 insertions, 30 deletions
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h index 67453766bff1..597debe780bd 100644 --- a/arch/powerpc/include/asm/reg_booke.h +++ b/arch/powerpc/include/asm/reg_booke.h | |||
@@ -110,6 +110,7 @@ | |||
110 | #define SPRN_L1CSR0 0x3F2 /* L1 Cache Control and Status Register 0 */ | 110 | #define SPRN_L1CSR0 0x3F2 /* L1 Cache Control and Status Register 0 */ |
111 | #define SPRN_L1CSR1 0x3F3 /* L1 Cache Control and Status Register 1 */ | 111 | #define SPRN_L1CSR1 0x3F3 /* L1 Cache Control and Status Register 1 */ |
112 | #define SPRN_MMUCSR0 0x3F4 /* MMU Control and Status Register 0 */ | 112 | #define SPRN_MMUCSR0 0x3F4 /* MMU Control and Status Register 0 */ |
113 | #define SPRN_MMUCFG 0x3F7 /* MMU Configuration Register */ | ||
113 | #define SPRN_PIT 0x3DB /* Programmable Interval Timer */ | 114 | #define SPRN_PIT 0x3DB /* Programmable Interval Timer */ |
114 | #define SPRN_BUCSR 0x3F5 /* Branch Unit Control and Status */ | 115 | #define SPRN_BUCSR 0x3F5 /* Branch Unit Control and Status */ |
115 | #define SPRN_L2CSR0 0x3F9 /* L2 Data Cache Control and Status Register 0 */ | 116 | #define SPRN_L2CSR0 0x3F9 /* L2 Data Cache Control and Status Register 0 */ |
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile index 8d1a419df35d..d15992119085 100644 --- a/arch/powerpc/kernel/Makefile +++ b/arch/powerpc/kernel/Makefile | |||
@@ -61,6 +61,7 @@ obj-$(CONFIG_HIBERNATION) += swsusp.o suspend.o \ | |||
61 | obj64-$(CONFIG_HIBERNATION) += swsusp_asm64.o | 61 | obj64-$(CONFIG_HIBERNATION) += swsusp_asm64.o |
62 | obj-$(CONFIG_MODULES) += module.o module_$(CONFIG_WORD_SIZE).o | 62 | obj-$(CONFIG_MODULES) += module.o module_$(CONFIG_WORD_SIZE).o |
63 | obj-$(CONFIG_44x) += cpu_setup_44x.o | 63 | obj-$(CONFIG_44x) += cpu_setup_44x.o |
64 | obj-$(CONFIG_FSL_BOOKE) += cpu_setup_fsl_booke.o | ||
64 | 65 | ||
65 | extra-$(CONFIG_PPC_STD_MMU) := head_32.o | 66 | extra-$(CONFIG_PPC_STD_MMU) := head_32.o |
66 | extra-$(CONFIG_PPC64) := head_64.o | 67 | extra-$(CONFIG_PPC64) := head_64.o |
diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S new file mode 100644 index 000000000000..eb4b9adcedb4 --- /dev/null +++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S | |||
@@ -0,0 +1,31 @@ | |||
1 | /* | ||
2 | * This file contains low level CPU setup functions. | ||
3 | * Kumar Gala <galak@kernel.crashing.org> | ||
4 | * Copyright 2009 Freescale Semiconductor, Inc. | ||
5 | * | ||
6 | * Based on cpu_setup_6xx code by | ||
7 | * Benjamin Herrenschmidt <benh@kernel.crashing.org> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or | ||
10 | * modify it under the terms of the GNU General Public License | ||
11 | * as published by the Free Software Foundation; either version | ||
12 | * 2 of the License, or (at your option) any later version. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | #include <asm/processor.h> | ||
17 | #include <asm/cputable.h> | ||
18 | #include <asm/ppc_asm.h> | ||
19 | |||
20 | _GLOBAL(__setup_cpu_e200) | ||
21 | /* enable dedicated debug exception handling resources (Debug APU) */ | ||
22 | mfspr r3,SPRN_HID0 | ||
23 | ori r3,r3,HID0_DAPUEN@l | ||
24 | mtspr SPRN_HID0,r3 | ||
25 | b __setup_e200_ivors | ||
26 | _GLOBAL(__setup_cpu_e500v1) | ||
27 | _GLOBAL(__setup_cpu_e500v2) | ||
28 | b __setup_e500_ivors | ||
29 | _GLOBAL(__setup_cpu_e500mc) | ||
30 | b __setup_e500mc_ivors | ||
31 | |||
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index 923f87aff20a..9fdf1b8027b5 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c | |||
@@ -35,6 +35,10 @@ const char *powerpc_base_platform; | |||
35 | * and ppc64 | 35 | * and ppc64 |
36 | */ | 36 | */ |
37 | #ifdef CONFIG_PPC32 | 37 | #ifdef CONFIG_PPC32 |
38 | extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec); | ||
39 | extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); | ||
40 | extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); | ||
41 | extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); | ||
38 | extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); | 42 | extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); |
39 | extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); | 43 | extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); |
40 | extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); | 44 | extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); |
@@ -1687,6 +1691,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
1687 | PPC_FEATURE_UNIFIED_CACHE, | 1691 | PPC_FEATURE_UNIFIED_CACHE, |
1688 | .mmu_features = MMU_FTR_TYPE_FSL_E, | 1692 | .mmu_features = MMU_FTR_TYPE_FSL_E, |
1689 | .dcache_bsize = 32, | 1693 | .dcache_bsize = 32, |
1694 | .cpu_setup = __setup_cpu_e200, | ||
1690 | .machine_check = machine_check_e200, | 1695 | .machine_check = machine_check_e200, |
1691 | .platform = "ppc5554", | 1696 | .platform = "ppc5554", |
1692 | } | 1697 | } |
@@ -1706,6 +1711,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
1706 | .num_pmcs = 4, | 1711 | .num_pmcs = 4, |
1707 | .oprofile_cpu_type = "ppc/e500", | 1712 | .oprofile_cpu_type = "ppc/e500", |
1708 | .oprofile_type = PPC_OPROFILE_FSL_EMB, | 1713 | .oprofile_type = PPC_OPROFILE_FSL_EMB, |
1714 | .cpu_setup = __setup_cpu_e500v1, | ||
1709 | .machine_check = machine_check_e500, | 1715 | .machine_check = machine_check_e500, |
1710 | .platform = "ppc8540", | 1716 | .platform = "ppc8540", |
1711 | }, | 1717 | }, |
@@ -1724,6 +1730,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
1724 | .num_pmcs = 4, | 1730 | .num_pmcs = 4, |
1725 | .oprofile_cpu_type = "ppc/e500", | 1731 | .oprofile_cpu_type = "ppc/e500", |
1726 | .oprofile_type = PPC_OPROFILE_FSL_EMB, | 1732 | .oprofile_type = PPC_OPROFILE_FSL_EMB, |
1733 | .cpu_setup = __setup_cpu_e500v2, | ||
1727 | .machine_check = machine_check_e500, | 1734 | .machine_check = machine_check_e500, |
1728 | .platform = "ppc8548", | 1735 | .platform = "ppc8548", |
1729 | }, | 1736 | }, |
@@ -1739,6 +1746,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
1739 | .num_pmcs = 4, | 1746 | .num_pmcs = 4, |
1740 | .oprofile_cpu_type = "ppc/e500", /* xxx - galak, e500mc? */ | 1747 | .oprofile_cpu_type = "ppc/e500", /* xxx - galak, e500mc? */ |
1741 | .oprofile_type = PPC_OPROFILE_FSL_EMB, | 1748 | .oprofile_type = PPC_OPROFILE_FSL_EMB, |
1749 | .cpu_setup = __setup_cpu_e500mc, | ||
1742 | .machine_check = machine_check_e500, | 1750 | .machine_check = machine_check_e500, |
1743 | .platform = "ppce500mc", | 1751 | .platform = "ppce500mc", |
1744 | }, | 1752 | }, |
diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h index fce2df988504..bec18078239d 100644 --- a/arch/powerpc/kernel/head_booke.h +++ b/arch/powerpc/kernel/head_booke.h | |||
@@ -70,10 +70,10 @@ | |||
70 | 70 | ||
71 | /* only on e500mc/e200 */ | 71 | /* only on e500mc/e200 */ |
72 | #define DEBUG_STACK_BASE dbgirq_ctx | 72 | #define DEBUG_STACK_BASE dbgirq_ctx |
73 | #ifdef CONFIG_PPC_E500MC | 73 | #ifdef CONFIG_E200 |
74 | #define DEBUG_SPRG SPRN_SPRG9 | ||
75 | #else | ||
76 | #define DEBUG_SPRG SPRN_SPRG6W | 74 | #define DEBUG_SPRG SPRN_SPRG6W |
75 | #else | ||
76 | #define DEBUG_SPRG SPRN_SPRG9 | ||
77 | #endif | 77 | #endif |
78 | 78 | ||
79 | #define EXC_LVL_FRAME_OVERHEAD (THREAD_SIZE - INT_FRAME_SIZE - EXC_LVL_SIZE) | 79 | #define EXC_LVL_FRAME_OVERHEAD (THREAD_SIZE - INT_FRAME_SIZE - EXC_LVL_SIZE) |
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S index 36ffb3504a4f..64ecb1603a77 100644 --- a/arch/powerpc/kernel/head_fsl_booke.S +++ b/arch/powerpc/kernel/head_fsl_booke.S | |||
@@ -103,10 +103,15 @@ invstr: mflr r6 /* Make it accessible */ | |||
103 | or r7,r7,r4 | 103 | or r7,r7,r4 |
104 | mtspr SPRN_MAS6,r7 | 104 | mtspr SPRN_MAS6,r7 |
105 | tlbsx 0,r6 /* search MSR[IS], SPID=PID0 */ | 105 | tlbsx 0,r6 /* search MSR[IS], SPID=PID0 */ |
106 | #ifndef CONFIG_E200 | ||
107 | mfspr r7,SPRN_MAS1 | 106 | mfspr r7,SPRN_MAS1 |
108 | andis. r7,r7,MAS1_VALID@h | 107 | andis. r7,r7,MAS1_VALID@h |
109 | bne match_TLB | 108 | bne match_TLB |
109 | |||
110 | mfspr r7,SPRN_MMUCFG | ||
111 | rlwinm r7,r7,21,28,31 /* extract MMUCFG[NPIDS] */ | ||
112 | cmpwi r7,3 | ||
113 | bne match_TLB /* skip if NPIDS != 3 */ | ||
114 | |||
110 | mfspr r7,SPRN_PID1 | 115 | mfspr r7,SPRN_PID1 |
111 | slwi r7,r7,16 | 116 | slwi r7,r7,16 |
112 | or r7,r7,r4 | 117 | or r7,r7,r4 |
@@ -120,7 +125,7 @@ invstr: mflr r6 /* Make it accessible */ | |||
120 | or r7,r7,r4 | 125 | or r7,r7,r4 |
121 | mtspr SPRN_MAS6,r7 | 126 | mtspr SPRN_MAS6,r7 |
122 | tlbsx 0,r6 /* Fall through, we had to match */ | 127 | tlbsx 0,r6 /* Fall through, we had to match */ |
123 | #endif | 128 | |
124 | match_TLB: | 129 | match_TLB: |
125 | mfspr r7,SPRN_MAS0 | 130 | mfspr r7,SPRN_MAS0 |
126 | rlwinm r3,r7,16,20,31 /* Extract MAS0(Entry) */ | 131 | rlwinm r3,r7,16,20,31 /* Extract MAS0(Entry) */ |
@@ -215,14 +220,19 @@ skpinv: addi r6,r6,1 /* Increment */ | |||
215 | 220 | ||
216 | /* 4. Clear out PIDs & Search info */ | 221 | /* 4. Clear out PIDs & Search info */ |
217 | li r6,0 | 222 | li r6,0 |
223 | mtspr SPRN_MAS6,r6 | ||
218 | mtspr SPRN_PID0,r6 | 224 | mtspr SPRN_PID0,r6 |
219 | #ifndef CONFIG_E200 | 225 | |
226 | mfspr r7,SPRN_MMUCFG | ||
227 | rlwinm r7,r7,21,28,31 /* extract MMUCFG[NPIDS] */ | ||
228 | cmpwi r7,3 | ||
229 | bne 2f /* skip if NPIDS != 3 */ | ||
230 | |||
220 | mtspr SPRN_PID1,r6 | 231 | mtspr SPRN_PID1,r6 |
221 | mtspr SPRN_PID2,r6 | 232 | mtspr SPRN_PID2,r6 |
222 | #endif | ||
223 | mtspr SPRN_MAS6,r6 | ||
224 | 233 | ||
225 | /* 5. Invalidate mapping we started in */ | 234 | /* 5. Invalidate mapping we started in */ |
235 | 2: | ||
226 | lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */ | 236 | lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */ |
227 | rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */ | 237 | rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */ |
228 | mtspr SPRN_MAS0,r7 | 238 | mtspr SPRN_MAS0,r7 |
@@ -298,19 +308,7 @@ skpinv: addi r6,r6,1 /* Increment */ | |||
298 | SET_IVOR(12, WatchdogTimer); | 308 | SET_IVOR(12, WatchdogTimer); |
299 | SET_IVOR(13, DataTLBError); | 309 | SET_IVOR(13, DataTLBError); |
300 | SET_IVOR(14, InstructionTLBError); | 310 | SET_IVOR(14, InstructionTLBError); |
301 | SET_IVOR(15, DebugDebug); | ||
302 | #if defined(CONFIG_E500) && !defined(CONFIG_PPC_E500MC) | ||
303 | SET_IVOR(15, DebugCrit); | 311 | SET_IVOR(15, DebugCrit); |
304 | #endif | ||
305 | SET_IVOR(32, SPEUnavailable); | ||
306 | SET_IVOR(33, SPEFloatingPointData); | ||
307 | SET_IVOR(34, SPEFloatingPointRound); | ||
308 | #ifndef CONFIG_E200 | ||
309 | SET_IVOR(35, PerformanceMonitor); | ||
310 | #endif | ||
311 | #ifdef CONFIG_PPC_E500MC | ||
312 | SET_IVOR(36, Doorbell); | ||
313 | #endif | ||
314 | 312 | ||
315 | /* Establish the interrupt vector base */ | 313 | /* Establish the interrupt vector base */ |
316 | lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */ | 314 | lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */ |
@@ -329,12 +327,6 @@ skpinv: addi r6,r6,1 /* Increment */ | |||
329 | oris r2,r2,HID0_DOZE@h | 327 | oris r2,r2,HID0_DOZE@h |
330 | mtspr SPRN_HID0, r2 | 328 | mtspr SPRN_HID0, r2 |
331 | #endif | 329 | #endif |
332 | #ifdef CONFIG_E200 | ||
333 | /* enable dedicated debug exception handling resources (Debug APU) */ | ||
334 | mfspr r2,SPRN_HID0 | ||
335 | ori r2,r2,HID0_DAPUEN@l | ||
336 | mtspr SPRN_HID0,r2 | ||
337 | #endif | ||
338 | 330 | ||
339 | #if !defined(CONFIG_BDI_SWITCH) | 331 | #if !defined(CONFIG_BDI_SWITCH) |
340 | /* | 332 | /* |
@@ -706,15 +698,11 @@ interrupt_base: | |||
706 | /* Performance Monitor */ | 698 | /* Performance Monitor */ |
707 | EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD) | 699 | EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD) |
708 | 700 | ||
709 | #ifdef CONFIG_PPC_E500MC | ||
710 | EXCEPTION(0x2070, Doorbell, unknown_exception, EXC_XFER_STD) | 701 | EXCEPTION(0x2070, Doorbell, unknown_exception, EXC_XFER_STD) |
711 | #endif | ||
712 | 702 | ||
713 | /* Debug Interrupt */ | 703 | /* Debug Interrupt */ |
714 | DEBUG_DEBUG_EXCEPTION | 704 | DEBUG_DEBUG_EXCEPTION |
715 | #if defined(CONFIG_E500) && !defined(CONFIG_PPC_E500MC) | ||
716 | DEBUG_CRIT_EXCEPTION | 705 | DEBUG_CRIT_EXCEPTION |
717 | #endif | ||
718 | 706 | ||
719 | /* | 707 | /* |
720 | * Local functions | 708 | * Local functions |
@@ -897,6 +885,45 @@ KernelSPE: | |||
897 | * Global functions | 885 | * Global functions |
898 | */ | 886 | */ |
899 | 887 | ||
888 | /* Adjust or setup IVORs for e200 */ | ||
889 | _GLOBAL(__setup_e200_ivors) | ||
890 | li r3,DebugDebug@l | ||
891 | mtspr SPRN_IVOR15,r3 | ||
892 | li r3,SPEUnavailable@l | ||
893 | mtspr SPRN_IVOR32,r3 | ||
894 | li r3,SPEFloatingPointData@l | ||
895 | mtspr SPRN_IVOR33,r3 | ||
896 | li r3,SPEFloatingPointRound@l | ||
897 | mtspr SPRN_IVOR34,r3 | ||
898 | sync | ||
899 | blr | ||
900 | |||
901 | /* Adjust or setup IVORs for e500v1/v2 */ | ||
902 | _GLOBAL(__setup_e500_ivors) | ||
903 | li r3,DebugCrit@l | ||
904 | mtspr SPRN_IVOR15,r3 | ||
905 | li r3,SPEUnavailable@l | ||
906 | mtspr SPRN_IVOR32,r3 | ||
907 | li r3,SPEFloatingPointData@l | ||
908 | mtspr SPRN_IVOR33,r3 | ||
909 | li r3,SPEFloatingPointRound@l | ||
910 | mtspr SPRN_IVOR34,r3 | ||
911 | li r3,PerformanceMonitor@l | ||
912 | mtspr SPRN_IVOR35,r3 | ||
913 | sync | ||
914 | blr | ||
915 | |||
916 | /* Adjust or setup IVORs for e500mc */ | ||
917 | _GLOBAL(__setup_e500mc_ivors) | ||
918 | li r3,DebugDebug@l | ||
919 | mtspr SPRN_IVOR15,r3 | ||
920 | li r3,PerformanceMonitor@l | ||
921 | mtspr SPRN_IVOR35,r3 | ||
922 | li r3,Doorbell@l | ||
923 | mtspr SPRN_IVOR36,r3 | ||
924 | sync | ||
925 | blr | ||
926 | |||
900 | /* | 927 | /* |
901 | * extern void loadcam_entry(unsigned int index) | 928 | * extern void loadcam_entry(unsigned int index) |
902 | * | 929 | * |