diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86/kernel/cpu/perf_event_p4.c | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c index 424fc8de68e4..02f072830237 100644 --- a/arch/x86/kernel/cpu/perf_event_p4.c +++ b/arch/x86/kernel/cpu/perf_event_p4.c | |||
@@ -465,15 +465,21 @@ out: | |||
465 | return rc; | 465 | return rc; |
466 | } | 466 | } |
467 | 467 | ||
468 | static inline void p4_pmu_clear_cccr_ovf(struct hw_perf_event *hwc) | 468 | static inline int p4_pmu_clear_cccr_ovf(struct hw_perf_event *hwc) |
469 | { | 469 | { |
470 | unsigned long dummy; | 470 | int overflow = 0; |
471 | u32 low, high; | ||
471 | 472 | ||
472 | rdmsrl(hwc->config_base + hwc->idx, dummy); | 473 | rdmsr(hwc->config_base + hwc->idx, low, high); |
473 | if (dummy & P4_CCCR_OVF) { | 474 | |
475 | /* we need to check high bit for unflagged overflows */ | ||
476 | if ((low & P4_CCCR_OVF) || (high & (1 << 31))) { | ||
477 | overflow = 1; | ||
474 | (void)checking_wrmsrl(hwc->config_base + hwc->idx, | 478 | (void)checking_wrmsrl(hwc->config_base + hwc->idx, |
475 | ((u64)dummy) & ~P4_CCCR_OVF); | 479 | ((u64)low) & ~P4_CCCR_OVF); |
476 | } | 480 | } |
481 | |||
482 | return overflow; | ||
477 | } | 483 | } |
478 | 484 | ||
479 | static inline void p4_pmu_disable_event(struct perf_event *event) | 485 | static inline void p4_pmu_disable_event(struct perf_event *event) |
@@ -584,21 +590,15 @@ static int p4_pmu_handle_irq(struct pt_regs *regs) | |||
584 | 590 | ||
585 | WARN_ON_ONCE(hwc->idx != idx); | 591 | WARN_ON_ONCE(hwc->idx != idx); |
586 | 592 | ||
587 | /* | 593 | /* it might be unflagged overflow */ |
588 | * FIXME: Redundant call, actually not needed | 594 | handled = p4_pmu_clear_cccr_ovf(hwc); |
589 | * but just to check if we're screwed | ||
590 | */ | ||
591 | p4_pmu_clear_cccr_ovf(hwc); | ||
592 | 595 | ||
593 | val = x86_perf_event_update(event); | 596 | val = x86_perf_event_update(event); |
594 | if (val & (1ULL << (x86_pmu.cntval_bits - 1))) | 597 | if (!handled && (val & (1ULL << (x86_pmu.cntval_bits - 1)))) |
595 | continue; | 598 | continue; |
596 | 599 | ||
597 | /* | 600 | /* event overflow for sure */ |
598 | * event overflow | 601 | data.period = event->hw.last_period; |
599 | */ | ||
600 | handled = 1; | ||
601 | data.period = event->hw.last_period; | ||
602 | 602 | ||
603 | if (!x86_perf_event_set_period(event)) | 603 | if (!x86_perf_event_set_period(event)) |
604 | continue; | 604 | continue; |