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-rw-r--r--arch/arm/mach-ixp2000/core.c22
-rw-r--r--arch/arm/mach-ixp2000/enp2611.c6
-rw-r--r--arch/arm/mm/mmu.c50
3 files changed, 42 insertions, 36 deletions
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c
index 27b7480f4afe..9cf2498dc99e 100644
--- a/arch/arm/mach-ixp2000/core.c
+++ b/arch/arm/mach-ixp2000/core.c
@@ -84,59 +84,59 @@ static struct map_desc ixp2000_io_desc[] __initdata = {
84 .virtual = IXP2000_CAP_VIRT_BASE, 84 .virtual = IXP2000_CAP_VIRT_BASE,
85 .pfn = __phys_to_pfn(IXP2000_CAP_PHYS_BASE), 85 .pfn = __phys_to_pfn(IXP2000_CAP_PHYS_BASE),
86 .length = IXP2000_CAP_SIZE, 86 .length = IXP2000_CAP_SIZE,
87 .type = MT_IXP2000_DEVICE, 87 .type = MT_DEVICE_IXP2000,
88 }, { 88 }, {
89 .virtual = IXP2000_INTCTL_VIRT_BASE, 89 .virtual = IXP2000_INTCTL_VIRT_BASE,
90 .pfn = __phys_to_pfn(IXP2000_INTCTL_PHYS_BASE), 90 .pfn = __phys_to_pfn(IXP2000_INTCTL_PHYS_BASE),
91 .length = IXP2000_INTCTL_SIZE, 91 .length = IXP2000_INTCTL_SIZE,
92 .type = MT_IXP2000_DEVICE, 92 .type = MT_DEVICE_IXP2000,
93 }, { 93 }, {
94 .virtual = IXP2000_PCI_CREG_VIRT_BASE, 94 .virtual = IXP2000_PCI_CREG_VIRT_BASE,
95 .pfn = __phys_to_pfn(IXP2000_PCI_CREG_PHYS_BASE), 95 .pfn = __phys_to_pfn(IXP2000_PCI_CREG_PHYS_BASE),
96 .length = IXP2000_PCI_CREG_SIZE, 96 .length = IXP2000_PCI_CREG_SIZE,
97 .type = MT_IXP2000_DEVICE, 97 .type = MT_DEVICE_IXP2000,
98 }, { 98 }, {
99 .virtual = IXP2000_PCI_CSR_VIRT_BASE, 99 .virtual = IXP2000_PCI_CSR_VIRT_BASE,
100 .pfn = __phys_to_pfn(IXP2000_PCI_CSR_PHYS_BASE), 100 .pfn = __phys_to_pfn(IXP2000_PCI_CSR_PHYS_BASE),
101 .length = IXP2000_PCI_CSR_SIZE, 101 .length = IXP2000_PCI_CSR_SIZE,
102 .type = MT_IXP2000_DEVICE, 102 .type = MT_DEVICE_IXP2000,
103 }, { 103 }, {
104 .virtual = IXP2000_MSF_VIRT_BASE, 104 .virtual = IXP2000_MSF_VIRT_BASE,
105 .pfn = __phys_to_pfn(IXP2000_MSF_PHYS_BASE), 105 .pfn = __phys_to_pfn(IXP2000_MSF_PHYS_BASE),
106 .length = IXP2000_MSF_SIZE, 106 .length = IXP2000_MSF_SIZE,
107 .type = MT_IXP2000_DEVICE, 107 .type = MT_DEVICE_IXP2000,
108 }, { 108 }, {
109 .virtual = IXP2000_SCRATCH_RING_VIRT_BASE, 109 .virtual = IXP2000_SCRATCH_RING_VIRT_BASE,
110 .pfn = __phys_to_pfn(IXP2000_SCRATCH_RING_PHYS_BASE), 110 .pfn = __phys_to_pfn(IXP2000_SCRATCH_RING_PHYS_BASE),
111 .length = IXP2000_SCRATCH_RING_SIZE, 111 .length = IXP2000_SCRATCH_RING_SIZE,
112 .type = MT_IXP2000_DEVICE, 112 .type = MT_DEVICE_IXP2000,
113 }, { 113 }, {
114 .virtual = IXP2000_SRAM0_VIRT_BASE, 114 .virtual = IXP2000_SRAM0_VIRT_BASE,
115 .pfn = __phys_to_pfn(IXP2000_SRAM0_PHYS_BASE), 115 .pfn = __phys_to_pfn(IXP2000_SRAM0_PHYS_BASE),
116 .length = IXP2000_SRAM0_SIZE, 116 .length = IXP2000_SRAM0_SIZE,
117 .type = MT_IXP2000_DEVICE, 117 .type = MT_DEVICE_IXP2000,
118 }, { 118 }, {
119 .virtual = IXP2000_PCI_IO_VIRT_BASE, 119 .virtual = IXP2000_PCI_IO_VIRT_BASE,
120 .pfn = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE), 120 .pfn = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE),
121 .length = IXP2000_PCI_IO_SIZE, 121 .length = IXP2000_PCI_IO_SIZE,
122 .type = MT_IXP2000_DEVICE, 122 .type = MT_DEVICE_IXP2000,
123 }, { 123 }, {
124 .virtual = IXP2000_PCI_CFG0_VIRT_BASE, 124 .virtual = IXP2000_PCI_CFG0_VIRT_BASE,
125 .pfn = __phys_to_pfn(IXP2000_PCI_CFG0_PHYS_BASE), 125 .pfn = __phys_to_pfn(IXP2000_PCI_CFG0_PHYS_BASE),
126 .length = IXP2000_PCI_CFG0_SIZE, 126 .length = IXP2000_PCI_CFG0_SIZE,
127 .type = MT_IXP2000_DEVICE, 127 .type = MT_DEVICE_IXP2000,
128 }, { 128 }, {
129 .virtual = IXP2000_PCI_CFG1_VIRT_BASE, 129 .virtual = IXP2000_PCI_CFG1_VIRT_BASE,
130 .pfn = __phys_to_pfn(IXP2000_PCI_CFG1_PHYS_BASE), 130 .pfn = __phys_to_pfn(IXP2000_PCI_CFG1_PHYS_BASE),
131 .length = IXP2000_PCI_CFG1_SIZE, 131 .length = IXP2000_PCI_CFG1_SIZE,
132 .type = MT_IXP2000_DEVICE, 132 .type = MT_DEVICE_IXP2000,
133 } 133 }
134}; 134};
135 135
136void __init ixp2000_map_io(void) 136void __init ixp2000_map_io(void)
137{ 137{
138 /* 138 /*
139 * On IXP2400 CPUs we need to use MT_IXP2000_DEVICE so that 139 * On IXP2400 CPUs we need to use MT_DEVICE_IXP2000 so that
140 * XCB=101 (to avoid triggering erratum #66), and given that 140 * XCB=101 (to avoid triggering erratum #66), and given that
141 * this mode speeds up I/O accesses and we have write buffer 141 * this mode speeds up I/O accesses and we have write buffer
142 * flushes in the right places anyway, it doesn't hurt to use 142 * flushes in the right places anyway, it doesn't hurt to use
diff --git a/arch/arm/mach-ixp2000/enp2611.c b/arch/arm/mach-ixp2000/enp2611.c
index ac29298c5d3f..500e997ba7a4 100644
--- a/arch/arm/mach-ixp2000/enp2611.c
+++ b/arch/arm/mach-ixp2000/enp2611.c
@@ -70,17 +70,17 @@ static struct map_desc enp2611_io_desc[] __initdata = {
70 .virtual = ENP2611_CALEB_VIRT_BASE, 70 .virtual = ENP2611_CALEB_VIRT_BASE,
71 .pfn = __phys_to_pfn(ENP2611_CALEB_PHYS_BASE), 71 .pfn = __phys_to_pfn(ENP2611_CALEB_PHYS_BASE),
72 .length = ENP2611_CALEB_SIZE, 72 .length = ENP2611_CALEB_SIZE,
73 .type = MT_IXP2000_DEVICE, 73 .type = MT_DEVICE_IXP2000,
74 }, { 74 }, {
75 .virtual = ENP2611_PM3386_0_VIRT_BASE, 75 .virtual = ENP2611_PM3386_0_VIRT_BASE,
76 .pfn = __phys_to_pfn(ENP2611_PM3386_0_PHYS_BASE), 76 .pfn = __phys_to_pfn(ENP2611_PM3386_0_PHYS_BASE),
77 .length = ENP2611_PM3386_0_SIZE, 77 .length = ENP2611_PM3386_0_SIZE,
78 .type = MT_IXP2000_DEVICE, 78 .type = MT_DEVICE_IXP2000,
79 }, { 79 }, {
80 .virtual = ENP2611_PM3386_1_VIRT_BASE, 80 .virtual = ENP2611_PM3386_1_VIRT_BASE,
81 .pfn = __phys_to_pfn(ENP2611_PM3386_1_PHYS_BASE), 81 .pfn = __phys_to_pfn(ENP2611_PM3386_1_PHYS_BASE),
82 .length = ENP2611_PM3386_1_SIZE, 82 .length = ENP2611_PM3386_1_SIZE,
83 .type = MT_IXP2000_DEVICE, 83 .type = MT_DEVICE_IXP2000,
84 } 84 }
85}; 85};
86 86
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 44f385a3eb3f..2ba1530d1ce1 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -176,14 +176,35 @@ void adjust_cr(unsigned long mask, unsigned long set)
176} 176}
177#endif 177#endif
178 178
179#define PROT_PTE_DEVICE L_PTE_PRESENT|L_PTE_YOUNG|L_PTE_DIRTY|L_PTE_WRITE
180#define PROT_SECT_DEVICE PMD_TYPE_SECT|PMD_SECT_XN|PMD_SECT_AP_WRITE
181
179static struct mem_type mem_types[] = { 182static struct mem_type mem_types[] = {
180 [MT_DEVICE] = { 183 [MT_DEVICE] = { /* Strongly ordered / ARMv6 shared device */
181 .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | 184 .prot_pte = PROT_PTE_DEVICE,
182 L_PTE_WRITE, 185 .prot_l1 = PMD_TYPE_TABLE,
183 .prot_l1 = PMD_TYPE_TABLE, 186 .prot_sect = PROT_SECT_DEVICE | PMD_SECT_UNCACHED,
184 .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN | PMD_SECT_UNCACHED | 187 .domain = DOMAIN_IO,
185 PMD_SECT_AP_WRITE, 188 },
186 .domain = DOMAIN_IO, 189 [MT_DEVICE_NONSHARED] = { /* ARMv6 non-shared device */
190 .prot_pte = PROT_PTE_DEVICE,
191 .prot_pte_ext = PTE_EXT_TEX(2),
192 .prot_l1 = PMD_TYPE_TABLE,
193 .prot_sect = PROT_SECT_DEVICE | PMD_SECT_TEX(2),
194 .domain = DOMAIN_IO,
195 },
196 [MT_DEVICE_CACHED] = { /* ioremap_cached */
197 .prot_pte = PROT_PTE_DEVICE | L_PTE_CACHEABLE | L_PTE_BUFFERABLE,
198 .prot_l1 = PMD_TYPE_TABLE,
199 .prot_sect = PROT_SECT_DEVICE | PMD_SECT_WB,
200 .domain = DOMAIN_IO,
201 },
202 [MT_DEVICE_IXP2000] = { /* IXP2400 requires XCB=101 for on-chip I/O */
203 .prot_pte = PROT_PTE_DEVICE,
204 .prot_l1 = PMD_TYPE_TABLE,
205 .prot_sect = PROT_SECT_DEVICE | PMD_SECT_BUFFERABLE |
206 PMD_SECT_TEX(1),
207 .domain = DOMAIN_IO,
187 }, 208 },
188 [MT_CACHECLEAN] = { 209 [MT_CACHECLEAN] = {
189 .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN, 210 .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN,
@@ -213,21 +234,6 @@ static struct mem_type mem_types[] = {
213 .prot_sect = PMD_TYPE_SECT, 234 .prot_sect = PMD_TYPE_SECT,
214 .domain = DOMAIN_KERNEL, 235 .domain = DOMAIN_KERNEL,
215 }, 236 },
216 [MT_IXP2000_DEVICE] = { /* IXP2400 requires XCB=101 for on-chip I/O */
217 .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
218 L_PTE_WRITE,
219 .prot_l1 = PMD_TYPE_TABLE,
220 .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN | PMD_SECT_UNCACHED |
221 PMD_SECT_AP_WRITE | PMD_SECT_BUFFERABLE |
222 PMD_SECT_TEX(1),
223 .domain = DOMAIN_IO,
224 },
225 [MT_NONSHARED_DEVICE] = {
226 .prot_l1 = PMD_TYPE_TABLE,
227 .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN | PMD_SECT_NONSHARED_DEV |
228 PMD_SECT_AP_WRITE,
229 .domain = DOMAIN_IO,
230 }
231}; 237};
232 238
233const struct mem_type *get_mem_type(unsigned int type) 239const struct mem_type *get_mem_type(unsigned int type)
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-20 13:38:30 -0500