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-rw-r--r--arch/alpha/Kconfig2
-rw-r--r--arch/alpha/include/asm/atomic.h68
-rw-r--r--arch/alpha/include/asm/cmpxchg.h71
-rw-r--r--arch/alpha/include/asm/rtc.h8
-rw-r--r--arch/alpha/include/asm/xchg.h4
-rw-r--r--arch/alpha/kernel/core_tsunami.c1
-rw-r--r--arch/alpha/kernel/sys_marvel.c2
-rw-r--r--arch/arm/Kconfig9
-rw-r--r--arch/arm/boot/compressed/atags_to_fdt.c2
-rw-r--r--arch/arm/boot/compressed/head.S2
-rw-r--r--arch/arm/boot/dts/at91sam9g20.dtsi1
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi1
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi1
-rw-r--r--arch/arm/boot/dts/db8500.dtsi1
-rw-r--r--arch/arm/boot/dts/highbank.dts1
-rw-r--r--arch/arm/boot/dts/msm8660-surf.dts4
-rw-r--r--arch/arm/boot/dts/versatile-ab.dts2
-rw-r--r--arch/arm/boot/dts/versatile-pb.dts2
-rw-r--r--arch/arm/common/vic.c9
-rw-r--r--arch/arm/configs/imx_v4_v5_defconfig1
-rw-r--r--arch/arm/configs/mini2440_defconfig2
-rw-r--r--arch/arm/configs/u8500_defconfig9
-rw-r--r--arch/arm/include/asm/jump_label.h2
-rw-r--r--arch/arm/include/asm/thread_info.h7
-rw-r--r--arch/arm/include/asm/tls.h4
-rw-r--r--arch/arm/kernel/irq.c6
-rw-r--r--arch/arm/kernel/ptrace.c24
-rw-r--r--arch/arm/kernel/setup.c16
-rw-r--r--arch/arm/kernel/signal.c55
-rw-r--r--arch/arm/kernel/smp.c32
-rw-r--r--arch/arm/kernel/sys_arm.c2
-rw-r--r--arch/arm/mach-at91/at91rm9200_devices.c1
-rw-r--r--arch/arm/mach-at91/at91rm9200_time.c2
-rw-r--r--arch/arm/mach-at91/board-rm9200ek.c2
-rw-r--r--arch/arm/mach-at91/board-sam9261ek.c5
-rw-r--r--arch/arm/mach-at91/clock.c1
-rw-r--r--arch/arm/mach-at91/include/mach/at91_pmc.h2
-rw-r--r--arch/arm/mach-at91/setup.c2
-rw-r--r--arch/arm/mach-bcmring/core.c4
-rw-r--r--arch/arm/mach-exynos/Kconfig5
-rw-r--r--arch/arm/mach-exynos/clock-exynos4.c24
-rw-r--r--arch/arm/mach-exynos/clock-exynos5.c26
-rw-r--r--arch/arm/mach-exynos/common.c14
-rw-r--r--arch/arm/mach-exynos/dev-dwmci.c13
-rw-r--r--arch/arm/mach-exynos/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-exynos/include/mach/map.h4
-rw-r--r--arch/arm/mach-exynos/include/mach/regs-clock.h6
-rw-r--r--arch/arm/mach-exynos/mach-exynos5-dt.c2
-rw-r--r--arch/arm/mach-exynos/mach-nuri.c47
-rw-r--r--arch/arm/mach-exynos/mach-universal_c210.c7
-rw-r--r--arch/arm/mach-imx/imx27-dt.c6
-rw-r--r--arch/arm/mach-imx/mm-imx5.c2
-rw-r--r--arch/arm/mach-kirkwood/board-dt.c1
-rw-r--r--arch/arm/mach-msm/board-halibut.c3
-rw-r--r--arch/arm/mach-msm/board-msm8x60.c25
-rw-r--r--arch/arm/mach-msm/board-trout-panel.c1
-rw-r--r--arch/arm/mach-msm/board-trout.c1
-rw-r--r--arch/arm/mach-msm/proc_comm.c2
-rw-r--r--arch/arm/mach-omap1/ams-delta-fiq.c2
-rw-r--r--arch/arm/mach-omap1/mux.c1
-rw-r--r--arch/arm/mach-omap1/timer.c4
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c12
-rw-r--r--arch/arm/mach-omap2/board-generic.c2
-rw-r--r--arch/arm/mach-omap2/board-igep0020.c2
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c13
-rw-r--r--arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c80
-rw-r--r--arch/arm/mach-omap2/clock.c5
-rw-r--r--arch/arm/mach-omap2/clock.h8
-rw-r--r--arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h8
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c17
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2420_data.c1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2430_data.c1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c9
-rw-r--r--arch/arm/mach-omap2/serial.c124
-rw-r--r--arch/arm/mach-omap2/twl-common.c37
-rw-r--r--arch/arm/mach-omap2/twl-common.h10
-rw-r--r--arch/arm/mach-orion5x/mpp.h4
-rw-r--r--arch/arm/mach-prima2/irq.c6
-rw-r--r--arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h7
-rw-r--r--arch/arm/mach-pxa/mfp-pxa2xx.c21
-rw-r--r--arch/arm/mach-pxa/pxa27x.c6
-rw-r--r--arch/arm/mach-s3c24xx/Kconfig8
-rw-r--r--arch/arm/mach-s5pv210/dma.c2
-rw-r--r--arch/arm/mach-s5pv210/mach-aquila.c4
-rw-r--r--arch/arm/mach-s5pv210/mach-goni.c6
-rw-r--r--arch/arm/mach-sa1100/generic.c2
-rw-r--r--arch/arm/mach-shmobile/board-ag5evm.c22
-rw-r--r--arch/arm/mach-shmobile/board-mackerel.c22
-rw-r--r--arch/arm/mach-shmobile/headsmp.S56
-rw-r--r--arch/arm/mach-shmobile/include/mach/common.h2
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7779.c4
-rw-r--r--arch/arm/mach-shmobile/setup-sh73a0.c4
-rw-r--r--arch/arm/mach-shmobile/smp-r8a7779.c8
-rw-r--r--arch/arm/mach-shmobile/smp-sh73a0.c7
-rw-r--r--arch/arm/mach-shmobile/timer.c9
-rw-r--r--arch/arm/mach-tegra/flowctrl.c4
-rw-r--r--arch/arm/mach-u300/core.c6
-rw-r--r--arch/arm/mach-u300/i2c.c9
-rw-r--r--arch/arm/mach-u300/include/mach/irqs.h150
-rw-r--r--arch/arm/mach-ux500/Kconfig1
-rw-r--r--arch/arm/mach-ux500/mbox-db5500.c2
-rw-r--r--arch/arm/mach-ux500/platsmp.c2
-rw-r--r--arch/arm/mm/Kconfig2
-rw-r--r--arch/arm/mm/abort-ev6.S17
-rw-r--r--arch/arm/mm/cache-l2x0.c25
-rw-r--r--arch/arm/mm/fault.c6
-rw-r--r--arch/arm/mm/init.c4
-rw-r--r--arch/arm/mm/mmu.c7
-rw-r--r--arch/arm/mm/nommu.c2
-rw-r--r--arch/arm/mm/proc-v7.S12
-rw-r--r--arch/arm/plat-omap/clock.c26
-rw-r--r--arch/arm/plat-omap/dma.c14
-rw-r--r--arch/arm/plat-omap/include/plat/clock.h10
-rw-r--r--arch/arm/plat-omap/include/plat/omap_hwmod.h4
-rw-r--r--arch/arm/plat-omap/sram.c12
-rw-r--r--arch/arm/plat-samsung/Kconfig1
-rw-r--r--arch/arm/plat-samsung/include/plat/sdhci.h28
-rw-r--r--arch/arm/vfp/vfpmodule.c99
-rw-r--r--arch/blackfin/mach-bf538/boards/ezkit.c53
-rw-r--r--arch/c6x/include/asm/irq.h4
-rw-r--r--arch/c6x/kernel/irq.c13
-rw-r--r--arch/frv/include/asm/processor.h4
-rw-r--r--arch/hexagon/kernel/dma.c1
-rw-r--r--arch/hexagon/kernel/process.c6
-rw-r--r--arch/hexagon/kernel/ptrace.c1
-rw-r--r--arch/hexagon/kernel/smp.c8
-rw-r--r--arch/hexagon/kernel/time.c1
-rw-r--r--arch/hexagon/kernel/vdso.c1
-rw-r--r--arch/ia64/include/asm/cmpxchg.h148
-rw-r--r--arch/ia64/include/asm/futex.h9
-rw-r--r--arch/ia64/include/asm/intrinsics.h114
-rw-r--r--arch/ia64/kernel/perfmon.c18
-rw-r--r--arch/ia64/kvm/kvm-ia64.c2
-rw-r--r--arch/m68k/configs/m5275evb_defconfig1
-rw-r--r--arch/m68k/platform/520x/config.c6
-rw-r--r--arch/m68k/platform/523x/config.c6
-rw-r--r--arch/m68k/platform/5249/config.c6
-rw-r--r--arch/m68k/platform/527x/config.c8
-rw-r--r--arch/m68k/platform/528x/config.c6
-rw-r--r--arch/m68k/platform/532x/config.c6
-rw-r--r--arch/m68k/platform/68EZ328/Makefile6
-rw-r--r--arch/m68k/platform/68VZ328/Makefile9
-rw-r--r--arch/m68k/platform/68VZ328/bootlogo.h (renamed from arch/m68k/platform/68EZ328/bootlogo.h)2
-rw-r--r--arch/m68k/platform/coldfire/device.c8
-rw-r--r--arch/mips/ath79/dev-wmac.c2
-rw-r--r--arch/mips/include/asm/mach-jz4740/irq.h2
-rw-r--r--arch/mips/include/asm/mmu_context.h6
-rw-r--r--arch/mips/kernel/signal.c27
-rw-r--r--arch/mips/kernel/signal32.c20
-rw-r--r--arch/mips/kernel/signal_n32.c10
-rw-r--r--arch/mn10300/kernel/smp.c9
-rw-r--r--arch/parisc/include/asm/hardware.h3
-rw-r--r--arch/parisc/include/asm/page.h6
-rw-r--r--arch/parisc/include/asm/pdc.h7
-rw-r--r--arch/parisc/include/asm/pgtable.h2
-rw-r--r--arch/parisc/include/asm/prefetch.h7
-rw-r--r--arch/parisc/include/asm/spinlock.h2
-rw-r--r--arch/parisc/kernel/entry.S4
-rw-r--r--arch/parisc/kernel/pacache.S38
-rw-r--r--arch/parisc/kernel/pdc_cons.c3
-rw-r--r--arch/parisc/kernel/smp.c8
-rw-r--r--arch/parisc/kernel/time.c1
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-mpic-message-B.dtsi43
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi10
-rw-r--r--arch/powerpc/include/asm/exception-64s.h7
-rw-r--r--arch/powerpc/include/asm/irq.h6
-rw-r--r--arch/powerpc/include/asm/kvm_book3s.h7
-rw-r--r--arch/powerpc/include/asm/mpic.h18
-rw-r--r--arch/powerpc/include/asm/mpic_msgr.h1
-rw-r--r--arch/powerpc/include/asm/reg_booke.h5
-rw-r--r--arch/powerpc/kernel/entry_32.S39
-rw-r--r--arch/powerpc/kernel/entry_64.S62
-rw-r--r--arch/powerpc/kernel/exceptions-64s.S2
-rw-r--r--arch/powerpc/kernel/irq.c33
-rw-r--r--arch/powerpc/kernel/machine_kexec.c7
-rw-r--r--arch/powerpc/kernel/process.c4
-rw-r--r--arch/powerpc/kernel/setup_32.c3
-rw-r--r--arch/powerpc/kernel/traps.c10
-rw-r--r--arch/powerpc/kvm/book3s_64_mmu_host.c13
-rw-r--r--arch/powerpc/kvm/book3s_64_mmu_hv.c22
-rw-r--r--arch/powerpc/kvm/book3s_hv.c2
-rw-r--r--arch/powerpc/kvm/book3s_hv_rm_mmu.c1
-rw-r--r--arch/powerpc/kvm/book3s_segment.S42
-rw-r--r--arch/powerpc/net/bpf_jit.h8
-rw-r--r--arch/powerpc/net/bpf_jit_64.S108
-rw-r--r--arch/powerpc/net/bpf_jit_comp.c26
-rw-r--r--arch/powerpc/platforms/85xx/common.c6
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_mds.c11
-rw-r--r--arch/powerpc/platforms/85xx/p1022_ds.c13
-rw-r--r--arch/powerpc/platforms/cell/axon_msi.c8
-rw-r--r--arch/powerpc/platforms/cell/beat_interrupt.c4
-rw-r--r--arch/powerpc/platforms/powermac/low_i2c.c9
-rw-r--r--arch/powerpc/platforms/powermac/pic.c6
-rw-r--r--arch/powerpc/platforms/powermac/smp.c2
-rw-r--r--arch/powerpc/platforms/ps3/interrupt.c3
-rw-r--r--arch/powerpc/platforms/pseries/Kconfig4
-rw-r--r--arch/powerpc/platforms/pseries/eeh.c2
-rw-r--r--arch/powerpc/sysdev/cpm2_pic.c3
-rw-r--r--arch/powerpc/sysdev/mpc8xx_pic.c61
-rw-r--r--arch/powerpc/sysdev/mpic.c54
-rw-r--r--arch/powerpc/sysdev/mpic_msgr.c12
-rw-r--r--arch/powerpc/sysdev/scom.c1
-rw-r--r--arch/powerpc/sysdev/xics/xics-common.c7
-rw-r--r--arch/s390/Kconfig1
-rw-r--r--arch/s390/defconfig37
-rw-r--r--arch/s390/include/asm/facility.h3
-rw-r--r--arch/s390/include/asm/pgalloc.h3
-rw-r--r--arch/s390/include/asm/swab.h2
-rw-r--r--arch/s390/include/asm/tlb.h22
-rw-r--r--arch/s390/kernel/head.S2
-rw-r--r--arch/s390/kernel/irq.c9
-rw-r--r--arch/s390/kernel/perf_cpum_cf.c4
-rw-r--r--arch/s390/mm/maccess.c27
-rw-r--r--arch/s390/mm/pgtable.c63
-rw-r--r--arch/sh/include/asm/atomic.h2
-rw-r--r--arch/sh/mm/fault_32.c2
-rw-r--r--arch/sparc/kernel/central.c2
-rw-r--r--arch/sparc/kernel/ds.c2
-rw-r--r--arch/sparc/kernel/leon_pci.c13
-rw-r--r--arch/sparc/kernel/leon_smp.c3
-rw-r--r--arch/sparc/kernel/rtrap_64.S7
-rw-r--r--arch/sparc/kernel/sys_sparc_64.c7
-rw-r--r--arch/sparc/mm/fault_32.c37
-rw-r--r--arch/sparc/mm/fault_64.c37
-rw-r--r--arch/sparc/mm/ultra.S6
-rw-r--r--arch/tile/Kconfig1
-rw-r--r--arch/tile/include/asm/pci.h4
-rw-r--r--arch/tile/include/asm/thread_info.h9
-rw-r--r--arch/tile/kernel/compat_signal.c12
-rw-r--r--arch/tile/kernel/intvec_32.S41
-rw-r--r--arch/tile/kernel/intvec_64.S38
-rw-r--r--arch/tile/kernel/pci.c4
-rw-r--r--arch/tile/kernel/proc.c4
-rw-r--r--arch/tile/kernel/process.c7
-rw-r--r--arch/tile/kernel/single_step.c4
-rw-r--r--arch/tile/kernel/smpboot.c2
-rw-r--r--arch/um/drivers/cow.h35
-rw-r--r--arch/um/drivers/cow_user.c43
-rw-r--r--arch/um/drivers/mconsole_kern.c1
-rw-r--r--arch/um/include/asm/Kbuild3
-rw-r--r--arch/um/kernel/Makefile7
-rw-r--r--arch/um/kernel/process.c6
-rw-r--r--arch/um/kernel/skas/mmu.c1
-rw-r--r--arch/x86/Kconfig2
-rw-r--r--arch/x86/Makefile3
-rw-r--r--arch/x86/Makefile.um3
-rw-r--r--arch/x86/boot/compressed/Makefile9
-rw-r--r--arch/x86/boot/compressed/head_32.S14
-rw-r--r--arch/x86/boot/compressed/head_64.S22
-rw-r--r--arch/x86/boot/tools/build.c15
-rw-r--r--arch/x86/ia32/ia32_aout.c35
-rw-r--r--arch/x86/include/asm/cmpxchg.h4
-rw-r--r--arch/x86/include/asm/kvm_para.h3
-rw-r--r--arch/x86/include/asm/posix_types.h6
-rw-r--r--arch/x86/include/asm/sigcontext.h2
-rw-r--r--arch/x86/include/asm/siginfo.h8
-rw-r--r--arch/x86/include/asm/uaccess.h2
-rw-r--r--arch/x86/include/asm/uaccess_32.h5
-rw-r--r--arch/x86/include/asm/uaccess_64.h4
-rw-r--r--arch/x86/include/asm/unistd.h6
-rw-r--r--arch/x86/include/asm/word-at-a-time.h33
-rw-r--r--arch/x86/include/asm/x86_init.h1
-rw-r--r--arch/x86/kernel/acpi/boot.c2
-rw-r--r--arch/x86/kernel/acpi/sleep.c4
-rw-r--r--arch/x86/kernel/acpi/sleep.h4
-rw-r--r--arch/x86/kernel/acpi/wakeup_32.S4
-rw-r--r--arch/x86/kernel/acpi/wakeup_64.S4
-rw-r--r--arch/x86/kernel/apic/apic.c34
-rw-r--r--arch/x86/kernel/apic/apic_numachip.c7
-rw-r--r--arch/x86/kernel/apic/x2apic_phys.c6
-rw-r--r--arch/x86/kernel/cpu/amd.c29
-rw-r--r--arch/x86/kernel/cpu/common.c9
-rw-r--r--arch/x86/kernel/cpu/intel_cacheinfo.c8
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce.c14
-rw-r--r--arch/x86/kernel/i387.c1
-rw-r--r--arch/x86/kernel/kvm.c9
-rw-r--r--arch/x86/kernel/microcode_amd.c12
-rw-r--r--arch/x86/kernel/microcode_core.c10
-rw-r--r--arch/x86/kernel/microcode_intel.c14
-rw-r--r--arch/x86/kernel/process_64.c1
-rw-r--r--arch/x86/kernel/setup_percpu.c14
-rw-r--r--arch/x86/kernel/vsyscall_64.c6
-rw-r--r--arch/x86/kernel/x86_init.c1
-rw-r--r--arch/x86/kvm/pmu.c18
-rw-r--r--arch/x86/kvm/vmx.c5
-rw-r--r--arch/x86/kvm/x86.c9
-rw-r--r--arch/x86/lib/insn.c53
-rw-r--r--arch/x86/lib/usercopy.c103
-rw-r--r--arch/x86/lib/usercopy_32.c87
-rw-r--r--arch/x86/lib/usercopy_64.c49
-rw-r--r--arch/x86/platform/geode/net5501.c2
-rw-r--r--arch/x86/platform/mrst/mrst.c4
-rw-r--r--arch/x86/tools/.gitignore1
-rw-r--r--arch/x86/tools/Makefile4
-rw-r--r--arch/x86/tools/relocs.c (renamed from arch/x86/boot/compressed/relocs.c)244
-rw-r--r--arch/x86/um/asm/barrier.h75
-rw-r--r--arch/x86/um/asm/system.h135
-rw-r--r--arch/x86/xen/enlighten.c46
-rw-r--r--arch/x86/xen/mmu.c7
-rw-r--r--arch/x86/xen/smp.c15
-rw-r--r--arch/x86/xen/xen-asm.S2
-rw-r--r--arch/xtensa/include/asm/hardirq.h3
-rw-r--r--arch/xtensa/include/asm/io.h1
-rw-r--r--arch/xtensa/kernel/signal.c1
305 files changed, 2478 insertions, 2099 deletions
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index 56a4df952fb0..22e58a99f38b 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -477,7 +477,7 @@ config ALPHA_BROKEN_IRQ_MASK
477 477
478config VGA_HOSE 478config VGA_HOSE
479 bool 479 bool
480 depends on ALPHA_GENERIC || ALPHA_TITAN || ALPHA_MARVEL || ALPHA_TSUNAMI 480 depends on VGA_CONSOLE && (ALPHA_GENERIC || ALPHA_TITAN || ALPHA_MARVEL || ALPHA_TSUNAMI)
481 default y 481 default y
482 help 482 help
483 Support VGA on an arbitrary hose; needed for several platforms 483 Support VGA on an arbitrary hose; needed for several platforms
diff --git a/arch/alpha/include/asm/atomic.h b/arch/alpha/include/asm/atomic.h
index f62251e82ffa..3bb7ffeae3bc 100644
--- a/arch/alpha/include/asm/atomic.h
+++ b/arch/alpha/include/asm/atomic.h
@@ -3,6 +3,7 @@
3 3
4#include <linux/types.h> 4#include <linux/types.h>
5#include <asm/barrier.h> 5#include <asm/barrier.h>
6#include <asm/cmpxchg.h>
6 7
7/* 8/*
8 * Atomic operations that C can't guarantee us. Useful for 9 * Atomic operations that C can't guarantee us. Useful for
@@ -168,73 +169,6 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
168 return result; 169 return result;
169} 170}
170 171
171/*
172 * Atomic exchange routines.
173 */
174
175#define __ASM__MB
176#define ____xchg(type, args...) __xchg ## type ## _local(args)
177#define ____cmpxchg(type, args...) __cmpxchg ## type ## _local(args)
178#include <asm/xchg.h>
179
180#define xchg_local(ptr,x) \
181 ({ \
182 __typeof__(*(ptr)) _x_ = (x); \
183 (__typeof__(*(ptr))) __xchg_local((ptr), (unsigned long)_x_, \
184 sizeof(*(ptr))); \
185 })
186
187#define cmpxchg_local(ptr, o, n) \
188 ({ \
189 __typeof__(*(ptr)) _o_ = (o); \
190 __typeof__(*(ptr)) _n_ = (n); \
191 (__typeof__(*(ptr))) __cmpxchg_local((ptr), (unsigned long)_o_, \
192 (unsigned long)_n_, \
193 sizeof(*(ptr))); \
194 })
195
196#define cmpxchg64_local(ptr, o, n) \
197 ({ \
198 BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
199 cmpxchg_local((ptr), (o), (n)); \
200 })
201
202#ifdef CONFIG_SMP
203#undef __ASM__MB
204#define __ASM__MB "\tmb\n"
205#endif
206#undef ____xchg
207#undef ____cmpxchg
208#define ____xchg(type, args...) __xchg ##type(args)
209#define ____cmpxchg(type, args...) __cmpxchg ##type(args)
210#include <asm/xchg.h>
211
212#define xchg(ptr,x) \
213 ({ \
214 __typeof__(*(ptr)) _x_ = (x); \
215 (__typeof__(*(ptr))) __xchg((ptr), (unsigned long)_x_, \
216 sizeof(*(ptr))); \
217 })
218
219#define cmpxchg(ptr, o, n) \
220 ({ \
221 __typeof__(*(ptr)) _o_ = (o); \
222 __typeof__(*(ptr)) _n_ = (n); \
223 (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
224 (unsigned long)_n_, sizeof(*(ptr)));\
225 })
226
227#define cmpxchg64(ptr, o, n) \
228 ({ \
229 BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
230 cmpxchg((ptr), (o), (n)); \
231 })
232
233#undef __ASM__MB
234#undef ____cmpxchg
235
236#define __HAVE_ARCH_CMPXCHG 1
237
238#define atomic64_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), old, new)) 172#define atomic64_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), old, new))
239#define atomic64_xchg(v, new) (xchg(&((v)->counter), new)) 173#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
240 174
diff --git a/arch/alpha/include/asm/cmpxchg.h b/arch/alpha/include/asm/cmpxchg.h
new file mode 100644
index 000000000000..429e8cd0d78e
--- /dev/null
+++ b/arch/alpha/include/asm/cmpxchg.h
@@ -0,0 +1,71 @@
1#ifndef _ALPHA_CMPXCHG_H
2#define _ALPHA_CMPXCHG_H
3
4/*
5 * Atomic exchange routines.
6 */
7
8#define __ASM__MB
9#define ____xchg(type, args...) __xchg ## type ## _local(args)
10#define ____cmpxchg(type, args...) __cmpxchg ## type ## _local(args)
11#include <asm/xchg.h>
12
13#define xchg_local(ptr, x) \
14({ \
15 __typeof__(*(ptr)) _x_ = (x); \
16 (__typeof__(*(ptr))) __xchg_local((ptr), (unsigned long)_x_, \
17 sizeof(*(ptr))); \
18})
19
20#define cmpxchg_local(ptr, o, n) \
21({ \
22 __typeof__(*(ptr)) _o_ = (o); \
23 __typeof__(*(ptr)) _n_ = (n); \
24 (__typeof__(*(ptr))) __cmpxchg_local((ptr), (unsigned long)_o_, \
25 (unsigned long)_n_, \
26 sizeof(*(ptr))); \
27})
28
29#define cmpxchg64_local(ptr, o, n) \
30({ \
31 BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
32 cmpxchg_local((ptr), (o), (n)); \
33})
34
35#ifdef CONFIG_SMP
36#undef __ASM__MB
37#define __ASM__MB "\tmb\n"
38#endif
39#undef ____xchg
40#undef ____cmpxchg
41#define ____xchg(type, args...) __xchg ##type(args)
42#define ____cmpxchg(type, args...) __cmpxchg ##type(args)
43#include <asm/xchg.h>
44
45#define xchg(ptr, x) \
46({ \
47 __typeof__(*(ptr)) _x_ = (x); \
48 (__typeof__(*(ptr))) __xchg((ptr), (unsigned long)_x_, \
49 sizeof(*(ptr))); \
50})
51
52#define cmpxchg(ptr, o, n) \
53({ \
54 __typeof__(*(ptr)) _o_ = (o); \
55 __typeof__(*(ptr)) _n_ = (n); \
56 (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
57 (unsigned long)_n_, sizeof(*(ptr)));\
58})
59
60#define cmpxchg64(ptr, o, n) \
61({ \
62 BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
63 cmpxchg((ptr), (o), (n)); \
64})
65
66#undef __ASM__MB
67#undef ____cmpxchg
68
69#define __HAVE_ARCH_CMPXCHG 1
70
71#endif /* _ALPHA_CMPXCHG_H */
diff --git a/arch/alpha/include/asm/rtc.h b/arch/alpha/include/asm/rtc.h
index 1f7fba671ae6..d70408d36677 100644
--- a/arch/alpha/include/asm/rtc.h
+++ b/arch/alpha/include/asm/rtc.h
@@ -1,14 +1,10 @@
1#ifndef _ALPHA_RTC_H 1#ifndef _ALPHA_RTC_H
2#define _ALPHA_RTC_H 2#define _ALPHA_RTC_H
3 3
4#if defined(CONFIG_ALPHA_GENERIC) 4#if defined(CONFIG_ALPHA_MARVEL) && defined(CONFIG_SMP) \
5 || defined(CONFIG_ALPHA_GENERIC)
5# define get_rtc_time alpha_mv.rtc_get_time 6# define get_rtc_time alpha_mv.rtc_get_time
6# define set_rtc_time alpha_mv.rtc_set_time 7# define set_rtc_time alpha_mv.rtc_set_time
7#else
8# if defined(CONFIG_ALPHA_MARVEL) && defined(CONFIG_SMP)
9# define get_rtc_time marvel_get_rtc_time
10# define set_rtc_time marvel_set_rtc_time
11# endif
12#endif 8#endif
13 9
14#include <asm-generic/rtc.h> 10#include <asm-generic/rtc.h>
diff --git a/arch/alpha/include/asm/xchg.h b/arch/alpha/include/asm/xchg.h
index 1d1b436fbff2..0ca9724597c1 100644
--- a/arch/alpha/include/asm/xchg.h
+++ b/arch/alpha/include/asm/xchg.h
@@ -1,10 +1,10 @@
1#ifndef _ALPHA_ATOMIC_H 1#ifndef _ALPHA_CMPXCHG_H
2#error Do not include xchg.h directly! 2#error Do not include xchg.h directly!
3#else 3#else
4/* 4/*
5 * xchg/xchg_local and cmpxchg/cmpxchg_local share the same code 5 * xchg/xchg_local and cmpxchg/cmpxchg_local share the same code
6 * except that local version do not have the expensive memory barrier. 6 * except that local version do not have the expensive memory barrier.
7 * So this file is included twice from asm/system.h. 7 * So this file is included twice from asm/cmpxchg.h.
8 */ 8 */
9 9
10/* 10/*
diff --git a/arch/alpha/kernel/core_tsunami.c b/arch/alpha/kernel/core_tsunami.c
index 5e7c28f92f19..61893d7bdda5 100644
--- a/arch/alpha/kernel/core_tsunami.c
+++ b/arch/alpha/kernel/core_tsunami.c
@@ -11,6 +11,7 @@
11#include <asm/core_tsunami.h> 11#include <asm/core_tsunami.h>
12#undef __EXTERN_INLINE 12#undef __EXTERN_INLINE
13 13
14#include <linux/module.h>
14#include <linux/types.h> 15#include <linux/types.h>
15#include <linux/pci.h> 16#include <linux/pci.h>
16#include <linux/sched.h> 17#include <linux/sched.h>
diff --git a/arch/alpha/kernel/sys_marvel.c b/arch/alpha/kernel/sys_marvel.c
index 14a4b6a7cf59..407accc80877 100644
--- a/arch/alpha/kernel/sys_marvel.c
+++ b/arch/alpha/kernel/sys_marvel.c
@@ -317,7 +317,7 @@ marvel_init_irq(void)
317} 317}
318 318
319static int 319static int
320marvel_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 320marvel_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
321{ 321{
322 struct pci_controller *hose = dev->sysdata; 322 struct pci_controller *hose = dev->sysdata;
323 struct io7_port *io7_port = hose->sysdata; 323 struct io7_port *io7_port = hose->sysdata;
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index cf006d40342c..36586dba6fa6 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1186,6 +1186,15 @@ if !MMU
1186source "arch/arm/Kconfig-nommu" 1186source "arch/arm/Kconfig-nommu"
1187endif 1187endif
1188 1188
1189config ARM_ERRATA_326103
1190 bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1191 depends on CPU_V6
1192 help
1193 Executing a SWP instruction to read-only memory does not set bit 11
1194 of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1195 treat the access as a read, preventing a COW from occurring and
1196 causing the faulting task to livelock.
1197
1189config ARM_ERRATA_411920 1198config ARM_ERRATA_411920
1190 bool "ARM errata: Invalidation of the Instruction Cache operation can fail" 1199 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1191 depends on CPU_V6 || CPU_V6K 1200 depends on CPU_V6 || CPU_V6K
diff --git a/arch/arm/boot/compressed/atags_to_fdt.c b/arch/arm/boot/compressed/atags_to_fdt.c
index 6ce11c481178..797f04bedb47 100644
--- a/arch/arm/boot/compressed/atags_to_fdt.c
+++ b/arch/arm/boot/compressed/atags_to_fdt.c
@@ -77,6 +77,8 @@ int atags_to_fdt(void *atag_list, void *fdt, int total_space)
77 } else if (atag->hdr.tag == ATAG_MEM) { 77 } else if (atag->hdr.tag == ATAG_MEM) {
78 if (memcount >= sizeof(mem_reg_property)/4) 78 if (memcount >= sizeof(mem_reg_property)/4)
79 continue; 79 continue;
80 if (!atag->u.mem.size)
81 continue;
80 mem_reg_property[memcount++] = cpu_to_fdt32(atag->u.mem.start); 82 mem_reg_property[memcount++] = cpu_to_fdt32(atag->u.mem.start);
81 mem_reg_property[memcount++] = cpu_to_fdt32(atag->u.mem.size); 83 mem_reg_property[memcount++] = cpu_to_fdt32(atag->u.mem.size);
82 } else if (atag->hdr.tag == ATAG_INITRD2) { 84 } else if (atag->hdr.tag == ATAG_INITRD2) {
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 5f6045f1766c..dc7e8ce8e6be 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -273,7 +273,7 @@ restart: adr r0, LC0
273 add r0, r0, #0x100 273 add r0, r0, #0x100
274 mov r1, r6 274 mov r1, r6
275 sub r2, sp, r6 275 sub r2, sp, r6
276 blne atags_to_fdt 276 bleq atags_to_fdt
277 277
278 ldmfd sp!, {r0-r3, ip, lr} 278 ldmfd sp!, {r0-r3, ip, lr}
279 sub sp, sp, #0x10000 279 sub sp, sp, #0x10000
diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi b/arch/arm/boot/dts/at91sam9g20.dtsi
index 799ad1889b51..773ef484037a 100644
--- a/arch/arm/boot/dts/at91sam9g20.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20.dtsi
@@ -55,7 +55,6 @@
55 #interrupt-cells = <2>; 55 #interrupt-cells = <2>;
56 compatible = "atmel,at91rm9200-aic"; 56 compatible = "atmel,at91rm9200-aic";
57 interrupt-controller; 57 interrupt-controller;
58 interrupt-parent;
59 reg = <0xfffff000 0x200>; 58 reg = <0xfffff000 0x200>;
60 }; 59 };
61 60
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 9e6eb6ecea0e..c8042147eaa2 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -56,7 +56,6 @@
56 #interrupt-cells = <2>; 56 #interrupt-cells = <2>;
57 compatible = "atmel,at91rm9200-aic"; 57 compatible = "atmel,at91rm9200-aic";
58 interrupt-controller; 58 interrupt-controller;
59 interrupt-parent;
60 reg = <0xfffff000 0x200>; 59 reg = <0xfffff000 0x200>;
61 }; 60 };
62 61
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 70ab3a4e026f..dd4ed748469a 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -54,7 +54,6 @@
54 #interrupt-cells = <2>; 54 #interrupt-cells = <2>;
55 compatible = "atmel,at91rm9200-aic"; 55 compatible = "atmel,at91rm9200-aic";
56 interrupt-controller; 56 interrupt-controller;
57 interrupt-parent;
58 reg = <0xfffff000 0x200>; 57 reg = <0xfffff000 0x200>;
59 }; 58 };
60 59
diff --git a/arch/arm/boot/dts/db8500.dtsi b/arch/arm/boot/dts/db8500.dtsi
index d73dce645667..14bc30705099 100644
--- a/arch/arm/boot/dts/db8500.dtsi
+++ b/arch/arm/boot/dts/db8500.dtsi
@@ -24,7 +24,6 @@
24 #interrupt-cells = <3>; 24 #interrupt-cells = <3>;
25 #address-cells = <1>; 25 #address-cells = <1>;
26 interrupt-controller; 26 interrupt-controller;
27 interrupt-parent;
28 reg = <0xa0411000 0x1000>, 27 reg = <0xa0411000 0x1000>,
29 <0xa0410100 0x100>; 28 <0xa0410100 0x100>;
30 }; 29 };
diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts
index 37c0ff9c8b90..83e72294aefb 100644
--- a/arch/arm/boot/dts/highbank.dts
+++ b/arch/arm/boot/dts/highbank.dts
@@ -89,7 +89,6 @@
89 #size-cells = <0>; 89 #size-cells = <0>;
90 #address-cells = <1>; 90 #address-cells = <1>;
91 interrupt-controller; 91 interrupt-controller;
92 interrupt-parent;
93 reg = <0xfff11000 0x1000>, 92 reg = <0xfff11000 0x1000>,
94 <0xfff10100 0x100>; 93 <0xfff10100 0x100>;
95 }; 94 };
diff --git a/arch/arm/boot/dts/msm8660-surf.dts b/arch/arm/boot/dts/msm8660-surf.dts
index 15ded0deaa79..45bc4bb04e57 100644
--- a/arch/arm/boot/dts/msm8660-surf.dts
+++ b/arch/arm/boot/dts/msm8660-surf.dts
@@ -10,7 +10,7 @@
10 intc: interrupt-controller@02080000 { 10 intc: interrupt-controller@02080000 {
11 compatible = "qcom,msm-8660-qgic"; 11 compatible = "qcom,msm-8660-qgic";
12 interrupt-controller; 12 interrupt-controller;
13 #interrupt-cells = <1>; 13 #interrupt-cells = <3>;
14 reg = < 0x02080000 0x1000 >, 14 reg = < 0x02080000 0x1000 >,
15 < 0x02081000 0x1000 >; 15 < 0x02081000 0x1000 >;
16 }; 16 };
@@ -19,6 +19,6 @@
19 compatible = "qcom,msm-hsuart", "qcom,msm-uart"; 19 compatible = "qcom,msm-hsuart", "qcom,msm-uart";
20 reg = <0x19c40000 0x1000>, 20 reg = <0x19c40000 0x1000>,
21 <0x19c00000 0x1000>; 21 <0x19c00000 0x1000>;
22 interrupts = <195>; 22 interrupts = <0 195 0x0>;
23 }; 23 };
24}; 24};
diff --git a/arch/arm/boot/dts/versatile-ab.dts b/arch/arm/boot/dts/versatile-ab.dts
index 0b32925f2147..e2fe3195c0d1 100644
--- a/arch/arm/boot/dts/versatile-ab.dts
+++ b/arch/arm/boot/dts/versatile-ab.dts
@@ -173,7 +173,7 @@
173 mmc@5000 { 173 mmc@5000 {
174 compatible = "arm,primecell"; 174 compatible = "arm,primecell";
175 reg = < 0x5000 0x1000>; 175 reg = < 0x5000 0x1000>;
176 interrupts = <22>; 176 interrupts = <22 34>;
177 }; 177 };
178 kmi@6000 { 178 kmi@6000 {
179 compatible = "arm,pl050", "arm,primecell"; 179 compatible = "arm,pl050", "arm,primecell";
diff --git a/arch/arm/boot/dts/versatile-pb.dts b/arch/arm/boot/dts/versatile-pb.dts
index 166461073b78..7e8175269064 100644
--- a/arch/arm/boot/dts/versatile-pb.dts
+++ b/arch/arm/boot/dts/versatile-pb.dts
@@ -41,7 +41,7 @@
41 mmc@b000 { 41 mmc@b000 {
42 compatible = "arm,primecell"; 42 compatible = "arm,primecell";
43 reg = <0xb000 0x1000>; 43 reg = <0xb000 0x1000>;
44 interrupts = <23>; 44 interrupts = <23 34>;
45 }; 45 };
46 }; 46 };
47 }; 47 };
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index 7a66311f3066..7e288f96cedf 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -427,19 +427,18 @@ int __init vic_of_init(struct device_node *node, struct device_node *parent)
427 427
428/* 428/*
429 * Handle each interrupt in a single VIC. Returns non-zero if we've 429 * Handle each interrupt in a single VIC. Returns non-zero if we've
430 * handled at least one interrupt. This does a single read of the 430 * handled at least one interrupt. This reads the status register
431 * status register and handles all interrupts in order from LSB first. 431 * before handling each interrupt, which is necessary given that
432 * handle_IRQ may briefly re-enable interrupts for soft IRQ handling.
432 */ 433 */
433static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs) 434static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs)
434{ 435{
435 u32 stat, irq; 436 u32 stat, irq;
436 int handled = 0; 437 int handled = 0;
437 438
438 stat = readl_relaxed(vic->base + VIC_IRQ_STATUS); 439 while ((stat = readl_relaxed(vic->base + VIC_IRQ_STATUS))) {
439 while (stat) {
440 irq = ffs(stat) - 1; 440 irq = ffs(stat) - 1;
441 handle_IRQ(irq_find_mapping(vic->domain, irq), regs); 441 handle_IRQ(irq_find_mapping(vic->domain, irq), regs);
442 stat &= ~(1 << irq);
443 handled = 1; 442 handled = 1;
444 } 443 }
445 444
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
index b5ac644e12af..6b31cb60daab 100644
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ b/arch/arm/configs/imx_v4_v5_defconfig
@@ -112,6 +112,7 @@ CONFIG_WATCHDOG=y
112CONFIG_IMX2_WDT=y 112CONFIG_IMX2_WDT=y
113CONFIG_MFD_MC13XXX=y 113CONFIG_MFD_MC13XXX=y
114CONFIG_REGULATOR=y 114CONFIG_REGULATOR=y
115CONFIG_REGULATOR_FIXED_VOLTAGE=y
115CONFIG_REGULATOR_MC13783=y 116CONFIG_REGULATOR_MC13783=y
116CONFIG_REGULATOR_MC13892=y 117CONFIG_REGULATOR_MC13892=y
117CONFIG_FB=y 118CONFIG_FB=y
diff --git a/arch/arm/configs/mini2440_defconfig b/arch/arm/configs/mini2440_defconfig
index 42da9183acc8..082175c54e7c 100644
--- a/arch/arm/configs/mini2440_defconfig
+++ b/arch/arm/configs/mini2440_defconfig
@@ -14,6 +14,8 @@ CONFIG_MODULE_FORCE_UNLOAD=y
14# CONFIG_BLK_DEV_BSG is not set 14# CONFIG_BLK_DEV_BSG is not set
15CONFIG_BLK_DEV_INTEGRITY=y 15CONFIG_BLK_DEV_INTEGRITY=y
16CONFIG_ARCH_S3C24XX=y 16CONFIG_ARCH_S3C24XX=y
17# CONFIG_CPU_S3C2410 is not set
18CONFIG_CPU_S3C2440=y
17CONFIG_S3C_ADC=y 19CONFIG_S3C_ADC=y
18CONFIG_S3C24XX_PWM=y 20CONFIG_S3C24XX_PWM=y
19CONFIG_MACH_MINI2440=y 21CONFIG_MACH_MINI2440=y
diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig
index 889d73ac1ae1..7e84f453e8a6 100644
--- a/arch/arm/configs/u8500_defconfig
+++ b/arch/arm/configs/u8500_defconfig
@@ -8,8 +8,6 @@ CONFIG_MODULE_UNLOAD=y
8# CONFIG_LBDAF is not set 8# CONFIG_LBDAF is not set
9# CONFIG_BLK_DEV_BSG is not set 9# CONFIG_BLK_DEV_BSG is not set
10CONFIG_ARCH_U8500=y 10CONFIG_ARCH_U8500=y
11CONFIG_UX500_SOC_DB5500=y
12CONFIG_UX500_SOC_DB8500=y
13CONFIG_MACH_HREFV60=y 11CONFIG_MACH_HREFV60=y
14CONFIG_MACH_SNOWBALL=y 12CONFIG_MACH_SNOWBALL=y
15CONFIG_MACH_U5500=y 13CONFIG_MACH_U5500=y
@@ -39,7 +37,6 @@ CONFIG_CAIF=y
39CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 37CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
40CONFIG_BLK_DEV_RAM=y 38CONFIG_BLK_DEV_RAM=y
41CONFIG_BLK_DEV_RAM_SIZE=65536 39CONFIG_BLK_DEV_RAM_SIZE=65536
42CONFIG_MISC_DEVICES=y
43CONFIG_AB8500_PWM=y 40CONFIG_AB8500_PWM=y
44CONFIG_SENSORS_BH1780=y 41CONFIG_SENSORS_BH1780=y
45CONFIG_NETDEVICES=y 42CONFIG_NETDEVICES=y
@@ -65,16 +62,18 @@ CONFIG_SERIAL_AMBA_PL011=y
65CONFIG_SERIAL_AMBA_PL011_CONSOLE=y 62CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
66CONFIG_HW_RANDOM=y 63CONFIG_HW_RANDOM=y
67CONFIG_HW_RANDOM_NOMADIK=y 64CONFIG_HW_RANDOM_NOMADIK=y
68CONFIG_I2C=y
69CONFIG_I2C_NOMADIK=y
70CONFIG_SPI=y 65CONFIG_SPI=y
71CONFIG_SPI_PL022=y 66CONFIG_SPI_PL022=y
72CONFIG_GPIO_STMPE=y 67CONFIG_GPIO_STMPE=y
73CONFIG_GPIO_TC3589X=y 68CONFIG_GPIO_TC3589X=y
69CONFIG_POWER_SUPPLY=y
70CONFIG_AB8500_BM=y
71CONFIG_AB8500_BATTERY_THERM_ON_BATCTRL=y
74CONFIG_MFD_STMPE=y 72CONFIG_MFD_STMPE=y
75CONFIG_MFD_TC3589X=y 73CONFIG_MFD_TC3589X=y
76CONFIG_AB5500_CORE=y 74CONFIG_AB5500_CORE=y
77CONFIG_AB8500_CORE=y 75CONFIG_AB8500_CORE=y
76CONFIG_REGULATOR=y
78CONFIG_REGULATOR_AB8500=y 77CONFIG_REGULATOR_AB8500=y
79# CONFIG_HID_SUPPORT is not set 78# CONFIG_HID_SUPPORT is not set
80CONFIG_USB_GADGET=y 79CONFIG_USB_GADGET=y
diff --git a/arch/arm/include/asm/jump_label.h b/arch/arm/include/asm/jump_label.h
index 5c5ca2ea62b0..bfc198c75913 100644
--- a/arch/arm/include/asm/jump_label.h
+++ b/arch/arm/include/asm/jump_label.h
@@ -14,7 +14,7 @@
14#define JUMP_LABEL_NOP "nop" 14#define JUMP_LABEL_NOP "nop"
15#endif 15#endif
16 16
17static __always_inline bool arch_static_branch(struct jump_label_key *key) 17static __always_inline bool arch_static_branch(struct static_key *key)
18{ 18{
19 asm goto("1:\n\t" 19 asm goto("1:\n\t"
20 JUMP_LABEL_NOP "\n\t" 20 JUMP_LABEL_NOP "\n\t"
diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h
index d4c24d412a8d..0f04d84582e1 100644
--- a/arch/arm/include/asm/thread_info.h
+++ b/arch/arm/include/asm/thread_info.h
@@ -118,6 +118,13 @@ extern void iwmmxt_task_switch(struct thread_info *);
118extern void vfp_sync_hwstate(struct thread_info *); 118extern void vfp_sync_hwstate(struct thread_info *);
119extern void vfp_flush_hwstate(struct thread_info *); 119extern void vfp_flush_hwstate(struct thread_info *);
120 120
121struct user_vfp;
122struct user_vfp_exc;
123
124extern int vfp_preserve_user_clear_hwstate(struct user_vfp __user *,
125 struct user_vfp_exc __user *);
126extern int vfp_restore_user_hwstate(struct user_vfp __user *,
127 struct user_vfp_exc __user *);
121#endif 128#endif
122 129
123/* 130/*
diff --git a/arch/arm/include/asm/tls.h b/arch/arm/include/asm/tls.h
index 60843eb0f61c..73409e6c0251 100644
--- a/arch/arm/include/asm/tls.h
+++ b/arch/arm/include/asm/tls.h
@@ -7,6 +7,8 @@
7 7
8 .macro set_tls_v6k, tp, tmp1, tmp2 8 .macro set_tls_v6k, tp, tmp1, tmp2
9 mcr p15, 0, \tp, c13, c0, 3 @ set TLS register 9 mcr p15, 0, \tp, c13, c0, 3 @ set TLS register
10 mov \tmp1, #0
11 mcr p15, 0, \tmp1, c13, c0, 2 @ clear user r/w TLS register
10 .endm 12 .endm
11 13
12 .macro set_tls_v6, tp, tmp1, tmp2 14 .macro set_tls_v6, tp, tmp1, tmp2
@@ -15,6 +17,8 @@
15 mov \tmp2, #0xffff0fff 17 mov \tmp2, #0xffff0fff
16 tst \tmp1, #HWCAP_TLS @ hardware TLS available? 18 tst \tmp1, #HWCAP_TLS @ hardware TLS available?
17 mcrne p15, 0, \tp, c13, c0, 3 @ yes, set TLS register 19 mcrne p15, 0, \tp, c13, c0, 3 @ yes, set TLS register
20 movne \tmp1, #0
21 mcrne p15, 0, \tmp1, c13, c0, 2 @ clear user r/w TLS register
18 streq \tp, [\tmp2, #-15] @ set TLS value at 0xffff0ff0 22 streq \tp, [\tmp2, #-15] @ set TLS value at 0xffff0ff0
19 .endm 23 .endm
20 24
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 71ccdbfed662..8349d4e97e2b 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -155,10 +155,10 @@ static bool migrate_one_irq(struct irq_desc *desc)
155 } 155 }
156 156
157 c = irq_data_get_irq_chip(d); 157 c = irq_data_get_irq_chip(d);
158 if (c->irq_set_affinity) 158 if (!c->irq_set_affinity)
159 c->irq_set_affinity(d, affinity, true);
160 else
161 pr_debug("IRQ%u: unable to set affinity\n", d->irq); 159 pr_debug("IRQ%u: unable to set affinity\n", d->irq);
160 else if (c->irq_set_affinity(d, affinity, true) == IRQ_SET_MASK_OK && ret)
161 cpumask_copy(d->affinity, affinity);
162 162
163 return ret; 163 return ret;
164} 164}
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index 80abafb9bf33..9650c143afc1 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -906,27 +906,14 @@ long arch_ptrace(struct task_struct *child, long request,
906 return ret; 906 return ret;
907} 907}
908 908
909#ifdef __ARMEB__
910#define AUDIT_ARCH_NR AUDIT_ARCH_ARMEB
911#else
912#define AUDIT_ARCH_NR AUDIT_ARCH_ARM
913#endif
914
915asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno) 909asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
916{ 910{
917 unsigned long ip; 911 unsigned long ip;
918 912
919 /* 913 if (why)
920 * Save IP. IP is used to denote syscall entry/exit:
921 * IP = 0 -> entry, = 1 -> exit
922 */
923 ip = regs->ARM_ip;
924 regs->ARM_ip = why;
925
926 if (!ip)
927 audit_syscall_exit(regs); 914 audit_syscall_exit(regs);
928 else 915 else
929 audit_syscall_entry(AUDIT_ARCH_NR, scno, regs->ARM_r0, 916 audit_syscall_entry(AUDIT_ARCH_ARM, scno, regs->ARM_r0,
930 regs->ARM_r1, regs->ARM_r2, regs->ARM_r3); 917 regs->ARM_r1, regs->ARM_r2, regs->ARM_r3);
931 918
932 if (!test_thread_flag(TIF_SYSCALL_TRACE)) 919 if (!test_thread_flag(TIF_SYSCALL_TRACE))
@@ -936,6 +923,13 @@ asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
936 923
937 current_thread_info()->syscall = scno; 924 current_thread_info()->syscall = scno;
938 925
926 /*
927 * IP is used to denote syscall entry/exit:
928 * IP = 0 -> entry, =1 -> exit
929 */
930 ip = regs->ARM_ip;
931 regs->ARM_ip = why;
932
939 /* the 0x80 provides a way for the tracing parent to distinguish 933 /* the 0x80 provides a way for the tracing parent to distinguish
940 between a syscall stop and SIGTRAP delivery */ 934 between a syscall stop and SIGTRAP delivery */
941 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) 935 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index b91411371ae1..ebfac782593f 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -523,7 +523,21 @@ int __init arm_add_memory(phys_addr_t start, unsigned long size)
523 */ 523 */
524 size -= start & ~PAGE_MASK; 524 size -= start & ~PAGE_MASK;
525 bank->start = PAGE_ALIGN(start); 525 bank->start = PAGE_ALIGN(start);
526 bank->size = size & PAGE_MASK; 526
527#ifndef CONFIG_LPAE
528 if (bank->start + size < bank->start) {
529 printk(KERN_CRIT "Truncating memory at 0x%08llx to fit in "
530 "32-bit physical address space\n", (long long)start);
531 /*
532 * To ensure bank->start + bank->size is representable in
533 * 32 bits, we use ULONG_MAX as the upper limit rather than 4GB.
534 * This means we lose a page after masking.
535 */
536 size = ULONG_MAX - bank->start;
537 }
538#endif
539
540 bank->size = size & PAGE_MASK;
527 541
528 /* 542 /*
529 * Check whether this memory region has non-zero size or 543 * Check whether this memory region has non-zero size or
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index 7cb532fc8aa4..d68d1b694680 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -180,44 +180,23 @@ static int restore_iwmmxt_context(struct iwmmxt_sigframe *frame)
180 180
181static int preserve_vfp_context(struct vfp_sigframe __user *frame) 181static int preserve_vfp_context(struct vfp_sigframe __user *frame)
182{ 182{
183 struct thread_info *thread = current_thread_info();
184 struct vfp_hard_struct *h = &thread->vfpstate.hard;
185 const unsigned long magic = VFP_MAGIC; 183 const unsigned long magic = VFP_MAGIC;
186 const unsigned long size = VFP_STORAGE_SIZE; 184 const unsigned long size = VFP_STORAGE_SIZE;
187 int err = 0; 185 int err = 0;
188 186
189 vfp_sync_hwstate(thread);
190 __put_user_error(magic, &frame->magic, err); 187 __put_user_error(magic, &frame->magic, err);
191 __put_user_error(size, &frame->size, err); 188 __put_user_error(size, &frame->size, err);
192 189
193 /* 190 if (err)
194 * Copy the floating point registers. There can be unused 191 return -EFAULT;
195 * registers see asm/hwcap.h for details.
196 */
197 err |= __copy_to_user(&frame->ufp.fpregs, &h->fpregs,
198 sizeof(h->fpregs));
199 /*
200 * Copy the status and control register.
201 */
202 __put_user_error(h->fpscr, &frame->ufp.fpscr, err);
203
204 /*
205 * Copy the exception registers.
206 */
207 __put_user_error(h->fpexc, &frame->ufp_exc.fpexc, err);
208 __put_user_error(h->fpinst, &frame->ufp_exc.fpinst, err);
209 __put_user_error(h->fpinst2, &frame->ufp_exc.fpinst2, err);
210 192
211 return err ? -EFAULT : 0; 193 return vfp_preserve_user_clear_hwstate(&frame->ufp, &frame->ufp_exc);
212} 194}
213 195
214static int restore_vfp_context(struct vfp_sigframe __user *frame) 196static int restore_vfp_context(struct vfp_sigframe __user *frame)
215{ 197{
216 struct thread_info *thread = current_thread_info();
217 struct vfp_hard_struct *h = &thread->vfpstate.hard;
218 unsigned long magic; 198 unsigned long magic;
219 unsigned long size; 199 unsigned long size;
220 unsigned long fpexc;
221 int err = 0; 200 int err = 0;
222 201
223 __get_user_error(magic, &frame->magic, err); 202 __get_user_error(magic, &frame->magic, err);
@@ -228,33 +207,7 @@ static int restore_vfp_context(struct vfp_sigframe __user *frame)
228 if (magic != VFP_MAGIC || size != VFP_STORAGE_SIZE) 207 if (magic != VFP_MAGIC || size != VFP_STORAGE_SIZE)
229 return -EINVAL; 208 return -EINVAL;
230 209
231 vfp_flush_hwstate(thread); 210 return vfp_restore_user_hwstate(&frame->ufp, &frame->ufp_exc);
232
233 /*
234 * Copy the floating point registers. There can be unused
235 * registers see asm/hwcap.h for details.
236 */
237 err |= __copy_from_user(&h->fpregs, &frame->ufp.fpregs,
238 sizeof(h->fpregs));
239 /*
240 * Copy the status and control register.
241 */
242 __get_user_error(h->fpscr, &frame->ufp.fpscr, err);
243
244 /*
245 * Sanitise and restore the exception registers.
246 */
247 __get_user_error(fpexc, &frame->ufp_exc.fpexc, err);
248 /* Ensure the VFP is enabled. */
249 fpexc |= FPEXC_EN;
250 /* Ensure FPINST2 is invalid and the exception flag is cleared. */
251 fpexc &= ~(FPEXC_EX | FPEXC_FP2V);
252 h->fpexc = fpexc;
253
254 __get_user_error(h->fpinst, &frame->ufp_exc.fpinst, err);
255 __get_user_error(h->fpinst2, &frame->ufp_exc.fpinst2, err);
256
257 return err ? -EFAULT : 0;
258} 211}
259 212
260#endif 213#endif
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index addbbe8028c2..8f4644659777 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -251,8 +251,6 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
251 struct mm_struct *mm = &init_mm; 251 struct mm_struct *mm = &init_mm;
252 unsigned int cpu = smp_processor_id(); 252 unsigned int cpu = smp_processor_id();
253 253
254 printk("CPU%u: Booted secondary processor\n", cpu);
255
256 /* 254 /*
257 * All kernel threads share the same mm context; grab a 255 * All kernel threads share the same mm context; grab a
258 * reference and switch to it. 256 * reference and switch to it.
@@ -264,6 +262,8 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
264 enter_lazy_tlb(mm, current); 262 enter_lazy_tlb(mm, current);
265 local_flush_tlb_all(); 263 local_flush_tlb_all();
266 264
265 printk("CPU%u: Booted secondary processor\n", cpu);
266
267 cpu_init(); 267 cpu_init();
268 preempt_disable(); 268 preempt_disable();
269 trace_hardirqs_off(); 269 trace_hardirqs_off();
@@ -510,10 +510,6 @@ static void ipi_cpu_stop(unsigned int cpu)
510 local_fiq_disable(); 510 local_fiq_disable();
511 local_irq_disable(); 511 local_irq_disable();
512 512
513#ifdef CONFIG_HOTPLUG_CPU
514 platform_cpu_kill(cpu);
515#endif
516
517 while (1) 513 while (1)
518 cpu_relax(); 514 cpu_relax();
519} 515}
@@ -576,17 +572,25 @@ void smp_send_reschedule(int cpu)
576 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE); 572 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
577} 573}
578 574
575#ifdef CONFIG_HOTPLUG_CPU
576static void smp_kill_cpus(cpumask_t *mask)
577{
578 unsigned int cpu;
579 for_each_cpu(cpu, mask)
580 platform_cpu_kill(cpu);
581}
582#else
583static void smp_kill_cpus(cpumask_t *mask) { }
584#endif
585
579void smp_send_stop(void) 586void smp_send_stop(void)
580{ 587{
581 unsigned long timeout; 588 unsigned long timeout;
589 struct cpumask mask;
582 590
583 if (num_online_cpus() > 1) { 591 cpumask_copy(&mask, cpu_online_mask);
584 struct cpumask mask; 592 cpumask_clear_cpu(smp_processor_id(), &mask);
585 cpumask_copy(&mask, cpu_online_mask); 593 smp_cross_call(&mask, IPI_CPU_STOP);
586 cpumask_clear_cpu(smp_processor_id(), &mask);
587
588 smp_cross_call(&mask, IPI_CPU_STOP);
589 }
590 594
591 /* Wait up to one second for other CPUs to stop */ 595 /* Wait up to one second for other CPUs to stop */
592 timeout = USEC_PER_SEC; 596 timeout = USEC_PER_SEC;
@@ -595,6 +599,8 @@ void smp_send_stop(void)
595 599
596 if (num_online_cpus() > 1) 600 if (num_online_cpus() > 1)
597 pr_warning("SMP: failed to stop secondary CPUs\n"); 601 pr_warning("SMP: failed to stop secondary CPUs\n");
602
603 smp_kill_cpus(&mask);
598} 604}
599 605
600/* 606/*
diff --git a/arch/arm/kernel/sys_arm.c b/arch/arm/kernel/sys_arm.c
index d2b177905cdb..76cbb055dd05 100644
--- a/arch/arm/kernel/sys_arm.c
+++ b/arch/arm/kernel/sys_arm.c
@@ -115,7 +115,7 @@ int kernel_execve(const char *filename,
115 "Ir" (THREAD_START_SP - sizeof(regs)), 115 "Ir" (THREAD_START_SP - sizeof(regs)),
116 "r" (&regs), 116 "r" (&regs),
117 "Ir" (sizeof(regs)) 117 "Ir" (sizeof(regs))
118 : "r0", "r1", "r2", "r3", "ip", "lr", "memory"); 118 : "r0", "r1", "r2", "r3", "r8", "r9", "ip", "lr", "memory");
119 119
120 out: 120 out:
121 return ret; 121 return ret;
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 99ce5c955e39..05774e5b1cba 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -1173,7 +1173,6 @@ void __init at91_add_device_serial(void)
1173 printk(KERN_INFO "AT91: No default serial console defined.\n"); 1173 printk(KERN_INFO "AT91: No default serial console defined.\n");
1174} 1174}
1175#else 1175#else
1176void __init __deprecated at91_init_serial(struct at91_uart_config *config) {}
1177void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} 1176void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1178void __init at91_set_serial_console(unsigned portnr) {} 1177void __init at91_set_serial_console(unsigned portnr) {}
1179void __init at91_add_device_serial(void) {} 1178void __init at91_add_device_serial(void) {}
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index dd7f782b0b91..104ca40d8d18 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -23,6 +23,7 @@
23#include <linux/interrupt.h> 23#include <linux/interrupt.h>
24#include <linux/irq.h> 24#include <linux/irq.h>
25#include <linux/clockchips.h> 25#include <linux/clockchips.h>
26#include <linux/export.h>
26 27
27#include <asm/mach/time.h> 28#include <asm/mach/time.h>
28 29
@@ -176,6 +177,7 @@ static struct clock_event_device clkevt = {
176}; 177};
177 178
178void __iomem *at91_st_base; 179void __iomem *at91_st_base;
180EXPORT_SYMBOL_GPL(at91_st_base);
179 181
180void __init at91rm9200_ioremap_st(u32 addr) 182void __init at91rm9200_ioremap_st(u32 addr)
181{ 183{
diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c
index 11cbaa8946fe..b2e4fe21f346 100644
--- a/arch/arm/mach-at91/board-rm9200ek.c
+++ b/arch/arm/mach-at91/board-rm9200ek.c
@@ -117,7 +117,7 @@ static struct i2c_board_info __initdata ek_i2c_devices[] = {
117}; 117};
118 118
119#define EK_FLASH_BASE AT91_CHIPSELECT_0 119#define EK_FLASH_BASE AT91_CHIPSELECT_0
120#define EK_FLASH_SIZE SZ_2M 120#define EK_FLASH_SIZE SZ_8M
121 121
122static struct physmap_flash_data ek_flash_data = { 122static struct physmap_flash_data ek_flash_data = {
123 .width = 2, 123 .width = 2,
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index c3f994462864..065fed342424 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -85,8 +85,6 @@ static struct resource dm9000_resource[] = {
85 .flags = IORESOURCE_MEM 85 .flags = IORESOURCE_MEM
86 }, 86 },
87 [2] = { 87 [2] = {
88 .start = AT91_PIN_PC11,
89 .end = AT91_PIN_PC11,
90 .flags = IORESOURCE_IRQ 88 .flags = IORESOURCE_IRQ
91 | IORESOURCE_IRQ_LOWEDGE | IORESOURCE_IRQ_HIGHEDGE, 89 | IORESOURCE_IRQ_LOWEDGE | IORESOURCE_IRQ_HIGHEDGE,
92 } 90 }
@@ -130,6 +128,8 @@ static struct sam9_smc_config __initdata dm9000_smc_config = {
130 128
131static void __init ek_add_device_dm9000(void) 129static void __init ek_add_device_dm9000(void)
132{ 130{
131 struct resource *r = &dm9000_resource[2];
132
133 /* Configure chip-select 2 (DM9000) */ 133 /* Configure chip-select 2 (DM9000) */
134 sam9_smc_configure(0, 2, &dm9000_smc_config); 134 sam9_smc_configure(0, 2, &dm9000_smc_config);
135 135
@@ -139,6 +139,7 @@ static void __init ek_add_device_dm9000(void)
139 /* Configure Interrupt pin as input, no pull-up */ 139 /* Configure Interrupt pin as input, no pull-up */
140 at91_set_gpio_input(AT91_PIN_PC11, 0); 140 at91_set_gpio_input(AT91_PIN_PC11, 0);
141 141
142 r->start = r->end = gpio_to_irq(AT91_PIN_PC11);
142 platform_device_register(&dm9000_device); 143 platform_device_register(&dm9000_device);
143} 144}
144#else 145#else
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index a0f4d7424cdc..6b692824c988 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -35,6 +35,7 @@
35#include "generic.h" 35#include "generic.h"
36 36
37void __iomem *at91_pmc_base; 37void __iomem *at91_pmc_base;
38EXPORT_SYMBOL_GPL(at91_pmc_base);
38 39
39/* 40/*
40 * There's a lot more which can be done with clocks, including cpufreq 41 * There's a lot more which can be done with clocks, including cpufreq
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
index 36604782a78f..ea2c57a86ca6 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -25,7 +25,7 @@ extern void __iomem *at91_pmc_base;
25#define at91_pmc_write(field, value) \ 25#define at91_pmc_write(field, value) \
26 __raw_writel(value, at91_pmc_base + field) 26 __raw_writel(value, at91_pmc_base + field)
27#else 27#else
28.extern at91_aic_base 28.extern at91_pmc_base
29#endif 29#endif
30 30
31#define AT91_PMC_SCER 0x00 /* System Clock Enable Register */ 31#define AT91_PMC_SCER 0x00 /* System Clock Enable Register */
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 97cc04dc8073..f44a2e7272e3 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -54,6 +54,7 @@ void __init at91_init_interrupts(unsigned int *priority)
54} 54}
55 55
56void __iomem *at91_ramc_base[2]; 56void __iomem *at91_ramc_base[2];
57EXPORT_SYMBOL_GPL(at91_ramc_base);
57 58
58void __init at91_ioremap_ramc(int id, u32 addr, u32 size) 59void __init at91_ioremap_ramc(int id, u32 addr, u32 size)
59{ 60{
@@ -292,6 +293,7 @@ void __init at91_ioremap_rstc(u32 base_addr)
292} 293}
293 294
294void __iomem *at91_matrix_base; 295void __iomem *at91_matrix_base;
296EXPORT_SYMBOL_GPL(at91_matrix_base);
295 297
296void __init at91_ioremap_matrix(u32 base_addr) 298void __init at91_ioremap_matrix(u32 base_addr)
297{ 299{
diff --git a/arch/arm/mach-bcmring/core.c b/arch/arm/mach-bcmring/core.c
index 22e4e0a28ad1..adbfb1994582 100644
--- a/arch/arm/mach-bcmring/core.c
+++ b/arch/arm/mach-bcmring/core.c
@@ -52,8 +52,8 @@
52#include <mach/csp/chipcHw_inline.h> 52#include <mach/csp/chipcHw_inline.h>
53#include <mach/csp/tmrHw_reg.h> 53#include <mach/csp/tmrHw_reg.h>
54 54
55static AMBA_APB_DEVICE(uartA, "uarta", MM_ADDR_IO_UARTA, { IRQ_UARTA }, NULL); 55static AMBA_APB_DEVICE(uartA, "uartA", 0, MM_ADDR_IO_UARTA, {IRQ_UARTA}, NULL);
56static AMBA_APB_DEVICE(uartB, "uartb", MM_ADDR_IO_UARTB, { IRQ_UARTB }, NULL); 56static AMBA_APB_DEVICE(uartB, "uartB", 0, MM_ADDR_IO_UARTB, {IRQ_UARTB}, NULL);
57 57
58static struct clk pll1_clk = { 58static struct clk pll1_clk = {
59 .name = "PLL1", 59 .name = "PLL1",
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 0491ceef1cda..b8df521fb68e 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -232,6 +232,9 @@ config MACH_ARMLEX4210
232config MACH_UNIVERSAL_C210 232config MACH_UNIVERSAL_C210
233 bool "Mobile UNIVERSAL_C210 Board" 233 bool "Mobile UNIVERSAL_C210 Board"
234 select CPU_EXYNOS4210 234 select CPU_EXYNOS4210
235 select S5P_HRT
236 select CLKSRC_MMIO
237 select HAVE_SCHED_CLOCK
235 select S5P_GPIO_INT 238 select S5P_GPIO_INT
236 select S5P_DEV_FIMC0 239 select S5P_DEV_FIMC0
237 select S5P_DEV_FIMC1 240 select S5P_DEV_FIMC1
@@ -368,6 +371,7 @@ comment "Flattened Device Tree based board for EXYNOS SoCs"
368 371
369config MACH_EXYNOS4_DT 372config MACH_EXYNOS4_DT
370 bool "Samsung Exynos4 Machine using device tree" 373 bool "Samsung Exynos4 Machine using device tree"
374 depends on ARCH_EXYNOS4
371 select CPU_EXYNOS4210 375 select CPU_EXYNOS4210
372 select USE_OF 376 select USE_OF
373 select ARM_AMBA 377 select ARM_AMBA
@@ -380,6 +384,7 @@ config MACH_EXYNOS4_DT
380 384
381config MACH_EXYNOS5_DT 385config MACH_EXYNOS5_DT
382 bool "SAMSUNG EXYNOS5 Machine using device tree" 386 bool "SAMSUNG EXYNOS5 Machine using device tree"
387 depends on ARCH_EXYNOS5
383 select SOC_EXYNOS5250 388 select SOC_EXYNOS5250
384 select USE_OF 389 select USE_OF
385 select ARM_AMBA 390 select ARM_AMBA
diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c
index df54c2a92225..6efd1e5919fd 100644
--- a/arch/arm/mach-exynos/clock-exynos4.c
+++ b/arch/arm/mach-exynos/clock-exynos4.c
@@ -497,25 +497,25 @@ static struct clk exynos4_init_clocks_off[] = {
497 .ctrlbit = (1 << 3), 497 .ctrlbit = (1 << 3),
498 }, { 498 }, {
499 .name = "hsmmc", 499 .name = "hsmmc",
500 .devname = "s3c-sdhci.0", 500 .devname = "exynos4-sdhci.0",
501 .parent = &exynos4_clk_aclk_133.clk, 501 .parent = &exynos4_clk_aclk_133.clk,
502 .enable = exynos4_clk_ip_fsys_ctrl, 502 .enable = exynos4_clk_ip_fsys_ctrl,
503 .ctrlbit = (1 << 5), 503 .ctrlbit = (1 << 5),
504 }, { 504 }, {
505 .name = "hsmmc", 505 .name = "hsmmc",
506 .devname = "s3c-sdhci.1", 506 .devname = "exynos4-sdhci.1",
507 .parent = &exynos4_clk_aclk_133.clk, 507 .parent = &exynos4_clk_aclk_133.clk,
508 .enable = exynos4_clk_ip_fsys_ctrl, 508 .enable = exynos4_clk_ip_fsys_ctrl,
509 .ctrlbit = (1 << 6), 509 .ctrlbit = (1 << 6),
510 }, { 510 }, {
511 .name = "hsmmc", 511 .name = "hsmmc",
512 .devname = "s3c-sdhci.2", 512 .devname = "exynos4-sdhci.2",
513 .parent = &exynos4_clk_aclk_133.clk, 513 .parent = &exynos4_clk_aclk_133.clk,
514 .enable = exynos4_clk_ip_fsys_ctrl, 514 .enable = exynos4_clk_ip_fsys_ctrl,
515 .ctrlbit = (1 << 7), 515 .ctrlbit = (1 << 7),
516 }, { 516 }, {
517 .name = "hsmmc", 517 .name = "hsmmc",
518 .devname = "s3c-sdhci.3", 518 .devname = "exynos4-sdhci.3",
519 .parent = &exynos4_clk_aclk_133.clk, 519 .parent = &exynos4_clk_aclk_133.clk,
520 .enable = exynos4_clk_ip_fsys_ctrl, 520 .enable = exynos4_clk_ip_fsys_ctrl,
521 .ctrlbit = (1 << 8), 521 .ctrlbit = (1 << 8),
@@ -1202,7 +1202,7 @@ static struct clksrc_clk exynos4_clk_sclk_uart3 = {
1202static struct clksrc_clk exynos4_clk_sclk_mmc0 = { 1202static struct clksrc_clk exynos4_clk_sclk_mmc0 = {
1203 .clk = { 1203 .clk = {
1204 .name = "sclk_mmc", 1204 .name = "sclk_mmc",
1205 .devname = "s3c-sdhci.0", 1205 .devname = "exynos4-sdhci.0",
1206 .parent = &exynos4_clk_dout_mmc0.clk, 1206 .parent = &exynos4_clk_dout_mmc0.clk,
1207 .enable = exynos4_clksrc_mask_fsys_ctrl, 1207 .enable = exynos4_clksrc_mask_fsys_ctrl,
1208 .ctrlbit = (1 << 0), 1208 .ctrlbit = (1 << 0),
@@ -1213,7 +1213,7 @@ static struct clksrc_clk exynos4_clk_sclk_mmc0 = {
1213static struct clksrc_clk exynos4_clk_sclk_mmc1 = { 1213static struct clksrc_clk exynos4_clk_sclk_mmc1 = {
1214 .clk = { 1214 .clk = {
1215 .name = "sclk_mmc", 1215 .name = "sclk_mmc",
1216 .devname = "s3c-sdhci.1", 1216 .devname = "exynos4-sdhci.1",
1217 .parent = &exynos4_clk_dout_mmc1.clk, 1217 .parent = &exynos4_clk_dout_mmc1.clk,
1218 .enable = exynos4_clksrc_mask_fsys_ctrl, 1218 .enable = exynos4_clksrc_mask_fsys_ctrl,
1219 .ctrlbit = (1 << 4), 1219 .ctrlbit = (1 << 4),
@@ -1224,7 +1224,7 @@ static struct clksrc_clk exynos4_clk_sclk_mmc1 = {
1224static struct clksrc_clk exynos4_clk_sclk_mmc2 = { 1224static struct clksrc_clk exynos4_clk_sclk_mmc2 = {
1225 .clk = { 1225 .clk = {
1226 .name = "sclk_mmc", 1226 .name = "sclk_mmc",
1227 .devname = "s3c-sdhci.2", 1227 .devname = "exynos4-sdhci.2",
1228 .parent = &exynos4_clk_dout_mmc2.clk, 1228 .parent = &exynos4_clk_dout_mmc2.clk,
1229 .enable = exynos4_clksrc_mask_fsys_ctrl, 1229 .enable = exynos4_clksrc_mask_fsys_ctrl,
1230 .ctrlbit = (1 << 8), 1230 .ctrlbit = (1 << 8),
@@ -1235,7 +1235,7 @@ static struct clksrc_clk exynos4_clk_sclk_mmc2 = {
1235static struct clksrc_clk exynos4_clk_sclk_mmc3 = { 1235static struct clksrc_clk exynos4_clk_sclk_mmc3 = {
1236 .clk = { 1236 .clk = {
1237 .name = "sclk_mmc", 1237 .name = "sclk_mmc",
1238 .devname = "s3c-sdhci.3", 1238 .devname = "exynos4-sdhci.3",
1239 .parent = &exynos4_clk_dout_mmc3.clk, 1239 .parent = &exynos4_clk_dout_mmc3.clk,
1240 .enable = exynos4_clksrc_mask_fsys_ctrl, 1240 .enable = exynos4_clksrc_mask_fsys_ctrl,
1241 .ctrlbit = (1 << 12), 1241 .ctrlbit = (1 << 12),
@@ -1340,10 +1340,10 @@ static struct clk_lookup exynos4_clk_lookup[] = {
1340 CLKDEV_INIT("exynos4210-uart.1", "clk_uart_baud0", &exynos4_clk_sclk_uart1.clk), 1340 CLKDEV_INIT("exynos4210-uart.1", "clk_uart_baud0", &exynos4_clk_sclk_uart1.clk),
1341 CLKDEV_INIT("exynos4210-uart.2", "clk_uart_baud0", &exynos4_clk_sclk_uart2.clk), 1341 CLKDEV_INIT("exynos4210-uart.2", "clk_uart_baud0", &exynos4_clk_sclk_uart2.clk),
1342 CLKDEV_INIT("exynos4210-uart.3", "clk_uart_baud0", &exynos4_clk_sclk_uart3.clk), 1342 CLKDEV_INIT("exynos4210-uart.3", "clk_uart_baud0", &exynos4_clk_sclk_uart3.clk),
1343 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &exynos4_clk_sclk_mmc0.clk), 1343 CLKDEV_INIT("exynos4-sdhci.0", "mmc_busclk.2", &exynos4_clk_sclk_mmc0.clk),
1344 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &exynos4_clk_sclk_mmc1.clk), 1344 CLKDEV_INIT("exynos4-sdhci.1", "mmc_busclk.2", &exynos4_clk_sclk_mmc1.clk),
1345 CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &exynos4_clk_sclk_mmc2.clk), 1345 CLKDEV_INIT("exynos4-sdhci.2", "mmc_busclk.2", &exynos4_clk_sclk_mmc2.clk),
1346 CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &exynos4_clk_sclk_mmc3.clk), 1346 CLKDEV_INIT("exynos4-sdhci.3", "mmc_busclk.2", &exynos4_clk_sclk_mmc3.clk),
1347 CLKDEV_INIT("exynos4-fb.0", "lcd", &exynos4_clk_fimd0), 1347 CLKDEV_INIT("exynos4-fb.0", "lcd", &exynos4_clk_fimd0),
1348 CLKDEV_INIT("dma-pl330.0", "apb_pclk", &exynos4_clk_pdma0), 1348 CLKDEV_INIT("dma-pl330.0", "apb_pclk", &exynos4_clk_pdma0),
1349 CLKDEV_INIT("dma-pl330.1", "apb_pclk", &exynos4_clk_pdma1), 1349 CLKDEV_INIT("dma-pl330.1", "apb_pclk", &exynos4_clk_pdma1),
diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c
index d013982d0f8e..7ac6ff4c46bd 100644
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -455,25 +455,25 @@ static struct clk exynos5_init_clocks_off[] = {
455 .ctrlbit = (1 << 20), 455 .ctrlbit = (1 << 20),
456 }, { 456 }, {
457 .name = "hsmmc", 457 .name = "hsmmc",
458 .devname = "s3c-sdhci.0", 458 .devname = "exynos4-sdhci.0",
459 .parent = &exynos5_clk_aclk_200.clk, 459 .parent = &exynos5_clk_aclk_200.clk,
460 .enable = exynos5_clk_ip_fsys_ctrl, 460 .enable = exynos5_clk_ip_fsys_ctrl,
461 .ctrlbit = (1 << 12), 461 .ctrlbit = (1 << 12),
462 }, { 462 }, {
463 .name = "hsmmc", 463 .name = "hsmmc",
464 .devname = "s3c-sdhci.1", 464 .devname = "exynos4-sdhci.1",
465 .parent = &exynos5_clk_aclk_200.clk, 465 .parent = &exynos5_clk_aclk_200.clk,
466 .enable = exynos5_clk_ip_fsys_ctrl, 466 .enable = exynos5_clk_ip_fsys_ctrl,
467 .ctrlbit = (1 << 13), 467 .ctrlbit = (1 << 13),
468 }, { 468 }, {
469 .name = "hsmmc", 469 .name = "hsmmc",
470 .devname = "s3c-sdhci.2", 470 .devname = "exynos4-sdhci.2",
471 .parent = &exynos5_clk_aclk_200.clk, 471 .parent = &exynos5_clk_aclk_200.clk,
472 .enable = exynos5_clk_ip_fsys_ctrl, 472 .enable = exynos5_clk_ip_fsys_ctrl,
473 .ctrlbit = (1 << 14), 473 .ctrlbit = (1 << 14),
474 }, { 474 }, {
475 .name = "hsmmc", 475 .name = "hsmmc",
476 .devname = "s3c-sdhci.3", 476 .devname = "exynos4-sdhci.3",
477 .parent = &exynos5_clk_aclk_200.clk, 477 .parent = &exynos5_clk_aclk_200.clk,
478 .enable = exynos5_clk_ip_fsys_ctrl, 478 .enable = exynos5_clk_ip_fsys_ctrl,
479 .ctrlbit = (1 << 15), 479 .ctrlbit = (1 << 15),
@@ -678,7 +678,7 @@ static struct clk exynos5_clk_pdma1 = {
678 .name = "dma", 678 .name = "dma",
679 .devname = "dma-pl330.1", 679 .devname = "dma-pl330.1",
680 .enable = exynos5_clk_ip_fsys_ctrl, 680 .enable = exynos5_clk_ip_fsys_ctrl,
681 .ctrlbit = (1 << 1), 681 .ctrlbit = (1 << 2),
682}; 682};
683 683
684static struct clk exynos5_clk_mdma1 = { 684static struct clk exynos5_clk_mdma1 = {
@@ -813,7 +813,7 @@ static struct clksrc_clk exynos5_clk_sclk_uart3 = {
813static struct clksrc_clk exynos5_clk_sclk_mmc0 = { 813static struct clksrc_clk exynos5_clk_sclk_mmc0 = {
814 .clk = { 814 .clk = {
815 .name = "sclk_mmc", 815 .name = "sclk_mmc",
816 .devname = "s3c-sdhci.0", 816 .devname = "exynos4-sdhci.0",
817 .parent = &exynos5_clk_dout_mmc0.clk, 817 .parent = &exynos5_clk_dout_mmc0.clk,
818 .enable = exynos5_clksrc_mask_fsys_ctrl, 818 .enable = exynos5_clksrc_mask_fsys_ctrl,
819 .ctrlbit = (1 << 0), 819 .ctrlbit = (1 << 0),
@@ -824,7 +824,7 @@ static struct clksrc_clk exynos5_clk_sclk_mmc0 = {
824static struct clksrc_clk exynos5_clk_sclk_mmc1 = { 824static struct clksrc_clk exynos5_clk_sclk_mmc1 = {
825 .clk = { 825 .clk = {
826 .name = "sclk_mmc", 826 .name = "sclk_mmc",
827 .devname = "s3c-sdhci.1", 827 .devname = "exynos4-sdhci.1",
828 .parent = &exynos5_clk_dout_mmc1.clk, 828 .parent = &exynos5_clk_dout_mmc1.clk,
829 .enable = exynos5_clksrc_mask_fsys_ctrl, 829 .enable = exynos5_clksrc_mask_fsys_ctrl,
830 .ctrlbit = (1 << 4), 830 .ctrlbit = (1 << 4),
@@ -835,7 +835,7 @@ static struct clksrc_clk exynos5_clk_sclk_mmc1 = {
835static struct clksrc_clk exynos5_clk_sclk_mmc2 = { 835static struct clksrc_clk exynos5_clk_sclk_mmc2 = {
836 .clk = { 836 .clk = {
837 .name = "sclk_mmc", 837 .name = "sclk_mmc",
838 .devname = "s3c-sdhci.2", 838 .devname = "exynos4-sdhci.2",
839 .parent = &exynos5_clk_dout_mmc2.clk, 839 .parent = &exynos5_clk_dout_mmc2.clk,
840 .enable = exynos5_clksrc_mask_fsys_ctrl, 840 .enable = exynos5_clksrc_mask_fsys_ctrl,
841 .ctrlbit = (1 << 8), 841 .ctrlbit = (1 << 8),
@@ -846,7 +846,7 @@ static struct clksrc_clk exynos5_clk_sclk_mmc2 = {
846static struct clksrc_clk exynos5_clk_sclk_mmc3 = { 846static struct clksrc_clk exynos5_clk_sclk_mmc3 = {
847 .clk = { 847 .clk = {
848 .name = "sclk_mmc", 848 .name = "sclk_mmc",
849 .devname = "s3c-sdhci.3", 849 .devname = "exynos4-sdhci.3",
850 .parent = &exynos5_clk_dout_mmc3.clk, 850 .parent = &exynos5_clk_dout_mmc3.clk,
851 .enable = exynos5_clksrc_mask_fsys_ctrl, 851 .enable = exynos5_clksrc_mask_fsys_ctrl,
852 .ctrlbit = (1 << 12), 852 .ctrlbit = (1 << 12),
@@ -990,10 +990,10 @@ static struct clk_lookup exynos5_clk_lookup[] = {
990 CLKDEV_INIT("exynos4210-uart.1", "clk_uart_baud0", &exynos5_clk_sclk_uart1.clk), 990 CLKDEV_INIT("exynos4210-uart.1", "clk_uart_baud0", &exynos5_clk_sclk_uart1.clk),
991 CLKDEV_INIT("exynos4210-uart.2", "clk_uart_baud0", &exynos5_clk_sclk_uart2.clk), 991 CLKDEV_INIT("exynos4210-uart.2", "clk_uart_baud0", &exynos5_clk_sclk_uart2.clk),
992 CLKDEV_INIT("exynos4210-uart.3", "clk_uart_baud0", &exynos5_clk_sclk_uart3.clk), 992 CLKDEV_INIT("exynos4210-uart.3", "clk_uart_baud0", &exynos5_clk_sclk_uart3.clk),
993 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &exynos5_clk_sclk_mmc0.clk), 993 CLKDEV_INIT("exynos4-sdhci.0", "mmc_busclk.2", &exynos5_clk_sclk_mmc0.clk),
994 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &exynos5_clk_sclk_mmc1.clk), 994 CLKDEV_INIT("exynos4-sdhci.1", "mmc_busclk.2", &exynos5_clk_sclk_mmc1.clk),
995 CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &exynos5_clk_sclk_mmc2.clk), 995 CLKDEV_INIT("exynos4-sdhci.2", "mmc_busclk.2", &exynos5_clk_sclk_mmc2.clk),
996 CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &exynos5_clk_sclk_mmc3.clk), 996 CLKDEV_INIT("exynos4-sdhci.3", "mmc_busclk.2", &exynos5_clk_sclk_mmc3.clk),
997 CLKDEV_INIT("dma-pl330.0", "apb_pclk", &exynos5_clk_pdma0), 997 CLKDEV_INIT("dma-pl330.0", "apb_pclk", &exynos5_clk_pdma0),
998 CLKDEV_INIT("dma-pl330.1", "apb_pclk", &exynos5_clk_pdma1), 998 CLKDEV_INIT("dma-pl330.1", "apb_pclk", &exynos5_clk_pdma1),
999 CLKDEV_INIT("dma-pl330.2", "apb_pclk", &exynos5_clk_mdma1), 999 CLKDEV_INIT("dma-pl330.2", "apb_pclk", &exynos5_clk_mdma1),
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 8614aab47cc0..5ccd6e80a607 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -326,6 +326,11 @@ static void __init exynos4_map_io(void)
326 s3c_fimc_setname(2, "exynos4-fimc"); 326 s3c_fimc_setname(2, "exynos4-fimc");
327 s3c_fimc_setname(3, "exynos4-fimc"); 327 s3c_fimc_setname(3, "exynos4-fimc");
328 328
329 s3c_sdhci_setname(0, "exynos4-sdhci");
330 s3c_sdhci_setname(1, "exynos4-sdhci");
331 s3c_sdhci_setname(2, "exynos4-sdhci");
332 s3c_sdhci_setname(3, "exynos4-sdhci");
333
329 /* The I2C bus controllers are directly compatible with s3c2440 */ 334 /* The I2C bus controllers are directly compatible with s3c2440 */
330 s3c_i2c0_setname("s3c2440-i2c"); 335 s3c_i2c0_setname("s3c2440-i2c");
331 s3c_i2c1_setname("s3c2440-i2c"); 336 s3c_i2c1_setname("s3c2440-i2c");
@@ -344,6 +349,11 @@ static void __init exynos5_map_io(void)
344 s3c_device_i2c0.resource[1].start = EXYNOS5_IRQ_IIC; 349 s3c_device_i2c0.resource[1].start = EXYNOS5_IRQ_IIC;
345 s3c_device_i2c0.resource[1].end = EXYNOS5_IRQ_IIC; 350 s3c_device_i2c0.resource[1].end = EXYNOS5_IRQ_IIC;
346 351
352 s3c_sdhci_setname(0, "exynos4-sdhci");
353 s3c_sdhci_setname(1, "exynos4-sdhci");
354 s3c_sdhci_setname(2, "exynos4-sdhci");
355 s3c_sdhci_setname(3, "exynos4-sdhci");
356
347 /* The I2C bus controllers are directly compatible with s3c2440 */ 357 /* The I2C bus controllers are directly compatible with s3c2440 */
348 s3c_i2c0_setname("s3c2440-i2c"); 358 s3c_i2c0_setname("s3c2440-i2c");
349 s3c_i2c1_setname("s3c2440-i2c"); 359 s3c_i2c1_setname("s3c2440-i2c");
@@ -537,7 +547,9 @@ void __init exynos5_init_irq(void)
537{ 547{
538 int irq; 548 int irq;
539 549
540 gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU); 550#ifdef CONFIG_OF
551 of_irq_init(exynos4_dt_irq_match);
552#endif
541 553
542 for (irq = 0; irq < EXYNOS5_MAX_COMBINER_NR; irq++) { 554 for (irq = 0; irq < EXYNOS5_MAX_COMBINER_NR; irq++) {
543 combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq), 555 combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
diff --git a/arch/arm/mach-exynos/dev-dwmci.c b/arch/arm/mach-exynos/dev-dwmci.c
index b025db4bf602..79035018fb74 100644
--- a/arch/arm/mach-exynos/dev-dwmci.c
+++ b/arch/arm/mach-exynos/dev-dwmci.c
@@ -16,6 +16,7 @@
16#include <linux/dma-mapping.h> 16#include <linux/dma-mapping.h>
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/interrupt.h> 18#include <linux/interrupt.h>
19#include <linux/ioport.h>
19#include <linux/mmc/dw_mmc.h> 20#include <linux/mmc/dw_mmc.h>
20 21
21#include <plat/devs.h> 22#include <plat/devs.h>
@@ -33,16 +34,8 @@ static int exynos4_dwmci_init(u32 slot_id, irq_handler_t handler, void *data)
33} 34}
34 35
35static struct resource exynos4_dwmci_resource[] = { 36static struct resource exynos4_dwmci_resource[] = {
36 [0] = { 37 [0] = DEFINE_RES_MEM(EXYNOS4_PA_DWMCI, SZ_4K),
37 .start = EXYNOS4_PA_DWMCI, 38 [1] = DEFINE_RES_IRQ(EXYNOS4_IRQ_DWMCI),
38 .end = EXYNOS4_PA_DWMCI + SZ_4K - 1,
39 .flags = IORESOURCE_MEM,
40 },
41 [1] = {
42 .start = IRQ_DWMCI,
43 .end = IRQ_DWMCI,
44 .flags = IORESOURCE_IRQ,
45 }
46}; 39};
47 40
48static struct dw_mci_board exynos4_dwci_pdata = { 41static struct dw_mci_board exynos4_dwci_pdata = {
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h
index 9bee8535d9e0..591e78521a9f 100644
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -212,6 +212,8 @@
212#define IRQ_MFC EXYNOS4_IRQ_MFC 212#define IRQ_MFC EXYNOS4_IRQ_MFC
213#define IRQ_SDO EXYNOS4_IRQ_SDO 213#define IRQ_SDO EXYNOS4_IRQ_SDO
214 214
215#define IRQ_I2S0 EXYNOS4_IRQ_I2S0
216
215#define IRQ_ADC EXYNOS4_IRQ_ADC0 217#define IRQ_ADC EXYNOS4_IRQ_ADC0
216#define IRQ_TC EXYNOS4_IRQ_PEN0 218#define IRQ_TC EXYNOS4_IRQ_PEN0
217 219
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 024d38ff1718..6e6d11ff352a 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -89,6 +89,10 @@
89#define EXYNOS4_PA_MDMA1 0x12840000 89#define EXYNOS4_PA_MDMA1 0x12840000
90#define EXYNOS4_PA_PDMA0 0x12680000 90#define EXYNOS4_PA_PDMA0 0x12680000
91#define EXYNOS4_PA_PDMA1 0x12690000 91#define EXYNOS4_PA_PDMA1 0x12690000
92#define EXYNOS5_PA_MDMA0 0x10800000
93#define EXYNOS5_PA_MDMA1 0x11C10000
94#define EXYNOS5_PA_PDMA0 0x121A0000
95#define EXYNOS5_PA_PDMA1 0x121B0000
92 96
93#define EXYNOS4_PA_SYSMMU_MDMA 0x10A40000 97#define EXYNOS4_PA_SYSMMU_MDMA 0x10A40000
94#define EXYNOS4_PA_SYSMMU_SSS 0x10A50000 98#define EXYNOS4_PA_SYSMMU_SSS 0x10A50000
diff --git a/arch/arm/mach-exynos/include/mach/regs-clock.h b/arch/arm/mach-exynos/include/mach/regs-clock.h
index e141c1fd68d8..d9578a58ae7f 100644
--- a/arch/arm/mach-exynos/include/mach/regs-clock.h
+++ b/arch/arm/mach-exynos/include/mach/regs-clock.h
@@ -255,9 +255,15 @@
255 255
256/* For EXYNOS5250 */ 256/* For EXYNOS5250 */
257 257
258#define EXYNOS5_APLL_LOCK EXYNOS_CLKREG(0x00000)
258#define EXYNOS5_APLL_CON0 EXYNOS_CLKREG(0x00100) 259#define EXYNOS5_APLL_CON0 EXYNOS_CLKREG(0x00100)
259#define EXYNOS5_CLKSRC_CPU EXYNOS_CLKREG(0x00200) 260#define EXYNOS5_CLKSRC_CPU EXYNOS_CLKREG(0x00200)
261#define EXYNOS5_CLKMUX_STATCPU EXYNOS_CLKREG(0x00400)
260#define EXYNOS5_CLKDIV_CPU0 EXYNOS_CLKREG(0x00500) 262#define EXYNOS5_CLKDIV_CPU0 EXYNOS_CLKREG(0x00500)
263#define EXYNOS5_CLKDIV_CPU1 EXYNOS_CLKREG(0x00504)
264#define EXYNOS5_CLKDIV_STATCPU0 EXYNOS_CLKREG(0x00600)
265#define EXYNOS5_CLKDIV_STATCPU1 EXYNOS_CLKREG(0x00604)
266
261#define EXYNOS5_MPLL_CON0 EXYNOS_CLKREG(0x04100) 267#define EXYNOS5_MPLL_CON0 EXYNOS_CLKREG(0x04100)
262#define EXYNOS5_CLKSRC_CORE1 EXYNOS_CLKREG(0x04204) 268#define EXYNOS5_CLKSRC_CORE1 EXYNOS_CLKREG(0x04204)
263 269
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c
index 0d26f50081ad..4711c8920e37 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -45,7 +45,7 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
45 "exynos4210-uart.3", NULL), 45 "exynos4210-uart.3", NULL),
46 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL), 46 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL),
47 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL), 47 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL),
48 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.2", NULL), 48 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL),
49 {}, 49 {},
50}; 50};
51 51
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index b3982c867c9c..ed90aef404c3 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -112,6 +112,7 @@ static struct s3c_sdhci_platdata nuri_hsmmc0_data __initdata = {
112 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA | 112 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
113 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | 113 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
114 MMC_CAP_ERASE), 114 MMC_CAP_ERASE),
115 .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
115 .cd_type = S3C_SDHCI_CD_PERMANENT, 116 .cd_type = S3C_SDHCI_CD_PERMANENT,
116 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, 117 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
117}; 118};
@@ -307,49 +308,7 @@ static struct i2c_board_info i2c1_devs[] __initdata = {
307}; 308};
308 309
309/* TSP */ 310/* TSP */
310static u8 mxt_init_vals[] = {
311 /* MXT_GEN_COMMAND(6) */
312 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
313 /* MXT_GEN_POWER(7) */
314 0x20, 0xff, 0x32,
315 /* MXT_GEN_ACQUIRE(8) */
316 0x0a, 0x00, 0x05, 0x00, 0x00, 0x00, 0x09, 0x23,
317 /* MXT_TOUCH_MULTI(9) */
318 0x00, 0x00, 0x00, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x02, 0x00,
319 0x00, 0x01, 0x01, 0x0e, 0x0a, 0x0a, 0x0a, 0x0a, 0x00, 0x00,
320 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
321 0x00,
322 /* MXT_TOUCH_KEYARRAY(15) */
323 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
324 0x00,
325 /* MXT_SPT_GPIOPWM(19) */
326 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
327 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
328 /* MXT_PROCI_GRIPFACE(20) */
329 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x28, 0x04,
330 0x0f, 0x0a,
331 /* MXT_PROCG_NOISE(22) */
332 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x23, 0x00,
333 0x00, 0x05, 0x0f, 0x19, 0x23, 0x2d, 0x03,
334 /* MXT_TOUCH_PROXIMITY(23) */
335 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
336 0x00, 0x00, 0x00, 0x00, 0x00,
337 /* MXT_PROCI_ONETOUCH(24) */
338 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
339 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
340 /* MXT_SPT_SELFTEST(25) */
341 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
342 0x00, 0x00, 0x00, 0x00,
343 /* MXT_PROCI_TWOTOUCH(27) */
344 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
345 /* MXT_SPT_CTECONFIG(28) */
346 0x00, 0x00, 0x02, 0x08, 0x10, 0x00,
347};
348
349static struct mxt_platform_data mxt_platform_data = { 311static struct mxt_platform_data mxt_platform_data = {
350 .config = mxt_init_vals,
351 .config_length = ARRAY_SIZE(mxt_init_vals),
352
353 .x_line = 18, 312 .x_line = 18,
354 .y_line = 11, 313 .y_line = 11,
355 .x_size = 1024, 314 .x_size = 1024,
@@ -571,7 +530,7 @@ static struct regulator_init_data __initdata max8997_ldo7_data = {
571 530
572static struct regulator_init_data __initdata max8997_ldo8_data = { 531static struct regulator_init_data __initdata max8997_ldo8_data = {
573 .constraints = { 532 .constraints = {
574 .name = "VUSB/VDAC_3.3V_C210", 533 .name = "VUSB+VDAC_3.3V_C210",
575 .min_uV = 3300000, 534 .min_uV = 3300000,
576 .max_uV = 3300000, 535 .max_uV = 3300000,
577 .valid_ops_mask = REGULATOR_CHANGE_STATUS, 536 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
@@ -1347,6 +1306,7 @@ static struct platform_device *nuri_devices[] __initdata = {
1347 1306
1348static void __init nuri_map_io(void) 1307static void __init nuri_map_io(void)
1349{ 1308{
1309 clk_xusbxti.rate = 24000000;
1350 exynos_init_io(NULL, 0); 1310 exynos_init_io(NULL, 0);
1351 s3c24xx_init_clocks(24000000); 1311 s3c24xx_init_clocks(24000000);
1352 s3c24xx_init_uarts(nuri_uartcfgs, ARRAY_SIZE(nuri_uartcfgs)); 1312 s3c24xx_init_uarts(nuri_uartcfgs, ARRAY_SIZE(nuri_uartcfgs));
@@ -1379,7 +1339,6 @@ static void __init nuri_machine_init(void)
1379 nuri_camera_init(); 1339 nuri_camera_init();
1380 1340
1381 nuri_ehci_init(); 1341 nuri_ehci_init();
1382 clk_xusbxti.rate = 24000000;
1383 1342
1384 /* Last */ 1343 /* Last */
1385 platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices)); 1344 platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices));
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index 6bb9dbdd73fd..a34036eb8ba2 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -29,6 +29,7 @@
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30 30
31#include <plat/regs-serial.h> 31#include <plat/regs-serial.h>
32#include <plat/clock.h>
32#include <plat/cpu.h> 33#include <plat/cpu.h>
33#include <plat/devs.h> 34#include <plat/devs.h>
34#include <plat/iic.h> 35#include <plat/iic.h>
@@ -39,6 +40,7 @@
39#include <plat/pd.h> 40#include <plat/pd.h>
40#include <plat/regs-fb-v4.h> 41#include <plat/regs-fb-v4.h>
41#include <plat/fimc-core.h> 42#include <plat/fimc-core.h>
43#include <plat/s5p-time.h>
42#include <plat/camport.h> 44#include <plat/camport.h>
43#include <plat/mipi_csis.h> 45#include <plat/mipi_csis.h>
44 46
@@ -746,6 +748,7 @@ static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
746 .max_width = 8, 748 .max_width = 8,
747 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA | 749 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
748 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), 750 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
751 .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
749 .cd_type = S3C_SDHCI_CD_PERMANENT, 752 .cd_type = S3C_SDHCI_CD_PERMANENT,
750 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, 753 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
751}; 754};
@@ -1057,9 +1060,11 @@ static struct platform_device *universal_devices[] __initdata = {
1057 1060
1058static void __init universal_map_io(void) 1061static void __init universal_map_io(void)
1059{ 1062{
1063 clk_xusbxti.rate = 24000000;
1060 exynos_init_io(NULL, 0); 1064 exynos_init_io(NULL, 0);
1061 s3c24xx_init_clocks(24000000); 1065 s3c24xx_init_clocks(24000000);
1062 s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs)); 1066 s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
1067 s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
1063} 1068}
1064 1069
1065static void s5p_tv_setup(void) 1070static void s5p_tv_setup(void)
@@ -1110,7 +1115,7 @@ MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
1110 .map_io = universal_map_io, 1115 .map_io = universal_map_io,
1111 .handle_irq = gic_handle_irq, 1116 .handle_irq = gic_handle_irq,
1112 .init_machine = universal_machine_init, 1117 .init_machine = universal_machine_init,
1113 .timer = &exynos4_timer, 1118 .timer = &s5p_timer,
1114 .reserve = &universal_reserve, 1119 .reserve = &universal_reserve,
1115 .restart = exynos4_restart, 1120 .restart = exynos4_restart,
1116MACHINE_END 1121MACHINE_END
diff --git a/arch/arm/mach-imx/imx27-dt.c b/arch/arm/mach-imx/imx27-dt.c
index 861ceb8232d6..ed38d03c61f2 100644
--- a/arch/arm/mach-imx/imx27-dt.c
+++ b/arch/arm/mach-imx/imx27-dt.c
@@ -35,7 +35,7 @@ static const struct of_dev_auxdata imx27_auxdata_lookup[] __initconst = {
35static int __init imx27_avic_add_irq_domain(struct device_node *np, 35static int __init imx27_avic_add_irq_domain(struct device_node *np,
36 struct device_node *interrupt_parent) 36 struct device_node *interrupt_parent)
37{ 37{
38 irq_domain_add_simple(np, 0); 38 irq_domain_add_legacy(np, 64, 0, 0, &irq_domain_simple_ops, NULL);
39 return 0; 39 return 0;
40} 40}
41 41
@@ -44,7 +44,9 @@ static int __init imx27_gpio_add_irq_domain(struct device_node *np,
44{ 44{
45 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS; 45 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
46 46
47 irq_domain_add_simple(np, gpio_irq_base); 47 gpio_irq_base -= 32;
48 irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops,
49 NULL);
48 50
49 return 0; 51 return 0;
50} 52}
diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c
index 05250aed61fb..e10f3914fcfe 100644
--- a/arch/arm/mach-imx/mm-imx5.c
+++ b/arch/arm/mach-imx/mm-imx5.c
@@ -35,7 +35,7 @@ static void imx5_idle(void)
35 } 35 }
36 clk_enable(gpc_dvfs_clk); 36 clk_enable(gpc_dvfs_clk);
37 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); 37 mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
38 if (tzic_enable_wake() != 0) 38 if (!tzic_enable_wake())
39 cpu_do_idle(); 39 cpu_do_idle();
40 clk_disable(gpc_dvfs_clk); 40 clk_disable(gpc_dvfs_clk);
41} 41}
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index 1c672d9e6656..f7fe1b9f3170 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -14,6 +14,7 @@
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/of.h> 15#include <linux/of.h>
16#include <linux/of_platform.h> 16#include <linux/of_platform.h>
17#include <linux/kexec.h>
17#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
18#include <asm/mach/map.h> 19#include <asm/mach/map.h>
19#include <mach/bridge-regs.h> 20#include <mach/bridge-regs.h>
diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c
index 3698a370d636..26aac363a064 100644
--- a/arch/arm/mach-msm/board-halibut.c
+++ b/arch/arm/mach-msm/board-halibut.c
@@ -86,9 +86,6 @@ static void __init halibut_init(void)
86static void __init halibut_fixup(struct tag *tags, char **cmdline, 86static void __init halibut_fixup(struct tag *tags, char **cmdline,
87 struct meminfo *mi) 87 struct meminfo *mi)
88{ 88{
89 mi->nr_banks=1;
90 mi->bank[0].start = PHYS_OFFSET;
91 mi->bank[0].size = (101*1024*1024);
92} 89}
93 90
94static void __init halibut_map_io(void) 91static void __init halibut_map_io(void)
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index 962e71169750..fb3496a52ef4 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -17,6 +17,7 @@
17#include <linux/irqdomain.h> 17#include <linux/irqdomain.h>
18#include <linux/of.h> 18#include <linux/of.h>
19#include <linux/of_address.h> 19#include <linux/of_address.h>
20#include <linux/of_irq.h>
20#include <linux/of_platform.h> 21#include <linux/of_platform.h>
21#include <linux/memblock.h> 22#include <linux/memblock.h>
22 23
@@ -49,10 +50,22 @@ static void __init msm8x60_map_io(void)
49 msm_map_msm8x60_io(); 50 msm_map_msm8x60_io();
50} 51}
51 52
53#ifdef CONFIG_OF
54static struct of_device_id msm_dt_gic_match[] __initdata = {
55 { .compatible = "qcom,msm-8660-qgic", .data = gic_of_init },
56 {}
57};
58#endif
59
52static void __init msm8x60_init_irq(void) 60static void __init msm8x60_init_irq(void)
53{ 61{
54 gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE, 62 if (!of_have_populated_dt())
55 (void *)MSM_QGIC_CPU_BASE); 63 gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
64 (void *)MSM_QGIC_CPU_BASE);
65#ifdef CONFIG_OF
66 else
67 of_irq_init(msm_dt_gic_match);
68#endif
56 69
57 /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */ 70 /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
58 writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4); 71 writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
@@ -73,16 +86,8 @@ static struct of_dev_auxdata msm_auxdata_lookup[] __initdata = {
73 {} 86 {}
74}; 87};
75 88
76static struct of_device_id msm_dt_gic_match[] __initdata = {
77 { .compatible = "qcom,msm-8660-qgic", },
78 {}
79};
80
81static void __init msm8x60_dt_init(void) 89static void __init msm8x60_dt_init(void)
82{ 90{
83 irq_domain_generate_simple(msm_dt_gic_match, MSM8X60_QGIC_DIST_PHYS,
84 GIC_SPI_START);
85
86 if (of_machine_is_compatible("qcom,msm8660-surf")) { 91 if (of_machine_is_compatible("qcom,msm8660-surf")) {
87 printk(KERN_INFO "Init surf UART registers\n"); 92 printk(KERN_INFO "Init surf UART registers\n");
88 msm8x60_init_uart12dm(); 93 msm8x60_init_uart12dm();
diff --git a/arch/arm/mach-msm/board-trout-panel.c b/arch/arm/mach-msm/board-trout-panel.c
index 25105c1027fe..89bf6b426699 100644
--- a/arch/arm/mach-msm/board-trout-panel.c
+++ b/arch/arm/mach-msm/board-trout-panel.c
@@ -12,6 +12,7 @@
12 12
13#include <asm/io.h> 13#include <asm/io.h>
14#include <asm/mach-types.h> 14#include <asm/mach-types.h>
15#include <asm/system_info.h>
15 16
16#include <mach/msm_fb.h> 17#include <mach/msm_fb.h>
17#include <mach/vreg.h> 18#include <mach/vreg.h>
diff --git a/arch/arm/mach-msm/board-trout.c b/arch/arm/mach-msm/board-trout.c
index 5414f76ec0a9..d4060a37e23d 100644
--- a/arch/arm/mach-msm/board-trout.c
+++ b/arch/arm/mach-msm/board-trout.c
@@ -19,6 +19,7 @@
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/clkdev.h> 20#include <linux/clkdev.h>
21 21
22#include <asm/system_info.h>
22#include <asm/mach-types.h> 23#include <asm/mach-types.h>
23#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
24#include <asm/mach/map.h> 25#include <asm/mach/map.h>
diff --git a/arch/arm/mach-msm/proc_comm.c b/arch/arm/mach-msm/proc_comm.c
index 67e701c7f183..9980dc736e7b 100644
--- a/arch/arm/mach-msm/proc_comm.c
+++ b/arch/arm/mach-msm/proc_comm.c
@@ -121,7 +121,7 @@ int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2)
121 * and unknown state. This function should be called early to 121 * and unknown state. This function should be called early to
122 * wait on the ARM9. 122 * wait on the ARM9.
123 */ 123 */
124void __init proc_comm_boot_wait(void) 124void __devinit proc_comm_boot_wait(void)
125{ 125{
126 void __iomem *base = MSM_SHARED_RAM_BASE; 126 void __iomem *base = MSM_SHARED_RAM_BASE;
127 127
diff --git a/arch/arm/mach-omap1/ams-delta-fiq.c b/arch/arm/mach-omap1/ams-delta-fiq.c
index fcce7ff37630..cfd98b186fcc 100644
--- a/arch/arm/mach-omap1/ams-delta-fiq.c
+++ b/arch/arm/mach-omap1/ams-delta-fiq.c
@@ -48,7 +48,7 @@ static irqreturn_t deferred_fiq(int irq, void *dev_id)
48 struct irq_chip *irq_chip = NULL; 48 struct irq_chip *irq_chip = NULL;
49 int gpio, irq_num, fiq_count; 49 int gpio, irq_num, fiq_count;
50 50
51 irq_desc = irq_to_desc(IH_GPIO_BASE); 51 irq_desc = irq_to_desc(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK));
52 if (irq_desc) 52 if (irq_desc)
53 irq_chip = irq_desc->irq_data.chip; 53 irq_chip = irq_desc->irq_data.chip;
54 54
diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c
index 087dba0df47e..e9cc52d4cb28 100644
--- a/arch/arm/mach-omap1/mux.c
+++ b/arch/arm/mach-omap1/mux.c
@@ -27,6 +27,7 @@
27#include <linux/io.h> 27#include <linux/io.h>
28#include <linux/spinlock.h> 28#include <linux/spinlock.h>
29 29
30#include <mach/hardware.h>
30 31
31#include <plat/mux.h> 32#include <plat/mux.h>
32 33
diff --git a/arch/arm/mach-omap1/timer.c b/arch/arm/mach-omap1/timer.c
index 6e90665a7c47..fb202af01d0d 100644
--- a/arch/arm/mach-omap1/timer.c
+++ b/arch/arm/mach-omap1/timer.c
@@ -47,9 +47,9 @@ static int omap1_dm_timer_set_src(struct platform_device *pdev,
47 int n = (pdev->id - 1) << 1; 47 int n = (pdev->id - 1) << 1;
48 u32 l; 48 u32 l;
49 49
50 l = __raw_readl(MOD_CONF_CTRL_1) & ~(0x03 << n); 50 l = omap_readl(MOD_CONF_CTRL_1) & ~(0x03 << n);
51 l |= source << n; 51 l |= source << n;
52 __raw_writel(l, MOD_CONF_CTRL_1); 52 omap_writel(l, MOD_CONF_CTRL_1);
53 53
54 return 0; 54 return 0;
55} 55}
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index a39fc4bbd2b8..130ab00c09a2 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -20,6 +20,7 @@
20#include <linux/usb/otg.h> 20#include <linux/usb/otg.h>
21#include <linux/spi/spi.h> 21#include <linux/spi/spi.h>
22#include <linux/i2c/twl.h> 22#include <linux/i2c/twl.h>
23#include <linux/mfd/twl6040.h>
23#include <linux/gpio_keys.h> 24#include <linux/gpio_keys.h>
24#include <linux/regulator/machine.h> 25#include <linux/regulator/machine.h>
25#include <linux/regulator/fixed.h> 26#include <linux/regulator/fixed.h>
@@ -560,7 +561,7 @@ static struct regulator_init_data sdp4430_vusim = {
560 }, 561 },
561}; 562};
562 563
563static struct twl4030_codec_data twl6040_codec = { 564static struct twl6040_codec_data twl6040_codec = {
564 /* single-step ramp for headset and handsfree */ 565 /* single-step ramp for headset and handsfree */
565 .hs_left_step = 0x0f, 566 .hs_left_step = 0x0f,
566 .hs_right_step = 0x0f, 567 .hs_right_step = 0x0f,
@@ -568,7 +569,7 @@ static struct twl4030_codec_data twl6040_codec = {
568 .hf_right_step = 0x1d, 569 .hf_right_step = 0x1d,
569}; 570};
570 571
571static struct twl4030_vibra_data twl6040_vibra = { 572static struct twl6040_vibra_data twl6040_vibra = {
572 .vibldrv_res = 8, 573 .vibldrv_res = 8,
573 .vibrdrv_res = 3, 574 .vibrdrv_res = 3,
574 .viblmotor_res = 10, 575 .viblmotor_res = 10,
@@ -577,16 +578,14 @@ static struct twl4030_vibra_data twl6040_vibra = {
577 .vddvibr_uV = 0, /* fixed volt supply - VBAT */ 578 .vddvibr_uV = 0, /* fixed volt supply - VBAT */
578}; 579};
579 580
580static struct twl4030_audio_data twl6040_audio = { 581static struct twl6040_platform_data twl6040_data = {
581 .codec = &twl6040_codec, 582 .codec = &twl6040_codec,
582 .vibra = &twl6040_vibra, 583 .vibra = &twl6040_vibra,
583 .audpwron_gpio = 127, 584 .audpwron_gpio = 127,
584 .naudint_irq = OMAP44XX_IRQ_SYS_2N,
585 .irq_base = TWL6040_CODEC_IRQ_BASE, 585 .irq_base = TWL6040_CODEC_IRQ_BASE,
586}; 586};
587 587
588static struct twl4030_platform_data sdp4430_twldata = { 588static struct twl4030_platform_data sdp4430_twldata = {
589 .audio = &twl6040_audio,
590 /* Regulators */ 589 /* Regulators */
591 .vusim = &sdp4430_vusim, 590 .vusim = &sdp4430_vusim,
592 .vaux1 = &sdp4430_vaux1, 591 .vaux1 = &sdp4430_vaux1,
@@ -617,7 +616,8 @@ static int __init omap4_i2c_init(void)
617 TWL_COMMON_REGULATOR_VCXIO | 616 TWL_COMMON_REGULATOR_VCXIO |
618 TWL_COMMON_REGULATOR_VUSB | 617 TWL_COMMON_REGULATOR_VUSB |
619 TWL_COMMON_REGULATOR_CLK32KG); 618 TWL_COMMON_REGULATOR_CLK32KG);
620 omap4_pmic_init("twl6030", &sdp4430_twldata); 619 omap4_pmic_init("twl6030", &sdp4430_twldata,
620 &twl6040_data, OMAP44XX_IRQ_SYS_2N);
621 omap_register_i2c_bus(2, 400, NULL, 0); 621 omap_register_i2c_bus(2, 400, NULL, 0);
622 omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo, 622 omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo,
623 ARRAY_SIZE(sdp4430_i2c_3_boardinfo)); 623 ARRAY_SIZE(sdp4430_i2c_3_boardinfo));
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 74e1687b5170..098d183a0086 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -137,7 +137,7 @@ static struct twl4030_platform_data sdp4430_twldata = {
137 137
138static void __init omap4_i2c_init(void) 138static void __init omap4_i2c_init(void)
139{ 139{
140 omap4_pmic_init("twl6030", &sdp4430_twldata); 140 omap4_pmic_init("twl6030", &sdp4430_twldata, NULL, 0);
141} 141}
142 142
143static void __init omap4_init(void) 143static void __init omap4_init(void)
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 930c0d380435..740cee9369ba 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -641,7 +641,7 @@ static struct regulator_consumer_supply dummy_supplies[] = {
641 641
642static void __init igep_init(void) 642static void __init igep_init(void)
643{ 643{
644 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); 644 regulator_register_fixed(1, dummy_supplies, ARRAY_SIZE(dummy_supplies));
645 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 645 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
646 646
647 /* Get IGEP2 hardware revision */ 647 /* Get IGEP2 hardware revision */
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index d8c0e89f0126..1b782ba53433 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -25,6 +25,7 @@
25#include <linux/gpio.h> 25#include <linux/gpio.h>
26#include <linux/usb/otg.h> 26#include <linux/usb/otg.h>
27#include <linux/i2c/twl.h> 27#include <linux/i2c/twl.h>
28#include <linux/mfd/twl6040.h>
28#include <linux/regulator/machine.h> 29#include <linux/regulator/machine.h>
29#include <linux/regulator/fixed.h> 30#include <linux/regulator/fixed.h>
30#include <linux/wl12xx.h> 31#include <linux/wl12xx.h>
@@ -284,7 +285,7 @@ static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)
284 return 0; 285 return 0;
285} 286}
286 287
287static struct twl4030_codec_data twl6040_codec = { 288static struct twl6040_codec_data twl6040_codec = {
288 /* single-step ramp for headset and handsfree */ 289 /* single-step ramp for headset and handsfree */
289 .hs_left_step = 0x0f, 290 .hs_left_step = 0x0f,
290 .hs_right_step = 0x0f, 291 .hs_right_step = 0x0f,
@@ -292,17 +293,14 @@ static struct twl4030_codec_data twl6040_codec = {
292 .hf_right_step = 0x1d, 293 .hf_right_step = 0x1d,
293}; 294};
294 295
295static struct twl4030_audio_data twl6040_audio = { 296static struct twl6040_platform_data twl6040_data = {
296 .codec = &twl6040_codec, 297 .codec = &twl6040_codec,
297 .audpwron_gpio = 127, 298 .audpwron_gpio = 127,
298 .naudint_irq = OMAP44XX_IRQ_SYS_2N,
299 .irq_base = TWL6040_CODEC_IRQ_BASE, 299 .irq_base = TWL6040_CODEC_IRQ_BASE,
300}; 300};
301 301
302/* Panda board uses the common PMIC configuration */ 302/* Panda board uses the common PMIC configuration */
303static struct twl4030_platform_data omap4_panda_twldata = { 303static struct twl4030_platform_data omap4_panda_twldata;
304 .audio = &twl6040_audio,
305};
306 304
307/* 305/*
308 * Display monitor features are burnt in their EEPROM as EDID data. The EEPROM 306 * Display monitor features are burnt in their EEPROM as EDID data. The EEPROM
@@ -326,7 +324,8 @@ static int __init omap4_panda_i2c_init(void)
326 TWL_COMMON_REGULATOR_VCXIO | 324 TWL_COMMON_REGULATOR_VCXIO |
327 TWL_COMMON_REGULATOR_VUSB | 325 TWL_COMMON_REGULATOR_VUSB |
328 TWL_COMMON_REGULATOR_CLK32KG); 326 TWL_COMMON_REGULATOR_CLK32KG);
329 omap4_pmic_init("twl6030", &omap4_panda_twldata); 327 omap4_pmic_init("twl6030", &omap4_panda_twldata,
328 &twl6040_data, OMAP44XX_IRQ_SYS_2N);
330 omap_register_i2c_bus(2, 400, NULL, 0); 329 omap_register_i2c_bus(2, 400, NULL, 0);
331 /* 330 /*
332 * Bus 3 is attached to the DVI port where devices like the pico DLP 331 * Bus 3 is attached to the DVI port where devices like the pico DLP
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
index 7072e0d651b1..3d9d746b221a 100644
--- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
+++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
@@ -165,83 +165,3 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate)
165 165
166 return 0; 166 return 0;
167} 167}
168
169#ifdef CONFIG_CPU_FREQ
170/*
171 * Walk PRCM rate table and fillout cpufreq freq_table
172 * XXX This should be replaced by an OPP layer in the near future
173 */
174static struct cpufreq_frequency_table *freq_table;
175
176void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table)
177{
178 const struct prcm_config *prcm;
179 int i = 0;
180 int tbl_sz = 0;
181
182 if (!cpu_is_omap24xx())
183 return;
184
185 for (prcm = rate_table; prcm->mpu_speed; prcm++) {
186 if (!(prcm->flags & cpu_mask))
187 continue;
188 if (prcm->xtal_speed != sclk->rate)
189 continue;
190
191 /* don't put bypass rates in table */
192 if (prcm->dpll_speed == prcm->xtal_speed)
193 continue;
194
195 tbl_sz++;
196 }
197
198 /*
199 * XXX Ensure that we're doing what CPUFreq expects for this error
200 * case and the following one
201 */
202 if (tbl_sz == 0) {
203 pr_warning("%s: no matching entries in rate_table\n",
204 __func__);
205 return;
206 }
207
208 /* Include the CPUFREQ_TABLE_END terminator entry */
209 tbl_sz++;
210
211 freq_table = kzalloc(sizeof(struct cpufreq_frequency_table) * tbl_sz,
212 GFP_ATOMIC);
213 if (!freq_table) {
214 pr_err("%s: could not kzalloc frequency table\n", __func__);
215 return;
216 }
217
218 for (prcm = rate_table; prcm->mpu_speed; prcm++) {
219 if (!(prcm->flags & cpu_mask))
220 continue;
221 if (prcm->xtal_speed != sclk->rate)
222 continue;
223
224 /* don't put bypass rates in table */
225 if (prcm->dpll_speed == prcm->xtal_speed)
226 continue;
227
228 freq_table[i].index = i;
229 freq_table[i].frequency = prcm->mpu_speed / 1000;
230 i++;
231 }
232
233 freq_table[i].index = i;
234 freq_table[i].frequency = CPUFREQ_TABLE_END;
235
236 *table = &freq_table[0];
237}
238
239void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table)
240{
241 if (!cpu_is_omap24xx())
242 return;
243
244 kfree(freq_table);
245}
246
247#endif
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index f57ed5baeccf..d9f4931513f9 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -536,10 +536,5 @@ struct clk_functions omap2_clk_functions = {
536 .clk_set_rate = omap2_clk_set_rate, 536 .clk_set_rate = omap2_clk_set_rate,
537 .clk_set_parent = omap2_clk_set_parent, 537 .clk_set_parent = omap2_clk_set_parent,
538 .clk_disable_unused = omap2_clk_disable_unused, 538 .clk_disable_unused = omap2_clk_disable_unused,
539#ifdef CONFIG_CPU_FREQ
540 /* These will be removed when the OPP code is integrated */
541 .clk_init_cpufreq_table = omap2_clk_init_cpufreq_table,
542 .clk_exit_cpufreq_table = omap2_clk_exit_cpufreq_table,
543#endif
544}; 539};
545 540
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index b8c2a686481c..a1bb23a23351 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -146,14 +146,6 @@ extern const struct clksel_rate gpt_sys_rates[];
146extern const struct clksel_rate gfx_l3_rates[]; 146extern const struct clksel_rate gfx_l3_rates[];
147extern const struct clksel_rate dsp_ick_rates[]; 147extern const struct clksel_rate dsp_ick_rates[];
148 148
149#if defined(CONFIG_ARCH_OMAP2) && defined(CONFIG_CPU_FREQ)
150extern void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
151extern void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table);
152#else
153#define omap2_clk_init_cpufreq_table 0
154#define omap2_clk_exit_cpufreq_table 0
155#endif
156
157extern const struct clkops clkops_omap2_iclk_dflt_wait; 149extern const struct clkops clkops_omap2_iclk_dflt_wait;
158extern const struct clkops clkops_omap2_iclk_dflt; 150extern const struct clkops clkops_omap2_iclk_dflt;
159extern const struct clkops clkops_omap2_iclk_idle_only; 151extern const struct clkops clkops_omap2_iclk_idle_only;
diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
index 1e2d3322f33e..c88420de1151 100644
--- a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
+++ b/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
@@ -941,10 +941,10 @@
941#define OMAP4_DSI2_LANEENABLE_MASK (0x7 << 29) 941#define OMAP4_DSI2_LANEENABLE_MASK (0x7 << 29)
942#define OMAP4_DSI1_LANEENABLE_SHIFT 24 942#define OMAP4_DSI1_LANEENABLE_SHIFT 24
943#define OMAP4_DSI1_LANEENABLE_MASK (0x1f << 24) 943#define OMAP4_DSI1_LANEENABLE_MASK (0x1f << 24)
944#define OMAP4_DSI2_PIPD_SHIFT 19 944#define OMAP4_DSI1_PIPD_SHIFT 19
945#define OMAP4_DSI2_PIPD_MASK (0x1f << 19) 945#define OMAP4_DSI1_PIPD_MASK (0x1f << 19)
946#define OMAP4_DSI1_PIPD_SHIFT 14 946#define OMAP4_DSI2_PIPD_SHIFT 14
947#define OMAP4_DSI1_PIPD_MASK (0x1f << 14) 947#define OMAP4_DSI2_PIPD_MASK (0x1f << 14)
948 948
949/* CONTROL_MCBSPLP */ 949/* CONTROL_MCBSPLP */
950#define OMAP4_ALBCTRLRX_FSX_SHIFT 31 950#define OMAP4_ALBCTRLRX_FSX_SHIFT 31
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 2c27fdb61e66..7144ae651d3d 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1422,6 +1422,9 @@ static int _ocp_softreset(struct omap_hwmod *oh)
1422 goto dis_opt_clks; 1422 goto dis_opt_clks;
1423 _write_sysconfig(v, oh); 1423 _write_sysconfig(v, oh);
1424 1424
1425 if (oh->class->sysc->srst_udelay)
1426 udelay(oh->class->sysc->srst_udelay);
1427
1425 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS) 1428 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
1426 omap_test_timeout((omap_hwmod_read(oh, 1429 omap_test_timeout((omap_hwmod_read(oh,
1427 oh->class->sysc->syss_offs) 1430 oh->class->sysc->syss_offs)
@@ -1903,10 +1906,20 @@ void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
1903 */ 1906 */
1904int omap_hwmod_softreset(struct omap_hwmod *oh) 1907int omap_hwmod_softreset(struct omap_hwmod *oh)
1905{ 1908{
1906 if (!oh) 1909 u32 v;
1910 int ret;
1911
1912 if (!oh || !(oh->_sysc_cache))
1907 return -EINVAL; 1913 return -EINVAL;
1908 1914
1909 return _ocp_softreset(oh); 1915 v = oh->_sysc_cache;
1916 ret = _set_softreset(oh, &v);
1917 if (ret)
1918 goto error;
1919 _write_sysconfig(v, oh);
1920
1921error:
1922 return ret;
1910} 1923}
1911 1924
1912/** 1925/**
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index a5409ce3f323..a6bde34e443a 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -1000,7 +1000,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = {
1000 .flags = OMAP_FIREWALL_L4, 1000 .flags = OMAP_FIREWALL_L4,
1001 } 1001 }
1002 }, 1002 },
1003 .flags = OCPIF_SWSUP_IDLE,
1004 .user = OCP_USER_MPU | OCP_USER_SDMA, 1003 .user = OCP_USER_MPU | OCP_USER_SDMA,
1005}; 1004};
1006 1005
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index c4f56cb60d7d..04a3885f4475 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -1049,7 +1049,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = {
1049 .slave = &omap2430_dss_venc_hwmod, 1049 .slave = &omap2430_dss_venc_hwmod,
1050 .clk = "dss_ick", 1050 .clk = "dss_ick",
1051 .addr = omap2_dss_venc_addrs, 1051 .addr = omap2_dss_venc_addrs,
1052 .flags = OCPIF_SWSUP_IDLE,
1053 .user = OCP_USER_MPU | OCP_USER_SDMA, 1052 .user = OCP_USER_MPU | OCP_USER_SDMA,
1054}; 1053};
1055 1054
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 34b9766d1d23..db86ce90c69f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1676,7 +1676,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = {
1676 .flags = OMAP_FIREWALL_L4, 1676 .flags = OMAP_FIREWALL_L4,
1677 } 1677 }
1678 }, 1678 },
1679 .flags = OCPIF_SWSUP_IDLE,
1680 .user = OCP_USER_MPU | OCP_USER_SDMA, 1679 .user = OCP_USER_MPU | OCP_USER_SDMA,
1681}; 1680};
1682 1681
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index cc9bd106a854..6abc75753e42 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -2594,6 +2594,15 @@ static struct omap_hwmod omap44xx_ipu_hwmod = {
2594static struct omap_hwmod_class_sysconfig omap44xx_iss_sysc = { 2594static struct omap_hwmod_class_sysconfig omap44xx_iss_sysc = {
2595 .rev_offs = 0x0000, 2595 .rev_offs = 0x0000,
2596 .sysc_offs = 0x0010, 2596 .sysc_offs = 0x0010,
2597 /*
2598 * ISS needs 100 OCP clk cycles delay after a softreset before
2599 * accessing sysconfig again.
2600 * The lowest frequency at the moment for L3 bus is 100 MHz, so
2601 * 1usec delay is needed. Add an x2 margin to be safe (2 usecs).
2602 *
2603 * TODO: Indicate errata when available.
2604 */
2605 .srst_udelay = 2,
2597 .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS | 2606 .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS |
2598 SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), 2607 SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
2599 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | 2608 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 0cdd359a128e..9fc2f44188cb 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -108,8 +108,14 @@ static void omap_uart_set_noidle(struct platform_device *pdev)
108static void omap_uart_set_smartidle(struct platform_device *pdev) 108static void omap_uart_set_smartidle(struct platform_device *pdev)
109{ 109{
110 struct omap_device *od = to_omap_device(pdev); 110 struct omap_device *od = to_omap_device(pdev);
111 u8 idlemode;
111 112
112 omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_SMART); 113 if (od->hwmods[0]->class->sysc->idlemodes & SIDLE_SMART_WKUP)
114 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
115 else
116 idlemode = HWMOD_IDLEMODE_SMART;
117
118 omap_hwmod_set_slave_idlemode(od->hwmods[0], idlemode);
113} 119}
114 120
115#else 121#else
@@ -120,124 +126,8 @@ static void omap_uart_set_smartidle(struct platform_device *pdev) {}
120#endif /* CONFIG_PM */ 126#endif /* CONFIG_PM */
121 127
122#ifdef CONFIG_OMAP_MUX 128#ifdef CONFIG_OMAP_MUX
123static struct omap_device_pad default_uart1_pads[] __initdata = {
124 {
125 .name = "uart1_cts.uart1_cts",
126 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
127 },
128 {
129 .name = "uart1_rts.uart1_rts",
130 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
131 },
132 {
133 .name = "uart1_tx.uart1_tx",
134 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
135 },
136 {
137 .name = "uart1_rx.uart1_rx",
138 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
139 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
140 .idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
141 },
142};
143
144static struct omap_device_pad default_uart2_pads[] __initdata = {
145 {
146 .name = "uart2_cts.uart2_cts",
147 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
148 },
149 {
150 .name = "uart2_rts.uart2_rts",
151 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
152 },
153 {
154 .name = "uart2_tx.uart2_tx",
155 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
156 },
157 {
158 .name = "uart2_rx.uart2_rx",
159 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
160 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
161 .idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
162 },
163};
164
165static struct omap_device_pad default_uart3_pads[] __initdata = {
166 {
167 .name = "uart3_cts_rctx.uart3_cts_rctx",
168 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
169 },
170 {
171 .name = "uart3_rts_sd.uart3_rts_sd",
172 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
173 },
174 {
175 .name = "uart3_tx_irtx.uart3_tx_irtx",
176 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
177 },
178 {
179 .name = "uart3_rx_irrx.uart3_rx_irrx",
180 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
181 .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
182 .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
183 },
184};
185
186static struct omap_device_pad default_omap36xx_uart4_pads[] __initdata = {
187 {
188 .name = "gpmc_wait2.uart4_tx",
189 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
190 },
191 {
192 .name = "gpmc_wait3.uart4_rx",
193 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
194 .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE2,
195 .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE2,
196 },
197};
198
199static struct omap_device_pad default_omap4_uart4_pads[] __initdata = {
200 {
201 .name = "uart4_tx.uart4_tx",
202 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
203 },
204 {
205 .name = "uart4_rx.uart4_rx",
206 .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
207 .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
208 .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
209 },
210};
211
212static void omap_serial_fill_default_pads(struct omap_board_data *bdata) 129static void omap_serial_fill_default_pads(struct omap_board_data *bdata)
213{ 130{
214 switch (bdata->id) {
215 case 0:
216 bdata->pads = default_uart1_pads;
217 bdata->pads_cnt = ARRAY_SIZE(default_uart1_pads);
218 break;
219 case 1:
220 bdata->pads = default_uart2_pads;
221 bdata->pads_cnt = ARRAY_SIZE(default_uart2_pads);
222 break;
223 case 2:
224 bdata->pads = default_uart3_pads;
225 bdata->pads_cnt = ARRAY_SIZE(default_uart3_pads);
226 break;
227 case 3:
228 if (cpu_is_omap44xx()) {
229 bdata->pads = default_omap4_uart4_pads;
230 bdata->pads_cnt =
231 ARRAY_SIZE(default_omap4_uart4_pads);
232 } else if (cpu_is_omap3630()) {
233 bdata->pads = default_omap36xx_uart4_pads;
234 bdata->pads_cnt =
235 ARRAY_SIZE(default_omap36xx_uart4_pads);
236 }
237 break;
238 default:
239 break;
240 }
241} 131}
242#else 132#else
243static void omap_serial_fill_default_pads(struct omap_board_data *bdata) {} 133static void omap_serial_fill_default_pads(struct omap_board_data *bdata) {}
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 4b57757bf9d1..7a7b89304c48 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -37,6 +37,16 @@ static struct i2c_board_info __initdata pmic_i2c_board_info = {
37 .flags = I2C_CLIENT_WAKE, 37 .flags = I2C_CLIENT_WAKE,
38}; 38};
39 39
40static struct i2c_board_info __initdata omap4_i2c1_board_info[] = {
41 {
42 .addr = 0x48,
43 .flags = I2C_CLIENT_WAKE,
44 },
45 {
46 I2C_BOARD_INFO("twl6040", 0x4b),
47 },
48};
49
40void __init omap_pmic_init(int bus, u32 clkrate, 50void __init omap_pmic_init(int bus, u32 clkrate,
41 const char *pmic_type, int pmic_irq, 51 const char *pmic_type, int pmic_irq,
42 struct twl4030_platform_data *pmic_data) 52 struct twl4030_platform_data *pmic_data)
@@ -49,14 +59,31 @@ void __init omap_pmic_init(int bus, u32 clkrate,
49 omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); 59 omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
50} 60}
51 61
62void __init omap4_pmic_init(const char *pmic_type,
63 struct twl4030_platform_data *pmic_data,
64 struct twl6040_platform_data *twl6040_data, int twl6040_irq)
65{
66 /* PMIC part*/
67 strncpy(omap4_i2c1_board_info[0].type, pmic_type,
68 sizeof(omap4_i2c1_board_info[0].type));
69 omap4_i2c1_board_info[0].irq = OMAP44XX_IRQ_SYS_1N;
70 omap4_i2c1_board_info[0].platform_data = pmic_data;
71
72 /* TWL6040 audio IC part */
73 omap4_i2c1_board_info[1].irq = twl6040_irq;
74 omap4_i2c1_board_info[1].platform_data = twl6040_data;
75
76 omap_register_i2c_bus(1, 400, omap4_i2c1_board_info, 2);
77
78}
79
52void __init omap_pmic_late_init(void) 80void __init omap_pmic_late_init(void)
53{ 81{
54 /* Init the OMAP TWL parameters (if PMIC has been registerd) */ 82 /* Init the OMAP TWL parameters (if PMIC has been registerd) */
55 if (!pmic_i2c_board_info.irq) 83 if (pmic_i2c_board_info.irq)
56 return; 84 omap3_twl_init();
57 85 if (omap4_i2c1_board_info[0].irq)
58 omap3_twl_init(); 86 omap4_twl_init();
59 omap4_twl_init();
60} 87}
61 88
62#if defined(CONFIG_ARCH_OMAP3) 89#if defined(CONFIG_ARCH_OMAP3)
diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h
index 275dde8cb27a..09627483a57f 100644
--- a/arch/arm/mach-omap2/twl-common.h
+++ b/arch/arm/mach-omap2/twl-common.h
@@ -29,6 +29,7 @@
29 29
30 30
31struct twl4030_platform_data; 31struct twl4030_platform_data;
32struct twl6040_platform_data;
32 33
33void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq, 34void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq,
34 struct twl4030_platform_data *pmic_data); 35 struct twl4030_platform_data *pmic_data);
@@ -46,12 +47,9 @@ static inline void omap3_pmic_init(const char *pmic_type,
46 omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, pmic_data); 47 omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, pmic_data);
47} 48}
48 49
49static inline void omap4_pmic_init(const char *pmic_type, 50void omap4_pmic_init(const char *pmic_type,
50 struct twl4030_platform_data *pmic_data) 51 struct twl4030_platform_data *pmic_data,
51{ 52 struct twl6040_platform_data *audio_data, int twl6040_irq);
52 /* Phoenix Audio IC needs I2C1 to start with 400 KHz or less */
53 omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data);
54}
55 53
56void omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, 54void omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,
57 u32 pdata_flags, u32 regulators_flags); 55 u32 pdata_flags, u32 regulators_flags);
diff --git a/arch/arm/mach-orion5x/mpp.h b/arch/arm/mach-orion5x/mpp.h
index eac68978a2c2..db70e79a1198 100644
--- a/arch/arm/mach-orion5x/mpp.h
+++ b/arch/arm/mach-orion5x/mpp.h
@@ -65,8 +65,8 @@
65#define MPP8_GIGE MPP(8, 0x1, 0, 0, 1, 1, 1) 65#define MPP8_GIGE MPP(8, 0x1, 0, 0, 1, 1, 1)
66 66
67#define MPP9_UNUSED MPP(9, 0x0, 0, 0, 1, 1, 1) 67#define MPP9_UNUSED MPP(9, 0x0, 0, 0, 1, 1, 1)
68#define MPP9_GPIO MPP(9, 0x0, 0, 0, 1, 1, 1) 68#define MPP9_GPIO MPP(9, 0x0, 1, 1, 1, 1, 1)
69#define MPP9_GIGE MPP(9, 0x1, 1, 1, 1, 1, 1) 69#define MPP9_GIGE MPP(9, 0x1, 0, 0, 1, 1, 1)
70 70
71#define MPP10_UNUSED MPP(10, 0x0, 0, 0, 1, 1, 1) 71#define MPP10_UNUSED MPP(10, 0x0, 0, 0, 1, 1, 1)
72#define MPP10_GPIO MPP(10, 0x0, 1, 1, 1, 1, 1) 72#define MPP10_GPIO MPP(10, 0x0, 1, 1, 1, 1, 1)
diff --git a/arch/arm/mach-prima2/irq.c b/arch/arm/mach-prima2/irq.c
index 37c2de9b6f26..a7b9415d30f8 100644
--- a/arch/arm/mach-prima2/irq.c
+++ b/arch/arm/mach-prima2/irq.c
@@ -42,7 +42,8 @@ sirfsoc_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
42static __init void sirfsoc_irq_init(void) 42static __init void sirfsoc_irq_init(void)
43{ 43{
44 sirfsoc_alloc_gc(sirfsoc_intc_base, 0, 32); 44 sirfsoc_alloc_gc(sirfsoc_intc_base, 0, 32);
45 sirfsoc_alloc_gc(sirfsoc_intc_base + 4, 32, SIRFSOC_INTENAL_IRQ_END - 32); 45 sirfsoc_alloc_gc(sirfsoc_intc_base + 4, 32,
46 SIRFSOC_INTENAL_IRQ_END + 1 - 32);
46 47
47 writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_LEVEL0); 48 writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_LEVEL0);
48 writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_LEVEL1); 49 writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_LEVEL1);
@@ -68,7 +69,8 @@ void __init sirfsoc_of_irq_init(void)
68 if (!sirfsoc_intc_base) 69 if (!sirfsoc_intc_base)
69 panic("unable to map intc cpu registers\n"); 70 panic("unable to map intc cpu registers\n");
70 71
71 irq_domain_add_legacy(np, 32, 0, 0, &irq_domain_simple_ops, NULL); 72 irq_domain_add_legacy(np, SIRFSOC_INTENAL_IRQ_END + 1, 0, 0,
73 &irq_domain_simple_ops, NULL);
72 74
73 of_node_put(np); 75 of_node_put(np);
74 76
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h b/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h
index c54cef25895c..cbf51ae81855 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h
@@ -17,6 +17,7 @@
17 * 17 *
18 * bit 23 - Input/Output (PXA2xx specific) 18 * bit 23 - Input/Output (PXA2xx specific)
19 * bit 24 - Wakeup Enable(PXA2xx specific) 19 * bit 24 - Wakeup Enable(PXA2xx specific)
20 * bit 25 - Keep Output (PXA2xx specific)
20 */ 21 */
21 22
22#define MFP_DIR_IN (0x0 << 23) 23#define MFP_DIR_IN (0x0 << 23)
@@ -25,6 +26,12 @@
25#define MFP_DIR(x) (((x) >> 23) & 0x1) 26#define MFP_DIR(x) (((x) >> 23) & 0x1)
26 27
27#define MFP_LPM_CAN_WAKEUP (0x1 << 24) 28#define MFP_LPM_CAN_WAKEUP (0x1 << 24)
29
30/*
31 * MFP_LPM_KEEP_OUTPUT must be specified for pins that need to
32 * retain their last output level (low or high).
33 * Note: MFP_LPM_KEEP_OUTPUT has no effect on pins configured for input.
34 */
28#define MFP_LPM_KEEP_OUTPUT (0x1 << 25) 35#define MFP_LPM_KEEP_OUTPUT (0x1 << 25)
29 36
30#define WAKEUP_ON_EDGE_RISE (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_RISE) 37#define WAKEUP_ON_EDGE_RISE (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_RISE)
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index b0a842887780..ef0426a159d4 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -33,6 +33,8 @@
33#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) 33#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
34#define GPLR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5)) 34#define GPLR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5))
35#define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c) 35#define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c)
36#define GPSR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x18)
37#define GPCR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x24)
36 38
37#define PWER_WE35 (1 << 24) 39#define PWER_WE35 (1 << 24)
38 40
@@ -348,6 +350,7 @@ static inline void pxa27x_mfp_init(void) {}
348#ifdef CONFIG_PM 350#ifdef CONFIG_PM
349static unsigned long saved_gafr[2][4]; 351static unsigned long saved_gafr[2][4];
350static unsigned long saved_gpdr[4]; 352static unsigned long saved_gpdr[4];
353static unsigned long saved_gplr[4];
351static unsigned long saved_pgsr[4]; 354static unsigned long saved_pgsr[4];
352 355
353static int pxa2xx_mfp_suspend(void) 356static int pxa2xx_mfp_suspend(void)
@@ -366,14 +369,26 @@ static int pxa2xx_mfp_suspend(void)
366 } 369 }
367 370
368 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) { 371 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
369
370 saved_gafr[0][i] = GAFR_L(i); 372 saved_gafr[0][i] = GAFR_L(i);
371 saved_gafr[1][i] = GAFR_U(i); 373 saved_gafr[1][i] = GAFR_U(i);
372 saved_gpdr[i] = GPDR(i * 32); 374 saved_gpdr[i] = GPDR(i * 32);
375 saved_gplr[i] = GPLR(i * 32);
373 saved_pgsr[i] = PGSR(i); 376 saved_pgsr[i] = PGSR(i);
374 377
375 GPDR(i * 32) = gpdr_lpm[i]; 378 GPSR(i * 32) = PGSR(i);
379 GPCR(i * 32) = ~PGSR(i);
380 }
381
382 /* set GPDR bits taking into account MFP_LPM_KEEP_OUTPUT */
383 for (i = 0; i < pxa_last_gpio; i++) {
384 if ((gpdr_lpm[gpio_to_bank(i)] & GPIO_bit(i)) ||
385 ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) &&
386 (saved_gpdr[gpio_to_bank(i)] & GPIO_bit(i))))
387 GPDR(i) |= GPIO_bit(i);
388 else
389 GPDR(i) &= ~GPIO_bit(i);
376 } 390 }
391
377 return 0; 392 return 0;
378} 393}
379 394
@@ -384,6 +399,8 @@ static void pxa2xx_mfp_resume(void)
384 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) { 399 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
385 GAFR_L(i) = saved_gafr[0][i]; 400 GAFR_L(i) = saved_gafr[0][i];
386 GAFR_U(i) = saved_gafr[1][i]; 401 GAFR_U(i) = saved_gafr[1][i];
402 GPSR(i * 32) = saved_gplr[i];
403 GPCR(i * 32) = ~saved_gplr[i];
387 GPDR(i * 32) = saved_gpdr[i]; 404 GPDR(i * 32) = saved_gpdr[i];
388 PGSR(i) = saved_pgsr[i]; 405 PGSR(i) = saved_pgsr[i];
389 } 406 }
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 6bce78edce7a..4726c246dcdc 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -421,8 +421,11 @@ void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
421 pxa_register_device(&pxa27x_device_i2c_power, info); 421 pxa_register_device(&pxa27x_device_i2c_power, info);
422} 422}
423 423
424static struct pxa_gpio_platform_data pxa27x_gpio_info __initdata = {
425 .gpio_set_wake = gpio_set_wake,
426};
427
424static struct platform_device *devices[] __initdata = { 428static struct platform_device *devices[] __initdata = {
425 &pxa_device_gpio,
426 &pxa27x_device_udc, 429 &pxa27x_device_udc,
427 &pxa_device_pmu, 430 &pxa_device_pmu,
428 &pxa_device_i2s, 431 &pxa_device_i2s,
@@ -458,6 +461,7 @@ static int __init pxa27x_init(void)
458 register_syscore_ops(&pxa2xx_mfp_syscore_ops); 461 register_syscore_ops(&pxa2xx_mfp_syscore_ops);
459 register_syscore_ops(&pxa2xx_clock_syscore_ops); 462 register_syscore_ops(&pxa2xx_clock_syscore_ops);
460 463
464 pxa_register_device(&pxa_device_gpio, &pxa27x_gpio_info);
461 ret = platform_add_devices(devices, ARRAY_SIZE(devices)); 465 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
462 } 466 }
463 467
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index 0f3a327ebcaa..b34287ab5afd 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -111,10 +111,6 @@ config S3C24XX_SETUP_TS
111 help 111 help
112 Compile in platform device definition for Samsung TouchScreen. 112 Compile in platform device definition for Samsung TouchScreen.
113 113
114# cpu-specific sections
115
116if CPU_S3C2410
117
118config S3C2410_DMA 114config S3C2410_DMA
119 bool 115 bool
120 depends on S3C24XX_DMA && (CPU_S3C2410 || CPU_S3C2442) 116 depends on S3C24XX_DMA && (CPU_S3C2410 || CPU_S3C2442)
@@ -127,6 +123,10 @@ config S3C2410_PM
127 help 123 help
128 Power Management code common to S3C2410 and better 124 Power Management code common to S3C2410 and better
129 125
126# cpu-specific sections
127
128if CPU_S3C2410
129
130config S3C24XX_SIMTEC_NOR 130config S3C24XX_SIMTEC_NOR
131 bool 131 bool
132 help 132 help
diff --git a/arch/arm/mach-s5pv210/dma.c b/arch/arm/mach-s5pv210/dma.c
index 86ce62f66190..b8337e248b09 100644
--- a/arch/arm/mach-s5pv210/dma.c
+++ b/arch/arm/mach-s5pv210/dma.c
@@ -33,8 +33,6 @@
33#include <mach/irqs.h> 33#include <mach/irqs.h>
34#include <mach/dma.h> 34#include <mach/dma.h>
35 35
36static u64 dma_dmamask = DMA_BIT_MASK(32);
37
38static u8 pdma0_peri[] = { 36static u8 pdma0_peri[] = {
39 DMACH_UART0_RX, 37 DMACH_UART0_RX,
40 DMACH_UART0_TX, 38 DMACH_UART0_TX,
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index a9ea64e0da0d..48d018f2332b 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -484,8 +484,8 @@ static struct wm8994_pdata wm8994_platform_data = {
484 .gpio_defaults[8] = 0x0100, 484 .gpio_defaults[8] = 0x0100,
485 .gpio_defaults[9] = 0x0100, 485 .gpio_defaults[9] = 0x0100,
486 .gpio_defaults[10] = 0x0100, 486 .gpio_defaults[10] = 0x0100,
487 .ldo[0] = { S5PV210_MP03(6), NULL, &wm8994_ldo1_data }, /* XM0FRNB_2 */ 487 .ldo[0] = { S5PV210_MP03(6), &wm8994_ldo1_data }, /* XM0FRNB_2 */
488 .ldo[1] = { 0, NULL, &wm8994_ldo2_data }, 488 .ldo[1] = { 0, &wm8994_ldo2_data },
489}; 489};
490 490
491/* GPIO I2C PMIC */ 491/* GPIO I2C PMIC */
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index 2cf5ed75f390..32395664e879 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -25,6 +25,7 @@
25#include <linux/gpio_keys.h> 25#include <linux/gpio_keys.h>
26#include <linux/input.h> 26#include <linux/input.h>
27#include <linux/gpio.h> 27#include <linux/gpio.h>
28#include <linux/mmc/host.h>
28#include <linux/interrupt.h> 29#include <linux/interrupt.h>
29 30
30#include <asm/hardware/vic.h> 31#include <asm/hardware/vic.h>
@@ -674,8 +675,8 @@ static struct wm8994_pdata wm8994_platform_data = {
674 .gpio_defaults[8] = 0x0100, 675 .gpio_defaults[8] = 0x0100,
675 .gpio_defaults[9] = 0x0100, 676 .gpio_defaults[9] = 0x0100,
676 .gpio_defaults[10] = 0x0100, 677 .gpio_defaults[10] = 0x0100,
677 .ldo[0] = { S5PV210_MP03(6), NULL, &wm8994_ldo1_data }, /* XM0FRNB_2 */ 678 .ldo[0] = { S5PV210_MP03(6), &wm8994_ldo1_data }, /* XM0FRNB_2 */
678 .ldo[1] = { 0, NULL, &wm8994_ldo2_data }, 679 .ldo[1] = { 0, &wm8994_ldo2_data },
679}; 680};
680 681
681/* GPIO I2C PMIC */ 682/* GPIO I2C PMIC */
@@ -765,6 +766,7 @@ static void __init goni_pmic_init(void)
765/* MoviNAND */ 766/* MoviNAND */
766static struct s3c_sdhci_platdata goni_hsmmc0_data __initdata = { 767static struct s3c_sdhci_platdata goni_hsmmc0_data __initdata = {
767 .max_width = 4, 768 .max_width = 4,
769 .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
768 .cd_type = S3C_SDHCI_CD_PERMANENT, 770 .cd_type = S3C_SDHCI_CD_PERMANENT,
769}; 771};
770 772
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index 7c524b4e415d..16be4c56abe3 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -306,7 +306,7 @@ void sa11x0_register_irda(struct irda_platform_data *irda)
306} 306}
307 307
308static struct resource sa1100_rtc_resources[] = { 308static struct resource sa1100_rtc_resources[] = {
309 DEFINE_RES_MEM(0x90010000, 0x9001003f), 309 DEFINE_RES_MEM(0x90010000, 0x40),
310 DEFINE_RES_IRQ_NAMED(IRQ_RTC1Hz, "rtc 1Hz"), 310 DEFINE_RES_IRQ_NAMED(IRQ_RTC1Hz, "rtc 1Hz"),
311 DEFINE_RES_IRQ_NAMED(IRQ_RTCAlrm, "rtc alarm"), 311 DEFINE_RES_IRQ_NAMED(IRQ_RTCAlrm, "rtc alarm"),
312}; 312};
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index cb224a344af0..0891ec6e27f5 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -365,23 +365,13 @@ static struct platform_device mipidsi0_device = {
365}; 365};
366 366
367/* SDHI0 */ 367/* SDHI0 */
368static irqreturn_t ag5evm_sdhi0_gpio_cd(int irq, void *arg)
369{
370 struct device *dev = arg;
371 struct sh_mobile_sdhi_info *info = dev->platform_data;
372 struct tmio_mmc_data *pdata = info->pdata;
373
374 tmio_mmc_cd_wakeup(pdata);
375
376 return IRQ_HANDLED;
377}
378
379static struct sh_mobile_sdhi_info sdhi0_info = { 368static struct sh_mobile_sdhi_info sdhi0_info = {
380 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, 369 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
381 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, 370 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
382 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT, 371 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_USE_GPIO_CD,
383 .tmio_caps = MMC_CAP_SD_HIGHSPEED, 372 .tmio_caps = MMC_CAP_SD_HIGHSPEED,
384 .tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, 373 .tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
374 .cd_gpio = GPIO_PORT251,
385}; 375};
386 376
387static struct resource sdhi0_resources[] = { 377static struct resource sdhi0_resources[] = {
@@ -557,7 +547,6 @@ static void __init ag5evm_init(void)
557 lcd_backlight_reset(); 547 lcd_backlight_reset();
558 548
559 /* enable SDHI0 on CN15 [SD I/F] */ 549 /* enable SDHI0 on CN15 [SD I/F] */
560 gpio_request(GPIO_FN_SDHICD0, NULL);
561 gpio_request(GPIO_FN_SDHIWP0, NULL); 550 gpio_request(GPIO_FN_SDHIWP0, NULL);
562 gpio_request(GPIO_FN_SDHICMD0, NULL); 551 gpio_request(GPIO_FN_SDHICMD0, NULL);
563 gpio_request(GPIO_FN_SDHICLK0, NULL); 552 gpio_request(GPIO_FN_SDHICLK0, NULL);
@@ -566,13 +555,6 @@ static void __init ag5evm_init(void)
566 gpio_request(GPIO_FN_SDHID0_1, NULL); 555 gpio_request(GPIO_FN_SDHID0_1, NULL);
567 gpio_request(GPIO_FN_SDHID0_0, NULL); 556 gpio_request(GPIO_FN_SDHID0_0, NULL);
568 557
569 if (!request_irq(intcs_evt2irq(0x3c0), ag5evm_sdhi0_gpio_cd,
570 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
571 "sdhi0 cd", &sdhi0_device.dev))
572 sdhi0_info.tmio_flags |= TMIO_MMC_HAS_COLD_CD;
573 else
574 pr_warn("Unable to setup SDHI0 GPIO IRQ\n");
575
576 /* enable SDHI1 on CN4 [WLAN I/F] */ 558 /* enable SDHI1 on CN4 [WLAN I/F] */
577 gpio_request(GPIO_FN_SDHICLK1, NULL); 559 gpio_request(GPIO_FN_SDHICLK1, NULL);
578 gpio_request(GPIO_FN_SDHICMD1_PU, NULL); 560 gpio_request(GPIO_FN_SDHICMD1_PU, NULL);
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index f49e28abe0ab..8c6202bb6aeb 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -1011,21 +1011,12 @@ static int slot_cn7_get_cd(struct platform_device *pdev)
1011} 1011}
1012 1012
1013/* SDHI0 */ 1013/* SDHI0 */
1014static irqreturn_t mackerel_sdhi0_gpio_cd(int irq, void *arg)
1015{
1016 struct device *dev = arg;
1017 struct sh_mobile_sdhi_info *info = dev->platform_data;
1018 struct tmio_mmc_data *pdata = info->pdata;
1019
1020 tmio_mmc_cd_wakeup(pdata);
1021
1022 return IRQ_HANDLED;
1023}
1024
1025static struct sh_mobile_sdhi_info sdhi0_info = { 1014static struct sh_mobile_sdhi_info sdhi0_info = {
1026 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, 1015 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
1027 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, 1016 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
1017 .tmio_flags = TMIO_MMC_USE_GPIO_CD,
1028 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ, 1018 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
1019 .cd_gpio = GPIO_PORT172,
1029}; 1020};
1030 1021
1031static struct resource sdhi0_resources[] = { 1022static struct resource sdhi0_resources[] = {
@@ -1384,7 +1375,6 @@ static void __init mackerel_init(void)
1384{ 1375{
1385 u32 srcr4; 1376 u32 srcr4;
1386 struct clk *clk; 1377 struct clk *clk;
1387 int ret;
1388 1378
1389 /* External clock source */ 1379 /* External clock source */
1390 clk_set_rate(&sh7372_dv_clki_clk, 27000000); 1380 clk_set_rate(&sh7372_dv_clki_clk, 27000000);
@@ -1481,7 +1471,6 @@ static void __init mackerel_init(void)
1481 irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH); 1471 irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH);
1482 1472
1483 /* enable SDHI0 */ 1473 /* enable SDHI0 */
1484 gpio_request(GPIO_FN_SDHICD0, NULL);
1485 gpio_request(GPIO_FN_SDHIWP0, NULL); 1474 gpio_request(GPIO_FN_SDHIWP0, NULL);
1486 gpio_request(GPIO_FN_SDHICMD0, NULL); 1475 gpio_request(GPIO_FN_SDHICMD0, NULL);
1487 gpio_request(GPIO_FN_SDHICLK0, NULL); 1476 gpio_request(GPIO_FN_SDHICLK0, NULL);
@@ -1490,13 +1479,6 @@ static void __init mackerel_init(void)
1490 gpio_request(GPIO_FN_SDHID0_1, NULL); 1479 gpio_request(GPIO_FN_SDHID0_1, NULL);
1491 gpio_request(GPIO_FN_SDHID0_0, NULL); 1480 gpio_request(GPIO_FN_SDHID0_0, NULL);
1492 1481
1493 ret = request_irq(evt2irq(0x3340), mackerel_sdhi0_gpio_cd,
1494 IRQF_TRIGGER_FALLING, "sdhi0 cd", &sdhi0_device.dev);
1495 if (!ret)
1496 sdhi0_info.tmio_flags |= TMIO_MMC_HAS_COLD_CD;
1497 else
1498 pr_err("Cannot get IRQ #%d: %d\n", evt2irq(0x3340), ret);
1499
1500#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE) 1482#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
1501 /* enable SDHI1 */ 1483 /* enable SDHI1 */
1502 gpio_request(GPIO_FN_SDHICMD1, NULL); 1484 gpio_request(GPIO_FN_SDHICMD1, NULL);
diff --git a/arch/arm/mach-shmobile/headsmp.S b/arch/arm/mach-shmobile/headsmp.S
index 6ac015c89206..b202c1272526 100644
--- a/arch/arm/mach-shmobile/headsmp.S
+++ b/arch/arm/mach-shmobile/headsmp.S
@@ -16,6 +16,59 @@
16 16
17 __CPUINIT 17 __CPUINIT
18 18
19/* Cache invalidation nicked from arch/arm/mach-imx/head-v7.S, thanks!
20 *
21 * The secondary kernel init calls v7_flush_dcache_all before it enables
22 * the L1; however, the L1 comes out of reset in an undefined state, so
23 * the clean + invalidate performed by v7_flush_dcache_all causes a bunch
24 * of cache lines with uninitialized data and uninitialized tags to get
25 * written out to memory, which does really unpleasant things to the main
26 * processor. We fix this by performing an invalidate, rather than a
27 * clean + invalidate, before jumping into the kernel.
28 *
29 * This funciton is cloned from arch/arm/mach-tegra/headsmp.S, and needs
30 * to be called for both secondary cores startup and primary core resume
31 * procedures. Ideally, it should be moved into arch/arm/mm/cache-v7.S.
32 */
33ENTRY(v7_invalidate_l1)
34 mov r0, #0
35 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
36 mcr p15, 2, r0, c0, c0, 0
37 mrc p15, 1, r0, c0, c0, 0
38
39 ldr r1, =0x7fff
40 and r2, r1, r0, lsr #13
41
42 ldr r1, =0x3ff
43
44 and r3, r1, r0, lsr #3 @ NumWays - 1
45 add r2, r2, #1 @ NumSets
46
47 and r0, r0, #0x7
48 add r0, r0, #4 @ SetShift
49
50 clz r1, r3 @ WayShift
51 add r4, r3, #1 @ NumWays
521: sub r2, r2, #1 @ NumSets--
53 mov r3, r4 @ Temp = NumWays
542: subs r3, r3, #1 @ Temp--
55 mov r5, r3, lsl r1
56 mov r6, r2, lsl r0
57 orr r5, r5, r6 @ Reg = (Temp<<WayShift)|(NumSets<<SetShift)
58 mcr p15, 0, r5, c7, c6, 2
59 bgt 2b
60 cmp r2, #0
61 bgt 1b
62 dsb
63 isb
64 mov pc, lr
65ENDPROC(v7_invalidate_l1)
66
67ENTRY(shmobile_invalidate_start)
68 bl v7_invalidate_l1
69 b secondary_startup
70ENDPROC(shmobile_invalidate_start)
71
19/* 72/*
20 * Reset vector for secondary CPUs. 73 * Reset vector for secondary CPUs.
21 * This will be mapped at address 0 by SBAR register. 74 * This will be mapped at address 0 by SBAR register.
@@ -24,4 +77,5 @@
24 .align 12 77 .align 12
25ENTRY(shmobile_secondary_vector) 78ENTRY(shmobile_secondary_vector)
26 ldr pc, 1f 79 ldr pc, 1f
271: .long secondary_startup - PAGE_OFFSET + PLAT_PHYS_OFFSET 801: .long shmobile_invalidate_start - PAGE_OFFSET + PLAT_PHYS_OFFSET
81ENDPROC(shmobile_secondary_vector)
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index 83ad3fe0a75f..c85e6ecda606 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -4,7 +4,6 @@
4extern void shmobile_earlytimer_init(void); 4extern void shmobile_earlytimer_init(void);
5extern struct sys_timer shmobile_timer; 5extern struct sys_timer shmobile_timer;
6struct twd_local_timer; 6struct twd_local_timer;
7void shmobile_twd_init(struct twd_local_timer *twd_local_timer);
8extern void shmobile_setup_console(void); 7extern void shmobile_setup_console(void);
9extern void shmobile_secondary_vector(void); 8extern void shmobile_secondary_vector(void);
10extern int shmobile_platform_cpu_kill(unsigned int cpu); 9extern int shmobile_platform_cpu_kill(unsigned int cpu);
@@ -82,5 +81,6 @@ extern int r8a7779_platform_cpu_kill(unsigned int cpu);
82extern void r8a7779_secondary_init(unsigned int cpu); 81extern void r8a7779_secondary_init(unsigned int cpu);
83extern int r8a7779_boot_secondary(unsigned int cpu); 82extern int r8a7779_boot_secondary(unsigned int cpu);
84extern void r8a7779_smp_prepare_cpus(void); 83extern void r8a7779_smp_prepare_cpus(void);
84extern void r8a7779_register_twd(void);
85 85
86#endif /* __ARCH_MACH_COMMON_H */ 86#endif /* __ARCH_MACH_COMMON_H */
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
index 12c6f529ab89..e98e46f6cf55 100644
--- a/arch/arm/mach-shmobile/setup-r8a7779.c
+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
@@ -262,10 +262,14 @@ void __init r8a7779_add_standard_devices(void)
262 ARRAY_SIZE(r8a7779_late_devices)); 262 ARRAY_SIZE(r8a7779_late_devices));
263} 263}
264 264
265/* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
266void __init __weak r8a7779_register_twd(void) { }
267
265static void __init r8a7779_earlytimer_init(void) 268static void __init r8a7779_earlytimer_init(void)
266{ 269{
267 r8a7779_clock_init(); 270 r8a7779_clock_init();
268 shmobile_earlytimer_init(); 271 shmobile_earlytimer_init();
272 r8a7779_register_twd();
269} 273}
270 274
271void __init r8a7779_add_early_devices(void) 275void __init r8a7779_add_early_devices(void)
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
index 5bebffc10455..04a0dfe75493 100644
--- a/arch/arm/mach-shmobile/setup-sh73a0.c
+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
@@ -688,10 +688,14 @@ void __init sh73a0_add_standard_devices(void)
688 ARRAY_SIZE(sh73a0_late_devices)); 688 ARRAY_SIZE(sh73a0_late_devices));
689} 689}
690 690
691/* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
692void __init __weak sh73a0_register_twd(void) { }
693
691static void __init sh73a0_earlytimer_init(void) 694static void __init sh73a0_earlytimer_init(void)
692{ 695{
693 sh73a0_clock_init(); 696 sh73a0_clock_init();
694 shmobile_earlytimer_init(); 697 shmobile_earlytimer_init();
698 sh73a0_register_twd();
695} 699}
696 700
697void __init sh73a0_add_early_devices(void) 701void __init sh73a0_add_early_devices(void)
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
index b62e19d4c9af..6d1d0238cbf7 100644
--- a/arch/arm/mach-shmobile/smp-r8a7779.c
+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
@@ -64,8 +64,15 @@ static void __iomem *scu_base_addr(void)
64static DEFINE_SPINLOCK(scu_lock); 64static DEFINE_SPINLOCK(scu_lock);
65static unsigned long tmp; 65static unsigned long tmp;
66 66
67#ifdef CONFIG_HAVE_ARM_TWD
67static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29); 68static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29);
68 69
70void __init r8a7779_register_twd(void)
71{
72 twd_local_timer_register(&twd_local_timer);
73}
74#endif
75
69static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) 76static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
70{ 77{
71 void __iomem *scu_base = scu_base_addr(); 78 void __iomem *scu_base = scu_base_addr();
@@ -84,7 +91,6 @@ unsigned int __init r8a7779_get_core_count(void)
84{ 91{
85 void __iomem *scu_base = scu_base_addr(); 92 void __iomem *scu_base = scu_base_addr();
86 93
87 shmobile_twd_init(&twd_local_timer);
88 return scu_get_core_count(scu_base); 94 return scu_get_core_count(scu_base);
89} 95}
90 96
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
index 14ad8b052f1a..e36c41c4ab40 100644
--- a/arch/arm/mach-shmobile/smp-sh73a0.c
+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
@@ -42,7 +42,13 @@ static void __iomem *scu_base_addr(void)
42static DEFINE_SPINLOCK(scu_lock); 42static DEFINE_SPINLOCK(scu_lock);
43static unsigned long tmp; 43static unsigned long tmp;
44 44
45#ifdef CONFIG_HAVE_ARM_TWD
45static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29); 46static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29);
47void __init sh73a0_register_twd(void)
48{
49 twd_local_timer_register(&twd_local_timer);
50}
51#endif
46 52
47static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) 53static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
48{ 54{
@@ -62,7 +68,6 @@ unsigned int __init sh73a0_get_core_count(void)
62{ 68{
63 void __iomem *scu_base = scu_base_addr(); 69 void __iomem *scu_base = scu_base_addr();
64 70
65 shmobile_twd_init(&twd_local_timer);
66 return scu_get_core_count(scu_base); 71 return scu_get_core_count(scu_base);
67} 72}
68 73
diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c
index 2fba5f3d1c8a..8b79e7917a23 100644
--- a/arch/arm/mach-shmobile/timer.c
+++ b/arch/arm/mach-shmobile/timer.c
@@ -46,15 +46,6 @@ static void __init shmobile_timer_init(void)
46{ 46{
47} 47}
48 48
49void __init shmobile_twd_init(struct twd_local_timer *twd_local_timer)
50{
51#ifdef CONFIG_HAVE_ARM_TWD
52 int err = twd_local_timer_register(twd_local_timer);
53 if (err)
54 pr_err("twd_local_timer_register failed %d\n", err);
55#endif
56}
57
58struct sys_timer shmobile_timer = { 49struct sys_timer shmobile_timer = {
59 .init = shmobile_timer_init, 50 .init = shmobile_timer_init,
60}; 51};
diff --git a/arch/arm/mach-tegra/flowctrl.c b/arch/arm/mach-tegra/flowctrl.c
index fef66a7486ed..f07488e0bd32 100644
--- a/arch/arm/mach-tegra/flowctrl.c
+++ b/arch/arm/mach-tegra/flowctrl.c
@@ -53,10 +53,10 @@ static void flowctrl_update(u8 offset, u32 value)
53 53
54void flowctrl_write_cpu_csr(unsigned int cpuid, u32 value) 54void flowctrl_write_cpu_csr(unsigned int cpuid, u32 value)
55{ 55{
56 return flowctrl_update(flowctrl_offset_halt_cpu[cpuid], value); 56 return flowctrl_update(flowctrl_offset_cpu_csr[cpuid], value);
57} 57}
58 58
59void flowctrl_write_cpu_halt(unsigned int cpuid, u32 value) 59void flowctrl_write_cpu_halt(unsigned int cpuid, u32 value)
60{ 60{
61 return flowctrl_update(flowctrl_offset_cpu_csr[cpuid], value); 61 return flowctrl_update(flowctrl_offset_halt_cpu[cpuid], value);
62} 62}
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index 1621ad07d284..33339745d432 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -1667,8 +1667,10 @@ void __init u300_init_irq(void)
1667 1667
1668 for (i = 0; i < U300_VIC_IRQS_END; i++) 1668 for (i = 0; i < U300_VIC_IRQS_END; i++)
1669 set_bit(i, (unsigned long *) &mask[0]); 1669 set_bit(i, (unsigned long *) &mask[0]);
1670 vic_init((void __iomem *) U300_INTCON0_VBASE, 0, mask[0], mask[0]); 1670 vic_init((void __iomem *) U300_INTCON0_VBASE, IRQ_U300_INTCON0_START,
1671 vic_init((void __iomem *) U300_INTCON1_VBASE, 32, mask[1], mask[1]); 1671 mask[0], mask[0]);
1672 vic_init((void __iomem *) U300_INTCON1_VBASE, IRQ_U300_INTCON1_START,
1673 mask[1], mask[1]);
1672} 1674}
1673 1675
1674 1676
diff --git a/arch/arm/mach-u300/i2c.c b/arch/arm/mach-u300/i2c.c
index a38f80238ea9..cb04bd6ab3e7 100644
--- a/arch/arm/mach-u300/i2c.c
+++ b/arch/arm/mach-u300/i2c.c
@@ -146,9 +146,6 @@ static struct ab3100_platform_data ab3100_plf_data = {
146 .min_uV = 1800000, 146 .min_uV = 1800000,
147 .max_uV = 1800000, 147 .max_uV = 1800000,
148 .valid_modes_mask = REGULATOR_MODE_NORMAL, 148 .valid_modes_mask = REGULATOR_MODE_NORMAL,
149 .valid_ops_mask =
150 REGULATOR_CHANGE_VOLTAGE |
151 REGULATOR_CHANGE_STATUS,
152 .always_on = 1, 149 .always_on = 1,
153 .boot_on = 1, 150 .boot_on = 1,
154 }, 151 },
@@ -160,9 +157,6 @@ static struct ab3100_platform_data ab3100_plf_data = {
160 .min_uV = 2500000, 157 .min_uV = 2500000,
161 .max_uV = 2500000, 158 .max_uV = 2500000,
162 .valid_modes_mask = REGULATOR_MODE_NORMAL, 159 .valid_modes_mask = REGULATOR_MODE_NORMAL,
163 .valid_ops_mask =
164 REGULATOR_CHANGE_VOLTAGE |
165 REGULATOR_CHANGE_STATUS,
166 .always_on = 1, 160 .always_on = 1,
167 .boot_on = 1, 161 .boot_on = 1,
168 }, 162 },
@@ -230,8 +224,7 @@ static struct ab3100_platform_data ab3100_plf_data = {
230 .max_uV = 1800000, 224 .max_uV = 1800000,
231 .valid_modes_mask = REGULATOR_MODE_NORMAL, 225 .valid_modes_mask = REGULATOR_MODE_NORMAL,
232 .valid_ops_mask = 226 .valid_ops_mask =
233 REGULATOR_CHANGE_VOLTAGE | 227 REGULATOR_CHANGE_VOLTAGE,
234 REGULATOR_CHANGE_STATUS,
235 .always_on = 1, 228 .always_on = 1,
236 .boot_on = 1, 229 .boot_on = 1,
237 }, 230 },
diff --git a/arch/arm/mach-u300/include/mach/irqs.h b/arch/arm/mach-u300/include/mach/irqs.h
index ee78a26707eb..ec09c1e07b1a 100644
--- a/arch/arm/mach-u300/include/mach/irqs.h
+++ b/arch/arm/mach-u300/include/mach/irqs.h
@@ -12,101 +12,101 @@
12#ifndef __MACH_IRQS_H 12#ifndef __MACH_IRQS_H
13#define __MACH_IRQS_H 13#define __MACH_IRQS_H
14 14
15#define IRQ_U300_INTCON0_START 0 15#define IRQ_U300_INTCON0_START 1
16#define IRQ_U300_INTCON1_START 32 16#define IRQ_U300_INTCON1_START 33
17/* These are on INTCON0 - 30 lines */ 17/* These are on INTCON0 - 30 lines */
18#define IRQ_U300_IRQ0_EXT 0 18#define IRQ_U300_IRQ0_EXT 1
19#define IRQ_U300_IRQ1_EXT 1 19#define IRQ_U300_IRQ1_EXT 2
20#define IRQ_U300_DMA 2 20#define IRQ_U300_DMA 3
21#define IRQ_U300_VIDEO_ENC_0 3 21#define IRQ_U300_VIDEO_ENC_0 4
22#define IRQ_U300_VIDEO_ENC_1 4 22#define IRQ_U300_VIDEO_ENC_1 5
23#define IRQ_U300_AAIF_RX 5 23#define IRQ_U300_AAIF_RX 6
24#define IRQ_U300_AAIF_TX 6 24#define IRQ_U300_AAIF_TX 7
25#define IRQ_U300_AAIF_VGPIO 7 25#define IRQ_U300_AAIF_VGPIO 8
26#define IRQ_U300_AAIF_WAKEUP 8 26#define IRQ_U300_AAIF_WAKEUP 9
27#define IRQ_U300_PCM_I2S0_FRAME 9 27#define IRQ_U300_PCM_I2S0_FRAME 10
28#define IRQ_U300_PCM_I2S0_FIFO 10 28#define IRQ_U300_PCM_I2S0_FIFO 11
29#define IRQ_U300_PCM_I2S1_FRAME 11 29#define IRQ_U300_PCM_I2S1_FRAME 12
30#define IRQ_U300_PCM_I2S1_FIFO 12 30#define IRQ_U300_PCM_I2S1_FIFO 13
31#define IRQ_U300_XGAM_GAMCON 13 31#define IRQ_U300_XGAM_GAMCON 14
32#define IRQ_U300_XGAM_CDI 14 32#define IRQ_U300_XGAM_CDI 15
33#define IRQ_U300_XGAM_CDICON 15 33#define IRQ_U300_XGAM_CDICON 16
34#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330) 34#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330)
35/* MMIACC not used on the DB3210 or DB3350 chips */ 35/* MMIACC not used on the DB3210 or DB3350 chips */
36#define IRQ_U300_XGAM_MMIACC 16 36#define IRQ_U300_XGAM_MMIACC 17
37#endif 37#endif
38#define IRQ_U300_XGAM_PDI 17 38#define IRQ_U300_XGAM_PDI 18
39#define IRQ_U300_XGAM_PDICON 18 39#define IRQ_U300_XGAM_PDICON 19
40#define IRQ_U300_XGAM_GAMEACC 19 40#define IRQ_U300_XGAM_GAMEACC 20
41#define IRQ_U300_XGAM_MCIDCT 20 41#define IRQ_U300_XGAM_MCIDCT 21
42#define IRQ_U300_APEX 21 42#define IRQ_U300_APEX 22
43#define IRQ_U300_UART0 22 43#define IRQ_U300_UART0 23
44#define IRQ_U300_SPI 23 44#define IRQ_U300_SPI 24
45#define IRQ_U300_TIMER_APP_OS 24 45#define IRQ_U300_TIMER_APP_OS 25
46#define IRQ_U300_TIMER_APP_DD 25 46#define IRQ_U300_TIMER_APP_DD 26
47#define IRQ_U300_TIMER_APP_GP1 26 47#define IRQ_U300_TIMER_APP_GP1 27
48#define IRQ_U300_TIMER_APP_GP2 27 48#define IRQ_U300_TIMER_APP_GP2 28
49#define IRQ_U300_TIMER_OS 28 49#define IRQ_U300_TIMER_OS 29
50#define IRQ_U300_TIMER_MS 29 50#define IRQ_U300_TIMER_MS 30
51#define IRQ_U300_KEYPAD_KEYBF 30 51#define IRQ_U300_KEYPAD_KEYBF 31
52#define IRQ_U300_KEYPAD_KEYBR 31 52#define IRQ_U300_KEYPAD_KEYBR 32
53/* These are on INTCON1 - 32 lines */ 53/* These are on INTCON1 - 32 lines */
54#define IRQ_U300_GPIO_PORT0 32 54#define IRQ_U300_GPIO_PORT0 33
55#define IRQ_U300_GPIO_PORT1 33 55#define IRQ_U300_GPIO_PORT1 34
56#define IRQ_U300_GPIO_PORT2 34 56#define IRQ_U300_GPIO_PORT2 35
57 57
58#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330) || \ 58#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330) || \
59 defined(CONFIG_MACH_U300_BS335) 59 defined(CONFIG_MACH_U300_BS335)
60/* These are for DB3150, DB3200 and DB3350 */ 60/* These are for DB3150, DB3200 and DB3350 */
61#define IRQ_U300_WDOG 35 61#define IRQ_U300_WDOG 36
62#define IRQ_U300_EVHIST 36 62#define IRQ_U300_EVHIST 37
63#define IRQ_U300_MSPRO 37 63#define IRQ_U300_MSPRO 38
64#define IRQ_U300_MMCSD_MCIINTR0 38 64#define IRQ_U300_MMCSD_MCIINTR0 39
65#define IRQ_U300_MMCSD_MCIINTR1 39 65#define IRQ_U300_MMCSD_MCIINTR1 40
66#define IRQ_U300_I2C0 40 66#define IRQ_U300_I2C0 41
67#define IRQ_U300_I2C1 41 67#define IRQ_U300_I2C1 42
68#define IRQ_U300_RTC 42 68#define IRQ_U300_RTC 43
69#define IRQ_U300_NFIF 43 69#define IRQ_U300_NFIF 44
70#define IRQ_U300_NFIF2 44 70#define IRQ_U300_NFIF2 45
71#endif 71#endif
72 72
73/* DB3150 and DB3200 have only 45 IRQs */ 73/* DB3150 and DB3200 have only 45 IRQs */
74#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330) 74#if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330)
75#define U300_VIC_IRQS_END 45 75#define U300_VIC_IRQS_END 46
76#endif 76#endif
77 77
78/* The DB3350-specific interrupt lines */ 78/* The DB3350-specific interrupt lines */
79#ifdef CONFIG_MACH_U300_BS335 79#ifdef CONFIG_MACH_U300_BS335
80#define IRQ_U300_ISP_F0 45 80#define IRQ_U300_ISP_F0 46
81#define IRQ_U300_ISP_F1 46 81#define IRQ_U300_ISP_F1 47
82#define IRQ_U300_ISP_F2 47 82#define IRQ_U300_ISP_F2 48
83#define IRQ_U300_ISP_F3 48 83#define IRQ_U300_ISP_F3 49
84#define IRQ_U300_ISP_F4 49 84#define IRQ_U300_ISP_F4 50
85#define IRQ_U300_GPIO_PORT3 50 85#define IRQ_U300_GPIO_PORT3 51
86#define IRQ_U300_SYSCON_PLL_LOCK 51 86#define IRQ_U300_SYSCON_PLL_LOCK 52
87#define IRQ_U300_UART1 52 87#define IRQ_U300_UART1 53
88#define IRQ_U300_GPIO_PORT4 53 88#define IRQ_U300_GPIO_PORT4 54
89#define IRQ_U300_GPIO_PORT5 54 89#define IRQ_U300_GPIO_PORT5 55
90#define IRQ_U300_GPIO_PORT6 55 90#define IRQ_U300_GPIO_PORT6 56
91#define U300_VIC_IRQS_END 56 91#define U300_VIC_IRQS_END 57
92#endif 92#endif
93 93
94/* The DB3210-specific interrupt lines */ 94/* The DB3210-specific interrupt lines */
95#ifdef CONFIG_MACH_U300_BS365 95#ifdef CONFIG_MACH_U300_BS365
96#define IRQ_U300_GPIO_PORT3 35 96#define IRQ_U300_GPIO_PORT3 36
97#define IRQ_U300_GPIO_PORT4 36 97#define IRQ_U300_GPIO_PORT4 37
98#define IRQ_U300_WDOG 37 98#define IRQ_U300_WDOG 38
99#define IRQ_U300_EVHIST 38 99#define IRQ_U300_EVHIST 39
100#define IRQ_U300_MSPRO 39 100#define IRQ_U300_MSPRO 40
101#define IRQ_U300_MMCSD_MCIINTR0 40 101#define IRQ_U300_MMCSD_MCIINTR0 41
102#define IRQ_U300_MMCSD_MCIINTR1 41 102#define IRQ_U300_MMCSD_MCIINTR1 42
103#define IRQ_U300_I2C0 42 103#define IRQ_U300_I2C0 43
104#define IRQ_U300_I2C1 43 104#define IRQ_U300_I2C1 44
105#define IRQ_U300_RTC 44 105#define IRQ_U300_RTC 45
106#define IRQ_U300_NFIF 45 106#define IRQ_U300_NFIF 46
107#define IRQ_U300_NFIF2 46 107#define IRQ_U300_NFIF2 47
108#define IRQ_U300_SYSCON_PLL_LOCK 47 108#define IRQ_U300_SYSCON_PLL_LOCK 48
109#define U300_VIC_IRQS_END 48 109#define U300_VIC_IRQS_END 49
110#endif 110#endif
111 111
112/* Maximum 8*7 GPIO lines */ 112/* Maximum 8*7 GPIO lines */
@@ -117,6 +117,6 @@
117#define IRQ_U300_GPIO_END (U300_VIC_IRQS_END) 117#define IRQ_U300_GPIO_END (U300_VIC_IRQS_END)
118#endif 118#endif
119 119
120#define NR_IRQS (IRQ_U300_GPIO_END) 120#define NR_IRQS (IRQ_U300_GPIO_END - IRQ_U300_INTCON0_START)
121 121
122#endif 122#endif
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index 880d02ec89d4..ef7099eea0f2 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -17,6 +17,7 @@ config UX500_SOC_DB5500
17config UX500_SOC_DB8500 17config UX500_SOC_DB8500
18 bool 18 bool
19 select MFD_DB8500_PRCMU 19 select MFD_DB8500_PRCMU
20 select REGULATOR
20 select REGULATOR_DB8500_PRCMU 21 select REGULATOR_DB8500_PRCMU
21 select CPU_FREQ_TABLE if CPU_FREQ 22 select CPU_FREQ_TABLE if CPU_FREQ
22 23
diff --git a/arch/arm/mach-ux500/mbox-db5500.c b/arch/arm/mach-ux500/mbox-db5500.c
index 2b2d51caf9d8..0127490218cd 100644
--- a/arch/arm/mach-ux500/mbox-db5500.c
+++ b/arch/arm/mach-ux500/mbox-db5500.c
@@ -168,7 +168,7 @@ static ssize_t mbox_read_fifo(struct device *dev,
168 return sprintf(buf, "0x%X\n", mbox_value); 168 return sprintf(buf, "0x%X\n", mbox_value);
169} 169}
170 170
171static DEVICE_ATTR(fifo, S_IWUGO | S_IRUGO, mbox_read_fifo, mbox_write_fifo); 171static DEVICE_ATTR(fifo, S_IWUSR | S_IRUGO, mbox_read_fifo, mbox_write_fifo);
172 172
173static int mbox_show(struct seq_file *s, void *data) 173static int mbox_show(struct seq_file *s, void *data)
174{ 174{
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index d2058ef8345f..eff5842f6232 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -99,7 +99,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
99 */ 99 */
100 write_pen_release(cpu_logical_map(cpu)); 100 write_pen_release(cpu_logical_map(cpu));
101 101
102 gic_raise_softirq(cpumask_of(cpu), 1); 102 smp_send_reschedule(cpu);
103 103
104 timeout = jiffies + (1 * HZ); 104 timeout = jiffies + (1 * HZ);
105 while (time_before(jiffies, timeout)) { 105 while (time_before(jiffies, timeout)) {
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 7edef9121632..7c8a7d8467bf 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -723,7 +723,7 @@ config CPU_HIGH_VECTOR
723 bool "Select the High exception vector" 723 bool "Select the High exception vector"
724 help 724 help
725 Say Y here to select high exception vector(0xFFFF0000~). 725 Say Y here to select high exception vector(0xFFFF0000~).
726 The exception vector can be vary depending on the platform 726 The exception vector can vary depending on the platform
727 design in nommu mode. If your platform needs to select 727 design in nommu mode. If your platform needs to select
728 high exception vector, say Y. 728 high exception vector, say Y.
729 Otherwise or if you are unsure, say N, and the low exception 729 Otherwise or if you are unsure, say N, and the low exception
diff --git a/arch/arm/mm/abort-ev6.S b/arch/arm/mm/abort-ev6.S
index ff1f7cc11f87..80741992a9fc 100644
--- a/arch/arm/mm/abort-ev6.S
+++ b/arch/arm/mm/abort-ev6.S
@@ -26,18 +26,23 @@ ENTRY(v6_early_abort)
26 mrc p15, 0, r1, c5, c0, 0 @ get FSR 26 mrc p15, 0, r1, c5, c0, 0 @ get FSR
27 mrc p15, 0, r0, c6, c0, 0 @ get FAR 27 mrc p15, 0, r0, c6, c0, 0 @ get FAR
28/* 28/*
29 * Faulty SWP instruction on 1136 doesn't set bit 11 in DFSR (erratum 326103). 29 * Faulty SWP instruction on 1136 doesn't set bit 11 in DFSR.
30 * The test below covers all the write situations, including Java bytecodes
31 */ 30 */
32 bic r1, r1, #1 << 11 @ clear bit 11 of FSR 31#ifdef CONFIG_ARM_ERRATA_326103
32 ldr ip, =0x4107b36
33 mrc p15, 0, r3, c0, c0, 0 @ get processor id
34 teq ip, r3, lsr #4 @ r0 ARM1136?
35 bne do_DataAbort
33 tst r5, #PSR_J_BIT @ Java? 36 tst r5, #PSR_J_BIT @ Java?
37 tsteq r5, #PSR_T_BIT @ Thumb?
34 bne do_DataAbort 38 bne do_DataAbort
35 do_thumb_abort fsr=r1, pc=r4, psr=r5, tmp=r3 39 bic r1, r1, #1 << 11 @ clear bit 11 of FSR
36 ldreq r3, [r4] @ read aborted ARM instruction 40 ldr r3, [r4] @ read aborted ARM instruction
37#ifdef CONFIG_CPU_ENDIAN_BE8 41#ifdef CONFIG_CPU_ENDIAN_BE8
38 reveq r3, r3 42 rev r3, r3
39#endif 43#endif
40 do_ldrd_abort tmp=ip, insn=r3 44 do_ldrd_abort tmp=ip, insn=r3
41 tst r3, #1 << 20 @ L = 0 -> write 45 tst r3, #1 << 20 @ L = 0 -> write
42 orreq r1, r1, #1 << 11 @ yes. 46 orreq r1, r1, #1 << 11 @ yes.
47#endif
43 b do_DataAbort 48 b do_DataAbort
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index a53fd2aaa2f4..2a8e380501e8 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -32,6 +32,7 @@ static void __iomem *l2x0_base;
32static DEFINE_RAW_SPINLOCK(l2x0_lock); 32static DEFINE_RAW_SPINLOCK(l2x0_lock);
33static u32 l2x0_way_mask; /* Bitmask of active ways */ 33static u32 l2x0_way_mask; /* Bitmask of active ways */
34static u32 l2x0_size; 34static u32 l2x0_size;
35static unsigned long sync_reg_offset = L2X0_CACHE_SYNC;
35 36
36struct l2x0_regs l2x0_saved_regs; 37struct l2x0_regs l2x0_saved_regs;
37 38
@@ -61,12 +62,7 @@ static inline void cache_sync(void)
61{ 62{
62 void __iomem *base = l2x0_base; 63 void __iomem *base = l2x0_base;
63 64
64#ifdef CONFIG_PL310_ERRATA_753970 65 writel_relaxed(0, base + sync_reg_offset);
65 /* write to an unmmapped register */
66 writel_relaxed(0, base + L2X0_DUMMY_REG);
67#else
68 writel_relaxed(0, base + L2X0_CACHE_SYNC);
69#endif
70 cache_wait(base + L2X0_CACHE_SYNC, 1); 66 cache_wait(base + L2X0_CACHE_SYNC, 1);
71} 67}
72 68
@@ -85,10 +81,13 @@ static inline void l2x0_inv_line(unsigned long addr)
85} 81}
86 82
87#if defined(CONFIG_PL310_ERRATA_588369) || defined(CONFIG_PL310_ERRATA_727915) 83#if defined(CONFIG_PL310_ERRATA_588369) || defined(CONFIG_PL310_ERRATA_727915)
84static inline void debug_writel(unsigned long val)
85{
86 if (outer_cache.set_debug)
87 outer_cache.set_debug(val);
88}
88 89
89#define debug_writel(val) outer_cache.set_debug(val) 90static void pl310_set_debug(unsigned long val)
90
91static void l2x0_set_debug(unsigned long val)
92{ 91{
93 writel_relaxed(val, l2x0_base + L2X0_DEBUG_CTRL); 92 writel_relaxed(val, l2x0_base + L2X0_DEBUG_CTRL);
94} 93}
@@ -98,7 +97,7 @@ static inline void debug_writel(unsigned long val)
98{ 97{
99} 98}
100 99
101#define l2x0_set_debug NULL 100#define pl310_set_debug NULL
102#endif 101#endif
103 102
104#ifdef CONFIG_PL310_ERRATA_588369 103#ifdef CONFIG_PL310_ERRATA_588369
@@ -331,6 +330,11 @@ void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask)
331 else 330 else
332 ways = 8; 331 ways = 8;
333 type = "L310"; 332 type = "L310";
333#ifdef CONFIG_PL310_ERRATA_753970
334 /* Unmapped register. */
335 sync_reg_offset = L2X0_DUMMY_REG;
336#endif
337 outer_cache.set_debug = pl310_set_debug;
334 break; 338 break;
335 case L2X0_CACHE_ID_PART_L210: 339 case L2X0_CACHE_ID_PART_L210:
336 ways = (aux >> 13) & 0xf; 340 ways = (aux >> 13) & 0xf;
@@ -379,7 +383,6 @@ void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask)
379 outer_cache.flush_all = l2x0_flush_all; 383 outer_cache.flush_all = l2x0_flush_all;
380 outer_cache.inv_all = l2x0_inv_all; 384 outer_cache.inv_all = l2x0_inv_all;
381 outer_cache.disable = l2x0_disable; 385 outer_cache.disable = l2x0_disable;
382 outer_cache.set_debug = l2x0_set_debug;
383 386
384 printk(KERN_INFO "%s cache controller enabled\n", type); 387 printk(KERN_INFO "%s cache controller enabled\n", type);
385 printk(KERN_INFO "l2x0: %d ways, CACHE_ID 0x%08x, AUX_CTRL 0x%08x, Cache size: %d B\n", 388 printk(KERN_INFO "l2x0: %d ways, CACHE_ID 0x%08x, AUX_CTRL 0x%08x, Cache size: %d B\n",
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index 9055b5a84ec5..5bb48356d217 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -247,7 +247,9 @@ good_area:
247 return handle_mm_fault(mm, vma, addr & PAGE_MASK, flags); 247 return handle_mm_fault(mm, vma, addr & PAGE_MASK, flags);
248 248
249check_stack: 249check_stack:
250 if (vma->vm_flags & VM_GROWSDOWN && !expand_stack(vma, addr)) 250 /* Don't allow expansion below FIRST_USER_ADDRESS */
251 if (vma->vm_flags & VM_GROWSDOWN &&
252 addr >= FIRST_USER_ADDRESS && !expand_stack(vma, addr))
251 goto good_area; 253 goto good_area;
252out: 254out:
253 return fault; 255 return fault;
@@ -320,7 +322,7 @@ retry:
320 */ 322 */
321 323
322 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr); 324 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr);
323 if (flags & FAULT_FLAG_ALLOW_RETRY) { 325 if (!(fault & VM_FAULT_ERROR) && flags & FAULT_FLAG_ALLOW_RETRY) {
324 if (fault & VM_FAULT_MAJOR) { 326 if (fault & VM_FAULT_MAJOR) {
325 tsk->maj_flt++; 327 tsk->maj_flt++;
326 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 328 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 595079fa9d1d..8f5813bbffb5 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -293,11 +293,11 @@ EXPORT_SYMBOL(pfn_valid);
293#endif 293#endif
294 294
295#ifndef CONFIG_SPARSEMEM 295#ifndef CONFIG_SPARSEMEM
296static void arm_memory_present(void) 296static void __init arm_memory_present(void)
297{ 297{
298} 298}
299#else 299#else
300static void arm_memory_present(void) 300static void __init arm_memory_present(void)
301{ 301{
302 struct memblock_region *reg; 302 struct memblock_region *reg;
303 303
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index b86f8933ff91..aa78de8bfdd3 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -489,7 +489,8 @@ static void __init build_mem_type_table(void)
489 */ 489 */
490 for (i = 0; i < ARRAY_SIZE(mem_types); i++) { 490 for (i = 0; i < ARRAY_SIZE(mem_types); i++) {
491 mem_types[i].prot_pte |= PTE_EXT_AF; 491 mem_types[i].prot_pte |= PTE_EXT_AF;
492 mem_types[i].prot_sect |= PMD_SECT_AF; 492 if (mem_types[i].prot_sect)
493 mem_types[i].prot_sect |= PMD_SECT_AF;
493 } 494 }
494 kern_pgprot |= PTE_EXT_AF; 495 kern_pgprot |= PTE_EXT_AF;
495 vecs_pgprot |= PTE_EXT_AF; 496 vecs_pgprot |= PTE_EXT_AF;
@@ -618,8 +619,8 @@ static void __init alloc_init_section(pud_t *pud, unsigned long addr,
618 } 619 }
619} 620}
620 621
621static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end, 622static void __init alloc_init_pud(pgd_t *pgd, unsigned long addr,
622 unsigned long phys, const struct mem_type *type) 623 unsigned long end, unsigned long phys, const struct mem_type *type)
623{ 624{
624 pud_t *pud = pud_offset(pgd, addr); 625 pud_t *pud = pud_offset(pgd, addr);
625 unsigned long next; 626 unsigned long next;
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index 6486d2f253cd..d51225f90ae2 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -13,6 +13,7 @@
13#include <asm/sections.h> 13#include <asm/sections.h>
14#include <asm/page.h> 14#include <asm/page.h>
15#include <asm/setup.h> 15#include <asm/setup.h>
16#include <asm/traps.h>
16#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
17 18
18#include "mm.h" 19#include "mm.h"
@@ -39,6 +40,7 @@ void __init sanity_check_meminfo(void)
39 */ 40 */
40void __init paging_init(struct machine_desc *mdesc) 41void __init paging_init(struct machine_desc *mdesc)
41{ 42{
43 early_trap_init((void *)CONFIG_VECTORS_BASE);
42 bootmem_init(); 44 bootmem_init();
43} 45}
44 46
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index f1c8486f7501..c2e2b66f72b5 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -255,6 +255,18 @@ __v7_setup:
255 mcr p15, 0, r5, c10, c2, 0 @ write PRRR 255 mcr p15, 0, r5, c10, c2, 0 @ write PRRR
256 mcr p15, 0, r6, c10, c2, 1 @ write NMRR 256 mcr p15, 0, r6, c10, c2, 1 @ write NMRR
257#endif 257#endif
258#ifndef CONFIG_ARM_THUMBEE
259 mrc p15, 0, r0, c0, c1, 0 @ read ID_PFR0 for ThumbEE
260 and r0, r0, #(0xf << 12) @ ThumbEE enabled field
261 teq r0, #(1 << 12) @ check if ThumbEE is present
262 bne 1f
263 mov r5, #0
264 mcr p14, 6, r5, c1, c0, 0 @ Initialize TEEHBR to 0
265 mrc p14, 6, r0, c0, c0, 0 @ load TEECR
266 orr r0, r0, #1 @ set the 1st bit in order to
267 mcr p14, 6, r0, c0, c0, 0 @ stop userspace TEEHBR access
2681:
269#endif
258 adr r5, v7_crval 270 adr r5, v7_crval
259 ldmia r5, {r5, r6} 271 ldmia r5, {r5, r6}
260#ifdef CONFIG_CPU_ENDIAN_BE8 272#ifdef CONFIG_CPU_ENDIAN_BE8
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index 8506cbb7fea4..62ec5c452792 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -398,32 +398,6 @@ struct clk dummy_ck = {
398 .ops = &clkops_null, 398 .ops = &clkops_null,
399}; 399};
400 400
401#ifdef CONFIG_CPU_FREQ
402void clk_init_cpufreq_table(struct cpufreq_frequency_table **table)
403{
404 unsigned long flags;
405
406 if (!arch_clock || !arch_clock->clk_init_cpufreq_table)
407 return;
408
409 spin_lock_irqsave(&clockfw_lock, flags);
410 arch_clock->clk_init_cpufreq_table(table);
411 spin_unlock_irqrestore(&clockfw_lock, flags);
412}
413
414void clk_exit_cpufreq_table(struct cpufreq_frequency_table **table)
415{
416 unsigned long flags;
417
418 if (!arch_clock || !arch_clock->clk_exit_cpufreq_table)
419 return;
420
421 spin_lock_irqsave(&clockfw_lock, flags);
422 arch_clock->clk_exit_cpufreq_table(table);
423 spin_unlock_irqrestore(&clockfw_lock, flags);
424}
425#endif
426
427/* 401/*
428 * 402 *
429 */ 403 */
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index ecdb3da0dea9..c58d896cd5c3 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -916,6 +916,13 @@ void omap_start_dma(int lch)
916 l |= OMAP_DMA_CCR_BUFFERING_DISABLE; 916 l |= OMAP_DMA_CCR_BUFFERING_DISABLE;
917 l |= OMAP_DMA_CCR_EN; 917 l |= OMAP_DMA_CCR_EN;
918 918
919 /*
920 * As dma_write() uses IO accessors which are weakly ordered, there
921 * is no guarantee that data in coherent DMA memory will be visible
922 * to the DMA device. Add a memory barrier here to ensure that any
923 * such data is visible prior to enabling DMA.
924 */
925 mb();
919 p->dma_write(l, CCR, lch); 926 p->dma_write(l, CCR, lch);
920 927
921 dma_chan[lch].flags |= OMAP_DMA_ACTIVE; 928 dma_chan[lch].flags |= OMAP_DMA_ACTIVE;
@@ -965,6 +972,13 @@ void omap_stop_dma(int lch)
965 p->dma_write(l, CCR, lch); 972 p->dma_write(l, CCR, lch);
966 } 973 }
967 974
975 /*
976 * Ensure that data transferred by DMA is visible to any access
977 * after DMA has been disabled. This is important for coherent
978 * DMA regions.
979 */
980 mb();
981
968 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) { 982 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
969 int next_lch, cur_lch = lch; 983 int next_lch, cur_lch = lch;
970 char dma_chan_link_map[dma_lch_count]; 984 char dma_chan_link_map[dma_lch_count];
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
index 240a7b9fd946..d0ef57c1d71b 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -272,8 +272,6 @@ struct clk {
272#endif 272#endif
273}; 273};
274 274
275struct cpufreq_frequency_table;
276
277struct clk_functions { 275struct clk_functions {
278 int (*clk_enable)(struct clk *clk); 276 int (*clk_enable)(struct clk *clk);
279 void (*clk_disable)(struct clk *clk); 277 void (*clk_disable)(struct clk *clk);
@@ -283,10 +281,6 @@ struct clk_functions {
283 void (*clk_allow_idle)(struct clk *clk); 281 void (*clk_allow_idle)(struct clk *clk);
284 void (*clk_deny_idle)(struct clk *clk); 282 void (*clk_deny_idle)(struct clk *clk);
285 void (*clk_disable_unused)(struct clk *clk); 283 void (*clk_disable_unused)(struct clk *clk);
286#ifdef CONFIG_CPU_FREQ
287 void (*clk_init_cpufreq_table)(struct cpufreq_frequency_table **);
288 void (*clk_exit_cpufreq_table)(struct cpufreq_frequency_table **);
289#endif
290}; 284};
291 285
292extern int mpurate; 286extern int mpurate;
@@ -301,10 +295,6 @@ extern void recalculate_root_clocks(void);
301extern unsigned long followparent_recalc(struct clk *clk); 295extern unsigned long followparent_recalc(struct clk *clk);
302extern void clk_enable_init_clocks(void); 296extern void clk_enable_init_clocks(void);
303unsigned long omap_fixed_divisor_recalc(struct clk *clk); 297unsigned long omap_fixed_divisor_recalc(struct clk *clk);
304#ifdef CONFIG_CPU_FREQ
305extern void clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
306extern void clk_exit_cpufreq_table(struct cpufreq_frequency_table **table);
307#endif
308extern struct clk *omap_clk_get_by_name(const char *name); 298extern struct clk *omap_clk_get_by_name(const char *name);
309extern int omap_clk_enable_autoidle_all(void); 299extern int omap_clk_enable_autoidle_all(void);
310extern int omap_clk_disable_autoidle_all(void); 300extern int omap_clk_disable_autoidle_all(void);
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 8070145ccb98..3f26db4ee8e6 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -305,6 +305,7 @@ struct omap_hwmod_sysc_fields {
305 * @rev_offs: IP block revision register offset (from module base addr) 305 * @rev_offs: IP block revision register offset (from module base addr)
306 * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr) 306 * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr)
307 * @syss_offs: OCP_SYSSTATUS register offset (from module base addr) 307 * @syss_offs: OCP_SYSSTATUS register offset (from module base addr)
308 * @srst_udelay: Delay needed after doing a softreset in usecs
308 * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART} 309 * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART}
309 * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported 310 * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported
310 * @clockact: the default value of the module CLOCKACTIVITY bits 311 * @clockact: the default value of the module CLOCKACTIVITY bits
@@ -330,9 +331,10 @@ struct omap_hwmod_class_sysconfig {
330 u16 sysc_offs; 331 u16 sysc_offs;
331 u16 syss_offs; 332 u16 syss_offs;
332 u16 sysc_flags; 333 u16 sysc_flags;
334 struct omap_hwmod_sysc_fields *sysc_fields;
335 u8 srst_udelay;
333 u8 idlemodes; 336 u8 idlemodes;
334 u8 clockact; 337 u8 clockact;
335 struct omap_hwmod_sysc_fields *sysc_fields;
336}; 338};
337 339
338/** 340/**
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index eec98afa0f83..f9a8c5341ee9 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -348,7 +348,6 @@ u32 omap3_configure_core_dpll(u32 m2, u32 unlock_dll, u32 f, u32 inc,
348 sdrc_actim_ctrl_b_1, sdrc_mr_1); 348 sdrc_actim_ctrl_b_1, sdrc_mr_1);
349} 349}
350 350
351#ifdef CONFIG_PM
352void omap3_sram_restore_context(void) 351void omap3_sram_restore_context(void)
353{ 352{
354 omap_sram_ceil = omap_sram_base + omap_sram_size; 353 omap_sram_ceil = omap_sram_base + omap_sram_size;
@@ -358,17 +357,18 @@ void omap3_sram_restore_context(void)
358 omap3_sram_configure_core_dpll_sz); 357 omap3_sram_configure_core_dpll_sz);
359 omap_push_sram_idle(); 358 omap_push_sram_idle();
360} 359}
361#endif /* CONFIG_PM */
362
363#endif /* CONFIG_ARCH_OMAP3 */
364 360
365static inline int omap34xx_sram_init(void) 361static inline int omap34xx_sram_init(void)
366{ 362{
367#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
368 omap3_sram_restore_context(); 363 omap3_sram_restore_context();
369#endif
370 return 0; 364 return 0;
371} 365}
366#else
367static inline int omap34xx_sram_init(void)
368{
369 return 0;
370}
371#endif /* CONFIG_ARCH_OMAP3 */
372 372
373static inline int am33xx_sram_init(void) 373static inline int am33xx_sram_init(void)
374{ 374{
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 71553f410016..a0ffc77da809 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -302,6 +302,7 @@ comment "Power management"
302config SAMSUNG_PM_DEBUG 302config SAMSUNG_PM_DEBUG
303 bool "S3C2410 PM Suspend debug" 303 bool "S3C2410 PM Suspend debug"
304 depends on PM 304 depends on PM
305 select DEBUG_LL
305 help 306 help
306 Say Y here if you want verbose debugging from the PM Suspend and 307 Say Y here if you want verbose debugging from the PM Suspend and
307 Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> 308 Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index 317e246ffc56..e834c5ef437c 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -18,6 +18,8 @@
18#ifndef __PLAT_S3C_SDHCI_H 18#ifndef __PLAT_S3C_SDHCI_H
19#define __PLAT_S3C_SDHCI_H __FILE__ 19#define __PLAT_S3C_SDHCI_H __FILE__
20 20
21#include <plat/devs.h>
22
21struct platform_device; 23struct platform_device;
22struct mmc_host; 24struct mmc_host;
23struct mmc_card; 25struct mmc_card;
@@ -356,4 +358,30 @@ static inline void exynos4_default_sdhci3(void) { }
356 358
357#endif /* CONFIG_EXYNOS4_SETUP_SDHCI */ 359#endif /* CONFIG_EXYNOS4_SETUP_SDHCI */
358 360
361static inline void s3c_sdhci_setname(int id, char *name)
362{
363 switch (id) {
364#ifdef CONFIG_S3C_DEV_HSMMC
365 case 0:
366 s3c_device_hsmmc0.name = name;
367 break;
368#endif
369#ifdef CONFIG_S3C_DEV_HSMMC1
370 case 1:
371 s3c_device_hsmmc1.name = name;
372 break;
373#endif
374#ifdef CONFIG_S3C_DEV_HSMMC2
375 case 2:
376 s3c_device_hsmmc2.name = name;
377 break;
378#endif
379#ifdef CONFIG_S3C_DEV_HSMMC3
380 case 3:
381 s3c_device_hsmmc3.name = name;
382 break;
383#endif
384 }
385}
386
359#endif /* __PLAT_S3C_SDHCI_H */ 387#endif /* __PLAT_S3C_SDHCI_H */
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index 858748eaa144..b0197b2c857d 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -11,12 +11,15 @@
11#include <linux/types.h> 11#include <linux/types.h>
12#include <linux/cpu.h> 12#include <linux/cpu.h>
13#include <linux/cpu_pm.h> 13#include <linux/cpu_pm.h>
14#include <linux/hardirq.h>
14#include <linux/kernel.h> 15#include <linux/kernel.h>
15#include <linux/notifier.h> 16#include <linux/notifier.h>
16#include <linux/signal.h> 17#include <linux/signal.h>
17#include <linux/sched.h> 18#include <linux/sched.h>
18#include <linux/smp.h> 19#include <linux/smp.h>
19#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/uaccess.h>
22#include <linux/user.h>
20 23
21#include <asm/cp15.h> 24#include <asm/cp15.h>
22#include <asm/cputype.h> 25#include <asm/cputype.h>
@@ -430,7 +433,10 @@ void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
430 433
431static void vfp_enable(void *unused) 434static void vfp_enable(void *unused)
432{ 435{
433 u32 access = get_copro_access(); 436 u32 access;
437
438 BUG_ON(preemptible());
439 access = get_copro_access();
434 440
435 /* 441 /*
436 * Enable full access to VFP (cp10 and cp11) 442 * Enable full access to VFP (cp10 and cp11)
@@ -529,6 +535,93 @@ void vfp_flush_hwstate(struct thread_info *thread)
529} 535}
530 536
531/* 537/*
538 * Save the current VFP state into the provided structures and prepare
539 * for entry into a new function (signal handler).
540 */
541int vfp_preserve_user_clear_hwstate(struct user_vfp __user *ufp,
542 struct user_vfp_exc __user *ufp_exc)
543{
544 struct thread_info *thread = current_thread_info();
545 struct vfp_hard_struct *hwstate = &thread->vfpstate.hard;
546 int err = 0;
547
548 /* Ensure that the saved hwstate is up-to-date. */
549 vfp_sync_hwstate(thread);
550
551 /*
552 * Copy the floating point registers. There can be unused
553 * registers see asm/hwcap.h for details.
554 */
555 err |= __copy_to_user(&ufp->fpregs, &hwstate->fpregs,
556 sizeof(hwstate->fpregs));
557 /*
558 * Copy the status and control register.
559 */
560 __put_user_error(hwstate->fpscr, &ufp->fpscr, err);
561
562 /*
563 * Copy the exception registers.
564 */
565 __put_user_error(hwstate->fpexc, &ufp_exc->fpexc, err);
566 __put_user_error(hwstate->fpinst, &ufp_exc->fpinst, err);
567 __put_user_error(hwstate->fpinst2, &ufp_exc->fpinst2, err);
568
569 if (err)
570 return -EFAULT;
571
572 /* Ensure that VFP is disabled. */
573 vfp_flush_hwstate(thread);
574
575 /*
576 * As per the PCS, clear the length and stride bits for function
577 * entry.
578 */
579 hwstate->fpscr &= ~(FPSCR_LENGTH_MASK | FPSCR_STRIDE_MASK);
580 return 0;
581}
582
583/* Sanitise and restore the current VFP state from the provided structures. */
584int vfp_restore_user_hwstate(struct user_vfp __user *ufp,
585 struct user_vfp_exc __user *ufp_exc)
586{
587 struct thread_info *thread = current_thread_info();
588 struct vfp_hard_struct *hwstate = &thread->vfpstate.hard;
589 unsigned long fpexc;
590 int err = 0;
591
592 /* Disable VFP to avoid corrupting the new thread state. */
593 vfp_flush_hwstate(thread);
594
595 /*
596 * Copy the floating point registers. There can be unused
597 * registers see asm/hwcap.h for details.
598 */
599 err |= __copy_from_user(&hwstate->fpregs, &ufp->fpregs,
600 sizeof(hwstate->fpregs));
601 /*
602 * Copy the status and control register.
603 */
604 __get_user_error(hwstate->fpscr, &ufp->fpscr, err);
605
606 /*
607 * Sanitise and restore the exception registers.
608 */
609 __get_user_error(fpexc, &ufp_exc->fpexc, err);
610
611 /* Ensure the VFP is enabled. */
612 fpexc |= FPEXC_EN;
613
614 /* Ensure FPINST2 is invalid and the exception flag is cleared. */
615 fpexc &= ~(FPEXC_EX | FPEXC_FP2V);
616 hwstate->fpexc = fpexc;
617
618 __get_user_error(hwstate->fpinst, &ufp_exc->fpinst, err);
619 __get_user_error(hwstate->fpinst2, &ufp_exc->fpinst2, err);
620
621 return err ? -EFAULT : 0;
622}
623
624/*
532 * VFP hardware can lose all context when a CPU goes offline. 625 * VFP hardware can lose all context when a CPU goes offline.
533 * As we will be running in SMP mode with CPU hotplug, we will save the 626 * As we will be running in SMP mode with CPU hotplug, we will save the
534 * hardware state at every thread switch. We clear our held state when 627 * hardware state at every thread switch. We clear our held state when
@@ -558,7 +651,7 @@ static int __init vfp_init(void)
558 unsigned int cpu_arch = cpu_architecture(); 651 unsigned int cpu_arch = cpu_architecture();
559 652
560 if (cpu_arch >= CPU_ARCH_ARMv6) 653 if (cpu_arch >= CPU_ARCH_ARMv6)
561 vfp_enable(NULL); 654 on_each_cpu(vfp_enable, NULL, 1);
562 655
563 /* 656 /*
564 * First check that there is a VFP that we can use. 657 * First check that there is a VFP that we can use.
@@ -579,8 +672,6 @@ static int __init vfp_init(void)
579 } else { 672 } else {
580 hotcpu_notifier(vfp_hotplug, 0); 673 hotcpu_notifier(vfp_hotplug, 0);
581 674
582 smp_call_function(vfp_enable, NULL, 1);
583
584 VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT; /* Extract the architecture version */ 675 VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT; /* Extract the architecture version */
585 printk("implementor %02x architecture %d part %02x variant %x rev %x\n", 676 printk("implementor %02x architecture %d part %02x variant %x rev %x\n",
586 (vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT, 677 (vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT,
diff --git a/arch/blackfin/mach-bf538/boards/ezkit.c b/arch/blackfin/mach-bf538/boards/ezkit.c
index 1633a6f306c0..85038f54354d 100644
--- a/arch/blackfin/mach-bf538/boards/ezkit.c
+++ b/arch/blackfin/mach-bf538/boards/ezkit.c
@@ -38,7 +38,7 @@ static struct platform_device rtc_device = {
38 .name = "rtc-bfin", 38 .name = "rtc-bfin",
39 .id = -1, 39 .id = -1,
40}; 40};
41#endif 41#endif /* CONFIG_RTC_DRV_BFIN */
42 42
43#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 43#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
44#ifdef CONFIG_SERIAL_BFIN_UART0 44#ifdef CONFIG_SERIAL_BFIN_UART0
@@ -100,7 +100,7 @@ static struct platform_device bfin_uart0_device = {
100 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */ 100 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
101 }, 101 },
102}; 102};
103#endif 103#endif /* CONFIG_SERIAL_BFIN_UART0 */
104#ifdef CONFIG_SERIAL_BFIN_UART1 104#ifdef CONFIG_SERIAL_BFIN_UART1
105static struct resource bfin_uart1_resources[] = { 105static struct resource bfin_uart1_resources[] = {
106 { 106 {
@@ -148,7 +148,7 @@ static struct platform_device bfin_uart1_device = {
148 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */ 148 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
149 }, 149 },
150}; 150};
151#endif 151#endif /* CONFIG_SERIAL_BFIN_UART1 */
152#ifdef CONFIG_SERIAL_BFIN_UART2 152#ifdef CONFIG_SERIAL_BFIN_UART2
153static struct resource bfin_uart2_resources[] = { 153static struct resource bfin_uart2_resources[] = {
154 { 154 {
@@ -196,8 +196,8 @@ static struct platform_device bfin_uart2_device = {
196 .platform_data = &bfin_uart2_peripherals, /* Passed to driver */ 196 .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
197 }, 197 },
198}; 198};
199#endif 199#endif /* CONFIG_SERIAL_BFIN_UART2 */
200#endif 200#endif /* CONFIG_SERIAL_BFIN */
201 201
202#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 202#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
203#ifdef CONFIG_BFIN_SIR0 203#ifdef CONFIG_BFIN_SIR0
@@ -224,7 +224,7 @@ static struct platform_device bfin_sir0_device = {
224 .num_resources = ARRAY_SIZE(bfin_sir0_resources), 224 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
225 .resource = bfin_sir0_resources, 225 .resource = bfin_sir0_resources,
226}; 226};
227#endif 227#endif /* CONFIG_BFIN_SIR0 */
228#ifdef CONFIG_BFIN_SIR1 228#ifdef CONFIG_BFIN_SIR1
229static struct resource bfin_sir1_resources[] = { 229static struct resource bfin_sir1_resources[] = {
230 { 230 {
@@ -249,7 +249,7 @@ static struct platform_device bfin_sir1_device = {
249 .num_resources = ARRAY_SIZE(bfin_sir1_resources), 249 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
250 .resource = bfin_sir1_resources, 250 .resource = bfin_sir1_resources,
251}; 251};
252#endif 252#endif /* CONFIG_BFIN_SIR1 */
253#ifdef CONFIG_BFIN_SIR2 253#ifdef CONFIG_BFIN_SIR2
254static struct resource bfin_sir2_resources[] = { 254static struct resource bfin_sir2_resources[] = {
255 { 255 {
@@ -274,8 +274,8 @@ static struct platform_device bfin_sir2_device = {
274 .num_resources = ARRAY_SIZE(bfin_sir2_resources), 274 .num_resources = ARRAY_SIZE(bfin_sir2_resources),
275 .resource = bfin_sir2_resources, 275 .resource = bfin_sir2_resources,
276}; 276};
277#endif 277#endif /* CONFIG_BFIN_SIR2 */
278#endif 278#endif /* CONFIG_BFIN_SIR */
279 279
280#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 280#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
281#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART 281#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
@@ -311,7 +311,7 @@ static struct platform_device bfin_sport0_uart_device = {
311 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */ 311 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
312 }, 312 },
313}; 313};
314#endif 314#endif /* CONFIG_SERIAL_BFIN_SPORT0_UART */
315#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART 315#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
316static struct resource bfin_sport1_uart_resources[] = { 316static struct resource bfin_sport1_uart_resources[] = {
317 { 317 {
@@ -345,7 +345,7 @@ static struct platform_device bfin_sport1_uart_device = {
345 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */ 345 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
346 }, 346 },
347}; 347};
348#endif 348#endif /* CONFIG_SERIAL_BFIN_SPORT1_UART */
349#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART 349#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
350static struct resource bfin_sport2_uart_resources[] = { 350static struct resource bfin_sport2_uart_resources[] = {
351 { 351 {
@@ -379,7 +379,7 @@ static struct platform_device bfin_sport2_uart_device = {
379 .platform_data = &bfin_sport2_peripherals, /* Passed to driver */ 379 .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
380 }, 380 },
381}; 381};
382#endif 382#endif /* CONFIG_SERIAL_BFIN_SPORT2_UART */
383#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART 383#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
384static struct resource bfin_sport3_uart_resources[] = { 384static struct resource bfin_sport3_uart_resources[] = {
385 { 385 {
@@ -413,8 +413,8 @@ static struct platform_device bfin_sport3_uart_device = {
413 .platform_data = &bfin_sport3_peripherals, /* Passed to driver */ 413 .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
414 }, 414 },
415}; 415};
416#endif 416#endif /* CONFIG_SERIAL_BFIN_SPORT3_UART */
417#endif 417#endif /* CONFIG_SERIAL_BFIN_SPORT */
418 418
419#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE) 419#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
420static unsigned short bfin_can_peripherals[] = { 420static unsigned short bfin_can_peripherals[] = {
@@ -452,7 +452,7 @@ static struct platform_device bfin_can_device = {
452 .platform_data = &bfin_can_peripherals, /* Passed to driver */ 452 .platform_data = &bfin_can_peripherals, /* Passed to driver */
453 }, 453 },
454}; 454};
455#endif 455#endif /* CONFIG_CAN_BFIN */
456 456
457/* 457/*
458 * USB-LAN EzExtender board 458 * USB-LAN EzExtender board
@@ -488,7 +488,7 @@ static struct platform_device smc91x_device = {
488 .platform_data = &smc91x_info, 488 .platform_data = &smc91x_info,
489 }, 489 },
490}; 490};
491#endif 491#endif /* CONFIG_SMC91X */
492 492
493#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE) 493#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
494/* all SPI peripherals info goes here */ 494/* all SPI peripherals info goes here */
@@ -518,7 +518,8 @@ static struct flash_platform_data bfin_spi_flash_data = {
518static struct bfin5xx_spi_chip spi_flash_chip_info = { 518static struct bfin5xx_spi_chip spi_flash_chip_info = {
519 .enable_dma = 0, /* use dma transfer with this chip*/ 519 .enable_dma = 0, /* use dma transfer with this chip*/
520}; 520};
521#endif 521#endif /* CONFIG_MTD_M25P80 */
522#endif /* CONFIG_SPI_BFIN5XX */
522 523
523#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE) 524#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
524#include <linux/spi/ad7879.h> 525#include <linux/spi/ad7879.h>
@@ -535,7 +536,7 @@ static const struct ad7879_platform_data bfin_ad7879_ts_info = {
535 .gpio_export = 1, /* Export GPIO to gpiolib */ 536 .gpio_export = 1, /* Export GPIO to gpiolib */
536 .gpio_base = -1, /* Dynamic allocation */ 537 .gpio_base = -1, /* Dynamic allocation */
537}; 538};
538#endif 539#endif /* CONFIG_TOUCHSCREEN_AD7879 */
539 540
540#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) 541#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
541#include <asm/bfin-lq035q1.h> 542#include <asm/bfin-lq035q1.h>
@@ -564,7 +565,7 @@ static struct platform_device bfin_lq035q1_device = {
564 .platform_data = &bfin_lq035q1_data, 565 .platform_data = &bfin_lq035q1_data,
565 }, 566 },
566}; 567};
567#endif 568#endif /* CONFIG_FB_BFIN_LQ035Q1 */
568 569
569static struct spi_board_info bf538_spi_board_info[] __initdata = { 570static struct spi_board_info bf538_spi_board_info[] __initdata = {
570#if defined(CONFIG_MTD_M25P80) \ 571#if defined(CONFIG_MTD_M25P80) \
@@ -579,7 +580,7 @@ static struct spi_board_info bf538_spi_board_info[] __initdata = {
579 .controller_data = &spi_flash_chip_info, 580 .controller_data = &spi_flash_chip_info,
580 .mode = SPI_MODE_3, 581 .mode = SPI_MODE_3,
581 }, 582 },
582#endif 583#endif /* CONFIG_MTD_M25P80 */
583#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) 584#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
584 { 585 {
585 .modalias = "ad7879", 586 .modalias = "ad7879",
@@ -590,7 +591,7 @@ static struct spi_board_info bf538_spi_board_info[] __initdata = {
590 .chip_select = 1, 591 .chip_select = 1,
591 .mode = SPI_CPHA | SPI_CPOL, 592 .mode = SPI_CPHA | SPI_CPOL,
592 }, 593 },
593#endif 594#endif /* CONFIG_TOUCHSCREEN_AD7879_SPI */
594#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) 595#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
595 { 596 {
596 .modalias = "bfin-lq035q1-spi", 597 .modalias = "bfin-lq035q1-spi",
@@ -599,7 +600,7 @@ static struct spi_board_info bf538_spi_board_info[] __initdata = {
599 .chip_select = 2, 600 .chip_select = 2,
600 .mode = SPI_CPHA | SPI_CPOL, 601 .mode = SPI_CPHA | SPI_CPOL,
601 }, 602 },
602#endif 603#endif /* CONFIG_FB_BFIN_LQ035Q1 */
603#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) 604#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
604 { 605 {
605 .modalias = "spidev", 606 .modalias = "spidev",
@@ -607,7 +608,7 @@ static struct spi_board_info bf538_spi_board_info[] __initdata = {
607 .bus_num = 0, 608 .bus_num = 0,
608 .chip_select = 1, 609 .chip_select = 1,
609 }, 610 },
610#endif 611#endif /* CONFIG_SPI_SPIDEV */
611}; 612};
612 613
613/* SPI (0) */ 614/* SPI (0) */
@@ -716,8 +717,6 @@ static struct platform_device bf538_spi_master2 = {
716 }, 717 },
717}; 718};
718 719
719#endif /* spi master and devices */
720
721#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) 720#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
722static struct resource bfin_twi0_resource[] = { 721static struct resource bfin_twi0_resource[] = {
723 [0] = { 722 [0] = {
@@ -759,8 +758,8 @@ static struct platform_device i2c_bfin_twi1_device = {
759 .num_resources = ARRAY_SIZE(bfin_twi1_resource), 758 .num_resources = ARRAY_SIZE(bfin_twi1_resource),
760 .resource = bfin_twi1_resource, 759 .resource = bfin_twi1_resource,
761}; 760};
762#endif 761#endif /* CONFIG_BF542 */
763#endif 762#endif /* CONFIG_I2C_BLACKFIN_TWI */
764 763
765#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) 764#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
766#include <linux/gpio_keys.h> 765#include <linux/gpio_keys.h>
diff --git a/arch/c6x/include/asm/irq.h b/arch/c6x/include/asm/irq.h
index f13b78d5e1ca..ab4577f93d96 100644
--- a/arch/c6x/include/asm/irq.h
+++ b/arch/c6x/include/asm/irq.h
@@ -42,10 +42,6 @@
42/* This number is used when no interrupt has been assigned */ 42/* This number is used when no interrupt has been assigned */
43#define NO_IRQ 0 43#define NO_IRQ 0
44 44
45struct irq_data;
46extern irq_hw_number_t irqd_to_hwirq(struct irq_data *d);
47extern irq_hw_number_t virq_to_hw(unsigned int virq);
48
49extern void __init init_pic_c64xplus(void); 45extern void __init init_pic_c64xplus(void);
50 46
51extern void init_IRQ(void); 47extern void init_IRQ(void);
diff --git a/arch/c6x/kernel/irq.c b/arch/c6x/kernel/irq.c
index 65b8ddf54b44..c90fb5e82ad7 100644
--- a/arch/c6x/kernel/irq.c
+++ b/arch/c6x/kernel/irq.c
@@ -130,16 +130,3 @@ int arch_show_interrupts(struct seq_file *p, int prec)
130 seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count); 130 seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
131 return 0; 131 return 0;
132} 132}
133
134irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
135{
136 return d->hwirq;
137}
138EXPORT_SYMBOL_GPL(irqd_to_hwirq);
139
140irq_hw_number_t virq_to_hw(unsigned int virq)
141{
142 struct irq_data *irq_data = irq_get_irq_data(virq);
143 return WARN_ON(!irq_data) ? 0 : irq_data->hwirq;
144}
145EXPORT_SYMBOL_GPL(virq_to_hw);
diff --git a/arch/frv/include/asm/processor.h b/arch/frv/include/asm/processor.h
index 81c2e271d620..9b1a92b73f60 100644
--- a/arch/frv/include/asm/processor.h
+++ b/arch/frv/include/asm/processor.h
@@ -135,10 +135,6 @@ unsigned long get_wchan(struct task_struct *p);
135#define KSTK_EIP(tsk) ((tsk)->thread.frame0->pc) 135#define KSTK_EIP(tsk) ((tsk)->thread.frame0->pc)
136#define KSTK_ESP(tsk) ((tsk)->thread.frame0->sp) 136#define KSTK_ESP(tsk) ((tsk)->thread.frame0->sp)
137 137
138/* Allocation and freeing of basic task resources. */
139extern struct task_struct *alloc_task_struct_node(int node);
140extern void free_task_struct(struct task_struct *p);
141
142#define cpu_relax() barrier() 138#define cpu_relax() barrier()
143 139
144/* data cache prefetch */ 140/* data cache prefetch */
diff --git a/arch/hexagon/kernel/dma.c b/arch/hexagon/kernel/dma.c
index 37302218ca4a..0f2367cc5493 100644
--- a/arch/hexagon/kernel/dma.c
+++ b/arch/hexagon/kernel/dma.c
@@ -22,6 +22,7 @@
22#include <linux/bootmem.h> 22#include <linux/bootmem.h>
23#include <linux/genalloc.h> 23#include <linux/genalloc.h>
24#include <asm/dma-mapping.h> 24#include <asm/dma-mapping.h>
25#include <linux/module.h>
25 26
26struct dma_map_ops *dma_ops; 27struct dma_map_ops *dma_ops;
27EXPORT_SYMBOL(dma_ops); 28EXPORT_SYMBOL(dma_ops);
diff --git a/arch/hexagon/kernel/process.c b/arch/hexagon/kernel/process.c
index 18c4f0b0f4ba..ff02821bfb7e 100644
--- a/arch/hexagon/kernel/process.c
+++ b/arch/hexagon/kernel/process.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Process creation support for Hexagon 2 * Process creation support for Hexagon
3 * 3 *
4 * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. 4 * Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 and 7 * it under the terms of the GNU General Public License version 2 and
@@ -88,7 +88,7 @@ void (*idle_sleep)(void) = default_idle;
88void cpu_idle(void) 88void cpu_idle(void)
89{ 89{
90 while (1) { 90 while (1) {
91 tick_nohz_stop_sched_tick(1); 91 tick_nohz_idle_enter();
92 local_irq_disable(); 92 local_irq_disable();
93 while (!need_resched()) { 93 while (!need_resched()) {
94 idle_sleep(); 94 idle_sleep();
@@ -97,7 +97,7 @@ void cpu_idle(void)
97 local_irq_disable(); 97 local_irq_disable();
98 } 98 }
99 local_irq_enable(); 99 local_irq_enable();
100 tick_nohz_restart_sched_tick(); 100 tick_nohz_idle_exit();
101 schedule(); 101 schedule();
102 } 102 }
103} 103}
diff --git a/arch/hexagon/kernel/ptrace.c b/arch/hexagon/kernel/ptrace.c
index 32342de1a79c..96c3b2c4dbad 100644
--- a/arch/hexagon/kernel/ptrace.c
+++ b/arch/hexagon/kernel/ptrace.c
@@ -28,6 +28,7 @@
28#include <linux/ptrace.h> 28#include <linux/ptrace.h>
29#include <linux/regset.h> 29#include <linux/regset.h>
30#include <linux/user.h> 30#include <linux/user.h>
31#include <linux/elf.h>
31 32
32#include <asm/user.h> 33#include <asm/user.h>
33 34
diff --git a/arch/hexagon/kernel/smp.c b/arch/hexagon/kernel/smp.c
index 9b44a9e2d05a..1298141874a3 100644
--- a/arch/hexagon/kernel/smp.c
+++ b/arch/hexagon/kernel/smp.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * SMP support for Hexagon 2 * SMP support for Hexagon
3 * 3 *
4 * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. 4 * Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 and 7 * it under the terms of the GNU General Public License version 2 and
@@ -28,6 +28,7 @@
28#include <linux/sched.h> 28#include <linux/sched.h>
29#include <linux/smp.h> 29#include <linux/smp.h>
30#include <linux/spinlock.h> 30#include <linux/spinlock.h>
31#include <linux/cpu.h>
31 32
32#include <asm/time.h> /* timer_interrupt */ 33#include <asm/time.h> /* timer_interrupt */
33#include <asm/hexagon_vm.h> 34#include <asm/hexagon_vm.h>
@@ -177,7 +178,12 @@ void __cpuinit start_secondary(void)
177 178
178 printk(KERN_INFO "%s cpu %d\n", __func__, current_thread_info()->cpu); 179 printk(KERN_INFO "%s cpu %d\n", __func__, current_thread_info()->cpu);
179 180
181 notify_cpu_starting(cpu);
182
183 ipi_call_lock();
180 set_cpu_online(cpu, true); 184 set_cpu_online(cpu, true);
185 ipi_call_unlock();
186
181 local_irq_enable(); 187 local_irq_enable();
182 188
183 cpu_idle(); 189 cpu_idle();
diff --git a/arch/hexagon/kernel/time.c b/arch/hexagon/kernel/time.c
index 6bee15c9c113..5d9b33b67935 100644
--- a/arch/hexagon/kernel/time.c
+++ b/arch/hexagon/kernel/time.c
@@ -28,6 +28,7 @@
28#include <linux/of.h> 28#include <linux/of.h>
29#include <linux/of_address.h> 29#include <linux/of_address.h>
30#include <linux/of_irq.h> 30#include <linux/of_irq.h>
31#include <linux/module.h>
31 32
32#include <asm/timer-regs.h> 33#include <asm/timer-regs.h>
33#include <asm/hexagon_vm.h> 34#include <asm/hexagon_vm.h>
diff --git a/arch/hexagon/kernel/vdso.c b/arch/hexagon/kernel/vdso.c
index f212a453b527..5d39f42f7085 100644
--- a/arch/hexagon/kernel/vdso.c
+++ b/arch/hexagon/kernel/vdso.c
@@ -21,6 +21,7 @@
21#include <linux/err.h> 21#include <linux/err.h>
22#include <linux/mm.h> 22#include <linux/mm.h>
23#include <linux/vmalloc.h> 23#include <linux/vmalloc.h>
24#include <linux/binfmts.h>
24 25
25#include <asm/vdso.h> 26#include <asm/vdso.h>
26 27
diff --git a/arch/ia64/include/asm/cmpxchg.h b/arch/ia64/include/asm/cmpxchg.h
index 4c96187e2049..4f37dbbb8640 100644
--- a/arch/ia64/include/asm/cmpxchg.h
+++ b/arch/ia64/include/asm/cmpxchg.h
@@ -1 +1,147 @@
1#include <asm/intrinsics.h> 1#ifndef _ASM_IA64_CMPXCHG_H
2#define _ASM_IA64_CMPXCHG_H
3
4/*
5 * Compare/Exchange, forked from asm/intrinsics.h
6 * which was:
7 *
8 * Copyright (C) 2002-2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 */
11
12#ifndef __ASSEMBLY__
13
14#include <linux/types.h>
15/* include compiler specific intrinsics */
16#include <asm/ia64regs.h>
17#ifdef __INTEL_COMPILER
18# include <asm/intel_intrin.h>
19#else
20# include <asm/gcc_intrin.h>
21#endif
22
23/*
24 * This function doesn't exist, so you'll get a linker error if
25 * something tries to do an invalid xchg().
26 */
27extern void ia64_xchg_called_with_bad_pointer(void);
28
29#define __xchg(x, ptr, size) \
30({ \
31 unsigned long __xchg_result; \
32 \
33 switch (size) { \
34 case 1: \
35 __xchg_result = ia64_xchg1((__u8 *)ptr, x); \
36 break; \
37 \
38 case 2: \
39 __xchg_result = ia64_xchg2((__u16 *)ptr, x); \
40 break; \
41 \
42 case 4: \
43 __xchg_result = ia64_xchg4((__u32 *)ptr, x); \
44 break; \
45 \
46 case 8: \
47 __xchg_result = ia64_xchg8((__u64 *)ptr, x); \
48 break; \
49 default: \
50 ia64_xchg_called_with_bad_pointer(); \
51 } \
52 __xchg_result; \
53})
54
55#define xchg(ptr, x) \
56((__typeof__(*(ptr))) __xchg((unsigned long) (x), (ptr), sizeof(*(ptr))))
57
58/*
59 * Atomic compare and exchange. Compare OLD with MEM, if identical,
60 * store NEW in MEM. Return the initial value in MEM. Success is
61 * indicated by comparing RETURN with OLD.
62 */
63
64#define __HAVE_ARCH_CMPXCHG 1
65
66/*
67 * This function doesn't exist, so you'll get a linker error
68 * if something tries to do an invalid cmpxchg().
69 */
70extern long ia64_cmpxchg_called_with_bad_pointer(void);
71
72#define ia64_cmpxchg(sem, ptr, old, new, size) \
73({ \
74 __u64 _o_, _r_; \
75 \
76 switch (size) { \
77 case 1: \
78 _o_ = (__u8) (long) (old); \
79 break; \
80 case 2: \
81 _o_ = (__u16) (long) (old); \
82 break; \
83 case 4: \
84 _o_ = (__u32) (long) (old); \
85 break; \
86 case 8: \
87 _o_ = (__u64) (long) (old); \
88 break; \
89 default: \
90 break; \
91 } \
92 switch (size) { \
93 case 1: \
94 _r_ = ia64_cmpxchg1_##sem((__u8 *) ptr, new, _o_); \
95 break; \
96 \
97 case 2: \
98 _r_ = ia64_cmpxchg2_##sem((__u16 *) ptr, new, _o_); \
99 break; \
100 \
101 case 4: \
102 _r_ = ia64_cmpxchg4_##sem((__u32 *) ptr, new, _o_); \
103 break; \
104 \
105 case 8: \
106 _r_ = ia64_cmpxchg8_##sem((__u64 *) ptr, new, _o_); \
107 break; \
108 \
109 default: \
110 _r_ = ia64_cmpxchg_called_with_bad_pointer(); \
111 break; \
112 } \
113 (__typeof__(old)) _r_; \
114})
115
116#define cmpxchg_acq(ptr, o, n) \
117 ia64_cmpxchg(acq, (ptr), (o), (n), sizeof(*(ptr)))
118#define cmpxchg_rel(ptr, o, n) \
119 ia64_cmpxchg(rel, (ptr), (o), (n), sizeof(*(ptr)))
120
121/* for compatibility with other platforms: */
122#define cmpxchg(ptr, o, n) cmpxchg_acq((ptr), (o), (n))
123#define cmpxchg64(ptr, o, n) cmpxchg_acq((ptr), (o), (n))
124
125#define cmpxchg_local cmpxchg
126#define cmpxchg64_local cmpxchg64
127
128#ifdef CONFIG_IA64_DEBUG_CMPXCHG
129# define CMPXCHG_BUGCHECK_DECL int _cmpxchg_bugcheck_count = 128;
130# define CMPXCHG_BUGCHECK(v) \
131do { \
132 if (_cmpxchg_bugcheck_count-- <= 0) { \
133 void *ip; \
134 extern int printk(const char *fmt, ...); \
135 ip = (void *) ia64_getreg(_IA64_REG_IP); \
136 printk("CMPXCHG_BUGCHECK: stuck at %p on word %p\n", ip, (v));\
137 break; \
138 } \
139} while (0)
140#else /* !CONFIG_IA64_DEBUG_CMPXCHG */
141# define CMPXCHG_BUGCHECK_DECL
142# define CMPXCHG_BUGCHECK(v)
143#endif /* !CONFIG_IA64_DEBUG_CMPXCHG */
144
145#endif /* !__ASSEMBLY__ */
146
147#endif /* _ASM_IA64_CMPXCHG_H */
diff --git a/arch/ia64/include/asm/futex.h b/arch/ia64/include/asm/futex.h
index 0ab82cc2dc8f..d2bf1fd5e44f 100644
--- a/arch/ia64/include/asm/futex.h
+++ b/arch/ia64/include/asm/futex.h
@@ -106,15 +106,16 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
106 return -EFAULT; 106 return -EFAULT;
107 107
108 { 108 {
109 register unsigned long r8 __asm ("r8") = 0; 109 register unsigned long r8 __asm ("r8");
110 unsigned long prev; 110 unsigned long prev;
111 __asm__ __volatile__( 111 __asm__ __volatile__(
112 " mf;; \n" 112 " mf;; \n"
113 " mov ar.ccv=%3;; \n" 113 " mov %0=r0 \n"
114 "[1:] cmpxchg4.acq %0=[%1],%2,ar.ccv \n" 114 " mov ar.ccv=%4;; \n"
115 "[1:] cmpxchg4.acq %1=[%2],%3,ar.ccv \n"
115 " .xdata4 \"__ex_table\", 1b-., 2f-. \n" 116 " .xdata4 \"__ex_table\", 1b-., 2f-. \n"
116 "[2:]" 117 "[2:]"
117 : "=r" (prev) 118 : "=r" (r8), "=r" (prev)
118 : "r" (uaddr), "r" (newval), 119 : "r" (uaddr), "r" (newval),
119 "rO" ((long) (unsigned) oldval) 120 "rO" ((long) (unsigned) oldval)
120 : "memory"); 121 : "memory");
diff --git a/arch/ia64/include/asm/intrinsics.h b/arch/ia64/include/asm/intrinsics.h
index e4076b511829..d129e367e764 100644
--- a/arch/ia64/include/asm/intrinsics.h
+++ b/arch/ia64/include/asm/intrinsics.h
@@ -18,6 +18,7 @@
18#else 18#else
19# include <asm/gcc_intrin.h> 19# include <asm/gcc_intrin.h>
20#endif 20#endif
21#include <asm/cmpxchg.h>
21 22
22#define ia64_native_get_psr_i() (ia64_native_getreg(_IA64_REG_PSR) & IA64_PSR_I) 23#define ia64_native_get_psr_i() (ia64_native_getreg(_IA64_REG_PSR) & IA64_PSR_I)
23 24
@@ -81,119 +82,6 @@ extern unsigned long __bad_increment_for_ia64_fetch_and_add (void);
81 82
82#define ia64_fetch_and_add(i,v) (ia64_fetchadd(i, v, rel) + (i)) /* return new value */ 83#define ia64_fetch_and_add(i,v) (ia64_fetchadd(i, v, rel) + (i)) /* return new value */
83 84
84/*
85 * This function doesn't exist, so you'll get a linker error if
86 * something tries to do an invalid xchg().
87 */
88extern void ia64_xchg_called_with_bad_pointer (void);
89
90#define __xchg(x,ptr,size) \
91({ \
92 unsigned long __xchg_result; \
93 \
94 switch (size) { \
95 case 1: \
96 __xchg_result = ia64_xchg1((__u8 *)ptr, x); \
97 break; \
98 \
99 case 2: \
100 __xchg_result = ia64_xchg2((__u16 *)ptr, x); \
101 break; \
102 \
103 case 4: \
104 __xchg_result = ia64_xchg4((__u32 *)ptr, x); \
105 break; \
106 \
107 case 8: \
108 __xchg_result = ia64_xchg8((__u64 *)ptr, x); \
109 break; \
110 default: \
111 ia64_xchg_called_with_bad_pointer(); \
112 } \
113 __xchg_result; \
114})
115
116#define xchg(ptr,x) \
117 ((__typeof__(*(ptr))) __xchg ((unsigned long) (x), (ptr), sizeof(*(ptr))))
118
119/*
120 * Atomic compare and exchange. Compare OLD with MEM, if identical,
121 * store NEW in MEM. Return the initial value in MEM. Success is
122 * indicated by comparing RETURN with OLD.
123 */
124
125#define __HAVE_ARCH_CMPXCHG 1
126
127/*
128 * This function doesn't exist, so you'll get a linker error
129 * if something tries to do an invalid cmpxchg().
130 */
131extern long ia64_cmpxchg_called_with_bad_pointer (void);
132
133#define ia64_cmpxchg(sem,ptr,old,new,size) \
134({ \
135 __u64 _o_, _r_; \
136 \
137 switch (size) { \
138 case 1: _o_ = (__u8 ) (long) (old); break; \
139 case 2: _o_ = (__u16) (long) (old); break; \
140 case 4: _o_ = (__u32) (long) (old); break; \
141 case 8: _o_ = (__u64) (long) (old); break; \
142 default: break; \
143 } \
144 switch (size) { \
145 case 1: \
146 _r_ = ia64_cmpxchg1_##sem((__u8 *) ptr, new, _o_); \
147 break; \
148 \
149 case 2: \
150 _r_ = ia64_cmpxchg2_##sem((__u16 *) ptr, new, _o_); \
151 break; \
152 \
153 case 4: \
154 _r_ = ia64_cmpxchg4_##sem((__u32 *) ptr, new, _o_); \
155 break; \
156 \
157 case 8: \
158 _r_ = ia64_cmpxchg8_##sem((__u64 *) ptr, new, _o_); \
159 break; \
160 \
161 default: \
162 _r_ = ia64_cmpxchg_called_with_bad_pointer(); \
163 break; \
164 } \
165 (__typeof__(old)) _r_; \
166})
167
168#define cmpxchg_acq(ptr, o, n) \
169 ia64_cmpxchg(acq, (ptr), (o), (n), sizeof(*(ptr)))
170#define cmpxchg_rel(ptr, o, n) \
171 ia64_cmpxchg(rel, (ptr), (o), (n), sizeof(*(ptr)))
172
173/* for compatibility with other platforms: */
174#define cmpxchg(ptr, o, n) cmpxchg_acq((ptr), (o), (n))
175#define cmpxchg64(ptr, o, n) cmpxchg_acq((ptr), (o), (n))
176
177#define cmpxchg_local cmpxchg
178#define cmpxchg64_local cmpxchg64
179
180#ifdef CONFIG_IA64_DEBUG_CMPXCHG
181# define CMPXCHG_BUGCHECK_DECL int _cmpxchg_bugcheck_count = 128;
182# define CMPXCHG_BUGCHECK(v) \
183 do { \
184 if (_cmpxchg_bugcheck_count-- <= 0) { \
185 void *ip; \
186 extern int printk(const char *fmt, ...); \
187 ip = (void *) ia64_getreg(_IA64_REG_IP); \
188 printk("CMPXCHG_BUGCHECK: stuck at %p on word %p\n", ip, (v)); \
189 break; \
190 } \
191 } while (0)
192#else /* !CONFIG_IA64_DEBUG_CMPXCHG */
193# define CMPXCHG_BUGCHECK_DECL
194# define CMPXCHG_BUGCHECK(v)
195#endif /* !CONFIG_IA64_DEBUG_CMPXCHG */
196
197#endif 85#endif
198 86
199#ifdef __KERNEL__ 87#ifdef __KERNEL__
diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c
index 9d0fd7d5bb82..f00ba025375d 100644
--- a/arch/ia64/kernel/perfmon.c
+++ b/arch/ia64/kernel/perfmon.c
@@ -604,12 +604,6 @@ pfm_unprotect_ctx_ctxsw(pfm_context_t *x, unsigned long f)
604 spin_unlock(&(x)->ctx_lock); 604 spin_unlock(&(x)->ctx_lock);
605} 605}
606 606
607static inline unsigned int
608pfm_do_munmap(struct mm_struct *mm, unsigned long addr, size_t len, int acct)
609{
610 return do_munmap(mm, addr, len);
611}
612
613static inline unsigned long 607static inline unsigned long
614pfm_get_unmapped_area(struct file *file, unsigned long addr, unsigned long len, unsigned long pgoff, unsigned long flags, unsigned long exec) 608pfm_get_unmapped_area(struct file *file, unsigned long addr, unsigned long len, unsigned long pgoff, unsigned long flags, unsigned long exec)
615{ 609{
@@ -1458,8 +1452,9 @@ pfm_unreserve_session(pfm_context_t *ctx, int is_syswide, unsigned int cpu)
1458 * a PROTECT_CTX() section. 1452 * a PROTECT_CTX() section.
1459 */ 1453 */
1460static int 1454static int
1461pfm_remove_smpl_mapping(struct task_struct *task, void *vaddr, unsigned long size) 1455pfm_remove_smpl_mapping(void *vaddr, unsigned long size)
1462{ 1456{
1457 struct task_struct *task = current;
1463 int r; 1458 int r;
1464 1459
1465 /* sanity checks */ 1460 /* sanity checks */
@@ -1473,13 +1468,8 @@ pfm_remove_smpl_mapping(struct task_struct *task, void *vaddr, unsigned long siz
1473 /* 1468 /*
1474 * does the actual unmapping 1469 * does the actual unmapping
1475 */ 1470 */
1476 down_write(&task->mm->mmap_sem); 1471 r = vm_munmap((unsigned long)vaddr, size);
1477 1472
1478 DPRINT(("down_write done smpl_vaddr=%p size=%lu\n", vaddr, size));
1479
1480 r = pfm_do_munmap(task->mm, (unsigned long)vaddr, size, 0);
1481
1482 up_write(&task->mm->mmap_sem);
1483 if (r !=0) { 1473 if (r !=0) {
1484 printk(KERN_ERR "perfmon: [%d] unable to unmap sampling buffer @%p size=%lu\n", task_pid_nr(task), vaddr, size); 1474 printk(KERN_ERR "perfmon: [%d] unable to unmap sampling buffer @%p size=%lu\n", task_pid_nr(task), vaddr, size);
1485 } 1475 }
@@ -1945,7 +1935,7 @@ pfm_flush(struct file *filp, fl_owner_t id)
1945 * because some VM function reenables interrupts. 1935 * because some VM function reenables interrupts.
1946 * 1936 *
1947 */ 1937 */
1948 if (smpl_buf_vaddr) pfm_remove_smpl_mapping(current, smpl_buf_vaddr, smpl_buf_size); 1938 if (smpl_buf_vaddr) pfm_remove_smpl_mapping(smpl_buf_vaddr, smpl_buf_size);
1949 1939
1950 return 0; 1940 return 0;
1951} 1941}
diff --git a/arch/ia64/kvm/kvm-ia64.c b/arch/ia64/kvm/kvm-ia64.c
index f5104b7c52cd..463fb3bbe11e 100644
--- a/arch/ia64/kvm/kvm-ia64.c
+++ b/arch/ia64/kvm/kvm-ia64.c
@@ -1174,7 +1174,7 @@ out:
1174 1174
1175bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu) 1175bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
1176{ 1176{
1177 return irqchip_in_kernel(vcpu->kcm) == (vcpu->arch.apic != NULL); 1177 return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
1178} 1178}
1179 1179
1180int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu) 1180int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
diff --git a/arch/m68k/configs/m5275evb_defconfig b/arch/m68k/configs/m5275evb_defconfig
index 33c32aeca12b..a1230e82bb1e 100644
--- a/arch/m68k/configs/m5275evb_defconfig
+++ b/arch/m68k/configs/m5275evb_defconfig
@@ -49,7 +49,6 @@ CONFIG_BLK_DEV_RAM=y
49CONFIG_NETDEVICES=y 49CONFIG_NETDEVICES=y
50CONFIG_NET_ETHERNET=y 50CONFIG_NET_ETHERNET=y
51CONFIG_FEC=y 51CONFIG_FEC=y
52CONFIG_FEC2=y
53# CONFIG_NETDEV_1000 is not set 52# CONFIG_NETDEV_1000 is not set
54# CONFIG_NETDEV_10000 is not set 53# CONFIG_NETDEV_10000 is not set
55CONFIG_PPP=y 54CONFIG_PPP=y
diff --git a/arch/m68k/platform/520x/config.c b/arch/m68k/platform/520x/config.c
index 235947844f27..09df4b89e8be 100644
--- a/arch/m68k/platform/520x/config.c
+++ b/arch/m68k/platform/520x/config.c
@@ -22,7 +22,7 @@
22 22
23/***************************************************************************/ 23/***************************************************************************/
24 24
25#ifdef CONFIG_SPI_COLDFIRE_QSPI 25#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
26 26
27static void __init m520x_qspi_init(void) 27static void __init m520x_qspi_init(void)
28{ 28{
@@ -35,7 +35,7 @@ static void __init m520x_qspi_init(void)
35 writew(par, MCF_GPIO_PAR_UART); 35 writew(par, MCF_GPIO_PAR_UART);
36} 36}
37 37
38#endif /* CONFIG_SPI_COLDFIRE_QSPI */ 38#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
39 39
40/***************************************************************************/ 40/***************************************************************************/
41 41
@@ -79,7 +79,7 @@ void __init config_BSP(char *commandp, int size)
79 mach_sched_init = hw_timer_init; 79 mach_sched_init = hw_timer_init;
80 m520x_uarts_init(); 80 m520x_uarts_init();
81 m520x_fec_init(); 81 m520x_fec_init();
82#ifdef CONFIG_SPI_COLDFIRE_QSPI 82#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
83 m520x_qspi_init(); 83 m520x_qspi_init();
84#endif 84#endif
85} 85}
diff --git a/arch/m68k/platform/523x/config.c b/arch/m68k/platform/523x/config.c
index c8b405d5a961..d47dfd8f50a2 100644
--- a/arch/m68k/platform/523x/config.c
+++ b/arch/m68k/platform/523x/config.c
@@ -22,7 +22,7 @@
22 22
23/***************************************************************************/ 23/***************************************************************************/
24 24
25#ifdef CONFIG_SPI_COLDFIRE_QSPI 25#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
26 26
27static void __init m523x_qspi_init(void) 27static void __init m523x_qspi_init(void)
28{ 28{
@@ -36,7 +36,7 @@ static void __init m523x_qspi_init(void)
36 writew(par, MCFGPIO_PAR_TIMER); 36 writew(par, MCFGPIO_PAR_TIMER);
37} 37}
38 38
39#endif /* CONFIG_SPI_COLDFIRE_QSPI */ 39#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
40 40
41/***************************************************************************/ 41/***************************************************************************/
42 42
@@ -58,7 +58,7 @@ void __init config_BSP(char *commandp, int size)
58{ 58{
59 mach_sched_init = hw_timer_init; 59 mach_sched_init = hw_timer_init;
60 m523x_fec_init(); 60 m523x_fec_init();
61#ifdef CONFIG_SPI_COLDFIRE_QSPI 61#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
62 m523x_qspi_init(); 62 m523x_qspi_init();
63#endif 63#endif
64} 64}
diff --git a/arch/m68k/platform/5249/config.c b/arch/m68k/platform/5249/config.c
index bbf05135bb98..300e729a58d0 100644
--- a/arch/m68k/platform/5249/config.c
+++ b/arch/m68k/platform/5249/config.c
@@ -51,7 +51,7 @@ static struct platform_device *m5249_devices[] __initdata = {
51 51
52/***************************************************************************/ 52/***************************************************************************/
53 53
54#ifdef CONFIG_SPI_COLDFIRE_QSPI 54#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
55 55
56static void __init m5249_qspi_init(void) 56static void __init m5249_qspi_init(void)
57{ 57{
@@ -61,7 +61,7 @@ static void __init m5249_qspi_init(void)
61 mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI); 61 mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI);
62} 62}
63 63
64#endif /* CONFIG_SPI_COLDFIRE_QSPI */ 64#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
65 65
66/***************************************************************************/ 66/***************************************************************************/
67 67
@@ -90,7 +90,7 @@ void __init config_BSP(char *commandp, int size)
90#ifdef CONFIG_M5249C3 90#ifdef CONFIG_M5249C3
91 m5249_smc91x_init(); 91 m5249_smc91x_init();
92#endif 92#endif
93#ifdef CONFIG_SPI_COLDFIRE_QSPI 93#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
94 m5249_qspi_init(); 94 m5249_qspi_init();
95#endif 95#endif
96} 96}
diff --git a/arch/m68k/platform/527x/config.c b/arch/m68k/platform/527x/config.c
index 7ed848c3b848..b3cb378c5e94 100644
--- a/arch/m68k/platform/527x/config.c
+++ b/arch/m68k/platform/527x/config.c
@@ -23,7 +23,7 @@
23 23
24/***************************************************************************/ 24/***************************************************************************/
25 25
26#ifdef CONFIG_SPI_COLDFIRE_QSPI 26#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
27 27
28static void __init m527x_qspi_init(void) 28static void __init m527x_qspi_init(void)
29{ 29{
@@ -42,7 +42,7 @@ static void __init m527x_qspi_init(void)
42#endif 42#endif
43} 43}
44 44
45#endif /* CONFIG_SPI_COLDFIRE_QSPI */ 45#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
46 46
47/***************************************************************************/ 47/***************************************************************************/
48 48
@@ -74,9 +74,7 @@ static void __init m527x_fec_init(void)
74 writew(par | 0xf00, MCF_IPSBAR + 0x100082); 74 writew(par | 0xf00, MCF_IPSBAR + 0x100082);
75 v = readb(MCF_IPSBAR + 0x100078); 75 v = readb(MCF_IPSBAR + 0x100078);
76 writeb(v | 0xc0, MCF_IPSBAR + 0x100078); 76 writeb(v | 0xc0, MCF_IPSBAR + 0x100078);
77#endif
78 77
79#ifdef CONFIG_FEC2
80 /* Set multi-function pins to ethernet mode for fec1 */ 78 /* Set multi-function pins to ethernet mode for fec1 */
81 par = readw(MCF_IPSBAR + 0x100082); 79 par = readw(MCF_IPSBAR + 0x100082);
82 writew(par | 0xa0, MCF_IPSBAR + 0x100082); 80 writew(par | 0xa0, MCF_IPSBAR + 0x100082);
@@ -92,7 +90,7 @@ void __init config_BSP(char *commandp, int size)
92 mach_sched_init = hw_timer_init; 90 mach_sched_init = hw_timer_init;
93 m527x_uarts_init(); 91 m527x_uarts_init();
94 m527x_fec_init(); 92 m527x_fec_init();
95#ifdef CONFIG_SPI_COLDFIRE_QSPI 93#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
96 m527x_qspi_init(); 94 m527x_qspi_init();
97#endif 95#endif
98} 96}
diff --git a/arch/m68k/platform/528x/config.c b/arch/m68k/platform/528x/config.c
index d4492926614c..c5f11ba49be5 100644
--- a/arch/m68k/platform/528x/config.c
+++ b/arch/m68k/platform/528x/config.c
@@ -24,7 +24,7 @@
24 24
25/***************************************************************************/ 25/***************************************************************************/
26 26
27#ifdef CONFIG_SPI_COLDFIRE_QSPI 27#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
28 28
29static void __init m528x_qspi_init(void) 29static void __init m528x_qspi_init(void)
30{ 30{
@@ -32,7 +32,7 @@ static void __init m528x_qspi_init(void)
32 __raw_writeb(0x07, MCFGPIO_PQSPAR); 32 __raw_writeb(0x07, MCFGPIO_PQSPAR);
33} 33}
34 34
35#endif /* CONFIG_SPI_COLDFIRE_QSPI */ 35#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
36 36
37/***************************************************************************/ 37/***************************************************************************/
38 38
@@ -98,7 +98,7 @@ void __init config_BSP(char *commandp, int size)
98 mach_sched_init = hw_timer_init; 98 mach_sched_init = hw_timer_init;
99 m528x_uarts_init(); 99 m528x_uarts_init();
100 m528x_fec_init(); 100 m528x_fec_init();
101#ifdef CONFIG_SPI_COLDFIRE_QSPI 101#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
102 m528x_qspi_init(); 102 m528x_qspi_init();
103#endif 103#endif
104} 104}
diff --git a/arch/m68k/platform/532x/config.c b/arch/m68k/platform/532x/config.c
index 2bec3477b739..37082d02f2bd 100644
--- a/arch/m68k/platform/532x/config.c
+++ b/arch/m68k/platform/532x/config.c
@@ -30,7 +30,7 @@
30 30
31/***************************************************************************/ 31/***************************************************************************/
32 32
33#ifdef CONFIG_SPI_COLDFIRE_QSPI 33#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
34 34
35static void __init m532x_qspi_init(void) 35static void __init m532x_qspi_init(void)
36{ 36{
@@ -38,7 +38,7 @@ static void __init m532x_qspi_init(void)
38 writew(0x01f0, MCF_GPIO_PAR_QSPI); 38 writew(0x01f0, MCF_GPIO_PAR_QSPI);
39} 39}
40 40
41#endif /* CONFIG_SPI_COLDFIRE_QSPI */ 41#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
42 42
43/***************************************************************************/ 43/***************************************************************************/
44 44
@@ -77,7 +77,7 @@ void __init config_BSP(char *commandp, int size)
77 mach_sched_init = hw_timer_init; 77 mach_sched_init = hw_timer_init;
78 m532x_uarts_init(); 78 m532x_uarts_init();
79 m532x_fec_init(); 79 m532x_fec_init();
80#ifdef CONFIG_SPI_COLDFIRE_QSPI 80#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
81 m532x_qspi_init(); 81 m532x_qspi_init();
82#endif 82#endif
83 83
diff --git a/arch/m68k/platform/68EZ328/Makefile b/arch/m68k/platform/68EZ328/Makefile
index ee97735a242c..b44d799b1115 100644
--- a/arch/m68k/platform/68EZ328/Makefile
+++ b/arch/m68k/platform/68EZ328/Makefile
@@ -3,9 +3,3 @@
3# 3#
4 4
5obj-y := config.o 5obj-y := config.o
6
7extra-y := bootlogo.rh
8
9$(obj)/bootlogo.rh: $(src)/bootlogo.h
10 perl $(src)/../68328/bootlogo.pl < $(src)/bootlogo.h \
11 > $(obj)/bootlogo.rh
diff --git a/arch/m68k/platform/68VZ328/Makefile b/arch/m68k/platform/68VZ328/Makefile
index 447ffa0fd7c7..a49d75e65489 100644
--- a/arch/m68k/platform/68VZ328/Makefile
+++ b/arch/m68k/platform/68VZ328/Makefile
@@ -3,14 +3,9 @@
3# 3#
4 4
5obj-y := config.o 5obj-y := config.o
6logo-$(UCDIMM) := bootlogo.rh 6extra-$(DRAGEN2):= screen.h
7logo-$(DRAGEN2) := screen.h
8extra-y := $(logo-y)
9
10$(obj)/bootlogo.rh: $(src)/../68EZ328/bootlogo.h
11 perl $(src)/bootlogo.pl < $(src)/../68328/bootlogo.h > $(obj)/bootlogo.rh
12 7
13$(obj)/screen.h: $(src)/screen.xbm $(src)/xbm2lcd.pl 8$(obj)/screen.h: $(src)/screen.xbm $(src)/xbm2lcd.pl
14 perl $(src)/xbm2lcd.pl < $(src)/screen.xbm > $(obj)/screen.h 9 perl $(src)/xbm2lcd.pl < $(src)/screen.xbm > $(obj)/screen.h
15 10
16clean-files := $(obj)/screen.h $(obj)/bootlogo.rh 11clean-files := $(obj)/screen.h
diff --git a/arch/m68k/platform/68EZ328/bootlogo.h b/arch/m68k/platform/68VZ328/bootlogo.h
index e842bdae5839..b38e2b255142 100644
--- a/arch/m68k/platform/68EZ328/bootlogo.h
+++ b/arch/m68k/platform/68VZ328/bootlogo.h
@@ -1,6 +1,6 @@
1#define splash_width 640 1#define splash_width 640
2#define splash_height 480 2#define splash_height 480
3static unsigned char splash_bits[] = { 3unsigned char __attribute__ ((aligned(16))) bootlogo_bits[] = {
4 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 4 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
5 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 5 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
6 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 6 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
diff --git a/arch/m68k/platform/coldfire/device.c b/arch/m68k/platform/coldfire/device.c
index fa50c48292ff..3aa77ddea89d 100644
--- a/arch/m68k/platform/coldfire/device.c
+++ b/arch/m68k/platform/coldfire/device.c
@@ -114,14 +114,14 @@ static struct resource mcf_fec1_resources[] = {
114 114
115static struct platform_device mcf_fec1 = { 115static struct platform_device mcf_fec1 = {
116 .name = "fec", 116 .name = "fec",
117 .id = 0, 117 .id = 1,
118 .num_resources = ARRAY_SIZE(mcf_fec1_resources), 118 .num_resources = ARRAY_SIZE(mcf_fec1_resources),
119 .resource = mcf_fec1_resources, 119 .resource = mcf_fec1_resources,
120}; 120};
121#endif /* MCFFEC_BASE1 */ 121#endif /* MCFFEC_BASE1 */
122#endif /* CONFIG_FEC */ 122#endif /* CONFIG_FEC */
123 123
124#ifdef CONFIG_SPI_COLDFIRE_QSPI 124#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
125/* 125/*
126 * The ColdFire QSPI module is an SPI protocol hardware block used 126 * The ColdFire QSPI module is an SPI protocol hardware block used
127 * on a number of different ColdFire CPUs. 127 * on a number of different ColdFire CPUs.
@@ -274,7 +274,7 @@ static struct platform_device mcf_qspi = {
274 .resource = mcf_qspi_resources, 274 .resource = mcf_qspi_resources,
275 .dev.platform_data = &mcf_qspi_data, 275 .dev.platform_data = &mcf_qspi_data,
276}; 276};
277#endif /* CONFIG_SPI_COLDFIRE_QSPI */ 277#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
278 278
279static struct platform_device *mcf_devices[] __initdata = { 279static struct platform_device *mcf_devices[] __initdata = {
280 &mcf_uart, 280 &mcf_uart,
@@ -284,7 +284,7 @@ static struct platform_device *mcf_devices[] __initdata = {
284 &mcf_fec1, 284 &mcf_fec1,
285#endif 285#endif
286#endif 286#endif
287#ifdef CONFIG_SPI_COLDFIRE_QSPI 287#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
288 &mcf_qspi, 288 &mcf_qspi,
289#endif 289#endif
290}; 290};
diff --git a/arch/mips/ath79/dev-wmac.c b/arch/mips/ath79/dev-wmac.c
index e21507052066..9c717bf98ffe 100644
--- a/arch/mips/ath79/dev-wmac.c
+++ b/arch/mips/ath79/dev-wmac.c
@@ -58,8 +58,8 @@ static void __init ar913x_wmac_setup(void)
58 58
59static int ar933x_wmac_reset(void) 59static int ar933x_wmac_reset(void)
60{ 60{
61 ath79_device_reset_clear(AR933X_RESET_WMAC);
62 ath79_device_reset_set(AR933X_RESET_WMAC); 61 ath79_device_reset_set(AR933X_RESET_WMAC);
62 ath79_device_reset_clear(AR933X_RESET_WMAC);
63 63
64 return 0; 64 return 0;
65} 65}
diff --git a/arch/mips/include/asm/mach-jz4740/irq.h b/arch/mips/include/asm/mach-jz4740/irq.h
index a865c983c70a..5ad1a9c113c6 100644
--- a/arch/mips/include/asm/mach-jz4740/irq.h
+++ b/arch/mips/include/asm/mach-jz4740/irq.h
@@ -45,7 +45,7 @@
45#define JZ4740_IRQ_LCD JZ4740_IRQ(30) 45#define JZ4740_IRQ_LCD JZ4740_IRQ(30)
46 46
47/* 2nd-level interrupts */ 47/* 2nd-level interrupts */
48#define JZ4740_IRQ_DMA(x) (JZ4740_IRQ(32) + (X)) 48#define JZ4740_IRQ_DMA(x) (JZ4740_IRQ(32) + (x))
49 49
50#define JZ4740_IRQ_INTC_GPIO(x) (JZ4740_IRQ_GPIO0 - (x)) 50#define JZ4740_IRQ_INTC_GPIO(x) (JZ4740_IRQ_GPIO0 - (x))
51#define JZ4740_IRQ_GPIO(x) (JZ4740_IRQ(48) + (x)) 51#define JZ4740_IRQ_GPIO(x) (JZ4740_IRQ(48) + (x))
diff --git a/arch/mips/include/asm/mmu_context.h b/arch/mips/include/asm/mmu_context.h
index 73c0d45798de..9b02cfba7449 100644
--- a/arch/mips/include/asm/mmu_context.h
+++ b/arch/mips/include/asm/mmu_context.h
@@ -37,12 +37,6 @@ extern void tlbmiss_handler_setup_pgd(unsigned long pgd);
37 write_c0_xcontext((unsigned long) smp_processor_id() << 51); \ 37 write_c0_xcontext((unsigned long) smp_processor_id() << 51); \
38 } while (0) 38 } while (0)
39 39
40
41static inline unsigned long get_current_pgd(void)
42{
43 return PHYS_TO_XKSEG_CACHED((read_c0_context() >> 11) & ~0xfffUL);
44}
45
46#else /* CONFIG_MIPS_PGD_C0_CONTEXT: using pgd_current*/ 40#else /* CONFIG_MIPS_PGD_C0_CONTEXT: using pgd_current*/
47 41
48/* 42/*
diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c
index 185ca00c4c84..d5a338a1739c 100644
--- a/arch/mips/kernel/signal.c
+++ b/arch/mips/kernel/signal.c
@@ -257,11 +257,8 @@ asmlinkage int sys_sigsuspend(nabi_no_regargs struct pt_regs regs)
257 return -EFAULT; 257 return -EFAULT;
258 sigdelsetmask(&newset, ~_BLOCKABLE); 258 sigdelsetmask(&newset, ~_BLOCKABLE);
259 259
260 spin_lock_irq(&current->sighand->siglock);
261 current->saved_sigmask = current->blocked; 260 current->saved_sigmask = current->blocked;
262 current->blocked = newset; 261 set_current_blocked(&newset);
263 recalc_sigpending();
264 spin_unlock_irq(&current->sighand->siglock);
265 262
266 current->state = TASK_INTERRUPTIBLE; 263 current->state = TASK_INTERRUPTIBLE;
267 schedule(); 264 schedule();
@@ -286,11 +283,8 @@ asmlinkage int sys_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
286 return -EFAULT; 283 return -EFAULT;
287 sigdelsetmask(&newset, ~_BLOCKABLE); 284 sigdelsetmask(&newset, ~_BLOCKABLE);
288 285
289 spin_lock_irq(&current->sighand->siglock);
290 current->saved_sigmask = current->blocked; 286 current->saved_sigmask = current->blocked;
291 current->blocked = newset; 287 set_current_blocked(&newset);
292 recalc_sigpending();
293 spin_unlock_irq(&current->sighand->siglock);
294 288
295 current->state = TASK_INTERRUPTIBLE; 289 current->state = TASK_INTERRUPTIBLE;
296 schedule(); 290 schedule();
@@ -362,10 +356,7 @@ asmlinkage void sys_sigreturn(nabi_no_regargs struct pt_regs regs)
362 goto badframe; 356 goto badframe;
363 357
364 sigdelsetmask(&blocked, ~_BLOCKABLE); 358 sigdelsetmask(&blocked, ~_BLOCKABLE);
365 spin_lock_irq(&current->sighand->siglock); 359 set_current_blocked(&blocked);
366 current->blocked = blocked;
367 recalc_sigpending();
368 spin_unlock_irq(&current->sighand->siglock);
369 360
370 sig = restore_sigcontext(&regs, &frame->sf_sc); 361 sig = restore_sigcontext(&regs, &frame->sf_sc);
371 if (sig < 0) 362 if (sig < 0)
@@ -401,10 +392,7 @@ asmlinkage void sys_rt_sigreturn(nabi_no_regargs struct pt_regs regs)
401 goto badframe; 392 goto badframe;
402 393
403 sigdelsetmask(&set, ~_BLOCKABLE); 394 sigdelsetmask(&set, ~_BLOCKABLE);
404 spin_lock_irq(&current->sighand->siglock); 395 set_current_blocked(&set);
405 current->blocked = set;
406 recalc_sigpending();
407 spin_unlock_irq(&current->sighand->siglock);
408 396
409 sig = restore_sigcontext(&regs, &frame->rs_uc.uc_mcontext); 397 sig = restore_sigcontext(&regs, &frame->rs_uc.uc_mcontext);
410 if (sig < 0) 398 if (sig < 0)
@@ -580,12 +568,7 @@ static int handle_signal(unsigned long sig, siginfo_t *info,
580 if (ret) 568 if (ret)
581 return ret; 569 return ret;
582 570
583 spin_lock_irq(&current->sighand->siglock); 571 block_sigmask(ka, sig);
584 sigorsets(&current->blocked, &current->blocked, &ka->sa.sa_mask);
585 if (!(ka->sa.sa_flags & SA_NODEFER))
586 sigaddset(&current->blocked, sig);
587 recalc_sigpending();
588 spin_unlock_irq(&current->sighand->siglock);
589 572
590 return ret; 573 return ret;
591} 574}
diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c
index 06b5da392e24..ac3b8d89aae5 100644
--- a/arch/mips/kernel/signal32.c
+++ b/arch/mips/kernel/signal32.c
@@ -290,11 +290,8 @@ asmlinkage int sys32_sigsuspend(nabi_no_regargs struct pt_regs regs)
290 return -EFAULT; 290 return -EFAULT;
291 sigdelsetmask(&newset, ~_BLOCKABLE); 291 sigdelsetmask(&newset, ~_BLOCKABLE);
292 292
293 spin_lock_irq(&current->sighand->siglock);
294 current->saved_sigmask = current->blocked; 293 current->saved_sigmask = current->blocked;
295 current->blocked = newset; 294 set_current_blocked(&newset);
296 recalc_sigpending();
297 spin_unlock_irq(&current->sighand->siglock);
298 295
299 current->state = TASK_INTERRUPTIBLE; 296 current->state = TASK_INTERRUPTIBLE;
300 schedule(); 297 schedule();
@@ -318,11 +315,8 @@ asmlinkage int sys32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
318 return -EFAULT; 315 return -EFAULT;
319 sigdelsetmask(&newset, ~_BLOCKABLE); 316 sigdelsetmask(&newset, ~_BLOCKABLE);
320 317
321 spin_lock_irq(&current->sighand->siglock);
322 current->saved_sigmask = current->blocked; 318 current->saved_sigmask = current->blocked;
323 current->blocked = newset; 319 set_current_blocked(&newset);
324 recalc_sigpending();
325 spin_unlock_irq(&current->sighand->siglock);
326 320
327 current->state = TASK_INTERRUPTIBLE; 321 current->state = TASK_INTERRUPTIBLE;
328 schedule(); 322 schedule();
@@ -488,10 +482,7 @@ asmlinkage void sys32_sigreturn(nabi_no_regargs struct pt_regs regs)
488 goto badframe; 482 goto badframe;
489 483
490 sigdelsetmask(&blocked, ~_BLOCKABLE); 484 sigdelsetmask(&blocked, ~_BLOCKABLE);
491 spin_lock_irq(&current->sighand->siglock); 485 set_current_blocked(&blocked);
492 current->blocked = blocked;
493 recalc_sigpending();
494 spin_unlock_irq(&current->sighand->siglock);
495 486
496 sig = restore_sigcontext32(&regs, &frame->sf_sc); 487 sig = restore_sigcontext32(&regs, &frame->sf_sc);
497 if (sig < 0) 488 if (sig < 0)
@@ -529,10 +520,7 @@ asmlinkage void sys32_rt_sigreturn(nabi_no_regargs struct pt_regs regs)
529 goto badframe; 520 goto badframe;
530 521
531 sigdelsetmask(&set, ~_BLOCKABLE); 522 sigdelsetmask(&set, ~_BLOCKABLE);
532 spin_lock_irq(&current->sighand->siglock); 523 set_current_blocked(&set);
533 current->blocked = set;
534 recalc_sigpending();
535 spin_unlock_irq(&current->sighand->siglock);
536 524
537 sig = restore_sigcontext32(&regs, &frame->rs_uc.uc_mcontext); 525 sig = restore_sigcontext32(&regs, &frame->rs_uc.uc_mcontext);
538 if (sig < 0) 526 if (sig < 0)
diff --git a/arch/mips/kernel/signal_n32.c b/arch/mips/kernel/signal_n32.c
index ae29e894ab8d..86eb4b04631c 100644
--- a/arch/mips/kernel/signal_n32.c
+++ b/arch/mips/kernel/signal_n32.c
@@ -93,11 +93,8 @@ asmlinkage int sysn32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
93 sigset_from_compat(&newset, &uset); 93 sigset_from_compat(&newset, &uset);
94 sigdelsetmask(&newset, ~_BLOCKABLE); 94 sigdelsetmask(&newset, ~_BLOCKABLE);
95 95
96 spin_lock_irq(&current->sighand->siglock);
97 current->saved_sigmask = current->blocked; 96 current->saved_sigmask = current->blocked;
98 current->blocked = newset; 97 set_current_blocked(&newset);
99 recalc_sigpending();
100 spin_unlock_irq(&current->sighand->siglock);
101 98
102 current->state = TASK_INTERRUPTIBLE; 99 current->state = TASK_INTERRUPTIBLE;
103 schedule(); 100 schedule();
@@ -121,10 +118,7 @@ asmlinkage void sysn32_rt_sigreturn(nabi_no_regargs struct pt_regs regs)
121 goto badframe; 118 goto badframe;
122 119
123 sigdelsetmask(&set, ~_BLOCKABLE); 120 sigdelsetmask(&set, ~_BLOCKABLE);
124 spin_lock_irq(&current->sighand->siglock); 121 set_current_blocked(&set);
125 current->blocked = set;
126 recalc_sigpending();
127 spin_unlock_irq(&current->sighand->siglock);
128 122
129 sig = restore_sigcontext(&regs, &frame->rs_uc.uc_mcontext); 123 sig = restore_sigcontext(&regs, &frame->rs_uc.uc_mcontext);
130 if (sig < 0) 124 if (sig < 0)
diff --git a/arch/mn10300/kernel/smp.c b/arch/mn10300/kernel/smp.c
index 910dddf65e44..9cd69ad6aa02 100644
--- a/arch/mn10300/kernel/smp.c
+++ b/arch/mn10300/kernel/smp.c
@@ -24,6 +24,7 @@
24#include <linux/sched.h> 24#include <linux/sched.h>
25#include <linux/profile.h> 25#include <linux/profile.h>
26#include <linux/smp.h> 26#include <linux/smp.h>
27#include <linux/cpu.h>
27#include <asm/tlbflush.h> 28#include <asm/tlbflush.h>
28#include <asm/bitops.h> 29#include <asm/bitops.h>
29#include <asm/processor.h> 30#include <asm/processor.h>
@@ -38,7 +39,6 @@
38#include "internal.h" 39#include "internal.h"
39 40
40#ifdef CONFIG_HOTPLUG_CPU 41#ifdef CONFIG_HOTPLUG_CPU
41#include <linux/cpu.h>
42#include <asm/cacheflush.h> 42#include <asm/cacheflush.h>
43 43
44static unsigned long sleep_mode[NR_CPUS]; 44static unsigned long sleep_mode[NR_CPUS];
@@ -874,10 +874,13 @@ static void __init smp_online(void)
874 874
875 cpu = smp_processor_id(); 875 cpu = smp_processor_id();
876 876
877 local_irq_enable(); 877 notify_cpu_starting(cpu);
878 878
879 ipi_call_lock();
879 set_cpu_online(cpu, true); 880 set_cpu_online(cpu, true);
880 smp_wmb(); 881 ipi_call_unlock();
882
883 local_irq_enable();
881} 884}
882 885
883/** 886/**
diff --git a/arch/parisc/include/asm/hardware.h b/arch/parisc/include/asm/hardware.h
index 4e9626836bab..d1d864b81bae 100644
--- a/arch/parisc/include/asm/hardware.h
+++ b/arch/parisc/include/asm/hardware.h
@@ -2,7 +2,6 @@
2#define _PARISC_HARDWARE_H 2#define _PARISC_HARDWARE_H
3 3
4#include <linux/mod_devicetable.h> 4#include <linux/mod_devicetable.h>
5#include <asm/pdc.h>
6 5
7#define HWTYPE_ANY_ID PA_HWTYPE_ANY_ID 6#define HWTYPE_ANY_ID PA_HWTYPE_ANY_ID
8#define HVERSION_ANY_ID PA_HVERSION_ANY_ID 7#define HVERSION_ANY_ID PA_HVERSION_ANY_ID
@@ -95,12 +94,14 @@ struct bc_module {
95#define HPHW_MC 15 94#define HPHW_MC 15
96#define HPHW_FAULTY 31 95#define HPHW_FAULTY 31
97 96
97struct parisc_device_id;
98 98
99/* hardware.c: */ 99/* hardware.c: */
100extern const char *parisc_hardware_description(struct parisc_device_id *id); 100extern const char *parisc_hardware_description(struct parisc_device_id *id);
101extern enum cpu_type parisc_get_cpu_type(unsigned long hversion); 101extern enum cpu_type parisc_get_cpu_type(unsigned long hversion);
102 102
103struct pci_dev; 103struct pci_dev;
104struct hardware_path;
104 105
105/* drivers.c: */ 106/* drivers.c: */
106extern struct parisc_device *alloc_pa_dev(unsigned long hpa, 107extern struct parisc_device *alloc_pa_dev(unsigned long hpa,
diff --git a/arch/parisc/include/asm/page.h b/arch/parisc/include/asm/page.h
index a84cc1f925f6..4e0e7dbf0f3f 100644
--- a/arch/parisc/include/asm/page.h
+++ b/arch/parisc/include/asm/page.h
@@ -160,5 +160,11 @@ extern int npmem_ranges;
160 160
161#include <asm-generic/memory_model.h> 161#include <asm-generic/memory_model.h>
162#include <asm-generic/getorder.h> 162#include <asm-generic/getorder.h>
163#include <asm/pdc.h>
164
165#define PAGE0 ((struct zeropage *)__PAGE_OFFSET)
166
167/* DEFINITION OF THE ZERO-PAGE (PAG0) */
168/* based on work by Jason Eckhardt (jason@equator.com) */
163 169
164#endif /* _PARISC_PAGE_H */ 170#endif /* _PARISC_PAGE_H */
diff --git a/arch/parisc/include/asm/pdc.h b/arch/parisc/include/asm/pdc.h
index 4ca510b3c6f8..7f0f2d23059d 100644
--- a/arch/parisc/include/asm/pdc.h
+++ b/arch/parisc/include/asm/pdc.h
@@ -343,8 +343,6 @@
343 343
344#ifdef __KERNEL__ 344#ifdef __KERNEL__
345 345
346#include <asm/page.h> /* for __PAGE_OFFSET */
347
348extern int pdc_type; 346extern int pdc_type;
349 347
350/* Values for pdc_type */ 348/* Values for pdc_type */
@@ -677,11 +675,6 @@ static inline char * os_id_to_string(u16 os_id) {
677 675
678#endif /* __KERNEL__ */ 676#endif /* __KERNEL__ */
679 677
680#define PAGE0 ((struct zeropage *)__PAGE_OFFSET)
681
682/* DEFINITION OF THE ZERO-PAGE (PAG0) */
683/* based on work by Jason Eckhardt (jason@equator.com) */
684
685/* flags of the device_path */ 678/* flags of the device_path */
686#define PF_AUTOBOOT 0x80 679#define PF_AUTOBOOT 0x80
687#define PF_AUTOSEARCH 0x40 680#define PF_AUTOSEARCH 0x40
diff --git a/arch/parisc/include/asm/pgtable.h b/arch/parisc/include/asm/pgtable.h
index 22dadeb58695..ee99f2339356 100644
--- a/arch/parisc/include/asm/pgtable.h
+++ b/arch/parisc/include/asm/pgtable.h
@@ -44,6 +44,8 @@ struct vm_area_struct;
44 44
45#endif /* !__ASSEMBLY__ */ 45#endif /* !__ASSEMBLY__ */
46 46
47#include <asm/page.h>
48
47#define pte_ERROR(e) \ 49#define pte_ERROR(e) \
48 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) 50 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
49#define pmd_ERROR(e) \ 51#define pmd_ERROR(e) \
diff --git a/arch/parisc/include/asm/prefetch.h b/arch/parisc/include/asm/prefetch.h
index c5edc60c059f..1ee7c82672c1 100644
--- a/arch/parisc/include/asm/prefetch.h
+++ b/arch/parisc/include/asm/prefetch.h
@@ -21,7 +21,12 @@
21#define ARCH_HAS_PREFETCH 21#define ARCH_HAS_PREFETCH
22static inline void prefetch(const void *addr) 22static inline void prefetch(const void *addr)
23{ 23{
24 __asm__("ldw 0(%0), %%r0" : : "r" (addr)); 24 __asm__(
25#ifndef CONFIG_PA20
26 /* Need to avoid prefetch of NULL on PA7300LC */
27 " extrw,u,= %0,31,32,%%r0\n"
28#endif
29 " ldw 0(%0), %%r0" : : "r" (addr));
25} 30}
26 31
27/* LDD is a PA2.0 addition. */ 32/* LDD is a PA2.0 addition. */
diff --git a/arch/parisc/include/asm/spinlock.h b/arch/parisc/include/asm/spinlock.h
index 804aa28ab1d6..3516e0b27044 100644
--- a/arch/parisc/include/asm/spinlock.h
+++ b/arch/parisc/include/asm/spinlock.h
@@ -1,6 +1,8 @@
1#ifndef __ASM_SPINLOCK_H 1#ifndef __ASM_SPINLOCK_H
2#define __ASM_SPINLOCK_H 2#define __ASM_SPINLOCK_H
3 3
4#include <asm/barrier.h>
5#include <asm/ldcw.h>
4#include <asm/processor.h> 6#include <asm/processor.h>
5#include <asm/spinlock_types.h> 7#include <asm/spinlock_types.h>
6 8
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S
index 6f0594439143..535034217021 100644
--- a/arch/parisc/kernel/entry.S
+++ b/arch/parisc/kernel/entry.S
@@ -581,7 +581,11 @@
581 */ 581 */
582 cmpiclr,= 0x01,\tmp,%r0 582 cmpiclr,= 0x01,\tmp,%r0
583 ldi (_PAGE_DIRTY|_PAGE_READ|_PAGE_WRITE),\prot 583 ldi (_PAGE_DIRTY|_PAGE_READ|_PAGE_WRITE),\prot
584#ifdef CONFIG_64BIT
584 depd,z \prot,8,7,\prot 585 depd,z \prot,8,7,\prot
586#else
587 depw,z \prot,8,7,\prot
588#endif
585 /* 589 /*
586 * OK, it is in the temp alias region, check whether "from" or "to". 590 * OK, it is in the temp alias region, check whether "from" or "to".
587 * Check "subtle" note in pacache.S re: r23/r26. 591 * Check "subtle" note in pacache.S re: r23/r26.
diff --git a/arch/parisc/kernel/pacache.S b/arch/parisc/kernel/pacache.S
index 93ff3d90edd1..5d7218ad885c 100644
--- a/arch/parisc/kernel/pacache.S
+++ b/arch/parisc/kernel/pacache.S
@@ -692,7 +692,7 @@ ENTRY(flush_icache_page_asm)
692 692
693 /* Purge any old translation */ 693 /* Purge any old translation */
694 694
695 pitlb (%sr0,%r28) 695 pitlb (%sr4,%r28)
696 696
697 ldil L%icache_stride, %r1 697 ldil L%icache_stride, %r1
698 ldw R%icache_stride(%r1), %r1 698 ldw R%icache_stride(%r1), %r1
@@ -706,27 +706,29 @@ ENTRY(flush_icache_page_asm)
706 sub %r25, %r1, %r25 706 sub %r25, %r1, %r25
707 707
708 708
7091: fic,m %r1(%r28) 709 /* fic only has the type 26 form on PA1.1, requiring an
710 fic,m %r1(%r28) 710 * explicit space specification, so use %sr4 */
711 fic,m %r1(%r28) 7111: fic,m %r1(%sr4,%r28)
712 fic,m %r1(%r28) 712 fic,m %r1(%sr4,%r28)
713 fic,m %r1(%r28) 713 fic,m %r1(%sr4,%r28)
714 fic,m %r1(%r28) 714 fic,m %r1(%sr4,%r28)
715 fic,m %r1(%r28) 715 fic,m %r1(%sr4,%r28)
716 fic,m %r1(%r28) 716 fic,m %r1(%sr4,%r28)
717 fic,m %r1(%r28) 717 fic,m %r1(%sr4,%r28)
718 fic,m %r1(%r28) 718 fic,m %r1(%sr4,%r28)
719 fic,m %r1(%r28) 719 fic,m %r1(%sr4,%r28)
720 fic,m %r1(%r28) 720 fic,m %r1(%sr4,%r28)
721 fic,m %r1(%r28) 721 fic,m %r1(%sr4,%r28)
722 fic,m %r1(%r28) 722 fic,m %r1(%sr4,%r28)
723 fic,m %r1(%r28) 723 fic,m %r1(%sr4,%r28)
724 fic,m %r1(%sr4,%r28)
725 fic,m %r1(%sr4,%r28)
724 cmpb,COND(<<) %r28, %r25,1b 726 cmpb,COND(<<) %r28, %r25,1b
725 fic,m %r1(%r28) 727 fic,m %r1(%sr4,%r28)
726 728
727 sync 729 sync
728 bv %r0(%r2) 730 bv %r0(%r2)
729 pitlb (%sr0,%r25) 731 pitlb (%sr4,%r25)
730 .exit 732 .exit
731 733
732 .procend 734 .procend
diff --git a/arch/parisc/kernel/pdc_cons.c b/arch/parisc/kernel/pdc_cons.c
index 4f004596a6e7..47341aa208f2 100644
--- a/arch/parisc/kernel/pdc_cons.c
+++ b/arch/parisc/kernel/pdc_cons.c
@@ -50,6 +50,7 @@
50#include <linux/init.h> 50#include <linux/init.h>
51#include <linux/major.h> 51#include <linux/major.h>
52#include <linux/tty.h> 52#include <linux/tty.h>
53#include <asm/page.h> /* for PAGE0 */
53#include <asm/pdc.h> /* for iodc_call() proto and friends */ 54#include <asm/pdc.h> /* for iodc_call() proto and friends */
54 55
55static DEFINE_SPINLOCK(pdc_console_lock); 56static DEFINE_SPINLOCK(pdc_console_lock);
@@ -104,7 +105,7 @@ static int pdc_console_tty_open(struct tty_struct *tty, struct file *filp)
104 105
105static void pdc_console_tty_close(struct tty_struct *tty, struct file *filp) 106static void pdc_console_tty_close(struct tty_struct *tty, struct file *filp)
106{ 107{
107 if (!tty->count) { 108 if (tty->count == 1) {
108 del_timer_sync(&pdc_console_timer); 109 del_timer_sync(&pdc_console_timer);
109 tty_port_tty_set(&tty_port, NULL); 110 tty_port_tty_set(&tty_port, NULL);
110 } 111 }
diff --git a/arch/parisc/kernel/smp.c b/arch/parisc/kernel/smp.c
index 0bb1d63907f8..4dc7b7942b4c 100644
--- a/arch/parisc/kernel/smp.c
+++ b/arch/parisc/kernel/smp.c
@@ -31,6 +31,7 @@
31#include <linux/delay.h> 31#include <linux/delay.h>
32#include <linux/bitops.h> 32#include <linux/bitops.h>
33#include <linux/ftrace.h> 33#include <linux/ftrace.h>
34#include <linux/cpu.h>
34 35
35#include <linux/atomic.h> 36#include <linux/atomic.h>
36#include <asm/current.h> 37#include <asm/current.h>
@@ -295,8 +296,13 @@ smp_cpu_init(int cpunum)
295 296
296 printk(KERN_CRIT "CPU#%d already initialized!\n", cpunum); 297 printk(KERN_CRIT "CPU#%d already initialized!\n", cpunum);
297 machine_halt(); 298 machine_halt();
298 } 299 }
300
301 notify_cpu_starting(cpunum);
302
303 ipi_call_lock();
299 set_cpu_online(cpunum, true); 304 set_cpu_online(cpunum, true);
305 ipi_call_unlock();
300 306
301 /* Initialise the idle task for this CPU */ 307 /* Initialise the idle task for this CPU */
302 atomic_inc(&init_mm.mm_count); 308 atomic_inc(&init_mm.mm_count);
diff --git a/arch/parisc/kernel/time.c b/arch/parisc/kernel/time.c
index 7c0774397b89..70e105d62423 100644
--- a/arch/parisc/kernel/time.c
+++ b/arch/parisc/kernel/time.c
@@ -29,6 +29,7 @@
29#include <asm/uaccess.h> 29#include <asm/uaccess.h>
30#include <asm/io.h> 30#include <asm/io.h>
31#include <asm/irq.h> 31#include <asm/irq.h>
32#include <asm/page.h>
32#include <asm/param.h> 33#include <asm/param.h>
33#include <asm/pdc.h> 34#include <asm/pdc.h>
34#include <asm/led.h> 35#include <asm/led.h>
diff --git a/arch/powerpc/boot/dts/fsl/pq3-mpic-message-B.dtsi b/arch/powerpc/boot/dts/fsl/pq3-mpic-message-B.dtsi
new file mode 100644
index 000000000000..1cf0b77b1efe
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-mpic-message-B.dtsi
@@ -0,0 +1,43 @@
1/*
2 * PQ3 MPIC Message (Group B) device tree stub [ controller @ offset 0x42400 ]
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35message@42400 {
36 compatible = "fsl,mpic-v3.1-msgr";
37 reg = <0x42400 0x200>;
38 interrupts = <
39 0xb4 2 0 0
40 0xb5 2 0 0
41 0xb6 2 0 0
42 0xb7 2 0 0>;
43};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
index fdedf7b1fe0f..71c30eb10056 100644
--- a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
+++ b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
@@ -53,6 +53,16 @@ timer@41100 {
53 3 0 3 0>; 53 3 0 3 0>;
54}; 54};
55 55
56message@41400 {
57 compatible = "fsl,mpic-v3.1-msgr";
58 reg = <0x41400 0x200>;
59 interrupts = <
60 0xb0 2 0 0
61 0xb1 2 0 0
62 0xb2 2 0 0
63 0xb3 2 0 0>;
64};
65
56msi@41600 { 66msi@41600 {
57 compatible = "fsl,mpic-msi"; 67 compatible = "fsl,mpic-msi";
58 reg = <0x41600 0x80>; 68 reg = <0x41600 0x80>;
diff --git a/arch/powerpc/include/asm/exception-64s.h b/arch/powerpc/include/asm/exception-64s.h
index 548da3aa0a30..d58fc4e4149c 100644
--- a/arch/powerpc/include/asm/exception-64s.h
+++ b/arch/powerpc/include/asm/exception-64s.h
@@ -288,13 +288,6 @@ label##_hv: \
288/* Exception addition: Hard disable interrupts */ 288/* Exception addition: Hard disable interrupts */
289#define DISABLE_INTS SOFT_DISABLE_INTS(r10,r11) 289#define DISABLE_INTS SOFT_DISABLE_INTS(r10,r11)
290 290
291/* Exception addition: Keep interrupt state */
292#define ENABLE_INTS \
293 ld r11,PACAKMSR(r13); \
294 ld r12,_MSR(r1); \
295 rlwimi r11,r12,0,MSR_EE; \
296 mtmsrd r11,1
297
298#define ADD_NVGPRS \ 291#define ADD_NVGPRS \
299 bl .save_nvgprs 292 bl .save_nvgprs
300 293
diff --git a/arch/powerpc/include/asm/irq.h b/arch/powerpc/include/asm/irq.h
index cf417e510736..0e40843a1c6e 100644
--- a/arch/powerpc/include/asm/irq.h
+++ b/arch/powerpc/include/asm/irq.h
@@ -18,10 +18,6 @@
18#include <linux/atomic.h> 18#include <linux/atomic.h>
19 19
20 20
21/* Define a way to iterate across irqs. */
22#define for_each_irq(i) \
23 for ((i) = 0; (i) < NR_IRQS; ++(i))
24
25extern atomic_t ppc_n_lost_interrupts; 21extern atomic_t ppc_n_lost_interrupts;
26 22
27/* This number is used when no interrupt has been assigned */ 23/* This number is used when no interrupt has been assigned */
@@ -33,8 +29,6 @@ extern atomic_t ppc_n_lost_interrupts;
33/* Same thing, used by the generic IRQ code */ 29/* Same thing, used by the generic IRQ code */
34#define NR_IRQS_LEGACY NUM_ISA_INTERRUPTS 30#define NR_IRQS_LEGACY NUM_ISA_INTERRUPTS
35 31
36struct irq_data;
37extern irq_hw_number_t irqd_to_hwirq(struct irq_data *d);
38extern irq_hw_number_t virq_to_hw(unsigned int virq); 32extern irq_hw_number_t virq_to_hw(unsigned int virq);
39 33
40/** 34/**
diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h
index aa795ccef294..fd07f43d6622 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -81,12 +81,13 @@ struct kvmppc_vcpu_book3s {
81 u64 sdr1; 81 u64 sdr1;
82 u64 hior; 82 u64 hior;
83 u64 msr_mask; 83 u64 msr_mask;
84 u64 vsid_next;
85#ifdef CONFIG_PPC_BOOK3S_32 84#ifdef CONFIG_PPC_BOOK3S_32
86 u32 vsid_pool[VSID_POOL_SIZE]; 85 u32 vsid_pool[VSID_POOL_SIZE];
86 u32 vsid_next;
87#else 87#else
88 u64 vsid_first; 88 u64 proto_vsid_first;
89 u64 vsid_max; 89 u64 proto_vsid_max;
90 u64 proto_vsid_next;
90#endif 91#endif
91 int context_id[SID_CONTEXTS]; 92 int context_id[SID_CONTEXTS];
92 93
diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index c65b9294376e..c9f698a994be 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -275,9 +275,6 @@ struct mpic
275 unsigned int isu_mask; 275 unsigned int isu_mask;
276 /* Number of sources */ 276 /* Number of sources */
277 unsigned int num_sources; 277 unsigned int num_sources;
278 /* default senses array */
279 unsigned char *senses;
280 unsigned int senses_count;
281 278
282 /* vector numbers used for internal sources (ipi/timers) */ 279 /* vector numbers used for internal sources (ipi/timers) */
283 unsigned int ipi_vecs[4]; 280 unsigned int ipi_vecs[4];
@@ -415,21 +412,6 @@ extern struct mpic *mpic_alloc(struct device_node *node,
415extern void mpic_assign_isu(struct mpic *mpic, unsigned int isu_num, 412extern void mpic_assign_isu(struct mpic *mpic, unsigned int isu_num,
416 phys_addr_t phys_addr); 413 phys_addr_t phys_addr);
417 414
418/* Set default sense codes
419 *
420 * @mpic: controller
421 * @senses: array of sense codes
422 * @count: size of above array
423 *
424 * Optionally provide an array (indexed on hardware interrupt numbers
425 * for this MPIC) of default sense codes for the chip. Those are linux
426 * sense codes IRQ_TYPE_*
427 *
428 * The driver gets ownership of the pointer, don't dispose of it or
429 * anything like that. __init only.
430 */
431extern void mpic_set_default_senses(struct mpic *mpic, u8 *senses, int count);
432
433 415
434/* Initialize the controller. After this has been called, none of the above 416/* Initialize the controller. After this has been called, none of the above
435 * should be called again for this mpic 417 * should be called again for this mpic
diff --git a/arch/powerpc/include/asm/mpic_msgr.h b/arch/powerpc/include/asm/mpic_msgr.h
index 3ec37dc9003e..326d33ca55cd 100644
--- a/arch/powerpc/include/asm/mpic_msgr.h
+++ b/arch/powerpc/include/asm/mpic_msgr.h
@@ -13,6 +13,7 @@
13 13
14#include <linux/types.h> 14#include <linux/types.h>
15#include <linux/spinlock.h> 15#include <linux/spinlock.h>
16#include <asm/smp.h>
16 17
17struct mpic_msgr { 18struct mpic_msgr {
18 u32 __iomem *base; 19 u32 __iomem *base;
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index b86faa9107da..8a97aa7289d3 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -15,11 +15,6 @@
15#ifndef __ASM_POWERPC_REG_BOOKE_H__ 15#ifndef __ASM_POWERPC_REG_BOOKE_H__
16#define __ASM_POWERPC_REG_BOOKE_H__ 16#define __ASM_POWERPC_REG_BOOKE_H__
17 17
18#ifdef CONFIG_BOOKE_WDT
19extern u32 booke_wdt_enabled;
20extern u32 booke_wdt_period;
21#endif /* CONFIG_BOOKE_WDT */
22
23/* Machine State Register (MSR) Fields */ 18/* Machine State Register (MSR) Fields */
24#define MSR_GS (1<<28) /* Guest state */ 19#define MSR_GS (1<<28) /* Guest state */
25#define MSR_UCLE (1<<26) /* User-mode cache lock enable */ 20#define MSR_UCLE (1<<26) /* User-mode cache lock enable */
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 3e57a00b8cba..ba3aeb4bc06a 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -206,40 +206,43 @@ reenable_mmu: /* re-enable mmu so we can */
206 andi. r10,r10,MSR_EE /* Did EE change? */ 206 andi. r10,r10,MSR_EE /* Did EE change? */
207 beq 1f 207 beq 1f
208 208
209 /* Save handler and return address into the 2 unused words
210 * of the STACK_FRAME_OVERHEAD (sneak sneak sneak). Everything
211 * else can be recovered from the pt_regs except r3 which for
212 * normal interrupts has been set to pt_regs and for syscalls
213 * is an argument, so we temporarily use ORIG_GPR3 to save it
214 */
215 stw r9,8(r1)
216 stw r11,12(r1)
217 stw r3,ORIG_GPR3(r1)
218 /* 209 /*
219 * The trace_hardirqs_off will use CALLER_ADDR0 and CALLER_ADDR1. 210 * The trace_hardirqs_off will use CALLER_ADDR0 and CALLER_ADDR1.
220 * If from user mode there is only one stack frame on the stack, and 211 * If from user mode there is only one stack frame on the stack, and
221 * accessing CALLER_ADDR1 will cause oops. So we need create a dummy 212 * accessing CALLER_ADDR1 will cause oops. So we need create a dummy
222 * stack frame to make trace_hardirqs_off happy. 213 * stack frame to make trace_hardirqs_off happy.
214 *
215 * This is handy because we also need to save a bunch of GPRs,
216 * r3 can be different from GPR3(r1) at this point, r9 and r11
217 * contains the old MSR and handler address respectively,
218 * r4 & r5 can contain page fault arguments that need to be passed
219 * along as well. r12, CCR, CTR, XER etc... are left clobbered as
220 * they aren't useful past this point (aren't syscall arguments),
221 * the rest is restored from the exception frame.
223 */ 222 */
223 stwu r1,-32(r1)
224 stw r9,8(r1)
225 stw r11,12(r1)
226 stw r3,16(r1)
227 stw r4,20(r1)
228 stw r5,24(r1)
224 andi. r12,r12,MSR_PR 229 andi. r12,r12,MSR_PR
225 beq 11f 230 b 11f
226 stwu r1,-16(r1)
227 bl trace_hardirqs_off 231 bl trace_hardirqs_off
228 addi r1,r1,16
229 b 12f 232 b 12f
230
23111: 23311:
232 bl trace_hardirqs_off 234 bl trace_hardirqs_off
23312: 23512:
236 lwz r5,24(r1)
237 lwz r4,20(r1)
238 lwz r3,16(r1)
239 lwz r11,12(r1)
240 lwz r9,8(r1)
241 addi r1,r1,32
234 lwz r0,GPR0(r1) 242 lwz r0,GPR0(r1)
235 lwz r3,ORIG_GPR3(r1)
236 lwz r4,GPR4(r1)
237 lwz r5,GPR5(r1)
238 lwz r6,GPR6(r1) 243 lwz r6,GPR6(r1)
239 lwz r7,GPR7(r1) 244 lwz r7,GPR7(r1)
240 lwz r8,GPR8(r1) 245 lwz r8,GPR8(r1)
241 lwz r9,8(r1)
242 lwz r11,12(r1)
2431: mtctr r11 2461: mtctr r11
244 mtlr r9 247 mtlr r9
245 bctr /* jump to handler */ 248 bctr /* jump to handler */
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index f8a7a1a1a9f4..ef2074c3e906 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -588,23 +588,19 @@ _GLOBAL(ret_from_except_lite)
588fast_exc_return_irq: 588fast_exc_return_irq:
589restore: 589restore:
590 /* 590 /*
591 * This is the main kernel exit path, we first check if we 591 * This is the main kernel exit path. First we check if we
592 * have to change our interrupt state. 592 * are about to re-enable interrupts
593 */ 593 */
594 ld r5,SOFTE(r1) 594 ld r5,SOFTE(r1)
595 lbz r6,PACASOFTIRQEN(r13) 595 lbz r6,PACASOFTIRQEN(r13)
596 cmpwi cr1,r5,0 596 cmpwi cr0,r5,0
597 cmpw cr0,r5,r6 597 beq restore_irq_off
598 beq cr0,4f
599 598
600 /* We do, handle disable first, which is easy */ 599 /* We are enabling, were we already enabled ? Yes, just return */
601 bne cr1,3f; 600 cmpwi cr0,r6,1
602 li r0,0 601 beq cr0,do_restore
603 stb r0,PACASOFTIRQEN(r13);
604 TRACE_DISABLE_INTS
605 b 4f
606 602
6073: /* 603 /*
608 * We are about to soft-enable interrupts (we are hard disabled 604 * We are about to soft-enable interrupts (we are hard disabled
609 * at this point). We check if there's anything that needs to 605 * at this point). We check if there's anything that needs to
610 * be replayed first. 606 * be replayed first.
@@ -626,7 +622,7 @@ restore_no_replay:
626 /* 622 /*
627 * Final return path. BookE is handled in a different file 623 * Final return path. BookE is handled in a different file
628 */ 624 */
6294: 625do_restore:
630#ifdef CONFIG_PPC_BOOK3E 626#ifdef CONFIG_PPC_BOOK3E
631 b .exception_return_book3e 627 b .exception_return_book3e
632#else 628#else
@@ -700,6 +696,25 @@ fast_exception_return:
700#endif /* CONFIG_PPC_BOOK3E */ 696#endif /* CONFIG_PPC_BOOK3E */
701 697
702 /* 698 /*
699 * We are returning to a context with interrupts soft disabled.
700 *
701 * However, we may also about to hard enable, so we need to
702 * make sure that in this case, we also clear PACA_IRQ_HARD_DIS
703 * or that bit can get out of sync and bad things will happen
704 */
705restore_irq_off:
706 ld r3,_MSR(r1)
707 lbz r7,PACAIRQHAPPENED(r13)
708 andi. r0,r3,MSR_EE
709 beq 1f
710 rlwinm r7,r7,0,~PACA_IRQ_HARD_DIS
711 stb r7,PACAIRQHAPPENED(r13)
7121: li r0,0
713 stb r0,PACASOFTIRQEN(r13);
714 TRACE_DISABLE_INTS
715 b do_restore
716
717 /*
703 * Something did happen, check if a re-emit is needed 718 * Something did happen, check if a re-emit is needed
704 * (this also clears paca->irq_happened) 719 * (this also clears paca->irq_happened)
705 */ 720 */
@@ -748,6 +763,9 @@ restore_check_irq_replay:
748#endif /* CONFIG_PPC_BOOK3E */ 763#endif /* CONFIG_PPC_BOOK3E */
7491: b .ret_from_except /* What else to do here ? */ 7641: b .ret_from_except /* What else to do here ? */
750 765
766
767
7683:
751do_work: 769do_work:
752#ifdef CONFIG_PREEMPT 770#ifdef CONFIG_PREEMPT
753 andi. r0,r3,MSR_PR /* Returning to user mode? */ 771 andi. r0,r3,MSR_PR /* Returning to user mode? */
@@ -767,16 +785,6 @@ do_work:
767 SOFT_DISABLE_INTS(r3,r4) 785 SOFT_DISABLE_INTS(r3,r4)
7681: bl .preempt_schedule_irq 7861: bl .preempt_schedule_irq
769 787
770 /* Hard-disable interrupts again (and update PACA) */
771#ifdef CONFIG_PPC_BOOK3E
772 wrteei 0
773#else
774 ld r10,PACAKMSR(r13) /* Get kernel MSR without EE */
775 mtmsrd r10,1
776#endif /* CONFIG_PPC_BOOK3E */
777 li r0,PACA_IRQ_HARD_DIS
778 stb r0,PACAIRQHAPPENED(r13)
779
780 /* Re-test flags and eventually loop */ 788 /* Re-test flags and eventually loop */
781 clrrdi r9,r1,THREAD_SHIFT 789 clrrdi r9,r1,THREAD_SHIFT
782 ld r4,TI_FLAGS(r9) 790 ld r4,TI_FLAGS(r9)
@@ -787,14 +795,6 @@ do_work:
787user_work: 795user_work:
788#endif /* CONFIG_PREEMPT */ 796#endif /* CONFIG_PREEMPT */
789 797
790 /* Enable interrupts */
791#ifdef CONFIG_PPC_BOOK3E
792 wrteei 1
793#else
794 ori r10,r10,MSR_EE
795 mtmsrd r10,1
796#endif /* CONFIG_PPC_BOOK3E */
797
798 andi. r0,r4,_TIF_NEED_RESCHED 798 andi. r0,r4,_TIF_NEED_RESCHED
799 beq 1f 799 beq 1f
800 bl .restore_interrupts 800 bl .restore_interrupts
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index cb705fdbb458..8f880bc77c56 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -768,8 +768,8 @@ alignment_common:
768 std r3,_DAR(r1) 768 std r3,_DAR(r1)
769 std r4,_DSISR(r1) 769 std r4,_DSISR(r1)
770 bl .save_nvgprs 770 bl .save_nvgprs
771 DISABLE_INTS
771 addi r3,r1,STACK_FRAME_OVERHEAD 772 addi r3,r1,STACK_FRAME_OVERHEAD
772 ENABLE_INTS
773 bl .alignment_exception 773 bl .alignment_exception
774 b .ret_from_except 774 b .ret_from_except
775 775
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 243dbabfe74d..641da9e868ce 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -229,6 +229,19 @@ notrace void arch_local_irq_restore(unsigned long en)
229 */ 229 */
230 if (unlikely(irq_happened != PACA_IRQ_HARD_DIS)) 230 if (unlikely(irq_happened != PACA_IRQ_HARD_DIS))
231 __hard_irq_disable(); 231 __hard_irq_disable();
232#ifdef CONFIG_TRACE_IRQFLAG
233 else {
234 /*
235 * We should already be hard disabled here. We had bugs
236 * where that wasn't the case so let's dbl check it and
237 * warn if we are wrong. Only do that when IRQ tracing
238 * is enabled as mfmsr() can be costly.
239 */
240 if (WARN_ON(mfmsr() & MSR_EE))
241 __hard_irq_disable();
242 }
243#endif /* CONFIG_TRACE_IRQFLAG */
244
232 set_soft_enabled(0); 245 set_soft_enabled(0);
233 246
234 /* 247 /*
@@ -260,11 +273,17 @@ EXPORT_SYMBOL(arch_local_irq_restore);
260 * if they are currently disabled. This is typically called before 273 * if they are currently disabled. This is typically called before
261 * schedule() or do_signal() when returning to userspace. We do it 274 * schedule() or do_signal() when returning to userspace. We do it
262 * in C to avoid the burden of dealing with lockdep etc... 275 * in C to avoid the burden of dealing with lockdep etc...
276 *
277 * NOTE: This is called with interrupts hard disabled but not marked
278 * as such in paca->irq_happened, so we need to resync this.
263 */ 279 */
264void restore_interrupts(void) 280void restore_interrupts(void)
265{ 281{
266 if (irqs_disabled()) 282 if (irqs_disabled()) {
283 local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
267 local_irq_enable(); 284 local_irq_enable();
285 } else
286 __hard_irq_enable();
268} 287}
269 288
270#endif /* CONFIG_PPC64 */ 289#endif /* CONFIG_PPC64 */
@@ -330,14 +349,10 @@ void migrate_irqs(void)
330 349
331 alloc_cpumask_var(&mask, GFP_KERNEL); 350 alloc_cpumask_var(&mask, GFP_KERNEL);
332 351
333 for_each_irq(irq) { 352 for_each_irq_desc(irq, desc) {
334 struct irq_data *data; 353 struct irq_data *data;
335 struct irq_chip *chip; 354 struct irq_chip *chip;
336 355
337 desc = irq_to_desc(irq);
338 if (!desc)
339 continue;
340
341 data = irq_desc_get_irq_data(desc); 356 data = irq_desc_get_irq_data(desc);
342 if (irqd_is_per_cpu(data)) 357 if (irqd_is_per_cpu(data))
343 continue; 358 continue;
@@ -560,12 +575,6 @@ void do_softirq(void)
560 local_irq_restore(flags); 575 local_irq_restore(flags);
561} 576}
562 577
563irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
564{
565 return d->hwirq;
566}
567EXPORT_SYMBOL_GPL(irqd_to_hwirq);
568
569irq_hw_number_t virq_to_hw(unsigned int virq) 578irq_hw_number_t virq_to_hw(unsigned int virq)
570{ 579{
571 struct irq_data *irq_data = irq_get_irq_data(virq); 580 struct irq_data *irq_data = irq_get_irq_data(virq);
diff --git a/arch/powerpc/kernel/machine_kexec.c b/arch/powerpc/kernel/machine_kexec.c
index c957b1202bdc..5df777794403 100644
--- a/arch/powerpc/kernel/machine_kexec.c
+++ b/arch/powerpc/kernel/machine_kexec.c
@@ -23,14 +23,11 @@
23 23
24void machine_kexec_mask_interrupts(void) { 24void machine_kexec_mask_interrupts(void) {
25 unsigned int i; 25 unsigned int i;
26 struct irq_desc *desc;
26 27
27 for_each_irq(i) { 28 for_each_irq_desc(i, desc) {
28 struct irq_desc *desc = irq_to_desc(i);
29 struct irq_chip *chip; 29 struct irq_chip *chip;
30 30
31 if (!desc)
32 continue;
33
34 chip = irq_desc_get_chip(desc); 31 chip = irq_desc_get_chip(desc);
35 if (!chip) 32 if (!chip)
36 continue; 33 continue;
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index f88698c0f332..4937c9690090 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -1235,7 +1235,7 @@ void __ppc64_runlatch_on(void)
1235 ctrl |= CTRL_RUNLATCH; 1235 ctrl |= CTRL_RUNLATCH;
1236 mtspr(SPRN_CTRLT, ctrl); 1236 mtspr(SPRN_CTRLT, ctrl);
1237 1237
1238 ti->local_flags |= TLF_RUNLATCH; 1238 ti->local_flags |= _TLF_RUNLATCH;
1239} 1239}
1240 1240
1241/* Called with hard IRQs off */ 1241/* Called with hard IRQs off */
@@ -1244,7 +1244,7 @@ void __ppc64_runlatch_off(void)
1244 struct thread_info *ti = current_thread_info(); 1244 struct thread_info *ti = current_thread_info();
1245 unsigned long ctrl; 1245 unsigned long ctrl;
1246 1246
1247 ti->local_flags &= ~TLF_RUNLATCH; 1247 ti->local_flags &= ~_TLF_RUNLATCH;
1248 1248
1249 ctrl = mfspr(SPRN_CTRLF); 1249 ctrl = mfspr(SPRN_CTRLF);
1250 ctrl &= ~CTRL_RUNLATCH; 1250 ctrl &= ~CTRL_RUNLATCH;
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index 9825f29d1faf..ec8a53fa9e8f 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -150,6 +150,9 @@ notrace void __init machine_init(u64 dt_ptr)
150} 150}
151 151
152#ifdef CONFIG_BOOKE_WDT 152#ifdef CONFIG_BOOKE_WDT
153extern u32 booke_wdt_enabled;
154extern u32 booke_wdt_period;
155
153/* Checks wdt=x and wdt_period=xx command-line option */ 156/* Checks wdt=x and wdt_period=xx command-line option */
154notrace int __init early_parse_wdt(char *p) 157notrace int __init early_parse_wdt(char *p)
155{ 158{
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 6aa0c663e247..158972341a2d 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -248,7 +248,7 @@ void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
248 addr, regs->nip, regs->link, code); 248 addr, regs->nip, regs->link, code);
249 } 249 }
250 250
251 if (!arch_irq_disabled_regs(regs)) 251 if (arch_irqs_disabled() && !arch_irq_disabled_regs(regs))
252 local_irq_enable(); 252 local_irq_enable();
253 253
254 memset(&info, 0, sizeof(info)); 254 memset(&info, 0, sizeof(info));
@@ -1019,7 +1019,9 @@ void __kprobes program_check_exception(struct pt_regs *regs)
1019 return; 1019 return;
1020 } 1020 }
1021 1021
1022 local_irq_enable(); 1022 /* We restore the interrupt state now */
1023 if (!arch_irq_disabled_regs(regs))
1024 local_irq_enable();
1023 1025
1024#ifdef CONFIG_MATH_EMULATION 1026#ifdef CONFIG_MATH_EMULATION
1025 /* (reason & REASON_ILLEGAL) would be the obvious thing here, 1027 /* (reason & REASON_ILLEGAL) would be the obvious thing here,
@@ -1069,6 +1071,10 @@ void alignment_exception(struct pt_regs *regs)
1069{ 1071{
1070 int sig, code, fixed = 0; 1072 int sig, code, fixed = 0;
1071 1073
1074 /* We restore the interrupt state now */
1075 if (!arch_irq_disabled_regs(regs))
1076 local_irq_enable();
1077
1072 /* we don't implement logging of alignment exceptions */ 1078 /* we don't implement logging of alignment exceptions */
1073 if (!(current->thread.align_ctl & PR_UNALIGN_SIGBUS)) 1079 if (!(current->thread.align_ctl & PR_UNALIGN_SIGBUS))
1074 fixed = fix_alignment(regs); 1080 fixed = fix_alignment(regs);
diff --git a/arch/powerpc/kvm/book3s_64_mmu_host.c b/arch/powerpc/kvm/book3s_64_mmu_host.c
index 6f87f39a1ac2..10fc8ec9d2a8 100644
--- a/arch/powerpc/kvm/book3s_64_mmu_host.c
+++ b/arch/powerpc/kvm/book3s_64_mmu_host.c
@@ -194,14 +194,14 @@ static struct kvmppc_sid_map *create_sid_map(struct kvm_vcpu *vcpu, u64 gvsid)
194 backwards_map = !backwards_map; 194 backwards_map = !backwards_map;
195 195
196 /* Uh-oh ... out of mappings. Let's flush! */ 196 /* Uh-oh ... out of mappings. Let's flush! */
197 if (vcpu_book3s->vsid_next == vcpu_book3s->vsid_max) { 197 if (vcpu_book3s->proto_vsid_next == vcpu_book3s->proto_vsid_max) {
198 vcpu_book3s->vsid_next = vcpu_book3s->vsid_first; 198 vcpu_book3s->proto_vsid_next = vcpu_book3s->proto_vsid_first;
199 memset(vcpu_book3s->sid_map, 0, 199 memset(vcpu_book3s->sid_map, 0,
200 sizeof(struct kvmppc_sid_map) * SID_MAP_NUM); 200 sizeof(struct kvmppc_sid_map) * SID_MAP_NUM);
201 kvmppc_mmu_pte_flush(vcpu, 0, 0); 201 kvmppc_mmu_pte_flush(vcpu, 0, 0);
202 kvmppc_mmu_flush_segments(vcpu); 202 kvmppc_mmu_flush_segments(vcpu);
203 } 203 }
204 map->host_vsid = vcpu_book3s->vsid_next++; 204 map->host_vsid = vsid_scramble(vcpu_book3s->proto_vsid_next++, 256M);
205 205
206 map->guest_vsid = gvsid; 206 map->guest_vsid = gvsid;
207 map->valid = true; 207 map->valid = true;
@@ -319,9 +319,10 @@ int kvmppc_mmu_init(struct kvm_vcpu *vcpu)
319 return -1; 319 return -1;
320 vcpu3s->context_id[0] = err; 320 vcpu3s->context_id[0] = err;
321 321
322 vcpu3s->vsid_max = ((vcpu3s->context_id[0] + 1) << USER_ESID_BITS) - 1; 322 vcpu3s->proto_vsid_max = ((vcpu3s->context_id[0] + 1)
323 vcpu3s->vsid_first = vcpu3s->context_id[0] << USER_ESID_BITS; 323 << USER_ESID_BITS) - 1;
324 vcpu3s->vsid_next = vcpu3s->vsid_first; 324 vcpu3s->proto_vsid_first = vcpu3s->context_id[0] << USER_ESID_BITS;
325 vcpu3s->proto_vsid_next = vcpu3s->proto_vsid_first;
325 326
326 kvmppc_mmu_hpte_init(vcpu); 327 kvmppc_mmu_hpte_init(vcpu);
327 328
diff --git a/arch/powerpc/kvm/book3s_64_mmu_hv.c b/arch/powerpc/kvm/book3s_64_mmu_hv.c
index ddc485a529f2..c3beaeef3f60 100644
--- a/arch/powerpc/kvm/book3s_64_mmu_hv.c
+++ b/arch/powerpc/kvm/book3s_64_mmu_hv.c
@@ -258,6 +258,8 @@ static long kvmppc_get_guest_page(struct kvm *kvm, unsigned long gfn,
258 !(memslot->userspace_addr & (s - 1))) { 258 !(memslot->userspace_addr & (s - 1))) {
259 start &= ~(s - 1); 259 start &= ~(s - 1);
260 pgsize = s; 260 pgsize = s;
261 get_page(hpage);
262 put_page(page);
261 page = hpage; 263 page = hpage;
262 } 264 }
263 } 265 }
@@ -281,11 +283,8 @@ static long kvmppc_get_guest_page(struct kvm *kvm, unsigned long gfn,
281 err = 0; 283 err = 0;
282 284
283 out: 285 out:
284 if (got) { 286 if (got)
285 if (PageHuge(page))
286 page = compound_head(page);
287 put_page(page); 287 put_page(page);
288 }
289 return err; 288 return err;
290 289
291 up_err: 290 up_err:
@@ -678,8 +677,15 @@ int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct kvm_vcpu *vcpu,
678 SetPageDirty(page); 677 SetPageDirty(page);
679 678
680 out_put: 679 out_put:
681 if (page) 680 if (page) {
682 put_page(page); 681 /*
682 * We drop pages[0] here, not page because page might
683 * have been set to the head page of a compound, but
684 * we have to drop the reference on the correct tail
685 * page to match the get inside gup()
686 */
687 put_page(pages[0]);
688 }
683 return ret; 689 return ret;
684 690
685 out_unlock: 691 out_unlock:
@@ -979,6 +985,7 @@ void *kvmppc_pin_guest_page(struct kvm *kvm, unsigned long gpa,
979 pa = *physp; 985 pa = *physp;
980 } 986 }
981 page = pfn_to_page(pa >> PAGE_SHIFT); 987 page = pfn_to_page(pa >> PAGE_SHIFT);
988 get_page(page);
982 } else { 989 } else {
983 hva = gfn_to_hva_memslot(memslot, gfn); 990 hva = gfn_to_hva_memslot(memslot, gfn);
984 npages = get_user_pages_fast(hva, 1, 1, pages); 991 npages = get_user_pages_fast(hva, 1, 1, pages);
@@ -991,8 +998,6 @@ void *kvmppc_pin_guest_page(struct kvm *kvm, unsigned long gpa,
991 page = compound_head(page); 998 page = compound_head(page);
992 psize <<= compound_order(page); 999 psize <<= compound_order(page);
993 } 1000 }
994 if (!kvm->arch.using_mmu_notifiers)
995 get_page(page);
996 offset = gpa & (psize - 1); 1001 offset = gpa & (psize - 1);
997 if (nb_ret) 1002 if (nb_ret)
998 *nb_ret = psize - offset; 1003 *nb_ret = psize - offset;
@@ -1003,7 +1008,6 @@ void kvmppc_unpin_guest_page(struct kvm *kvm, void *va)
1003{ 1008{
1004 struct page *page = virt_to_page(va); 1009 struct page *page = virt_to_page(va);
1005 1010
1006 page = compound_head(page);
1007 put_page(page); 1011 put_page(page);
1008} 1012}
1009 1013
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 01294a5099dd..108d1f580177 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -1192,8 +1192,6 @@ static void unpin_slot(struct kvm *kvm, int slot_id)
1192 continue; 1192 continue;
1193 pfn = physp[j] >> PAGE_SHIFT; 1193 pfn = physp[j] >> PAGE_SHIFT;
1194 page = pfn_to_page(pfn); 1194 page = pfn_to_page(pfn);
1195 if (PageHuge(page))
1196 page = compound_head(page);
1197 SetPageDirty(page); 1195 SetPageDirty(page);
1198 put_page(page); 1196 put_page(page);
1199 } 1197 }
diff --git a/arch/powerpc/kvm/book3s_hv_rm_mmu.c b/arch/powerpc/kvm/book3s_hv_rm_mmu.c
index def880aea63a..cec4daddbf31 100644
--- a/arch/powerpc/kvm/book3s_hv_rm_mmu.c
+++ b/arch/powerpc/kvm/book3s_hv_rm_mmu.c
@@ -463,6 +463,7 @@ long kvmppc_h_bulk_remove(struct kvm_vcpu *vcpu)
463 /* insert R and C bits from PTE */ 463 /* insert R and C bits from PTE */
464 rcbits = rev->guest_rpte & (HPTE_R_R|HPTE_R_C); 464 rcbits = rev->guest_rpte & (HPTE_R_R|HPTE_R_C);
465 args[j] |= rcbits << (56 - 5); 465 args[j] |= rcbits << (56 - 5);
466 hp[0] = 0;
466 continue; 467 continue;
467 } 468 }
468 469
diff --git a/arch/powerpc/kvm/book3s_segment.S b/arch/powerpc/kvm/book3s_segment.S
index 0676ae249b9f..6e6e9cef34a8 100644
--- a/arch/powerpc/kvm/book3s_segment.S
+++ b/arch/powerpc/kvm/book3s_segment.S
@@ -197,7 +197,8 @@ kvmppc_interrupt:
197 /* Save guest PC and MSR */ 197 /* Save guest PC and MSR */
198#ifdef CONFIG_PPC64 198#ifdef CONFIG_PPC64
199BEGIN_FTR_SECTION 199BEGIN_FTR_SECTION
200 andi. r0,r12,0x2 200 andi. r0, r12, 0x2
201 cmpwi cr1, r0, 0
201 beq 1f 202 beq 1f
202 mfspr r3,SPRN_HSRR0 203 mfspr r3,SPRN_HSRR0
203 mfspr r4,SPRN_HSRR1 204 mfspr r4,SPRN_HSRR1
@@ -250,6 +251,12 @@ END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
250 beq ld_last_prev_inst 251 beq ld_last_prev_inst
251 cmpwi r12, BOOK3S_INTERRUPT_ALIGNMENT 252 cmpwi r12, BOOK3S_INTERRUPT_ALIGNMENT
252 beq- ld_last_inst 253 beq- ld_last_inst
254#ifdef CONFIG_PPC64
255BEGIN_FTR_SECTION
256 cmpwi r12, BOOK3S_INTERRUPT_H_EMUL_ASSIST
257 beq- ld_last_inst
258END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
259#endif
253 260
254 b no_ld_last_inst 261 b no_ld_last_inst
255 262
@@ -316,23 +323,17 @@ no_dcbz32_off:
316 * Having set up SRR0/1 with the address where we want 323 * Having set up SRR0/1 with the address where we want
317 * to continue with relocation on (potentially in module 324 * to continue with relocation on (potentially in module
318 * space), we either just go straight there with rfi[d], 325 * space), we either just go straight there with rfi[d],
319 * or we jump to an interrupt handler with bctr if there 326 * or we jump to an interrupt handler if there is an
320 * is an interrupt to be handled first. In the latter 327 * interrupt to be handled first. In the latter case,
321 * case, the rfi[d] at the end of the interrupt handler 328 * the rfi[d] at the end of the interrupt handler will
322 * will get us back to where we want to continue. 329 * get us back to where we want to continue.
323 */ 330 */
324 331
325 cmpwi r12, BOOK3S_INTERRUPT_EXTERNAL
326 beq 1f
327 cmpwi r12, BOOK3S_INTERRUPT_DECREMENTER
328 beq 1f
329 cmpwi r12, BOOK3S_INTERRUPT_PERFMON
3301: mtctr r12
331
332 /* Register usage at this point: 332 /* Register usage at this point:
333 * 333 *
334 * R1 = host R1 334 * R1 = host R1
335 * R2 = host R2 335 * R2 = host R2
336 * R10 = raw exit handler id
336 * R12 = exit handler id 337 * R12 = exit handler id
337 * R13 = shadow vcpu (32-bit) or PACA (64-bit) 338 * R13 = shadow vcpu (32-bit) or PACA (64-bit)
338 * SVCPU.* = guest * 339 * SVCPU.* = guest *
@@ -342,12 +343,25 @@ no_dcbz32_off:
342 PPC_LL r6, HSTATE_HOST_MSR(r13) 343 PPC_LL r6, HSTATE_HOST_MSR(r13)
343 PPC_LL r8, HSTATE_VMHANDLER(r13) 344 PPC_LL r8, HSTATE_VMHANDLER(r13)
344 345
345 /* Restore host msr -> SRR1 */ 346#ifdef CONFIG_PPC64
347BEGIN_FTR_SECTION
348 beq cr1, 1f
349 mtspr SPRN_HSRR1, r6
350 mtspr SPRN_HSRR0, r8
351END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
352#endif
3531: /* Restore host msr -> SRR1 */
346 mtsrr1 r6 354 mtsrr1 r6
347 /* Load highmem handler address */ 355 /* Load highmem handler address */
348 mtsrr0 r8 356 mtsrr0 r8
349 357
350 /* RFI into the highmem handler, or jump to interrupt handler */ 358 /* RFI into the highmem handler, or jump to interrupt handler */
351 beqctr 359 cmpwi r12, BOOK3S_INTERRUPT_EXTERNAL
360 beqa BOOK3S_INTERRUPT_EXTERNAL
361 cmpwi r12, BOOK3S_INTERRUPT_DECREMENTER
362 beqa BOOK3S_INTERRUPT_DECREMENTER
363 cmpwi r12, BOOK3S_INTERRUPT_PERFMON
364 beqa BOOK3S_INTERRUPT_PERFMON
365
352 RFI 366 RFI
353kvmppc_handler_trampoline_exit_end: 367kvmppc_handler_trampoline_exit_end:
diff --git a/arch/powerpc/net/bpf_jit.h b/arch/powerpc/net/bpf_jit.h
index af1ab5e9a691..5c3cf2d04e41 100644
--- a/arch/powerpc/net/bpf_jit.h
+++ b/arch/powerpc/net/bpf_jit.h
@@ -48,7 +48,13 @@
48/* 48/*
49 * Assembly helpers from arch/powerpc/net/bpf_jit.S: 49 * Assembly helpers from arch/powerpc/net/bpf_jit.S:
50 */ 50 */
51extern u8 sk_load_word[], sk_load_half[], sk_load_byte[], sk_load_byte_msh[]; 51#define DECLARE_LOAD_FUNC(func) \
52 extern u8 func[], func##_negative_offset[], func##_positive_offset[]
53
54DECLARE_LOAD_FUNC(sk_load_word);
55DECLARE_LOAD_FUNC(sk_load_half);
56DECLARE_LOAD_FUNC(sk_load_byte);
57DECLARE_LOAD_FUNC(sk_load_byte_msh);
52 58
53#define FUNCTION_DESCR_SIZE 24 59#define FUNCTION_DESCR_SIZE 24
54 60
diff --git a/arch/powerpc/net/bpf_jit_64.S b/arch/powerpc/net/bpf_jit_64.S
index ff4506e85cce..55ba3855a97f 100644
--- a/arch/powerpc/net/bpf_jit_64.S
+++ b/arch/powerpc/net/bpf_jit_64.S
@@ -31,14 +31,13 @@
31 * then branch directly to slow_path_XXX if required. (In fact, could 31 * then branch directly to slow_path_XXX if required. (In fact, could
32 * load a spare GPR with the address of slow_path_generic and pass size 32 * load a spare GPR with the address of slow_path_generic and pass size
33 * as an argument, making the call site a mtlr, li and bllr.) 33 * as an argument, making the call site a mtlr, li and bllr.)
34 *
35 * Technically, the "is addr < 0" check is unnecessary & slowing down
36 * the ABS path, as it's statically checked on generation.
37 */ 34 */
38 .globl sk_load_word 35 .globl sk_load_word
39sk_load_word: 36sk_load_word:
40 cmpdi r_addr, 0 37 cmpdi r_addr, 0
41 blt bpf_error 38 blt bpf_slow_path_word_neg
39 .globl sk_load_word_positive_offset
40sk_load_word_positive_offset:
42 /* Are we accessing past headlen? */ 41 /* Are we accessing past headlen? */
43 subi r_scratch1, r_HL, 4 42 subi r_scratch1, r_HL, 4
44 cmpd r_scratch1, r_addr 43 cmpd r_scratch1, r_addr
@@ -51,7 +50,9 @@ sk_load_word:
51 .globl sk_load_half 50 .globl sk_load_half
52sk_load_half: 51sk_load_half:
53 cmpdi r_addr, 0 52 cmpdi r_addr, 0
54 blt bpf_error 53 blt bpf_slow_path_half_neg
54 .globl sk_load_half_positive_offset
55sk_load_half_positive_offset:
55 subi r_scratch1, r_HL, 2 56 subi r_scratch1, r_HL, 2
56 cmpd r_scratch1, r_addr 57 cmpd r_scratch1, r_addr
57 blt bpf_slow_path_half 58 blt bpf_slow_path_half
@@ -61,7 +62,9 @@ sk_load_half:
61 .globl sk_load_byte 62 .globl sk_load_byte
62sk_load_byte: 63sk_load_byte:
63 cmpdi r_addr, 0 64 cmpdi r_addr, 0
64 blt bpf_error 65 blt bpf_slow_path_byte_neg
66 .globl sk_load_byte_positive_offset
67sk_load_byte_positive_offset:
65 cmpd r_HL, r_addr 68 cmpd r_HL, r_addr
66 ble bpf_slow_path_byte 69 ble bpf_slow_path_byte
67 lbzx r_A, r_D, r_addr 70 lbzx r_A, r_D, r_addr
@@ -69,22 +72,20 @@ sk_load_byte:
69 72
70/* 73/*
71 * BPF_S_LDX_B_MSH: ldxb 4*([offset]&0xf) 74 * BPF_S_LDX_B_MSH: ldxb 4*([offset]&0xf)
72 * r_addr is the offset value, already known positive 75 * r_addr is the offset value
73 */ 76 */
74 .globl sk_load_byte_msh 77 .globl sk_load_byte_msh
75sk_load_byte_msh: 78sk_load_byte_msh:
79 cmpdi r_addr, 0
80 blt bpf_slow_path_byte_msh_neg
81 .globl sk_load_byte_msh_positive_offset
82sk_load_byte_msh_positive_offset:
76 cmpd r_HL, r_addr 83 cmpd r_HL, r_addr
77 ble bpf_slow_path_byte_msh 84 ble bpf_slow_path_byte_msh
78 lbzx r_X, r_D, r_addr 85 lbzx r_X, r_D, r_addr
79 rlwinm r_X, r_X, 2, 32-4-2, 31-2 86 rlwinm r_X, r_X, 2, 32-4-2, 31-2
80 blr 87 blr
81 88
82bpf_error:
83 /* Entered with cr0 = lt */
84 li r3, 0
85 /* Generated code will 'blt epilogue', returning 0. */
86 blr
87
88/* Call out to skb_copy_bits: 89/* Call out to skb_copy_bits:
89 * We'll need to back up our volatile regs first; we have 90 * We'll need to back up our volatile regs first; we have
90 * local variable space at r1+(BPF_PPC_STACK_BASIC). 91 * local variable space at r1+(BPF_PPC_STACK_BASIC).
@@ -136,3 +137,84 @@ bpf_slow_path_byte_msh:
136 lbz r_X, BPF_PPC_STACK_BASIC+(2*8)(r1) 137 lbz r_X, BPF_PPC_STACK_BASIC+(2*8)(r1)
137 rlwinm r_X, r_X, 2, 32-4-2, 31-2 138 rlwinm r_X, r_X, 2, 32-4-2, 31-2
138 blr 139 blr
140
141/* Call out to bpf_internal_load_pointer_neg_helper:
142 * We'll need to back up our volatile regs first; we have
143 * local variable space at r1+(BPF_PPC_STACK_BASIC).
144 * Allocate a new stack frame here to remain ABI-compliant in
145 * stashing LR.
146 */
147#define sk_negative_common(SIZE) \
148 mflr r0; \
149 std r0, 16(r1); \
150 /* R3 goes in parameter space of caller's frame */ \
151 std r_skb, (BPF_PPC_STACKFRAME+48)(r1); \
152 std r_A, (BPF_PPC_STACK_BASIC+(0*8))(r1); \
153 std r_X, (BPF_PPC_STACK_BASIC+(1*8))(r1); \
154 stdu r1, -BPF_PPC_SLOWPATH_FRAME(r1); \
155 /* R3 = r_skb, as passed */ \
156 mr r4, r_addr; \
157 li r5, SIZE; \
158 bl bpf_internal_load_pointer_neg_helper; \
159 /* R3 != 0 on success */ \
160 addi r1, r1, BPF_PPC_SLOWPATH_FRAME; \
161 ld r0, 16(r1); \
162 ld r_A, (BPF_PPC_STACK_BASIC+(0*8))(r1); \
163 ld r_X, (BPF_PPC_STACK_BASIC+(1*8))(r1); \
164 mtlr r0; \
165 cmpldi r3, 0; \
166 beq bpf_error_slow; /* cr0 = EQ */ \
167 mr r_addr, r3; \
168 ld r_skb, (BPF_PPC_STACKFRAME+48)(r1); \
169 /* Great success! */
170
171bpf_slow_path_word_neg:
172 lis r_scratch1,-32 /* SKF_LL_OFF */
173 cmpd r_addr, r_scratch1 /* addr < SKF_* */
174 blt bpf_error /* cr0 = LT */
175 .globl sk_load_word_negative_offset
176sk_load_word_negative_offset:
177 sk_negative_common(4)
178 lwz r_A, 0(r_addr)
179 blr
180
181bpf_slow_path_half_neg:
182 lis r_scratch1,-32 /* SKF_LL_OFF */
183 cmpd r_addr, r_scratch1 /* addr < SKF_* */
184 blt bpf_error /* cr0 = LT */
185 .globl sk_load_half_negative_offset
186sk_load_half_negative_offset:
187 sk_negative_common(2)
188 lhz r_A, 0(r_addr)
189 blr
190
191bpf_slow_path_byte_neg:
192 lis r_scratch1,-32 /* SKF_LL_OFF */
193 cmpd r_addr, r_scratch1 /* addr < SKF_* */
194 blt bpf_error /* cr0 = LT */
195 .globl sk_load_byte_negative_offset
196sk_load_byte_negative_offset:
197 sk_negative_common(1)
198 lbz r_A, 0(r_addr)
199 blr
200
201bpf_slow_path_byte_msh_neg:
202 lis r_scratch1,-32 /* SKF_LL_OFF */
203 cmpd r_addr, r_scratch1 /* addr < SKF_* */
204 blt bpf_error /* cr0 = LT */
205 .globl sk_load_byte_msh_negative_offset
206sk_load_byte_msh_negative_offset:
207 sk_negative_common(1)
208 lbz r_X, 0(r_addr)
209 rlwinm r_X, r_X, 2, 32-4-2, 31-2
210 blr
211
212bpf_error_slow:
213 /* fabricate a cr0 = lt */
214 li r_scratch1, -1
215 cmpdi r_scratch1, 0
216bpf_error:
217 /* Entered with cr0 = lt */
218 li r3, 0
219 /* Generated code will 'blt epilogue', returning 0. */
220 blr
diff --git a/arch/powerpc/net/bpf_jit_comp.c b/arch/powerpc/net/bpf_jit_comp.c
index 73619d3aeb6c..2dc8b1484845 100644
--- a/arch/powerpc/net/bpf_jit_comp.c
+++ b/arch/powerpc/net/bpf_jit_comp.c
@@ -127,6 +127,9 @@ static void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx)
127 PPC_BLR(); 127 PPC_BLR();
128} 128}
129 129
130#define CHOOSE_LOAD_FUNC(K, func) \
131 ((int)K < 0 ? ((int)K >= SKF_LL_OFF ? func##_negative_offset : func) : func##_positive_offset)
132
130/* Assemble the body code between the prologue & epilogue. */ 133/* Assemble the body code between the prologue & epilogue. */
131static int bpf_jit_build_body(struct sk_filter *fp, u32 *image, 134static int bpf_jit_build_body(struct sk_filter *fp, u32 *image,
132 struct codegen_context *ctx, 135 struct codegen_context *ctx,
@@ -391,21 +394,16 @@ static int bpf_jit_build_body(struct sk_filter *fp, u32 *image,
391 394
392 /*** Absolute loads from packet header/data ***/ 395 /*** Absolute loads from packet header/data ***/
393 case BPF_S_LD_W_ABS: 396 case BPF_S_LD_W_ABS:
394 func = sk_load_word; 397 func = CHOOSE_LOAD_FUNC(K, sk_load_word);
395 goto common_load; 398 goto common_load;
396 case BPF_S_LD_H_ABS: 399 case BPF_S_LD_H_ABS:
397 func = sk_load_half; 400 func = CHOOSE_LOAD_FUNC(K, sk_load_half);
398 goto common_load; 401 goto common_load;
399 case BPF_S_LD_B_ABS: 402 case BPF_S_LD_B_ABS:
400 func = sk_load_byte; 403 func = CHOOSE_LOAD_FUNC(K, sk_load_byte);
401 common_load: 404 common_load:
402 /* 405 /* Load from [K]. */
403 * Load from [K]. Reference with the (negative)
404 * SKF_NET_OFF/SKF_LL_OFF offsets is unsupported.
405 */
406 ctx->seen |= SEEN_DATAREF; 406 ctx->seen |= SEEN_DATAREF;
407 if ((int)K < 0)
408 return -ENOTSUPP;
409 PPC_LI64(r_scratch1, func); 407 PPC_LI64(r_scratch1, func);
410 PPC_MTLR(r_scratch1); 408 PPC_MTLR(r_scratch1);
411 PPC_LI32(r_addr, K); 409 PPC_LI32(r_addr, K);
@@ -429,7 +427,7 @@ static int bpf_jit_build_body(struct sk_filter *fp, u32 *image,
429 common_load_ind: 427 common_load_ind:
430 /* 428 /*
431 * Load from [X + K]. Negative offsets are tested for 429 * Load from [X + K]. Negative offsets are tested for
432 * in the helper functions, and result in a 'ret 0'. 430 * in the helper functions.
433 */ 431 */
434 ctx->seen |= SEEN_DATAREF | SEEN_XREG; 432 ctx->seen |= SEEN_DATAREF | SEEN_XREG;
435 PPC_LI64(r_scratch1, func); 433 PPC_LI64(r_scratch1, func);
@@ -443,13 +441,7 @@ static int bpf_jit_build_body(struct sk_filter *fp, u32 *image,
443 break; 441 break;
444 442
445 case BPF_S_LDX_B_MSH: 443 case BPF_S_LDX_B_MSH:
446 /* 444 func = CHOOSE_LOAD_FUNC(K, sk_load_byte_msh);
447 * x86 version drops packet (RET 0) when K<0, whereas
448 * interpreter does allow K<0 (__load_pointer, special
449 * ancillary data). common_load returns ENOTSUPP if K<0,
450 * so we fall back to interpreter & filter works.
451 */
452 func = sk_load_byte_msh;
453 goto common_load; 445 goto common_load;
454 break; 446 break;
455 447
diff --git a/arch/powerpc/platforms/85xx/common.c b/arch/powerpc/platforms/85xx/common.c
index 9fef5302adc1..67dac22b4363 100644
--- a/arch/powerpc/platforms/85xx/common.c
+++ b/arch/powerpc/platforms/85xx/common.c
@@ -21,6 +21,12 @@ static struct of_device_id __initdata mpc85xx_common_ids[] = {
21 { .compatible = "fsl,qe", }, 21 { .compatible = "fsl,qe", },
22 { .compatible = "fsl,cpm2", }, 22 { .compatible = "fsl,cpm2", },
23 { .compatible = "fsl,srio", }, 23 { .compatible = "fsl,srio", },
24 /* So that the DMA channel nodes can be probed individually: */
25 { .compatible = "fsl,eloplus-dma", },
26 /* For the PMC driver */
27 { .compatible = "fsl,mpc8548-guts", },
28 /* Probably unnecessary? */
29 { .compatible = "gpio-leds", },
24 {}, 30 {},
25}; 31};
26 32
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 9a6f04406e0d..d208ebccb91c 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -399,12 +399,6 @@ static int __init board_fixups(void)
399machine_arch_initcall(mpc8568_mds, board_fixups); 399machine_arch_initcall(mpc8568_mds, board_fixups);
400machine_arch_initcall(mpc8569_mds, board_fixups); 400machine_arch_initcall(mpc8569_mds, board_fixups);
401 401
402static struct of_device_id mpc85xx_ids[] = {
403 { .compatible = "fsl,mpc8548-guts", },
404 { .compatible = "gpio-leds", },
405 {},
406};
407
408static int __init mpc85xx_publish_devices(void) 402static int __init mpc85xx_publish_devices(void)
409{ 403{
410 if (machine_is(mpc8568_mds)) 404 if (machine_is(mpc8568_mds))
@@ -412,10 +406,7 @@ static int __init mpc85xx_publish_devices(void)
412 if (machine_is(mpc8569_mds)) 406 if (machine_is(mpc8569_mds))
413 simple_gpiochip_init("fsl,mpc8569mds-bcsr-gpio"); 407 simple_gpiochip_init("fsl,mpc8569mds-bcsr-gpio");
414 408
415 mpc85xx_common_publish_devices(); 409 return mpc85xx_common_publish_devices();
416 of_platform_bus_probe(NULL, mpc85xx_ids, NULL);
417
418 return 0;
419} 410}
420 411
421machine_device_initcall(mpc8568_mds, mpc85xx_publish_devices); 412machine_device_initcall(mpc8568_mds, mpc85xx_publish_devices);
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c b/arch/powerpc/platforms/85xx/p1022_ds.c
index e74b7cde9aee..f700c81a1321 100644
--- a/arch/powerpc/platforms/85xx/p1022_ds.c
+++ b/arch/powerpc/platforms/85xx/p1022_ds.c
@@ -460,18 +460,7 @@ static void __init p1022_ds_setup_arch(void)
460 pr_info("Freescale P1022 DS reference board\n"); 460 pr_info("Freescale P1022 DS reference board\n");
461} 461}
462 462
463static struct of_device_id __initdata p1022_ds_ids[] = { 463machine_device_initcall(p1022_ds, mpc85xx_common_publish_devices);
464 /* So that the DMA channel nodes can be probed individually: */
465 { .compatible = "fsl,eloplus-dma", },
466 {},
467};
468
469static int __init p1022_ds_publish_devices(void)
470{
471 mpc85xx_common_publish_devices();
472 return of_platform_bus_probe(NULL, p1022_ds_ids, NULL);
473}
474machine_device_initcall(p1022_ds, p1022_ds_publish_devices);
475 464
476machine_arch_initcall(p1022_ds, swiotlb_setup_bus_notifier); 465machine_arch_initcall(p1022_ds, swiotlb_setup_bus_notifier);
477 466
diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c
index db360fc4cf0e..85825b5401e5 100644
--- a/arch/powerpc/platforms/cell/axon_msi.c
+++ b/arch/powerpc/platforms/cell/axon_msi.c
@@ -114,7 +114,7 @@ static void axon_msi_cascade(unsigned int irq, struct irq_desc *desc)
114 pr_devel("axon_msi: woff %x roff %x msi %x\n", 114 pr_devel("axon_msi: woff %x roff %x msi %x\n",
115 write_offset, msic->read_offset, msi); 115 write_offset, msic->read_offset, msi);
116 116
117 if (msi < NR_IRQS && irq_get_chip_data(msi) == msic) { 117 if (msi < nr_irqs && irq_get_chip_data(msi) == msic) {
118 generic_handle_irq(msi); 118 generic_handle_irq(msi);
119 msic->fifo_virt[idx] = cpu_to_le32(0xffffffff); 119 msic->fifo_virt[idx] = cpu_to_le32(0xffffffff);
120 } else { 120 } else {
@@ -276,9 +276,6 @@ static int axon_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
276 if (rc) 276 if (rc)
277 return rc; 277 return rc;
278 278
279 /* We rely on being able to stash a virq in a u16 */
280 BUILD_BUG_ON(NR_IRQS > 65536);
281
282 list_for_each_entry(entry, &dev->msi_list, list) { 279 list_for_each_entry(entry, &dev->msi_list, list) {
283 virq = irq_create_direct_mapping(msic->irq_domain); 280 virq = irq_create_direct_mapping(msic->irq_domain);
284 if (virq == NO_IRQ) { 281 if (virq == NO_IRQ) {
@@ -392,7 +389,8 @@ static int axon_msi_probe(struct platform_device *device)
392 } 389 }
393 memset(msic->fifo_virt, 0xff, MSIC_FIFO_SIZE_BYTES); 390 memset(msic->fifo_virt, 0xff, MSIC_FIFO_SIZE_BYTES);
394 391
395 msic->irq_domain = irq_domain_add_nomap(dn, &msic_host_ops, msic); 392 /* We rely on being able to stash a virq in a u16, so limit irqs to < 65536 */
393 msic->irq_domain = irq_domain_add_nomap(dn, 65536, &msic_host_ops, msic);
396 if (!msic->irq_domain) { 394 if (!msic->irq_domain) {
397 printk(KERN_ERR "axon_msi: couldn't allocate irq_domain for %s\n", 395 printk(KERN_ERR "axon_msi: couldn't allocate irq_domain for %s\n",
398 dn->full_name); 396 dn->full_name);
diff --git a/arch/powerpc/platforms/cell/beat_interrupt.c b/arch/powerpc/platforms/cell/beat_interrupt.c
index e5c3a2c6090d..8c6dc42ecf65 100644
--- a/arch/powerpc/platforms/cell/beat_interrupt.c
+++ b/arch/powerpc/platforms/cell/beat_interrupt.c
@@ -239,7 +239,7 @@ void __init beatic_init_IRQ(void)
239 ppc_md.get_irq = beatic_get_irq; 239 ppc_md.get_irq = beatic_get_irq;
240 240
241 /* Allocate an irq host */ 241 /* Allocate an irq host */
242 beatic_host = irq_domain_add_nomap(NULL, &beatic_pic_host_ops, NULL); 242 beatic_host = irq_domain_add_nomap(NULL, 0, &beatic_pic_host_ops, NULL);
243 BUG_ON(beatic_host == NULL); 243 BUG_ON(beatic_host == NULL);
244 irq_set_default_host(beatic_host); 244 irq_set_default_host(beatic_host);
245} 245}
@@ -248,6 +248,6 @@ void beatic_deinit_IRQ(void)
248{ 248{
249 int i; 249 int i;
250 250
251 for (i = 1; i < NR_IRQS; i++) 251 for (i = 1; i < nr_irqs; i++)
252 beat_destruct_irq_plug(i); 252 beat_destruct_irq_plug(i);
253} 253}
diff --git a/arch/powerpc/platforms/powermac/low_i2c.c b/arch/powerpc/platforms/powermac/low_i2c.c
index 996c5ff7824b..03685a329d7d 100644
--- a/arch/powerpc/platforms/powermac/low_i2c.c
+++ b/arch/powerpc/platforms/powermac/low_i2c.c
@@ -366,11 +366,20 @@ static void kw_i2c_timeout(unsigned long data)
366 unsigned long flags; 366 unsigned long flags;
367 367
368 spin_lock_irqsave(&host->lock, flags); 368 spin_lock_irqsave(&host->lock, flags);
369
370 /*
371 * If the timer is pending, that means we raced with the
372 * irq, in which case we just return
373 */
374 if (timer_pending(&host->timeout_timer))
375 goto skip;
376
369 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr)); 377 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
370 if (host->state != state_idle) { 378 if (host->state != state_idle) {
371 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT; 379 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
372 add_timer(&host->timeout_timer); 380 add_timer(&host->timeout_timer);
373 } 381 }
382 skip:
374 spin_unlock_irqrestore(&host->lock, flags); 383 spin_unlock_irqrestore(&host->lock, flags);
375} 384}
376 385
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c
index 66ad93de1d55..c4e630576ff2 100644
--- a/arch/powerpc/platforms/powermac/pic.c
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -57,9 +57,9 @@ static int max_real_irqs;
57 57
58static DEFINE_RAW_SPINLOCK(pmac_pic_lock); 58static DEFINE_RAW_SPINLOCK(pmac_pic_lock);
59 59
60#define NR_MASK_WORDS ((NR_IRQS + 31) / 32) 60/* The max irq number this driver deals with is 128; see max_irqs */
61static unsigned long ppc_lost_interrupts[NR_MASK_WORDS]; 61static DECLARE_BITMAP(ppc_lost_interrupts, 128);
62static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; 62static DECLARE_BITMAP(ppc_cached_irq_mask, 128);
63static int pmac_irq_cascade = -1; 63static int pmac_irq_cascade = -1;
64static struct irq_domain *pmac_pic_host; 64static struct irq_domain *pmac_pic_host;
65 65
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c
index a81e5a88fbdf..b4ddaa3fbb29 100644
--- a/arch/powerpc/platforms/powermac/smp.c
+++ b/arch/powerpc/platforms/powermac/smp.c
@@ -192,7 +192,7 @@ static int psurge_secondary_ipi_init(void)
192{ 192{
193 int rc = -ENOMEM; 193 int rc = -ENOMEM;
194 194
195 psurge_host = irq_domain_add_nomap(NULL, &psurge_host_ops, NULL); 195 psurge_host = irq_domain_add_nomap(NULL, 0, &psurge_host_ops, NULL);
196 196
197 if (psurge_host) 197 if (psurge_host)
198 psurge_secondary_virq = irq_create_direct_mapping(psurge_host); 198 psurge_secondary_virq = irq_create_direct_mapping(psurge_host);
diff --git a/arch/powerpc/platforms/ps3/interrupt.c b/arch/powerpc/platforms/ps3/interrupt.c
index 2a4ff86cc21f..5f3b23220b8e 100644
--- a/arch/powerpc/platforms/ps3/interrupt.c
+++ b/arch/powerpc/platforms/ps3/interrupt.c
@@ -753,9 +753,8 @@ void __init ps3_init_IRQ(void)
753 unsigned cpu; 753 unsigned cpu;
754 struct irq_domain *host; 754 struct irq_domain *host;
755 755
756 host = irq_domain_add_nomap(NULL, &ps3_host_ops, NULL); 756 host = irq_domain_add_nomap(NULL, PS3_PLUG_MAX + 1, &ps3_host_ops, NULL);
757 irq_set_default_host(host); 757 irq_set_default_host(host);
758 irq_set_virq_count(PS3_PLUG_MAX + 1);
759 758
760 for_each_possible_cpu(cpu) { 759 for_each_possible_cpu(cpu) {
761 struct ps3_private *pd = &per_cpu(ps3_private, cpu); 760 struct ps3_private *pd = &per_cpu(ps3_private, cpu);
diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig
index aadbe4f6d537..178a5f300bc9 100644
--- a/arch/powerpc/platforms/pseries/Kconfig
+++ b/arch/powerpc/platforms/pseries/Kconfig
@@ -30,9 +30,9 @@ config PPC_SPLPAR
30 two or more partitions. 30 two or more partitions.
31 31
32config EEH 32config EEH
33 bool "PCI Extended Error Handling (EEH)" if EXPERT 33 bool
34 depends on PPC_PSERIES && PCI 34 depends on PPC_PSERIES && PCI
35 default y if !EXPERT 35 default y
36 36
37config PSERIES_MSI 37config PSERIES_MSI
38 bool 38 bool
diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c
index 309d38ef7322..a75e37dc41aa 100644
--- a/arch/powerpc/platforms/pseries/eeh.c
+++ b/arch/powerpc/platforms/pseries/eeh.c
@@ -1076,7 +1076,7 @@ static void eeh_add_device_late(struct pci_dev *dev)
1076 pr_debug("EEH: Adding device %s\n", pci_name(dev)); 1076 pr_debug("EEH: Adding device %s\n", pci_name(dev));
1077 1077
1078 dn = pci_device_to_OF_node(dev); 1078 dn = pci_device_to_OF_node(dev);
1079 edev = pci_dev_to_eeh_dev(dev); 1079 edev = of_node_to_eeh_dev(dn);
1080 if (edev->pdev == dev) { 1080 if (edev->pdev == dev) {
1081 pr_debug("EEH: Already referenced !\n"); 1081 pr_debug("EEH: Already referenced !\n");
1082 return; 1082 return;
diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c
index d3be961e2ae7..10386b676d87 100644
--- a/arch/powerpc/sysdev/cpm2_pic.c
+++ b/arch/powerpc/sysdev/cpm2_pic.c
@@ -51,8 +51,7 @@
51static intctl_cpm2_t __iomem *cpm2_intctl; 51static intctl_cpm2_t __iomem *cpm2_intctl;
52 52
53static struct irq_domain *cpm2_pic_host; 53static struct irq_domain *cpm2_pic_host;
54#define NR_MASK_WORDS ((NR_IRQS + 31) / 32) 54static unsigned long ppc_cached_irq_mask[2]; /* 2 32-bit registers */
55static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
56 55
57static const u_char irq_to_siureg[] = { 56static const u_char irq_to_siureg[] = {
58 1, 1, 1, 1, 1, 1, 1, 1, 57 1, 1, 1, 1, 1, 1, 1, 1,
diff --git a/arch/powerpc/sysdev/mpc8xx_pic.c b/arch/powerpc/sysdev/mpc8xx_pic.c
index d5f5416be310..b724622c3a0b 100644
--- a/arch/powerpc/sysdev/mpc8xx_pic.c
+++ b/arch/powerpc/sysdev/mpc8xx_pic.c
@@ -18,69 +18,45 @@
18extern int cpm_get_irq(struct pt_regs *regs); 18extern int cpm_get_irq(struct pt_regs *regs);
19 19
20static struct irq_domain *mpc8xx_pic_host; 20static struct irq_domain *mpc8xx_pic_host;
21#define NR_MASK_WORDS ((NR_IRQS + 31) / 32) 21static unsigned long mpc8xx_cached_irq_mask;
22static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
23static sysconf8xx_t __iomem *siu_reg; 22static sysconf8xx_t __iomem *siu_reg;
24 23
25int cpm_get_irq(struct pt_regs *regs); 24static inline unsigned long mpc8xx_irqd_to_bit(struct irq_data *d)
25{
26 return 0x80000000 >> irqd_to_hwirq(d);
27}
26 28
27static void mpc8xx_unmask_irq(struct irq_data *d) 29static void mpc8xx_unmask_irq(struct irq_data *d)
28{ 30{
29 int bit, word; 31 mpc8xx_cached_irq_mask |= mpc8xx_irqd_to_bit(d);
30 unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d); 32 out_be32(&siu_reg->sc_simask, mpc8xx_cached_irq_mask);
31
32 bit = irq_nr & 0x1f;
33 word = irq_nr >> 5;
34
35 ppc_cached_irq_mask[word] |= (1 << (31-bit));
36 out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]);
37} 33}
38 34
39static void mpc8xx_mask_irq(struct irq_data *d) 35static void mpc8xx_mask_irq(struct irq_data *d)
40{ 36{
41 int bit, word; 37 mpc8xx_cached_irq_mask &= ~mpc8xx_irqd_to_bit(d);
42 unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d); 38 out_be32(&siu_reg->sc_simask, mpc8xx_cached_irq_mask);
43
44 bit = irq_nr & 0x1f;
45 word = irq_nr >> 5;
46
47 ppc_cached_irq_mask[word] &= ~(1 << (31-bit));
48 out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]);
49} 39}
50 40
51static void mpc8xx_ack(struct irq_data *d) 41static void mpc8xx_ack(struct irq_data *d)
52{ 42{
53 int bit; 43 out_be32(&siu_reg->sc_sipend, mpc8xx_irqd_to_bit(d));
54 unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d);
55
56 bit = irq_nr & 0x1f;
57 out_be32(&siu_reg->sc_sipend, 1 << (31-bit));
58} 44}
59 45
60static void mpc8xx_end_irq(struct irq_data *d) 46static void mpc8xx_end_irq(struct irq_data *d)
61{ 47{
62 int bit, word; 48 mpc8xx_cached_irq_mask |= mpc8xx_irqd_to_bit(d);
63 unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d); 49 out_be32(&siu_reg->sc_simask, mpc8xx_cached_irq_mask);
64
65 bit = irq_nr & 0x1f;
66 word = irq_nr >> 5;
67
68 ppc_cached_irq_mask[word] |= (1 << (31-bit));
69 out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]);
70} 50}
71 51
72static int mpc8xx_set_irq_type(struct irq_data *d, unsigned int flow_type) 52static int mpc8xx_set_irq_type(struct irq_data *d, unsigned int flow_type)
73{ 53{
74 if (flow_type & IRQ_TYPE_EDGE_FALLING) { 54 /* only external IRQ senses are programmable */
75 irq_hw_number_t hw = (unsigned int)irqd_to_hwirq(d); 55 if ((flow_type & IRQ_TYPE_EDGE_FALLING) && !(irqd_to_hwirq(d) & 1)) {
76 unsigned int siel = in_be32(&siu_reg->sc_siel); 56 unsigned int siel = in_be32(&siu_reg->sc_siel);
77 57 siel |= mpc8xx_irqd_to_bit(d);
78 /* only external IRQ senses are programmable */ 58 out_be32(&siu_reg->sc_siel, siel);
79 if ((hw & 1) == 0) { 59 __irq_set_handler_locked(d->irq, handle_edge_irq);
80 siel |= (0x80000000 >> hw);
81 out_be32(&siu_reg->sc_siel, siel);
82 __irq_set_handler_locked(d->irq, handle_edge_irq);
83 }
84 } 60 }
85 return 0; 61 return 0;
86} 62}
@@ -132,6 +108,9 @@ static int mpc8xx_pic_host_xlate(struct irq_domain *h, struct device_node *ct,
132 IRQ_TYPE_EDGE_FALLING, 108 IRQ_TYPE_EDGE_FALLING,
133 }; 109 };
134 110
111 if (intspec[0] > 0x1f)
112 return 0;
113
135 *out_hwirq = intspec[0]; 114 *out_hwirq = intspec[0];
136 if (intsize > 1 && intspec[1] < 4) 115 if (intsize > 1 && intspec[1] < 4)
137 *out_flags = map_pic_senses[intspec[1]]; 116 *out_flags = map_pic_senses[intspec[1]];
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 9ac71ebd2c40..395af1347749 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -604,18 +604,14 @@ static struct mpic *mpic_find(unsigned int irq)
604} 604}
605 605
606/* Determine if the linux irq is an IPI */ 606/* Determine if the linux irq is an IPI */
607static unsigned int mpic_is_ipi(struct mpic *mpic, unsigned int irq) 607static unsigned int mpic_is_ipi(struct mpic *mpic, unsigned int src)
608{ 608{
609 unsigned int src = virq_to_hw(irq);
610
611 return (src >= mpic->ipi_vecs[0] && src <= mpic->ipi_vecs[3]); 609 return (src >= mpic->ipi_vecs[0] && src <= mpic->ipi_vecs[3]);
612} 610}
613 611
614/* Determine if the linux irq is a timer */ 612/* Determine if the linux irq is a timer */
615static unsigned int mpic_is_tm(struct mpic *mpic, unsigned int irq) 613static unsigned int mpic_is_tm(struct mpic *mpic, unsigned int src)
616{ 614{
617 unsigned int src = virq_to_hw(irq);
618
619 return (src >= mpic->timer_vecs[0] && src <= mpic->timer_vecs[7]); 615 return (src >= mpic->timer_vecs[0] && src <= mpic->timer_vecs[7]);
620} 616}
621 617
@@ -876,21 +872,45 @@ int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type)
876 if (src >= mpic->num_sources) 872 if (src >= mpic->num_sources)
877 return -EINVAL; 873 return -EINVAL;
878 874
875 vold = mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI));
876
877 /* We don't support "none" type */
879 if (flow_type == IRQ_TYPE_NONE) 878 if (flow_type == IRQ_TYPE_NONE)
880 if (mpic->senses && src < mpic->senses_count) 879 flow_type = IRQ_TYPE_DEFAULT;
881 flow_type = mpic->senses[src]; 880
882 if (flow_type == IRQ_TYPE_NONE) 881 /* Default: read HW settings */
883 flow_type = IRQ_TYPE_LEVEL_LOW; 882 if (flow_type == IRQ_TYPE_DEFAULT) {
883 switch(vold & (MPIC_INFO(VECPRI_POLARITY_MASK) |
884 MPIC_INFO(VECPRI_SENSE_MASK))) {
885 case MPIC_INFO(VECPRI_SENSE_EDGE) |
886 MPIC_INFO(VECPRI_POLARITY_POSITIVE):
887 flow_type = IRQ_TYPE_EDGE_RISING;
888 break;
889 case MPIC_INFO(VECPRI_SENSE_EDGE) |
890 MPIC_INFO(VECPRI_POLARITY_NEGATIVE):
891 flow_type = IRQ_TYPE_EDGE_FALLING;
892 break;
893 case MPIC_INFO(VECPRI_SENSE_LEVEL) |
894 MPIC_INFO(VECPRI_POLARITY_POSITIVE):
895 flow_type = IRQ_TYPE_LEVEL_HIGH;
896 break;
897 case MPIC_INFO(VECPRI_SENSE_LEVEL) |
898 MPIC_INFO(VECPRI_POLARITY_NEGATIVE):
899 flow_type = IRQ_TYPE_LEVEL_LOW;
900 break;
901 }
902 }
884 903
904 /* Apply to irq desc */
885 irqd_set_trigger_type(d, flow_type); 905 irqd_set_trigger_type(d, flow_type);
886 906
907 /* Apply to HW */
887 if (mpic_is_ht_interrupt(mpic, src)) 908 if (mpic_is_ht_interrupt(mpic, src))
888 vecpri = MPIC_VECPRI_POLARITY_POSITIVE | 909 vecpri = MPIC_VECPRI_POLARITY_POSITIVE |
889 MPIC_VECPRI_SENSE_EDGE; 910 MPIC_VECPRI_SENSE_EDGE;
890 else 911 else
891 vecpri = mpic_type_to_vecpri(mpic, flow_type); 912 vecpri = mpic_type_to_vecpri(mpic, flow_type);
892 913
893 vold = mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI));
894 vnew = vold & ~(MPIC_INFO(VECPRI_POLARITY_MASK) | 914 vnew = vold & ~(MPIC_INFO(VECPRI_POLARITY_MASK) |
895 MPIC_INFO(VECPRI_SENSE_MASK)); 915 MPIC_INFO(VECPRI_SENSE_MASK));
896 vnew |= vecpri; 916 vnew |= vecpri;
@@ -1026,7 +1046,7 @@ static int mpic_host_map(struct irq_domain *h, unsigned int virq,
1026 irq_set_chip_and_handler(virq, chip, handle_fasteoi_irq); 1046 irq_set_chip_and_handler(virq, chip, handle_fasteoi_irq);
1027 1047
1028 /* Set default irq type */ 1048 /* Set default irq type */
1029 irq_set_irq_type(virq, IRQ_TYPE_NONE); 1049 irq_set_irq_type(virq, IRQ_TYPE_DEFAULT);
1030 1050
1031 /* If the MPIC was reset, then all vectors have already been 1051 /* If the MPIC was reset, then all vectors have already been
1032 * initialized. Otherwise, a per source lazy initialization 1052 * initialized. Otherwise, a per source lazy initialization
@@ -1417,12 +1437,6 @@ void __init mpic_assign_isu(struct mpic *mpic, unsigned int isu_num,
1417 mpic->num_sources = isu_first + mpic->isu_size; 1437 mpic->num_sources = isu_first + mpic->isu_size;
1418} 1438}
1419 1439
1420void __init mpic_set_default_senses(struct mpic *mpic, u8 *senses, int count)
1421{
1422 mpic->senses = senses;
1423 mpic->senses_count = count;
1424}
1425
1426void __init mpic_init(struct mpic *mpic) 1440void __init mpic_init(struct mpic *mpic)
1427{ 1441{
1428 int i, cpu; 1442 int i, cpu;
@@ -1555,12 +1569,12 @@ void mpic_irq_set_priority(unsigned int irq, unsigned int pri)
1555 return; 1569 return;
1556 1570
1557 raw_spin_lock_irqsave(&mpic_lock, flags); 1571 raw_spin_lock_irqsave(&mpic_lock, flags);
1558 if (mpic_is_ipi(mpic, irq)) { 1572 if (mpic_is_ipi(mpic, src)) {
1559 reg = mpic_ipi_read(src - mpic->ipi_vecs[0]) & 1573 reg = mpic_ipi_read(src - mpic->ipi_vecs[0]) &
1560 ~MPIC_VECPRI_PRIORITY_MASK; 1574 ~MPIC_VECPRI_PRIORITY_MASK;
1561 mpic_ipi_write(src - mpic->ipi_vecs[0], 1575 mpic_ipi_write(src - mpic->ipi_vecs[0],
1562 reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT)); 1576 reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT));
1563 } else if (mpic_is_tm(mpic, irq)) { 1577 } else if (mpic_is_tm(mpic, src)) {
1564 reg = mpic_tm_read(src - mpic->timer_vecs[0]) & 1578 reg = mpic_tm_read(src - mpic->timer_vecs[0]) &
1565 ~MPIC_VECPRI_PRIORITY_MASK; 1579 ~MPIC_VECPRI_PRIORITY_MASK;
1566 mpic_tm_write(src - mpic->timer_vecs[0], 1580 mpic_tm_write(src - mpic->timer_vecs[0],
diff --git a/arch/powerpc/sysdev/mpic_msgr.c b/arch/powerpc/sysdev/mpic_msgr.c
index 6e7fa386e76a..483d8fa72e8b 100644
--- a/arch/powerpc/sysdev/mpic_msgr.c
+++ b/arch/powerpc/sysdev/mpic_msgr.c
@@ -27,6 +27,7 @@
27 27
28static struct mpic_msgr **mpic_msgrs; 28static struct mpic_msgr **mpic_msgrs;
29static unsigned int mpic_msgr_count; 29static unsigned int mpic_msgr_count;
30static DEFINE_RAW_SPINLOCK(msgrs_lock);
30 31
31static inline void _mpic_msgr_mer_write(struct mpic_msgr *msgr, u32 value) 32static inline void _mpic_msgr_mer_write(struct mpic_msgr *msgr, u32 value)
32{ 33{
@@ -56,12 +57,11 @@ struct mpic_msgr *mpic_msgr_get(unsigned int reg_num)
56 if (reg_num >= mpic_msgr_count) 57 if (reg_num >= mpic_msgr_count)
57 return ERR_PTR(-ENODEV); 58 return ERR_PTR(-ENODEV);
58 59
59 raw_spin_lock_irqsave(&msgr->lock, flags); 60 raw_spin_lock_irqsave(&msgrs_lock, flags);
60 if (mpic_msgrs[reg_num]->in_use == MSGR_FREE) { 61 msgr = mpic_msgrs[reg_num];
61 msgr = mpic_msgrs[reg_num]; 62 if (msgr->in_use == MSGR_FREE)
62 msgr->in_use = MSGR_INUSE; 63 msgr->in_use = MSGR_INUSE;
63 } 64 raw_spin_unlock_irqrestore(&msgrs_lock, flags);
64 raw_spin_unlock_irqrestore(&msgr->lock, flags);
65 65
66 return msgr; 66 return msgr;
67} 67}
@@ -228,7 +228,7 @@ static __devinit int mpic_msgr_probe(struct platform_device *dev)
228 228
229 reg_number = block_number * MPIC_MSGR_REGISTERS_PER_BLOCK + i; 229 reg_number = block_number * MPIC_MSGR_REGISTERS_PER_BLOCK + i;
230 msgr->base = msgr_block_addr + i * MPIC_MSGR_STRIDE; 230 msgr->base = msgr_block_addr + i * MPIC_MSGR_STRIDE;
231 msgr->mer = msgr->base + MPIC_MSGR_MER_OFFSET; 231 msgr->mer = (u32 *)((u8 *)msgr->base + MPIC_MSGR_MER_OFFSET);
232 msgr->in_use = MSGR_FREE; 232 msgr->in_use = MSGR_FREE;
233 msgr->num = i; 233 msgr->num = i;
234 raw_spin_lock_init(&msgr->lock); 234 raw_spin_lock_init(&msgr->lock);
diff --git a/arch/powerpc/sysdev/scom.c b/arch/powerpc/sysdev/scom.c
index 49a3ece1c6b3..702256a1ca11 100644
--- a/arch/powerpc/sysdev/scom.c
+++ b/arch/powerpc/sysdev/scom.c
@@ -22,6 +22,7 @@
22#include <linux/debugfs.h> 22#include <linux/debugfs.h>
23#include <linux/slab.h> 23#include <linux/slab.h>
24#include <linux/export.h> 24#include <linux/export.h>
25#include <asm/debug.h>
25#include <asm/prom.h> 26#include <asm/prom.h>
26#include <asm/scom.h> 27#include <asm/scom.h>
27 28
diff --git a/arch/powerpc/sysdev/xics/xics-common.c b/arch/powerpc/sysdev/xics/xics-common.c
index ea5e204e3450..cd1d18db92c6 100644
--- a/arch/powerpc/sysdev/xics/xics-common.c
+++ b/arch/powerpc/sysdev/xics/xics-common.c
@@ -188,6 +188,7 @@ void xics_migrate_irqs_away(void)
188{ 188{
189 int cpu = smp_processor_id(), hw_cpu = hard_smp_processor_id(); 189 int cpu = smp_processor_id(), hw_cpu = hard_smp_processor_id();
190 unsigned int irq, virq; 190 unsigned int irq, virq;
191 struct irq_desc *desc;
191 192
192 /* If we used to be the default server, move to the new "boot_cpuid" */ 193 /* If we used to be the default server, move to the new "boot_cpuid" */
193 if (hw_cpu == xics_default_server) 194 if (hw_cpu == xics_default_server)
@@ -202,8 +203,7 @@ void xics_migrate_irqs_away(void)
202 /* Allow IPIs again... */ 203 /* Allow IPIs again... */
203 icp_ops->set_priority(DEFAULT_PRIORITY); 204 icp_ops->set_priority(DEFAULT_PRIORITY);
204 205
205 for_each_irq(virq) { 206 for_each_irq_desc(virq, desc) {
206 struct irq_desc *desc;
207 struct irq_chip *chip; 207 struct irq_chip *chip;
208 long server; 208 long server;
209 unsigned long flags; 209 unsigned long flags;
@@ -212,9 +212,8 @@ void xics_migrate_irqs_away(void)
212 /* We can't set affinity on ISA interrupts */ 212 /* We can't set affinity on ISA interrupts */
213 if (virq < NUM_ISA_INTERRUPTS) 213 if (virq < NUM_ISA_INTERRUPTS)
214 continue; 214 continue;
215 desc = irq_to_desc(virq);
216 /* We only need to migrate enabled IRQS */ 215 /* We only need to migrate enabled IRQS */
217 if (!desc || !desc->action) 216 if (!desc->action)
218 continue; 217 continue;
219 if (desc->irq_data.domain != xics_host) 218 if (desc->irq_data.domain != xics_host)
220 continue; 219 continue;
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 2b7c0fbe578e..9015060919a0 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -90,7 +90,6 @@ config S390
90 select HAVE_KERNEL_XZ 90 select HAVE_KERNEL_XZ
91 select HAVE_ARCH_MUTEX_CPU_RELAX 91 select HAVE_ARCH_MUTEX_CPU_RELAX
92 select HAVE_ARCH_JUMP_LABEL if !MARCH_G5 92 select HAVE_ARCH_JUMP_LABEL if !MARCH_G5
93 select HAVE_RCU_TABLE_FREE if SMP
94 select ARCH_SAVE_PAGE_KEYS if HIBERNATION 93 select ARCH_SAVE_PAGE_KEYS if HIBERNATION
95 select HAVE_MEMBLOCK 94 select HAVE_MEMBLOCK
96 select HAVE_MEMBLOCK_NODE_MAP 95 select HAVE_MEMBLOCK_NODE_MAP
diff --git a/arch/s390/defconfig b/arch/s390/defconfig
index 6cf8e26b3137..1957a9dd256d 100644
--- a/arch/s390/defconfig
+++ b/arch/s390/defconfig
@@ -1,8 +1,12 @@
1CONFIG_EXPERIMENTAL=y 1CONFIG_EXPERIMENTAL=y
2CONFIG_SYSVIPC=y 2CONFIG_SYSVIPC=y
3CONFIG_POSIX_MQUEUE=y 3CONFIG_POSIX_MQUEUE=y
4CONFIG_FHANDLE=y
5CONFIG_TASKSTATS=y
6CONFIG_TASK_DELAY_ACCT=y
7CONFIG_TASK_XACCT=y
8CONFIG_TASK_IO_ACCOUNTING=y
4CONFIG_AUDIT=y 9CONFIG_AUDIT=y
5CONFIG_RCU_TRACE=y
6CONFIG_IKCONFIG=y 10CONFIG_IKCONFIG=y
7CONFIG_IKCONFIG_PROC=y 11CONFIG_IKCONFIG_PROC=y
8CONFIG_CGROUPS=y 12CONFIG_CGROUPS=y
@@ -14,16 +18,22 @@ CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y
14CONFIG_CGROUP_SCHED=y 18CONFIG_CGROUP_SCHED=y
15CONFIG_RT_GROUP_SCHED=y 19CONFIG_RT_GROUP_SCHED=y
16CONFIG_BLK_CGROUP=y 20CONFIG_BLK_CGROUP=y
21CONFIG_NAMESPACES=y
17CONFIG_BLK_DEV_INITRD=y 22CONFIG_BLK_DEV_INITRD=y
18# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 23CONFIG_RD_BZIP2=y
24CONFIG_RD_LZMA=y
25CONFIG_RD_XZ=y
26CONFIG_RD_LZO=y
27CONFIG_EXPERT=y
19# CONFIG_COMPAT_BRK is not set 28# CONFIG_COMPAT_BRK is not set
20CONFIG_SLAB=y
21CONFIG_PROFILING=y 29CONFIG_PROFILING=y
22CONFIG_OPROFILE=y 30CONFIG_OPROFILE=y
23CONFIG_KPROBES=y 31CONFIG_KPROBES=y
24CONFIG_MODULES=y 32CONFIG_MODULES=y
25CONFIG_MODULE_UNLOAD=y 33CONFIG_MODULE_UNLOAD=y
26CONFIG_MODVERSIONS=y 34CONFIG_MODVERSIONS=y
35CONFIG_PARTITION_ADVANCED=y
36CONFIG_IBM_PARTITION=y
27CONFIG_DEFAULT_DEADLINE=y 37CONFIG_DEFAULT_DEADLINE=y
28CONFIG_NO_HZ=y 38CONFIG_NO_HZ=y
29CONFIG_HIGH_RES_TIMERS=y 39CONFIG_HIGH_RES_TIMERS=y
@@ -34,18 +44,15 @@ CONFIG_KSM=y
34CONFIG_BINFMT_MISC=m 44CONFIG_BINFMT_MISC=m
35CONFIG_CMM=m 45CONFIG_CMM=m
36CONFIG_HZ_100=y 46CONFIG_HZ_100=y
37CONFIG_KEXEC=y 47CONFIG_CRASH_DUMP=y
38CONFIG_PM=y
39CONFIG_HIBERNATION=y 48CONFIG_HIBERNATION=y
40CONFIG_PACKET=y 49CONFIG_PACKET=y
41CONFIG_UNIX=y 50CONFIG_UNIX=y
42CONFIG_NET_KEY=y 51CONFIG_NET_KEY=y
43CONFIG_AFIUCV=m
44CONFIG_INET=y 52CONFIG_INET=y
45CONFIG_IP_MULTICAST=y 53CONFIG_IP_MULTICAST=y
46# CONFIG_INET_LRO is not set 54# CONFIG_INET_LRO is not set
47CONFIG_IPV6=y 55CONFIG_IPV6=y
48CONFIG_NET_SCTPPROBE=m
49CONFIG_L2TP=m 56CONFIG_L2TP=m
50CONFIG_L2TP_DEBUGFS=m 57CONFIG_L2TP_DEBUGFS=m
51CONFIG_VLAN_8021Q=y 58CONFIG_VLAN_8021Q=y
@@ -84,15 +91,14 @@ CONFIG_SCSI_CONSTANTS=y
84CONFIG_SCSI_LOGGING=y 91CONFIG_SCSI_LOGGING=y
85CONFIG_SCSI_SCAN_ASYNC=y 92CONFIG_SCSI_SCAN_ASYNC=y
86CONFIG_ZFCP=y 93CONFIG_ZFCP=y
87CONFIG_ZFCP_DIF=y
88CONFIG_NETDEVICES=y 94CONFIG_NETDEVICES=y
89CONFIG_DUMMY=m
90CONFIG_BONDING=m 95CONFIG_BONDING=m
96CONFIG_DUMMY=m
91CONFIG_EQUALIZER=m 97CONFIG_EQUALIZER=m
92CONFIG_TUN=m 98CONFIG_TUN=m
93CONFIG_NET_ETHERNET=y
94CONFIG_VIRTIO_NET=y 99CONFIG_VIRTIO_NET=y
95CONFIG_RAW_DRIVER=m 100CONFIG_RAW_DRIVER=m
101CONFIG_VIRTIO_BALLOON=y
96CONFIG_EXT2_FS=y 102CONFIG_EXT2_FS=y
97CONFIG_EXT3_FS=y 103CONFIG_EXT3_FS=y
98# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set 104# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
@@ -103,27 +109,21 @@ CONFIG_PROC_KCORE=y
103CONFIG_TMPFS=y 109CONFIG_TMPFS=y
104CONFIG_TMPFS_POSIX_ACL=y 110CONFIG_TMPFS_POSIX_ACL=y
105# CONFIG_NETWORK_FILESYSTEMS is not set 111# CONFIG_NETWORK_FILESYSTEMS is not set
106CONFIG_PARTITION_ADVANCED=y
107CONFIG_IBM_PARTITION=y
108CONFIG_DLM=m
109CONFIG_MAGIC_SYSRQ=y 112CONFIG_MAGIC_SYSRQ=y
110CONFIG_DEBUG_KERNEL=y
111CONFIG_TIMER_STATS=y 113CONFIG_TIMER_STATS=y
112CONFIG_PROVE_LOCKING=y 114CONFIG_PROVE_LOCKING=y
113CONFIG_PROVE_RCU=y 115CONFIG_PROVE_RCU=y
114CONFIG_LOCK_STAT=y 116CONFIG_LOCK_STAT=y
115CONFIG_DEBUG_LOCKDEP=y 117CONFIG_DEBUG_LOCKDEP=y
116CONFIG_DEBUG_SPINLOCK_SLEEP=y
117CONFIG_DEBUG_LIST=y 118CONFIG_DEBUG_LIST=y
118CONFIG_DEBUG_NOTIFIERS=y 119CONFIG_DEBUG_NOTIFIERS=y
119# CONFIG_RCU_CPU_STALL_DETECTOR is not set 120CONFIG_RCU_TRACE=y
120CONFIG_KPROBES_SANITY_TEST=y 121CONFIG_KPROBES_SANITY_TEST=y
121CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y 122CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y
122CONFIG_CPU_NOTIFIER_ERROR_INJECT=m 123CONFIG_CPU_NOTIFIER_ERROR_INJECT=m
123CONFIG_LATENCYTOP=y 124CONFIG_LATENCYTOP=y
124CONFIG_SYSCTL_SYSCALL_CHECK=y
125CONFIG_DEBUG_PAGEALLOC=y 125CONFIG_DEBUG_PAGEALLOC=y
126# CONFIG_FTRACE is not set 126CONFIG_BLK_DEV_IO_TRACE=y
127# CONFIG_STRICT_DEVMEM is not set 127# CONFIG_STRICT_DEVMEM is not set
128CONFIG_CRYPTO_NULL=m 128CONFIG_CRYPTO_NULL=m
129CONFIG_CRYPTO_CRYPTD=m 129CONFIG_CRYPTO_CRYPTD=m
@@ -173,4 +173,3 @@ CONFIG_CRYPTO_SHA512_S390=m
173CONFIG_CRYPTO_DES_S390=m 173CONFIG_CRYPTO_DES_S390=m
174CONFIG_CRYPTO_AES_S390=m 174CONFIG_CRYPTO_AES_S390=m
175CONFIG_CRC7=m 175CONFIG_CRC7=m
176CONFIG_VIRTIO_BALLOON=y
diff --git a/arch/s390/include/asm/facility.h b/arch/s390/include/asm/facility.h
index 1e5b27edc0c9..2ee66a65f2d4 100644
--- a/arch/s390/include/asm/facility.h
+++ b/arch/s390/include/asm/facility.h
@@ -38,12 +38,11 @@ static inline void stfle(u64 *stfle_fac_list, int size)
38 unsigned long nr; 38 unsigned long nr;
39 39
40 preempt_disable(); 40 preempt_disable();
41 S390_lowcore.stfl_fac_list = 0;
42 asm volatile( 41 asm volatile(
43 " .insn s,0xb2b10000,0(0)\n" /* stfl */ 42 " .insn s,0xb2b10000,0(0)\n" /* stfl */
44 "0:\n" 43 "0:\n"
45 EX_TABLE(0b, 0b) 44 EX_TABLE(0b, 0b)
46 : "=m" (S390_lowcore.stfl_fac_list)); 45 : "+m" (S390_lowcore.stfl_fac_list));
47 nr = 4; /* bytes stored by stfl */ 46 nr = 4; /* bytes stored by stfl */
48 memcpy(stfle_fac_list, &S390_lowcore.stfl_fac_list, 4); 47 memcpy(stfle_fac_list, &S390_lowcore.stfl_fac_list, 4);
49 if (S390_lowcore.stfl_fac_list & 0x01000000) { 48 if (S390_lowcore.stfl_fac_list & 0x01000000) {
diff --git a/arch/s390/include/asm/pgalloc.h b/arch/s390/include/asm/pgalloc.h
index 8eef9b5b3cf4..78e3041919de 100644
--- a/arch/s390/include/asm/pgalloc.h
+++ b/arch/s390/include/asm/pgalloc.h
@@ -22,10 +22,7 @@ void crst_table_free(struct mm_struct *, unsigned long *);
22 22
23unsigned long *page_table_alloc(struct mm_struct *, unsigned long); 23unsigned long *page_table_alloc(struct mm_struct *, unsigned long);
24void page_table_free(struct mm_struct *, unsigned long *); 24void page_table_free(struct mm_struct *, unsigned long *);
25#ifdef CONFIG_HAVE_RCU_TABLE_FREE
26void page_table_free_rcu(struct mmu_gather *, unsigned long *); 25void page_table_free_rcu(struct mmu_gather *, unsigned long *);
27void __tlb_remove_table(void *_table);
28#endif
29 26
30static inline void clear_table(unsigned long *s, unsigned long val, size_t n) 27static inline void clear_table(unsigned long *s, unsigned long val, size_t n)
31{ 28{
diff --git a/arch/s390/include/asm/swab.h b/arch/s390/include/asm/swab.h
index 6bdee21c077e..a3e4ebb32090 100644
--- a/arch/s390/include/asm/swab.h
+++ b/arch/s390/include/asm/swab.h
@@ -77,7 +77,7 @@ static inline __u16 __arch_swab16p(const __u16 *x)
77 77
78 asm volatile( 78 asm volatile(
79#ifndef __s390x__ 79#ifndef __s390x__
80 " icm %0,2,%O+1(%R1)\n" 80 " icm %0,2,%O1+1(%R1)\n"
81 " ic %0,%1\n" 81 " ic %0,%1\n"
82 : "=&d" (result) : "Q" (*x) : "cc"); 82 : "=&d" (result) : "Q" (*x) : "cc");
83#else /* __s390x__ */ 83#else /* __s390x__ */
diff --git a/arch/s390/include/asm/tlb.h b/arch/s390/include/asm/tlb.h
index c687a2c83462..775a5eea8f9e 100644
--- a/arch/s390/include/asm/tlb.h
+++ b/arch/s390/include/asm/tlb.h
@@ -30,14 +30,10 @@
30 30
31struct mmu_gather { 31struct mmu_gather {
32 struct mm_struct *mm; 32 struct mm_struct *mm;
33#ifdef CONFIG_HAVE_RCU_TABLE_FREE
34 struct mmu_table_batch *batch; 33 struct mmu_table_batch *batch;
35#endif
36 unsigned int fullmm; 34 unsigned int fullmm;
37 unsigned int need_flush;
38}; 35};
39 36
40#ifdef CONFIG_HAVE_RCU_TABLE_FREE
41struct mmu_table_batch { 37struct mmu_table_batch {
42 struct rcu_head rcu; 38 struct rcu_head rcu;
43 unsigned int nr; 39 unsigned int nr;
@@ -49,7 +45,6 @@ struct mmu_table_batch {
49 45
50extern void tlb_table_flush(struct mmu_gather *tlb); 46extern void tlb_table_flush(struct mmu_gather *tlb);
51extern void tlb_remove_table(struct mmu_gather *tlb, void *table); 47extern void tlb_remove_table(struct mmu_gather *tlb, void *table);
52#endif
53 48
54static inline void tlb_gather_mmu(struct mmu_gather *tlb, 49static inline void tlb_gather_mmu(struct mmu_gather *tlb,
55 struct mm_struct *mm, 50 struct mm_struct *mm,
@@ -57,29 +52,20 @@ static inline void tlb_gather_mmu(struct mmu_gather *tlb,
57{ 52{
58 tlb->mm = mm; 53 tlb->mm = mm;
59 tlb->fullmm = full_mm_flush; 54 tlb->fullmm = full_mm_flush;
60 tlb->need_flush = 0;
61#ifdef CONFIG_HAVE_RCU_TABLE_FREE
62 tlb->batch = NULL; 55 tlb->batch = NULL;
63#endif
64 if (tlb->fullmm) 56 if (tlb->fullmm)
65 __tlb_flush_mm(mm); 57 __tlb_flush_mm(mm);
66} 58}
67 59
68static inline void tlb_flush_mmu(struct mmu_gather *tlb) 60static inline void tlb_flush_mmu(struct mmu_gather *tlb)
69{ 61{
70 if (!tlb->need_flush)
71 return;
72 tlb->need_flush = 0;
73 __tlb_flush_mm(tlb->mm);
74#ifdef CONFIG_HAVE_RCU_TABLE_FREE
75 tlb_table_flush(tlb); 62 tlb_table_flush(tlb);
76#endif
77} 63}
78 64
79static inline void tlb_finish_mmu(struct mmu_gather *tlb, 65static inline void tlb_finish_mmu(struct mmu_gather *tlb,
80 unsigned long start, unsigned long end) 66 unsigned long start, unsigned long end)
81{ 67{
82 tlb_flush_mmu(tlb); 68 tlb_table_flush(tlb);
83} 69}
84 70
85/* 71/*
@@ -105,10 +91,8 @@ static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
105static inline void pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, 91static inline void pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
106 unsigned long address) 92 unsigned long address)
107{ 93{
108#ifdef CONFIG_HAVE_RCU_TABLE_FREE
109 if (!tlb->fullmm) 94 if (!tlb->fullmm)
110 return page_table_free_rcu(tlb, (unsigned long *) pte); 95 return page_table_free_rcu(tlb, (unsigned long *) pte);
111#endif
112 page_table_free(tlb->mm, (unsigned long *) pte); 96 page_table_free(tlb->mm, (unsigned long *) pte);
113} 97}
114 98
@@ -125,10 +109,8 @@ static inline void pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd,
125#ifdef __s390x__ 109#ifdef __s390x__
126 if (tlb->mm->context.asce_limit <= (1UL << 31)) 110 if (tlb->mm->context.asce_limit <= (1UL << 31))
127 return; 111 return;
128#ifdef CONFIG_HAVE_RCU_TABLE_FREE
129 if (!tlb->fullmm) 112 if (!tlb->fullmm)
130 return tlb_remove_table(tlb, pmd); 113 return tlb_remove_table(tlb, pmd);
131#endif
132 crst_table_free(tlb->mm, (unsigned long *) pmd); 114 crst_table_free(tlb->mm, (unsigned long *) pmd);
133#endif 115#endif
134} 116}
@@ -146,10 +128,8 @@ static inline void pud_free_tlb(struct mmu_gather *tlb, pud_t *pud,
146#ifdef __s390x__ 128#ifdef __s390x__
147 if (tlb->mm->context.asce_limit <= (1UL << 42)) 129 if (tlb->mm->context.asce_limit <= (1UL << 42))
148 return; 130 return;
149#ifdef CONFIG_HAVE_RCU_TABLE_FREE
150 if (!tlb->fullmm) 131 if (!tlb->fullmm)
151 return tlb_remove_table(tlb, pud); 132 return tlb_remove_table(tlb, pud);
152#endif
153 crst_table_free(tlb->mm, (unsigned long *) pud); 133 crst_table_free(tlb->mm, (unsigned long *) pud);
154#endif 134#endif
155} 135}
diff --git a/arch/s390/kernel/head.S b/arch/s390/kernel/head.S
index c27a0727f930..adccd908ebc7 100644
--- a/arch/s390/kernel/head.S
+++ b/arch/s390/kernel/head.S
@@ -474,9 +474,9 @@ ENTRY(startup_kdump)
474 stck __LC_LAST_UPDATE_CLOCK 474 stck __LC_LAST_UPDATE_CLOCK
475 spt 5f-.LPG0(%r13) 475 spt 5f-.LPG0(%r13)
476 mvc __LC_LAST_UPDATE_TIMER(8),5f-.LPG0(%r13) 476 mvc __LC_LAST_UPDATE_TIMER(8),5f-.LPG0(%r13)
477 xc __LC_STFL_FAC_LIST(8),__LC_STFL_FAC_LIST
477#ifndef CONFIG_MARCH_G5 478#ifndef CONFIG_MARCH_G5
478 # check capabilities against MARCH_{G5,Z900,Z990,Z9_109,Z10} 479 # check capabilities against MARCH_{G5,Z900,Z990,Z9_109,Z10}
479 xc __LC_STFL_FAC_LIST(8),__LC_STFL_FAC_LIST
480 .insn s,0xb2b10000,__LC_STFL_FAC_LIST # store facility list 480 .insn s,0xb2b10000,__LC_STFL_FAC_LIST # store facility list
481 tm __LC_STFL_FAC_LIST,0x01 # stfle available ? 481 tm __LC_STFL_FAC_LIST,0x01 # stfle available ?
482 jz 0f 482 jz 0f
diff --git a/arch/s390/kernel/irq.c b/arch/s390/kernel/irq.c
index 1c2cdd59ccd0..8a22c27219dd 100644
--- a/arch/s390/kernel/irq.c
+++ b/arch/s390/kernel/irq.c
@@ -118,9 +118,10 @@ asmlinkage void do_softirq(void)
118 "a" (__do_softirq) 118 "a" (__do_softirq)
119 : "0", "1", "2", "3", "4", "5", "14", 119 : "0", "1", "2", "3", "4", "5", "14",
120 "cc", "memory" ); 120 "cc", "memory" );
121 } else 121 } else {
122 /* We are already on the async stack. */ 122 /* We are already on the async stack. */
123 __do_softirq(); 123 __do_softirq();
124 }
124 } 125 }
125 126
126 local_irq_restore(flags); 127 local_irq_restore(flags);
@@ -192,11 +193,12 @@ int unregister_external_interrupt(u16 code, ext_int_handler_t handler)
192 int index = ext_hash(code); 193 int index = ext_hash(code);
193 194
194 spin_lock_irqsave(&ext_int_hash_lock, flags); 195 spin_lock_irqsave(&ext_int_hash_lock, flags);
195 list_for_each_entry_rcu(p, &ext_int_hash[index], entry) 196 list_for_each_entry_rcu(p, &ext_int_hash[index], entry) {
196 if (p->code == code && p->handler == handler) { 197 if (p->code == code && p->handler == handler) {
197 list_del_rcu(&p->entry); 198 list_del_rcu(&p->entry);
198 kfree_rcu(p, rcu); 199 kfree_rcu(p, rcu);
199 } 200 }
201 }
200 spin_unlock_irqrestore(&ext_int_hash_lock, flags); 202 spin_unlock_irqrestore(&ext_int_hash_lock, flags);
201 return 0; 203 return 0;
202} 204}
@@ -211,9 +213,10 @@ void __irq_entry do_extint(struct pt_regs *regs, struct ext_code ext_code,
211 213
212 old_regs = set_irq_regs(regs); 214 old_regs = set_irq_regs(regs);
213 irq_enter(); 215 irq_enter();
214 if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator) 216 if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator) {
215 /* Serve timer interrupts first. */ 217 /* Serve timer interrupts first. */
216 clock_comparator_work(); 218 clock_comparator_work();
219 }
217 kstat_cpu(smp_processor_id()).irqs[EXTERNAL_INTERRUPT]++; 220 kstat_cpu(smp_processor_id()).irqs[EXTERNAL_INTERRUPT]++;
218 if (ext_code.code != 0x1004) 221 if (ext_code.code != 0x1004)
219 __get_cpu_var(s390_idle).nohz_delay = 1; 222 __get_cpu_var(s390_idle).nohz_delay = 1;
diff --git a/arch/s390/kernel/perf_cpum_cf.c b/arch/s390/kernel/perf_cpum_cf.c
index 46405086479c..cb019f429e88 100644
--- a/arch/s390/kernel/perf_cpum_cf.c
+++ b/arch/s390/kernel/perf_cpum_cf.c
@@ -178,7 +178,7 @@ static void cpumf_pmu_enable(struct pmu *pmu)
178 err = lcctl(cpuhw->state); 178 err = lcctl(cpuhw->state);
179 if (err) { 179 if (err) {
180 pr_err("Enabling the performance measuring unit " 180 pr_err("Enabling the performance measuring unit "
181 "failed with rc=%lx\n", err); 181 "failed with rc=%x\n", err);
182 return; 182 return;
183 } 183 }
184 184
@@ -203,7 +203,7 @@ static void cpumf_pmu_disable(struct pmu *pmu)
203 err = lcctl(inactive); 203 err = lcctl(inactive);
204 if (err) { 204 if (err) {
205 pr_err("Disabling the performance measuring unit " 205 pr_err("Disabling the performance measuring unit "
206 "failed with rc=%lx\n", err); 206 "failed with rc=%x\n", err);
207 return; 207 return;
208 } 208 }
209 209
diff --git a/arch/s390/mm/maccess.c b/arch/s390/mm/maccess.c
index 7bb15fcca75e..e1335dc2b1b7 100644
--- a/arch/s390/mm/maccess.c
+++ b/arch/s390/mm/maccess.c
@@ -61,21 +61,14 @@ long probe_kernel_write(void *dst, const void *src, size_t size)
61 return copied < 0 ? -EFAULT : 0; 61 return copied < 0 ? -EFAULT : 0;
62} 62}
63 63
64/* 64static int __memcpy_real(void *dest, void *src, size_t count)
65 * Copy memory in real mode (kernel to kernel)
66 */
67int memcpy_real(void *dest, void *src, size_t count)
68{ 65{
69 register unsigned long _dest asm("2") = (unsigned long) dest; 66 register unsigned long _dest asm("2") = (unsigned long) dest;
70 register unsigned long _len1 asm("3") = (unsigned long) count; 67 register unsigned long _len1 asm("3") = (unsigned long) count;
71 register unsigned long _src asm("4") = (unsigned long) src; 68 register unsigned long _src asm("4") = (unsigned long) src;
72 register unsigned long _len2 asm("5") = (unsigned long) count; 69 register unsigned long _len2 asm("5") = (unsigned long) count;
73 unsigned long flags;
74 int rc = -EFAULT; 70 int rc = -EFAULT;
75 71
76 if (!count)
77 return 0;
78 flags = __arch_local_irq_stnsm(0xf8UL);
79 asm volatile ( 72 asm volatile (
80 "0: mvcle %1,%2,0x0\n" 73 "0: mvcle %1,%2,0x0\n"
81 "1: jo 0b\n" 74 "1: jo 0b\n"
@@ -86,7 +79,23 @@ int memcpy_real(void *dest, void *src, size_t count)
86 "+d" (_len2), "=m" (*((long *) dest)) 79 "+d" (_len2), "=m" (*((long *) dest))
87 : "m" (*((long *) src)) 80 : "m" (*((long *) src))
88 : "cc", "memory"); 81 : "cc", "memory");
89 arch_local_irq_restore(flags); 82 return rc;
83}
84
85/*
86 * Copy memory in real mode (kernel to kernel)
87 */
88int memcpy_real(void *dest, void *src, size_t count)
89{
90 unsigned long flags;
91 int rc;
92
93 if (!count)
94 return 0;
95 local_irq_save(flags);
96 __arch_local_irq_stnsm(0xfbUL);
97 rc = __memcpy_real(dest, src, count);
98 local_irq_restore(flags);
90 return rc; 99 return rc;
91} 100}
92 101
diff --git a/arch/s390/mm/pgtable.c b/arch/s390/mm/pgtable.c
index 373adf69b01c..6e765bf00670 100644
--- a/arch/s390/mm/pgtable.c
+++ b/arch/s390/mm/pgtable.c
@@ -678,8 +678,6 @@ void page_table_free(struct mm_struct *mm, unsigned long *table)
678 } 678 }
679} 679}
680 680
681#ifdef CONFIG_HAVE_RCU_TABLE_FREE
682
683static void __page_table_free_rcu(void *table, unsigned bit) 681static void __page_table_free_rcu(void *table, unsigned bit)
684{ 682{
685 struct page *page; 683 struct page *page;
@@ -733,7 +731,66 @@ void __tlb_remove_table(void *_table)
733 free_pages((unsigned long) table, ALLOC_ORDER); 731 free_pages((unsigned long) table, ALLOC_ORDER);
734} 732}
735 733
736#endif 734static void tlb_remove_table_smp_sync(void *arg)
735{
736 /* Simply deliver the interrupt */
737}
738
739static void tlb_remove_table_one(void *table)
740{
741 /*
742 * This isn't an RCU grace period and hence the page-tables cannot be
743 * assumed to be actually RCU-freed.
744 *
745 * It is however sufficient for software page-table walkers that rely
746 * on IRQ disabling. See the comment near struct mmu_table_batch.
747 */
748 smp_call_function(tlb_remove_table_smp_sync, NULL, 1);
749 __tlb_remove_table(table);
750}
751
752static void tlb_remove_table_rcu(struct rcu_head *head)
753{
754 struct mmu_table_batch *batch;
755 int i;
756
757 batch = container_of(head, struct mmu_table_batch, rcu);
758
759 for (i = 0; i < batch->nr; i++)
760 __tlb_remove_table(batch->tables[i]);
761
762 free_page((unsigned long)batch);
763}
764
765void tlb_table_flush(struct mmu_gather *tlb)
766{
767 struct mmu_table_batch **batch = &tlb->batch;
768
769 if (*batch) {
770 __tlb_flush_mm(tlb->mm);
771 call_rcu_sched(&(*batch)->rcu, tlb_remove_table_rcu);
772 *batch = NULL;
773 }
774}
775
776void tlb_remove_table(struct mmu_gather *tlb, void *table)
777{
778 struct mmu_table_batch **batch = &tlb->batch;
779
780 if (*batch == NULL) {
781 *batch = (struct mmu_table_batch *)
782 __get_free_page(GFP_NOWAIT | __GFP_NOWARN);
783 if (*batch == NULL) {
784 __tlb_flush_mm(tlb->mm);
785 tlb_remove_table_one(table);
786 return;
787 }
788 (*batch)->nr = 0;
789 }
790 (*batch)->tables[(*batch)->nr++] = table;
791 if ((*batch)->nr == MAX_TABLE_BATCH)
792 tlb_table_flush(tlb);
793}
737 794
738/* 795/*
739 * switch on pgstes for its userspace process (for kvm) 796 * switch on pgstes for its userspace process (for kvm)
diff --git a/arch/sh/include/asm/atomic.h b/arch/sh/include/asm/atomic.h
index 37f2f4a55231..f4c1c20bcdf6 100644
--- a/arch/sh/include/asm/atomic.h
+++ b/arch/sh/include/asm/atomic.h
@@ -11,7 +11,7 @@
11#include <linux/types.h> 11#include <linux/types.h>
12#include <asm/cmpxchg.h> 12#include <asm/cmpxchg.h>
13 13
14#define ATOMIC_INIT(i) ( (atomic_t) { (i) } ) 14#define ATOMIC_INIT(i) { (i) }
15 15
16#define atomic_read(v) (*(volatile int *)&(v)->counter) 16#define atomic_read(v) (*(volatile int *)&(v)->counter)
17#define atomic_set(v,i) ((v)->counter = (i)) 17#define atomic_set(v,i) ((v)->counter = (i))
diff --git a/arch/sh/mm/fault_32.c b/arch/sh/mm/fault_32.c
index 324eef93c900..e99b104d967a 100644
--- a/arch/sh/mm/fault_32.c
+++ b/arch/sh/mm/fault_32.c
@@ -86,7 +86,7 @@ static noinline int vmalloc_fault(unsigned long address)
86 pte_t *pte_k; 86 pte_t *pte_k;
87 87
88 /* Make sure we are in vmalloc/module/P3 area: */ 88 /* Make sure we are in vmalloc/module/P3 area: */
89 if (!(address >= VMALLOC_START && address < P3_ADDR_MAX)) 89 if (!(address >= P3SEG && address < P3_ADDR_MAX))
90 return -1; 90 return -1;
91 91
92 /* 92 /*
diff --git a/arch/sparc/kernel/central.c b/arch/sparc/kernel/central.c
index 38d48a59879c..9708851a8b9f 100644
--- a/arch/sparc/kernel/central.c
+++ b/arch/sparc/kernel/central.c
@@ -269,4 +269,4 @@ static int __init sunfire_init(void)
269 return 0; 269 return 0;
270} 270}
271 271
272subsys_initcall(sunfire_init); 272fs_initcall(sunfire_init);
diff --git a/arch/sparc/kernel/ds.c b/arch/sparc/kernel/ds.c
index fea13c7b1aee..b93c2c9ccb1d 100644
--- a/arch/sparc/kernel/ds.c
+++ b/arch/sparc/kernel/ds.c
@@ -1264,4 +1264,4 @@ static int __init ds_init(void)
1264 return vio_register_driver(&ds_driver); 1264 return vio_register_driver(&ds_driver);
1265} 1265}
1266 1266
1267subsys_initcall(ds_init); 1267fs_initcall(ds_init);
diff --git a/arch/sparc/kernel/leon_pci.c b/arch/sparc/kernel/leon_pci.c
index aba6b958b2a5..19f56058742b 100644
--- a/arch/sparc/kernel/leon_pci.c
+++ b/arch/sparc/kernel/leon_pci.c
@@ -45,7 +45,6 @@ void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info)
45 45
46void __devinit pcibios_fixup_bus(struct pci_bus *pbus) 46void __devinit pcibios_fixup_bus(struct pci_bus *pbus)
47{ 47{
48 struct leon_pci_info *info = pbus->sysdata;
49 struct pci_dev *dev; 48 struct pci_dev *dev;
50 int i, has_io, has_mem; 49 int i, has_io, has_mem;
51 u16 cmd; 50 u16 cmd;
@@ -111,18 +110,6 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
111 return pci_enable_resources(dev, mask); 110 return pci_enable_resources(dev, mask);
112} 111}
113 112
114struct device_node *pci_device_to_OF_node(struct pci_dev *pdev)
115{
116 /*
117 * Currently the OpenBoot nodes are not connected with the PCI device,
118 * this is because the LEON PROM does not create PCI nodes. Eventually
119 * this will change and the same approach as pcic.c can be used to
120 * match PROM nodes with pci devices.
121 */
122 return NULL;
123}
124EXPORT_SYMBOL(pci_device_to_OF_node);
125
126void __devinit pcibios_update_irq(struct pci_dev *dev, int irq) 113void __devinit pcibios_update_irq(struct pci_dev *dev, int irq)
127{ 114{
128#ifdef CONFIG_PCI_DEBUG 115#ifdef CONFIG_PCI_DEBUG
diff --git a/arch/sparc/kernel/leon_smp.c b/arch/sparc/kernel/leon_smp.c
index 1210fde18740..160cac9c4036 100644
--- a/arch/sparc/kernel/leon_smp.c
+++ b/arch/sparc/kernel/leon_smp.c
@@ -23,6 +23,7 @@
23#include <linux/pm.h> 23#include <linux/pm.h>
24#include <linux/delay.h> 24#include <linux/delay.h>
25#include <linux/gfp.h> 25#include <linux/gfp.h>
26#include <linux/cpu.h>
26 27
27#include <asm/cacheflush.h> 28#include <asm/cacheflush.h>
28#include <asm/tlbflush.h> 29#include <asm/tlbflush.h>
@@ -78,6 +79,8 @@ void __cpuinit leon_callin(void)
78 local_flush_tlb_all(); 79 local_flush_tlb_all();
79 leon_configure_cache_smp(); 80 leon_configure_cache_smp();
80 81
82 notify_cpu_starting(cpuid);
83
81 /* Get our local ticker going. */ 84 /* Get our local ticker going. */
82 smp_setup_percpu_timer(); 85 smp_setup_percpu_timer();
83 86
diff --git a/arch/sparc/kernel/rtrap_64.S b/arch/sparc/kernel/rtrap_64.S
index 77f1b95e0806..9171fc238def 100644
--- a/arch/sparc/kernel/rtrap_64.S
+++ b/arch/sparc/kernel/rtrap_64.S
@@ -20,11 +20,6 @@
20 20
21 .text 21 .text
22 .align 32 22 .align 32
23__handle_softirq:
24 call do_softirq
25 nop
26 ba,a,pt %xcc, __handle_softirq_continue
27 nop
28__handle_preemption: 23__handle_preemption:
29 call schedule 24 call schedule
30 wrpr %g0, RTRAP_PSTATE, %pstate 25 wrpr %g0, RTRAP_PSTATE, %pstate
@@ -89,9 +84,7 @@ rtrap:
89 cmp %l1, 0 84 cmp %l1, 0
90 85
91 /* mm/ultra.S:xcall_report_regs KNOWS about this load. */ 86 /* mm/ultra.S:xcall_report_regs KNOWS about this load. */
92 bne,pn %icc, __handle_softirq
93 ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1 87 ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
94__handle_softirq_continue:
95rtrap_xcall: 88rtrap_xcall:
96 sethi %hi(0xf << 20), %l4 89 sethi %hi(0xf << 20), %l4
97 and %l1, %l4, %l4 90 and %l1, %l4, %l4
diff --git a/arch/sparc/kernel/sys_sparc_64.c b/arch/sparc/kernel/sys_sparc_64.c
index 232df9949530..3ee51f189a55 100644
--- a/arch/sparc/kernel/sys_sparc_64.c
+++ b/arch/sparc/kernel/sys_sparc_64.c
@@ -566,15 +566,10 @@ out:
566 566
567SYSCALL_DEFINE2(64_munmap, unsigned long, addr, size_t, len) 567SYSCALL_DEFINE2(64_munmap, unsigned long, addr, size_t, len)
568{ 568{
569 long ret;
570
571 if (invalid_64bit_range(addr, len)) 569 if (invalid_64bit_range(addr, len))
572 return -EINVAL; 570 return -EINVAL;
573 571
574 down_write(&current->mm->mmap_sem); 572 return vm_munmap(addr, len);
575 ret = do_munmap(current->mm, addr, len);
576 up_write(&current->mm->mmap_sem);
577 return ret;
578} 573}
579 574
580extern unsigned long do_mremap(unsigned long addr, 575extern unsigned long do_mremap(unsigned long addr,
diff --git a/arch/sparc/mm/fault_32.c b/arch/sparc/mm/fault_32.c
index 7705c6731e28..df3155a17991 100644
--- a/arch/sparc/mm/fault_32.c
+++ b/arch/sparc/mm/fault_32.c
@@ -225,6 +225,8 @@ asmlinkage void do_sparc_fault(struct pt_regs *regs, int text_fault, int write,
225 unsigned long g2; 225 unsigned long g2;
226 int from_user = !(regs->psr & PSR_PS); 226 int from_user = !(regs->psr & PSR_PS);
227 int fault, code; 227 int fault, code;
228 unsigned int flags = (FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |
229 (write ? FAULT_FLAG_WRITE : 0));
228 230
229 if(text_fault) 231 if(text_fault)
230 address = regs->pc; 232 address = regs->pc;
@@ -251,6 +253,7 @@ asmlinkage void do_sparc_fault(struct pt_regs *regs, int text_fault, int write,
251 253
252 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address); 254 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);
253 255
256retry:
254 down_read(&mm->mmap_sem); 257 down_read(&mm->mmap_sem);
255 258
256 /* 259 /*
@@ -289,7 +292,11 @@ good_area:
289 * make sure we exit gracefully rather than endlessly redo 292 * make sure we exit gracefully rather than endlessly redo
290 * the fault. 293 * the fault.
291 */ 294 */
292 fault = handle_mm_fault(mm, vma, address, write ? FAULT_FLAG_WRITE : 0); 295 fault = handle_mm_fault(mm, vma, address, flags);
296
297 if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
298 return;
299
293 if (unlikely(fault & VM_FAULT_ERROR)) { 300 if (unlikely(fault & VM_FAULT_ERROR)) {
294 if (fault & VM_FAULT_OOM) 301 if (fault & VM_FAULT_OOM)
295 goto out_of_memory; 302 goto out_of_memory;
@@ -297,13 +304,29 @@ good_area:
297 goto do_sigbus; 304 goto do_sigbus;
298 BUG(); 305 BUG();
299 } 306 }
300 if (fault & VM_FAULT_MAJOR) { 307
301 current->maj_flt++; 308 if (flags & FAULT_FLAG_ALLOW_RETRY) {
302 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, regs, address); 309 if (fault & VM_FAULT_MAJOR) {
303 } else { 310 current->maj_flt++;
304 current->min_flt++; 311 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ,
305 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, regs, address); 312 1, regs, address);
313 } else {
314 current->min_flt++;
315 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN,
316 1, regs, address);
317 }
318 if (fault & VM_FAULT_RETRY) {
319 flags &= ~FAULT_FLAG_ALLOW_RETRY;
320
321 /* No need to up_read(&mm->mmap_sem) as we would
322 * have already released it in __lock_page_or_retry
323 * in mm/filemap.c.
324 */
325
326 goto retry;
327 }
306 } 328 }
329
307 up_read(&mm->mmap_sem); 330 up_read(&mm->mmap_sem);
308 return; 331 return;
309 332
diff --git a/arch/sparc/mm/fault_64.c b/arch/sparc/mm/fault_64.c
index 504c0622f729..1fe0429b6314 100644
--- a/arch/sparc/mm/fault_64.c
+++ b/arch/sparc/mm/fault_64.c
@@ -279,6 +279,7 @@ asmlinkage void __kprobes do_sparc64_fault(struct pt_regs *regs)
279 unsigned int insn = 0; 279 unsigned int insn = 0;
280 int si_code, fault_code, fault; 280 int si_code, fault_code, fault;
281 unsigned long address, mm_rss; 281 unsigned long address, mm_rss;
282 unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
282 283
283 fault_code = get_thread_fault_code(); 284 fault_code = get_thread_fault_code();
284 285
@@ -333,6 +334,8 @@ asmlinkage void __kprobes do_sparc64_fault(struct pt_regs *regs)
333 insn = get_fault_insn(regs, insn); 334 insn = get_fault_insn(regs, insn);
334 goto handle_kernel_fault; 335 goto handle_kernel_fault;
335 } 336 }
337
338retry:
336 down_read(&mm->mmap_sem); 339 down_read(&mm->mmap_sem);
337 } 340 }
338 341
@@ -423,7 +426,12 @@ good_area:
423 goto bad_area; 426 goto bad_area;
424 } 427 }
425 428
426 fault = handle_mm_fault(mm, vma, address, (fault_code & FAULT_CODE_WRITE) ? FAULT_FLAG_WRITE : 0); 429 flags |= ((fault_code & FAULT_CODE_WRITE) ? FAULT_FLAG_WRITE : 0);
430 fault = handle_mm_fault(mm, vma, address, flags);
431
432 if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
433 return;
434
427 if (unlikely(fault & VM_FAULT_ERROR)) { 435 if (unlikely(fault & VM_FAULT_ERROR)) {
428 if (fault & VM_FAULT_OOM) 436 if (fault & VM_FAULT_OOM)
429 goto out_of_memory; 437 goto out_of_memory;
@@ -431,12 +439,27 @@ good_area:
431 goto do_sigbus; 439 goto do_sigbus;
432 BUG(); 440 BUG();
433 } 441 }
434 if (fault & VM_FAULT_MAJOR) { 442
435 current->maj_flt++; 443 if (flags & FAULT_FLAG_ALLOW_RETRY) {
436 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, regs, address); 444 if (fault & VM_FAULT_MAJOR) {
437 } else { 445 current->maj_flt++;
438 current->min_flt++; 446 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ,
439 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, regs, address); 447 1, regs, address);
448 } else {
449 current->min_flt++;
450 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN,
451 1, regs, address);
452 }
453 if (fault & VM_FAULT_RETRY) {
454 flags &= ~FAULT_FLAG_ALLOW_RETRY;
455
456 /* No need to up_read(&mm->mmap_sem) as we would
457 * have already released it in __lock_page_or_retry
458 * in mm/filemap.c.
459 */
460
461 goto retry;
462 }
440 } 463 }
441 up_read(&mm->mmap_sem); 464 up_read(&mm->mmap_sem);
442 465
diff --git a/arch/sparc/mm/ultra.S b/arch/sparc/mm/ultra.S
index b57a5942ba64..874162a11ceb 100644
--- a/arch/sparc/mm/ultra.S
+++ b/arch/sparc/mm/ultra.S
@@ -495,11 +495,11 @@ xcall_fetch_glob_regs:
495 stx %o7, [%g1 + GR_SNAP_O7] 495 stx %o7, [%g1 + GR_SNAP_O7]
496 stx %i7, [%g1 + GR_SNAP_I7] 496 stx %i7, [%g1 + GR_SNAP_I7]
497 /* Don't try this at home kids... */ 497 /* Don't try this at home kids... */
498 rdpr %cwp, %g2 498 rdpr %cwp, %g3
499 sub %g2, 1, %g7 499 sub %g3, 1, %g7
500 wrpr %g7, %cwp 500 wrpr %g7, %cwp
501 mov %i7, %g7 501 mov %i7, %g7
502 wrpr %g2, %cwp 502 wrpr %g3, %cwp
503 stx %g7, [%g1 + GR_SNAP_RPC] 503 stx %g7, [%g1 + GR_SNAP_RPC]
504 sethi %hi(trap_block), %g7 504 sethi %hi(trap_block), %g7
505 or %g7, %lo(trap_block), %g7 505 or %g7, %lo(trap_block), %g7
diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig
index 96033e2d6845..74239dd77e06 100644
--- a/arch/tile/Kconfig
+++ b/arch/tile/Kconfig
@@ -11,6 +11,7 @@ config TILE
11 select GENERIC_IRQ_PROBE 11 select GENERIC_IRQ_PROBE
12 select GENERIC_PENDING_IRQ if SMP 12 select GENERIC_PENDING_IRQ if SMP
13 select GENERIC_IRQ_SHOW 13 select GENERIC_IRQ_SHOW
14 select HAVE_SYSCALL_WRAPPERS if TILEGX
14 select SYS_HYPERVISOR 15 select SYS_HYPERVISOR
15 select ARCH_HAVE_NMI_SAFE_CMPXCHG 16 select ARCH_HAVE_NMI_SAFE_CMPXCHG
16 17
diff --git a/arch/tile/include/asm/pci.h b/arch/tile/include/asm/pci.h
index 5d5a635530bd..32e6cbe8dff3 100644
--- a/arch/tile/include/asm/pci.h
+++ b/arch/tile/include/asm/pci.h
@@ -47,8 +47,8 @@ struct pci_controller {
47 */ 47 */
48#define PCI_DMA_BUS_IS_PHYS 1 48#define PCI_DMA_BUS_IS_PHYS 1
49 49
50int __devinit tile_pci_init(void); 50int __init tile_pci_init(void);
51int __devinit pcibios_init(void); 51int __init pcibios_init(void);
52 52
53static inline void pci_iounmap(struct pci_dev *dev, void __iomem *addr) {} 53static inline void pci_iounmap(struct pci_dev *dev, void __iomem *addr) {}
54 54
diff --git a/arch/tile/include/asm/thread_info.h b/arch/tile/include/asm/thread_info.h
index bc4f562bd459..7594764d8a69 100644
--- a/arch/tile/include/asm/thread_info.h
+++ b/arch/tile/include/asm/thread_info.h
@@ -100,9 +100,14 @@ extern void cpu_idle_on_new_stack(struct thread_info *old_ti,
100 100
101#else /* __ASSEMBLY__ */ 101#else /* __ASSEMBLY__ */
102 102
103/* how to get the thread information struct from ASM */ 103/*
104 * How to get the thread information struct from assembly.
105 * Note that we use different macros since different architectures
106 * have different semantics in their "mm" instruction and we would
107 * like to guarantee that the macro expands to exactly one instruction.
108 */
104#ifdef __tilegx__ 109#ifdef __tilegx__
105#define GET_THREAD_INFO(reg) move reg, sp; mm reg, zero, LOG2_THREAD_SIZE, 63 110#define EXTRACT_THREAD_INFO(reg) mm reg, zero, LOG2_THREAD_SIZE, 63
106#else 111#else
107#define GET_THREAD_INFO(reg) mm reg, sp, zero, LOG2_THREAD_SIZE, 31 112#define GET_THREAD_INFO(reg) mm reg, sp, zero, LOG2_THREAD_SIZE, 31
108#endif 113#endif
diff --git a/arch/tile/kernel/compat_signal.c b/arch/tile/kernel/compat_signal.c
index 77763ccd5a7d..cdef6e5ec022 100644
--- a/arch/tile/kernel/compat_signal.c
+++ b/arch/tile/kernel/compat_signal.c
@@ -403,19 +403,17 @@ int compat_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
403 * Set up registers for signal handler. 403 * Set up registers for signal handler.
404 * Registers that we don't modify keep the value they had from 404 * Registers that we don't modify keep the value they had from
405 * user-space at the time we took the signal. 405 * user-space at the time we took the signal.
406 * We always pass siginfo and mcontext, regardless of SA_SIGINFO,
407 * since some things rely on this (e.g. glibc's debug/segfault.c).
406 */ 408 */
407 regs->pc = ptr_to_compat_reg(ka->sa.sa_handler); 409 regs->pc = ptr_to_compat_reg(ka->sa.sa_handler);
408 regs->ex1 = PL_ICS_EX1(USER_PL, 1); /* set crit sec in handler */ 410 regs->ex1 = PL_ICS_EX1(USER_PL, 1); /* set crit sec in handler */
409 regs->sp = ptr_to_compat_reg(frame); 411 regs->sp = ptr_to_compat_reg(frame);
410 regs->lr = restorer; 412 regs->lr = restorer;
411 regs->regs[0] = (unsigned long) usig; 413 regs->regs[0] = (unsigned long) usig;
412 414 regs->regs[1] = ptr_to_compat_reg(&frame->info);
413 if (ka->sa.sa_flags & SA_SIGINFO) { 415 regs->regs[2] = ptr_to_compat_reg(&frame->uc);
414 /* Need extra arguments, so mark to restore caller-saves. */ 416 regs->flags |= PT_FLAGS_CALLER_SAVES;
415 regs->regs[1] = ptr_to_compat_reg(&frame->info);
416 regs->regs[2] = ptr_to_compat_reg(&frame->uc);
417 regs->flags |= PT_FLAGS_CALLER_SAVES;
418 }
419 417
420 /* 418 /*
421 * Notify any tracer that was single-stepping it. 419 * Notify any tracer that was single-stepping it.
diff --git a/arch/tile/kernel/intvec_32.S b/arch/tile/kernel/intvec_32.S
index 5d56a1ef5ba5..6943515100f8 100644
--- a/arch/tile/kernel/intvec_32.S
+++ b/arch/tile/kernel/intvec_32.S
@@ -839,6 +839,18 @@ STD_ENTRY(interrupt_return)
839 FEEDBACK_REENTER(interrupt_return) 839 FEEDBACK_REENTER(interrupt_return)
840 840
841 /* 841 /*
842 * Use r33 to hold whether we have already loaded the callee-saves
843 * into ptregs. We don't want to do it twice in this loop, since
844 * then we'd clobber whatever changes are made by ptrace, etc.
845 * Get base of stack in r32.
846 */
847 {
848 GET_THREAD_INFO(r32)
849 movei r33, 0
850 }
851
852.Lretry_work_pending:
853 /*
842 * Disable interrupts so as to make sure we don't 854 * Disable interrupts so as to make sure we don't
843 * miss an interrupt that sets any of the thread flags (like 855 * miss an interrupt that sets any of the thread flags (like
844 * need_resched or sigpending) between sampling and the iret. 856 * need_resched or sigpending) between sampling and the iret.
@@ -848,9 +860,6 @@ STD_ENTRY(interrupt_return)
848 IRQ_DISABLE(r20, r21) 860 IRQ_DISABLE(r20, r21)
849 TRACE_IRQS_OFF /* Note: clobbers registers r0-r29 */ 861 TRACE_IRQS_OFF /* Note: clobbers registers r0-r29 */
850 862
851 /* Get base of stack in r32; note r30/31 are used as arguments here. */
852 GET_THREAD_INFO(r32)
853
854 863
855 /* Check to see if there is any work to do before returning to user. */ 864 /* Check to see if there is any work to do before returning to user. */
856 { 865 {
@@ -866,16 +875,18 @@ STD_ENTRY(interrupt_return)
866 875
867 /* 876 /*
868 * Make sure we have all the registers saved for signal 877 * Make sure we have all the registers saved for signal
869 * handling or single-step. Call out to C code to figure out 878 * handling, notify-resume, or single-step. Call out to C
870 * exactly what we need to do for each flag bit, then if 879 * code to figure out exactly what we need to do for each flag bit,
871 * necessary, reload the flags and recheck. 880 * then if necessary, reload the flags and recheck.
872 */ 881 */
873 push_extra_callee_saves r0
874 { 882 {
875 PTREGS_PTR(r0, PTREGS_OFFSET_BASE) 883 PTREGS_PTR(r0, PTREGS_OFFSET_BASE)
876 jal do_work_pending 884 bnz r33, 1f
877 } 885 }
878 bnz r0, .Lresume_userspace 886 push_extra_callee_saves r0
887 movei r33, 1
8881: jal do_work_pending
889 bnz r0, .Lretry_work_pending
879 890
880 /* 891 /*
881 * In the NMI case we 892 * In the NMI case we
@@ -1180,10 +1191,12 @@ handle_syscall:
1180 add r20, r20, tp 1191 add r20, r20, tp
1181 lw r21, r20 1192 lw r21, r20
1182 addi r21, r21, 1 1193 addi r21, r21, 1
1183 sw r20, r21 1194 {
1195 sw r20, r21
1196 GET_THREAD_INFO(r31)
1197 }
1184 1198
1185 /* Trace syscalls, if requested. */ 1199 /* Trace syscalls, if requested. */
1186 GET_THREAD_INFO(r31)
1187 addi r31, r31, THREAD_INFO_FLAGS_OFFSET 1200 addi r31, r31, THREAD_INFO_FLAGS_OFFSET
1188 lw r30, r31 1201 lw r30, r31
1189 andi r30, r30, _TIF_SYSCALL_TRACE 1202 andi r30, r30, _TIF_SYSCALL_TRACE
@@ -1362,7 +1375,10 @@ handle_ill:
13623: 13753:
1363 /* set PC and continue */ 1376 /* set PC and continue */
1364 lw r26, r24 1377 lw r26, r24
1365 sw r28, r26 1378 {
1379 sw r28, r26
1380 GET_THREAD_INFO(r0)
1381 }
1366 1382
1367 /* 1383 /*
1368 * Clear TIF_SINGLESTEP to prevent recursion if we execute an ill. 1384 * Clear TIF_SINGLESTEP to prevent recursion if we execute an ill.
@@ -1370,7 +1386,6 @@ handle_ill:
1370 * need to clear it here and can't really impose on all other arches. 1386 * need to clear it here and can't really impose on all other arches.
1371 * So what's another write between friends? 1387 * So what's another write between friends?
1372 */ 1388 */
1373 GET_THREAD_INFO(r0)
1374 1389
1375 addi r1, r0, THREAD_INFO_FLAGS_OFFSET 1390 addi r1, r0, THREAD_INFO_FLAGS_OFFSET
1376 { 1391 {
diff --git a/arch/tile/kernel/intvec_64.S b/arch/tile/kernel/intvec_64.S
index 49d9d6621682..30ae76e50c44 100644
--- a/arch/tile/kernel/intvec_64.S
+++ b/arch/tile/kernel/intvec_64.S
@@ -647,6 +647,20 @@ STD_ENTRY(interrupt_return)
647 FEEDBACK_REENTER(interrupt_return) 647 FEEDBACK_REENTER(interrupt_return)
648 648
649 /* 649 /*
650 * Use r33 to hold whether we have already loaded the callee-saves
651 * into ptregs. We don't want to do it twice in this loop, since
652 * then we'd clobber whatever changes are made by ptrace, etc.
653 */
654 {
655 movei r33, 0
656 move r32, sp
657 }
658
659 /* Get base of stack in r32. */
660 EXTRACT_THREAD_INFO(r32)
661
662.Lretry_work_pending:
663 /*
650 * Disable interrupts so as to make sure we don't 664 * Disable interrupts so as to make sure we don't
651 * miss an interrupt that sets any of the thread flags (like 665 * miss an interrupt that sets any of the thread flags (like
652 * need_resched or sigpending) between sampling and the iret. 666 * need_resched or sigpending) between sampling and the iret.
@@ -656,9 +670,6 @@ STD_ENTRY(interrupt_return)
656 IRQ_DISABLE(r20, r21) 670 IRQ_DISABLE(r20, r21)
657 TRACE_IRQS_OFF /* Note: clobbers registers r0-r29 */ 671 TRACE_IRQS_OFF /* Note: clobbers registers r0-r29 */
658 672
659 /* Get base of stack in r32; note r30/31 are used as arguments here. */
660 GET_THREAD_INFO(r32)
661
662 673
663 /* Check to see if there is any work to do before returning to user. */ 674 /* Check to see if there is any work to do before returning to user. */
664 { 675 {
@@ -674,16 +685,18 @@ STD_ENTRY(interrupt_return)
674 685
675 /* 686 /*
676 * Make sure we have all the registers saved for signal 687 * Make sure we have all the registers saved for signal
677 * handling or single-step. Call out to C code to figure out 688 * handling or notify-resume. Call out to C code to figure out
678 * exactly what we need to do for each flag bit, then if 689 * exactly what we need to do for each flag bit, then if
679 * necessary, reload the flags and recheck. 690 * necessary, reload the flags and recheck.
680 */ 691 */
681 push_extra_callee_saves r0
682 { 692 {
683 PTREGS_PTR(r0, PTREGS_OFFSET_BASE) 693 PTREGS_PTR(r0, PTREGS_OFFSET_BASE)
684 jal do_work_pending 694 bnez r33, 1f
685 } 695 }
686 bnez r0, .Lresume_userspace 696 push_extra_callee_saves r0
697 movei r33, 1
6981: jal do_work_pending
699 bnez r0, .Lretry_work_pending
687 700
688 /* 701 /*
689 * In the NMI case we 702 * In the NMI case we
@@ -968,11 +981,16 @@ handle_syscall:
968 shl16insli r20, r20, hw0(irq_stat + IRQ_CPUSTAT_SYSCALL_COUNT_OFFSET) 981 shl16insli r20, r20, hw0(irq_stat + IRQ_CPUSTAT_SYSCALL_COUNT_OFFSET)
969 add r20, r20, tp 982 add r20, r20, tp
970 ld4s r21, r20 983 ld4s r21, r20
971 addi r21, r21, 1 984 {
972 st4 r20, r21 985 addi r21, r21, 1
986 move r31, sp
987 }
988 {
989 st4 r20, r21
990 EXTRACT_THREAD_INFO(r31)
991 }
973 992
974 /* Trace syscalls, if requested. */ 993 /* Trace syscalls, if requested. */
975 GET_THREAD_INFO(r31)
976 addi r31, r31, THREAD_INFO_FLAGS_OFFSET 994 addi r31, r31, THREAD_INFO_FLAGS_OFFSET
977 ld r30, r31 995 ld r30, r31
978 andi r30, r30, _TIF_SYSCALL_TRACE 996 andi r30, r30, _TIF_SYSCALL_TRACE
diff --git a/arch/tile/kernel/pci.c b/arch/tile/kernel/pci.c
index a1bb59eecc18..b56d12bf5900 100644
--- a/arch/tile/kernel/pci.c
+++ b/arch/tile/kernel/pci.c
@@ -141,7 +141,7 @@ static int __devinit tile_init_irqs(int controller_id,
141 * 141 *
142 * Returns the number of controllers discovered. 142 * Returns the number of controllers discovered.
143 */ 143 */
144int __devinit tile_pci_init(void) 144int __init tile_pci_init(void)
145{ 145{
146 int i; 146 int i;
147 147
@@ -287,7 +287,7 @@ static void __devinit fixup_read_and_payload_sizes(void)
287 * The controllers have been set up by the time we get here, by a call to 287 * The controllers have been set up by the time we get here, by a call to
288 * tile_pci_init. 288 * tile_pci_init.
289 */ 289 */
290int __devinit pcibios_init(void) 290int __init pcibios_init(void)
291{ 291{
292 int i; 292 int i;
293 293
diff --git a/arch/tile/kernel/proc.c b/arch/tile/kernel/proc.c
index 7a9327046404..446a7f52cc11 100644
--- a/arch/tile/kernel/proc.c
+++ b/arch/tile/kernel/proc.c
@@ -146,7 +146,6 @@ static ctl_table unaligned_table[] = {
146 }, 146 },
147 {} 147 {}
148}; 148};
149#endif
150 149
151static struct ctl_path tile_path[] = { 150static struct ctl_path tile_path[] = {
152 { .procname = "tile" }, 151 { .procname = "tile" },
@@ -155,10 +154,9 @@ static struct ctl_path tile_path[] = {
155 154
156static int __init proc_sys_tile_init(void) 155static int __init proc_sys_tile_init(void)
157{ 156{
158#ifndef __tilegx__ /* FIXME: GX: no support for unaligned access yet */
159 register_sysctl_paths(tile_path, unaligned_table); 157 register_sysctl_paths(tile_path, unaligned_table);
160#endif
161 return 0; 158 return 0;
162} 159}
163 160
164arch_initcall(proc_sys_tile_init); 161arch_initcall(proc_sys_tile_init);
162#endif
diff --git a/arch/tile/kernel/process.c b/arch/tile/kernel/process.c
index 2d5ef617bb39..54e6c64b85cc 100644
--- a/arch/tile/kernel/process.c
+++ b/arch/tile/kernel/process.c
@@ -567,6 +567,10 @@ struct task_struct *__sched _switch_to(struct task_struct *prev,
567 */ 567 */
568int do_work_pending(struct pt_regs *regs, u32 thread_info_flags) 568int do_work_pending(struct pt_regs *regs, u32 thread_info_flags)
569{ 569{
570 /* If we enter in kernel mode, do nothing and exit the caller loop. */
571 if (!user_mode(regs))
572 return 0;
573
570 if (thread_info_flags & _TIF_NEED_RESCHED) { 574 if (thread_info_flags & _TIF_NEED_RESCHED) {
571 schedule(); 575 schedule();
572 return 1; 576 return 1;
@@ -589,8 +593,7 @@ int do_work_pending(struct pt_regs *regs, u32 thread_info_flags)
589 return 1; 593 return 1;
590 } 594 }
591 if (thread_info_flags & _TIF_SINGLESTEP) { 595 if (thread_info_flags & _TIF_SINGLESTEP) {
592 if ((regs->ex1 & SPR_EX_CONTEXT_1_1__PL_MASK) == 0) 596 single_step_once(regs);
593 single_step_once(regs);
594 return 0; 597 return 0;
595 } 598 }
596 panic("work_pending: bad flags %#x\n", thread_info_flags); 599 panic("work_pending: bad flags %#x\n", thread_info_flags);
diff --git a/arch/tile/kernel/single_step.c b/arch/tile/kernel/single_step.c
index 9efbc1391b3c..89529c9f0605 100644
--- a/arch/tile/kernel/single_step.c
+++ b/arch/tile/kernel/single_step.c
@@ -346,12 +346,10 @@ void single_step_once(struct pt_regs *regs)
346 } 346 }
347 347
348 /* allocate a cache line of writable, executable memory */ 348 /* allocate a cache line of writable, executable memory */
349 down_write(&current->mm->mmap_sem); 349 buffer = (void __user *) vm_mmap(NULL, 0, 64,
350 buffer = (void __user *) do_mmap(NULL, 0, 64,
351 PROT_EXEC | PROT_READ | PROT_WRITE, 350 PROT_EXEC | PROT_READ | PROT_WRITE,
352 MAP_PRIVATE | MAP_ANONYMOUS, 351 MAP_PRIVATE | MAP_ANONYMOUS,
353 0); 352 0);
354 up_write(&current->mm->mmap_sem);
355 353
356 if (IS_ERR((void __force *)buffer)) { 354 if (IS_ERR((void __force *)buffer)) {
357 kfree(state); 355 kfree(state);
diff --git a/arch/tile/kernel/smpboot.c b/arch/tile/kernel/smpboot.c
index b949edcec200..172aef7d3159 100644
--- a/arch/tile/kernel/smpboot.c
+++ b/arch/tile/kernel/smpboot.c
@@ -196,6 +196,8 @@ void __cpuinit online_secondary(void)
196 /* This must be done before setting cpu_online_mask */ 196 /* This must be done before setting cpu_online_mask */
197 wmb(); 197 wmb();
198 198
199 notify_cpu_starting(smp_processor_id());
200
199 /* 201 /*
200 * We need to hold call_lock, so there is no inconsistency 202 * We need to hold call_lock, so there is no inconsistency
201 * between the time smp_call_function() determines number of 203 * between the time smp_call_function() determines number of
diff --git a/arch/um/drivers/cow.h b/arch/um/drivers/cow.h
index dc36b222100b..6673508f3426 100644
--- a/arch/um/drivers/cow.h
+++ b/arch/um/drivers/cow.h
@@ -3,41 +3,6 @@
3 3
4#include <asm/types.h> 4#include <asm/types.h>
5 5
6#if defined(__KERNEL__)
7
8# include <asm/byteorder.h>
9
10# if defined(__BIG_ENDIAN)
11# define ntohll(x) (x)
12# define htonll(x) (x)
13# elif defined(__LITTLE_ENDIAN)
14# define ntohll(x) be64_to_cpu(x)
15# define htonll(x) cpu_to_be64(x)
16# else
17# error "Could not determine byte order"
18# endif
19
20#else
21/* For the definition of ntohl, htonl and __BYTE_ORDER */
22#include <endian.h>
23#include <netinet/in.h>
24#if defined(__BYTE_ORDER)
25
26# if __BYTE_ORDER == __BIG_ENDIAN
27# define ntohll(x) (x)
28# define htonll(x) (x)
29# elif __BYTE_ORDER == __LITTLE_ENDIAN
30# define ntohll(x) bswap_64(x)
31# define htonll(x) bswap_64(x)
32# else
33# error "Could not determine byte order: __BYTE_ORDER uncorrectly defined"
34# endif
35
36#else /* ! defined(__BYTE_ORDER) */
37# error "Could not determine byte order: __BYTE_ORDER not defined"
38#endif
39#endif /* ! defined(__KERNEL__) */
40
41extern int init_cow_file(int fd, char *cow_file, char *backing_file, 6extern int init_cow_file(int fd, char *cow_file, char *backing_file,
42 int sectorsize, int alignment, int *bitmap_offset_out, 7 int sectorsize, int alignment, int *bitmap_offset_out,
43 unsigned long *bitmap_len_out, int *data_offset_out); 8 unsigned long *bitmap_len_out, int *data_offset_out);
diff --git a/arch/um/drivers/cow_user.c b/arch/um/drivers/cow_user.c
index 9cbb426c0b91..0ee9cc6cc4c7 100644
--- a/arch/um/drivers/cow_user.c
+++ b/arch/um/drivers/cow_user.c
@@ -8,11 +8,10 @@
8 * that. 8 * that.
9 */ 9 */
10#include <unistd.h> 10#include <unistd.h>
11#include <byteswap.h>
12#include <errno.h> 11#include <errno.h>
13#include <string.h> 12#include <string.h>
14#include <arpa/inet.h> 13#include <arpa/inet.h>
15#include <asm/types.h> 14#include <endian.h>
16#include "cow.h" 15#include "cow.h"
17#include "cow_sys.h" 16#include "cow_sys.h"
18 17
@@ -214,8 +213,8 @@ int write_cow_header(char *cow_file, int fd, char *backing_file,
214 "header\n"); 213 "header\n");
215 goto out; 214 goto out;
216 } 215 }
217 header->magic = htonl(COW_MAGIC); 216 header->magic = htobe32(COW_MAGIC);
218 header->version = htonl(COW_VERSION); 217 header->version = htobe32(COW_VERSION);
219 218
220 err = -EINVAL; 219 err = -EINVAL;
221 if (strlen(backing_file) > sizeof(header->backing_file) - 1) { 220 if (strlen(backing_file) > sizeof(header->backing_file) - 1) {
@@ -246,10 +245,10 @@ int write_cow_header(char *cow_file, int fd, char *backing_file,
246 goto out_free; 245 goto out_free;
247 } 246 }
248 247
249 header->mtime = htonl(modtime); 248 header->mtime = htobe32(modtime);
250 header->size = htonll(*size); 249 header->size = htobe64(*size);
251 header->sectorsize = htonl(sectorsize); 250 header->sectorsize = htobe32(sectorsize);
252 header->alignment = htonl(alignment); 251 header->alignment = htobe32(alignment);
253 header->cow_format = COW_BITMAP; 252 header->cow_format = COW_BITMAP;
254 253
255 err = cow_write_file(fd, header, sizeof(*header)); 254 err = cow_write_file(fd, header, sizeof(*header));
@@ -301,8 +300,8 @@ int read_cow_header(int (*reader)(__u64, char *, int, void *), void *arg,
301 magic = header->v1.magic; 300 magic = header->v1.magic;
302 if (magic == COW_MAGIC) 301 if (magic == COW_MAGIC)
303 version = header->v1.version; 302 version = header->v1.version;
304 else if (magic == ntohl(COW_MAGIC)) 303 else if (magic == be32toh(COW_MAGIC))
305 version = ntohl(header->v1.version); 304 version = be32toh(header->v1.version);
306 /* No error printed because the non-COW case comes through here */ 305 /* No error printed because the non-COW case comes through here */
307 else goto out; 306 else goto out;
308 307
@@ -327,9 +326,9 @@ int read_cow_header(int (*reader)(__u64, char *, int, void *), void *arg,
327 "header\n"); 326 "header\n");
328 goto out; 327 goto out;
329 } 328 }
330 *mtime_out = ntohl(header->v2.mtime); 329 *mtime_out = be32toh(header->v2.mtime);
331 *size_out = ntohll(header->v2.size); 330 *size_out = be64toh(header->v2.size);
332 *sectorsize_out = ntohl(header->v2.sectorsize); 331 *sectorsize_out = be32toh(header->v2.sectorsize);
333 *bitmap_offset_out = sizeof(header->v2); 332 *bitmap_offset_out = sizeof(header->v2);
334 *align_out = *sectorsize_out; 333 *align_out = *sectorsize_out;
335 file = header->v2.backing_file; 334 file = header->v2.backing_file;
@@ -341,10 +340,10 @@ int read_cow_header(int (*reader)(__u64, char *, int, void *), void *arg,
341 "header\n"); 340 "header\n");
342 goto out; 341 goto out;
343 } 342 }
344 *mtime_out = ntohl(header->v3.mtime); 343 *mtime_out = be32toh(header->v3.mtime);
345 *size_out = ntohll(header->v3.size); 344 *size_out = be64toh(header->v3.size);
346 *sectorsize_out = ntohl(header->v3.sectorsize); 345 *sectorsize_out = be32toh(header->v3.sectorsize);
347 *align_out = ntohl(header->v3.alignment); 346 *align_out = be32toh(header->v3.alignment);
348 if (*align_out == 0) { 347 if (*align_out == 0) {
349 cow_printf("read_cow_header - invalid COW header, " 348 cow_printf("read_cow_header - invalid COW header, "
350 "align == 0\n"); 349 "align == 0\n");
@@ -366,16 +365,16 @@ int read_cow_header(int (*reader)(__u64, char *, int, void *), void *arg,
366 * this was used until Dec2005 - 64bits are needed to represent 365 * this was used until Dec2005 - 64bits are needed to represent
367 * 2038+. I.e. we can safely do this truncating cast. 366 * 2038+. I.e. we can safely do this truncating cast.
368 * 367 *
369 * Additionally, we must use ntohl() instead of ntohll(), since 368 * Additionally, we must use be32toh() instead of be64toh(), since
370 * the program used to use the former (tested - I got mtime 369 * the program used to use the former (tested - I got mtime
371 * mismatch "0 vs whatever"). 370 * mismatch "0 vs whatever").
372 * 371 *
373 * Ever heard about bug-to-bug-compatibility ? ;-) */ 372 * Ever heard about bug-to-bug-compatibility ? ;-) */
374 *mtime_out = (time32_t) ntohl(header->v3_b.mtime); 373 *mtime_out = (time32_t) be32toh(header->v3_b.mtime);
375 374
376 *size_out = ntohll(header->v3_b.size); 375 *size_out = be64toh(header->v3_b.size);
377 *sectorsize_out = ntohl(header->v3_b.sectorsize); 376 *sectorsize_out = be32toh(header->v3_b.sectorsize);
378 *align_out = ntohl(header->v3_b.alignment); 377 *align_out = be32toh(header->v3_b.alignment);
379 if (*align_out == 0) { 378 if (*align_out == 0) {
380 cow_printf("read_cow_header - invalid COW header, " 379 cow_printf("read_cow_header - invalid COW header, "
381 "align == 0\n"); 380 "align == 0\n");
diff --git a/arch/um/drivers/mconsole_kern.c b/arch/um/drivers/mconsole_kern.c
index e672bd6d43e3..43b39d61b538 100644
--- a/arch/um/drivers/mconsole_kern.c
+++ b/arch/um/drivers/mconsole_kern.c
@@ -22,6 +22,7 @@
22#include <linux/workqueue.h> 22#include <linux/workqueue.h>
23#include <linux/mutex.h> 23#include <linux/mutex.h>
24#include <asm/uaccess.h> 24#include <asm/uaccess.h>
25#include <asm/switch_to.h>
25 26
26#include "init.h" 27#include "init.h"
27#include "irq_kern.h" 28#include "irq_kern.h"
diff --git a/arch/um/include/asm/Kbuild b/arch/um/include/asm/Kbuild
index 8419f5cf2ac7..fff24352255d 100644
--- a/arch/um/include/asm/Kbuild
+++ b/arch/um/include/asm/Kbuild
@@ -1,3 +1,4 @@
1generic-y += bug.h cputime.h device.h emergency-restart.h futex.h hardirq.h 1generic-y += bug.h cputime.h device.h emergency-restart.h futex.h hardirq.h
2generic-y += hw_irq.h irq_regs.h kdebug.h percpu.h sections.h topology.h xor.h 2generic-y += hw_irq.h irq_regs.h kdebug.h percpu.h sections.h topology.h xor.h
3generic-y += ftrace.h pci.h io.h param.h delay.h mutex.h current.h 3generic-y += ftrace.h pci.h io.h param.h delay.h mutex.h current.h exec.h
4generic-y += switch_to.h
diff --git a/arch/um/kernel/Makefile b/arch/um/kernel/Makefile
index 492bc4c1b62b..65a1c3d690ea 100644
--- a/arch/um/kernel/Makefile
+++ b/arch/um/kernel/Makefile
@@ -3,9 +3,10 @@
3# Licensed under the GPL 3# Licensed under the GPL
4# 4#
5 5
6CPPFLAGS_vmlinux.lds := -DSTART=$(LDS_START) \ 6CPPFLAGS_vmlinux.lds := -DSTART=$(LDS_START) \
7 -DELF_ARCH=$(LDS_ELF_ARCH) \ 7 -DELF_ARCH=$(LDS_ELF_ARCH) \
8 -DELF_FORMAT=$(LDS_ELF_FORMAT) 8 -DELF_FORMAT=$(LDS_ELF_FORMAT) \
9 $(LDS_EXTRA)
9extra-y := vmlinux.lds 10extra-y := vmlinux.lds
10clean-files := 11clean-files :=
11 12
diff --git a/arch/um/kernel/process.c b/arch/um/kernel/process.c
index f386d04a84a5..2b73dedb44ca 100644
--- a/arch/um/kernel/process.c
+++ b/arch/um/kernel/process.c
@@ -88,11 +88,8 @@ static inline void set_current(struct task_struct *task)
88 88
89extern void arch_switch_to(struct task_struct *to); 89extern void arch_switch_to(struct task_struct *to);
90 90
91void *_switch_to(void *prev, void *next, void *last) 91void *__switch_to(struct task_struct *from, struct task_struct *to)
92{ 92{
93 struct task_struct *from = prev;
94 struct task_struct *to = next;
95
96 to->thread.prev_sched = from; 93 to->thread.prev_sched = from;
97 set_current(to); 94 set_current(to);
98 95
@@ -111,7 +108,6 @@ void *_switch_to(void *prev, void *next, void *last)
111 } while (current->thread.saved_task); 108 } while (current->thread.saved_task);
112 109
113 return current->thread.prev_sched; 110 return current->thread.prev_sched;
114
115} 111}
116 112
117void interrupt_end(void) 113void interrupt_end(void)
diff --git a/arch/um/kernel/skas/mmu.c b/arch/um/kernel/skas/mmu.c
index 4947b319f53a..0a49ef0c2bf4 100644
--- a/arch/um/kernel/skas/mmu.c
+++ b/arch/um/kernel/skas/mmu.c
@@ -103,7 +103,6 @@ int init_new_context(struct task_struct *task, struct mm_struct *mm)
103 103
104void uml_setup_stubs(struct mm_struct *mm) 104void uml_setup_stubs(struct mm_struct *mm)
105{ 105{
106 struct page **pages;
107 int err, ret; 106 int err, ret;
108 107
109 if (!skas_needs_stub) 108 if (!skas_needs_stub)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 1d14cc6b79ad..c9866b0b77d8 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -81,7 +81,7 @@ config X86
81 select CLKEVT_I8253 81 select CLKEVT_I8253
82 select ARCH_HAVE_NMI_SAFE_CMPXCHG 82 select ARCH_HAVE_NMI_SAFE_CMPXCHG
83 select GENERIC_IOMAP 83 select GENERIC_IOMAP
84 select DCACHE_WORD_ACCESS if !DEBUG_PAGEALLOC 84 select DCACHE_WORD_ACCESS
85 85
86config INSTRUCTION_DECODER 86config INSTRUCTION_DECODER
87 def_bool (KPROBES || PERF_EVENTS) 87 def_bool (KPROBES || PERF_EVENTS)
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index 41a7237606a3..94e91e401da9 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -134,6 +134,9 @@ KBUILD_CFLAGS += $(call cc-option,-mno-avx,)
134KBUILD_CFLAGS += $(mflags-y) 134KBUILD_CFLAGS += $(mflags-y)
135KBUILD_AFLAGS += $(mflags-y) 135KBUILD_AFLAGS += $(mflags-y)
136 136
137archscripts:
138 $(Q)$(MAKE) $(build)=arch/x86/tools relocs
139
137### 140###
138# Syscall table generation 141# Syscall table generation
139 142
diff --git a/arch/x86/Makefile.um b/arch/x86/Makefile.um
index 4be406abeefd..36b62bc52638 100644
--- a/arch/x86/Makefile.um
+++ b/arch/x86/Makefile.um
@@ -14,6 +14,9 @@ LINK-y += $(call cc-option,-m32)
14 14
15export LDFLAGS 15export LDFLAGS
16 16
17LDS_EXTRA := -Ui386
18export LDS_EXTRA
19
17# First of all, tune CFLAGS for the specific CPU. This actually sets cflags-y. 20# First of all, tune CFLAGS for the specific CPU. This actually sets cflags-y.
18include $(srctree)/arch/x86/Makefile_32.cpu 21include $(srctree)/arch/x86/Makefile_32.cpu
19 22
diff --git a/arch/x86/boot/compressed/Makefile b/arch/x86/boot/compressed/Makefile
index fd55a2ff3ad8..e398bb5d63bb 100644
--- a/arch/x86/boot/compressed/Makefile
+++ b/arch/x86/boot/compressed/Makefile
@@ -40,13 +40,12 @@ OBJCOPYFLAGS_vmlinux.bin := -R .comment -S
40$(obj)/vmlinux.bin: vmlinux FORCE 40$(obj)/vmlinux.bin: vmlinux FORCE
41 $(call if_changed,objcopy) 41 $(call if_changed,objcopy)
42 42
43targets += vmlinux.bin.all vmlinux.relocs
43 44
44targets += vmlinux.bin.all vmlinux.relocs relocs 45CMD_RELOCS = arch/x86/tools/relocs
45hostprogs-$(CONFIG_X86_NEED_RELOCS) += relocs
46
47quiet_cmd_relocs = RELOCS $@ 46quiet_cmd_relocs = RELOCS $@
48 cmd_relocs = $(obj)/relocs $< > $@;$(obj)/relocs --abs-relocs $< 47 cmd_relocs = $(CMD_RELOCS) $< > $@;$(CMD_RELOCS) --abs-relocs $<
49$(obj)/vmlinux.relocs: vmlinux $(obj)/relocs FORCE 48$(obj)/vmlinux.relocs: vmlinux FORCE
50 $(call if_changed,relocs) 49 $(call if_changed,relocs)
51 50
52vmlinux.bin.all-y := $(obj)/vmlinux.bin 51vmlinux.bin.all-y := $(obj)/vmlinux.bin
diff --git a/arch/x86/boot/compressed/head_32.S b/arch/x86/boot/compressed/head_32.S
index a0559930a180..c85e3ac99bba 100644
--- a/arch/x86/boot/compressed/head_32.S
+++ b/arch/x86/boot/compressed/head_32.S
@@ -33,6 +33,9 @@
33 __HEAD 33 __HEAD
34ENTRY(startup_32) 34ENTRY(startup_32)
35#ifdef CONFIG_EFI_STUB 35#ifdef CONFIG_EFI_STUB
36 jmp preferred_addr
37
38 .balign 0x10
36 /* 39 /*
37 * We don't need the return address, so set up the stack so 40 * We don't need the return address, so set up the stack so
38 * efi_main() can find its arugments. 41 * efi_main() can find its arugments.
@@ -41,12 +44,17 @@ ENTRY(startup_32)
41 44
42 call efi_main 45 call efi_main
43 cmpl $0, %eax 46 cmpl $0, %eax
44 je preferred_addr
45 movl %eax, %esi 47 movl %eax, %esi
46 call 1f 48 jne 2f
471: 491:
50 /* EFI init failed, so hang. */
51 hlt
52 jmp 1b
532:
54 call 3f
553:
48 popl %eax 56 popl %eax
49 subl $1b, %eax 57 subl $3b, %eax
50 subl BP_pref_address(%esi), %eax 58 subl BP_pref_address(%esi), %eax
51 add BP_code32_start(%esi), %eax 59 add BP_code32_start(%esi), %eax
52 leal preferred_addr(%eax), %eax 60 leal preferred_addr(%eax), %eax
diff --git a/arch/x86/boot/compressed/head_64.S b/arch/x86/boot/compressed/head_64.S
index 558d76ce23bc..87e03a13d8e3 100644
--- a/arch/x86/boot/compressed/head_64.S
+++ b/arch/x86/boot/compressed/head_64.S
@@ -200,18 +200,28 @@ ENTRY(startup_64)
200 * entire text+data+bss and hopefully all of memory. 200 * entire text+data+bss and hopefully all of memory.
201 */ 201 */
202#ifdef CONFIG_EFI_STUB 202#ifdef CONFIG_EFI_STUB
203 pushq %rsi 203 /*
204 * The entry point for the PE/COFF executable is 0x210, so only
205 * legacy boot loaders will execute this jmp.
206 */
207 jmp preferred_addr
208
209 .org 0x210
204 mov %rcx, %rdi 210 mov %rcx, %rdi
205 mov %rdx, %rsi 211 mov %rdx, %rsi
206 call efi_main 212 call efi_main
207 popq %rsi
208 cmpq $0,%rax
209 je preferred_addr
210 movq %rax,%rsi 213 movq %rax,%rsi
211 call 1f 214 cmpq $0,%rax
215 jne 2f
2121: 2161:
217 /* EFI init failed, so hang. */
218 hlt
219 jmp 1b
2202:
221 call 3f
2223:
213 popq %rax 223 popq %rax
214 subq $1b, %rax 224 subq $3b, %rax
215 subq BP_pref_address(%rsi), %rax 225 subq BP_pref_address(%rsi), %rax
216 add BP_code32_start(%esi), %eax 226 add BP_code32_start(%esi), %eax
217 leaq preferred_addr(%rax), %rax 227 leaq preferred_addr(%rax), %rax
diff --git a/arch/x86/boot/tools/build.c b/arch/x86/boot/tools/build.c
index ed549767a231..24443a332083 100644
--- a/arch/x86/boot/tools/build.c
+++ b/arch/x86/boot/tools/build.c
@@ -205,8 +205,13 @@ int main(int argc, char ** argv)
205 put_unaligned_le32(file_sz, &buf[pe_header + 0x50]); 205 put_unaligned_le32(file_sz, &buf[pe_header + 0x50]);
206 206
207#ifdef CONFIG_X86_32 207#ifdef CONFIG_X86_32
208 /* Address of entry point */ 208 /*
209 put_unaligned_le32(i, &buf[pe_header + 0x28]); 209 * Address of entry point.
210 *
211 * The EFI stub entry point is +16 bytes from the start of
212 * the .text section.
213 */
214 put_unaligned_le32(i + 16, &buf[pe_header + 0x28]);
210 215
211 /* .text size */ 216 /* .text size */
212 put_unaligned_le32(file_sz, &buf[pe_header + 0xb0]); 217 put_unaligned_le32(file_sz, &buf[pe_header + 0xb0]);
@@ -217,9 +222,11 @@ int main(int argc, char ** argv)
217 /* 222 /*
218 * Address of entry point. startup_32 is at the beginning and 223 * Address of entry point. startup_32 is at the beginning and
219 * the 64-bit entry point (startup_64) is always 512 bytes 224 * the 64-bit entry point (startup_64) is always 512 bytes
220 * after. 225 * after. The EFI stub entry point is 16 bytes after that, as
226 * the first instruction allows legacy loaders to jump over
227 * the EFI stub initialisation
221 */ 228 */
222 put_unaligned_le32(i + 512, &buf[pe_header + 0x28]); 229 put_unaligned_le32(i + 528, &buf[pe_header + 0x28]);
223 230
224 /* .text size */ 231 /* .text size */
225 put_unaligned_le32(file_sz, &buf[pe_header + 0xc0]); 232 put_unaligned_le32(file_sz, &buf[pe_header + 0xc0]);
diff --git a/arch/x86/ia32/ia32_aout.c b/arch/x86/ia32/ia32_aout.c
index d511d951a052..07b3a68d2d29 100644
--- a/arch/x86/ia32/ia32_aout.c
+++ b/arch/x86/ia32/ia32_aout.c
@@ -119,9 +119,7 @@ static void set_brk(unsigned long start, unsigned long end)
119 end = PAGE_ALIGN(end); 119 end = PAGE_ALIGN(end);
120 if (end <= start) 120 if (end <= start)
121 return; 121 return;
122 down_write(&current->mm->mmap_sem); 122 vm_brk(start, end - start);
123 do_brk(start, end - start);
124 up_write(&current->mm->mmap_sem);
125} 123}
126 124
127#ifdef CORE_DUMP 125#ifdef CORE_DUMP
@@ -296,8 +294,7 @@ static int load_aout_binary(struct linux_binprm *bprm, struct pt_regs *regs)
296 294
297 /* OK, This is the point of no return */ 295 /* OK, This is the point of no return */
298 set_personality(PER_LINUX); 296 set_personality(PER_LINUX);
299 set_thread_flag(TIF_IA32); 297 set_personality_ia32(false);
300 current->mm->context.ia32_compat = 1;
301 298
302 setup_new_exec(bprm); 299 setup_new_exec(bprm);
303 300
@@ -332,9 +329,7 @@ static int load_aout_binary(struct linux_binprm *bprm, struct pt_regs *regs)
332 pos = 32; 329 pos = 32;
333 map_size = ex.a_text+ex.a_data; 330 map_size = ex.a_text+ex.a_data;
334 331
335 down_write(&current->mm->mmap_sem); 332 error = vm_brk(text_addr & PAGE_MASK, map_size);
336 error = do_brk(text_addr & PAGE_MASK, map_size);
337 up_write(&current->mm->mmap_sem);
338 333
339 if (error != (text_addr & PAGE_MASK)) { 334 if (error != (text_addr & PAGE_MASK)) {
340 send_sig(SIGKILL, current, 0); 335 send_sig(SIGKILL, current, 0);
@@ -373,9 +368,7 @@ static int load_aout_binary(struct linux_binprm *bprm, struct pt_regs *regs)
373 if (!bprm->file->f_op->mmap || (fd_offset & ~PAGE_MASK) != 0) { 368 if (!bprm->file->f_op->mmap || (fd_offset & ~PAGE_MASK) != 0) {
374 loff_t pos = fd_offset; 369 loff_t pos = fd_offset;
375 370
376 down_write(&current->mm->mmap_sem); 371 vm_brk(N_TXTADDR(ex), ex.a_text+ex.a_data);
377 do_brk(N_TXTADDR(ex), ex.a_text+ex.a_data);
378 up_write(&current->mm->mmap_sem);
379 bprm->file->f_op->read(bprm->file, 372 bprm->file->f_op->read(bprm->file,
380 (char __user *)N_TXTADDR(ex), 373 (char __user *)N_TXTADDR(ex),
381 ex.a_text+ex.a_data, &pos); 374 ex.a_text+ex.a_data, &pos);
@@ -385,26 +378,22 @@ static int load_aout_binary(struct linux_binprm *bprm, struct pt_regs *regs)
385 goto beyond_if; 378 goto beyond_if;
386 } 379 }
387 380
388 down_write(&current->mm->mmap_sem); 381 error = vm_mmap(bprm->file, N_TXTADDR(ex), ex.a_text,
389 error = do_mmap(bprm->file, N_TXTADDR(ex), ex.a_text,
390 PROT_READ | PROT_EXEC, 382 PROT_READ | PROT_EXEC,
391 MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE | 383 MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE |
392 MAP_EXECUTABLE | MAP_32BIT, 384 MAP_EXECUTABLE | MAP_32BIT,
393 fd_offset); 385 fd_offset);
394 up_write(&current->mm->mmap_sem);
395 386
396 if (error != N_TXTADDR(ex)) { 387 if (error != N_TXTADDR(ex)) {
397 send_sig(SIGKILL, current, 0); 388 send_sig(SIGKILL, current, 0);
398 return error; 389 return error;
399 } 390 }
400 391
401 down_write(&current->mm->mmap_sem); 392 error = vm_mmap(bprm->file, N_DATADDR(ex), ex.a_data,
402 error = do_mmap(bprm->file, N_DATADDR(ex), ex.a_data,
403 PROT_READ | PROT_WRITE | PROT_EXEC, 393 PROT_READ | PROT_WRITE | PROT_EXEC,
404 MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE | 394 MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE |
405 MAP_EXECUTABLE | MAP_32BIT, 395 MAP_EXECUTABLE | MAP_32BIT,
406 fd_offset + ex.a_text); 396 fd_offset + ex.a_text);
407 up_write(&current->mm->mmap_sem);
408 if (error != N_DATADDR(ex)) { 397 if (error != N_DATADDR(ex)) {
409 send_sig(SIGKILL, current, 0); 398 send_sig(SIGKILL, current, 0);
410 return error; 399 return error;
@@ -476,9 +465,7 @@ static int load_aout_library(struct file *file)
476 error_time = jiffies; 465 error_time = jiffies;
477 } 466 }
478#endif 467#endif
479 down_write(&current->mm->mmap_sem); 468 vm_brk(start_addr, ex.a_text + ex.a_data + ex.a_bss);
480 do_brk(start_addr, ex.a_text + ex.a_data + ex.a_bss);
481 up_write(&current->mm->mmap_sem);
482 469
483 file->f_op->read(file, (char __user *)start_addr, 470 file->f_op->read(file, (char __user *)start_addr,
484 ex.a_text + ex.a_data, &pos); 471 ex.a_text + ex.a_data, &pos);
@@ -490,12 +477,10 @@ static int load_aout_library(struct file *file)
490 goto out; 477 goto out;
491 } 478 }
492 /* Now use mmap to map the library into memory. */ 479 /* Now use mmap to map the library into memory. */
493 down_write(&current->mm->mmap_sem); 480 error = vm_mmap(file, start_addr, ex.a_text + ex.a_data,
494 error = do_mmap(file, start_addr, ex.a_text + ex.a_data,
495 PROT_READ | PROT_WRITE | PROT_EXEC, 481 PROT_READ | PROT_WRITE | PROT_EXEC,
496 MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE | MAP_32BIT, 482 MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE | MAP_32BIT,
497 N_TXTOFF(ex)); 483 N_TXTOFF(ex));
498 up_write(&current->mm->mmap_sem);
499 retval = error; 484 retval = error;
500 if (error != start_addr) 485 if (error != start_addr)
501 goto out; 486 goto out;
@@ -503,9 +488,7 @@ static int load_aout_library(struct file *file)
503 len = PAGE_ALIGN(ex.a_text + ex.a_data); 488 len = PAGE_ALIGN(ex.a_text + ex.a_data);
504 bss = ex.a_text + ex.a_data + ex.a_bss; 489 bss = ex.a_text + ex.a_data + ex.a_bss;
505 if (bss > len) { 490 if (bss > len) {
506 down_write(&current->mm->mmap_sem); 491 error = vm_brk(start_addr + len, bss - len);
507 error = do_brk(start_addr + len, bss - len);
508 up_write(&current->mm->mmap_sem);
509 retval = error; 492 retval = error;
510 if (error != start_addr + len) 493 if (error != start_addr + len)
511 goto out; 494 goto out;
diff --git a/arch/x86/include/asm/cmpxchg.h b/arch/x86/include/asm/cmpxchg.h
index b3b733262909..99480e55973d 100644
--- a/arch/x86/include/asm/cmpxchg.h
+++ b/arch/x86/include/asm/cmpxchg.h
@@ -43,7 +43,7 @@ extern void __add_wrong_size(void)
43 switch (sizeof(*(ptr))) { \ 43 switch (sizeof(*(ptr))) { \
44 case __X86_CASE_B: \ 44 case __X86_CASE_B: \
45 asm volatile (lock #op "b %b0, %1\n" \ 45 asm volatile (lock #op "b %b0, %1\n" \
46 : "+r" (__ret), "+m" (*(ptr)) \ 46 : "+q" (__ret), "+m" (*(ptr)) \
47 : : "memory", "cc"); \ 47 : : "memory", "cc"); \
48 break; \ 48 break; \
49 case __X86_CASE_W: \ 49 case __X86_CASE_W: \
@@ -173,7 +173,7 @@ extern void __add_wrong_size(void)
173 switch (sizeof(*(ptr))) { \ 173 switch (sizeof(*(ptr))) { \
174 case __X86_CASE_B: \ 174 case __X86_CASE_B: \
175 asm volatile (lock "addb %b1, %0\n" \ 175 asm volatile (lock "addb %b1, %0\n" \
176 : "+m" (*(ptr)) : "ri" (inc) \ 176 : "+m" (*(ptr)) : "qi" (inc) \
177 : "memory", "cc"); \ 177 : "memory", "cc"); \
178 break; \ 178 break; \
179 case __X86_CASE_W: \ 179 case __X86_CASE_W: \
diff --git a/arch/x86/include/asm/kvm_para.h b/arch/x86/include/asm/kvm_para.h
index 734c3767cfac..183922e13de1 100644
--- a/arch/x86/include/asm/kvm_para.h
+++ b/arch/x86/include/asm/kvm_para.h
@@ -170,6 +170,9 @@ static inline int kvm_para_available(void)
170 unsigned int eax, ebx, ecx, edx; 170 unsigned int eax, ebx, ecx, edx;
171 char signature[13]; 171 char signature[13];
172 172
173 if (boot_cpu_data.cpuid_level < 0)
174 return 0; /* So we don't blow up on old processors */
175
173 cpuid(KVM_CPUID_SIGNATURE, &eax, &ebx, &ecx, &edx); 176 cpuid(KVM_CPUID_SIGNATURE, &eax, &ebx, &ecx, &edx);
174 memcpy(signature + 0, &ebx, 4); 177 memcpy(signature + 0, &ebx, 4);
175 memcpy(signature + 4, &ecx, 4); 178 memcpy(signature + 4, &ecx, 4);
diff --git a/arch/x86/include/asm/posix_types.h b/arch/x86/include/asm/posix_types.h
index 3427b7798dbc..7ef7c3020e5c 100644
--- a/arch/x86/include/asm/posix_types.h
+++ b/arch/x86/include/asm/posix_types.h
@@ -7,9 +7,9 @@
7#else 7#else
8# ifdef __i386__ 8# ifdef __i386__
9# include "posix_types_32.h" 9# include "posix_types_32.h"
10# elif defined(__LP64__) 10# elif defined(__ILP32__)
11# include "posix_types_64.h"
12# else
13# include "posix_types_x32.h" 11# include "posix_types_x32.h"
12# else
13# include "posix_types_64.h"
14# endif 14# endif
15#endif 15#endif
diff --git a/arch/x86/include/asm/sigcontext.h b/arch/x86/include/asm/sigcontext.h
index 4a085383af27..5ca71c065eef 100644
--- a/arch/x86/include/asm/sigcontext.h
+++ b/arch/x86/include/asm/sigcontext.h
@@ -257,7 +257,7 @@ struct sigcontext {
257 __u64 oldmask; 257 __u64 oldmask;
258 __u64 cr2; 258 __u64 cr2;
259 struct _fpstate __user *fpstate; /* zero when no FPU context */ 259 struct _fpstate __user *fpstate; /* zero when no FPU context */
260#ifndef __LP64__ 260#ifdef __ILP32__
261 __u32 __fpstate_pad; 261 __u32 __fpstate_pad;
262#endif 262#endif
263 __u64 reserved1[8]; 263 __u64 reserved1[8];
diff --git a/arch/x86/include/asm/siginfo.h b/arch/x86/include/asm/siginfo.h
index fc1aa5535646..34c47b3341c0 100644
--- a/arch/x86/include/asm/siginfo.h
+++ b/arch/x86/include/asm/siginfo.h
@@ -2,7 +2,13 @@
2#define _ASM_X86_SIGINFO_H 2#define _ASM_X86_SIGINFO_H
3 3
4#ifdef __x86_64__ 4#ifdef __x86_64__
5# define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int)) 5# ifdef __ILP32__ /* x32 */
6typedef long long __kernel_si_clock_t __attribute__((aligned(4)));
7# define __ARCH_SI_CLOCK_T __kernel_si_clock_t
8# define __ARCH_SI_ATTRIBUTES __attribute__((aligned(8)))
9# else /* x86-64 */
10# define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
11# endif
6#endif 12#endif
7 13
8#include <asm-generic/siginfo.h> 14#include <asm-generic/siginfo.h>
diff --git a/arch/x86/include/asm/uaccess.h b/arch/x86/include/asm/uaccess.h
index 8be5f54d9360..e0544597cfe7 100644
--- a/arch/x86/include/asm/uaccess.h
+++ b/arch/x86/include/asm/uaccess.h
@@ -557,6 +557,8 @@ struct __large_struct { unsigned long buf[100]; };
557 557
558extern unsigned long 558extern unsigned long
559copy_from_user_nmi(void *to, const void __user *from, unsigned long n); 559copy_from_user_nmi(void *to, const void __user *from, unsigned long n);
560extern __must_check long
561strncpy_from_user(char *dst, const char __user *src, long count);
560 562
561/* 563/*
562 * movsl can be slow when source and dest are not both 8-byte aligned 564 * movsl can be slow when source and dest are not both 8-byte aligned
diff --git a/arch/x86/include/asm/uaccess_32.h b/arch/x86/include/asm/uaccess_32.h
index 566e803cc602..8084bc73b18c 100644
--- a/arch/x86/include/asm/uaccess_32.h
+++ b/arch/x86/include/asm/uaccess_32.h
@@ -213,11 +213,6 @@ static inline unsigned long __must_check copy_from_user(void *to,
213 return n; 213 return n;
214} 214}
215 215
216long __must_check strncpy_from_user(char *dst, const char __user *src,
217 long count);
218long __must_check __strncpy_from_user(char *dst,
219 const char __user *src, long count);
220
221/** 216/**
222 * strlen_user: - Get the size of a string in user space. 217 * strlen_user: - Get the size of a string in user space.
223 * @str: The string to measure. 218 * @str: The string to measure.
diff --git a/arch/x86/include/asm/uaccess_64.h b/arch/x86/include/asm/uaccess_64.h
index 1c66d30971ad..fcd4b6f3ef02 100644
--- a/arch/x86/include/asm/uaccess_64.h
+++ b/arch/x86/include/asm/uaccess_64.h
@@ -208,10 +208,6 @@ int __copy_in_user(void __user *dst, const void __user *src, unsigned size)
208 } 208 }
209} 209}
210 210
211__must_check long
212strncpy_from_user(char *dst, const char __user *src, long count);
213__must_check long
214__strncpy_from_user(char *dst, const char __user *src, long count);
215__must_check long strnlen_user(const char __user *str, long n); 211__must_check long strnlen_user(const char __user *str, long n);
216__must_check long __strnlen_user(const char __user *str, long n); 212__must_check long __strnlen_user(const char __user *str, long n);
217__must_check long strlen_user(const char __user *str); 213__must_check long strlen_user(const char __user *str);
diff --git a/arch/x86/include/asm/unistd.h b/arch/x86/include/asm/unistd.h
index 37cdc9d99bb1..4437001d8e3d 100644
--- a/arch/x86/include/asm/unistd.h
+++ b/arch/x86/include/asm/unistd.h
@@ -63,10 +63,10 @@
63#else 63#else
64# ifdef __i386__ 64# ifdef __i386__
65# include <asm/unistd_32.h> 65# include <asm/unistd_32.h>
66# elif defined(__LP64__) 66# elif defined(__ILP32__)
67# include <asm/unistd_64.h>
68# else
69# include <asm/unistd_x32.h> 67# include <asm/unistd_x32.h>
68# else
69# include <asm/unistd_64.h>
70# endif 70# endif
71#endif 71#endif
72 72
diff --git a/arch/x86/include/asm/word-at-a-time.h b/arch/x86/include/asm/word-at-a-time.h
index 6fe6767b7124..e58f03b206c3 100644
--- a/arch/x86/include/asm/word-at-a-time.h
+++ b/arch/x86/include/asm/word-at-a-time.h
@@ -43,4 +43,37 @@ static inline unsigned long has_zero(unsigned long a)
43 return ((a - REPEAT_BYTE(0x01)) & ~a) & REPEAT_BYTE(0x80); 43 return ((a - REPEAT_BYTE(0x01)) & ~a) & REPEAT_BYTE(0x80);
44} 44}
45 45
46/*
47 * Load an unaligned word from kernel space.
48 *
49 * In the (very unlikely) case of the word being a page-crosser
50 * and the next page not being mapped, take the exception and
51 * return zeroes in the non-existing part.
52 */
53static inline unsigned long load_unaligned_zeropad(const void *addr)
54{
55 unsigned long ret, dummy;
56
57 asm(
58 "1:\tmov %2,%0\n"
59 "2:\n"
60 ".section .fixup,\"ax\"\n"
61 "3:\t"
62 "lea %2,%1\n\t"
63 "and %3,%1\n\t"
64 "mov (%1),%0\n\t"
65 "leal %2,%%ecx\n\t"
66 "andl %4,%%ecx\n\t"
67 "shll $3,%%ecx\n\t"
68 "shr %%cl,%0\n\t"
69 "jmp 2b\n"
70 ".previous\n"
71 _ASM_EXTABLE(1b, 3b)
72 :"=&r" (ret),"=&c" (dummy)
73 :"m" (*(unsigned long *)addr),
74 "i" (-sizeof(unsigned long)),
75 "i" (sizeof(unsigned long)-1));
76 return ret;
77}
78
46#endif /* _ASM_WORD_AT_A_TIME_H */ 79#endif /* _ASM_WORD_AT_A_TIME_H */
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index baaca8defec8..764b66a4cf89 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -195,6 +195,5 @@ extern struct x86_msi_ops x86_msi;
195 195
196extern void x86_init_noop(void); 196extern void x86_init_noop(void);
197extern void x86_init_uint_noop(unsigned int unused); 197extern void x86_init_uint_noop(unsigned int unused);
198extern void x86_default_fixup_cpu_id(struct cpuinfo_x86 *c, int node);
199 198
200#endif 199#endif
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index a415b1f44365..7c439fe4941b 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -593,7 +593,7 @@ void __init acpi_set_irq_model_ioapic(void)
593#ifdef CONFIG_ACPI_HOTPLUG_CPU 593#ifdef CONFIG_ACPI_HOTPLUG_CPU
594#include <acpi/processor.h> 594#include <acpi/processor.h>
595 595
596static void __cpuinitdata acpi_map_cpu2node(acpi_handle handle, int cpu, int physid) 596static void __cpuinit acpi_map_cpu2node(acpi_handle handle, int cpu, int physid)
597{ 597{
598#ifdef CONFIG_ACPI_NUMA 598#ifdef CONFIG_ACPI_NUMA
599 int nid; 599 int nid;
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index 103b6ab368d3..146a49c763a4 100644
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -24,6 +24,10 @@ unsigned long acpi_realmode_flags;
24static char temp_stack[4096]; 24static char temp_stack[4096];
25#endif 25#endif
26 26
27asmlinkage void acpi_enter_s3(void)
28{
29 acpi_enter_sleep_state(3, wake_sleep_flags);
30}
27/** 31/**
28 * acpi_suspend_lowlevel - save kernel state 32 * acpi_suspend_lowlevel - save kernel state
29 * 33 *
diff --git a/arch/x86/kernel/acpi/sleep.h b/arch/x86/kernel/acpi/sleep.h
index 416d4be13fef..d68677a2a010 100644
--- a/arch/x86/kernel/acpi/sleep.h
+++ b/arch/x86/kernel/acpi/sleep.h
@@ -3,12 +3,16 @@
3 */ 3 */
4 4
5#include <asm/trampoline.h> 5#include <asm/trampoline.h>
6#include <linux/linkage.h>
6 7
7extern unsigned long saved_video_mode; 8extern unsigned long saved_video_mode;
8extern long saved_magic; 9extern long saved_magic;
9 10
10extern int wakeup_pmode_return; 11extern int wakeup_pmode_return;
11 12
13extern u8 wake_sleep_flags;
14extern asmlinkage void acpi_enter_s3(void);
15
12extern unsigned long acpi_copy_wakeup_routine(unsigned long); 16extern unsigned long acpi_copy_wakeup_routine(unsigned long);
13extern void wakeup_long64(void); 17extern void wakeup_long64(void);
14 18
diff --git a/arch/x86/kernel/acpi/wakeup_32.S b/arch/x86/kernel/acpi/wakeup_32.S
index 13ab720573e3..72610839f03b 100644
--- a/arch/x86/kernel/acpi/wakeup_32.S
+++ b/arch/x86/kernel/acpi/wakeup_32.S
@@ -74,9 +74,7 @@ restore_registers:
74ENTRY(do_suspend_lowlevel) 74ENTRY(do_suspend_lowlevel)
75 call save_processor_state 75 call save_processor_state
76 call save_registers 76 call save_registers
77 pushl $3 77 call acpi_enter_s3
78 call acpi_enter_sleep_state
79 addl $4, %esp
80 78
81# In case of S3 failure, we'll emerge here. Jump 79# In case of S3 failure, we'll emerge here. Jump
82# to ret_point to recover 80# to ret_point to recover
diff --git a/arch/x86/kernel/acpi/wakeup_64.S b/arch/x86/kernel/acpi/wakeup_64.S
index 8ea5164cbd04..014d1d28c397 100644
--- a/arch/x86/kernel/acpi/wakeup_64.S
+++ b/arch/x86/kernel/acpi/wakeup_64.S
@@ -71,9 +71,7 @@ ENTRY(do_suspend_lowlevel)
71 movq %rsi, saved_rsi 71 movq %rsi, saved_rsi
72 72
73 addq $8, %rsp 73 addq $8, %rsp
74 movl $3, %edi 74 call acpi_enter_s3
75 xorl %eax, %eax
76 call acpi_enter_sleep_state
77 /* in case something went wrong, restore the machine status and go on */ 75 /* in case something went wrong, restore the machine status and go on */
78 jmp resume_point 76 jmp resume_point
79 77
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 11544d8f1e97..edc24480469f 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1637,9 +1637,11 @@ static int __init apic_verify(void)
1637 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; 1637 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
1638 1638
1639 /* The BIOS may have set up the APIC at some other address */ 1639 /* The BIOS may have set up the APIC at some other address */
1640 rdmsr(MSR_IA32_APICBASE, l, h); 1640 if (boot_cpu_data.x86 >= 6) {
1641 if (l & MSR_IA32_APICBASE_ENABLE) 1641 rdmsr(MSR_IA32_APICBASE, l, h);
1642 mp_lapic_addr = l & MSR_IA32_APICBASE_BASE; 1642 if (l & MSR_IA32_APICBASE_ENABLE)
1643 mp_lapic_addr = l & MSR_IA32_APICBASE_BASE;
1644 }
1643 1645
1644 pr_info("Found and enabled local APIC!\n"); 1646 pr_info("Found and enabled local APIC!\n");
1645 return 0; 1647 return 0;
@@ -1657,13 +1659,15 @@ int __init apic_force_enable(unsigned long addr)
1657 * MSR. This can only be done in software for Intel P6 or later 1659 * MSR. This can only be done in software for Intel P6 or later
1658 * and AMD K7 (Model > 1) or later. 1660 * and AMD K7 (Model > 1) or later.
1659 */ 1661 */
1660 rdmsr(MSR_IA32_APICBASE, l, h); 1662 if (boot_cpu_data.x86 >= 6) {
1661 if (!(l & MSR_IA32_APICBASE_ENABLE)) { 1663 rdmsr(MSR_IA32_APICBASE, l, h);
1662 pr_info("Local APIC disabled by BIOS -- reenabling.\n"); 1664 if (!(l & MSR_IA32_APICBASE_ENABLE)) {
1663 l &= ~MSR_IA32_APICBASE_BASE; 1665 pr_info("Local APIC disabled by BIOS -- reenabling.\n");
1664 l |= MSR_IA32_APICBASE_ENABLE | addr; 1666 l &= ~MSR_IA32_APICBASE_BASE;
1665 wrmsr(MSR_IA32_APICBASE, l, h); 1667 l |= MSR_IA32_APICBASE_ENABLE | addr;
1666 enabled_via_apicbase = 1; 1668 wrmsr(MSR_IA32_APICBASE, l, h);
1669 enabled_via_apicbase = 1;
1670 }
1667 } 1671 }
1668 return apic_verify(); 1672 return apic_verify();
1669} 1673}
@@ -2209,10 +2213,12 @@ static void lapic_resume(void)
2209 * FIXME! This will be wrong if we ever support suspend on 2213 * FIXME! This will be wrong if we ever support suspend on
2210 * SMP! We'll need to do this as part of the CPU restore! 2214 * SMP! We'll need to do this as part of the CPU restore!
2211 */ 2215 */
2212 rdmsr(MSR_IA32_APICBASE, l, h); 2216 if (boot_cpu_data.x86 >= 6) {
2213 l &= ~MSR_IA32_APICBASE_BASE; 2217 rdmsr(MSR_IA32_APICBASE, l, h);
2214 l |= MSR_IA32_APICBASE_ENABLE | mp_lapic_addr; 2218 l &= ~MSR_IA32_APICBASE_BASE;
2215 wrmsr(MSR_IA32_APICBASE, l, h); 2219 l |= MSR_IA32_APICBASE_ENABLE | mp_lapic_addr;
2220 wrmsr(MSR_IA32_APICBASE, l, h);
2221 }
2216 } 2222 }
2217 2223
2218 maxlvt = lapic_get_maxlvt(); 2224 maxlvt = lapic_get_maxlvt();
diff --git a/arch/x86/kernel/apic/apic_numachip.c b/arch/x86/kernel/apic/apic_numachip.c
index 899803e03214..23e75422e013 100644
--- a/arch/x86/kernel/apic/apic_numachip.c
+++ b/arch/x86/kernel/apic/apic_numachip.c
@@ -207,8 +207,11 @@ static void __init map_csrs(void)
207 207
208static void fixup_cpu_id(struct cpuinfo_x86 *c, int node) 208static void fixup_cpu_id(struct cpuinfo_x86 *c, int node)
209{ 209{
210 c->phys_proc_id = node; 210
211 per_cpu(cpu_llc_id, smp_processor_id()) = node; 211 if (c->phys_proc_id != node) {
212 c->phys_proc_id = node;
213 per_cpu(cpu_llc_id, smp_processor_id()) = node;
214 }
212} 215}
213 216
214static int __init numachip_system_init(void) 217static int __init numachip_system_init(void)
diff --git a/arch/x86/kernel/apic/x2apic_phys.c b/arch/x86/kernel/apic/x2apic_phys.c
index 8a778db45e3a..991e315f4227 100644
--- a/arch/x86/kernel/apic/x2apic_phys.c
+++ b/arch/x86/kernel/apic/x2apic_phys.c
@@ -24,6 +24,12 @@ static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
24{ 24{
25 if (x2apic_phys) 25 if (x2apic_phys)
26 return x2apic_enabled(); 26 return x2apic_enabled();
27 else if ((acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) &&
28 (acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL) &&
29 x2apic_enabled()) {
30 printk(KERN_DEBUG "System requires x2apic physical mode\n");
31 return 1;
32 }
27 else 33 else
28 return 0; 34 return 0;
29} 35}
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 0a44b90602b0..146bb6218eec 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -26,7 +26,8 @@
26 * contact AMD for precise details and a CPU swap. 26 * contact AMD for precise details and a CPU swap.
27 * 27 *
28 * See http://www.multimania.com/poulot/k6bug.html 28 * See http://www.multimania.com/poulot/k6bug.html
29 * http://www.amd.com/K6/k6docs/revgd.html 29 * and section 2.6.2 of "AMD-K6 Processor Revision Guide - Model 6"
30 * (Publication # 21266 Issue Date: August 1998)
30 * 31 *
31 * The following test is erm.. interesting. AMD neglected to up 32 * The following test is erm.. interesting. AMD neglected to up
32 * the chip setting when fixing the bug but they also tweaked some 33 * the chip setting when fixing the bug but they also tweaked some
@@ -94,7 +95,6 @@ static void __cpuinit init_amd_k6(struct cpuinfo_x86 *c)
94 "system stability may be impaired when more than 32 MB are used.\n"); 95 "system stability may be impaired when more than 32 MB are used.\n");
95 else 96 else
96 printk(KERN_CONT "probably OK (after B9730xxxx).\n"); 97 printk(KERN_CONT "probably OK (after B9730xxxx).\n");
97 printk(KERN_INFO "Please see http://membres.lycos.fr/poulot/k6bug.html\n");
98 } 98 }
99 99
100 /* K6 with old style WHCR */ 100 /* K6 with old style WHCR */
@@ -353,10 +353,11 @@ static void __cpuinit srat_detect_node(struct cpuinfo_x86 *c)
353 node = per_cpu(cpu_llc_id, cpu); 353 node = per_cpu(cpu_llc_id, cpu);
354 354
355 /* 355 /*
356 * If core numbers are inconsistent, it's likely a multi-fabric platform, 356 * On multi-fabric platform (e.g. Numascale NumaChip) a
357 * so invoke platform-specific handler 357 * platform-specific handler needs to be called to fixup some
358 * IDs of the CPU.
358 */ 359 */
359 if (c->phys_proc_id != node) 360 if (x86_cpuinit.fixup_cpu_id)
360 x86_cpuinit.fixup_cpu_id(c, node); 361 x86_cpuinit.fixup_cpu_id(c, node);
361 362
362 if (!node_online(node)) { 363 if (!node_online(node)) {
@@ -579,6 +580,24 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
579 } 580 }
580 } 581 }
581 582
583 /* re-enable TopologyExtensions if switched off by BIOS */
584 if ((c->x86 == 0x15) &&
585 (c->x86_model >= 0x10) && (c->x86_model <= 0x1f) &&
586 !cpu_has(c, X86_FEATURE_TOPOEXT)) {
587 u64 val;
588
589 if (!rdmsrl_amd_safe(0xc0011005, &val)) {
590 val |= 1ULL << 54;
591 wrmsrl_amd_safe(0xc0011005, val);
592 rdmsrl(0xc0011005, val);
593 if (val & (1ULL << 54)) {
594 set_cpu_cap(c, X86_FEATURE_TOPOEXT);
595 printk(KERN_INFO FW_INFO "CPU: Re-enabling "
596 "disabled Topology Extensions Support\n");
597 }
598 }
599 }
600
582 cpu_detect_cache_sizes(c); 601 cpu_detect_cache_sizes(c);
583 602
584 /* Multi core CPU? */ 603 /* Multi core CPU? */
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 67e258362a3d..cf79302198a6 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1163,15 +1163,6 @@ static void dbg_restore_debug_regs(void)
1163#endif /* ! CONFIG_KGDB */ 1163#endif /* ! CONFIG_KGDB */
1164 1164
1165/* 1165/*
1166 * Prints an error where the NUMA and configured core-number mismatch and the
1167 * platform didn't override this to fix it up
1168 */
1169void __cpuinit x86_default_fixup_cpu_id(struct cpuinfo_x86 *c, int node)
1170{
1171 pr_err("NUMA core number %d differs from configured core number %d\n", node, c->phys_proc_id);
1172}
1173
1174/*
1175 * cpu_init() initializes state that is per-CPU. Some data is already 1166 * cpu_init() initializes state that is per-CPU. Some data is already
1176 * initialized (naturally) in the bootstrap process, such as the GDT 1167 * initialized (naturally) in the bootstrap process, such as the GDT
1177 * and IDT. We reload them nevertheless, this function acts as a 1168 * and IDT. We reload them nevertheless, this function acts as a
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 73d08ed98a64..b8f3653dddbc 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -433,14 +433,14 @@ int amd_set_l3_disable_slot(struct amd_northbridge *nb, int cpu, unsigned slot,
433 /* check if @slot is already used or the index is already disabled */ 433 /* check if @slot is already used or the index is already disabled */
434 ret = amd_get_l3_disable_slot(nb, slot); 434 ret = amd_get_l3_disable_slot(nb, slot);
435 if (ret >= 0) 435 if (ret >= 0)
436 return -EINVAL; 436 return -EEXIST;
437 437
438 if (index > nb->l3_cache.indices) 438 if (index > nb->l3_cache.indices)
439 return -EINVAL; 439 return -EINVAL;
440 440
441 /* check whether the other slot has disabled the same index already */ 441 /* check whether the other slot has disabled the same index already */
442 if (index == amd_get_l3_disable_slot(nb, !slot)) 442 if (index == amd_get_l3_disable_slot(nb, !slot))
443 return -EINVAL; 443 return -EEXIST;
444 444
445 amd_l3_disable_index(nb, cpu, slot, index); 445 amd_l3_disable_index(nb, cpu, slot, index);
446 446
@@ -468,8 +468,8 @@ static ssize_t store_cache_disable(struct _cpuid4_info *this_leaf,
468 err = amd_set_l3_disable_slot(this_leaf->base.nb, cpu, slot, val); 468 err = amd_set_l3_disable_slot(this_leaf->base.nb, cpu, slot, val);
469 if (err) { 469 if (err) {
470 if (err == -EEXIST) 470 if (err == -EEXIST)
471 printk(KERN_WARNING "L3 disable slot %d in use!\n", 471 pr_warning("L3 slot %d in use/index already disabled!\n",
472 slot); 472 slot);
473 return err; 473 return err;
474 } 474 }
475 return count; 475 return count;
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index d086a09c087d..11c9166c3337 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -945,9 +945,10 @@ struct mce_info {
945 atomic_t inuse; 945 atomic_t inuse;
946 struct task_struct *t; 946 struct task_struct *t;
947 __u64 paddr; 947 __u64 paddr;
948 int restartable;
948} mce_info[MCE_INFO_MAX]; 949} mce_info[MCE_INFO_MAX];
949 950
950static void mce_save_info(__u64 addr) 951static void mce_save_info(__u64 addr, int c)
951{ 952{
952 struct mce_info *mi; 953 struct mce_info *mi;
953 954
@@ -955,6 +956,7 @@ static void mce_save_info(__u64 addr)
955 if (atomic_cmpxchg(&mi->inuse, 0, 1) == 0) { 956 if (atomic_cmpxchg(&mi->inuse, 0, 1) == 0) {
956 mi->t = current; 957 mi->t = current;
957 mi->paddr = addr; 958 mi->paddr = addr;
959 mi->restartable = c;
958 return; 960 return;
959 } 961 }
960 } 962 }
@@ -1130,7 +1132,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
1130 mce_panic("Fatal machine check on current CPU", &m, msg); 1132 mce_panic("Fatal machine check on current CPU", &m, msg);
1131 if (worst == MCE_AR_SEVERITY) { 1133 if (worst == MCE_AR_SEVERITY) {
1132 /* schedule action before return to userland */ 1134 /* schedule action before return to userland */
1133 mce_save_info(m.addr); 1135 mce_save_info(m.addr, m.mcgstatus & MCG_STATUS_RIPV);
1134 set_thread_flag(TIF_MCE_NOTIFY); 1136 set_thread_flag(TIF_MCE_NOTIFY);
1135 } else if (kill_it) { 1137 } else if (kill_it) {
1136 force_sig(SIGBUS, current); 1138 force_sig(SIGBUS, current);
@@ -1179,7 +1181,13 @@ void mce_notify_process(void)
1179 1181
1180 pr_err("Uncorrected hardware memory error in user-access at %llx", 1182 pr_err("Uncorrected hardware memory error in user-access at %llx",
1181 mi->paddr); 1183 mi->paddr);
1182 if (memory_failure(pfn, MCE_VECTOR, MF_ACTION_REQUIRED) < 0) { 1184 /*
1185 * We must call memory_failure() here even if the current process is
1186 * doomed. We still need to mark the page as poisoned and alert any
1187 * other users of the page.
1188 */
1189 if (memory_failure(pfn, MCE_VECTOR, MF_ACTION_REQUIRED) < 0 ||
1190 mi->restartable == 0) {
1183 pr_err("Memory error not recovered"); 1191 pr_err("Memory error not recovered");
1184 force_sig(SIGBUS, current); 1192 force_sig(SIGBUS, current);
1185 } 1193 }
diff --git a/arch/x86/kernel/i387.c b/arch/x86/kernel/i387.c
index 7734bcbb5a3a..2d6e6498c176 100644
--- a/arch/x86/kernel/i387.c
+++ b/arch/x86/kernel/i387.c
@@ -235,6 +235,7 @@ int init_fpu(struct task_struct *tsk)
235 if (tsk_used_math(tsk)) { 235 if (tsk_used_math(tsk)) {
236 if (HAVE_HWFP && tsk == current) 236 if (HAVE_HWFP && tsk == current)
237 unlazy_fpu(tsk); 237 unlazy_fpu(tsk);
238 tsk->thread.fpu.last_cpu = ~0;
238 return 0; 239 return 0;
239 } 240 }
240 241
diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c
index b8ba6e4a27e4..e554e5ad2fe8 100644
--- a/arch/x86/kernel/kvm.c
+++ b/arch/x86/kernel/kvm.c
@@ -79,7 +79,6 @@ struct kvm_task_sleep_node {
79 u32 token; 79 u32 token;
80 int cpu; 80 int cpu;
81 bool halted; 81 bool halted;
82 struct mm_struct *mm;
83}; 82};
84 83
85static struct kvm_task_sleep_head { 84static struct kvm_task_sleep_head {
@@ -126,9 +125,7 @@ void kvm_async_pf_task_wait(u32 token)
126 125
127 n.token = token; 126 n.token = token;
128 n.cpu = smp_processor_id(); 127 n.cpu = smp_processor_id();
129 n.mm = current->active_mm;
130 n.halted = idle || preempt_count() > 1; 128 n.halted = idle || preempt_count() > 1;
131 atomic_inc(&n.mm->mm_count);
132 init_waitqueue_head(&n.wq); 129 init_waitqueue_head(&n.wq);
133 hlist_add_head(&n.link, &b->list); 130 hlist_add_head(&n.link, &b->list);
134 spin_unlock(&b->lock); 131 spin_unlock(&b->lock);
@@ -161,9 +158,6 @@ EXPORT_SYMBOL_GPL(kvm_async_pf_task_wait);
161static void apf_task_wake_one(struct kvm_task_sleep_node *n) 158static void apf_task_wake_one(struct kvm_task_sleep_node *n)
162{ 159{
163 hlist_del_init(&n->link); 160 hlist_del_init(&n->link);
164 if (!n->mm)
165 return;
166 mmdrop(n->mm);
167 if (n->halted) 161 if (n->halted)
168 smp_send_reschedule(n->cpu); 162 smp_send_reschedule(n->cpu);
169 else if (waitqueue_active(&n->wq)) 163 else if (waitqueue_active(&n->wq))
@@ -207,7 +201,7 @@ again:
207 * async PF was not yet handled. 201 * async PF was not yet handled.
208 * Add dummy entry for the token. 202 * Add dummy entry for the token.
209 */ 203 */
210 n = kmalloc(sizeof(*n), GFP_ATOMIC); 204 n = kzalloc(sizeof(*n), GFP_ATOMIC);
211 if (!n) { 205 if (!n) {
212 /* 206 /*
213 * Allocation failed! Busy wait while other cpu 207 * Allocation failed! Busy wait while other cpu
@@ -219,7 +213,6 @@ again:
219 } 213 }
220 n->token = token; 214 n->token = token;
221 n->cpu = smp_processor_id(); 215 n->cpu = smp_processor_id();
222 n->mm = NULL;
223 init_waitqueue_head(&n->wq); 216 init_waitqueue_head(&n->wq);
224 hlist_add_head(&n->link, &b->list); 217 hlist_add_head(&n->link, &b->list);
225 } else 218 } else
diff --git a/arch/x86/kernel/microcode_amd.c b/arch/x86/kernel/microcode_amd.c
index 73465aab28f8..8a2ce8fd41c0 100644
--- a/arch/x86/kernel/microcode_amd.c
+++ b/arch/x86/kernel/microcode_amd.c
@@ -82,11 +82,6 @@ static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
82{ 82{
83 struct cpuinfo_x86 *c = &cpu_data(cpu); 83 struct cpuinfo_x86 *c = &cpu_data(cpu);
84 84
85 if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
86 pr_warning("CPU%d: family %d not supported\n", cpu, c->x86);
87 return -1;
88 }
89
90 csig->rev = c->microcode; 85 csig->rev = c->microcode;
91 pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev); 86 pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev);
92 87
@@ -380,6 +375,13 @@ static struct microcode_ops microcode_amd_ops = {
380 375
381struct microcode_ops * __init init_amd_microcode(void) 376struct microcode_ops * __init init_amd_microcode(void)
382{ 377{
378 struct cpuinfo_x86 *c = &cpu_data(0);
379
380 if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
381 pr_warning("AMD CPU family 0x%x not supported\n", c->x86);
382 return NULL;
383 }
384
383 patch = (void *)get_zeroed_page(GFP_KERNEL); 385 patch = (void *)get_zeroed_page(GFP_KERNEL);
384 if (!patch) 386 if (!patch)
385 return NULL; 387 return NULL;
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c
index 87a0f8688301..c9bda6d6035c 100644
--- a/arch/x86/kernel/microcode_core.c
+++ b/arch/x86/kernel/microcode_core.c
@@ -419,10 +419,8 @@ static int mc_device_add(struct device *dev, struct subsys_interface *sif)
419 if (err) 419 if (err)
420 return err; 420 return err;
421 421
422 if (microcode_init_cpu(cpu) == UCODE_ERROR) { 422 if (microcode_init_cpu(cpu) == UCODE_ERROR)
423 sysfs_remove_group(&dev->kobj, &mc_attr_group);
424 return -EINVAL; 423 return -EINVAL;
425 }
426 424
427 return err; 425 return err;
428} 426}
@@ -528,11 +526,11 @@ static int __init microcode_init(void)
528 microcode_ops = init_intel_microcode(); 526 microcode_ops = init_intel_microcode();
529 else if (c->x86_vendor == X86_VENDOR_AMD) 527 else if (c->x86_vendor == X86_VENDOR_AMD)
530 microcode_ops = init_amd_microcode(); 528 microcode_ops = init_amd_microcode();
531 529 else
532 if (!microcode_ops) {
533 pr_err("no support for this CPU vendor\n"); 530 pr_err("no support for this CPU vendor\n");
531
532 if (!microcode_ops)
534 return -ENODEV; 533 return -ENODEV;
535 }
536 534
537 microcode_pdev = platform_device_register_simple("microcode", -1, 535 microcode_pdev = platform_device_register_simple("microcode", -1,
538 NULL, 0); 536 NULL, 0);
diff --git a/arch/x86/kernel/microcode_intel.c b/arch/x86/kernel/microcode_intel.c
index 3ca42d0e43a2..0327e2b3c408 100644
--- a/arch/x86/kernel/microcode_intel.c
+++ b/arch/x86/kernel/microcode_intel.c
@@ -147,12 +147,6 @@ static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
147 147
148 memset(csig, 0, sizeof(*csig)); 148 memset(csig, 0, sizeof(*csig));
149 149
150 if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
151 cpu_has(c, X86_FEATURE_IA64)) {
152 pr_err("CPU%d not a capable Intel processor\n", cpu_num);
153 return -1;
154 }
155
156 csig->sig = cpuid_eax(0x00000001); 150 csig->sig = cpuid_eax(0x00000001);
157 151
158 if ((c->x86_model >= 5) || (c->x86 > 6)) { 152 if ((c->x86_model >= 5) || (c->x86 > 6)) {
@@ -463,6 +457,14 @@ static struct microcode_ops microcode_intel_ops = {
463 457
464struct microcode_ops * __init init_intel_microcode(void) 458struct microcode_ops * __init init_intel_microcode(void)
465{ 459{
460 struct cpuinfo_x86 *c = &cpu_data(0);
461
462 if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
463 cpu_has(c, X86_FEATURE_IA64)) {
464 pr_err("Intel CPU family 0x%x not supported\n", c->x86);
465 return NULL;
466 }
467
466 return &microcode_intel_ops; 468 return &microcode_intel_ops;
467} 469}
468 470
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index 733ca39f367e..43d8b48b23e6 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -423,6 +423,7 @@ void set_personality_ia32(bool x32)
423 current_thread_info()->status |= TS_COMPAT; 423 current_thread_info()->status |= TS_COMPAT;
424 } 424 }
425} 425}
426EXPORT_SYMBOL_GPL(set_personality_ia32);
426 427
427unsigned long get_wchan(struct task_struct *p) 428unsigned long get_wchan(struct task_struct *p)
428{ 429{
diff --git a/arch/x86/kernel/setup_percpu.c b/arch/x86/kernel/setup_percpu.c
index 71f4727da373..5a98aa272184 100644
--- a/arch/x86/kernel/setup_percpu.c
+++ b/arch/x86/kernel/setup_percpu.c
@@ -185,10 +185,22 @@ void __init setup_per_cpu_areas(void)
185#endif 185#endif
186 rc = -EINVAL; 186 rc = -EINVAL;
187 if (pcpu_chosen_fc != PCPU_FC_PAGE) { 187 if (pcpu_chosen_fc != PCPU_FC_PAGE) {
188 const size_t atom_size = cpu_has_pse ? PMD_SIZE : PAGE_SIZE;
189 const size_t dyn_size = PERCPU_MODULE_RESERVE + 188 const size_t dyn_size = PERCPU_MODULE_RESERVE +
190 PERCPU_DYNAMIC_RESERVE - PERCPU_FIRST_CHUNK_RESERVE; 189 PERCPU_DYNAMIC_RESERVE - PERCPU_FIRST_CHUNK_RESERVE;
190 size_t atom_size;
191 191
192 /*
193 * On 64bit, use PMD_SIZE for atom_size so that embedded
194 * percpu areas are aligned to PMD. This, in the future,
195 * can also allow using PMD mappings in vmalloc area. Use
196 * PAGE_SIZE on 32bit as vmalloc space is highly contended
197 * and large vmalloc area allocs can easily fail.
198 */
199#ifdef CONFIG_X86_64
200 atom_size = PMD_SIZE;
201#else
202 atom_size = PAGE_SIZE;
203#endif
192 rc = pcpu_embed_first_chunk(PERCPU_FIRST_CHUNK_RESERVE, 204 rc = pcpu_embed_first_chunk(PERCPU_FIRST_CHUNK_RESERVE,
193 dyn_size, atom_size, 205 dyn_size, atom_size,
194 pcpu_cpu_distance, 206 pcpu_cpu_distance,
diff --git a/arch/x86/kernel/vsyscall_64.c b/arch/x86/kernel/vsyscall_64.c
index f386dc49f988..7515cf0e1805 100644
--- a/arch/x86/kernel/vsyscall_64.c
+++ b/arch/x86/kernel/vsyscall_64.c
@@ -216,9 +216,9 @@ bool emulate_vsyscall(struct pt_regs *regs, unsigned long address)
216 current_thread_info()->sig_on_uaccess_error = 1; 216 current_thread_info()->sig_on_uaccess_error = 1;
217 217
218 /* 218 /*
219 * 0 is a valid user pointer (in the access_ok sense) on 32-bit and 219 * NULL is a valid user pointer (in the access_ok sense) on 32-bit and
220 * 64-bit, so we don't need to special-case it here. For all the 220 * 64-bit, so we don't need to special-case it here. For all the
221 * vsyscalls, 0 means "don't write anything" not "write it at 221 * vsyscalls, NULL means "don't write anything" not "write it at
222 * address 0". 222 * address 0".
223 */ 223 */
224 ret = -EFAULT; 224 ret = -EFAULT;
@@ -247,7 +247,7 @@ bool emulate_vsyscall(struct pt_regs *regs, unsigned long address)
247 247
248 ret = sys_getcpu((unsigned __user *)regs->di, 248 ret = sys_getcpu((unsigned __user *)regs->di,
249 (unsigned __user *)regs->si, 249 (unsigned __user *)regs->si,
250 0); 250 NULL);
251 break; 251 break;
252 } 252 }
253 253
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index e9f265fd79ae..9cf71d0b2d37 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -93,7 +93,6 @@ struct x86_init_ops x86_init __initdata = {
93struct x86_cpuinit_ops x86_cpuinit __cpuinitdata = { 93struct x86_cpuinit_ops x86_cpuinit __cpuinitdata = {
94 .early_percpu_clock_init = x86_init_noop, 94 .early_percpu_clock_init = x86_init_noop,
95 .setup_percpu_clockev = setup_secondary_APIC_clock, 95 .setup_percpu_clockev = setup_secondary_APIC_clock,
96 .fixup_cpu_id = x86_default_fixup_cpu_id,
97}; 96};
98 97
99static void default_nmi_init(void) { }; 98static void default_nmi_init(void) { };
diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c
index 173df38dbda5..2e88438ffd83 100644
--- a/arch/x86/kvm/pmu.c
+++ b/arch/x86/kvm/pmu.c
@@ -459,17 +459,17 @@ void kvm_pmu_cpuid_update(struct kvm_vcpu *vcpu)
459 pmu->available_event_types = ~entry->ebx & ((1ull << bitmap_len) - 1); 459 pmu->available_event_types = ~entry->ebx & ((1ull << bitmap_len) - 1);
460 460
461 if (pmu->version == 1) { 461 if (pmu->version == 1) {
462 pmu->global_ctrl = (1 << pmu->nr_arch_gp_counters) - 1; 462 pmu->nr_arch_fixed_counters = 0;
463 return; 463 } else {
464 pmu->nr_arch_fixed_counters = min((int)(entry->edx & 0x1f),
465 X86_PMC_MAX_FIXED);
466 pmu->counter_bitmask[KVM_PMC_FIXED] =
467 ((u64)1 << ((entry->edx >> 5) & 0xff)) - 1;
464 } 468 }
465 469
466 pmu->nr_arch_fixed_counters = min((int)(entry->edx & 0x1f), 470 pmu->global_ctrl = ((1 << pmu->nr_arch_gp_counters) - 1) |
467 X86_PMC_MAX_FIXED); 471 (((1ull << pmu->nr_arch_fixed_counters) - 1) << X86_PMC_IDX_FIXED);
468 pmu->counter_bitmask[KVM_PMC_FIXED] = 472 pmu->global_ctrl_mask = ~pmu->global_ctrl;
469 ((u64)1 << ((entry->edx >> 5) & 0xff)) - 1;
470 pmu->global_ctrl_mask = ~(((1 << pmu->nr_arch_gp_counters) - 1)
471 | (((1ull << pmu->nr_arch_fixed_counters) - 1)
472 << X86_PMC_IDX_FIXED));
473} 473}
474 474
475void kvm_pmu_init(struct kvm_vcpu *vcpu) 475void kvm_pmu_init(struct kvm_vcpu *vcpu)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index ad85adfef843..4ff0ab9bc3c8 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -2210,9 +2210,12 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
2210 msr = find_msr_entry(vmx, msr_index); 2210 msr = find_msr_entry(vmx, msr_index);
2211 if (msr) { 2211 if (msr) {
2212 msr->data = data; 2212 msr->data = data;
2213 if (msr - vmx->guest_msrs < vmx->save_nmsrs) 2213 if (msr - vmx->guest_msrs < vmx->save_nmsrs) {
2214 preempt_disable();
2214 kvm_set_shared_msr(msr->index, msr->data, 2215 kvm_set_shared_msr(msr->index, msr->data,
2215 msr->mask); 2216 msr->mask);
2217 preempt_enable();
2218 }
2216 break; 2219 break;
2217 } 2220 }
2218 ret = kvm_set_msr_common(vcpu, msr_index, data); 2221 ret = kvm_set_msr_common(vcpu, msr_index, data);
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 4044ce0bf7c1..185a2b823a2d 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -6336,13 +6336,11 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm,
6336 if (npages && !old.rmap) { 6336 if (npages && !old.rmap) {
6337 unsigned long userspace_addr; 6337 unsigned long userspace_addr;
6338 6338
6339 down_write(&current->mm->mmap_sem); 6339 userspace_addr = vm_mmap(NULL, 0,
6340 userspace_addr = do_mmap(NULL, 0,
6341 npages * PAGE_SIZE, 6340 npages * PAGE_SIZE,
6342 PROT_READ | PROT_WRITE, 6341 PROT_READ | PROT_WRITE,
6343 map_flags, 6342 map_flags,
6344 0); 6343 0);
6345 up_write(&current->mm->mmap_sem);
6346 6344
6347 if (IS_ERR((void *)userspace_addr)) 6345 if (IS_ERR((void *)userspace_addr))
6348 return PTR_ERR((void *)userspace_addr); 6346 return PTR_ERR((void *)userspace_addr);
@@ -6366,10 +6364,8 @@ void kvm_arch_commit_memory_region(struct kvm *kvm,
6366 if (!user_alloc && !old.user_alloc && old.rmap && !npages) { 6364 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6367 int ret; 6365 int ret;
6368 6366
6369 down_write(&current->mm->mmap_sem); 6367 ret = vm_munmap(old.userspace_addr,
6370 ret = do_munmap(current->mm, old.userspace_addr,
6371 old.npages * PAGE_SIZE); 6368 old.npages * PAGE_SIZE);
6372 up_write(&current->mm->mmap_sem);
6373 if (ret < 0) 6369 if (ret < 0)
6374 printk(KERN_WARNING 6370 printk(KERN_WARNING
6375 "kvm_vm_ioctl_set_memory_region: " 6371 "kvm_vm_ioctl_set_memory_region: "
@@ -6585,6 +6581,7 @@ void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6585 kvm_inject_page_fault(vcpu, &fault); 6581 kvm_inject_page_fault(vcpu, &fault);
6586 } 6582 }
6587 vcpu->arch.apf.halted = false; 6583 vcpu->arch.apf.halted = false;
6584 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6588} 6585}
6589 6586
6590bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu) 6587bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
diff --git a/arch/x86/lib/insn.c b/arch/x86/lib/insn.c
index 25feb1ae71c5..b1e6c4b2e8eb 100644
--- a/arch/x86/lib/insn.c
+++ b/arch/x86/lib/insn.c
@@ -379,8 +379,8 @@ err_out:
379 return; 379 return;
380} 380}
381 381
382/* Decode moffset16/32/64 */ 382/* Decode moffset16/32/64. Return 0 if failed */
383static void __get_moffset(struct insn *insn) 383static int __get_moffset(struct insn *insn)
384{ 384{
385 switch (insn->addr_bytes) { 385 switch (insn->addr_bytes) {
386 case 2: 386 case 2:
@@ -397,15 +397,19 @@ static void __get_moffset(struct insn *insn)
397 insn->moffset2.value = get_next(int, insn); 397 insn->moffset2.value = get_next(int, insn);
398 insn->moffset2.nbytes = 4; 398 insn->moffset2.nbytes = 4;
399 break; 399 break;
400 default: /* opnd_bytes must be modified manually */
401 goto err_out;
400 } 402 }
401 insn->moffset1.got = insn->moffset2.got = 1; 403 insn->moffset1.got = insn->moffset2.got = 1;
402 404
405 return 1;
406
403err_out: 407err_out:
404 return; 408 return 0;
405} 409}
406 410
407/* Decode imm v32(Iz) */ 411/* Decode imm v32(Iz). Return 0 if failed */
408static void __get_immv32(struct insn *insn) 412static int __get_immv32(struct insn *insn)
409{ 413{
410 switch (insn->opnd_bytes) { 414 switch (insn->opnd_bytes) {
411 case 2: 415 case 2:
@@ -417,14 +421,18 @@ static void __get_immv32(struct insn *insn)
417 insn->immediate.value = get_next(int, insn); 421 insn->immediate.value = get_next(int, insn);
418 insn->immediate.nbytes = 4; 422 insn->immediate.nbytes = 4;
419 break; 423 break;
424 default: /* opnd_bytes must be modified manually */
425 goto err_out;
420 } 426 }
421 427
428 return 1;
429
422err_out: 430err_out:
423 return; 431 return 0;
424} 432}
425 433
426/* Decode imm v64(Iv/Ov) */ 434/* Decode imm v64(Iv/Ov), Return 0 if failed */
427static void __get_immv(struct insn *insn) 435static int __get_immv(struct insn *insn)
428{ 436{
429 switch (insn->opnd_bytes) { 437 switch (insn->opnd_bytes) {
430 case 2: 438 case 2:
@@ -441,15 +449,18 @@ static void __get_immv(struct insn *insn)
441 insn->immediate2.value = get_next(int, insn); 449 insn->immediate2.value = get_next(int, insn);
442 insn->immediate2.nbytes = 4; 450 insn->immediate2.nbytes = 4;
443 break; 451 break;
452 default: /* opnd_bytes must be modified manually */
453 goto err_out;
444 } 454 }
445 insn->immediate1.got = insn->immediate2.got = 1; 455 insn->immediate1.got = insn->immediate2.got = 1;
446 456
457 return 1;
447err_out: 458err_out:
448 return; 459 return 0;
449} 460}
450 461
451/* Decode ptr16:16/32(Ap) */ 462/* Decode ptr16:16/32(Ap) */
452static void __get_immptr(struct insn *insn) 463static int __get_immptr(struct insn *insn)
453{ 464{
454 switch (insn->opnd_bytes) { 465 switch (insn->opnd_bytes) {
455 case 2: 466 case 2:
@@ -462,14 +473,17 @@ static void __get_immptr(struct insn *insn)
462 break; 473 break;
463 case 8: 474 case 8:
464 /* ptr16:64 is not exist (no segment) */ 475 /* ptr16:64 is not exist (no segment) */
465 return; 476 return 0;
477 default: /* opnd_bytes must be modified manually */
478 goto err_out;
466 } 479 }
467 insn->immediate2.value = get_next(unsigned short, insn); 480 insn->immediate2.value = get_next(unsigned short, insn);
468 insn->immediate2.nbytes = 2; 481 insn->immediate2.nbytes = 2;
469 insn->immediate1.got = insn->immediate2.got = 1; 482 insn->immediate1.got = insn->immediate2.got = 1;
470 483
484 return 1;
471err_out: 485err_out:
472 return; 486 return 0;
473} 487}
474 488
475/** 489/**
@@ -489,7 +503,8 @@ void insn_get_immediate(struct insn *insn)
489 insn_get_displacement(insn); 503 insn_get_displacement(insn);
490 504
491 if (inat_has_moffset(insn->attr)) { 505 if (inat_has_moffset(insn->attr)) {
492 __get_moffset(insn); 506 if (!__get_moffset(insn))
507 goto err_out;
493 goto done; 508 goto done;
494 } 509 }
495 510
@@ -517,16 +532,20 @@ void insn_get_immediate(struct insn *insn)
517 insn->immediate2.nbytes = 4; 532 insn->immediate2.nbytes = 4;
518 break; 533 break;
519 case INAT_IMM_PTR: 534 case INAT_IMM_PTR:
520 __get_immptr(insn); 535 if (!__get_immptr(insn))
536 goto err_out;
521 break; 537 break;
522 case INAT_IMM_VWORD32: 538 case INAT_IMM_VWORD32:
523 __get_immv32(insn); 539 if (!__get_immv32(insn))
540 goto err_out;
524 break; 541 break;
525 case INAT_IMM_VWORD: 542 case INAT_IMM_VWORD:
526 __get_immv(insn); 543 if (!__get_immv(insn))
544 goto err_out;
527 break; 545 break;
528 default: 546 default:
529 break; 547 /* Here, insn must have an immediate, but failed */
548 goto err_out;
530 } 549 }
531 if (inat_has_second_immediate(insn->attr)) { 550 if (inat_has_second_immediate(insn->attr)) {
532 insn->immediate2.value = get_next(char, insn); 551 insn->immediate2.value = get_next(char, insn);
diff --git a/arch/x86/lib/usercopy.c b/arch/x86/lib/usercopy.c
index 97be9cb54483..d6ae30bbd7bb 100644
--- a/arch/x86/lib/usercopy.c
+++ b/arch/x86/lib/usercopy.c
@@ -7,6 +7,8 @@
7#include <linux/highmem.h> 7#include <linux/highmem.h>
8#include <linux/module.h> 8#include <linux/module.h>
9 9
10#include <asm/word-at-a-time.h>
11
10/* 12/*
11 * best effort, GUP based copy_from_user() that is NMI-safe 13 * best effort, GUP based copy_from_user() that is NMI-safe
12 */ 14 */
@@ -41,3 +43,104 @@ copy_from_user_nmi(void *to, const void __user *from, unsigned long n)
41 return len; 43 return len;
42} 44}
43EXPORT_SYMBOL_GPL(copy_from_user_nmi); 45EXPORT_SYMBOL_GPL(copy_from_user_nmi);
46
47static inline unsigned long count_bytes(unsigned long mask)
48{
49 mask = (mask - 1) & ~mask;
50 mask >>= 7;
51 return count_masked_bytes(mask);
52}
53
54/*
55 * Do a strncpy, return length of string without final '\0'.
56 * 'count' is the user-supplied count (return 'count' if we
57 * hit it), 'max' is the address space maximum (and we return
58 * -EFAULT if we hit it).
59 */
60static inline long do_strncpy_from_user(char *dst, const char __user *src, long count, unsigned long max)
61{
62 long res = 0;
63
64 /*
65 * Truncate 'max' to the user-specified limit, so that
66 * we only have one limit we need to check in the loop
67 */
68 if (max > count)
69 max = count;
70
71 while (max >= sizeof(unsigned long)) {
72 unsigned long c;
73
74 /* Fall back to byte-at-a-time if we get a page fault */
75 if (unlikely(__get_user(c,(unsigned long __user *)(src+res))))
76 break;
77 /* This can write a few bytes past the NUL character, but that's ok */
78 *(unsigned long *)(dst+res) = c;
79 c = has_zero(c);
80 if (c)
81 return res + count_bytes(c);
82 res += sizeof(unsigned long);
83 max -= sizeof(unsigned long);
84 }
85
86 while (max) {
87 char c;
88
89 if (unlikely(__get_user(c,src+res)))
90 return -EFAULT;
91 dst[res] = c;
92 if (!c)
93 return res;
94 res++;
95 max--;
96 }
97
98 /*
99 * Uhhuh. We hit 'max'. But was that the user-specified maximum
100 * too? If so, that's ok - we got as much as the user asked for.
101 */
102 if (res >= count)
103 return res;
104
105 /*
106 * Nope: we hit the address space limit, and we still had more
107 * characters the caller would have wanted. That's an EFAULT.
108 */
109 return -EFAULT;
110}
111
112/**
113 * strncpy_from_user: - Copy a NUL terminated string from userspace.
114 * @dst: Destination address, in kernel space. This buffer must be at
115 * least @count bytes long.
116 * @src: Source address, in user space.
117 * @count: Maximum number of bytes to copy, including the trailing NUL.
118 *
119 * Copies a NUL-terminated string from userspace to kernel space.
120 *
121 * On success, returns the length of the string (not including the trailing
122 * NUL).
123 *
124 * If access to userspace fails, returns -EFAULT (some data may have been
125 * copied).
126 *
127 * If @count is smaller than the length of the string, copies @count bytes
128 * and returns @count.
129 */
130long
131strncpy_from_user(char *dst, const char __user *src, long count)
132{
133 unsigned long max_addr, src_addr;
134
135 if (unlikely(count <= 0))
136 return 0;
137
138 max_addr = current_thread_info()->addr_limit.seg;
139 src_addr = (unsigned long)src;
140 if (likely(src_addr < max_addr)) {
141 unsigned long max = max_addr - src_addr;
142 return do_strncpy_from_user(dst, src, count, max);
143 }
144 return -EFAULT;
145}
146EXPORT_SYMBOL(strncpy_from_user);
diff --git a/arch/x86/lib/usercopy_32.c b/arch/x86/lib/usercopy_32.c
index d9b094ca7aaa..ef2a6a5d78e3 100644
--- a/arch/x86/lib/usercopy_32.c
+++ b/arch/x86/lib/usercopy_32.c
@@ -33,93 +33,6 @@ static inline int __movsl_is_ok(unsigned long a1, unsigned long a2, unsigned lon
33 __movsl_is_ok((unsigned long)(a1), (unsigned long)(a2), (n)) 33 __movsl_is_ok((unsigned long)(a1), (unsigned long)(a2), (n))
34 34
35/* 35/*
36 * Copy a null terminated string from userspace.
37 */
38
39#define __do_strncpy_from_user(dst, src, count, res) \
40do { \
41 int __d0, __d1, __d2; \
42 might_fault(); \
43 __asm__ __volatile__( \
44 " testl %1,%1\n" \
45 " jz 2f\n" \
46 "0: lodsb\n" \
47 " stosb\n" \
48 " testb %%al,%%al\n" \
49 " jz 1f\n" \
50 " decl %1\n" \
51 " jnz 0b\n" \
52 "1: subl %1,%0\n" \
53 "2:\n" \
54 ".section .fixup,\"ax\"\n" \
55 "3: movl %5,%0\n" \
56 " jmp 2b\n" \
57 ".previous\n" \
58 _ASM_EXTABLE(0b,3b) \
59 : "=&d"(res), "=&c"(count), "=&a" (__d0), "=&S" (__d1), \
60 "=&D" (__d2) \
61 : "i"(-EFAULT), "0"(count), "1"(count), "3"(src), "4"(dst) \
62 : "memory"); \
63} while (0)
64
65/**
66 * __strncpy_from_user: - Copy a NUL terminated string from userspace, with less checking.
67 * @dst: Destination address, in kernel space. This buffer must be at
68 * least @count bytes long.
69 * @src: Source address, in user space.
70 * @count: Maximum number of bytes to copy, including the trailing NUL.
71 *
72 * Copies a NUL-terminated string from userspace to kernel space.
73 * Caller must check the specified block with access_ok() before calling
74 * this function.
75 *
76 * On success, returns the length of the string (not including the trailing
77 * NUL).
78 *
79 * If access to userspace fails, returns -EFAULT (some data may have been
80 * copied).
81 *
82 * If @count is smaller than the length of the string, copies @count bytes
83 * and returns @count.
84 */
85long
86__strncpy_from_user(char *dst, const char __user *src, long count)
87{
88 long res;
89 __do_strncpy_from_user(dst, src, count, res);
90 return res;
91}
92EXPORT_SYMBOL(__strncpy_from_user);
93
94/**
95 * strncpy_from_user: - Copy a NUL terminated string from userspace.
96 * @dst: Destination address, in kernel space. This buffer must be at
97 * least @count bytes long.
98 * @src: Source address, in user space.
99 * @count: Maximum number of bytes to copy, including the trailing NUL.
100 *
101 * Copies a NUL-terminated string from userspace to kernel space.
102 *
103 * On success, returns the length of the string (not including the trailing
104 * NUL).
105 *
106 * If access to userspace fails, returns -EFAULT (some data may have been
107 * copied).
108 *
109 * If @count is smaller than the length of the string, copies @count bytes
110 * and returns @count.
111 */
112long
113strncpy_from_user(char *dst, const char __user *src, long count)
114{
115 long res = -EFAULT;
116 if (access_ok(VERIFY_READ, src, 1))
117 __do_strncpy_from_user(dst, src, count, res);
118 return res;
119}
120EXPORT_SYMBOL(strncpy_from_user);
121
122/*
123 * Zero Userspace 36 * Zero Userspace
124 */ 37 */
125 38
diff --git a/arch/x86/lib/usercopy_64.c b/arch/x86/lib/usercopy_64.c
index b7c2849ffb66..0d0326f388c0 100644
--- a/arch/x86/lib/usercopy_64.c
+++ b/arch/x86/lib/usercopy_64.c
@@ -9,55 +9,6 @@
9#include <asm/uaccess.h> 9#include <asm/uaccess.h>
10 10
11/* 11/*
12 * Copy a null terminated string from userspace.
13 */
14
15#define __do_strncpy_from_user(dst,src,count,res) \
16do { \
17 long __d0, __d1, __d2; \
18 might_fault(); \
19 __asm__ __volatile__( \
20 " testq %1,%1\n" \
21 " jz 2f\n" \
22 "0: lodsb\n" \
23 " stosb\n" \
24 " testb %%al,%%al\n" \
25 " jz 1f\n" \
26 " decq %1\n" \
27 " jnz 0b\n" \
28 "1: subq %1,%0\n" \
29 "2:\n" \
30 ".section .fixup,\"ax\"\n" \
31 "3: movq %5,%0\n" \
32 " jmp 2b\n" \
33 ".previous\n" \
34 _ASM_EXTABLE(0b,3b) \
35 : "=&r"(res), "=&c"(count), "=&a" (__d0), "=&S" (__d1), \
36 "=&D" (__d2) \
37 : "i"(-EFAULT), "0"(count), "1"(count), "3"(src), "4"(dst) \
38 : "memory"); \
39} while (0)
40
41long
42__strncpy_from_user(char *dst, const char __user *src, long count)
43{
44 long res;
45 __do_strncpy_from_user(dst, src, count, res);
46 return res;
47}
48EXPORT_SYMBOL(__strncpy_from_user);
49
50long
51strncpy_from_user(char *dst, const char __user *src, long count)
52{
53 long res = -EFAULT;
54 if (access_ok(VERIFY_READ, src, 1))
55 return __strncpy_from_user(dst, src, count);
56 return res;
57}
58EXPORT_SYMBOL(strncpy_from_user);
59
60/*
61 * Zero Userspace 12 * Zero Userspace
62 */ 13 */
63 14
diff --git a/arch/x86/platform/geode/net5501.c b/arch/x86/platform/geode/net5501.c
index 66d377e334f7..646e3b5b4bb6 100644
--- a/arch/x86/platform/geode/net5501.c
+++ b/arch/x86/platform/geode/net5501.c
@@ -63,7 +63,7 @@ static struct gpio_led net5501_leds[] = {
63 .name = "net5501:1", 63 .name = "net5501:1",
64 .gpio = 6, 64 .gpio = 6,
65 .default_trigger = "default-on", 65 .default_trigger = "default-on",
66 .active_low = 1, 66 .active_low = 0,
67 }, 67 },
68}; 68};
69 69
diff --git a/arch/x86/platform/mrst/mrst.c b/arch/x86/platform/mrst/mrst.c
index e0a37233c0af..e31bcd8f2eee 100644
--- a/arch/x86/platform/mrst/mrst.c
+++ b/arch/x86/platform/mrst/mrst.c
@@ -805,7 +805,7 @@ void intel_scu_devices_create(void)
805 } else 805 } else
806 i2c_register_board_info(i2c_bus[i], i2c_devs[i], 1); 806 i2c_register_board_info(i2c_bus[i], i2c_devs[i], 1);
807 } 807 }
808 intel_scu_notifier_post(SCU_AVAILABLE, 0L); 808 intel_scu_notifier_post(SCU_AVAILABLE, NULL);
809} 809}
810EXPORT_SYMBOL_GPL(intel_scu_devices_create); 810EXPORT_SYMBOL_GPL(intel_scu_devices_create);
811 811
@@ -814,7 +814,7 @@ void intel_scu_devices_destroy(void)
814{ 814{
815 int i; 815 int i;
816 816
817 intel_scu_notifier_post(SCU_DOWN, 0L); 817 intel_scu_notifier_post(SCU_DOWN, NULL);
818 818
819 for (i = 0; i < ipc_next_dev; i++) 819 for (i = 0; i < ipc_next_dev; i++)
820 platform_device_del(ipc_devs[i]); 820 platform_device_del(ipc_devs[i]);
diff --git a/arch/x86/tools/.gitignore b/arch/x86/tools/.gitignore
new file mode 100644
index 000000000000..be0ed065249b
--- /dev/null
+++ b/arch/x86/tools/.gitignore
@@ -0,0 +1 @@
relocs
diff --git a/arch/x86/tools/Makefile b/arch/x86/tools/Makefile
index d511aa97533a..733057b435b0 100644
--- a/arch/x86/tools/Makefile
+++ b/arch/x86/tools/Makefile
@@ -36,3 +36,7 @@ HOSTCFLAGS_insn_sanity.o := -Wall -I$(objtree)/arch/x86/lib/ -I$(srctree)/arch/x
36$(obj)/test_get_len.o: $(srctree)/arch/x86/lib/insn.c $(srctree)/arch/x86/lib/inat.c $(srctree)/arch/x86/include/asm/inat_types.h $(srctree)/arch/x86/include/asm/inat.h $(srctree)/arch/x86/include/asm/insn.h $(objtree)/arch/x86/lib/inat-tables.c 36$(obj)/test_get_len.o: $(srctree)/arch/x86/lib/insn.c $(srctree)/arch/x86/lib/inat.c $(srctree)/arch/x86/include/asm/inat_types.h $(srctree)/arch/x86/include/asm/inat.h $(srctree)/arch/x86/include/asm/insn.h $(objtree)/arch/x86/lib/inat-tables.c
37 37
38$(obj)/insn_sanity.o: $(srctree)/arch/x86/lib/insn.c $(srctree)/arch/x86/lib/inat.c $(srctree)/arch/x86/include/asm/inat_types.h $(srctree)/arch/x86/include/asm/inat.h $(srctree)/arch/x86/include/asm/insn.h $(objtree)/arch/x86/lib/inat-tables.c 38$(obj)/insn_sanity.o: $(srctree)/arch/x86/lib/insn.c $(srctree)/arch/x86/lib/inat.c $(srctree)/arch/x86/include/asm/inat_types.h $(srctree)/arch/x86/include/asm/inat.h $(srctree)/arch/x86/include/asm/insn.h $(objtree)/arch/x86/lib/inat-tables.c
39
40HOST_EXTRACFLAGS += -I$(srctree)/tools/include
41hostprogs-y += relocs
42relocs: $(obj)/relocs
diff --git a/arch/x86/boot/compressed/relocs.c b/arch/x86/tools/relocs.c
index d3c0b0277666..b43cfcd9bf40 100644
--- a/arch/x86/boot/compressed/relocs.c
+++ b/arch/x86/tools/relocs.c
@@ -18,6 +18,8 @@ static void die(char *fmt, ...);
18static Elf32_Ehdr ehdr; 18static Elf32_Ehdr ehdr;
19static unsigned long reloc_count, reloc_idx; 19static unsigned long reloc_count, reloc_idx;
20static unsigned long *relocs; 20static unsigned long *relocs;
21static unsigned long reloc16_count, reloc16_idx;
22static unsigned long *relocs16;
21 23
22struct section { 24struct section {
23 Elf32_Shdr shdr; 25 Elf32_Shdr shdr;
@@ -28,52 +30,86 @@ struct section {
28}; 30};
29static struct section *secs; 31static struct section *secs;
30 32
33enum symtype {
34 S_ABS,
35 S_REL,
36 S_SEG,
37 S_LIN,
38 S_NSYMTYPES
39};
40
41static const char * const sym_regex_kernel[S_NSYMTYPES] = {
31/* 42/*
32 * Following symbols have been audited. There values are constant and do 43 * Following symbols have been audited. There values are constant and do
33 * not change if bzImage is loaded at a different physical address than 44 * not change if bzImage is loaded at a different physical address than
34 * the address for which it has been compiled. Don't warn user about 45 * the address for which it has been compiled. Don't warn user about
35 * absolute relocations present w.r.t these symbols. 46 * absolute relocations present w.r.t these symbols.
36 */ 47 */
37static const char abs_sym_regex[] = 48 [S_ABS] =
38 "^(xen_irq_disable_direct_reloc$|" 49 "^(xen_irq_disable_direct_reloc$|"
39 "xen_save_fl_direct_reloc$|" 50 "xen_save_fl_direct_reloc$|"
40 "VDSO|" 51 "VDSO|"
41 "__crc_)"; 52 "__crc_)",
42static regex_t abs_sym_regex_c;
43static int is_abs_reloc(const char *sym_name)
44{
45 return !regexec(&abs_sym_regex_c, sym_name, 0, NULL, 0);
46}
47 53
48/* 54/*
49 * These symbols are known to be relative, even if the linker marks them 55 * These symbols are known to be relative, even if the linker marks them
50 * as absolute (typically defined outside any section in the linker script.) 56 * as absolute (typically defined outside any section in the linker script.)
51 */ 57 */
52static const char rel_sym_regex[] = 58 [S_REL] =
53 "^_end$"; 59 "^(__init_(begin|end)|"
54static regex_t rel_sym_regex_c; 60 "__x86_cpu_dev_(start|end)|"
55static int is_rel_reloc(const char *sym_name) 61 "(__parainstructions|__alt_instructions)(|_end)|"
62 "(__iommu_table|__apicdrivers|__smp_locks)(|_end)|"
63 "_end)$"
64};
65
66
67static const char * const sym_regex_realmode[S_NSYMTYPES] = {
68/*
69 * These are 16-bit segment symbols when compiling 16-bit code.
70 */
71 [S_SEG] =
72 "^real_mode_seg$",
73
74/*
75 * These are offsets belonging to segments, as opposed to linear addresses,
76 * when compiling 16-bit code.
77 */
78 [S_LIN] =
79 "^pa_",
80};
81
82static const char * const *sym_regex;
83
84static regex_t sym_regex_c[S_NSYMTYPES];
85static int is_reloc(enum symtype type, const char *sym_name)
56{ 86{
57 return !regexec(&rel_sym_regex_c, sym_name, 0, NULL, 0); 87 return sym_regex[type] &&
88 !regexec(&sym_regex_c[type], sym_name, 0, NULL, 0);
58} 89}
59 90
60static void regex_init(void) 91static void regex_init(int use_real_mode)
61{ 92{
62 char errbuf[128]; 93 char errbuf[128];
63 int err; 94 int err;
64 95 int i;
65 err = regcomp(&abs_sym_regex_c, abs_sym_regex, 96
66 REG_EXTENDED|REG_NOSUB); 97 if (use_real_mode)
67 if (err) { 98 sym_regex = sym_regex_realmode;
68 regerror(err, &abs_sym_regex_c, errbuf, sizeof errbuf); 99 else
69 die("%s", errbuf); 100 sym_regex = sym_regex_kernel;
70 }
71 101
72 err = regcomp(&rel_sym_regex_c, rel_sym_regex, 102 for (i = 0; i < S_NSYMTYPES; i++) {
73 REG_EXTENDED|REG_NOSUB); 103 if (!sym_regex[i])
74 if (err) { 104 continue;
75 regerror(err, &rel_sym_regex_c, errbuf, sizeof errbuf); 105
76 die("%s", errbuf); 106 err = regcomp(&sym_regex_c[i], sym_regex[i],
107 REG_EXTENDED|REG_NOSUB);
108
109 if (err) {
110 regerror(err, &sym_regex_c[i], errbuf, sizeof errbuf);
111 die("%s", errbuf);
112 }
77 } 113 }
78} 114}
79 115
@@ -154,6 +190,10 @@ static const char *rel_type(unsigned type)
154 REL_TYPE(R_386_RELATIVE), 190 REL_TYPE(R_386_RELATIVE),
155 REL_TYPE(R_386_GOTOFF), 191 REL_TYPE(R_386_GOTOFF),
156 REL_TYPE(R_386_GOTPC), 192 REL_TYPE(R_386_GOTPC),
193 REL_TYPE(R_386_8),
194 REL_TYPE(R_386_PC8),
195 REL_TYPE(R_386_16),
196 REL_TYPE(R_386_PC16),
157#undef REL_TYPE 197#undef REL_TYPE
158 }; 198 };
159 const char *name = "unknown type rel type name"; 199 const char *name = "unknown type rel type name";
@@ -189,7 +229,7 @@ static const char *sym_name(const char *sym_strtab, Elf32_Sym *sym)
189 name = sym_strtab + sym->st_name; 229 name = sym_strtab + sym->st_name;
190 } 230 }
191 else { 231 else {
192 name = sec_name(secs[sym->st_shndx].shdr.sh_name); 232 name = sec_name(sym->st_shndx);
193 } 233 }
194 return name; 234 return name;
195} 235}
@@ -403,13 +443,11 @@ static void print_absolute_symbols(void)
403 for (i = 0; i < ehdr.e_shnum; i++) { 443 for (i = 0; i < ehdr.e_shnum; i++) {
404 struct section *sec = &secs[i]; 444 struct section *sec = &secs[i];
405 char *sym_strtab; 445 char *sym_strtab;
406 Elf32_Sym *sh_symtab;
407 int j; 446 int j;
408 447
409 if (sec->shdr.sh_type != SHT_SYMTAB) { 448 if (sec->shdr.sh_type != SHT_SYMTAB) {
410 continue; 449 continue;
411 } 450 }
412 sh_symtab = sec->symtab;
413 sym_strtab = sec->link->strtab; 451 sym_strtab = sec->link->strtab;
414 for (j = 0; j < sec->shdr.sh_size/sizeof(Elf32_Sym); j++) { 452 for (j = 0; j < sec->shdr.sh_size/sizeof(Elf32_Sym); j++) {
415 Elf32_Sym *sym; 453 Elf32_Sym *sym;
@@ -474,7 +512,7 @@ static void print_absolute_relocs(void)
474 * Before warning check if this absolute symbol 512 * Before warning check if this absolute symbol
475 * relocation is harmless. 513 * relocation is harmless.
476 */ 514 */
477 if (is_abs_reloc(name) || is_rel_reloc(name)) 515 if (is_reloc(S_ABS, name) || is_reloc(S_REL, name))
478 continue; 516 continue;
479 517
480 if (!printed) { 518 if (!printed) {
@@ -498,7 +536,8 @@ static void print_absolute_relocs(void)
498 printf("\n"); 536 printf("\n");
499} 537}
500 538
501static void walk_relocs(void (*visit)(Elf32_Rel *rel, Elf32_Sym *sym)) 539static void walk_relocs(void (*visit)(Elf32_Rel *rel, Elf32_Sym *sym),
540 int use_real_mode)
502{ 541{
503 int i; 542 int i;
504 /* Walk through the relocations */ 543 /* Walk through the relocations */
@@ -523,30 +562,67 @@ static void walk_relocs(void (*visit)(Elf32_Rel *rel, Elf32_Sym *sym))
523 Elf32_Rel *rel; 562 Elf32_Rel *rel;
524 Elf32_Sym *sym; 563 Elf32_Sym *sym;
525 unsigned r_type; 564 unsigned r_type;
565 const char *symname;
566 int shn_abs;
567
526 rel = &sec->reltab[j]; 568 rel = &sec->reltab[j];
527 sym = &sh_symtab[ELF32_R_SYM(rel->r_info)]; 569 sym = &sh_symtab[ELF32_R_SYM(rel->r_info)];
528 r_type = ELF32_R_TYPE(rel->r_info); 570 r_type = ELF32_R_TYPE(rel->r_info);
529 /* Don't visit relocations to absolute symbols */ 571
530 if (sym->st_shndx == SHN_ABS && 572 shn_abs = sym->st_shndx == SHN_ABS;
531 !is_rel_reloc(sym_name(sym_strtab, sym))) { 573
532 continue;
533 }
534 switch (r_type) { 574 switch (r_type) {
535 case R_386_NONE: 575 case R_386_NONE:
536 case R_386_PC32: 576 case R_386_PC32:
577 case R_386_PC16:
578 case R_386_PC8:
537 /* 579 /*
538 * NONE can be ignored and and PC relative 580 * NONE can be ignored and and PC relative
539 * relocations don't need to be adjusted. 581 * relocations don't need to be adjusted.
540 */ 582 */
541 break; 583 break;
584
585 case R_386_16:
586 symname = sym_name(sym_strtab, sym);
587 if (!use_real_mode)
588 goto bad;
589 if (shn_abs) {
590 if (is_reloc(S_ABS, symname))
591 break;
592 else if (!is_reloc(S_SEG, symname))
593 goto bad;
594 } else {
595 if (is_reloc(S_LIN, symname))
596 goto bad;
597 else
598 break;
599 }
600 visit(rel, sym);
601 break;
602
542 case R_386_32: 603 case R_386_32:
543 /* Visit relocations that need to be adjusted */ 604 symname = sym_name(sym_strtab, sym);
605 if (shn_abs) {
606 if (is_reloc(S_ABS, symname))
607 break;
608 else if (!is_reloc(S_REL, symname))
609 goto bad;
610 } else {
611 if (use_real_mode &&
612 !is_reloc(S_LIN, symname))
613 break;
614 }
544 visit(rel, sym); 615 visit(rel, sym);
545 break; 616 break;
546 default: 617 default:
547 die("Unsupported relocation type: %s (%d)\n", 618 die("Unsupported relocation type: %s (%d)\n",
548 rel_type(r_type), r_type); 619 rel_type(r_type), r_type);
549 break; 620 break;
621 bad:
622 symname = sym_name(sym_strtab, sym);
623 die("Invalid %s %s relocation: %s\n",
624 shn_abs ? "absolute" : "relative",
625 rel_type(r_type), symname);
550 } 626 }
551 } 627 }
552 } 628 }
@@ -554,13 +630,19 @@ static void walk_relocs(void (*visit)(Elf32_Rel *rel, Elf32_Sym *sym))
554 630
555static void count_reloc(Elf32_Rel *rel, Elf32_Sym *sym) 631static void count_reloc(Elf32_Rel *rel, Elf32_Sym *sym)
556{ 632{
557 reloc_count += 1; 633 if (ELF32_R_TYPE(rel->r_info) == R_386_16)
634 reloc16_count++;
635 else
636 reloc_count++;
558} 637}
559 638
560static void collect_reloc(Elf32_Rel *rel, Elf32_Sym *sym) 639static void collect_reloc(Elf32_Rel *rel, Elf32_Sym *sym)
561{ 640{
562 /* Remember the address that needs to be adjusted. */ 641 /* Remember the address that needs to be adjusted. */
563 relocs[reloc_idx++] = rel->r_offset; 642 if (ELF32_R_TYPE(rel->r_info) == R_386_16)
643 relocs16[reloc16_idx++] = rel->r_offset;
644 else
645 relocs[reloc_idx++] = rel->r_offset;
564} 646}
565 647
566static int cmp_relocs(const void *va, const void *vb) 648static int cmp_relocs(const void *va, const void *vb)
@@ -570,23 +652,41 @@ static int cmp_relocs(const void *va, const void *vb)
570 return (*a == *b)? 0 : (*a > *b)? 1 : -1; 652 return (*a == *b)? 0 : (*a > *b)? 1 : -1;
571} 653}
572 654
573static void emit_relocs(int as_text) 655static int write32(unsigned int v, FILE *f)
656{
657 unsigned char buf[4];
658
659 put_unaligned_le32(v, buf);
660 return fwrite(buf, 1, 4, f) == 4 ? 0 : -1;
661}
662
663static void emit_relocs(int as_text, int use_real_mode)
574{ 664{
575 int i; 665 int i;
576 /* Count how many relocations I have and allocate space for them. */ 666 /* Count how many relocations I have and allocate space for them. */
577 reloc_count = 0; 667 reloc_count = 0;
578 walk_relocs(count_reloc); 668 walk_relocs(count_reloc, use_real_mode);
579 relocs = malloc(reloc_count * sizeof(relocs[0])); 669 relocs = malloc(reloc_count * sizeof(relocs[0]));
580 if (!relocs) { 670 if (!relocs) {
581 die("malloc of %d entries for relocs failed\n", 671 die("malloc of %d entries for relocs failed\n",
582 reloc_count); 672 reloc_count);
583 } 673 }
674
675 relocs16 = malloc(reloc16_count * sizeof(relocs[0]));
676 if (!relocs16) {
677 die("malloc of %d entries for relocs16 failed\n",
678 reloc16_count);
679 }
584 /* Collect up the relocations */ 680 /* Collect up the relocations */
585 reloc_idx = 0; 681 reloc_idx = 0;
586 walk_relocs(collect_reloc); 682 walk_relocs(collect_reloc, use_real_mode);
683
684 if (reloc16_count && !use_real_mode)
685 die("Segment relocations found but --realmode not specified\n");
587 686
588 /* Order the relocations for more efficient processing */ 687 /* Order the relocations for more efficient processing */
589 qsort(relocs, reloc_count, sizeof(relocs[0]), cmp_relocs); 688 qsort(relocs, reloc_count, sizeof(relocs[0]), cmp_relocs);
689 qsort(relocs16, reloc16_count, sizeof(relocs16[0]), cmp_relocs);
590 690
591 /* Print the relocations */ 691 /* Print the relocations */
592 if (as_text) { 692 if (as_text) {
@@ -595,58 +695,83 @@ static void emit_relocs(int as_text)
595 */ 695 */
596 printf(".section \".data.reloc\",\"a\"\n"); 696 printf(".section \".data.reloc\",\"a\"\n");
597 printf(".balign 4\n"); 697 printf(".balign 4\n");
598 for (i = 0; i < reloc_count; i++) { 698 if (use_real_mode) {
599 printf("\t .long 0x%08lx\n", relocs[i]); 699 printf("\t.long %lu\n", reloc16_count);
700 for (i = 0; i < reloc16_count; i++)
701 printf("\t.long 0x%08lx\n", relocs16[i]);
702 printf("\t.long %lu\n", reloc_count);
703 for (i = 0; i < reloc_count; i++) {
704 printf("\t.long 0x%08lx\n", relocs[i]);
705 }
706 } else {
707 /* Print a stop */
708 printf("\t.long 0x%08lx\n", (unsigned long)0);
709 for (i = 0; i < reloc_count; i++) {
710 printf("\t.long 0x%08lx\n", relocs[i]);
711 }
600 } 712 }
713
601 printf("\n"); 714 printf("\n");
602 } 715 }
603 else { 716 else {
604 unsigned char buf[4]; 717 if (use_real_mode) {
605 /* Print a stop */ 718 write32(reloc16_count, stdout);
606 fwrite("\0\0\0\0", 4, 1, stdout); 719 for (i = 0; i < reloc16_count; i++)
607 /* Now print each relocation */ 720 write32(relocs16[i], stdout);
608 for (i = 0; i < reloc_count; i++) { 721 write32(reloc_count, stdout);
609 put_unaligned_le32(relocs[i], buf); 722
610 fwrite(buf, 4, 1, stdout); 723 /* Now print each relocation */
724 for (i = 0; i < reloc_count; i++)
725 write32(relocs[i], stdout);
726 } else {
727 /* Print a stop */
728 write32(0, stdout);
729
730 /* Now print each relocation */
731 for (i = 0; i < reloc_count; i++) {
732 write32(relocs[i], stdout);
733 }
611 } 734 }
612 } 735 }
613} 736}
614 737
615static void usage(void) 738static void usage(void)
616{ 739{
617 die("relocs [--abs-syms |--abs-relocs | --text] vmlinux\n"); 740 die("relocs [--abs-syms|--abs-relocs|--text|--realmode] vmlinux\n");
618} 741}
619 742
620int main(int argc, char **argv) 743int main(int argc, char **argv)
621{ 744{
622 int show_absolute_syms, show_absolute_relocs; 745 int show_absolute_syms, show_absolute_relocs;
623 int as_text; 746 int as_text, use_real_mode;
624 const char *fname; 747 const char *fname;
625 FILE *fp; 748 FILE *fp;
626 int i; 749 int i;
627 750
628 regex_init();
629
630 show_absolute_syms = 0; 751 show_absolute_syms = 0;
631 show_absolute_relocs = 0; 752 show_absolute_relocs = 0;
632 as_text = 0; 753 as_text = 0;
754 use_real_mode = 0;
633 fname = NULL; 755 fname = NULL;
634 for (i = 1; i < argc; i++) { 756 for (i = 1; i < argc; i++) {
635 char *arg = argv[i]; 757 char *arg = argv[i];
636 if (*arg == '-') { 758 if (*arg == '-') {
637 if (strcmp(argv[1], "--abs-syms") == 0) { 759 if (strcmp(arg, "--abs-syms") == 0) {
638 show_absolute_syms = 1; 760 show_absolute_syms = 1;
639 continue; 761 continue;
640 } 762 }
641 763 if (strcmp(arg, "--abs-relocs") == 0) {
642 if (strcmp(argv[1], "--abs-relocs") == 0) {
643 show_absolute_relocs = 1; 764 show_absolute_relocs = 1;
644 continue; 765 continue;
645 } 766 }
646 else if (strcmp(argv[1], "--text") == 0) { 767 if (strcmp(arg, "--text") == 0) {
647 as_text = 1; 768 as_text = 1;
648 continue; 769 continue;
649 } 770 }
771 if (strcmp(arg, "--realmode") == 0) {
772 use_real_mode = 1;
773 continue;
774 }
650 } 775 }
651 else if (!fname) { 776 else if (!fname) {
652 fname = arg; 777 fname = arg;
@@ -657,6 +782,7 @@ int main(int argc, char **argv)
657 if (!fname) { 782 if (!fname) {
658 usage(); 783 usage();
659 } 784 }
785 regex_init(use_real_mode);
660 fp = fopen(fname, "r"); 786 fp = fopen(fname, "r");
661 if (!fp) { 787 if (!fp) {
662 die("Cannot open %s: %s\n", 788 die("Cannot open %s: %s\n",
@@ -675,6 +801,6 @@ int main(int argc, char **argv)
675 print_absolute_relocs(); 801 print_absolute_relocs();
676 return 0; 802 return 0;
677 } 803 }
678 emit_relocs(as_text); 804 emit_relocs(as_text, use_real_mode);
679 return 0; 805 return 0;
680} 806}
diff --git a/arch/x86/um/asm/barrier.h b/arch/x86/um/asm/barrier.h
new file mode 100644
index 000000000000..7d01b8c56c00
--- /dev/null
+++ b/arch/x86/um/asm/barrier.h
@@ -0,0 +1,75 @@
1#ifndef _ASM_UM_BARRIER_H_
2#define _ASM_UM_BARRIER_H_
3
4#include <asm/asm.h>
5#include <asm/segment.h>
6#include <asm/cpufeature.h>
7#include <asm/cmpxchg.h>
8#include <asm/nops.h>
9
10#include <linux/kernel.h>
11#include <linux/irqflags.h>
12
13/*
14 * Force strict CPU ordering.
15 * And yes, this is required on UP too when we're talking
16 * to devices.
17 */
18#ifdef CONFIG_X86_32
19
20#define mb() alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2)
21#define rmb() alternative("lock; addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2)
22#define wmb() alternative("lock; addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM)
23
24#else /* CONFIG_X86_32 */
25
26#define mb() asm volatile("mfence" : : : "memory")
27#define rmb() asm volatile("lfence" : : : "memory")
28#define wmb() asm volatile("sfence" : : : "memory")
29
30#endif /* CONFIG_X86_32 */
31
32#define read_barrier_depends() do { } while (0)
33
34#ifdef CONFIG_SMP
35
36#define smp_mb() mb()
37#ifdef CONFIG_X86_PPRO_FENCE
38#define smp_rmb() rmb()
39#else /* CONFIG_X86_PPRO_FENCE */
40#define smp_rmb() barrier()
41#endif /* CONFIG_X86_PPRO_FENCE */
42
43#ifdef CONFIG_X86_OOSTORE
44#define smp_wmb() wmb()
45#else /* CONFIG_X86_OOSTORE */
46#define smp_wmb() barrier()
47#endif /* CONFIG_X86_OOSTORE */
48
49#define smp_read_barrier_depends() read_barrier_depends()
50#define set_mb(var, value) do { (void)xchg(&var, value); } while (0)
51
52#else /* CONFIG_SMP */
53
54#define smp_mb() barrier()
55#define smp_rmb() barrier()
56#define smp_wmb() barrier()
57#define smp_read_barrier_depends() do { } while (0)
58#define set_mb(var, value) do { var = value; barrier(); } while (0)
59
60#endif /* CONFIG_SMP */
61
62/*
63 * Stop RDTSC speculation. This is needed when you need to use RDTSC
64 * (or get_cycles or vread that possibly accesses the TSC) in a defined
65 * code region.
66 *
67 * (Could use an alternative three way for this if there was one.)
68 */
69static inline void rdtsc_barrier(void)
70{
71 alternative(ASM_NOP3, "mfence", X86_FEATURE_MFENCE_RDTSC);
72 alternative(ASM_NOP3, "lfence", X86_FEATURE_LFENCE_RDTSC);
73}
74
75#endif
diff --git a/arch/x86/um/asm/system.h b/arch/x86/um/asm/system.h
deleted file mode 100644
index a459fd9b7598..000000000000
--- a/arch/x86/um/asm/system.h
+++ /dev/null
@@ -1,135 +0,0 @@
1#ifndef _ASM_X86_SYSTEM_H_
2#define _ASM_X86_SYSTEM_H_
3
4#include <asm/asm.h>
5#include <asm/segment.h>
6#include <asm/cpufeature.h>
7#include <asm/cmpxchg.h>
8#include <asm/nops.h>
9
10#include <linux/kernel.h>
11#include <linux/irqflags.h>
12
13/* entries in ARCH_DLINFO: */
14#ifdef CONFIG_IA32_EMULATION
15# define AT_VECTOR_SIZE_ARCH 2
16#else
17# define AT_VECTOR_SIZE_ARCH 1
18#endif
19
20extern unsigned long arch_align_stack(unsigned long sp);
21
22void default_idle(void);
23
24/*
25 * Force strict CPU ordering.
26 * And yes, this is required on UP too when we're talking
27 * to devices.
28 */
29#ifdef CONFIG_X86_32
30/*
31 * Some non-Intel clones support out of order store. wmb() ceases to be a
32 * nop for these.
33 */
34#define mb() alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2)
35#define rmb() alternative("lock; addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2)
36#define wmb() alternative("lock; addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM)
37#else
38#define mb() asm volatile("mfence":::"memory")
39#define rmb() asm volatile("lfence":::"memory")
40#define wmb() asm volatile("sfence" ::: "memory")
41#endif
42
43/**
44 * read_barrier_depends - Flush all pending reads that subsequents reads
45 * depend on.
46 *
47 * No data-dependent reads from memory-like regions are ever reordered
48 * over this barrier. All reads preceding this primitive are guaranteed
49 * to access memory (but not necessarily other CPUs' caches) before any
50 * reads following this primitive that depend on the data return by
51 * any of the preceding reads. This primitive is much lighter weight than
52 * rmb() on most CPUs, and is never heavier weight than is
53 * rmb().
54 *
55 * These ordering constraints are respected by both the local CPU
56 * and the compiler.
57 *
58 * Ordering is not guaranteed by anything other than these primitives,
59 * not even by data dependencies. See the documentation for
60 * memory_barrier() for examples and URLs to more information.
61 *
62 * For example, the following code would force ordering (the initial
63 * value of "a" is zero, "b" is one, and "p" is "&a"):
64 *
65 * <programlisting>
66 * CPU 0 CPU 1
67 *
68 * b = 2;
69 * memory_barrier();
70 * p = &b; q = p;
71 * read_barrier_depends();
72 * d = *q;
73 * </programlisting>
74 *
75 * because the read of "*q" depends on the read of "p" and these
76 * two reads are separated by a read_barrier_depends(). However,
77 * the following code, with the same initial values for "a" and "b":
78 *
79 * <programlisting>
80 * CPU 0 CPU 1
81 *
82 * a = 2;
83 * memory_barrier();
84 * b = 3; y = b;
85 * read_barrier_depends();
86 * x = a;
87 * </programlisting>
88 *
89 * does not enforce ordering, since there is no data dependency between
90 * the read of "a" and the read of "b". Therefore, on some CPUs, such
91 * as Alpha, "y" could be set to 3 and "x" to 0. Use rmb()
92 * in cases like this where there are no data dependencies.
93 **/
94
95#define read_barrier_depends() do { } while (0)
96
97#ifdef CONFIG_SMP
98#define smp_mb() mb()
99#ifdef CONFIG_X86_PPRO_FENCE
100# define smp_rmb() rmb()
101#else
102# define smp_rmb() barrier()
103#endif
104#ifdef CONFIG_X86_OOSTORE
105# define smp_wmb() wmb()
106#else
107# define smp_wmb() barrier()
108#endif
109#define smp_read_barrier_depends() read_barrier_depends()
110#define set_mb(var, value) do { (void)xchg(&var, value); } while (0)
111#else
112#define smp_mb() barrier()
113#define smp_rmb() barrier()
114#define smp_wmb() barrier()
115#define smp_read_barrier_depends() do { } while (0)
116#define set_mb(var, value) do { var = value; barrier(); } while (0)
117#endif
118
119/*
120 * Stop RDTSC speculation. This is needed when you need to use RDTSC
121 * (or get_cycles or vread that possibly accesses the TSC) in a defined
122 * code region.
123 *
124 * (Could use an alternative three way for this if there was one.)
125 */
126static inline void rdtsc_barrier(void)
127{
128 alternative(ASM_NOP3, "mfence", X86_FEATURE_MFENCE_RDTSC);
129 alternative(ASM_NOP3, "lfence", X86_FEATURE_LFENCE_RDTSC);
130}
131
132extern void *_switch_to(void *prev, void *next, void *last);
133#define switch_to(prev, next, last) prev = _switch_to(prev, next, last)
134
135#endif
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index 4f51bebac02c..95dccce8e979 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -63,6 +63,7 @@
63#include <asm/stackprotector.h> 63#include <asm/stackprotector.h>
64#include <asm/hypervisor.h> 64#include <asm/hypervisor.h>
65#include <asm/mwait.h> 65#include <asm/mwait.h>
66#include <asm/pci_x86.h>
66 67
67#ifdef CONFIG_ACPI 68#ifdef CONFIG_ACPI
68#include <linux/acpi.h> 69#include <linux/acpi.h>
@@ -261,7 +262,8 @@ static void xen_cpuid(unsigned int *ax, unsigned int *bx,
261 262
262static bool __init xen_check_mwait(void) 263static bool __init xen_check_mwait(void)
263{ 264{
264#ifdef CONFIG_ACPI 265#if defined(CONFIG_ACPI) && !defined(CONFIG_ACPI_PROCESSOR_AGGREGATOR) && \
266 !defined(CONFIG_ACPI_PROCESSOR_AGGREGATOR_MODULE)
265 struct xen_platform_op op = { 267 struct xen_platform_op op = {
266 .cmd = XENPF_set_processor_pminfo, 268 .cmd = XENPF_set_processor_pminfo,
267 .u.set_pminfo.id = -1, 269 .u.set_pminfo.id = -1,
@@ -349,7 +351,6 @@ static void __init xen_init_cpuid_mask(void)
349 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ 351 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */
350 if ((cx & xsave_mask) != xsave_mask) 352 if ((cx & xsave_mask) != xsave_mask)
351 cpuid_leaf1_ecx_mask &= ~xsave_mask; /* disable XSAVE & OSXSAVE */ 353 cpuid_leaf1_ecx_mask &= ~xsave_mask; /* disable XSAVE & OSXSAVE */
352
353 if (xen_check_mwait()) 354 if (xen_check_mwait())
354 cpuid_leaf1_ecx_set_mask = (1 << (X86_FEATURE_MWAIT % 32)); 355 cpuid_leaf1_ecx_set_mask = (1 << (X86_FEATURE_MWAIT % 32));
355} 356}
@@ -809,9 +810,40 @@ static void xen_io_delay(void)
809} 810}
810 811
811#ifdef CONFIG_X86_LOCAL_APIC 812#ifdef CONFIG_X86_LOCAL_APIC
813static unsigned long xen_set_apic_id(unsigned int x)
814{
815 WARN_ON(1);
816 return x;
817}
818static unsigned int xen_get_apic_id(unsigned long x)
819{
820 return ((x)>>24) & 0xFFu;
821}
812static u32 xen_apic_read(u32 reg) 822static u32 xen_apic_read(u32 reg)
813{ 823{
814 return 0; 824 struct xen_platform_op op = {
825 .cmd = XENPF_get_cpuinfo,
826 .interface_version = XENPF_INTERFACE_VERSION,
827 .u.pcpu_info.xen_cpuid = 0,
828 };
829 int ret = 0;
830
831 /* Shouldn't need this as APIC is turned off for PV, and we only
832 * get called on the bootup processor. But just in case. */
833 if (!xen_initial_domain() || smp_processor_id())
834 return 0;
835
836 if (reg == APIC_LVR)
837 return 0x10;
838
839 if (reg != APIC_ID)
840 return 0;
841
842 ret = HYPERVISOR_dom0_op(&op);
843 if (ret)
844 return 0;
845
846 return op.u.pcpu_info.apic_id << 24;
815} 847}
816 848
817static void xen_apic_write(u32 reg, u32 val) 849static void xen_apic_write(u32 reg, u32 val)
@@ -849,6 +881,8 @@ static void set_xen_basic_apic_ops(void)
849 apic->icr_write = xen_apic_icr_write; 881 apic->icr_write = xen_apic_icr_write;
850 apic->wait_icr_idle = xen_apic_wait_icr_idle; 882 apic->wait_icr_idle = xen_apic_wait_icr_idle;
851 apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle; 883 apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle;
884 apic->set_apic_id = xen_set_apic_id;
885 apic->get_apic_id = xen_get_apic_id;
852} 886}
853 887
854#endif 888#endif
@@ -1365,8 +1399,10 @@ asmlinkage void __init xen_start_kernel(void)
1365 /* Make sure ACS will be enabled */ 1399 /* Make sure ACS will be enabled */
1366 pci_request_acs(); 1400 pci_request_acs();
1367 } 1401 }
1368 1402#ifdef CONFIG_PCI
1369 1403 /* PCI BIOS service won't work from a PV guest. */
1404 pci_probe &= ~PCI_PROBE_BIOS;
1405#endif
1370 xen_raw_console_write("about to get started...\n"); 1406 xen_raw_console_write("about to get started...\n");
1371 1407
1372 xen_setup_runstate_info(0); 1408 xen_setup_runstate_info(0);
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index b8e279479a6b..69f5857660ac 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -353,8 +353,13 @@ static pteval_t pte_mfn_to_pfn(pteval_t val)
353{ 353{
354 if (val & _PAGE_PRESENT) { 354 if (val & _PAGE_PRESENT) {
355 unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT; 355 unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
356 unsigned long pfn = mfn_to_pfn(mfn);
357
356 pteval_t flags = val & PTE_FLAGS_MASK; 358 pteval_t flags = val & PTE_FLAGS_MASK;
357 val = ((pteval_t)mfn_to_pfn(mfn) << PAGE_SHIFT) | flags; 359 if (unlikely(pfn == ~0))
360 val = flags & ~_PAGE_PRESENT;
361 else
362 val = ((pteval_t)pfn << PAGE_SHIFT) | flags;
358 } 363 }
359 364
360 return val; 365 return val;
diff --git a/arch/x86/xen/smp.c b/arch/x86/xen/smp.c
index 5fac6919b957..0503c0c493a9 100644
--- a/arch/x86/xen/smp.c
+++ b/arch/x86/xen/smp.c
@@ -178,6 +178,7 @@ static void __init xen_fill_possible_map(void)
178static void __init xen_filter_cpu_maps(void) 178static void __init xen_filter_cpu_maps(void)
179{ 179{
180 int i, rc; 180 int i, rc;
181 unsigned int subtract = 0;
181 182
182 if (!xen_initial_domain()) 183 if (!xen_initial_domain())
183 return; 184 return;
@@ -192,8 +193,22 @@ static void __init xen_filter_cpu_maps(void)
192 } else { 193 } else {
193 set_cpu_possible(i, false); 194 set_cpu_possible(i, false);
194 set_cpu_present(i, false); 195 set_cpu_present(i, false);
196 subtract++;
195 } 197 }
196 } 198 }
199#ifdef CONFIG_HOTPLUG_CPU
200 /* This is akin to using 'nr_cpus' on the Linux command line.
201 * Which is OK as when we use 'dom0_max_vcpus=X' we can only
202 * have up to X, while nr_cpu_ids is greater than X. This
203 * normally is not a problem, except when CPU hotplugging
204 * is involved and then there might be more than X CPUs
205 * in the guest - which will not work as there is no
206 * hypercall to expand the max number of VCPUs an already
207 * running guest has. So cap it up to X. */
208 if (subtract)
209 nr_cpu_ids = nr_cpu_ids - subtract;
210#endif
211
197} 212}
198 213
199static void __init xen_smp_prepare_boot_cpu(void) 214static void __init xen_smp_prepare_boot_cpu(void)
diff --git a/arch/x86/xen/xen-asm.S b/arch/x86/xen/xen-asm.S
index 79d7362ad6d1..3e45aa000718 100644
--- a/arch/x86/xen/xen-asm.S
+++ b/arch/x86/xen/xen-asm.S
@@ -96,7 +96,7 @@ ENTRY(xen_restore_fl_direct)
96 96
97 /* check for unmasked and pending */ 97 /* check for unmasked and pending */
98 cmpw $0x0001, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_pending 98 cmpw $0x0001, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_pending
99 jz 1f 99 jnz 1f
1002: call check_events 1002: call check_events
1011: 1011:
102ENDPATCH(xen_restore_fl_direct) 102ENDPATCH(xen_restore_fl_direct)
diff --git a/arch/xtensa/include/asm/hardirq.h b/arch/xtensa/include/asm/hardirq.h
index 26664cef8f11..91695a135498 100644
--- a/arch/xtensa/include/asm/hardirq.h
+++ b/arch/xtensa/include/asm/hardirq.h
@@ -11,9 +11,6 @@
11#ifndef _XTENSA_HARDIRQ_H 11#ifndef _XTENSA_HARDIRQ_H
12#define _XTENSA_HARDIRQ_H 12#define _XTENSA_HARDIRQ_H
13 13
14void ack_bad_irq(unsigned int irq);
15#define ack_bad_irq ack_bad_irq
16
17#include <asm-generic/hardirq.h> 14#include <asm-generic/hardirq.h>
18 15
19#endif /* _XTENSA_HARDIRQ_H */ 16#endif /* _XTENSA_HARDIRQ_H */
diff --git a/arch/xtensa/include/asm/io.h b/arch/xtensa/include/asm/io.h
index d04cd3a625fa..4beb43c087d3 100644
--- a/arch/xtensa/include/asm/io.h
+++ b/arch/xtensa/include/asm/io.h
@@ -14,6 +14,7 @@
14#ifdef __KERNEL__ 14#ifdef __KERNEL__
15#include <asm/byteorder.h> 15#include <asm/byteorder.h>
16#include <asm/page.h> 16#include <asm/page.h>
17#include <linux/bug.h>
17#include <linux/kernel.h> 18#include <linux/kernel.h>
18 19
19#include <linux/types.h> 20#include <linux/types.h>
diff --git a/arch/xtensa/kernel/signal.c b/arch/xtensa/kernel/signal.c
index b69b000349fc..d78869a00b11 100644
--- a/arch/xtensa/kernel/signal.c
+++ b/arch/xtensa/kernel/signal.c
@@ -496,6 +496,7 @@ int do_signal(struct pt_regs *regs, sigset_t *oldset)
496 signr = get_signal_to_deliver(&info, &ka, regs, NULL); 496 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
497 497
498 if (signr > 0) { 498 if (signr > 0) {
499 int ret;
499 500
500 /* Are we from a system call? */ 501 /* Are we from a system call? */
501 502