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-rw-r--r--arch/sh/drivers/pci/ops-landisk.c2
-rw-r--r--arch/sh/drivers/pci/ops-lboxre2.c5
-rw-r--r--arch/sh/drivers/pci/ops-r7780rp.c2
-rw-r--r--arch/sh/drivers/pci/ops-rts7751r2d.c7
-rw-r--r--arch/sh/drivers/pci/ops-sdk7780.c1
-rw-r--r--arch/sh/drivers/pci/ops-se7780.c1
-rw-r--r--arch/sh/drivers/pci/ops-sh7785lcr.c2
-rw-r--r--arch/sh/drivers/pci/ops-snapgear.c2
-rw-r--r--arch/sh/drivers/pci/ops-titan.c2
-rw-r--r--arch/sh/drivers/pci/pci-sh4.h4
-rw-r--r--arch/sh/drivers/pci/pci-sh7751.c15
-rw-r--r--arch/sh/drivers/pci/pci-sh7780.c15
12 files changed, 0 insertions, 58 deletions
diff --git a/arch/sh/drivers/pci/ops-landisk.c b/arch/sh/drivers/pci/ops-landisk.c
index c46911d95eca..178b77828aa9 100644
--- a/arch/sh/drivers/pci/ops-landisk.c
+++ b/arch/sh/drivers/pci/ops-landisk.c
@@ -39,8 +39,6 @@ static struct sh4_pci_address_map sh7751_pci_map = {
39 .base = SH7751_CS3_BASE_ADDR, 39 .base = SH7751_CS3_BASE_ADDR,
40 .size = (64 << 20), /* 64MB */ 40 .size = (64 << 20), /* 64MB */
41 }, 41 },
42
43 .flags = SH4_PCIC_NO_RESET,
44}; 42};
45 43
46int __init pcibios_init_platform(void) 44int __init pcibios_init_platform(void)
diff --git a/arch/sh/drivers/pci/ops-lboxre2.c b/arch/sh/drivers/pci/ops-lboxre2.c
index 781496bfb1f9..91cabd84f028 100644
--- a/arch/sh/drivers/pci/ops-lboxre2.c
+++ b/arch/sh/drivers/pci/ops-lboxre2.c
@@ -48,11 +48,6 @@ static struct sh4_pci_address_map sh7751_pci_map = {
48 .base = SH7751_CS3_BASE_ADDR, 48 .base = SH7751_CS3_BASE_ADDR,
49 .size = 0x04000000, 49 .size = 0x04000000,
50 }, 50 },
51 .window1 = {
52 .base = 0x00000000, /* Unused */
53 .size = 0x00000000, /* Unused */
54 },
55 .flags = SH4_PCIC_NO_RESET,
56}; 51};
57 52
58int __init pcibios_init_platform(void) 53int __init pcibios_init_platform(void)
diff --git a/arch/sh/drivers/pci/ops-r7780rp.c b/arch/sh/drivers/pci/ops-r7780rp.c
index c58f1cff9fba..8ec6d225ef9d 100644
--- a/arch/sh/drivers/pci/ops-r7780rp.c
+++ b/arch/sh/drivers/pci/ops-r7780rp.c
@@ -57,8 +57,6 @@ static struct sh4_pci_address_map sh7780_pci_map = {
57 .base = SH7780_CS3_BASE_ADDR, 57 .base = SH7780_CS3_BASE_ADDR,
58 .size = 0x04000000, 58 .size = 0x04000000,
59 }, 59 },
60
61 .flags = SH4_PCIC_NO_RESET,
62}; 60};
63 61
64int __init pcibios_init_platform(void) 62int __init pcibios_init_platform(void)
diff --git a/arch/sh/drivers/pci/ops-rts7751r2d.c b/arch/sh/drivers/pci/ops-rts7751r2d.c
index d374cd37f455..96b916c0d6c5 100644
--- a/arch/sh/drivers/pci/ops-rts7751r2d.c
+++ b/arch/sh/drivers/pci/ops-rts7751r2d.c
@@ -56,13 +56,6 @@ static struct sh4_pci_address_map sh7751_pci_map = {
56 .base = SH7751_CS3_BASE_ADDR, 56 .base = SH7751_CS3_BASE_ADDR,
57 .size = 0x04000000, 57 .size = 0x04000000,
58 }, 58 },
59
60 .window1 = {
61 .base = 0x00000000, /* Unused */
62 .size = 0x00000000, /* Unused */
63 },
64
65 .flags = SH4_PCIC_NO_RESET,
66}; 59};
67 60
68int __init pcibios_init_platform(void) 61int __init pcibios_init_platform(void)
diff --git a/arch/sh/drivers/pci/ops-sdk7780.c b/arch/sh/drivers/pci/ops-sdk7780.c
index b34fbc54a7c6..6a0b7c067831 100644
--- a/arch/sh/drivers/pci/ops-sdk7780.c
+++ b/arch/sh/drivers/pci/ops-sdk7780.c
@@ -62,7 +62,6 @@ static struct sh4_pci_address_map sdk7780_pci_map = {
62 .base = SH7780_CS3_BASE_ADDR, 62 .base = SH7780_CS3_BASE_ADDR,
63 .size = 0x04000000, 63 .size = 0x04000000,
64 }, 64 },
65 .flags = SH4_PCIC_NO_RESET,
66}; 65};
67 66
68int __init pcibios_init_platform(void) 67int __init pcibios_init_platform(void)
diff --git a/arch/sh/drivers/pci/ops-se7780.c b/arch/sh/drivers/pci/ops-se7780.c
index 47302077a0c8..583b8e82ff99 100644
--- a/arch/sh/drivers/pci/ops-se7780.c
+++ b/arch/sh/drivers/pci/ops-se7780.c
@@ -67,7 +67,6 @@ static struct sh4_pci_address_map se7780_pci_map = {
67 .base = SH7780_CS2_BASE_ADDR, 67 .base = SH7780_CS2_BASE_ADDR,
68 .size = 0x04000000, 68 .size = 0x04000000,
69 }, 69 },
70 .flags = SH4_PCIC_NO_RESET,
71}; 70};
72 71
73int __init pcibios_init_platform(void) 72int __init pcibios_init_platform(void)
diff --git a/arch/sh/drivers/pci/ops-sh7785lcr.c b/arch/sh/drivers/pci/ops-sh7785lcr.c
index afbb9bd47513..ab0d1decf2df 100644
--- a/arch/sh/drivers/pci/ops-sh7785lcr.c
+++ b/arch/sh/drivers/pci/ops-sh7785lcr.c
@@ -55,8 +55,6 @@ static struct sh4_pci_address_map sh7785_pci_map = {
55 .size = 0x20000000, 55 .size = 0x20000000,
56#endif 56#endif
57 }, 57 },
58
59 .flags = SH4_PCIC_NO_RESET,
60}; 58};
61 59
62int __init pcibios_init_platform(void) 60int __init pcibios_init_platform(void)
diff --git a/arch/sh/drivers/pci/ops-snapgear.c b/arch/sh/drivers/pci/ops-snapgear.c
index 2e254c6cf6c1..dd2c5df28307 100644
--- a/arch/sh/drivers/pci/ops-snapgear.c
+++ b/arch/sh/drivers/pci/ops-snapgear.c
@@ -54,8 +54,6 @@ static struct sh4_pci_address_map sh7751_pci_map = {
54 .base = SH7751_CS2_BASE_ADDR, 54 .base = SH7751_CS2_BASE_ADDR,
55 .size = SNAPGEAR_LSR1_SIZE, 55 .size = SNAPGEAR_LSR1_SIZE,
56 }, 56 },
57
58 .flags = SH4_PCIC_NO_RESET,
59}; 57};
60 58
61/* 59/*
diff --git a/arch/sh/drivers/pci/ops-titan.c b/arch/sh/drivers/pci/ops-titan.c
index 31ed03716a2c..e45bb62bf8ce 100644
--- a/arch/sh/drivers/pci/ops-titan.c
+++ b/arch/sh/drivers/pci/ops-titan.c
@@ -66,8 +66,6 @@ static struct sh4_pci_address_map sh7751_pci_map = {
66 .base = SH7751_CS2_BASE_ADDR, 66 .base = SH7751_CS2_BASE_ADDR,
67 .size = SH7751_MEM_REGION_SIZE*2, 67 .size = SH7751_MEM_REGION_SIZE*2,
68 }, 68 },
69
70 .flags = SH4_PCIC_NO_RESET,
71}; 69};
72 70
73int __init pcibios_init_platform(void) 71int __init pcibios_init_platform(void)
diff --git a/arch/sh/drivers/pci/pci-sh4.h b/arch/sh/drivers/pci/pci-sh4.h
index 90abfe3d39bb..3d5296cde622 100644
--- a/arch/sh/drivers/pci/pci-sh4.h
+++ b/arch/sh/drivers/pci/pci-sh4.h
@@ -149,9 +149,6 @@
149 #define SH4_PCIPDTR_PB0 0x000000001 /* Port 0 Enable */ 149 #define SH4_PCIPDTR_PB0 0x000000001 /* Port 0 Enable */
150#define SH4_PCIPDR 0x220 /* Port IO Data Register */ 150#define SH4_PCIPDR 0x220 /* Port IO Data Register */
151 151
152/* Flags */
153#define SH4_PCIC_NO_RESET 0x0001
154
155/* arch/sh/kernel/drivers/pci/ops-sh4.c */ 152/* arch/sh/kernel/drivers/pci/ops-sh4.c */
156extern struct pci_ops sh4_pci_ops; 153extern struct pci_ops sh4_pci_ops;
157int sh4_pci_check_direct(struct pci_channel *chan); 154int sh4_pci_check_direct(struct pci_channel *chan);
@@ -165,7 +162,6 @@ struct sh4_pci_address_space {
165struct sh4_pci_address_map { 162struct sh4_pci_address_map {
166 struct sh4_pci_address_space window0; 163 struct sh4_pci_address_space window0;
167 struct sh4_pci_address_space window1; 164 struct sh4_pci_address_space window1;
168 unsigned long flags;
169}; 165};
170 166
171static inline void pci_write_reg(struct pci_channel *chan, 167static inline void pci_write_reg(struct pci_channel *chan,
diff --git a/arch/sh/drivers/pci/pci-sh7751.c b/arch/sh/drivers/pci/pci-sh7751.c
index 2a6c7aab2d75..af8874436d2f 100644
--- a/arch/sh/drivers/pci/pci-sh7751.c
+++ b/arch/sh/drivers/pci/pci-sh7751.c
@@ -99,21 +99,6 @@ int __init sh7751_pcic_init(struct pci_channel *chan,
99 word = SH4_PCIPINT_D3 | SH4_PCIPINT_D0; 99 word = SH4_PCIPINT_D3 | SH4_PCIPINT_D0;
100 pci_write_reg(chan, word, SH4_PCIPINT); 100 pci_write_reg(chan, word, SH4_PCIPINT);
101 101
102 /*
103 * This code is unused for some boards as it is done in the
104 * bootloader and doing it here means the MAC addresses loaded
105 * by the bootloader get lost.
106 */
107 if (!(map->flags & SH4_PCIC_NO_RESET)) {
108 /* toggle PCI reset pin */
109 word = SH4_PCICR_PREFIX | SH4_PCICR_PRST;
110 pci_write_reg(chan, word, SH4_PCICR);
111 /* Wait for a long time... not 1 sec. but long enough */
112 mdelay(100);
113 word = SH4_PCICR_PREFIX;
114 pci_write_reg(chan, word, SH4_PCICR);
115 }
116
117 /* set the command/status bits to: 102 /* set the command/status bits to:
118 * Wait Cycle Control + Parity Enable + Bus Master + 103 * Wait Cycle Control + Parity Enable + Bus Master +
119 * Mem space enable 104 * Mem space enable
diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c
index 87a7f3b7a38f..282cabe15e36 100644
--- a/arch/sh/drivers/pci/pci-sh7780.c
+++ b/arch/sh/drivers/pci/pci-sh7780.c
@@ -96,21 +96,6 @@ int __init sh7780_pcic_init(struct pci_channel *chan,
96{ 96{
97 u32 word; 97 u32 word;
98 98
99 /*
100 * This code is unused for some boards as it is done in the
101 * bootloader and doing it here means the MAC addresses loaded
102 * by the bootloader get lost.
103 */
104 if (!(map->flags & SH4_PCIC_NO_RESET)) {
105 /* toggle PCI reset pin */
106 word = SH4_PCICR_PREFIX | SH4_PCICR_PRST;
107 pci_write_reg(chan, word, SH4_PCICR);
108 /* Wait for a long time... not 1 sec. but long enough */
109 mdelay(100);
110 word = SH4_PCICR_PREFIX;
111 pci_write_reg(chan, word, SH4_PCICR);
112 }
113
114 /* set the command/status bits to: 99 /* set the command/status bits to:
115 * Wait Cycle Control + Parity Enable + Bus Master + 100 * Wait Cycle Control + Parity Enable + Bus Master +
116 * Mem space enable 101 * Mem space enable