1 files changed, 50 insertions, 215 deletions

diff --git a/arch/xtensa/mm/misc.S b/arch/xtensa/mm/misc.S
index 327c0f17187c..ae085332c607 100644
--- a/arch/xtensa/mm/misc.S
+++ b/arch/xtensa/mm/misc.S
@@ -19,9 +19,8 @@
 #include <linux/linkage.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
-
-#include <xtensa/cacheasm.h>
-#include <xtensa/cacheattrasm.h>
+#include <asm/asmmacro.h>
+#include <asm/cacheasm.h>
 
 /* clear_page (page) */
 
@@ -74,104 +73,66 @@ ENTRY(copy_page)
 
         retw
 
-
 /*
- * void __flush_invalidate_cache_all(void)
+ * void __invalidate_icache_page(ulong start)
  */
 
-ENTRY(__flush_invalidate_cache_all)
+ENTRY(__invalidate_icache_page)
         entry   sp, 16
-        dcache_writeback_inv_all a2, a3
-        icache_invalidate_all a2, a3
-        retw
 
-/*
- * void __invalidate_icache_all(void)
- */
+        ___invalidate_icache_page a2 a3
+        isync
 
-ENTRY(__invalidate_icache_all)
-        entry   sp, 16
-        icache_invalidate_all a2, a3
         retw
 
 /*
- * void __flush_invalidate_dcache_all(void)
+ * void __invalidate_dcache_page(ulong start)
  */
 
-ENTRY(__flush_invalidate_dcache_all)
+ENTRY(__invalidate_dcache_page)
         entry   sp, 16
-        dcache_writeback_inv_all a2, a3
-        retw
-
 
-/*
- * void __flush_invalidate_cache_range(ulong start, ulong size)
- */
+        ___invalidate_dcache_page a2 a3
+        dsync
 
-ENTRY(__flush_invalidate_cache_range)
-        entry   sp, 16
-        mov     a4, a2
-        mov     a5, a3
-        dcache_writeback_inv_region a4, a5, a6
-        icache_invalidate_region a2, a3, a4
         retw
 
 /*
- * void __invalidate_icache_page(ulong start)
+ * void __flush_invalidate_dcache_page(ulong start)
  */
 
-ENTRY(__invalidate_icache_page)
+ENTRY(__flush_invalidate_dcache_page)
         entry   sp, 16
-        movi    a3, PAGE_SIZE
-        icache_invalidate_region a2, a3, a4
-        retw
 
-/*
- * void __invalidate_dcache_page(ulong start)
- */
+        ___flush_invalidate_dcache_page a2 a3
 
-ENTRY(__invalidate_dcache_page)
-        entry   sp, 16
-        movi    a3, PAGE_SIZE
-        dcache_invalidate_region a2, a3, a4
+        dsync
         retw
 
 /*
- * void __invalidate_icache_range(ulong start, ulong size)
+ * void __flush_dcache_page(ulong start)
  */
 
-ENTRY(__invalidate_icache_range)
+ENTRY(__flush_dcache_page)
         entry   sp, 16
-        icache_invalidate_region a2, a3, a4
-        retw
 
-/*
- * void __invalidate_dcache_range(ulong start, ulong size)
- */
+        ___flush_dcache_page a2 a3
 
-ENTRY(__invalidate_dcache_range)
-        entry   sp, 16
-        dcache_invalidate_region a2, a3, a4
+        dsync
         retw
 
-/*
- * void __flush_dcache_page(ulong start)
- */
 
-ENTRY(__flush_dcache_page)
-        entry   sp, 16
-        movi    a3, PAGE_SIZE
-        dcache_writeback_region a2, a3, a4
-        retw
 
 /*
- * void __flush_invalidate_dcache_page(ulong start)
+ * void __invalidate_icache_range(ulong start, ulong size)
  */
 
-ENTRY(__flush_invalidate_dcache_page)
+ENTRY(__invalidate_icache_range)
         entry   sp, 16
-        movi    a3, PAGE_SIZE
-        dcache_writeback_inv_region a2, a3, a4
+
+        ___invalidate_icache_range a2 a3 a4
+        isync
+
         retw
 
 /*
@@ -180,195 +141,69 @@ ENTRY(__flush_invalidate_dcache_page)
 
 ENTRY(__flush_invalidate_dcache_range)
         entry   sp, 16
-        dcache_writeback_inv_region a2, a3, a4
-        retw
 
-/*
- * void __invalidate_dcache_all(void)
- */
+        ___flush_invalidate_dcache_range a2 a3 a4
+        dsync
 
-ENTRY(__invalidate_dcache_all)
-        entry   sp, 16
-        dcache_invalidate_all a2, a3
         retw
 
 /*
- * void __flush_invalidate_dcache_page_phys(ulong start)
+ * void _flush_dcache_range(ulong start, ulong size)
  */
 
-ENTRY(__flush_invalidate_dcache_page_phys)
+ENTRY(__flush_dcache_range)
         entry   sp, 16
 
-        movi    a3, XCHAL_DCACHE_SIZE
-        movi    a4, PAGE_MASK | 1
-        addi    a2, a2, 1
-
-1:      addi    a3, a3, -XCHAL_DCACHE_LINESIZE
-
-        ldct    a6, a3
+        ___flush_dcache_range a2 a3 a4
         dsync
-        and     a6, a6, a4
-        beq     a6, a2, 2f
-        bgeui   a3, 2, 1b
-        retw
 
-2:      diwbi   a3, 0
-        bgeui   a3, 2, 1b
         retw
 
-ENTRY(check_dcache_low0)
-        entry   sp, 16
-
-        movi    a3, XCHAL_DCACHE_SIZE / 4
-        movi    a4, PAGE_MASK | 1
-        addi    a2, a2, 1
-
-1:      addi    a3, a3, -XCHAL_DCACHE_LINESIZE
-
-        ldct    a6, a3
-        dsync
-        and     a6, a6, a4
-        beq     a6, a2, 2f
-        bgeui   a3, 2, 1b
-        retw
-
-2:      j 2b
-
-ENTRY(check_dcache_high0)
-        entry   sp, 16
-
-        movi    a5, XCHAL_DCACHE_SIZE / 4
-        movi    a3, XCHAL_DCACHE_SIZE / 2
-        movi    a4, PAGE_MASK | 1
-        addi    a2, a2, 1
-
-1:      addi    a3, a3, -XCHAL_DCACHE_LINESIZE
-        addi    a5, a5, -XCHAL_DCACHE_LINESIZE
-
-        ldct    a6, a3
-        dsync
-        and     a6, a6, a4
-        beq     a6, a2, 2f
-        bgeui   a5, 2, 1b
-        retw
-
-2:      j 2b
+/*
+ * void _invalidate_dcache_range(ulong start, ulong size)
+ */
 
-ENTRY(check_dcache_low1)
+ENTRY(__invalidate_dcache_range)
         entry   sp, 16
 
-        movi    a5, XCHAL_DCACHE_SIZE / 4
-        movi    a3, XCHAL_DCACHE_SIZE * 3 / 4
-        movi    a4, PAGE_MASK | 1
-        addi    a2, a2, 1
+        ___invalidate_dcache_range a2 a3 a4
 
-1:      addi    a3, a3, -XCHAL_DCACHE_LINESIZE
-        addi    a5, a5, -XCHAL_DCACHE_LINESIZE
 
-        ldct    a6, a3
-        dsync
-        and     a6, a6, a4
-        beq     a6, a2, 2f
-        bgeui   a5, 2, 1b
         retw
 
-2:      j 2b
+/*
+ * void _invalidate_icache_all(void)
+ */
 
-ENTRY(check_dcache_high1)
+ENTRY(__invalidate_icache_all)
         entry   sp, 16
 
-        movi    a5, XCHAL_DCACHE_SIZE / 4
-        movi    a3, XCHAL_DCACHE_SIZE
-        movi    a4, PAGE_MASK | 1
-        addi    a2, a2, 1
-
-1:      addi    a3, a3, -XCHAL_DCACHE_LINESIZE
-        addi    a5, a5, -XCHAL_DCACHE_LINESIZE
+        ___invalidate_icache_all a2 a3
+        isync
 
-        ldct    a6, a3
-        dsync
-        and     a6, a6, a4
-        beq     a6, a2, 2f
-        bgeui   a5, 2, 1b
         retw
 
-2:      j 2b
-
-
 /*
- * void __invalidate_icache_page_phys(ulong start)
+ * void _flush_invalidate_dcache_all(void)
  */
 
-ENTRY(__invalidate_icache_page_phys)
+ENTRY(__flush_invalidate_dcache_all)
         entry   sp, 16
 
-        movi    a3, XCHAL_ICACHE_SIZE
-        movi    a4, PAGE_MASK | 1
-        addi    a2, a2, 1
-
-1:      addi    a3, a3, -XCHAL_ICACHE_LINESIZE
-
-        lict    a6, a3
-        isync
-        and     a6, a6, a4
-        beq     a6, a2, 2f
-        bgeui   a3, 2, 1b
-        retw
+        ___flush_invalidate_dcache_all a2 a3
+        dsync
 
-2:      iii     a3, 0
-        bgeui   a3, 2, 1b
         retw
 
+/*
+ * void _invalidate_dcache_all(void)
+ */
 
-#if 0
-
-        movi    a3, XCHAL_DCACHE_WAYS - 1
-        movi    a4, PAGE_SIZE
-
-1:      mov     a5, a2
-        add     a6, a2, a4
-
-2:      diwbi   a5, 0
-        diwbi   a5, XCHAL_DCACHE_LINESIZE
-        diwbi   a5, XCHAL_DCACHE_LINESIZE * 2
-        diwbi   a5, XCHAL_DCACHE_LINESIZE * 3
-
-        addi    a5, a5, XCHAL_DCACHE_LINESIZE * 4
-        blt     a5, a6, 2b
-
-        addi    a3, a3, -1
-        addi    a2, a2, XCHAL_DCACHE_SIZE / XCHAL_DCACHE_WAYS
-        bgez    a3, 1b
-
-        retw
-
-ENTRY(__invalidate_icache_page_index)
+ENTRY(__invalidate_dcache_all)
         entry   sp, 16
 
-        movi    a3, XCHAL_ICACHE_WAYS - 1
-        movi    a4, PAGE_SIZE
-
-1:      mov     a5, a2
-        add     a6, a2, a4
-
-2:      iii     a5, 0
-        iii     a5, XCHAL_ICACHE_LINESIZE
-        iii     a5, XCHAL_ICACHE_LINESIZE * 2
-        iii     a5, XCHAL_ICACHE_LINESIZE * 3
-
-        addi    a5, a5, XCHAL_ICACHE_LINESIZE * 4
-        blt     a5, a6, 2b
-
-        addi    a3, a3, -1
-        addi    a2, a2, XCHAL_ICACHE_SIZE / XCHAL_ICACHE_WAYS
-        bgez    a3, 2b
+        ___invalidate_dcache_all a2 a3
+        dsync
 
         retw
 
-#endif
-
-
-
-
-
-