aboutsummaryrefslogtreecommitdiffstats
path: root/arch/xtensa/include/asm/cmpxchg.h
diff options
context:
space:
mode:
Diffstat (limited to 'arch/xtensa/include/asm/cmpxchg.h')
-rw-r--r--arch/xtensa/include/asm/cmpxchg.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/xtensa/include/asm/cmpxchg.h b/arch/xtensa/include/asm/cmpxchg.h
index e32149063d83..64dad04a9d27 100644
--- a/arch/xtensa/include/asm/cmpxchg.h
+++ b/arch/xtensa/include/asm/cmpxchg.h
@@ -27,7 +27,7 @@ __cmpxchg_u32(volatile int *p, int old, int new)
27 "bne %0, %2, 1f \n\t" 27 "bne %0, %2, 1f \n\t"
28 "s32i %3, %1, 0 \n\t" 28 "s32i %3, %1, 0 \n\t"
29 "1: \n\t" 29 "1: \n\t"
30 "wsr a15, "__stringify(PS)" \n\t" 30 "wsr a15, ps \n\t"
31 "rsync \n\t" 31 "rsync \n\t"
32 : "=&a" (old) 32 : "=&a" (old)
33 : "a" (p), "a" (old), "r" (new) 33 : "a" (p), "a" (old), "r" (new)
@@ -97,7 +97,7 @@ static inline unsigned long xchg_u32(volatile int * m, unsigned long val)
97 __asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t" 97 __asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t"
98 "l32i %0, %1, 0 \n\t" 98 "l32i %0, %1, 0 \n\t"
99 "s32i %2, %1, 0 \n\t" 99 "s32i %2, %1, 0 \n\t"
100 "wsr a15, "__stringify(PS)" \n\t" 100 "wsr a15, ps \n\t"
101 "rsync \n\t" 101 "rsync \n\t"
102 : "=&a" (tmp) 102 : "=&a" (tmp)
103 : "a" (m), "a" (val) 103 : "a" (m), "a" (val)