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-rw-r--r--arch/x86_64/kernel/mpparse.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/x86_64/kernel/mpparse.c b/arch/x86_64/kernel/mpparse.c
index 1105250bf02c..dc49bfb6db0a 100644
--- a/arch/x86_64/kernel/mpparse.c
+++ b/arch/x86_64/kernel/mpparse.c
@@ -915,7 +915,7 @@ void __init mp_config_acpi_legacy_irqs (void)
915 915
916#define MAX_GSI_NUM 4096 916#define MAX_GSI_NUM 4096
917 917
918int mp_register_gsi(u32 gsi, int edge_level, int active_high_low) 918int mp_register_gsi(u32 gsi, int triggering, int polarity)
919{ 919{
920 int ioapic = -1; 920 int ioapic = -1;
921 int ioapic_pin = 0; 921 int ioapic_pin = 0;
@@ -964,7 +964,7 @@ int mp_register_gsi(u32 gsi, int edge_level, int active_high_low)
964 964
965 mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1<<bit); 965 mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1<<bit);
966 966
967 if (edge_level) { 967 if (triggering == ACPI_LEVEL_SENSITIVE) {
968 /* 968 /*
969 * For PCI devices assign IRQs in order, avoiding gaps 969 * For PCI devices assign IRQs in order, avoiding gaps
970 * due to unused I/O APIC pins. 970 * due to unused I/O APIC pins.
@@ -986,8 +986,8 @@ int mp_register_gsi(u32 gsi, int edge_level, int active_high_low)
986 } 986 }
987 987
988 io_apic_set_pci_routing(ioapic, ioapic_pin, gsi, 988 io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
989 edge_level == ACPI_EDGE_SENSITIVE ? 0 : 1, 989 triggering == ACPI_EDGE_SENSITIVE ? 0 : 1,
990 active_high_low == ACPI_ACTIVE_HIGH ? 0 : 1); 990 polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
991 return gsi; 991 return gsi;
992} 992}
993 993