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Diffstat (limited to 'arch/x86_64/kernel/mce_intel.c')
-rw-r--r--arch/x86_64/kernel/mce_intel.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86_64/kernel/mce_intel.c b/arch/x86_64/kernel/mce_intel.c
index 3ef845e8d3b0..8f533d2c40cb 100644
--- a/arch/x86_64/kernel/mce_intel.c
+++ b/arch/x86_64/kernel/mce_intel.c
@@ -80,7 +80,7 @@ static void __cpuinit intel_init_thermal(struct cpuinfo_x86 *c)
80 80
81 h = THERMAL_APIC_VECTOR; 81 h = THERMAL_APIC_VECTOR;
82 h |= (APIC_DM_FIXED | APIC_LVT_MASKED); 82 h |= (APIC_DM_FIXED | APIC_LVT_MASKED);
83 apic_write_around(APIC_LVTTHMR, h); 83 apic_write(APIC_LVTTHMR, h);
84 84
85 rdmsr(MSR_IA32_THERM_INTERRUPT, l, h); 85 rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);
86 wrmsr(MSR_IA32_THERM_INTERRUPT, l | 0x03, h); 86 wrmsr(MSR_IA32_THERM_INTERRUPT, l | 0x03, h);
@@ -89,7 +89,7 @@ static void __cpuinit intel_init_thermal(struct cpuinfo_x86 *c)
89 wrmsr(MSR_IA32_MISC_ENABLE, l | (1 << 3), h); 89 wrmsr(MSR_IA32_MISC_ENABLE, l | (1 << 3), h);
90 90
91 l = apic_read(APIC_LVTTHMR); 91 l = apic_read(APIC_LVTTHMR);
92 apic_write_around(APIC_LVTTHMR, l & ~APIC_LVT_MASKED); 92 apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);
93 printk(KERN_INFO "CPU%d: Thermal monitoring enabled (%s)\n", 93 printk(KERN_INFO "CPU%d: Thermal monitoring enabled (%s)\n",
94 cpu, tm2 ? "TM2" : "TM1"); 94 cpu, tm2 ? "TM2" : "TM1");
95 return; 95 return;