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-rw-r--r--arch/x86_64/kernel/head.S9
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/x86_64/kernel/head.S b/arch/x86_64/kernel/head.S
index 15290968e49d..1d216a9fc6d8 100644
--- a/arch/x86_64/kernel/head.S
+++ b/arch/x86_64/kernel/head.S
@@ -379,7 +379,7 @@ gdt:
379 * Also sysret mandates a special GDT layout 379 * Also sysret mandates a special GDT layout
380 */ 380 */
381 381
382.align L1_CACHE_BYTES 382.align PAGE_SIZE
383 383
384/* The TLS descriptors are currently at a different place compared to i386. 384/* The TLS descriptors are currently at a different place compared to i386.
385 Hopefully nobody expects them at a fixed place (Wine?) */ 385 Hopefully nobody expects them at a fixed place (Wine?) */
@@ -401,10 +401,11 @@ ENTRY(cpu_gdt_table)
401gdt_end: 401gdt_end:
402 /* asm/segment.h:GDT_ENTRIES must match this */ 402 /* asm/segment.h:GDT_ENTRIES must match this */
403 /* This should be a multiple of the cache line size */ 403 /* This should be a multiple of the cache line size */
404 /* GDTs of other CPUs: */ 404 /* GDTs of other CPUs are now dynamically allocated */
405 .fill (GDT_SIZE * NR_CPUS) - (gdt_end - cpu_gdt_table) 405
406 /* zero the remaining page */
407 .fill PAGE_SIZE / 8 - GDT_ENTRIES,8,0
406 408
407 .align L1_CACHE_BYTES
408ENTRY(idt_table) 409ENTRY(idt_table)
409 .rept 256 410 .rept 256
410 .quad 0 411 .quad 0