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-rw-r--r--arch/x86/platform/intel-mid/intel-mid.c451
1 files changed, 1 insertions, 450 deletions
diff --git a/arch/x86/platform/intel-mid/intel-mid.c b/arch/x86/platform/intel-mid/intel-mid.c
index 40a3ff8e53e5..40915698b9b7 100644
--- a/arch/x86/platform/intel-mid/intel-mid.c
+++ b/arch/x86/platform/intel-mid/intel-mid.c
@@ -18,19 +18,9 @@
18#include <linux/interrupt.h> 18#include <linux/interrupt.h>
19#include <linux/scatterlist.h> 19#include <linux/scatterlist.h>
20#include <linux/sfi.h> 20#include <linux/sfi.h>
21#include <linux/intel_pmic_gpio.h>
22#include <linux/spi/spi.h>
23#include <linux/i2c.h>
24#include <linux/platform_data/pca953x.h>
25#include <linux/gpio_keys.h>
26#include <linux/input.h>
27#include <linux/platform_device.h>
28#include <linux/irq.h> 21#include <linux/irq.h>
29#include <linux/module.h> 22#include <linux/module.h>
30#include <linux/notifier.h> 23#include <linux/notifier.h>
31#include <linux/mfd/intel_msic.h>
32#include <linux/gpio.h>
33#include <linux/i2c/tc35876x.h>
34 24
35#include <asm/setup.h> 25#include <asm/setup.h>
36#include <asm/mpspec_def.h> 26#include <asm/mpspec_def.h>
@@ -68,19 +58,11 @@
68 58
69enum intel_mid_timer_options intel_mid_timer_options; 59enum intel_mid_timer_options intel_mid_timer_options;
70 60
71static u32 sfi_mtimer_usage[SFI_MTMR_MAX_NUM];
72static struct sfi_timer_table_entry sfi_mtimer_array[SFI_MTMR_MAX_NUM];
73enum intel_mid_cpu_type __intel_mid_cpu_chip; 61enum intel_mid_cpu_type __intel_mid_cpu_chip;
74EXPORT_SYMBOL_GPL(__intel_mid_cpu_chip); 62EXPORT_SYMBOL_GPL(__intel_mid_cpu_chip);
75 63
76int sfi_mtimer_num;
77
78struct sfi_rtc_table_entry sfi_mrtc_array[SFI_MRTC_MAX];
79EXPORT_SYMBOL_GPL(sfi_mrtc_array);
80int sfi_mrtc_num;
81static void __init ipc_device_handler(struct sfi_device_table_entry *pentry, 64static void __init ipc_device_handler(struct sfi_device_table_entry *pentry,
82 struct devs_id *dev); 65 struct devs_id *dev);
83
84static void intel_mid_power_off(void) 66static void intel_mid_power_off(void)
85{ 67{
86} 68}
@@ -90,114 +72,6 @@ static void intel_mid_reboot(void)
90 intel_scu_ipc_simple_command(IPCMSG_COLD_BOOT, 0); 72 intel_scu_ipc_simple_command(IPCMSG_COLD_BOOT, 0);
91} 73}
92 74
93/* parse all the mtimer info to a static mtimer array */
94static int __init sfi_parse_mtmr(struct sfi_table_header *table)
95{
96 struct sfi_table_simple *sb;
97 struct sfi_timer_table_entry *pentry;
98 struct mpc_intsrc mp_irq;
99 int totallen;
100
101 sb = (struct sfi_table_simple *)table;
102 if (!sfi_mtimer_num) {
103 sfi_mtimer_num = SFI_GET_NUM_ENTRIES(sb,
104 struct sfi_timer_table_entry);
105 pentry = (struct sfi_timer_table_entry *) sb->pentry;
106 totallen = sfi_mtimer_num * sizeof(*pentry);
107 memcpy(sfi_mtimer_array, pentry, totallen);
108 }
109
110 pr_debug("SFI MTIMER info (num = %d):\n", sfi_mtimer_num);
111 pentry = sfi_mtimer_array;
112 for (totallen = 0; totallen < sfi_mtimer_num; totallen++, pentry++) {
113 pr_debug("timer[%d]: paddr = 0x%08x, freq = %dHz,"
114 " irq = %d\n", totallen, (u32)pentry->phys_addr,
115 pentry->freq_hz, pentry->irq);
116 if (!pentry->irq)
117 continue;
118 mp_irq.type = MP_INTSRC;
119 mp_irq.irqtype = mp_INT;
120/* triggering mode edge bit 2-3, active high polarity bit 0-1 */
121 mp_irq.irqflag = 5;
122 mp_irq.srcbus = MP_BUS_ISA;
123 mp_irq.srcbusirq = pentry->irq; /* IRQ */
124 mp_irq.dstapic = MP_APIC_ALL;
125 mp_irq.dstirq = pentry->irq;
126 mp_save_irq(&mp_irq);
127 }
128
129 return 0;
130}
131
132struct sfi_timer_table_entry *sfi_get_mtmr(int hint)
133{
134 int i;
135 if (hint < sfi_mtimer_num) {
136 if (!sfi_mtimer_usage[hint]) {
137 pr_debug("hint taken for timer %d irq %d\n",
138 hint, sfi_mtimer_array[hint].irq);
139 sfi_mtimer_usage[hint] = 1;
140 return &sfi_mtimer_array[hint];
141 }
142 }
143 /* take the first timer available */
144 for (i = 0; i < sfi_mtimer_num;) {
145 if (!sfi_mtimer_usage[i]) {
146 sfi_mtimer_usage[i] = 1;
147 return &sfi_mtimer_array[i];
148 }
149 i++;
150 }
151 return NULL;
152}
153
154void sfi_free_mtmr(struct sfi_timer_table_entry *mtmr)
155{
156 int i;
157 for (i = 0; i < sfi_mtimer_num;) {
158 if (mtmr->irq == sfi_mtimer_array[i].irq) {
159 sfi_mtimer_usage[i] = 0;
160 return;
161 }
162 i++;
163 }
164}
165
166/* parse all the mrtc info to a global mrtc array */
167int __init sfi_parse_mrtc(struct sfi_table_header *table)
168{
169 struct sfi_table_simple *sb;
170 struct sfi_rtc_table_entry *pentry;
171 struct mpc_intsrc mp_irq;
172
173 int totallen;
174
175 sb = (struct sfi_table_simple *)table;
176 if (!sfi_mrtc_num) {
177 sfi_mrtc_num = SFI_GET_NUM_ENTRIES(sb,
178 struct sfi_rtc_table_entry);
179 pentry = (struct sfi_rtc_table_entry *)sb->pentry;
180 totallen = sfi_mrtc_num * sizeof(*pentry);
181 memcpy(sfi_mrtc_array, pentry, totallen);
182 }
183
184 pr_debug("SFI RTC info (num = %d):\n", sfi_mrtc_num);
185 pentry = sfi_mrtc_array;
186 for (totallen = 0; totallen < sfi_mrtc_num; totallen++, pentry++) {
187 pr_debug("RTC[%d]: paddr = 0x%08x, irq = %d\n",
188 totallen, (u32)pentry->phys_addr, pentry->irq);
189 mp_irq.type = MP_INTSRC;
190 mp_irq.irqtype = mp_INT;
191 mp_irq.irqflag = 0xf; /* level trigger and active low */
192 mp_irq.srcbus = MP_BUS_ISA;
193 mp_irq.srcbusirq = pentry->irq; /* IRQ */
194 mp_irq.dstapic = MP_APIC_ALL;
195 mp_irq.dstirq = pentry->irq;
196 mp_save_irq(&mp_irq);
197 }
198 return 0;
199}
200
201static unsigned long __init intel_mid_calibrate_tsc(void) 75static unsigned long __init intel_mid_calibrate_tsc(void)
202{ 76{
203 unsigned long fast_calibrate; 77 unsigned long fast_calibrate;
@@ -339,55 +213,6 @@ static inline int __init setup_x86_intel_mid_timer(char *arg)
339} 213}
340__setup("x86_intel_mid_timer=", setup_x86_intel_mid_timer); 214__setup("x86_intel_mid_timer=", setup_x86_intel_mid_timer);
341 215
342/*
343 * Parsing GPIO table first, since the DEVS table will need this table
344 * to map the pin name to the actual pin.
345 */
346static struct sfi_gpio_table_entry *gpio_table;
347static int gpio_num_entry;
348
349static int __init sfi_parse_gpio(struct sfi_table_header *table)
350{
351 struct sfi_table_simple *sb;
352 struct sfi_gpio_table_entry *pentry;
353 int num, i;
354
355 if (gpio_table)
356 return 0;
357 sb = (struct sfi_table_simple *)table;
358 num = SFI_GET_NUM_ENTRIES(sb, struct sfi_gpio_table_entry);
359 pentry = (struct sfi_gpio_table_entry *)sb->pentry;
360
361 gpio_table = kmalloc(num * sizeof(*pentry), GFP_KERNEL);
362 if (!gpio_table)
363 return -1;
364 memcpy(gpio_table, pentry, num * sizeof(*pentry));
365 gpio_num_entry = num;
366
367 pr_debug("GPIO pin info:\n");
368 for (i = 0; i < num; i++, pentry++)
369 pr_debug("info[%2d]: controller = %16.16s, pin_name = %16.16s,"
370 " pin = %d\n", i,
371 pentry->controller_name,
372 pentry->pin_name,
373 pentry->pin_no);
374 return 0;
375}
376
377static int get_gpio_by_name(const char *name)
378{
379 struct sfi_gpio_table_entry *pentry = gpio_table;
380 int i;
381
382 if (!pentry)
383 return -1;
384 for (i = 0; i < gpio_num_entry; i++, pentry++) {
385 if (!strncmp(name, pentry->pin_name, SFI_NAME_LEN))
386 return pentry->pin_no;
387 }
388 return -1;
389}
390
391/* the offset for the mapping of global gpio pin to irq */ 216/* the offset for the mapping of global gpio pin to irq */
392#define INTEL_MID_IRQ_OFFSET 0x100 217#define INTEL_MID_IRQ_OFFSET 0x100
393 218
@@ -703,197 +528,6 @@ static const struct devs_id __initconst device_ids[] = {
703 { 0 } 528 { 0 }
704}; 529};
705 530
706#define MAX_IPCDEVS 24
707static struct platform_device *ipc_devs[MAX_IPCDEVS];
708static int ipc_next_dev;
709
710#define MAX_SCU_SPI 24
711static struct spi_board_info *spi_devs[MAX_SCU_SPI];
712static int spi_next_dev;
713
714#define MAX_SCU_I2C 24
715static struct i2c_board_info *i2c_devs[MAX_SCU_I2C];
716static int i2c_bus[MAX_SCU_I2C];
717static int i2c_next_dev;
718
719static void __init intel_scu_device_register(struct platform_device *pdev)
720{
721 if (ipc_next_dev == MAX_IPCDEVS)
722 pr_err("too many SCU IPC devices");
723 else
724 ipc_devs[ipc_next_dev++] = pdev;
725}
726
727static void __init intel_scu_spi_device_register(struct spi_board_info *sdev)
728{
729 struct spi_board_info *new_dev;
730
731 if (spi_next_dev == MAX_SCU_SPI) {
732 pr_err("too many SCU SPI devices");
733 return;
734 }
735
736 new_dev = kzalloc(sizeof(*sdev), GFP_KERNEL);
737 if (!new_dev) {
738 pr_err("failed to alloc mem for delayed spi dev %s\n",
739 sdev->modalias);
740 return;
741 }
742 memcpy(new_dev, sdev, sizeof(*sdev));
743
744 spi_devs[spi_next_dev++] = new_dev;
745}
746
747static void __init intel_scu_i2c_device_register(int bus,
748 struct i2c_board_info *idev)
749{
750 struct i2c_board_info *new_dev;
751
752 if (i2c_next_dev == MAX_SCU_I2C) {
753 pr_err("too many SCU I2C devices");
754 return;
755 }
756
757 new_dev = kzalloc(sizeof(*idev), GFP_KERNEL);
758 if (!new_dev) {
759 pr_err("failed to alloc mem for delayed i2c dev %s\n",
760 idev->type);
761 return;
762 }
763 memcpy(new_dev, idev, sizeof(*idev));
764
765 i2c_bus[i2c_next_dev] = bus;
766 i2c_devs[i2c_next_dev++] = new_dev;
767}
768
769BLOCKING_NOTIFIER_HEAD(intel_scu_notifier);
770EXPORT_SYMBOL_GPL(intel_scu_notifier);
771
772/* Called by IPC driver */
773void intel_scu_devices_create(void)
774{
775 int i;
776
777 for (i = 0; i < ipc_next_dev; i++)
778 platform_device_add(ipc_devs[i]);
779
780 for (i = 0; i < spi_next_dev; i++)
781 spi_register_board_info(spi_devs[i], 1);
782
783 for (i = 0; i < i2c_next_dev; i++) {
784 struct i2c_adapter *adapter;
785 struct i2c_client *client;
786
787 adapter = i2c_get_adapter(i2c_bus[i]);
788 if (adapter) {
789 client = i2c_new_device(adapter, i2c_devs[i]);
790 if (!client)
791 pr_err("can't create i2c device %s\n",
792 i2c_devs[i]->type);
793 } else
794 i2c_register_board_info(i2c_bus[i], i2c_devs[i], 1);
795 }
796 intel_scu_notifier_post(SCU_AVAILABLE, NULL);
797}
798EXPORT_SYMBOL_GPL(intel_scu_devices_create);
799
800/* Called by IPC driver */
801void intel_scu_devices_destroy(void)
802{
803 int i;
804
805 intel_scu_notifier_post(SCU_DOWN, NULL);
806
807 for (i = 0; i < ipc_next_dev; i++)
808 platform_device_del(ipc_devs[i]);
809}
810EXPORT_SYMBOL_GPL(intel_scu_devices_destroy);
811
812static void __init install_irq_resource(struct platform_device *pdev, int irq)
813{
814 /* Single threaded */
815 static struct resource __initdata res = {
816 .name = "IRQ",
817 .flags = IORESOURCE_IRQ,
818 };
819 res.start = irq;
820 platform_device_add_resources(pdev, &res, 1);
821}
822
823static void __init sfi_handle_ipc_dev(struct sfi_device_table_entry *pentry,
824 struct devs_id *dev)
825{
826 struct platform_device *pdev;
827 void *pdata = NULL;
828
829 pr_debug("IPC bus, name = %16.16s, irq = 0x%2x\n",
830 pentry->name, pentry->irq);
831 pdata = dev->get_platform_data(pentry);
832
833 pdev = platform_device_alloc(pentry->name, 0);
834 if (pdev == NULL) {
835 pr_err("out of memory for SFI platform device '%s'.\n",
836 pentry->name);
837 return;
838 }
839 install_irq_resource(pdev, pentry->irq);
840
841 pdev->dev.platform_data = pdata;
842 platform_device_add(pdev);
843}
844
845static void __init sfi_handle_spi_dev(struct sfi_device_table_entry *pentry,
846 struct devs_id *dev)
847{
848 struct spi_board_info spi_info;
849 void *pdata = NULL;
850
851 memset(&spi_info, 0, sizeof(spi_info));
852 strncpy(spi_info.modalias, pentry->name, SFI_NAME_LEN);
853 spi_info.irq = ((pentry->irq == (u8)0xff) ? 0 : pentry->irq);
854 spi_info.bus_num = pentry->host_num;
855 spi_info.chip_select = pentry->addr;
856 spi_info.max_speed_hz = pentry->max_freq;
857 pr_debug("SPI bus=%d, name=%16.16s, irq=0x%2x, max_freq=%d, cs=%d\n",
858 spi_info.bus_num,
859 spi_info.modalias,
860 spi_info.irq,
861 spi_info.max_speed_hz,
862 spi_info.chip_select);
863
864 pdata = dev->get_platform_data(&spi_info);
865
866 spi_info.platform_data = pdata;
867 if (dev->delay)
868 intel_scu_spi_device_register(&spi_info);
869 else
870 spi_register_board_info(&spi_info, 1);
871}
872
873static void __init sfi_handle_i2c_dev(struct sfi_device_table_entry *pentry,
874 struct devs_id *dev)
875{
876 struct i2c_board_info i2c_info;
877 void *pdata = NULL;
878
879 memset(&i2c_info, 0, sizeof(i2c_info));
880 strncpy(i2c_info.type, pentry->name, SFI_NAME_LEN);
881 i2c_info.irq = ((pentry->irq == (u8)0xff) ? 0 : pentry->irq);
882 i2c_info.addr = pentry->addr;
883 pr_debug("I2C bus = %d, name = %16.16s, irq = 0x%2x, addr = 0x%x\n",
884 pentry->host_num,
885 i2c_info.type,
886 i2c_info.irq,
887 i2c_info.addr);
888 pdata = dev->get_platform_data(&i2c_info);
889 i2c_info.platform_data = pdata;
890
891 if (dev->delay)
892 intel_scu_i2c_device_register(pentry->host_num, &i2c_info);
893 else
894 i2c_register_board_info(pentry->host_num, &i2c_info, 1);
895}
896
897static void __init ipc_device_handler(struct sfi_device_table_entry *pentry, 531static void __init ipc_device_handler(struct sfi_device_table_entry *pentry,
898 struct devs_id *dev) 532 struct devs_id *dev)
899{ 533{
@@ -934,89 +568,6 @@ static void __init ipc_device_handler(struct sfi_device_table_entry *pentry,
934 intel_scu_device_register(pdev); 568 intel_scu_device_register(pdev);
935} 569}
936 570
937static struct devs_id __init *get_device_id(u8 type, char *name)
938{
939 struct devs_id *dev = device_ids;
940
941 if (device_ids == NULL)
942 return NULL;
943
944 while (dev->name[0]) {
945 if (dev->type == type &&
946 !strncmp(dev->name, name, SFI_NAME_LEN)) {
947 return dev;
948 }
949 dev++;
950 }
951
952 return NULL;
953}
954
955static int __init sfi_parse_devs(struct sfi_table_header *table)
956{
957 struct sfi_table_simple *sb;
958 struct sfi_device_table_entry *pentry;
959 struct devs_id *dev = NULL;
960 int num, i;
961 int ioapic;
962 struct io_apic_irq_attr irq_attr;
963
964 sb = (struct sfi_table_simple *)table;
965 num = SFI_GET_NUM_ENTRIES(sb, struct sfi_device_table_entry);
966 pentry = (struct sfi_device_table_entry *)sb->pentry;
967
968 for (i = 0; i < num; i++, pentry++) {
969 int irq = pentry->irq;
970
971 if (irq != (u8)0xff) { /* native RTE case */
972 /* these SPI2 devices are not exposed to system as PCI
973 * devices, but they have separate RTE entry in IOAPIC
974 * so we have to enable them one by one here
975 */
976 ioapic = mp_find_ioapic(irq);
977 irq_attr.ioapic = ioapic;
978 irq_attr.ioapic_pin = irq;
979 irq_attr.trigger = 1;
980 irq_attr.polarity = 1;
981 io_apic_set_pci_routing(NULL, irq, &irq_attr);
982 } else
983 irq = 0; /* No irq */
984
985 dev = get_device_id(pentry->type, pentry->name);
986
987 if ((dev == NULL) || (dev->get_platform_data == NULL))
988 continue;
989
990 if (dev->device_handler) {
991 dev->device_handler(pentry, dev);
992 } else {
993 switch (pentry->type) {
994 case SFI_DEV_TYPE_IPC:
995 sfi_handle_ipc_dev(pentry, dev);
996 break;
997 case SFI_DEV_TYPE_SPI:
998 sfi_handle_spi_dev(pentry, dev);
999 break;
1000 case SFI_DEV_TYPE_I2C:
1001 sfi_handle_i2c_dev(pentry, dev);
1002 break;
1003 case SFI_DEV_TYPE_UART:
1004 case SFI_DEV_TYPE_HSI:
1005 default:
1006 break;
1007 }
1008 }
1009 }
1010 return 0;
1011}
1012
1013static int __init intel_mid_platform_init(void)
1014{
1015 sfi_table_parse(SFI_SIG_GPIO, NULL, NULL, sfi_parse_gpio);
1016 sfi_table_parse(SFI_SIG_DEVS, NULL, NULL, sfi_parse_devs);
1017 return 0;
1018}
1019arch_initcall(intel_mid_platform_init);
1020 571
1021/* 572/*
1022 * we will search these buttons in SFI GPIO table (by name) 573 * we will search these buttons in SFI GPIO table (by name)
@@ -1078,4 +629,4 @@ static int __init pb_keys_init(void)
1078 } 629 }
1079 return 0; 630 return 0;
1080} 631}
1081late_initcall(pb_keys_init); 632late_initcall(pb_keys_init); \ No newline at end of file
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-06 20:01:46 -0500