aboutsummaryrefslogtreecommitdiffstats
path: root/arch/x86/pci/mrst.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/x86/pci/mrst.c')
-rw-r--r--arch/x86/pci/mrst.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/arch/x86/pci/mrst.c b/arch/x86/pci/mrst.c
index 0e0fabf17342..6eb18c42a28a 100644
--- a/arch/x86/pci/mrst.c
+++ b/arch/x86/pci/mrst.c
@@ -141,11 +141,6 @@ static int pci_device_update_fixed(struct pci_bus *bus, unsigned int devfn,
141 */ 141 */
142static bool type1_access_ok(unsigned int bus, unsigned int devfn, int reg) 142static bool type1_access_ok(unsigned int bus, unsigned int devfn, int reg)
143{ 143{
144 if (bus == 0 && (devfn == PCI_DEVFN(2, 0)
145 || devfn == PCI_DEVFN(0, 0)
146 || devfn == PCI_DEVFN(3, 0)))
147 return 1;
148
149 /* This is a workaround for A0 LNC bug where PCI status register does 144 /* This is a workaround for A0 LNC bug where PCI status register does
150 * not have new CAP bit set. can not be written by SW either. 145 * not have new CAP bit set. can not be written by SW either.
151 * 146 *
@@ -155,7 +150,10 @@ static bool type1_access_ok(unsigned int bus, unsigned int devfn, int reg)
155 */ 150 */
156 if (reg >= 0x100 || reg == PCI_STATUS || reg == PCI_HEADER_TYPE) 151 if (reg >= 0x100 || reg == PCI_STATUS || reg == PCI_HEADER_TYPE)
157 return 0; 152 return 0;
158 153 if (bus == 0 && (devfn == PCI_DEVFN(2, 0)
154 || devfn == PCI_DEVFN(0, 0)
155 || devfn == PCI_DEVFN(3, 0)))
156 return 1;
159 return 0; /* langwell on others */ 157 return 0; /* langwell on others */
160} 158}
161 159