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-rw-r--r--arch/x86/kernel/cpu/mcheck/therm_throt.c13
1 files changed, 10 insertions, 3 deletions
diff --git a/arch/x86/kernel/cpu/mcheck/therm_throt.c b/arch/x86/kernel/cpu/mcheck/therm_throt.c
index bff8dd191dd5..15f2bc07bb60 100644
--- a/arch/x86/kernel/cpu/mcheck/therm_throt.c
+++ b/arch/x86/kernel/cpu/mcheck/therm_throt.c
@@ -253,9 +253,6 @@ void intel_init_thermal(struct cpuinfo_x86 *c)
253 return; 253 return;
254 } 254 }
255 255
256 if (cpu_has(c, X86_FEATURE_TM2) && (l & MSR_IA32_MISC_ENABLE_TM2))
257 tm2 = 1;
258
259 /* Check whether a vector already exists */ 256 /* Check whether a vector already exists */
260 if (h & APIC_VECTOR_MASK) { 257 if (h & APIC_VECTOR_MASK) {
261 printk(KERN_DEBUG 258 printk(KERN_DEBUG
@@ -264,6 +261,16 @@ void intel_init_thermal(struct cpuinfo_x86 *c)
264 return; 261 return;
265 } 262 }
266 263
264 /* early Pentium M models use different method for enabling TM2 */
265 if (cpu_has(c, X86_FEATURE_TM2)) {
266 if (c->x86 == 6 && (c->x86_model == 9 || c->x86_model == 13)) {
267 rdmsr(MSR_THERM2_CTL, l, h);
268 if (l & MSR_THERM2_CTL_TM_SELECT)
269 tm2 = 1;
270 } else if (l & MSR_IA32_MISC_ENABLE_TM2)
271 tm2 = 1;
272 }
273
267 /* We'll mask the thermal vector in the lapic till we're ready: */ 274 /* We'll mask the thermal vector in the lapic till we're ready: */
268 h = THERMAL_APIC_VECTOR | APIC_DM_FIXED | APIC_LVT_MASKED; 275 h = THERMAL_APIC_VECTOR | APIC_DM_FIXED | APIC_LVT_MASKED;
269 apic_write(APIC_LVTTHMR, h); 276 apic_write(APIC_LVTTHMR, h);