8 files changed, 250 insertions, 284 deletions

diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index b994cc84aa7e..a5b4dce1b7ac 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1477,8 +1477,7 @@ void __init bsp_end_local_APIC_setup(void)
          * Now that local APIC setup is completed for BP, configure the fault
          * handling for interrupt remapping.
          */
-        if (irq_remapping_enabled)
-                irq_remap_enable_fault_handling();
+        irq_remap_enable_fault_handling();
 
 }
 
@@ -2251,8 +2250,7 @@ static int lapic_suspend(void)
         local_irq_save(flags);
         disable_local_APIC();
 
-        if (irq_remapping_enabled)
-                irq_remapping_disable();
+        irq_remapping_disable();
 
         local_irq_restore(flags);
         return 0;
@@ -2268,16 +2266,15 @@ static void lapic_resume(void)
                 return;
 
         local_irq_save(flags);
-        if (irq_remapping_enabled) {
-                /*
-                 * IO-APIC and PIC have their own resume routines.
-                 * We just mask them here to make sure the interrupt
-                 * subsystem is completely quiet while we enable x2apic
-                 * and interrupt-remapping.
-                 */
-                mask_ioapic_entries();
-                legacy_pic->mask_all();
-        }
+
+        /*
+         * IO-APIC and PIC have their own resume routines.
+         * We just mask them here to make sure the interrupt
+         * subsystem is completely quiet while we enable x2apic
+         * and interrupt-remapping.
+         */
+        mask_ioapic_entries();
+        legacy_pic->mask_all();
 
         if (x2apic_mode)
                 enable_x2apic();
@@ -2320,8 +2317,7 @@ static void lapic_resume(void)
         apic_write(APIC_ESR, 0);
         apic_read(APIC_ESR);
 
-        if (irq_remapping_enabled)
-                irq_remapping_reenable(x2apic_mode);
+        irq_remapping_reenable(x2apic_mode);
 
         local_irq_restore(flags);
 }
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index b739d398bb29..9ed796ccc32c 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -68,22 +68,6 @@
 #define for_each_irq_pin(entry, head) \
         for (entry = head; entry; entry = entry->next)
 
-#ifdef CONFIG_IRQ_REMAP
-static void irq_remap_modify_chip_defaults(struct irq_chip *chip);
-static inline bool irq_remapped(struct irq_cfg *cfg)
-{
-        return cfg->irq_2_iommu.iommu != NULL;
-}
-#else
-static inline bool irq_remapped(struct irq_cfg *cfg)
-{
-        return false;
-}
-static inline void irq_remap_modify_chip_defaults(struct irq_chip *chip)
-{
-}
-#endif
-
 /*
  *      Is the SiS APIC rmw bug present ?
  *      -1 = don't know, 0 = no, 1 = yes
@@ -300,9 +284,9 @@ static struct irq_cfg *alloc_irq_and_cfg_at(unsigned int at, int node)
         return cfg;
 }
 
-static int alloc_irq_from(unsigned int from, int node)
+static int alloc_irqs_from(unsigned int from, unsigned int count, int node)
 {
-        return irq_alloc_desc_from(from, node);
+        return irq_alloc_descs_from(from, count, node);
 }
 
 static void free_irq_at(unsigned int at, struct irq_cfg *cfg)
@@ -326,7 +310,7 @@ static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx)
                 + (mpc_ioapic_addr(idx) & ~PAGE_MASK);
 }
 
-static inline void io_apic_eoi(unsigned int apic, unsigned int vector)
+void io_apic_eoi(unsigned int apic, unsigned int vector)
 {
         struct io_apic __iomem *io_apic = io_apic_base(apic);
         writel(vector, &io_apic->eoi);
@@ -573,19 +557,10 @@ static void unmask_ioapic_irq(struct irq_data *data)
  * Otherwise, we simulate the EOI message manually by changing the trigger
  * mode to edge and then back to level, with RTE being masked during this.
  */
-static void __eoi_ioapic_pin(int apic, int pin, int vector, struct irq_cfg *cfg)
+void native_eoi_ioapic_pin(int apic, int pin, int vector)
 {
         if (mpc_ioapic_ver(apic) >= 0x20) {
-                /*
-                 * Intr-remapping uses pin number as the virtual vector
-                 * in the RTE. Actual vector is programmed in
-                 * intr-remapping table entry. Hence for the io-apic
-                 * EOI we use the pin number.
-                 */
-                if (cfg && irq_remapped(cfg))
-                        io_apic_eoi(apic, pin);
-                else
-                        io_apic_eoi(apic, vector);
+                io_apic_eoi(apic, vector);
         } else {
                 struct IO_APIC_route_entry entry, entry1;
 
@@ -606,14 +581,15 @@ static void __eoi_ioapic_pin(int apic, int pin, int vector, struct irq_cfg *cfg)
         }
 }
 
-static void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg)
+void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg)
 {
         struct irq_pin_list *entry;
         unsigned long flags;
 
         raw_spin_lock_irqsave(&ioapic_lock, flags);
         for_each_irq_pin(entry, cfg->irq_2_pin)
-                __eoi_ioapic_pin(entry->apic, entry->pin, cfg->vector, cfg);
+                x86_io_apic_ops.eoi_ioapic_pin(entry->apic, entry->pin,
+                                               cfg->vector);
         raw_spin_unlock_irqrestore(&ioapic_lock, flags);
 }
 
@@ -650,7 +626,7 @@ static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin)
                 }
 
                 raw_spin_lock_irqsave(&ioapic_lock, flags);
-                __eoi_ioapic_pin(apic, pin, entry.vector, NULL);
+                x86_io_apic_ops.eoi_ioapic_pin(apic, pin, entry.vector);
                 raw_spin_unlock_irqrestore(&ioapic_lock, flags);
         }
 
@@ -1304,25 +1280,18 @@ static void ioapic_register_intr(unsigned int irq, struct irq_cfg *cfg,
                 fasteoi = false;
         }
 
-        if (irq_remapped(cfg)) {
-                irq_set_status_flags(irq, IRQ_MOVE_PCNTXT);
-                irq_remap_modify_chip_defaults(chip);
+        if (setup_remapped_irq(irq, cfg, chip))
                 fasteoi = trigger != 0;
-        }
 
         hdl = fasteoi ? handle_fasteoi_irq : handle_edge_irq;
         irq_set_chip_and_handler_name(irq, chip, hdl,
                                       fasteoi ? "fasteoi" : "edge");
 }
 
-static int setup_ioapic_entry(int irq, struct IO_APIC_route_entry *entry,
-                               unsigned int destination, int vector,
-                               struct io_apic_irq_attr *attr)
+int native_setup_ioapic_entry(int irq, struct IO_APIC_route_entry *entry,
+                              unsigned int destination, int vector,
+                              struct io_apic_irq_attr *attr)
 {
-        if (irq_remapping_enabled)
-                return setup_ioapic_remapped_entry(irq, entry, destination,
-                                                   vector, attr);
-
         memset(entry, 0, sizeof(*entry));
 
         entry->delivery_mode = apic->irq_delivery_mode;
@@ -1370,8 +1339,8 @@ static void setup_ioapic_irq(unsigned int irq, struct irq_cfg *cfg,
                     attr->ioapic, mpc_ioapic_id(attr->ioapic), attr->ioapic_pin,
                     cfg->vector, irq, attr->trigger, attr->polarity, dest);
 
-        if (setup_ioapic_entry(irq, &entry, dest, cfg->vector, attr)) {
-                pr_warn("Failed to setup ioapic entry for ioapic %d, pin %d\n",
+        if (x86_io_apic_ops.setup_entry(irq, &entry, dest, cfg->vector, attr)) {
+                pr_warn("Failed to setup ioapic entry for ioapic  %d, pin %d\n",
                         mpc_ioapic_id(attr->ioapic), attr->ioapic_pin);
                 __clear_irq_vector(irq, cfg);
 
@@ -1479,9 +1448,6 @@ static void __init setup_timer_IRQ0_pin(unsigned int ioapic_idx,
         struct IO_APIC_route_entry entry;
         unsigned int dest;
 
-        if (irq_remapping_enabled)
-                return;
-
         memset(&entry, 0, sizeof(entry));
 
         /*
@@ -1513,9 +1479,63 @@ static void __init setup_timer_IRQ0_pin(unsigned int ioapic_idx,
         ioapic_write_entry(ioapic_idx, pin, entry);
 }
 
-__apicdebuginit(void) print_IO_APIC(int ioapic_idx)
+void native_io_apic_print_entries(unsigned int apic, unsigned int nr_entries)
 {
         int i;
+
+        pr_debug(" NR Dst Mask Trig IRR Pol Stat Dmod Deli Vect:\n");
+
+        for (i = 0; i <= nr_entries; i++) {
+                struct IO_APIC_route_entry entry;
+
+                entry = ioapic_read_entry(apic, i);
+
+                pr_debug(" %02x %02X  ", i, entry.dest);
+                pr_cont("%1d    %1d    %1d   %1d   %1d    "
+                        "%1d    %1d    %02X\n",
+                        entry.mask,
+                        entry.trigger,
+                        entry.irr,
+                        entry.polarity,
+                        entry.delivery_status,
+                        entry.dest_mode,
+                        entry.delivery_mode,
+                        entry.vector);
+        }
+}
+
+void intel_ir_io_apic_print_entries(unsigned int apic,
+                                    unsigned int nr_entries)
+{
+        int i;
+
+        pr_debug(" NR Indx Fmt Mask Trig IRR Pol Stat Indx2 Zero Vect:\n");
+
+        for (i = 0; i <= nr_entries; i++) {
+                struct IR_IO_APIC_route_entry *ir_entry;
+                struct IO_APIC_route_entry entry;
+
+                entry = ioapic_read_entry(apic, i);
+
+                ir_entry = (struct IR_IO_APIC_route_entry *)&entry;
+
+                pr_debug(" %02x %04X ", i, ir_entry->index);
+                pr_cont("%1d   %1d    %1d    %1d   %1d   "
+                        "%1d    %1d     %X    %02X\n",
+                        ir_entry->format,
+                        ir_entry->mask,
+                        ir_entry->trigger,
+                        ir_entry->irr,
+                        ir_entry->polarity,
+                        ir_entry->delivery_status,
+                        ir_entry->index2,
+                        ir_entry->zero,
+                        ir_entry->vector);
+        }
+}
+
+__apicdebuginit(void) print_IO_APIC(int ioapic_idx)
+{
         union IO_APIC_reg_00 reg_00;
         union IO_APIC_reg_01 reg_01;
         union IO_APIC_reg_02 reg_02;
@@ -1568,58 +1588,7 @@ __apicdebuginit(void) print_IO_APIC(int ioapic_idx)
 
         printk(KERN_DEBUG ".... IRQ redirection table:\n");
 
-        if (irq_remapping_enabled) {
-                printk(KERN_DEBUG " NR Indx Fmt Mask Trig IRR"
-                        " Pol Stat Indx2 Zero Vect:\n");
-        } else {
-                printk(KERN_DEBUG " NR Dst Mask Trig IRR Pol"
-                        " Stat Dmod Deli Vect:\n");
-        }
-
-        for (i = 0; i <= reg_01.bits.entries; i++) {
-                if (irq_remapping_enabled) {
-                        struct IO_APIC_route_entry entry;
-                        struct IR_IO_APIC_route_entry *ir_entry;
-
-                        entry = ioapic_read_entry(ioapic_idx, i);
-                        ir_entry = (struct IR_IO_APIC_route_entry *) &entry;
-                        printk(KERN_DEBUG " %02x %04X ",
-                                i,
-                                ir_entry->index
-                        );
-                        pr_cont("%1d   %1d    %1d    %1d   %1d   "
-                                "%1d    %1d     %X    %02X\n",
-                                ir_entry->format,
-                                ir_entry->mask,
-                                ir_entry->trigger,
-                                ir_entry->irr,
-                                ir_entry->polarity,
-                                ir_entry->delivery_status,
-                                ir_entry->index2,
-                                ir_entry->zero,
-                                ir_entry->vector
-                        );
-                } else {
-                        struct IO_APIC_route_entry entry;
-
-                        entry = ioapic_read_entry(ioapic_idx, i);
-                        printk(KERN_DEBUG " %02x %02X  ",
-                                i,
-                                entry.dest
-                        );
-                        pr_cont("%1d    %1d    %1d   %1d   %1d    "
-                                "%1d    %1d    %02X\n",
-                                entry.mask,
-                                entry.trigger,
-                                entry.irr,
-                                entry.polarity,
-                                entry.delivery_status,
-                                entry.dest_mode,
-                                entry.delivery_mode,
-                                entry.vector
-                        );
-                }
-        }
+        x86_io_apic_ops.print_entries(ioapic_idx, reg_01.bits.entries);
 }
 
 __apicdebuginit(void) print_IO_APICs(void)
@@ -1921,30 +1890,14 @@ void __init enable_IO_APIC(void)
         clear_IO_APIC();
 }
 
-/*
- * Not an __init, needed by the reboot code
- */
-void disable_IO_APIC(void)
+void native_disable_io_apic(void)
 {
         /*
-         * Clear the IO-APIC before rebooting:
-         */
-        clear_IO_APIC();
-
-        if (!legacy_pic->nr_legacy_irqs)
-                return;
-
-        /*
          * If the i8259 is routed through an IOAPIC
          * Put that IOAPIC in virtual wire mode
          * so legacy interrupts can be delivered.
-         *
-         * With interrupt-remapping, for now we will use virtual wire A mode,
-         * as virtual wire B is little complex (need to configure both
-         * IOAPIC RTE as well as interrupt-remapping table entry).
-         * As this gets called during crash dump, keep this simple for now.
          */
-        if (ioapic_i8259.pin != -1 && !irq_remapping_enabled) {
+        if (ioapic_i8259.pin != -1) {
                 struct IO_APIC_route_entry entry;
 
                 memset(&entry, 0, sizeof(entry));
@@ -1964,12 +1917,25 @@ void disable_IO_APIC(void)
                 ioapic_write_entry(ioapic_i8259.apic, ioapic_i8259.pin, entry);
         }
 
+        if (cpu_has_apic || apic_from_smp_config())
+                disconnect_bsp_APIC(ioapic_i8259.pin != -1);
+
+}
+
+/*
+ * Not an __init, needed by the reboot code
+ */
+void disable_IO_APIC(void)
+{
         /*
-         * Use virtual wire A mode when interrupt remapping is enabled.
+         * Clear the IO-APIC before rebooting:
          */
-        if (cpu_has_apic || apic_from_smp_config())
-                disconnect_bsp_APIC(!irq_remapping_enabled &&
-                                ioapic_i8259.pin != -1);
+        clear_IO_APIC();
+
+        if (!legacy_pic->nr_legacy_irqs)
+                return;
+
+        x86_io_apic_ops.disable();
 }
 
 #ifdef CONFIG_X86_32
@@ -2322,12 +2288,8 @@ static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, struct irq
 
                 apic = entry->apic;
                 pin = entry->pin;
-                /*
-                 * With interrupt-remapping, destination information comes
-                 * from interrupt-remapping table entry.
-                 */
-                if (!irq_remapped(cfg))
-                        io_apic_write(apic, 0x11 + pin*2, dest);
+
+                io_apic_write(apic, 0x11 + pin*2, dest);
                 reg = io_apic_read(apic, 0x10 + pin*2);
                 reg &= ~IO_APIC_REDIR_VECTOR_MASK;
                 reg |= vector;
@@ -2369,9 +2331,10 @@ int __ioapic_set_affinity(struct irq_data *data, const struct cpumask *mask,
         return 0;
 }
 
-static int
-ioapic_set_affinity(struct irq_data *data, const struct cpumask *mask,
-                    bool force)
+
+int native_ioapic_set_affinity(struct irq_data *data,
+                               const struct cpumask *mask,
+                               bool force)
 {
         unsigned int dest, irq = data->irq;
         unsigned long flags;
@@ -2548,33 +2511,6 @@ static void ack_apic_level(struct irq_data *data)
         ioapic_irqd_unmask(data, cfg, masked);
 }
 
-#ifdef CONFIG_IRQ_REMAP
-static void ir_ack_apic_edge(struct irq_data *data)
-{
-        ack_APIC_irq();
-}
-
-static void ir_ack_apic_level(struct irq_data *data)
-{
-        ack_APIC_irq();
-        eoi_ioapic_irq(data->irq, data->chip_data);
-}
-
-static void ir_print_prefix(struct irq_data *data, struct seq_file *p)
-{
-        seq_printf(p, " IR-%s", data->chip->name);
-}
-
-static void irq_remap_modify_chip_defaults(struct irq_chip *chip)
-{
-        chip->irq_print_chip = ir_print_prefix;
-        chip->irq_ack = ir_ack_apic_edge;
-        chip->irq_eoi = ir_ack_apic_level;
-
-        chip->irq_set_affinity = set_remapped_irq_affinity;
-}
-#endif /* CONFIG_IRQ_REMAP */
-
 static struct irq_chip ioapic_chip __read_mostly = {
         .name                   = "IO-APIC",
         .irq_startup            = startup_ioapic_irq,
@@ -2582,7 +2518,7 @@ static struct irq_chip ioapic_chip __read_mostly = {
         .irq_unmask             = unmask_ioapic_irq,
         .irq_ack                = ack_apic_edge,
         .irq_eoi                = ack_apic_level,
-        .irq_set_affinity       = ioapic_set_affinity,
+        .irq_set_affinity       = native_ioapic_set_affinity,
         .irq_retrigger          = ioapic_retrigger_irq,
 };
 
@@ -2781,8 +2717,7 @@ static inline void __init check_timer(void)
          * 8259A.
          */
         if (pin1 == -1) {
-                if (irq_remapping_enabled)
-                        panic("BIOS bug: timer not connected to IO-APIC");
+                panic_if_irq_remap("BIOS bug: timer not connected to IO-APIC");
                 pin1 = pin2;
                 apic1 = apic2;
                 no_pin1 = 1;
@@ -2814,8 +2749,7 @@ static inline void __init check_timer(void)
                                 clear_IO_APIC_pin(0, pin1);
                         goto out;
                 }
-                if (irq_remapping_enabled)
-                        panic("timer doesn't work through Interrupt-remapped IO-APIC");
+                panic_if_irq_remap("timer doesn't work through Interrupt-remapped IO-APIC");
                 local_irq_disable();
                 clear_IO_APIC_pin(apic1, pin1);
                 if (!no_pin1)
@@ -2982,37 +2916,58 @@ device_initcall(ioapic_init_ops);
 /*
  * Dynamic irq allocate and deallocation
  */
-unsigned int create_irq_nr(unsigned int from, int node)
+unsigned int __create_irqs(unsigned int from, unsigned int count, int node)
 {
-        struct irq_cfg *cfg;
+        struct irq_cfg **cfg;
         unsigned long flags;
-        unsigned int ret = 0;
-        int irq;
+        int irq, i;
 
         if (from < nr_irqs_gsi)
                 from = nr_irqs_gsi;
 
-        irq = alloc_irq_from(from, node);
-        if (irq < 0)
-                return 0;
-        cfg = alloc_irq_cfg(irq, node);
-        if (!cfg) {
-                free_irq_at(irq, NULL);
+        cfg = kzalloc_node(count * sizeof(cfg[0]), GFP_KERNEL, node);
+        if (!cfg)
                 return 0;
+
+        irq = alloc_irqs_from(from, count, node);
+        if (irq < 0)
+                goto out_cfgs;
+
+        for (i = 0; i < count; i++) {
+                cfg[i] = alloc_irq_cfg(irq + i, node);
+                if (!cfg[i])
+                        goto out_irqs;
         }
 
         raw_spin_lock_irqsave(&vector_lock, flags);
-        if (!__assign_irq_vector(irq, cfg, apic->target_cpus()))
-                ret = irq;
+        for (i = 0; i < count; i++)
+                if (__assign_irq_vector(irq + i, cfg[i], apic->target_cpus()))
+                        goto out_vecs;
         raw_spin_unlock_irqrestore(&vector_lock, flags);
 
-        if (ret) {
-                irq_set_chip_data(irq, cfg);
-                irq_clear_status_flags(irq, IRQ_NOREQUEST);
-        } else {
-                free_irq_at(irq, cfg);
+        for (i = 0; i < count; i++) {
+                irq_set_chip_data(irq + i, cfg[i]);
+                irq_clear_status_flags(irq + i, IRQ_NOREQUEST);
         }
-        return ret;
+
+        kfree(cfg);
+        return irq;
+
+out_vecs:
+        for (i--; i >= 0; i--)
+                __clear_irq_vector(irq + i, cfg[i]);
+        raw_spin_unlock_irqrestore(&vector_lock, flags);
+out_irqs:
+        for (i = 0; i < count; i++)
+                free_irq_at(irq + i, cfg[i]);
+out_cfgs:
+        kfree(cfg);
+        return 0;
+}
+
+unsigned int create_irq_nr(unsigned int from, int node)
+{
+        return __create_irqs(from, 1, node);
 }
 
 int create_irq(void)
@@ -3037,48 +2992,35 @@ void destroy_irq(unsigned int irq)
 
         irq_set_status_flags(irq, IRQ_NOREQUEST|IRQ_NOPROBE);
 
-        if (irq_remapped(cfg))
-                free_remapped_irq(irq);
+        free_remapped_irq(irq);
+
         raw_spin_lock_irqsave(&vector_lock, flags);
         __clear_irq_vector(irq, cfg);
         raw_spin_unlock_irqrestore(&vector_lock, flags);
         free_irq_at(irq, cfg);
 }
 
+void destroy_irqs(unsigned int irq, unsigned int count)
+{
+        unsigned int i;
+
+        for (i = 0; i < count; i++)
+                destroy_irq(irq + i);
+}
+
 /*
  * MSI message composition
  */
-#ifdef CONFIG_PCI_MSI
-static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
-                           struct msi_msg *msg, u8 hpet_id)
+void native_compose_msi_msg(struct pci_dev *pdev,
+                            unsigned int irq, unsigned int dest,
+                            struct msi_msg *msg, u8 hpet_id)
 {
-        struct irq_cfg *cfg;
-        int err;
-        unsigned dest;
-
-        if (disable_apic)
-                return -ENXIO;
-
-        cfg = irq_cfg(irq);
-        err = assign_irq_vector(irq, cfg, apic->target_cpus());
-        if (err)
-                return err;
+        struct irq_cfg *cfg = irq_cfg(irq);
 
-        err = apic->cpu_mask_to_apicid_and(cfg->domain,
-                                           apic->target_cpus(), &dest);
-        if (err)
-                return err;
-
-        if (irq_remapped(cfg)) {
-                compose_remapped_msi_msg(pdev, irq, dest, msg, hpet_id);
-                return err;
-        }
+        msg->address_hi = MSI_ADDR_BASE_HI;
 
         if (x2apic_enabled())
-                msg->address_hi = MSI_ADDR_BASE_HI |
-                                  MSI_ADDR_EXT_DEST_ID(dest);
-        else
-                msg->address_hi = MSI_ADDR_BASE_HI;
+                msg->address_hi |= MSI_ADDR_EXT_DEST_ID(dest);
 
         msg->address_lo =
                 MSI_ADDR_BASE_LO |
@@ -3097,8 +3039,32 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
                         MSI_DATA_DELIVERY_FIXED:
                         MSI_DATA_DELIVERY_LOWPRI) |
                 MSI_DATA_VECTOR(cfg->vector);
+}
 
-        return err;
+#ifdef CONFIG_PCI_MSI
+static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
+                           struct msi_msg *msg, u8 hpet_id)
+{
+        struct irq_cfg *cfg;
+        int err;
+        unsigned dest;
+
+        if (disable_apic)
+                return -ENXIO;
+
+        cfg = irq_cfg(irq);
+        err = assign_irq_vector(irq, cfg, apic->target_cpus());
+        if (err)
+                return err;
+
+        err = apic->cpu_mask_to_apicid_and(cfg->domain,
+                                           apic->target_cpus(), &dest);
+        if (err)
+                return err;
+
+        x86_msi.compose_msi_msg(pdev, irq, dest, msg, hpet_id);
+
+        return 0;
 }
 
 static int
@@ -3136,23 +3102,28 @@ static struct irq_chip msi_chip = {
         .irq_retrigger          = ioapic_retrigger_irq,
 };
 
-static int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, int irq)
+int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc,
+                  unsigned int irq_base, unsigned int irq_offset)
 {
         struct irq_chip *chip = &msi_chip;
         struct msi_msg msg;
+        unsigned int irq = irq_base + irq_offset;
         int ret;
 
         ret = msi_compose_msg(dev, irq, &msg, -1);
         if (ret < 0)
                 return ret;
 
-        irq_set_msi_desc(irq, msidesc);
-        write_msi_msg(irq, &msg);
+        irq_set_msi_desc_off(irq_base, irq_offset, msidesc);
 
-        if (irq_remapped(irq_get_chip_data(irq))) {
-                irq_set_status_flags(irq, IRQ_MOVE_PCNTXT);
-                irq_remap_modify_chip_defaults(chip);
-        }
+        /*
+         * MSI-X message is written per-IRQ, the offset is always 0.
+         * MSI message denotes a contiguous group of IRQs, written for 0th IRQ.
+         */
+        if (!irq_offset)
+                write_msi_msg(irq, &msg);
+
+        setup_remapped_irq(irq, irq_get_chip_data(irq), chip);
 
         irq_set_chip_and_handler_name(irq, chip, handle_edge_irq, "edge");
 
@@ -3163,46 +3134,26 @@ static int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, int irq)
 
 int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
 {
-        int node, ret, sub_handle, index = 0;
         unsigned int irq, irq_want;
         struct msi_desc *msidesc;
+        int node, ret;
 
-        /* x86 doesn't support multiple MSI yet */
+        /* Multiple MSI vectors only supported with interrupt remapping */
         if (type == PCI_CAP_ID_MSI && nvec > 1)
                 return 1;
 
         node = dev_to_node(&dev->dev);
         irq_want = nr_irqs_gsi;
-        sub_handle = 0;
         list_for_each_entry(msidesc, &dev->msi_list, list) {
                 irq = create_irq_nr(irq_want, node);
                 if (irq == 0)
-                        return -1;
+                        return -ENOSPC;
+
                 irq_want = irq + 1;
-                if (!irq_remapping_enabled)
-                        goto no_ir;
 
-                if (!sub_handle) {
-                        /*
-                         * allocate the consecutive block of IRTE's
-                         * for 'nvec'
-                         */
-                        index = msi_alloc_remapped_irq(dev, irq, nvec);
-                        if (index < 0) {
-                                ret = index;
-                                goto error;
-                        }
-                } else {
-                        ret = msi_setup_remapped_irq(dev, irq, index,
-                                                     sub_handle);
-                        if (ret < 0)
-                                goto error;
-                }
-no_ir:
-                ret = setup_msi_irq(dev, msidesc, irq);
+                ret = setup_msi_irq(dev, msidesc, irq, 0);
                 if (ret < 0)
                         goto error;
-                sub_handle++;
         }
         return 0;
 
@@ -3298,26 +3249,19 @@ static struct irq_chip hpet_msi_type = {
         .irq_retrigger = ioapic_retrigger_irq,
 };
 
-int arch_setup_hpet_msi(unsigned int irq, unsigned int id)
+int default_setup_hpet_msi(unsigned int irq, unsigned int id)
 {
         struct irq_chip *chip = &hpet_msi_type;
         struct msi_msg msg;
         int ret;
 
-        if (irq_remapping_enabled) {
-                ret = setup_hpet_msi_remapped(irq, id);
-                if (ret)
-                        return ret;
-        }
-
         ret = msi_compose_msg(NULL, irq, &msg, id);
         if (ret < 0)
                 return ret;
 
         hpet_msi_write(irq_get_handler_data(irq), &msg);
         irq_set_status_flags(irq, IRQ_MOVE_PCNTXT);
-        if (irq_remapped(irq_get_chip_data(irq)))
-                irq_remap_modify_chip_defaults(chip);
+        setup_remapped_irq(irq, irq_get_chip_data(irq), chip);
 
         irq_set_chip_and_handler_name(irq, chip, handle_edge_irq, "edge");
         return 0;
@@ -3683,10 +3627,7 @@ void __init setup_ioapic_dest(void)
                 else
                         mask = apic->target_cpus();
 
-                if (irq_remapping_enabled)
-                        set_remapped_irq_affinity(idata, mask, false);
-                else
-                        ioapic_set_affinity(idata, mask, false);
+                x86_io_apic_ops.set_affinity(idata, mask, false);
         }
 
 }
diff --git a/arch/x86/kernel/apic/ipi.c b/arch/x86/kernel/apic/ipi.c
index cce91bf26676..7434d8556d09 100644
--- a/arch/x86/kernel/apic/ipi.c
+++ b/arch/x86/kernel/apic/ipi.c
@@ -106,7 +106,7 @@ void default_send_IPI_mask_logical(const struct cpumask *cpumask, int vector)
         unsigned long mask = cpumask_bits(cpumask)[0];
         unsigned long flags;
 
-        if (WARN_ONCE(!mask, "empty IPI mask"))
+        if (!mask)
                 return;
 
         local_irq_save(flags);
diff --git a/arch/x86/kernel/cpu/hypervisor.c b/arch/x86/kernel/cpu/hypervisor.c
index a8f8fa9769d6..1e7e84a02eba 100644
--- a/arch/x86/kernel/cpu/hypervisor.c
+++ b/arch/x86/kernel/cpu/hypervisor.c
@@ -79,3 +79,10 @@ void __init init_hypervisor_platform(void)
         if (x86_hyper->init_platform)
                 x86_hyper->init_platform();
 }
+
+bool __init hypervisor_x2apic_available(void)
+{
+        return x86_hyper                   &&
+               x86_hyper->x2apic_available &&
+               x86_hyper->x2apic_available();
+}
diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c
index d22d0c4edcfd..03a36321ec54 100644
--- a/arch/x86/kernel/cpu/vmware.c
+++ b/arch/x86/kernel/cpu/vmware.c
@@ -33,6 +33,9 @@
 
 #define VMWARE_PORT_CMD_GETVERSION      10
 #define VMWARE_PORT_CMD_GETHZ           45
+#define VMWARE_PORT_CMD_GETVCPU_INFO    68
+#define VMWARE_PORT_CMD_LEGACY_X2APIC   3
+#define VMWARE_PORT_CMD_VCPU_RESERVED   31
 
 #define VMWARE_PORT(cmd, eax, ebx, ecx, edx)                            \
         __asm__("inl (%%dx)" :                                          \
@@ -125,10 +128,20 @@ static void __cpuinit vmware_set_cpu_features(struct cpuinfo_x86 *c)
         set_cpu_cap(c, X86_FEATURE_TSC_RELIABLE);
 }
 
+/* Checks if hypervisor supports x2apic without VT-D interrupt remapping. */
+static bool __init vmware_legacy_x2apic_available(void)
+{
+        uint32_t eax, ebx, ecx, edx;
+        VMWARE_PORT(GETVCPU_INFO, eax, ebx, ecx, edx);
+        return (eax & (1 << VMWARE_PORT_CMD_VCPU_RESERVED)) == 0 &&
+               (eax & (1 << VMWARE_PORT_CMD_LEGACY_X2APIC)) != 0;
+}
+
 const __refconst struct hypervisor_x86 x86_hyper_vmware = {
         .name                   = "VMware",
         .detect                 = vmware_platform,
         .set_cpu_features       = vmware_set_cpu_features,
         .init_platform          = vmware_platform_setup,
+        .x2apic_available       = vmware_legacy_x2apic_available,
 };
 EXPORT_SYMBOL(x86_hyper_vmware);
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index e28670f9a589..da85a8e830a1 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -478,7 +478,7 @@ static int hpet_msi_next_event(unsigned long delta,
 
 static int hpet_setup_msi_irq(unsigned int irq)
 {
-        if (arch_setup_hpet_msi(irq, hpet_blockid)) {
+        if (x86_msi.setup_hpet_msi(irq, hpet_blockid)) {
                 destroy_irq(irq);
                 return -EINVAL;
         }
diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c
index 9c2bd8bd4b4c..2b44ea5f269d 100644
--- a/arch/x86/kernel/kvm.c
+++ b/arch/x86/kernel/kvm.c
@@ -505,6 +505,7 @@ static bool __init kvm_detect(void)
 const struct hypervisor_x86 x86_hyper_kvm __refconst = {
         .name                   = "KVM",
         .detect                 = kvm_detect,
+        .x2apic_available       = kvm_para_available,
 };
 EXPORT_SYMBOL_GPL(x86_hyper_kvm);
 
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index 7a3d075a814a..d065d67c2672 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -19,6 +19,7 @@
 #include <asm/time.h>
 #include <asm/irq.h>
 #include <asm/io_apic.h>
+#include <asm/hpet.h>
 #include <asm/pat.h>
 #include <asm/tsc.h>
 #include <asm/iommu.h>
@@ -111,15 +112,22 @@ struct x86_platform_ops x86_platform = {
 
 EXPORT_SYMBOL_GPL(x86_platform);
 struct x86_msi_ops x86_msi = {
-        .setup_msi_irqs = native_setup_msi_irqs,
-        .teardown_msi_irq = native_teardown_msi_irq,
-        .teardown_msi_irqs = default_teardown_msi_irqs,
-        .restore_msi_irqs = default_restore_msi_irqs,
+        .setup_msi_irqs         = native_setup_msi_irqs,
+        .compose_msi_msg        = native_compose_msi_msg,
+        .teardown_msi_irq       = native_teardown_msi_irq,
+        .teardown_msi_irqs      = default_teardown_msi_irqs,
+        .restore_msi_irqs       = default_restore_msi_irqs,
+        .setup_hpet_msi         = default_setup_hpet_msi,
 };
 
 struct x86_io_apic_ops x86_io_apic_ops = {
-        .init   = native_io_apic_init_mappings,
-        .read   = native_io_apic_read,
-        .write  = native_io_apic_write,
-        .modify = native_io_apic_modify,
+        .init                   = native_io_apic_init_mappings,
+        .read                   = native_io_apic_read,
+        .write                  = native_io_apic_write,
+        .modify                 = native_io_apic_modify,
+        .disable                = native_disable_io_apic,
+        .print_entries          = native_io_apic_print_entries,
+        .set_affinity           = native_ioapic_set_affinity,
+        .setup_entry            = native_setup_ioapic_entry,
+        .eoi_ioapic_pin         = native_eoi_ioapic_pin,
 };