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Diffstat (limited to 'arch/x86/kernel/vmi_32.c')
-rw-r--r--arch/x86/kernel/vmi_32.c50
1 files changed, 25 insertions, 25 deletions
diff --git a/arch/x86/kernel/vmi_32.c b/arch/x86/kernel/vmi_32.c
index 87e5633805a9..599b6f2ed562 100644
--- a/arch/x86/kernel/vmi_32.c
+++ b/arch/x86/kernel/vmi_32.c
@@ -88,13 +88,13 @@ struct vmi_timer_ops vmi_timer_ops;
88#define IRQ_PATCH_DISABLE 5 88#define IRQ_PATCH_DISABLE 5
89 89
90static inline void patch_offset(void *insnbuf, 90static inline void patch_offset(void *insnbuf,
91 unsigned long eip, unsigned long dest) 91 unsigned long ip, unsigned long dest)
92{ 92{
93 *(unsigned long *)(insnbuf+1) = dest-eip-5; 93 *(unsigned long *)(insnbuf+1) = dest-ip-5;
94} 94}
95 95
96static unsigned patch_internal(int call, unsigned len, void *insnbuf, 96static unsigned patch_internal(int call, unsigned len, void *insnbuf,
97 unsigned long eip) 97 unsigned long ip)
98{ 98{
99 u64 reloc; 99 u64 reloc;
100 struct vmi_relocation_info *const rel = (struct vmi_relocation_info *)&reloc; 100 struct vmi_relocation_info *const rel = (struct vmi_relocation_info *)&reloc;
@@ -103,13 +103,13 @@ static unsigned patch_internal(int call, unsigned len, void *insnbuf,
103 case VMI_RELOCATION_CALL_REL: 103 case VMI_RELOCATION_CALL_REL:
104 BUG_ON(len < 5); 104 BUG_ON(len < 5);
105 *(char *)insnbuf = MNEM_CALL; 105 *(char *)insnbuf = MNEM_CALL;
106 patch_offset(insnbuf, eip, (unsigned long)rel->eip); 106 patch_offset(insnbuf, ip, (unsigned long)rel->eip);
107 return 5; 107 return 5;
108 108
109 case VMI_RELOCATION_JUMP_REL: 109 case VMI_RELOCATION_JUMP_REL:
110 BUG_ON(len < 5); 110 BUG_ON(len < 5);
111 *(char *)insnbuf = MNEM_JMP; 111 *(char *)insnbuf = MNEM_JMP;
112 patch_offset(insnbuf, eip, (unsigned long)rel->eip); 112 patch_offset(insnbuf, ip, (unsigned long)rel->eip);
113 return 5; 113 return 5;
114 114
115 case VMI_RELOCATION_NOP: 115 case VMI_RELOCATION_NOP:
@@ -131,25 +131,25 @@ static unsigned patch_internal(int call, unsigned len, void *insnbuf,
131 * sequence. The callee does nop padding for us. 131 * sequence. The callee does nop padding for us.
132 */ 132 */
133static unsigned vmi_patch(u8 type, u16 clobbers, void *insns, 133static unsigned vmi_patch(u8 type, u16 clobbers, void *insns,
134 unsigned long eip, unsigned len) 134 unsigned long ip, unsigned len)
135{ 135{
136 switch (type) { 136 switch (type) {
137 case PARAVIRT_PATCH(pv_irq_ops.irq_disable): 137 case PARAVIRT_PATCH(pv_irq_ops.irq_disable):
138 return patch_internal(VMI_CALL_DisableInterrupts, len, 138 return patch_internal(VMI_CALL_DisableInterrupts, len,
139 insns, eip); 139 insns, ip);
140 case PARAVIRT_PATCH(pv_irq_ops.irq_enable): 140 case PARAVIRT_PATCH(pv_irq_ops.irq_enable):
141 return patch_internal(VMI_CALL_EnableInterrupts, len, 141 return patch_internal(VMI_CALL_EnableInterrupts, len,
142 insns, eip); 142 insns, ip);
143 case PARAVIRT_PATCH(pv_irq_ops.restore_fl): 143 case PARAVIRT_PATCH(pv_irq_ops.restore_fl):
144 return patch_internal(VMI_CALL_SetInterruptMask, len, 144 return patch_internal(VMI_CALL_SetInterruptMask, len,
145 insns, eip); 145 insns, ip);
146 case PARAVIRT_PATCH(pv_irq_ops.save_fl): 146 case PARAVIRT_PATCH(pv_irq_ops.save_fl):
147 return patch_internal(VMI_CALL_GetInterruptMask, len, 147 return patch_internal(VMI_CALL_GetInterruptMask, len,
148 insns, eip); 148 insns, ip);
149 case PARAVIRT_PATCH(pv_cpu_ops.iret): 149 case PARAVIRT_PATCH(pv_cpu_ops.iret):
150 return patch_internal(VMI_CALL_IRET, len, insns, eip); 150 return patch_internal(VMI_CALL_IRET, len, insns, ip);
151 case PARAVIRT_PATCH(pv_cpu_ops.irq_enable_syscall_ret): 151 case PARAVIRT_PATCH(pv_cpu_ops.irq_enable_syscall_ret):
152 return patch_internal(VMI_CALL_SYSEXIT, len, insns, eip); 152 return patch_internal(VMI_CALL_SYSEXIT, len, insns, ip);
153 default: 153 default:
154 break; 154 break;
155 } 155 }
@@ -157,29 +157,29 @@ static unsigned vmi_patch(u8 type, u16 clobbers, void *insns,
157} 157}
158 158
159/* CPUID has non-C semantics, and paravirt-ops API doesn't match hardware ISA */ 159/* CPUID has non-C semantics, and paravirt-ops API doesn't match hardware ISA */
160static void vmi_cpuid(unsigned int *eax, unsigned int *ebx, 160static void vmi_cpuid(unsigned int *ax, unsigned int *bx,
161 unsigned int *ecx, unsigned int *edx) 161 unsigned int *cx, unsigned int *dx)
162{ 162{
163 int override = 0; 163 int override = 0;
164 if (*eax == 1) 164 if (*ax == 1)
165 override = 1; 165 override = 1;
166 asm volatile ("call *%6" 166 asm volatile ("call *%6"
167 : "=a" (*eax), 167 : "=a" (*ax),
168 "=b" (*ebx), 168 "=b" (*bx),
169 "=c" (*ecx), 169 "=c" (*cx),
170 "=d" (*edx) 170 "=d" (*dx)
171 : "0" (*eax), "2" (*ecx), "r" (vmi_ops.cpuid)); 171 : "0" (*ax), "2" (*cx), "r" (vmi_ops.cpuid));
172 if (override) { 172 if (override) {
173 if (disable_pse) 173 if (disable_pse)
174 *edx &= ~X86_FEATURE_PSE; 174 *dx &= ~X86_FEATURE_PSE;
175 if (disable_pge) 175 if (disable_pge)
176 *edx &= ~X86_FEATURE_PGE; 176 *dx &= ~X86_FEATURE_PGE;
177 if (disable_sep) 177 if (disable_sep)
178 *edx &= ~X86_FEATURE_SEP; 178 *dx &= ~X86_FEATURE_SEP;
179 if (disable_tsc) 179 if (disable_tsc)
180 *edx &= ~X86_FEATURE_TSC; 180 *dx &= ~X86_FEATURE_TSC;
181 if (disable_mtrr) 181 if (disable_mtrr)
182 *edx &= ~X86_FEATURE_MTRR; 182 *dx &= ~X86_FEATURE_MTRR;
183 } 183 }
184} 184}
185 185