aboutsummaryrefslogtreecommitdiffstats
path: root/arch/x86/kernel/pci-gart_64.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/x86/kernel/pci-gart_64.c')
-rw-r--r--arch/x86/kernel/pci-gart_64.c169
1 files changed, 93 insertions, 76 deletions
diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/pci-gart_64.c
index a7f1b64f86e0..0f7f130caa67 100644
--- a/arch/x86/kernel/pci-gart_64.c
+++ b/arch/x86/kernel/pci-gart_64.c
@@ -23,12 +23,13 @@
23#include <linux/module.h> 23#include <linux/module.h>
24#include <linux/topology.h> 24#include <linux/topology.h>
25#include <linux/interrupt.h> 25#include <linux/interrupt.h>
26#include <linux/bitops.h> 26#include <linux/bitmap.h>
27#include <linux/kdebug.h> 27#include <linux/kdebug.h>
28#include <linux/scatterlist.h> 28#include <linux/scatterlist.h>
29#include <linux/iommu-helper.h> 29#include <linux/iommu-helper.h>
30#include <linux/sysdev.h> 30#include <linux/sysdev.h>
31#include <linux/io.h> 31#include <linux/io.h>
32#include <linux/gfp.h>
32#include <asm/atomic.h> 33#include <asm/atomic.h>
33#include <asm/mtrr.h> 34#include <asm/mtrr.h>
34#include <asm/pgtable.h> 35#include <asm/pgtable.h>
@@ -39,6 +40,7 @@
39#include <asm/swiotlb.h> 40#include <asm/swiotlb.h>
40#include <asm/dma.h> 41#include <asm/dma.h>
41#include <asm/k8.h> 42#include <asm/k8.h>
43#include <asm/x86_init.h>
42 44
43static unsigned long iommu_bus_base; /* GART remapping area (physical) */ 45static unsigned long iommu_bus_base; /* GART remapping area (physical) */
44static unsigned long iommu_size; /* size of remapping area bytes */ 46static unsigned long iommu_size; /* size of remapping area bytes */
@@ -46,6 +48,8 @@ static unsigned long iommu_pages; /* .. and in pages */
46 48
47static u32 *iommu_gatt_base; /* Remapping table */ 49static u32 *iommu_gatt_base; /* Remapping table */
48 50
51static dma_addr_t bad_dma_addr;
52
49/* 53/*
50 * If this is disabled the IOMMU will use an optimized flushing strategy 54 * If this is disabled the IOMMU will use an optimized flushing strategy
51 * of only flushing when an mapping is reused. With it true the GART is 55 * of only flushing when an mapping is reused. With it true the GART is
@@ -92,7 +96,7 @@ static unsigned long alloc_iommu(struct device *dev, int size,
92 96
93 base_index = ALIGN(iommu_bus_base & dma_get_seg_boundary(dev), 97 base_index = ALIGN(iommu_bus_base & dma_get_seg_boundary(dev),
94 PAGE_SIZE) >> PAGE_SHIFT; 98 PAGE_SIZE) >> PAGE_SHIFT;
95 boundary_size = ALIGN((unsigned long long)dma_get_seg_boundary(dev) + 1, 99 boundary_size = ALIGN((u64)dma_get_seg_boundary(dev) + 1,
96 PAGE_SIZE) >> PAGE_SHIFT; 100 PAGE_SIZE) >> PAGE_SHIFT;
97 101
98 spin_lock_irqsave(&iommu_bitmap_lock, flags); 102 spin_lock_irqsave(&iommu_bitmap_lock, flags);
@@ -123,7 +127,7 @@ static void free_iommu(unsigned long offset, int size)
123 unsigned long flags; 127 unsigned long flags;
124 128
125 spin_lock_irqsave(&iommu_bitmap_lock, flags); 129 spin_lock_irqsave(&iommu_bitmap_lock, flags);
126 iommu_area_free(iommu_gart_bitmap, offset, size); 130 bitmap_clear(iommu_gart_bitmap, offset, size);
127 if (offset >= next_bit) 131 if (offset >= next_bit)
128 next_bit = offset + size; 132 next_bit = offset + size;
129 spin_unlock_irqrestore(&iommu_bitmap_lock, flags); 133 spin_unlock_irqrestore(&iommu_bitmap_lock, flags);
@@ -216,7 +220,7 @@ static dma_addr_t dma_map_area(struct device *dev, dma_addr_t phys_mem,
216 if (panic_on_overflow) 220 if (panic_on_overflow)
217 panic("dma_map_area overflow %lu bytes\n", size); 221 panic("dma_map_area overflow %lu bytes\n", size);
218 iommu_full(dev, size, dir); 222 iommu_full(dev, size, dir);
219 return bad_dma_address; 223 return bad_dma_addr;
220 } 224 }
221 225
222 for (i = 0; i < npages; i++) { 226 for (i = 0; i < npages; i++) {
@@ -294,7 +298,7 @@ static int dma_map_sg_nonforce(struct device *dev, struct scatterlist *sg,
294 int i; 298 int i;
295 299
296#ifdef CONFIG_IOMMU_DEBUG 300#ifdef CONFIG_IOMMU_DEBUG
297 printk(KERN_DEBUG "dma_map_sg overflow\n"); 301 pr_debug("dma_map_sg overflow\n");
298#endif 302#endif
299 303
300 for_each_sg(sg, s, nents, i) { 304 for_each_sg(sg, s, nents, i) {
@@ -302,7 +306,7 @@ static int dma_map_sg_nonforce(struct device *dev, struct scatterlist *sg,
302 306
303 if (nonforced_iommu(dev, addr, s->length)) { 307 if (nonforced_iommu(dev, addr, s->length)) {
304 addr = dma_map_area(dev, addr, s->length, dir, 0); 308 addr = dma_map_area(dev, addr, s->length, dir, 0);
305 if (addr == bad_dma_address) { 309 if (addr == bad_dma_addr) {
306 if (i > 0) 310 if (i > 0)
307 gart_unmap_sg(dev, sg, i, dir, NULL); 311 gart_unmap_sg(dev, sg, i, dir, NULL);
308 nents = 0; 312 nents = 0;
@@ -389,12 +393,14 @@ static int gart_map_sg(struct device *dev, struct scatterlist *sg, int nents,
389 if (!dev) 393 if (!dev)
390 dev = &x86_dma_fallback_dev; 394 dev = &x86_dma_fallback_dev;
391 395
392 out = 0; 396 out = 0;
393 start = 0; 397 start = 0;
394 start_sg = sgmap = sg; 398 start_sg = sg;
395 seg_size = 0; 399 sgmap = sg;
396 max_seg_size = dma_get_max_seg_size(dev); 400 seg_size = 0;
397 ps = NULL; /* shut up gcc */ 401 max_seg_size = dma_get_max_seg_size(dev);
402 ps = NULL; /* shut up gcc */
403
398 for_each_sg(sg, s, nents, i) { 404 for_each_sg(sg, s, nents, i) {
399 dma_addr_t addr = sg_phys(s); 405 dma_addr_t addr = sg_phys(s);
400 406
@@ -417,11 +423,12 @@ static int gart_map_sg(struct device *dev, struct scatterlist *sg, int nents,
417 sgmap, pages, need) < 0) 423 sgmap, pages, need) < 0)
418 goto error; 424 goto error;
419 out++; 425 out++;
420 seg_size = 0; 426
421 sgmap = sg_next(sgmap); 427 seg_size = 0;
422 pages = 0; 428 sgmap = sg_next(sgmap);
423 start = i; 429 pages = 0;
424 start_sg = s; 430 start = i;
431 start_sg = s;
425 } 432 }
426 } 433 }
427 434
@@ -455,7 +462,7 @@ error:
455 462
456 iommu_full(dev, pages << PAGE_SHIFT, dir); 463 iommu_full(dev, pages << PAGE_SHIFT, dir);
457 for_each_sg(sg, s, nents, i) 464 for_each_sg(sg, s, nents, i)
458 s->dma_address = bad_dma_address; 465 s->dma_address = bad_dma_addr;
459 return 0; 466 return 0;
460} 467}
461 468
@@ -479,7 +486,7 @@ gart_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_addr,
479 DMA_BIDIRECTIONAL, align_mask); 486 DMA_BIDIRECTIONAL, align_mask);
480 487
481 flush_gart(); 488 flush_gart();
482 if (paddr != bad_dma_address) { 489 if (paddr != bad_dma_addr) {
483 *dma_addr = paddr; 490 *dma_addr = paddr;
484 return page_address(page); 491 return page_address(page);
485 } 492 }
@@ -499,6 +506,11 @@ gart_free_coherent(struct device *dev, size_t size, void *vaddr,
499 free_pages((unsigned long)vaddr, get_order(size)); 506 free_pages((unsigned long)vaddr, get_order(size));
500} 507}
501 508
509static int gart_mapping_error(struct device *dev, dma_addr_t dma_addr)
510{
511 return (dma_addr == bad_dma_addr);
512}
513
502static int no_agp; 514static int no_agp;
503 515
504static __init unsigned long check_iommu_size(unsigned long aper, u64 aper_size) 516static __init unsigned long check_iommu_size(unsigned long aper, u64 aper_size)
@@ -515,7 +527,7 @@ static __init unsigned long check_iommu_size(unsigned long aper, u64 aper_size)
515 iommu_size -= round_up(a, PMD_PAGE_SIZE) - a; 527 iommu_size -= round_up(a, PMD_PAGE_SIZE) - a;
516 528
517 if (iommu_size < 64*1024*1024) { 529 if (iommu_size < 64*1024*1024) {
518 printk(KERN_WARNING 530 pr_warning(
519 "PCI-DMA: Warning: Small IOMMU %luMB." 531 "PCI-DMA: Warning: Small IOMMU %luMB."
520 " Consider increasing the AGP aperture in BIOS\n", 532 " Consider increasing the AGP aperture in BIOS\n",
521 iommu_size >> 20); 533 iommu_size >> 20);
@@ -553,6 +565,9 @@ static void enable_gart_translations(void)
553 565
554 enable_gart_translation(dev, __pa(agp_gatt_table)); 566 enable_gart_translation(dev, __pa(agp_gatt_table));
555 } 567 }
568
569 /* Flush the GART-TLB to remove stale entries */
570 k8_flush_garts();
556} 571}
557 572
558/* 573/*
@@ -570,28 +585,32 @@ void set_up_gart_resume(u32 aper_order, u32 aper_alloc)
570 aperture_alloc = aper_alloc; 585 aperture_alloc = aper_alloc;
571} 586}
572 587
573static int gart_resume(struct sys_device *dev) 588static void gart_fixup_northbridges(struct sys_device *dev)
574{ 589{
575 printk(KERN_INFO "PCI-DMA: Resuming GART IOMMU\n"); 590 int i;
576 591
577 if (fix_up_north_bridges) { 592 if (!fix_up_north_bridges)
578 int i; 593 return;
579 594
580 printk(KERN_INFO "PCI-DMA: Restoring GART aperture settings\n"); 595 pr_info("PCI-DMA: Restoring GART aperture settings\n");
581 596
582 for (i = 0; i < num_k8_northbridges; i++) { 597 for (i = 0; i < num_k8_northbridges; i++) {
583 struct pci_dev *dev = k8_northbridges[i]; 598 struct pci_dev *dev = k8_northbridges[i];
584 599
585 /* 600 /*
586 * Don't enable translations just yet. That is the next 601 * Don't enable translations just yet. That is the next
587 * step. Restore the pre-suspend aperture settings. 602 * step. Restore the pre-suspend aperture settings.
588 */ 603 */
589 pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, 604 pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, aperture_order << 1);
590 aperture_order << 1); 605 pci_write_config_dword(dev, AMD64_GARTAPERTUREBASE, aperture_alloc >> 25);
591 pci_write_config_dword(dev, AMD64_GARTAPERTUREBASE,
592 aperture_alloc >> 25);
593 }
594 } 606 }
607}
608
609static int gart_resume(struct sys_device *dev)
610{
611 pr_info("PCI-DMA: Resuming GART IOMMU\n");
612
613 gart_fixup_northbridges(dev);
595 614
596 enable_gart_translations(); 615 enable_gart_translations();
597 616
@@ -604,15 +623,14 @@ static int gart_suspend(struct sys_device *dev, pm_message_t state)
604} 623}
605 624
606static struct sysdev_class gart_sysdev_class = { 625static struct sysdev_class gart_sysdev_class = {
607 .name = "gart", 626 .name = "gart",
608 .suspend = gart_suspend, 627 .suspend = gart_suspend,
609 .resume = gart_resume, 628 .resume = gart_resume,
610 629
611}; 630};
612 631
613static struct sys_device device_gart = { 632static struct sys_device device_gart = {
614 .id = 0, 633 .cls = &gart_sysdev_class,
615 .cls = &gart_sysdev_class,
616}; 634};
617 635
618/* 636/*
@@ -627,7 +645,8 @@ static __init int init_k8_gatt(struct agp_kern_info *info)
627 void *gatt; 645 void *gatt;
628 int i, error; 646 int i, error;
629 647
630 printk(KERN_INFO "PCI-DMA: Disabling AGP.\n"); 648 pr_info("PCI-DMA: Disabling AGP.\n");
649
631 aper_size = aper_base = info->aper_size = 0; 650 aper_size = aper_base = info->aper_size = 0;
632 dev = NULL; 651 dev = NULL;
633 for (i = 0; i < num_k8_northbridges; i++) { 652 for (i = 0; i < num_k8_northbridges; i++) {
@@ -645,6 +664,7 @@ static __init int init_k8_gatt(struct agp_kern_info *info)
645 } 664 }
646 if (!aper_base) 665 if (!aper_base)
647 goto nommu; 666 goto nommu;
667
648 info->aper_base = aper_base; 668 info->aper_base = aper_base;
649 info->aper_size = aper_size >> 20; 669 info->aper_size = aper_size >> 20;
650 670
@@ -667,14 +687,14 @@ static __init int init_k8_gatt(struct agp_kern_info *info)
667 687
668 flush_gart(); 688 flush_gart();
669 689
670 printk(KERN_INFO "PCI-DMA: aperture base @ %x size %u KB\n", 690 pr_info("PCI-DMA: aperture base @ %x size %u KB\n",
671 aper_base, aper_size>>10); 691 aper_base, aper_size>>10);
672 692
673 return 0; 693 return 0;
674 694
675 nommu: 695 nommu:
676 /* Should not happen anymore */ 696 /* Should not happen anymore */
677 printk(KERN_WARNING "PCI-DMA: More than 4GB of RAM and no IOMMU\n" 697 pr_warning("PCI-DMA: More than 4GB of RAM and no IOMMU\n"
678 "falling back to iommu=soft.\n"); 698 "falling back to iommu=soft.\n");
679 return -1; 699 return -1;
680} 700}
@@ -686,14 +706,16 @@ static struct dma_map_ops gart_dma_ops = {
686 .unmap_page = gart_unmap_page, 706 .unmap_page = gart_unmap_page,
687 .alloc_coherent = gart_alloc_coherent, 707 .alloc_coherent = gart_alloc_coherent,
688 .free_coherent = gart_free_coherent, 708 .free_coherent = gart_free_coherent,
709 .mapping_error = gart_mapping_error,
689}; 710};
690 711
691void gart_iommu_shutdown(void) 712static void gart_iommu_shutdown(void)
692{ 713{
693 struct pci_dev *dev; 714 struct pci_dev *dev;
694 int i; 715 int i;
695 716
696 if (no_agp && (dma_ops != &gart_dma_ops)) 717 /* don't shutdown it if there is AGP installed */
718 if (!no_agp)
697 return; 719 return;
698 720
699 for (i = 0; i < num_k8_northbridges; i++) { 721 for (i = 0; i < num_k8_northbridges; i++) {
@@ -708,7 +730,7 @@ void gart_iommu_shutdown(void)
708 } 730 }
709} 731}
710 732
711void __init gart_iommu_init(void) 733int __init gart_iommu_init(void)
712{ 734{
713 struct agp_kern_info info; 735 struct agp_kern_info info;
714 unsigned long iommu_start; 736 unsigned long iommu_start;
@@ -717,8 +739,8 @@ void __init gart_iommu_init(void)
717 unsigned long scratch; 739 unsigned long scratch;
718 long i; 740 long i;
719 741
720 if (cache_k8_northbridges() < 0 || num_k8_northbridges == 0) 742 if (num_k8_northbridges == 0)
721 return; 743 return 0;
722 744
723#ifndef CONFIG_AGP_AMD64 745#ifndef CONFIG_AGP_AMD64
724 no_agp = 1; 746 no_agp = 1;
@@ -730,35 +752,28 @@ void __init gart_iommu_init(void)
730 (agp_copy_info(agp_bridge, &info) < 0); 752 (agp_copy_info(agp_bridge, &info) < 0);
731#endif 753#endif
732 754
733 if (swiotlb)
734 return;
735
736 /* Did we detect a different HW IOMMU? */
737 if (iommu_detected && !gart_iommu_aperture)
738 return;
739
740 if (no_iommu || 755 if (no_iommu ||
741 (!force_iommu && max_pfn <= MAX_DMA32_PFN) || 756 (!force_iommu && max_pfn <= MAX_DMA32_PFN) ||
742 !gart_iommu_aperture || 757 !gart_iommu_aperture ||
743 (no_agp && init_k8_gatt(&info) < 0)) { 758 (no_agp && init_k8_gatt(&info) < 0)) {
744 if (max_pfn > MAX_DMA32_PFN) { 759 if (max_pfn > MAX_DMA32_PFN) {
745 printk(KERN_WARNING "More than 4GB of memory " 760 pr_warning("More than 4GB of memory but GART IOMMU not available.\n");
746 "but GART IOMMU not available.\n"); 761 pr_warning("falling back to iommu=soft.\n");
747 printk(KERN_WARNING "falling back to iommu=soft.\n");
748 } 762 }
749 return; 763 return 0;
750 } 764 }
751 765
752 /* need to map that range */ 766 /* need to map that range */
753 aper_size = info.aper_size << 20; 767 aper_size = info.aper_size << 20;
754 aper_base = info.aper_base; 768 aper_base = info.aper_base;
755 end_pfn = (aper_base>>PAGE_SHIFT) + (aper_size>>PAGE_SHIFT); 769 end_pfn = (aper_base>>PAGE_SHIFT) + (aper_size>>PAGE_SHIFT);
770
756 if (end_pfn > max_low_pfn_mapped) { 771 if (end_pfn > max_low_pfn_mapped) {
757 start_pfn = (aper_base>>PAGE_SHIFT); 772 start_pfn = (aper_base>>PAGE_SHIFT);
758 init_memory_mapping(start_pfn<<PAGE_SHIFT, end_pfn<<PAGE_SHIFT); 773 init_memory_mapping(start_pfn<<PAGE_SHIFT, end_pfn<<PAGE_SHIFT);
759 } 774 }
760 775
761 printk(KERN_INFO "PCI-DMA: using GART IOMMU.\n"); 776 pr_info("PCI-DMA: using GART IOMMU.\n");
762 iommu_size = check_iommu_size(info.aper_base, aper_size); 777 iommu_size = check_iommu_size(info.aper_base, aper_size);
763 iommu_pages = iommu_size >> PAGE_SHIFT; 778 iommu_pages = iommu_size >> PAGE_SHIFT;
764 779
@@ -773,8 +788,7 @@ void __init gart_iommu_init(void)
773 788
774 ret = dma_debug_resize_entries(iommu_pages); 789 ret = dma_debug_resize_entries(iommu_pages);
775 if (ret) 790 if (ret)
776 printk(KERN_DEBUG 791 pr_debug("PCI-DMA: Cannot trace all the entries\n");
777 "PCI-DMA: Cannot trace all the entries\n");
778 } 792 }
779#endif 793#endif
780 794
@@ -782,17 +796,16 @@ void __init gart_iommu_init(void)
782 * Out of IOMMU space handling. 796 * Out of IOMMU space handling.
783 * Reserve some invalid pages at the beginning of the GART. 797 * Reserve some invalid pages at the beginning of the GART.
784 */ 798 */
785 iommu_area_reserve(iommu_gart_bitmap, 0, EMERGENCY_PAGES); 799 bitmap_set(iommu_gart_bitmap, 0, EMERGENCY_PAGES);
786 800
787 agp_memory_reserved = iommu_size; 801 pr_info("PCI-DMA: Reserving %luMB of IOMMU area in the AGP aperture\n",
788 printk(KERN_INFO
789 "PCI-DMA: Reserving %luMB of IOMMU area in the AGP aperture\n",
790 iommu_size >> 20); 802 iommu_size >> 20);
791 803
792 iommu_start = aper_size - iommu_size; 804 agp_memory_reserved = iommu_size;
793 iommu_bus_base = info.aper_base + iommu_start; 805 iommu_start = aper_size - iommu_size;
794 bad_dma_address = iommu_bus_base; 806 iommu_bus_base = info.aper_base + iommu_start;
795 iommu_gatt_base = agp_gatt_table + (iommu_start>>PAGE_SHIFT); 807 bad_dma_addr = iommu_bus_base;
808 iommu_gatt_base = agp_gatt_table + (iommu_start>>PAGE_SHIFT);
796 809
797 /* 810 /*
798 * Unmap the IOMMU part of the GART. The alias of the page is 811 * Unmap the IOMMU part of the GART. The alias of the page is
@@ -814,7 +827,7 @@ void __init gart_iommu_init(void)
814 * the pages as Not-Present: 827 * the pages as Not-Present:
815 */ 828 */
816 wbinvd(); 829 wbinvd();
817 830
818 /* 831 /*
819 * Now all caches are flushed and we can safely enable 832 * Now all caches are flushed and we can safely enable
820 * GART hardware. Doing it early leaves the possibility 833 * GART hardware. Doing it early leaves the possibility
@@ -838,6 +851,10 @@ void __init gart_iommu_init(void)
838 851
839 flush_gart(); 852 flush_gart();
840 dma_ops = &gart_dma_ops; 853 dma_ops = &gart_dma_ops;
854 x86_platform.iommu_shutdown = gart_iommu_shutdown;
855 swiotlb = 0;
856
857 return 0;
841} 858}
842 859
843void __init gart_parse_options(char *p) 860void __init gart_parse_options(char *p)
@@ -856,7 +873,7 @@ void __init gart_parse_options(char *p)
856#endif 873#endif
857 if (isdigit(*p) && get_option(&p, &arg)) 874 if (isdigit(*p) && get_option(&p, &arg))
858 iommu_size = arg; 875 iommu_size = arg;
859 if (!strncmp(p, "fullflush", 8)) 876 if (!strncmp(p, "fullflush", 9))
860 iommu_fullflush = 1; 877 iommu_fullflush = 1;
861 if (!strncmp(p, "nofullflush", 11)) 878 if (!strncmp(p, "nofullflush", 11))
862 iommu_fullflush = 0; 879 iommu_fullflush = 0;