diff options
Diffstat (limited to 'arch/x86/kernel/cpu')
-rw-r--r-- | arch/x86/kernel/cpu/common.c | 9 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c | 58 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/mcheck/mce_64.c | 33 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/mcheck/mce_intel_64.c | 10 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/mtrr/generic.c | 6 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/proc.c | 2 |
6 files changed, 68 insertions, 50 deletions
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index c4f667896c28..77848d9fca68 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c | |||
@@ -114,6 +114,13 @@ DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page) = { .gdt = { | |||
114 | } }; | 114 | } }; |
115 | EXPORT_PER_CPU_SYMBOL_GPL(gdt_page); | 115 | EXPORT_PER_CPU_SYMBOL_GPL(gdt_page); |
116 | 116 | ||
117 | static int __init x86_xsave_setup(char *s) | ||
118 | { | ||
119 | setup_clear_cpu_cap(X86_FEATURE_XSAVE); | ||
120 | return 1; | ||
121 | } | ||
122 | __setup("noxsave", x86_xsave_setup); | ||
123 | |||
117 | #ifdef CONFIG_X86_32 | 124 | #ifdef CONFIG_X86_32 |
118 | static int cachesize_override __cpuinitdata = -1; | 125 | static int cachesize_override __cpuinitdata = -1; |
119 | static int disable_x86_serial_nr __cpuinitdata = 1; | 126 | static int disable_x86_serial_nr __cpuinitdata = 1; |
@@ -1203,6 +1210,8 @@ void __cpuinit cpu_init(void) | |||
1203 | load_TR_desc(); | 1210 | load_TR_desc(); |
1204 | load_LDT(&init_mm.context); | 1211 | load_LDT(&init_mm.context); |
1205 | 1212 | ||
1213 | t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap); | ||
1214 | |||
1206 | #ifdef CONFIG_DOUBLEFAULT | 1215 | #ifdef CONFIG_DOUBLEFAULT |
1207 | /* Set up doublefault TSS pointer in the GDT */ | 1216 | /* Set up doublefault TSS pointer in the GDT */ |
1208 | __set_tss_desc(cpu, GDT_ENTRY_DOUBLEFAULT_TSS, &doublefault_tss); | 1217 | __set_tss_desc(cpu, GDT_ENTRY_DOUBLEFAULT_TSS, &doublefault_tss); |
diff --git a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c index 9d3af380c6bd..208ecf6643df 100644 --- a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c +++ b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c | |||
@@ -65,14 +65,18 @@ enum { | |||
65 | struct acpi_cpufreq_data { | 65 | struct acpi_cpufreq_data { |
66 | struct acpi_processor_performance *acpi_data; | 66 | struct acpi_processor_performance *acpi_data; |
67 | struct cpufreq_frequency_table *freq_table; | 67 | struct cpufreq_frequency_table *freq_table; |
68 | unsigned int max_freq; | ||
69 | unsigned int resume; | 68 | unsigned int resume; |
70 | unsigned int cpu_feature; | 69 | unsigned int cpu_feature; |
71 | u64 saved_aperf, saved_mperf; | ||
72 | }; | 70 | }; |
73 | 71 | ||
74 | static DEFINE_PER_CPU(struct acpi_cpufreq_data *, drv_data); | 72 | static DEFINE_PER_CPU(struct acpi_cpufreq_data *, drv_data); |
75 | 73 | ||
74 | struct acpi_msr_data { | ||
75 | u64 saved_aperf, saved_mperf; | ||
76 | }; | ||
77 | |||
78 | static DEFINE_PER_CPU(struct acpi_msr_data, msr_data); | ||
79 | |||
76 | DEFINE_TRACE(power_mark); | 80 | DEFINE_TRACE(power_mark); |
77 | 81 | ||
78 | /* acpi_perf_data is a pointer to percpu data. */ | 82 | /* acpi_perf_data is a pointer to percpu data. */ |
@@ -153,7 +157,8 @@ struct drv_cmd { | |||
153 | u32 val; | 157 | u32 val; |
154 | }; | 158 | }; |
155 | 159 | ||
156 | static long do_drv_read(void *_cmd) | 160 | /* Called via smp_call_function_single(), on the target CPU */ |
161 | static void do_drv_read(void *_cmd) | ||
157 | { | 162 | { |
158 | struct drv_cmd *cmd = _cmd; | 163 | struct drv_cmd *cmd = _cmd; |
159 | u32 h; | 164 | u32 h; |
@@ -170,10 +175,10 @@ static long do_drv_read(void *_cmd) | |||
170 | default: | 175 | default: |
171 | break; | 176 | break; |
172 | } | 177 | } |
173 | return 0; | ||
174 | } | 178 | } |
175 | 179 | ||
176 | static long do_drv_write(void *_cmd) | 180 | /* Called via smp_call_function_many(), on the target CPUs */ |
181 | static void do_drv_write(void *_cmd) | ||
177 | { | 182 | { |
178 | struct drv_cmd *cmd = _cmd; | 183 | struct drv_cmd *cmd = _cmd; |
179 | u32 lo, hi; | 184 | u32 lo, hi; |
@@ -192,23 +197,24 @@ static long do_drv_write(void *_cmd) | |||
192 | default: | 197 | default: |
193 | break; | 198 | break; |
194 | } | 199 | } |
195 | return 0; | ||
196 | } | 200 | } |
197 | 201 | ||
198 | static void drv_read(struct drv_cmd *cmd) | 202 | static void drv_read(struct drv_cmd *cmd) |
199 | { | 203 | { |
200 | cmd->val = 0; | 204 | cmd->val = 0; |
201 | 205 | ||
202 | work_on_cpu(cpumask_any(cmd->mask), do_drv_read, cmd); | 206 | smp_call_function_single(cpumask_any(cmd->mask), do_drv_read, cmd, 1); |
203 | } | 207 | } |
204 | 208 | ||
205 | static void drv_write(struct drv_cmd *cmd) | 209 | static void drv_write(struct drv_cmd *cmd) |
206 | { | 210 | { |
207 | unsigned int i; | 211 | int this_cpu; |
208 | 212 | ||
209 | for_each_cpu(i, cmd->mask) { | 213 | this_cpu = get_cpu(); |
210 | work_on_cpu(i, do_drv_write, cmd); | 214 | if (cpumask_test_cpu(this_cpu, cmd->mask)) |
211 | } | 215 | do_drv_write(cmd); |
216 | smp_call_function_many(cmd->mask, do_drv_write, cmd, 1); | ||
217 | put_cpu(); | ||
212 | } | 218 | } |
213 | 219 | ||
214 | static u32 get_cur_val(const struct cpumask *mask) | 220 | static u32 get_cur_val(const struct cpumask *mask) |
@@ -252,15 +258,13 @@ struct perf_pair { | |||
252 | } aperf, mperf; | 258 | } aperf, mperf; |
253 | }; | 259 | }; |
254 | 260 | ||
255 | 261 | /* Called via smp_call_function_single(), on the target CPU */ | |
256 | static long read_measured_perf_ctrs(void *_cur) | 262 | static void read_measured_perf_ctrs(void *_cur) |
257 | { | 263 | { |
258 | struct perf_pair *cur = _cur; | 264 | struct perf_pair *cur = _cur; |
259 | 265 | ||
260 | rdmsr(MSR_IA32_APERF, cur->aperf.split.lo, cur->aperf.split.hi); | 266 | rdmsr(MSR_IA32_APERF, cur->aperf.split.lo, cur->aperf.split.hi); |
261 | rdmsr(MSR_IA32_MPERF, cur->mperf.split.lo, cur->mperf.split.hi); | 267 | rdmsr(MSR_IA32_MPERF, cur->mperf.split.lo, cur->mperf.split.hi); |
262 | |||
263 | return 0; | ||
264 | } | 268 | } |
265 | 269 | ||
266 | /* | 270 | /* |
@@ -283,15 +287,15 @@ static unsigned int get_measured_perf(struct cpufreq_policy *policy, | |||
283 | unsigned int perf_percent; | 287 | unsigned int perf_percent; |
284 | unsigned int retval; | 288 | unsigned int retval; |
285 | 289 | ||
286 | if (!work_on_cpu(cpu, read_measured_perf_ctrs, &readin)) | 290 | if (smp_call_function_single(cpu, read_measured_perf_ctrs, &readin, 1)) |
287 | return 0; | 291 | return 0; |
288 | 292 | ||
289 | cur.aperf.whole = readin.aperf.whole - | 293 | cur.aperf.whole = readin.aperf.whole - |
290 | per_cpu(drv_data, cpu)->saved_aperf; | 294 | per_cpu(msr_data, cpu).saved_aperf; |
291 | cur.mperf.whole = readin.mperf.whole - | 295 | cur.mperf.whole = readin.mperf.whole - |
292 | per_cpu(drv_data, cpu)->saved_mperf; | 296 | per_cpu(msr_data, cpu).saved_mperf; |
293 | per_cpu(drv_data, cpu)->saved_aperf = readin.aperf.whole; | 297 | per_cpu(msr_data, cpu).saved_aperf = readin.aperf.whole; |
294 | per_cpu(drv_data, cpu)->saved_mperf = readin.mperf.whole; | 298 | per_cpu(msr_data, cpu).saved_mperf = readin.mperf.whole; |
295 | 299 | ||
296 | #ifdef __i386__ | 300 | #ifdef __i386__ |
297 | /* | 301 | /* |
@@ -335,7 +339,7 @@ static unsigned int get_measured_perf(struct cpufreq_policy *policy, | |||
335 | 339 | ||
336 | #endif | 340 | #endif |
337 | 341 | ||
338 | retval = per_cpu(drv_data, policy->cpu)->max_freq * perf_percent / 100; | 342 | retval = (policy->cpuinfo.max_freq * perf_percent) / 100; |
339 | 343 | ||
340 | return retval; | 344 | return retval; |
341 | } | 345 | } |
@@ -688,16 +692,11 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) | |||
688 | /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */ | 692 | /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */ |
689 | if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE && | 693 | if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE && |
690 | policy->cpuinfo.transition_latency > 20 * 1000) { | 694 | policy->cpuinfo.transition_latency > 20 * 1000) { |
691 | static int print_once; | ||
692 | policy->cpuinfo.transition_latency = 20 * 1000; | 695 | policy->cpuinfo.transition_latency = 20 * 1000; |
693 | if (!print_once) { | 696 | printk_once(KERN_INFO "Capping off P-state tranision" |
694 | print_once = 1; | 697 | " latency at 20 uS\n"); |
695 | printk(KERN_INFO "Capping off P-state tranision latency" | ||
696 | " at 20 uS\n"); | ||
697 | } | ||
698 | } | 698 | } |
699 | 699 | ||
700 | data->max_freq = perf->states[0].core_frequency * 1000; | ||
701 | /* table init */ | 700 | /* table init */ |
702 | for (i = 0; i < perf->state_count; i++) { | 701 | for (i = 0; i < perf->state_count; i++) { |
703 | if (i > 0 && perf->states[i].core_frequency >= | 702 | if (i > 0 && perf->states[i].core_frequency >= |
@@ -716,6 +715,9 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) | |||
716 | if (result) | 715 | if (result) |
717 | goto err_freqfree; | 716 | goto err_freqfree; |
718 | 717 | ||
718 | if (perf->states[0].core_frequency * 1000 != policy->cpuinfo.max_freq) | ||
719 | printk(KERN_WARNING FW_WARN "P-state 0 is not max freq\n"); | ||
720 | |||
719 | switch (perf->control_register.space_id) { | 721 | switch (perf->control_register.space_id) { |
720 | case ACPI_ADR_SPACE_SYSTEM_IO: | 722 | case ACPI_ADR_SPACE_SYSTEM_IO: |
721 | /* Current speed is unknown and not detectable by IO port */ | 723 | /* Current speed is unknown and not detectable by IO port */ |
diff --git a/arch/x86/kernel/cpu/mcheck/mce_64.c b/arch/x86/kernel/cpu/mcheck/mce_64.c index 863f89568b1a..6fb0b359d2a5 100644 --- a/arch/x86/kernel/cpu/mcheck/mce_64.c +++ b/arch/x86/kernel/cpu/mcheck/mce_64.c | |||
@@ -239,9 +239,10 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b) | |||
239 | * Don't get the IP here because it's unlikely to | 239 | * Don't get the IP here because it's unlikely to |
240 | * have anything to do with the actual error location. | 240 | * have anything to do with the actual error location. |
241 | */ | 241 | */ |
242 | 242 | if (!(flags & MCP_DONTLOG)) { | |
243 | mce_log(&m); | 243 | mce_log(&m); |
244 | add_taint(TAINT_MACHINE_CHECK); | 244 | add_taint(TAINT_MACHINE_CHECK); |
245 | } | ||
245 | 246 | ||
246 | /* | 247 | /* |
247 | * Clear state for this bank. | 248 | * Clear state for this bank. |
@@ -452,13 +453,14 @@ void mce_log_therm_throt_event(__u64 status) | |||
452 | */ | 453 | */ |
453 | 454 | ||
454 | static int check_interval = 5 * 60; /* 5 minutes */ | 455 | static int check_interval = 5 * 60; /* 5 minutes */ |
455 | static int next_interval; /* in jiffies */ | 456 | static DEFINE_PER_CPU(int, next_interval); /* in jiffies */ |
456 | static void mcheck_timer(unsigned long); | 457 | static void mcheck_timer(unsigned long); |
457 | static DEFINE_PER_CPU(struct timer_list, mce_timer); | 458 | static DEFINE_PER_CPU(struct timer_list, mce_timer); |
458 | 459 | ||
459 | static void mcheck_timer(unsigned long data) | 460 | static void mcheck_timer(unsigned long data) |
460 | { | 461 | { |
461 | struct timer_list *t = &per_cpu(mce_timer, data); | 462 | struct timer_list *t = &per_cpu(mce_timer, data); |
463 | int *n; | ||
462 | 464 | ||
463 | WARN_ON(smp_processor_id() != data); | 465 | WARN_ON(smp_processor_id() != data); |
464 | 466 | ||
@@ -470,14 +472,14 @@ static void mcheck_timer(unsigned long data) | |||
470 | * Alert userspace if needed. If we logged an MCE, reduce the | 472 | * Alert userspace if needed. If we logged an MCE, reduce the |
471 | * polling interval, otherwise increase the polling interval. | 473 | * polling interval, otherwise increase the polling interval. |
472 | */ | 474 | */ |
475 | n = &__get_cpu_var(next_interval); | ||
473 | if (mce_notify_user()) { | 476 | if (mce_notify_user()) { |
474 | next_interval = max(next_interval/2, HZ/100); | 477 | *n = max(*n/2, HZ/100); |
475 | } else { | 478 | } else { |
476 | next_interval = min(next_interval * 2, | 479 | *n = min(*n*2, (int)round_jiffies_relative(check_interval*HZ)); |
477 | (int)round_jiffies_relative(check_interval*HZ)); | ||
478 | } | 480 | } |
479 | 481 | ||
480 | t->expires = jiffies + next_interval; | 482 | t->expires = jiffies + *n; |
481 | add_timer(t); | 483 | add_timer(t); |
482 | } | 484 | } |
483 | 485 | ||
@@ -584,7 +586,7 @@ static void mce_init(void *dummy) | |||
584 | * Log the machine checks left over from the previous reset. | 586 | * Log the machine checks left over from the previous reset. |
585 | */ | 587 | */ |
586 | bitmap_fill(all_banks, MAX_NR_BANKS); | 588 | bitmap_fill(all_banks, MAX_NR_BANKS); |
587 | machine_check_poll(MCP_UC, &all_banks); | 589 | machine_check_poll(MCP_UC|(!mce_bootlog ? MCP_DONTLOG : 0), &all_banks); |
588 | 590 | ||
589 | set_in_cr4(X86_CR4_MCE); | 591 | set_in_cr4(X86_CR4_MCE); |
590 | 592 | ||
@@ -632,14 +634,13 @@ static void mce_cpu_features(struct cpuinfo_x86 *c) | |||
632 | static void mce_init_timer(void) | 634 | static void mce_init_timer(void) |
633 | { | 635 | { |
634 | struct timer_list *t = &__get_cpu_var(mce_timer); | 636 | struct timer_list *t = &__get_cpu_var(mce_timer); |
637 | int *n = &__get_cpu_var(next_interval); | ||
635 | 638 | ||
636 | /* data race harmless because everyone sets to the same value */ | 639 | *n = check_interval * HZ; |
637 | if (!next_interval) | 640 | if (!*n) |
638 | next_interval = check_interval * HZ; | ||
639 | if (!next_interval) | ||
640 | return; | 641 | return; |
641 | setup_timer(t, mcheck_timer, smp_processor_id()); | 642 | setup_timer(t, mcheck_timer, smp_processor_id()); |
642 | t->expires = round_jiffies(jiffies + next_interval); | 643 | t->expires = round_jiffies(jiffies + *n); |
643 | add_timer(t); | 644 | add_timer(t); |
644 | } | 645 | } |
645 | 646 | ||
@@ -907,7 +908,6 @@ static void mce_cpu_restart(void *data) | |||
907 | /* Reinit MCEs after user configuration changes */ | 908 | /* Reinit MCEs after user configuration changes */ |
908 | static void mce_restart(void) | 909 | static void mce_restart(void) |
909 | { | 910 | { |
910 | next_interval = check_interval * HZ; | ||
911 | on_each_cpu(mce_cpu_restart, NULL, 1); | 911 | on_each_cpu(mce_cpu_restart, NULL, 1); |
912 | } | 912 | } |
913 | 913 | ||
@@ -1110,7 +1110,8 @@ static int __cpuinit mce_cpu_callback(struct notifier_block *nfb, | |||
1110 | break; | 1110 | break; |
1111 | case CPU_DOWN_FAILED: | 1111 | case CPU_DOWN_FAILED: |
1112 | case CPU_DOWN_FAILED_FROZEN: | 1112 | case CPU_DOWN_FAILED_FROZEN: |
1113 | t->expires = round_jiffies(jiffies + next_interval); | 1113 | t->expires = round_jiffies(jiffies + |
1114 | __get_cpu_var(next_interval)); | ||
1114 | add_timer_on(t, cpu); | 1115 | add_timer_on(t, cpu); |
1115 | smp_call_function_single(cpu, mce_reenable_cpu, &action, 1); | 1116 | smp_call_function_single(cpu, mce_reenable_cpu, &action, 1); |
1116 | break; | 1117 | break; |
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c index d6b72df89d69..cef3ee30744b 100644 --- a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c +++ b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c | |||
@@ -151,10 +151,11 @@ static void print_update(char *type, int *hdr, int num) | |||
151 | static void cmci_discover(int banks, int boot) | 151 | static void cmci_discover(int banks, int boot) |
152 | { | 152 | { |
153 | unsigned long *owned = (void *)&__get_cpu_var(mce_banks_owned); | 153 | unsigned long *owned = (void *)&__get_cpu_var(mce_banks_owned); |
154 | unsigned long flags; | ||
154 | int hdr = 0; | 155 | int hdr = 0; |
155 | int i; | 156 | int i; |
156 | 157 | ||
157 | spin_lock(&cmci_discover_lock); | 158 | spin_lock_irqsave(&cmci_discover_lock, flags); |
158 | for (i = 0; i < banks; i++) { | 159 | for (i = 0; i < banks; i++) { |
159 | u64 val; | 160 | u64 val; |
160 | 161 | ||
@@ -184,7 +185,7 @@ static void cmci_discover(int banks, int boot) | |||
184 | WARN_ON(!test_bit(i, __get_cpu_var(mce_poll_banks))); | 185 | WARN_ON(!test_bit(i, __get_cpu_var(mce_poll_banks))); |
185 | } | 186 | } |
186 | } | 187 | } |
187 | spin_unlock(&cmci_discover_lock); | 188 | spin_unlock_irqrestore(&cmci_discover_lock, flags); |
188 | if (hdr) | 189 | if (hdr) |
189 | printk(KERN_CONT "\n"); | 190 | printk(KERN_CONT "\n"); |
190 | } | 191 | } |
@@ -211,13 +212,14 @@ void cmci_recheck(void) | |||
211 | */ | 212 | */ |
212 | void cmci_clear(void) | 213 | void cmci_clear(void) |
213 | { | 214 | { |
215 | unsigned long flags; | ||
214 | int i; | 216 | int i; |
215 | int banks; | 217 | int banks; |
216 | u64 val; | 218 | u64 val; |
217 | 219 | ||
218 | if (!cmci_supported(&banks)) | 220 | if (!cmci_supported(&banks)) |
219 | return; | 221 | return; |
220 | spin_lock(&cmci_discover_lock); | 222 | spin_lock_irqsave(&cmci_discover_lock, flags); |
221 | for (i = 0; i < banks; i++) { | 223 | for (i = 0; i < banks; i++) { |
222 | if (!test_bit(i, __get_cpu_var(mce_banks_owned))) | 224 | if (!test_bit(i, __get_cpu_var(mce_banks_owned))) |
223 | continue; | 225 | continue; |
@@ -227,7 +229,7 @@ void cmci_clear(void) | |||
227 | wrmsrl(MSR_IA32_MC0_CTL2 + i, val); | 229 | wrmsrl(MSR_IA32_MC0_CTL2 + i, val); |
228 | __clear_bit(i, __get_cpu_var(mce_banks_owned)); | 230 | __clear_bit(i, __get_cpu_var(mce_banks_owned)); |
229 | } | 231 | } |
230 | spin_unlock(&cmci_discover_lock); | 232 | spin_unlock_irqrestore(&cmci_discover_lock, flags); |
231 | } | 233 | } |
232 | 234 | ||
233 | /* | 235 | /* |
diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c index 0b776c09aff3..d21d4fb161f7 100644 --- a/arch/x86/kernel/cpu/mtrr/generic.c +++ b/arch/x86/kernel/cpu/mtrr/generic.c | |||
@@ -275,7 +275,11 @@ static void __init print_mtrr_state(void) | |||
275 | } | 275 | } |
276 | printk(KERN_DEBUG "MTRR variable ranges %sabled:\n", | 276 | printk(KERN_DEBUG "MTRR variable ranges %sabled:\n", |
277 | mtrr_state.enabled & 2 ? "en" : "dis"); | 277 | mtrr_state.enabled & 2 ? "en" : "dis"); |
278 | high_width = ((size_or_mask ? ffs(size_or_mask) - 1 : 32) - (32 - PAGE_SHIFT) + 3) / 4; | 278 | if (size_or_mask & 0xffffffffUL) |
279 | high_width = ffs(size_or_mask & 0xffffffffUL) - 1; | ||
280 | else | ||
281 | high_width = ffs(size_or_mask>>32) + 32 - 1; | ||
282 | high_width = (high_width - (32 - PAGE_SHIFT) + 3) / 4; | ||
279 | for (i = 0; i < num_var_ranges; ++i) { | 283 | for (i = 0; i < num_var_ranges; ++i) { |
280 | if (mtrr_state.var_ranges[i].mask_lo & (1 << 11)) | 284 | if (mtrr_state.var_ranges[i].mask_lo & (1 << 11)) |
281 | printk(KERN_DEBUG " %u base %0*X%05X000 mask %0*X%05X000 %s\n", | 285 | printk(KERN_DEBUG " %u base %0*X%05X000 mask %0*X%05X000 %s\n", |
diff --git a/arch/x86/kernel/cpu/proc.c b/arch/x86/kernel/cpu/proc.c index f93047fed791..d5e30397246b 100644 --- a/arch/x86/kernel/cpu/proc.c +++ b/arch/x86/kernel/cpu/proc.c | |||
@@ -14,7 +14,7 @@ static void show_cpuinfo_core(struct seq_file *m, struct cpuinfo_x86 *c, | |||
14 | if (c->x86_max_cores * smp_num_siblings > 1) { | 14 | if (c->x86_max_cores * smp_num_siblings > 1) { |
15 | seq_printf(m, "physical id\t: %d\n", c->phys_proc_id); | 15 | seq_printf(m, "physical id\t: %d\n", c->phys_proc_id); |
16 | seq_printf(m, "siblings\t: %d\n", | 16 | seq_printf(m, "siblings\t: %d\n", |
17 | cpumask_weight(cpu_sibling_mask(cpu))); | 17 | cpumask_weight(cpu_core_mask(cpu))); |
18 | seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id); | 18 | seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id); |
19 | seq_printf(m, "cpu cores\t: %d\n", c->booted_cores); | 19 | seq_printf(m, "cpu cores\t: %d\n", c->booted_cores); |
20 | seq_printf(m, "apicid\t\t: %d\n", c->apicid); | 20 | seq_printf(m, "apicid\t\t: %d\n", c->apicid); |