diff options
Diffstat (limited to 'arch/x86/kernel/cpu/perf_event_intel.c')
-rw-r--r-- | arch/x86/kernel/cpu/perf_event_intel.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c index c62d88396ad5..f31a1655d1ff 100644 --- a/arch/x86/kernel/cpu/perf_event_intel.c +++ b/arch/x86/kernel/cpu/perf_event_intel.c | |||
@@ -899,8 +899,8 @@ static __initconst const u64 atom_hw_cache_event_ids | |||
899 | static struct extra_reg intel_slm_extra_regs[] __read_mostly = | 899 | static struct extra_reg intel_slm_extra_regs[] __read_mostly = |
900 | { | 900 | { |
901 | /* must define OFFCORE_RSP_X first, see intel_fixup_er() */ | 901 | /* must define OFFCORE_RSP_X first, see intel_fixup_er() */ |
902 | INTEL_UEVENT_EXTRA_REG(0x01b7, MSR_OFFCORE_RSP_0, 0x768005ffff, RSP_0), | 902 | INTEL_UEVENT_EXTRA_REG(0x01b7, MSR_OFFCORE_RSP_0, 0x768005ffffull, RSP_0), |
903 | INTEL_UEVENT_EXTRA_REG(0x02b7, MSR_OFFCORE_RSP_1, 0x768005ffff, RSP_1), | 903 | INTEL_UEVENT_EXTRA_REG(0x02b7, MSR_OFFCORE_RSP_1, 0x768005ffffull, RSP_1), |
904 | EVENT_EXTRA_END | 904 | EVENT_EXTRA_END |
905 | }; | 905 | }; |
906 | 906 | ||
@@ -2325,6 +2325,7 @@ __init int intel_pmu_init(void) | |||
2325 | break; | 2325 | break; |
2326 | 2326 | ||
2327 | case 55: /* Atom 22nm "Silvermont" */ | 2327 | case 55: /* Atom 22nm "Silvermont" */ |
2328 | case 77: /* Avoton "Silvermont" */ | ||
2328 | memcpy(hw_cache_event_ids, slm_hw_cache_event_ids, | 2329 | memcpy(hw_cache_event_ids, slm_hw_cache_event_ids, |
2329 | sizeof(hw_cache_event_ids)); | 2330 | sizeof(hw_cache_event_ids)); |
2330 | memcpy(hw_cache_extra_regs, slm_hw_cache_extra_regs, | 2331 | memcpy(hw_cache_extra_regs, slm_hw_cache_extra_regs, |