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Diffstat (limited to 'arch/x86/kernel/cpu/intel.c')
-rw-r--r--arch/x86/kernel/cpu/intel.c29
1 files changed, 27 insertions, 2 deletions
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index ea04b342c026..3db61c644e44 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -1,4 +1,3 @@
1#include <linux/init.h>
2#include <linux/kernel.h> 1#include <linux/kernel.h>
3 2
4#include <linux/string.h> 3#include <linux/string.h>
@@ -93,7 +92,7 @@ static void early_init_intel(struct cpuinfo_x86 *c)
93 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); 92 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
94 set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC); 93 set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC);
95 if (!check_tsc_unstable()) 94 if (!check_tsc_unstable())
96 sched_clock_stable = 1; 95 set_sched_clock_stable();
97 } 96 }
98 97
99 /* Penwell and Cloverview have the TSC which doesn't sleep on S3 */ 98 /* Penwell and Cloverview have the TSC which doesn't sleep on S3 */
@@ -506,6 +505,7 @@ static unsigned int intel_size_cache(struct cpuinfo_x86 *c, unsigned int size)
506#define TLB_DATA0_2M_4M 0x23 505#define TLB_DATA0_2M_4M 0x23
507 506
508#define STLB_4K 0x41 507#define STLB_4K 0x41
508#define STLB_4K_2M 0x42
509 509
510static const struct _tlb_table intel_tlb_table[] = { 510static const struct _tlb_table intel_tlb_table[] = {
511 { 0x01, TLB_INST_4K, 32, " TLB_INST 4 KByte pages, 4-way set associative" }, 511 { 0x01, TLB_INST_4K, 32, " TLB_INST 4 KByte pages, 4-way set associative" },
@@ -526,13 +526,20 @@ static const struct _tlb_table intel_tlb_table[] = {
526 { 0x5b, TLB_DATA_4K_4M, 64, " TLB_DATA 4 KByte and 4 MByte pages" }, 526 { 0x5b, TLB_DATA_4K_4M, 64, " TLB_DATA 4 KByte and 4 MByte pages" },
527 { 0x5c, TLB_DATA_4K_4M, 128, " TLB_DATA 4 KByte and 4 MByte pages" }, 527 { 0x5c, TLB_DATA_4K_4M, 128, " TLB_DATA 4 KByte and 4 MByte pages" },
528 { 0x5d, TLB_DATA_4K_4M, 256, " TLB_DATA 4 KByte and 4 MByte pages" }, 528 { 0x5d, TLB_DATA_4K_4M, 256, " TLB_DATA 4 KByte and 4 MByte pages" },
529 { 0x61, TLB_INST_4K, 48, " TLB_INST 4 KByte pages, full associative" },
530 { 0x63, TLB_DATA_1G, 4, " TLB_DATA 1 GByte pages, 4-way set associative" },
531 { 0x76, TLB_INST_2M_4M, 8, " TLB_INST 2-MByte or 4-MByte pages, fully associative" },
529 { 0xb0, TLB_INST_4K, 128, " TLB_INST 4 KByte pages, 4-way set associative" }, 532 { 0xb0, TLB_INST_4K, 128, " TLB_INST 4 KByte pages, 4-way set associative" },
530 { 0xb1, TLB_INST_2M_4M, 4, " TLB_INST 2M pages, 4-way, 8 entries or 4M pages, 4-way entries" }, 533 { 0xb1, TLB_INST_2M_4M, 4, " TLB_INST 2M pages, 4-way, 8 entries or 4M pages, 4-way entries" },
531 { 0xb2, TLB_INST_4K, 64, " TLB_INST 4KByte pages, 4-way set associative" }, 534 { 0xb2, TLB_INST_4K, 64, " TLB_INST 4KByte pages, 4-way set associative" },
532 { 0xb3, TLB_DATA_4K, 128, " TLB_DATA 4 KByte pages, 4-way set associative" }, 535 { 0xb3, TLB_DATA_4K, 128, " TLB_DATA 4 KByte pages, 4-way set associative" },
533 { 0xb4, TLB_DATA_4K, 256, " TLB_DATA 4 KByte pages, 4-way associative" }, 536 { 0xb4, TLB_DATA_4K, 256, " TLB_DATA 4 KByte pages, 4-way associative" },
537 { 0xb5, TLB_INST_4K, 64, " TLB_INST 4 KByte pages, 8-way set ssociative" },
538 { 0xb6, TLB_INST_4K, 128, " TLB_INST 4 KByte pages, 8-way set ssociative" },
534 { 0xba, TLB_DATA_4K, 64, " TLB_DATA 4 KByte pages, 4-way associative" }, 539 { 0xba, TLB_DATA_4K, 64, " TLB_DATA 4 KByte pages, 4-way associative" },
535 { 0xc0, TLB_DATA_4K_4M, 8, " TLB_DATA 4 KByte and 4 MByte pages, 4-way associative" }, 540 { 0xc0, TLB_DATA_4K_4M, 8, " TLB_DATA 4 KByte and 4 MByte pages, 4-way associative" },
541 { 0xc1, STLB_4K_2M, 1024, " STLB 4 KByte and 2 MByte pages, 8-way associative" },
542 { 0xc2, TLB_DATA_2M_4M, 16, " DTLB 2 MByte/4MByte pages, 4-way associative" },
536 { 0xca, STLB_4K, 512, " STLB 4 KByte pages, 4-way associative" }, 543 { 0xca, STLB_4K, 512, " STLB 4 KByte pages, 4-way associative" },
537 { 0x00, 0, 0 } 544 { 0x00, 0, 0 }
538}; 545};
@@ -558,6 +565,20 @@ static void intel_tlb_lookup(const unsigned char desc)
558 if (tlb_lld_4k[ENTRIES] < intel_tlb_table[k].entries) 565 if (tlb_lld_4k[ENTRIES] < intel_tlb_table[k].entries)
559 tlb_lld_4k[ENTRIES] = intel_tlb_table[k].entries; 566 tlb_lld_4k[ENTRIES] = intel_tlb_table[k].entries;
560 break; 567 break;
568 case STLB_4K_2M:
569 if (tlb_lli_4k[ENTRIES] < intel_tlb_table[k].entries)
570 tlb_lli_4k[ENTRIES] = intel_tlb_table[k].entries;
571 if (tlb_lld_4k[ENTRIES] < intel_tlb_table[k].entries)
572 tlb_lld_4k[ENTRIES] = intel_tlb_table[k].entries;
573 if (tlb_lli_2m[ENTRIES] < intel_tlb_table[k].entries)
574 tlb_lli_2m[ENTRIES] = intel_tlb_table[k].entries;
575 if (tlb_lld_2m[ENTRIES] < intel_tlb_table[k].entries)
576 tlb_lld_2m[ENTRIES] = intel_tlb_table[k].entries;
577 if (tlb_lli_4m[ENTRIES] < intel_tlb_table[k].entries)
578 tlb_lli_4m[ENTRIES] = intel_tlb_table[k].entries;
579 if (tlb_lld_4m[ENTRIES] < intel_tlb_table[k].entries)
580 tlb_lld_4m[ENTRIES] = intel_tlb_table[k].entries;
581 break;
561 case TLB_INST_ALL: 582 case TLB_INST_ALL:
562 if (tlb_lli_4k[ENTRIES] < intel_tlb_table[k].entries) 583 if (tlb_lli_4k[ENTRIES] < intel_tlb_table[k].entries)
563 tlb_lli_4k[ENTRIES] = intel_tlb_table[k].entries; 584 tlb_lli_4k[ENTRIES] = intel_tlb_table[k].entries;
@@ -603,6 +624,10 @@ static void intel_tlb_lookup(const unsigned char desc)
603 if (tlb_lld_4m[ENTRIES] < intel_tlb_table[k].entries) 624 if (tlb_lld_4m[ENTRIES] < intel_tlb_table[k].entries)
604 tlb_lld_4m[ENTRIES] = intel_tlb_table[k].entries; 625 tlb_lld_4m[ENTRIES] = intel_tlb_table[k].entries;
605 break; 626 break;
627 case TLB_DATA_1G:
628 if (tlb_lld_1g[ENTRIES] < intel_tlb_table[k].entries)
629 tlb_lld_1g[ENTRIES] = intel_tlb_table[k].entries;
630 break;
606 } 631 }
607} 632}
608 633