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Diffstat (limited to 'arch/x86/kernel/apic/apic.c')
-rw-r--r--arch/x86/kernel/apic/apic.c49
1 files changed, 12 insertions, 37 deletions
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 7b41a32339e0..2b30e520dce3 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -134,8 +134,8 @@ static __init int setup_apicpmtimer(char *s)
134__setup("apicpmtimer", setup_apicpmtimer); 134__setup("apicpmtimer", setup_apicpmtimer);
135#endif 135#endif
136 136
137int x2apic_mode;
137#ifdef CONFIG_X86_X2APIC 138#ifdef CONFIG_X86_X2APIC
138int x2apic;
139/* x2apic enabled before OS handover */ 139/* x2apic enabled before OS handover */
140static int x2apic_preenabled; 140static int x2apic_preenabled;
141static int disable_x2apic; 141static int disable_x2apic;
@@ -858,7 +858,7 @@ void clear_local_APIC(void)
858 u32 v; 858 u32 v;
859 859
860 /* APIC hasn't been mapped yet */ 860 /* APIC hasn't been mapped yet */
861 if (!x2apic && !apic_phys) 861 if (!x2apic_mode && !apic_phys)
862 return; 862 return;
863 863
864 maxlvt = lapic_get_maxlvt(); 864 maxlvt = lapic_get_maxlvt();
@@ -1330,7 +1330,7 @@ void check_x2apic(void)
1330{ 1330{
1331 if (x2apic_enabled()) { 1331 if (x2apic_enabled()) {
1332 pr_info("x2apic enabled by BIOS, switching to x2apic ops\n"); 1332 pr_info("x2apic enabled by BIOS, switching to x2apic ops\n");
1333 x2apic_preenabled = x2apic = 1; 1333 x2apic_preenabled = x2apic_mode = 1;
1334 } 1334 }
1335} 1335}
1336 1336
@@ -1338,7 +1338,7 @@ void enable_x2apic(void)
1338{ 1338{
1339 int msr, msr2; 1339 int msr, msr2;
1340 1340
1341 if (!x2apic) 1341 if (!x2apic_mode)
1342 return; 1342 return;
1343 1343
1344 rdmsr(MSR_IA32_APICBASE, msr, msr2); 1344 rdmsr(MSR_IA32_APICBASE, msr, msr2);
@@ -1390,25 +1390,17 @@ void __init enable_IR_x2apic(void)
1390 mask_IO_APIC_setup(ioapic_entries); 1390 mask_IO_APIC_setup(ioapic_entries);
1391 mask_8259A(); 1391 mask_8259A();
1392 1392
1393#ifdef CONFIG_X86_X2APIC 1393 ret = enable_intr_remapping(x2apic_supported());
1394 if (cpu_has_x2apic)
1395 ret = enable_intr_remapping(EIM_32BIT_APIC_ID);
1396 else
1397#endif
1398 ret = enable_intr_remapping(EIM_8BIT_APIC_ID);
1399
1400 if (ret) 1394 if (ret)
1401 goto end_restore; 1395 goto end_restore;
1402 1396
1403 pr_info("Enabled Interrupt-remapping\n"); 1397 pr_info("Enabled Interrupt-remapping\n");
1404 1398
1405#ifdef CONFIG_X86_X2APIC 1399 if (x2apic_supported() && !x2apic_mode) {
1406 if (cpu_has_x2apic && !x2apic) { 1400 x2apic_mode = 1;
1407 x2apic = 1;
1408 enable_x2apic(); 1401 enable_x2apic();
1409 pr_info("Enabled x2apic\n"); 1402 pr_info("Enabled x2apic\n");
1410 } 1403 }
1411#endif
1412 1404
1413end_restore: 1405end_restore:
1414 if (ret) 1406 if (ret)
@@ -1576,7 +1568,7 @@ void __init early_init_lapic_mapping(void)
1576 */ 1568 */
1577void __init init_apic_mappings(void) 1569void __init init_apic_mappings(void)
1578{ 1570{
1579 if (x2apic) { 1571 if (x2apic_mode) {
1580 boot_cpu_physical_apicid = read_apic_id(); 1572 boot_cpu_physical_apicid = read_apic_id();
1581 return; 1573 return;
1582 } 1574 }
@@ -2010,10 +2002,10 @@ static int lapic_suspend(struct sys_device *dev, pm_message_t state)
2010 2002
2011 local_irq_save(flags); 2003 local_irq_save(flags);
2012 disable_local_APIC(); 2004 disable_local_APIC();
2013#ifdef CONFIG_INTR_REMAP 2005
2014 if (intr_remapping_enabled) 2006 if (intr_remapping_enabled)
2015 disable_intr_remapping(); 2007 disable_intr_remapping();
2016#endif 2008
2017 local_irq_restore(flags); 2009 local_irq_restore(flags);
2018 return 0; 2010 return 0;
2019} 2011}
@@ -2023,8 +2015,6 @@ static int lapic_resume(struct sys_device *dev)
2023 unsigned int l, h; 2015 unsigned int l, h;
2024 unsigned long flags; 2016 unsigned long flags;
2025 int maxlvt; 2017 int maxlvt;
2026
2027#ifdef CONFIG_INTR_REMAP
2028 int ret; 2018 int ret;
2029 struct IO_APIC_route_entry **ioapic_entries = NULL; 2019 struct IO_APIC_route_entry **ioapic_entries = NULL;
2030 2020
@@ -2050,17 +2040,8 @@ static int lapic_resume(struct sys_device *dev)
2050 mask_8259A(); 2040 mask_8259A();
2051 } 2041 }
2052 2042
2053 if (x2apic) 2043 if (x2apic_mode)
2054 enable_x2apic(); 2044 enable_x2apic();
2055#else
2056 if (!apic_pm_state.active)
2057 return 0;
2058
2059 local_irq_save(flags);
2060 if (x2apic)
2061 enable_x2apic();
2062#endif
2063
2064 else { 2045 else {
2065 /* 2046 /*
2066 * Make sure the APICBASE points to the right address 2047 * Make sure the APICBASE points to the right address
@@ -2098,18 +2079,12 @@ static int lapic_resume(struct sys_device *dev)
2098 apic_write(APIC_ESR, 0); 2079 apic_write(APIC_ESR, 0);
2099 apic_read(APIC_ESR); 2080 apic_read(APIC_ESR);
2100 2081
2101#ifdef CONFIG_INTR_REMAP
2102 if (intr_remapping_enabled) { 2082 if (intr_remapping_enabled) {
2103 if (x2apic) 2083 reenable_intr_remapping(x2apic_mode);
2104 reenable_intr_remapping(EIM_32BIT_APIC_ID);
2105 else
2106 reenable_intr_remapping(EIM_8BIT_APIC_ID);
2107
2108 unmask_8259A(); 2084 unmask_8259A();
2109 restore_IO_APIC_setup(ioapic_entries); 2085 restore_IO_APIC_setup(ioapic_entries);
2110 free_ioapic_entries(ioapic_entries); 2086 free_ioapic_entries(ioapic_entries);
2111 } 2087 }
2112#endif
2113 2088
2114 local_irq_restore(flags); 2089 local_irq_restore(flags);
2115 2090