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-rw-r--r--arch/x86/include/asm/Kbuild26
-rw-r--r--arch/x86/include/asm/boot.h9
-rw-r--r--arch/x86/include/asm/debugreg.h79
-rw-r--r--arch/x86/include/asm/e820.h74
-rw-r--r--arch/x86/include/asm/hw_breakpoint.h5
-rw-r--r--arch/x86/include/asm/ist.h17
-rw-r--r--arch/x86/include/asm/kvm_para.h99
-rw-r--r--arch/x86/include/asm/mce.h119
-rw-r--r--arch/x86/include/asm/msr.h11
-rw-r--r--arch/x86/include/asm/mtrr.h93
-rw-r--r--arch/x86/include/asm/posix_types.h10
-rw-r--r--arch/x86/include/asm/processor-flags.h97
-rw-r--r--arch/x86/include/asm/ptrace.h75
-rw-r--r--arch/x86/include/asm/setup.h5
-rw-r--r--arch/x86/include/asm/sigcontext.h216
-rw-r--r--arch/x86/include/asm/signal.h140
-rw-r--r--arch/x86/include/asm/svm.h132
-rw-r--r--arch/x86/include/asm/unistd.h14
-rw-r--r--arch/x86/include/asm/vm86.h128
-rw-r--r--arch/x86/include/asm/vmx.h89
-rw-r--r--arch/x86/include/asm/vsyscall.h16
-rw-r--r--arch/x86/include/uapi/asm/Kbuild58
-rw-r--r--arch/x86/include/uapi/asm/a.out.h (renamed from arch/x86/include/asm/a.out.h)0
-rw-r--r--arch/x86/include/uapi/asm/auxvec.h (renamed from arch/x86/include/asm/auxvec.h)0
-rw-r--r--arch/x86/include/uapi/asm/bitsperlong.h (renamed from arch/x86/include/asm/bitsperlong.h)0
-rw-r--r--arch/x86/include/uapi/asm/boot.h10
-rw-r--r--arch/x86/include/uapi/asm/bootparam.h (renamed from arch/x86/include/asm/bootparam.h)0
-rw-r--r--arch/x86/include/uapi/asm/byteorder.h (renamed from arch/x86/include/asm/byteorder.h)0
-rw-r--r--arch/x86/include/uapi/asm/debugreg.h80
-rw-r--r--arch/x86/include/uapi/asm/e820.h75
-rw-r--r--arch/x86/include/uapi/asm/errno.h (renamed from arch/x86/include/asm/errno.h)0
-rw-r--r--arch/x86/include/uapi/asm/fcntl.h (renamed from arch/x86/include/asm/fcntl.h)0
-rw-r--r--arch/x86/include/uapi/asm/hw_breakpoint.h0
-rw-r--r--arch/x86/include/uapi/asm/hyperv.h (renamed from arch/x86/include/asm/hyperv.h)0
-rw-r--r--arch/x86/include/uapi/asm/ioctl.h (renamed from arch/x86/include/asm/ioctl.h)0
-rw-r--r--arch/x86/include/uapi/asm/ioctls.h (renamed from arch/x86/include/asm/ioctls.h)0
-rw-r--r--arch/x86/include/uapi/asm/ipcbuf.h (renamed from arch/x86/include/asm/ipcbuf.h)0
-rw-r--r--arch/x86/include/uapi/asm/ist.h29
-rw-r--r--arch/x86/include/uapi/asm/kvm.h (renamed from arch/x86/include/asm/kvm.h)0
-rw-r--r--arch/x86/include/uapi/asm/kvm_para.h100
-rw-r--r--arch/x86/include/uapi/asm/ldt.h (renamed from arch/x86/include/asm/ldt.h)0
-rw-r--r--arch/x86/include/uapi/asm/mce.h121
-rw-r--r--arch/x86/include/uapi/asm/mman.h (renamed from arch/x86/include/asm/mman.h)0
-rw-r--r--arch/x86/include/uapi/asm/msgbuf.h (renamed from arch/x86/include/asm/msgbuf.h)0
-rw-r--r--arch/x86/include/uapi/asm/msr-index.h (renamed from arch/x86/include/asm/msr-index.h)0
-rw-r--r--arch/x86/include/uapi/asm/msr.h15
-rw-r--r--arch/x86/include/uapi/asm/mtrr.h117
-rw-r--r--arch/x86/include/uapi/asm/param.h (renamed from arch/x86/include/asm/param.h)0
-rw-r--r--arch/x86/include/uapi/asm/perf_regs.h (renamed from arch/x86/include/asm/perf_regs.h)0
-rw-r--r--arch/x86/include/uapi/asm/poll.h (renamed from arch/x86/include/asm/poll.h)0
-rw-r--r--arch/x86/include/uapi/asm/posix_types.h9
-rw-r--r--arch/x86/include/uapi/asm/posix_types_32.h (renamed from arch/x86/include/asm/posix_types_32.h)0
-rw-r--r--arch/x86/include/uapi/asm/posix_types_64.h (renamed from arch/x86/include/asm/posix_types_64.h)0
-rw-r--r--arch/x86/include/uapi/asm/posix_types_x32.h (renamed from arch/x86/include/asm/posix_types_x32.h)0
-rw-r--r--arch/x86/include/uapi/asm/prctl.h (renamed from arch/x86/include/asm/prctl.h)0
-rw-r--r--arch/x86/include/uapi/asm/processor-flags.h99
-rw-r--r--arch/x86/include/uapi/asm/ptrace-abi.h (renamed from arch/x86/include/asm/ptrace-abi.h)0
-rw-r--r--arch/x86/include/uapi/asm/ptrace.h78
-rw-r--r--arch/x86/include/uapi/asm/resource.h (renamed from arch/x86/include/asm/resource.h)0
-rw-r--r--arch/x86/include/uapi/asm/sembuf.h (renamed from arch/x86/include/asm/sembuf.h)0
-rw-r--r--arch/x86/include/uapi/asm/setup.h0
-rw-r--r--arch/x86/include/uapi/asm/shmbuf.h (renamed from arch/x86/include/asm/shmbuf.h)0
-rw-r--r--arch/x86/include/uapi/asm/sigcontext.h221
-rw-r--r--arch/x86/include/uapi/asm/sigcontext32.h (renamed from arch/x86/include/asm/sigcontext32.h)0
-rw-r--r--arch/x86/include/uapi/asm/siginfo.h (renamed from arch/x86/include/asm/siginfo.h)0
-rw-r--r--arch/x86/include/uapi/asm/signal.h145
-rw-r--r--arch/x86/include/uapi/asm/socket.h (renamed from arch/x86/include/asm/socket.h)0
-rw-r--r--arch/x86/include/uapi/asm/sockios.h (renamed from arch/x86/include/asm/sockios.h)0
-rw-r--r--arch/x86/include/uapi/asm/stat.h (renamed from arch/x86/include/asm/stat.h)0
-rw-r--r--arch/x86/include/uapi/asm/statfs.h (renamed from arch/x86/include/asm/statfs.h)0
-rw-r--r--arch/x86/include/uapi/asm/svm.h132
-rw-r--r--arch/x86/include/uapi/asm/swab.h (renamed from arch/x86/include/asm/swab.h)0
-rw-r--r--arch/x86/include/uapi/asm/termbits.h (renamed from arch/x86/include/asm/termbits.h)0
-rw-r--r--arch/x86/include/uapi/asm/termios.h (renamed from arch/x86/include/asm/termios.h)0
-rw-r--r--arch/x86/include/uapi/asm/types.h (renamed from arch/x86/include/asm/types.h)0
-rw-r--r--arch/x86/include/uapi/asm/ucontext.h (renamed from arch/x86/include/asm/ucontext.h)0
-rw-r--r--arch/x86/include/uapi/asm/unistd.h17
-rw-r--r--arch/x86/include/uapi/asm/vm86.h129
-rw-r--r--arch/x86/include/uapi/asm/vmx.h109
-rw-r--r--arch/x86/include/uapi/asm/vsyscall.h17
80 files changed, 1587 insertions, 1428 deletions
diff --git a/arch/x86/include/asm/Kbuild b/arch/x86/include/asm/Kbuild
index 79fd8a3418f9..7f669853317a 100644
--- a/arch/x86/include/asm/Kbuild
+++ b/arch/x86/include/asm/Kbuild
@@ -1,30 +1,4 @@
1include include/asm-generic/Kbuild.asm
2 1
3header-y += boot.h
4header-y += bootparam.h
5header-y += debugreg.h
6header-y += e820.h
7header-y += hw_breakpoint.h
8header-y += hyperv.h
9header-y += ist.h
10header-y += ldt.h
11header-y += mce.h
12header-y += msr-index.h
13header-y += msr.h
14header-y += mtrr.h
15header-y += perf_regs.h
16header-y += posix_types_32.h
17header-y += posix_types_64.h
18header-y += posix_types_x32.h
19header-y += prctl.h
20header-y += processor-flags.h
21header-y += ptrace-abi.h
22header-y += sigcontext32.h
23header-y += svm.h
24header-y += ucontext.h
25header-y += vm86.h
26header-y += vmx.h
27header-y += vsyscall.h
28 2
29genhdr-y += unistd_32.h 3genhdr-y += unistd_32.h
30genhdr-y += unistd_64.h 4genhdr-y += unistd_64.h
diff --git a/arch/x86/include/asm/boot.h b/arch/x86/include/asm/boot.h
index b13fe63bdc59..4fa687a47a62 100644
--- a/arch/x86/include/asm/boot.h
+++ b/arch/x86/include/asm/boot.h
@@ -1,14 +1,9 @@
1#ifndef _ASM_X86_BOOT_H 1#ifndef _ASM_X86_BOOT_H
2#define _ASM_X86_BOOT_H 2#define _ASM_X86_BOOT_H
3 3
4/* Internal svga startup constants */
5#define NORMAL_VGA 0xffff /* 80x25 mode */
6#define EXTENDED_VGA 0xfffe /* 80x50 mode */
7#define ASK_VGA 0xfffd /* ask for it at bootup */
8
9#ifdef __KERNEL__
10 4
11#include <asm/pgtable_types.h> 5#include <asm/pgtable_types.h>
6#include <uapi/asm/boot.h>
12 7
13/* Physical address where kernel should be loaded. */ 8/* Physical address where kernel should be loaded. */
14#define LOAD_PHYSICAL_ADDR ((CONFIG_PHYSICAL_START \ 9#define LOAD_PHYSICAL_ADDR ((CONFIG_PHYSICAL_START \
@@ -42,6 +37,4 @@
42#define BOOT_STACK_SIZE 0x1000 37#define BOOT_STACK_SIZE 0x1000
43#endif 38#endif
44 39
45#endif /* __KERNEL__ */
46
47#endif /* _ASM_X86_BOOT_H */ 40#endif /* _ASM_X86_BOOT_H */
diff --git a/arch/x86/include/asm/debugreg.h b/arch/x86/include/asm/debugreg.h
index 2d91580bf228..4b528a970bd4 100644
--- a/arch/x86/include/asm/debugreg.h
+++ b/arch/x86/include/asm/debugreg.h
@@ -2,83 +2,8 @@
2#define _ASM_X86_DEBUGREG_H 2#define _ASM_X86_DEBUGREG_H
3 3
4 4
5/* Indicate the register numbers for a number of the specific
6 debug registers. Registers 0-3 contain the addresses we wish to trap on */
7#define DR_FIRSTADDR 0 /* u_debugreg[DR_FIRSTADDR] */
8#define DR_LASTADDR 3 /* u_debugreg[DR_LASTADDR] */
9
10#define DR_STATUS 6 /* u_debugreg[DR_STATUS] */
11#define DR_CONTROL 7 /* u_debugreg[DR_CONTROL] */
12
13/* Define a few things for the status register. We can use this to determine
14 which debugging register was responsible for the trap. The other bits
15 are either reserved or not of interest to us. */
16
17/* Define reserved bits in DR6 which are always set to 1 */
18#define DR6_RESERVED (0xFFFF0FF0)
19
20#define DR_TRAP0 (0x1) /* db0 */
21#define DR_TRAP1 (0x2) /* db1 */
22#define DR_TRAP2 (0x4) /* db2 */
23#define DR_TRAP3 (0x8) /* db3 */
24#define DR_TRAP_BITS (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3)
25
26#define DR_STEP (0x4000) /* single-step */
27#define DR_SWITCH (0x8000) /* task switch */
28
29/* Now define a bunch of things for manipulating the control register.
30 The top two bytes of the control register consist of 4 fields of 4
31 bits - each field corresponds to one of the four debug registers,
32 and indicates what types of access we trap on, and how large the data
33 field is that we are looking at */
34
35#define DR_CONTROL_SHIFT 16 /* Skip this many bits in ctl register */
36#define DR_CONTROL_SIZE 4 /* 4 control bits per register */
37
38#define DR_RW_EXECUTE (0x0) /* Settings for the access types to trap on */
39#define DR_RW_WRITE (0x1)
40#define DR_RW_READ (0x3)
41
42#define DR_LEN_1 (0x0) /* Settings for data length to trap on */
43#define DR_LEN_2 (0x4)
44#define DR_LEN_4 (0xC)
45#define DR_LEN_8 (0x8)
46
47/* The low byte to the control register determine which registers are
48 enabled. There are 4 fields of two bits. One bit is "local", meaning
49 that the processor will reset the bit after a task switch and the other
50 is global meaning that we have to explicitly reset the bit. With linux,
51 you can use either one, since we explicitly zero the register when we enter
52 kernel mode. */
53
54#define DR_LOCAL_ENABLE_SHIFT 0 /* Extra shift to the local enable bit */
55#define DR_GLOBAL_ENABLE_SHIFT 1 /* Extra shift to the global enable bit */
56#define DR_LOCAL_ENABLE (0x1) /* Local enable for reg 0 */
57#define DR_GLOBAL_ENABLE (0x2) /* Global enable for reg 0 */
58#define DR_ENABLE_SIZE 2 /* 2 enable bits per register */
59
60#define DR_LOCAL_ENABLE_MASK (0x55) /* Set local bits for all 4 regs */
61#define DR_GLOBAL_ENABLE_MASK (0xAA) /* Set global bits for all 4 regs */
62
63/* The second byte to the control register has a few special things.
64 We can slow the instruction pipeline for instructions coming via the
65 gdt or the ldt if we want to. I am not sure why this is an advantage */
66
67#ifdef __i386__
68#define DR_CONTROL_RESERVED (0xFC00) /* Reserved by Intel */
69#else
70#define DR_CONTROL_RESERVED (0xFFFFFFFF0000FC00UL) /* Reserved */
71#endif
72
73#define DR_LOCAL_SLOWDOWN (0x100) /* Local slow the pipeline */
74#define DR_GLOBAL_SLOWDOWN (0x200) /* Global slow the pipeline */
75
76/*
77 * HW breakpoint additions
78 */
79#ifdef __KERNEL__
80
81#include <linux/bug.h> 5#include <linux/bug.h>
6#include <uapi/asm/debugreg.h>
82 7
83DECLARE_PER_CPU(unsigned long, cpu_dr7); 8DECLARE_PER_CPU(unsigned long, cpu_dr7);
84 9
@@ -190,6 +115,4 @@ static inline void debug_stack_usage_dec(void) { }
190#endif /* X86_64 */ 115#endif /* X86_64 */
191 116
192 117
193#endif /* __KERNEL__ */
194
195#endif /* _ASM_X86_DEBUGREG_H */ 118#endif /* _ASM_X86_DEBUGREG_H */
diff --git a/arch/x86/include/asm/e820.h b/arch/x86/include/asm/e820.h
index 37782566af24..cccd07fa5e3a 100644
--- a/arch/x86/include/asm/e820.h
+++ b/arch/x86/include/asm/e820.h
@@ -1,81 +1,14 @@
1#ifndef _ASM_X86_E820_H 1#ifndef _ASM_X86_E820_H
2#define _ASM_X86_E820_H 2#define _ASM_X86_E820_H
3#define E820MAP 0x2d0 /* our map */
4#define E820MAX 128 /* number of entries in E820MAP */
5 3
6/*
7 * Legacy E820 BIOS limits us to 128 (E820MAX) nodes due to the
8 * constrained space in the zeropage. If we have more nodes than
9 * that, and if we've booted off EFI firmware, then the EFI tables
10 * passed us from the EFI firmware can list more nodes. Size our
11 * internal memory map tables to have room for these additional
12 * nodes, based on up to three entries per node for which the
13 * kernel was built: MAX_NUMNODES == (1 << CONFIG_NODES_SHIFT),
14 * plus E820MAX, allowing space for the possible duplicate E820
15 * entries that might need room in the same arrays, prior to the
16 * call to sanitize_e820_map() to remove duplicates. The allowance
17 * of three memory map entries per node is "enough" entries for
18 * the initial hardware platform motivating this mechanism to make
19 * use of additional EFI map entries. Future platforms may want
20 * to allow more than three entries per node or otherwise refine
21 * this size.
22 */
23
24/*
25 * Odd: 'make headers_check' complains about numa.h if I try
26 * to collapse the next two #ifdef lines to a single line:
27 * #if defined(__KERNEL__) && defined(CONFIG_EFI)
28 */
29#ifdef __KERNEL__
30#ifdef CONFIG_EFI 4#ifdef CONFIG_EFI
31#include <linux/numa.h> 5#include <linux/numa.h>
32#define E820_X_MAX (E820MAX + 3 * MAX_NUMNODES) 6#define E820_X_MAX (E820MAX + 3 * MAX_NUMNODES)
33#else /* ! CONFIG_EFI */ 7#else /* ! CONFIG_EFI */
34#define E820_X_MAX E820MAX 8#define E820_X_MAX E820MAX
35#endif 9#endif
36#else /* ! __KERNEL__ */ 10#include <uapi/asm/e820.h>
37#define E820_X_MAX E820MAX
38#endif
39
40#define E820NR 0x1e8 /* # entries in E820MAP */
41
42#define E820_RAM 1
43#define E820_RESERVED 2
44#define E820_ACPI 3
45#define E820_NVS 4
46#define E820_UNUSABLE 5
47
48/*
49 * reserved RAM used by kernel itself
50 * if CONFIG_INTEL_TXT is enabled, memory of this type will be
51 * included in the S3 integrity calculation and so should not include
52 * any memory that BIOS might alter over the S3 transition
53 */
54#define E820_RESERVED_KERN 128
55
56#ifndef __ASSEMBLY__ 11#ifndef __ASSEMBLY__
57#include <linux/types.h>
58struct e820entry {
59 __u64 addr; /* start of memory segment */
60 __u64 size; /* size of memory segment */
61 __u32 type; /* type of memory segment */
62} __attribute__((packed));
63
64struct e820map {
65 __u32 nr_map;
66 struct e820entry map[E820_X_MAX];
67};
68
69#define ISA_START_ADDRESS 0xa0000
70#define ISA_END_ADDRESS 0x100000
71
72#define BIOS_BEGIN 0x000a0000
73#define BIOS_END 0x00100000
74
75#define BIOS_ROM_BASE 0xffe00000
76#define BIOS_ROM_END 0xffffffff
77
78#ifdef __KERNEL__
79/* see comment in arch/x86/kernel/e820.c */ 12/* see comment in arch/x86/kernel/e820.c */
80extern struct e820map e820; 13extern struct e820map e820;
81extern struct e820map e820_saved; 14extern struct e820map e820_saved;
@@ -137,13 +70,8 @@ static inline bool is_ISA_range(u64 s, u64 e)
137 return s >= ISA_START_ADDRESS && e <= ISA_END_ADDRESS; 70 return s >= ISA_START_ADDRESS && e <= ISA_END_ADDRESS;
138} 71}
139 72
140#endif /* __KERNEL__ */
141#endif /* __ASSEMBLY__ */ 73#endif /* __ASSEMBLY__ */
142
143#ifdef __KERNEL__
144#include <linux/ioport.h> 74#include <linux/ioport.h>
145 75
146#define HIGH_MEMORY (1024*1024) 76#define HIGH_MEMORY (1024*1024)
147#endif /* __KERNEL__ */
148
149#endif /* _ASM_X86_E820_H */ 77#endif /* _ASM_X86_E820_H */
diff --git a/arch/x86/include/asm/hw_breakpoint.h b/arch/x86/include/asm/hw_breakpoint.h
index 824ca07860d0..ef1c4d2d41ec 100644
--- a/arch/x86/include/asm/hw_breakpoint.h
+++ b/arch/x86/include/asm/hw_breakpoint.h
@@ -1,7 +1,8 @@
1#ifndef _I386_HW_BREAKPOINT_H 1#ifndef _I386_HW_BREAKPOINT_H
2#define _I386_HW_BREAKPOINT_H 2#define _I386_HW_BREAKPOINT_H
3 3
4#ifdef __KERNEL__ 4#include <uapi/asm/hw_breakpoint.h>
5
5#define __ARCH_HW_BREAKPOINT_H 6#define __ARCH_HW_BREAKPOINT_H
6 7
7/* 8/*
@@ -71,6 +72,4 @@ extern int arch_bp_generic_fields(int x86_len, int x86_type,
71 72
72extern struct pmu perf_ops_bp; 73extern struct pmu perf_ops_bp;
73 74
74#endif /* __KERNEL__ */
75#endif /* _I386_HW_BREAKPOINT_H */ 75#endif /* _I386_HW_BREAKPOINT_H */
76
diff --git a/arch/x86/include/asm/ist.h b/arch/x86/include/asm/ist.h
index 7e5dff1de0e9..c9803f1a2033 100644
--- a/arch/x86/include/asm/ist.h
+++ b/arch/x86/include/asm/ist.h
@@ -1,6 +1,3 @@
1#ifndef _ASM_X86_IST_H
2#define _ASM_X86_IST_H
3
4/* 1/*
5 * Include file for the interface to IST BIOS 2 * Include file for the interface to IST BIOS
6 * Copyright 2002 Andy Grover <andrew.grover@intel.com> 3 * Copyright 2002 Andy Grover <andrew.grover@intel.com>
@@ -15,20 +12,12 @@
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details. 13 * General Public License for more details.
17 */ 14 */
15#ifndef _ASM_X86_IST_H
16#define _ASM_X86_IST_H
18 17
18#include <uapi/asm/ist.h>
19 19
20#include <linux/types.h>
21
22struct ist_info {
23 __u32 signature;
24 __u32 command;
25 __u32 event;
26 __u32 perf_level;
27};
28
29#ifdef __KERNEL__
30 20
31extern struct ist_info ist_info; 21extern struct ist_info ist_info;
32 22
33#endif /* __KERNEL__ */
34#endif /* _ASM_X86_IST_H */ 23#endif /* _ASM_X86_IST_H */
diff --git a/arch/x86/include/asm/kvm_para.h b/arch/x86/include/asm/kvm_para.h
index eb3e9d85e1f1..5ed1f16187be 100644
--- a/arch/x86/include/asm/kvm_para.h
+++ b/arch/x86/include/asm/kvm_para.h
@@ -1,103 +1,8 @@
1#ifndef _ASM_X86_KVM_PARA_H 1#ifndef _ASM_X86_KVM_PARA_H
2#define _ASM_X86_KVM_PARA_H 2#define _ASM_X86_KVM_PARA_H
3 3
4#include <linux/types.h>
5#include <asm/hyperv.h>
6
7/* This CPUID returns the signature 'KVMKVMKVM' in ebx, ecx, and edx. It
8 * should be used to determine that a VM is running under KVM.
9 */
10#define KVM_CPUID_SIGNATURE 0x40000000
11
12/* This CPUID returns a feature bitmap in eax. Before enabling a particular
13 * paravirtualization, the appropriate feature bit should be checked.
14 */
15#define KVM_CPUID_FEATURES 0x40000001
16#define KVM_FEATURE_CLOCKSOURCE 0
17#define KVM_FEATURE_NOP_IO_DELAY 1
18#define KVM_FEATURE_MMU_OP 2
19/* This indicates that the new set of kvmclock msrs
20 * are available. The use of 0x11 and 0x12 is deprecated
21 */
22#define KVM_FEATURE_CLOCKSOURCE2 3
23#define KVM_FEATURE_ASYNC_PF 4
24#define KVM_FEATURE_STEAL_TIME 5
25#define KVM_FEATURE_PV_EOI 6
26
27/* The last 8 bits are used to indicate how to interpret the flags field
28 * in pvclock structure. If no bits are set, all flags are ignored.
29 */
30#define KVM_FEATURE_CLOCKSOURCE_STABLE_BIT 24
31
32#define MSR_KVM_WALL_CLOCK 0x11
33#define MSR_KVM_SYSTEM_TIME 0x12
34
35#define KVM_MSR_ENABLED 1
36/* Custom MSRs falls in the range 0x4b564d00-0x4b564dff */
37#define MSR_KVM_WALL_CLOCK_NEW 0x4b564d00
38#define MSR_KVM_SYSTEM_TIME_NEW 0x4b564d01
39#define MSR_KVM_ASYNC_PF_EN 0x4b564d02
40#define MSR_KVM_STEAL_TIME 0x4b564d03
41#define MSR_KVM_PV_EOI_EN 0x4b564d04
42
43struct kvm_steal_time {
44 __u64 steal;
45 __u32 version;
46 __u32 flags;
47 __u32 pad[12];
48};
49
50#define KVM_STEAL_ALIGNMENT_BITS 5
51#define KVM_STEAL_VALID_BITS ((-1ULL << (KVM_STEAL_ALIGNMENT_BITS + 1)))
52#define KVM_STEAL_RESERVED_MASK (((1 << KVM_STEAL_ALIGNMENT_BITS) - 1 ) << 1)
53
54#define KVM_MAX_MMU_OP_BATCH 32
55
56#define KVM_ASYNC_PF_ENABLED (1 << 0)
57#define KVM_ASYNC_PF_SEND_ALWAYS (1 << 1)
58
59/* Operations for KVM_HC_MMU_OP */
60#define KVM_MMU_OP_WRITE_PTE 1
61#define KVM_MMU_OP_FLUSH_TLB 2
62#define KVM_MMU_OP_RELEASE_PT 3
63
64/* Payload for KVM_HC_MMU_OP */
65struct kvm_mmu_op_header {
66 __u32 op;
67 __u32 pad;
68};
69
70struct kvm_mmu_op_write_pte {
71 struct kvm_mmu_op_header header;
72 __u64 pte_phys;
73 __u64 pte_val;
74};
75
76struct kvm_mmu_op_flush_tlb {
77 struct kvm_mmu_op_header header;
78};
79
80struct kvm_mmu_op_release_pt {
81 struct kvm_mmu_op_header header;
82 __u64 pt_phys;
83};
84
85#define KVM_PV_REASON_PAGE_NOT_PRESENT 1
86#define KVM_PV_REASON_PAGE_READY 2
87
88struct kvm_vcpu_pv_apf_data {
89 __u32 reason;
90 __u8 pad[60];
91 __u32 enabled;
92};
93
94#define KVM_PV_EOI_BIT 0
95#define KVM_PV_EOI_MASK (0x1 << KVM_PV_EOI_BIT)
96#define KVM_PV_EOI_ENABLED KVM_PV_EOI_MASK
97#define KVM_PV_EOI_DISABLED 0x0
98
99#ifdef __KERNEL__
100#include <asm/processor.h> 4#include <asm/processor.h>
5#include <uapi/asm/kvm_para.h>
101 6
102extern void kvmclock_init(void); 7extern void kvmclock_init(void);
103extern int kvm_register_clock(char *txt); 8extern int kvm_register_clock(char *txt);
@@ -228,6 +133,4 @@ static inline void kvm_disable_steal_time(void)
228} 133}
229#endif 134#endif
230 135
231#endif /* __KERNEL__ */
232
233#endif /* _ASM_X86_KVM_PARA_H */ 136#endif /* _ASM_X86_KVM_PARA_H */
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index d90c2fccc30c..ecdfee60ee4a 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -1,124 +1,8 @@
1#ifndef _ASM_X86_MCE_H 1#ifndef _ASM_X86_MCE_H
2#define _ASM_X86_MCE_H 2#define _ASM_X86_MCE_H
3 3
4#include <linux/types.h> 4#include <uapi/asm/mce.h>
5#include <asm/ioctls.h>
6 5
7/*
8 * Machine Check support for x86
9 */
10
11/* MCG_CAP register defines */
12#define MCG_BANKCNT_MASK 0xff /* Number of Banks */
13#define MCG_CTL_P (1ULL<<8) /* MCG_CTL register available */
14#define MCG_EXT_P (1ULL<<9) /* Extended registers available */
15#define MCG_CMCI_P (1ULL<<10) /* CMCI supported */
16#define MCG_EXT_CNT_MASK 0xff0000 /* Number of Extended registers */
17#define MCG_EXT_CNT_SHIFT 16
18#define MCG_EXT_CNT(c) (((c) & MCG_EXT_CNT_MASK) >> MCG_EXT_CNT_SHIFT)
19#define MCG_SER_P (1ULL<<24) /* MCA recovery/new status bits */
20
21/* MCG_STATUS register defines */
22#define MCG_STATUS_RIPV (1ULL<<0) /* restart ip valid */
23#define MCG_STATUS_EIPV (1ULL<<1) /* ip points to correct instruction */
24#define MCG_STATUS_MCIP (1ULL<<2) /* machine check in progress */
25
26/* MCi_STATUS register defines */
27#define MCI_STATUS_VAL (1ULL<<63) /* valid error */
28#define MCI_STATUS_OVER (1ULL<<62) /* previous errors lost */
29#define MCI_STATUS_UC (1ULL<<61) /* uncorrected error */
30#define MCI_STATUS_EN (1ULL<<60) /* error enabled */
31#define MCI_STATUS_MISCV (1ULL<<59) /* misc error reg. valid */
32#define MCI_STATUS_ADDRV (1ULL<<58) /* addr reg. valid */
33#define MCI_STATUS_PCC (1ULL<<57) /* processor context corrupt */
34#define MCI_STATUS_S (1ULL<<56) /* Signaled machine check */
35#define MCI_STATUS_AR (1ULL<<55) /* Action required */
36#define MCACOD 0xffff /* MCA Error Code */
37
38/* Architecturally defined codes from SDM Vol. 3B Chapter 15 */
39#define MCACOD_SCRUB 0x00C0 /* 0xC0-0xCF Memory Scrubbing */
40#define MCACOD_SCRUBMSK 0xfff0
41#define MCACOD_L3WB 0x017A /* L3 Explicit Writeback */
42#define MCACOD_DATA 0x0134 /* Data Load */
43#define MCACOD_INSTR 0x0150 /* Instruction Fetch */
44
45/* MCi_MISC register defines */
46#define MCI_MISC_ADDR_LSB(m) ((m) & 0x3f)
47#define MCI_MISC_ADDR_MODE(m) (((m) >> 6) & 7)
48#define MCI_MISC_ADDR_SEGOFF 0 /* segment offset */
49#define MCI_MISC_ADDR_LINEAR 1 /* linear address */
50#define MCI_MISC_ADDR_PHYS 2 /* physical address */
51#define MCI_MISC_ADDR_MEM 3 /* memory address */
52#define MCI_MISC_ADDR_GENERIC 7 /* generic */
53
54/* CTL2 register defines */
55#define MCI_CTL2_CMCI_EN (1ULL << 30)
56#define MCI_CTL2_CMCI_THRESHOLD_MASK 0x7fffULL
57
58#define MCJ_CTX_MASK 3
59#define MCJ_CTX(flags) ((flags) & MCJ_CTX_MASK)
60#define MCJ_CTX_RANDOM 0 /* inject context: random */
61#define MCJ_CTX_PROCESS 0x1 /* inject context: process */
62#define MCJ_CTX_IRQ 0x2 /* inject context: IRQ */
63#define MCJ_NMI_BROADCAST 0x4 /* do NMI broadcasting */
64#define MCJ_EXCEPTION 0x8 /* raise as exception */
65#define MCJ_IRQ_BRAODCAST 0x10 /* do IRQ broadcasting */
66
67/* Fields are zero when not available */
68struct mce {
69 __u64 status;
70 __u64 misc;
71 __u64 addr;
72 __u64 mcgstatus;
73 __u64 ip;
74 __u64 tsc; /* cpu time stamp counter */
75 __u64 time; /* wall time_t when error was detected */
76 __u8 cpuvendor; /* cpu vendor as encoded in system.h */
77 __u8 inject_flags; /* software inject flags */
78 __u16 pad;
79 __u32 cpuid; /* CPUID 1 EAX */
80 __u8 cs; /* code segment */
81 __u8 bank; /* machine check bank */
82 __u8 cpu; /* cpu number; obsolete; use extcpu now */
83 __u8 finished; /* entry is valid */
84 __u32 extcpu; /* linux cpu number that detected the error */
85 __u32 socketid; /* CPU socket ID */
86 __u32 apicid; /* CPU initial apic ID */
87 __u64 mcgcap; /* MCGCAP MSR: machine check capabilities of CPU */
88};
89
90/*
91 * This structure contains all data related to the MCE log. Also
92 * carries a signature to make it easier to find from external
93 * debugging tools. Each entry is only valid when its finished flag
94 * is set.
95 */
96
97#define MCE_LOG_LEN 32
98
99struct mce_log {
100 char signature[12]; /* "MACHINECHECK" */
101 unsigned len; /* = MCE_LOG_LEN */
102 unsigned next;
103 unsigned flags;
104 unsigned recordlen; /* length of struct mce */
105 struct mce entry[MCE_LOG_LEN];
106};
107
108#define MCE_OVERFLOW 0 /* bit 0 in flags means overflow */
109
110#define MCE_LOG_SIGNATURE "MACHINECHECK"
111
112#define MCE_GET_RECORD_LEN _IOR('M', 1, int)
113#define MCE_GET_LOG_LEN _IOR('M', 2, int)
114#define MCE_GETCLEAR_FLAGS _IOR('M', 3, int)
115
116/* Software defined banks */
117#define MCE_EXTENDED_BANK 128
118#define MCE_THERMAL_BANK MCE_EXTENDED_BANK + 0
119#define K8_MCE_THRESHOLD_BASE (MCE_EXTENDED_BANK + 1)
120
121#ifdef __KERNEL__
122 6
123struct mca_config { 7struct mca_config {
124 bool dont_log_ce; 8 bool dont_log_ce;
@@ -260,5 +144,4 @@ struct cper_sec_mem_err;
260extern void apei_mce_report_mem_error(int corrected, 144extern void apei_mce_report_mem_error(int corrected,
261 struct cper_sec_mem_err *mem_err); 145 struct cper_sec_mem_err *mem_err);
262 146
263#endif /* __KERNEL__ */
264#endif /* _ASM_X86_MCE_H */ 147#endif /* _ASM_X86_MCE_H */
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 813ed103f45e..9264802e2824 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -1,18 +1,10 @@
1#ifndef _ASM_X86_MSR_H 1#ifndef _ASM_X86_MSR_H
2#define _ASM_X86_MSR_H 2#define _ASM_X86_MSR_H
3 3
4#include <asm/msr-index.h> 4#include <uapi/asm/msr.h>
5 5
6#ifndef __ASSEMBLY__ 6#ifndef __ASSEMBLY__
7 7
8#include <linux/types.h>
9#include <linux/ioctl.h>
10
11#define X86_IOC_RDMSR_REGS _IOWR('c', 0xA0, __u32[8])
12#define X86_IOC_WRMSR_REGS _IOWR('c', 0xA1, __u32[8])
13
14#ifdef __KERNEL__
15
16#include <asm/asm.h> 8#include <asm/asm.h>
17#include <asm/errno.h> 9#include <asm/errno.h>
18#include <asm/cpumask.h> 10#include <asm/cpumask.h>
@@ -271,6 +263,5 @@ static inline int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8])
271 return wrmsr_safe_regs(regs); 263 return wrmsr_safe_regs(regs);
272} 264}
273#endif /* CONFIG_SMP */ 265#endif /* CONFIG_SMP */
274#endif /* __KERNEL__ */
275#endif /* __ASSEMBLY__ */ 266#endif /* __ASSEMBLY__ */
276#endif /* _ASM_X86_MSR_H */ 267#endif /* _ASM_X86_MSR_H */
diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h
index 7e3f17f92c66..e235582f9930 100644
--- a/arch/x86/include/asm/mtrr.h
+++ b/arch/x86/include/asm/mtrr.h
@@ -23,97 +23,8 @@
23#ifndef _ASM_X86_MTRR_H 23#ifndef _ASM_X86_MTRR_H
24#define _ASM_X86_MTRR_H 24#define _ASM_X86_MTRR_H
25 25
26#include <linux/types.h> 26#include <uapi/asm/mtrr.h>
27#include <linux/ioctl.h>
28#include <linux/errno.h>
29 27
30#define MTRR_IOCTL_BASE 'M'
31
32/* Warning: this structure has a different order from i386
33 on x86-64. The 32bit emulation code takes care of that.
34 But you need to use this for 64bit, otherwise your X server
35 will break. */
36
37#ifdef __i386__
38struct mtrr_sentry {
39 unsigned long base; /* Base address */
40 unsigned int size; /* Size of region */
41 unsigned int type; /* Type of region */
42};
43
44struct mtrr_gentry {
45 unsigned int regnum; /* Register number */
46 unsigned long base; /* Base address */
47 unsigned int size; /* Size of region */
48 unsigned int type; /* Type of region */
49};
50
51#else /* __i386__ */
52
53struct mtrr_sentry {
54 __u64 base; /* Base address */
55 __u32 size; /* Size of region */
56 __u32 type; /* Type of region */
57};
58
59struct mtrr_gentry {
60 __u64 base; /* Base address */
61 __u32 size; /* Size of region */
62 __u32 regnum; /* Register number */
63 __u32 type; /* Type of region */
64 __u32 _pad; /* Unused */
65};
66
67#endif /* !__i386__ */
68
69struct mtrr_var_range {
70 __u32 base_lo;
71 __u32 base_hi;
72 __u32 mask_lo;
73 __u32 mask_hi;
74};
75
76/* In the Intel processor's MTRR interface, the MTRR type is always held in
77 an 8 bit field: */
78typedef __u8 mtrr_type;
79
80#define MTRR_NUM_FIXED_RANGES 88
81#define MTRR_MAX_VAR_RANGES 256
82
83struct mtrr_state_type {
84 struct mtrr_var_range var_ranges[MTRR_MAX_VAR_RANGES];
85 mtrr_type fixed_ranges[MTRR_NUM_FIXED_RANGES];
86 unsigned char enabled;
87 unsigned char have_fixed;
88 mtrr_type def_type;
89};
90
91#define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))
92#define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1)
93
94/* These are the various ioctls */
95#define MTRRIOC_ADD_ENTRY _IOW(MTRR_IOCTL_BASE, 0, struct mtrr_sentry)
96#define MTRRIOC_SET_ENTRY _IOW(MTRR_IOCTL_BASE, 1, struct mtrr_sentry)
97#define MTRRIOC_DEL_ENTRY _IOW(MTRR_IOCTL_BASE, 2, struct mtrr_sentry)
98#define MTRRIOC_GET_ENTRY _IOWR(MTRR_IOCTL_BASE, 3, struct mtrr_gentry)
99#define MTRRIOC_KILL_ENTRY _IOW(MTRR_IOCTL_BASE, 4, struct mtrr_sentry)
100#define MTRRIOC_ADD_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 5, struct mtrr_sentry)
101#define MTRRIOC_SET_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 6, struct mtrr_sentry)
102#define MTRRIOC_DEL_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 7, struct mtrr_sentry)
103#define MTRRIOC_GET_PAGE_ENTRY _IOWR(MTRR_IOCTL_BASE, 8, struct mtrr_gentry)
104#define MTRRIOC_KILL_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 9, struct mtrr_sentry)
105
106/* These are the region types */
107#define MTRR_TYPE_UNCACHABLE 0
108#define MTRR_TYPE_WRCOMB 1
109/*#define MTRR_TYPE_ 2*/
110/*#define MTRR_TYPE_ 3*/
111#define MTRR_TYPE_WRTHROUGH 4
112#define MTRR_TYPE_WRPROT 5
113#define MTRR_TYPE_WRBACK 6
114#define MTRR_NUM_TYPES 7
115
116#ifdef __KERNEL__
117 28
118/* The following functions are for use by other drivers */ 29/* The following functions are for use by other drivers */
119# ifdef CONFIG_MTRR 30# ifdef CONFIG_MTRR
@@ -208,6 +119,4 @@ struct mtrr_gentry32 {
208 _IOW(MTRR_IOCTL_BASE, 9, struct mtrr_sentry32) 119 _IOW(MTRR_IOCTL_BASE, 9, struct mtrr_sentry32)
209#endif /* CONFIG_COMPAT */ 120#endif /* CONFIG_COMPAT */
210 121
211#endif /* __KERNEL__ */
212
213#endif /* _ASM_X86_MTRR_H */ 122#endif /* _ASM_X86_MTRR_H */
diff --git a/arch/x86/include/asm/posix_types.h b/arch/x86/include/asm/posix_types.h
index bad3665c25fc..f565f6dd59d4 100644
--- a/arch/x86/include/asm/posix_types.h
+++ b/arch/x86/include/asm/posix_types.h
@@ -1,15 +1,5 @@
1#ifdef __KERNEL__
2# ifdef CONFIG_X86_32 1# ifdef CONFIG_X86_32
3# include <asm/posix_types_32.h> 2# include <asm/posix_types_32.h>
4# else 3# else
5# include <asm/posix_types_64.h> 4# include <asm/posix_types_64.h>
6# endif 5# endif
7#else
8# ifdef __i386__
9# include <asm/posix_types_32.h>
10# elif defined(__ILP32__)
11# include <asm/posix_types_x32.h>
12# else
13# include <asm/posix_types_64.h>
14# endif
15#endif
diff --git a/arch/x86/include/asm/processor-flags.h b/arch/x86/include/asm/processor-flags.h
index 680cf09ed100..39fb618e2211 100644
--- a/arch/x86/include/asm/processor-flags.h
+++ b/arch/x86/include/asm/processor-flags.h
@@ -1,106 +1,11 @@
1#ifndef _ASM_X86_PROCESSOR_FLAGS_H 1#ifndef _ASM_X86_PROCESSOR_FLAGS_H
2#define _ASM_X86_PROCESSOR_FLAGS_H 2#define _ASM_X86_PROCESSOR_FLAGS_H
3/* Various flags defined: can be included from assembler. */
4 3
5/* 4#include <uapi/asm/processor-flags.h>
6 * EFLAGS bits
7 */
8#define X86_EFLAGS_CF 0x00000001 /* Carry Flag */
9#define X86_EFLAGS_BIT1 0x00000002 /* Bit 1 - always on */
10#define X86_EFLAGS_PF 0x00000004 /* Parity Flag */
11#define X86_EFLAGS_AF 0x00000010 /* Auxiliary carry Flag */
12#define X86_EFLAGS_ZF 0x00000040 /* Zero Flag */
13#define X86_EFLAGS_SF 0x00000080 /* Sign Flag */
14#define X86_EFLAGS_TF 0x00000100 /* Trap Flag */
15#define X86_EFLAGS_IF 0x00000200 /* Interrupt Flag */
16#define X86_EFLAGS_DF 0x00000400 /* Direction Flag */
17#define X86_EFLAGS_OF 0x00000800 /* Overflow Flag */
18#define X86_EFLAGS_IOPL 0x00003000 /* IOPL mask */
19#define X86_EFLAGS_NT 0x00004000 /* Nested Task */
20#define X86_EFLAGS_RF 0x00010000 /* Resume Flag */
21#define X86_EFLAGS_VM 0x00020000 /* Virtual Mode */
22#define X86_EFLAGS_AC 0x00040000 /* Alignment Check */
23#define X86_EFLAGS_VIF 0x00080000 /* Virtual Interrupt Flag */
24#define X86_EFLAGS_VIP 0x00100000 /* Virtual Interrupt Pending */
25#define X86_EFLAGS_ID 0x00200000 /* CPUID detection flag */
26 5
27/*
28 * Basic CPU control in CR0
29 */
30#define X86_CR0_PE 0x00000001 /* Protection Enable */
31#define X86_CR0_MP 0x00000002 /* Monitor Coprocessor */
32#define X86_CR0_EM 0x00000004 /* Emulation */
33#define X86_CR0_TS 0x00000008 /* Task Switched */
34#define X86_CR0_ET 0x00000010 /* Extension Type */
35#define X86_CR0_NE 0x00000020 /* Numeric Error */
36#define X86_CR0_WP 0x00010000 /* Write Protect */
37#define X86_CR0_AM 0x00040000 /* Alignment Mask */
38#define X86_CR0_NW 0x20000000 /* Not Write-through */
39#define X86_CR0_CD 0x40000000 /* Cache Disable */
40#define X86_CR0_PG 0x80000000 /* Paging */
41
42/*
43 * Paging options in CR3
44 */
45#define X86_CR3_PWT 0x00000008 /* Page Write Through */
46#define X86_CR3_PCD 0x00000010 /* Page Cache Disable */
47#define X86_CR3_PCID_MASK 0x00000fff /* PCID Mask */
48
49/*
50 * Intel CPU features in CR4
51 */
52#define X86_CR4_VME 0x00000001 /* enable vm86 extensions */
53#define X86_CR4_PVI 0x00000002 /* virtual interrupts flag enable */
54#define X86_CR4_TSD 0x00000004 /* disable time stamp at ipl 3 */
55#define X86_CR4_DE 0x00000008 /* enable debugging extensions */
56#define X86_CR4_PSE 0x00000010 /* enable page size extensions */
57#define X86_CR4_PAE 0x00000020 /* enable physical address extensions */
58#define X86_CR4_MCE 0x00000040 /* Machine check enable */
59#define X86_CR4_PGE 0x00000080 /* enable global pages */
60#define X86_CR4_PCE 0x00000100 /* enable performance counters at ipl 3 */
61#define X86_CR4_OSFXSR 0x00000200 /* enable fast FPU save and restore */
62#define X86_CR4_OSXMMEXCPT 0x00000400 /* enable unmasked SSE exceptions */
63#define X86_CR4_VMXE 0x00002000 /* enable VMX virtualization */
64#define X86_CR4_RDWRGSFS 0x00010000 /* enable RDWRGSFS support */
65#define X86_CR4_PCIDE 0x00020000 /* enable PCID support */
66#define X86_CR4_OSXSAVE 0x00040000 /* enable xsave and xrestore */
67#define X86_CR4_SMEP 0x00100000 /* enable SMEP support */
68#define X86_CR4_SMAP 0x00200000 /* enable SMAP support */
69
70/*
71 * x86-64 Task Priority Register, CR8
72 */
73#define X86_CR8_TPR 0x0000000F /* task priority register */
74
75/*
76 * AMD and Transmeta use MSRs for configuration; see <asm/msr-index.h>
77 */
78
79/*
80 * NSC/Cyrix CPU configuration register indexes
81 */
82#define CX86_PCR0 0x20
83#define CX86_GCR 0xb8
84#define CX86_CCR0 0xc0
85#define CX86_CCR1 0xc1
86#define CX86_CCR2 0xc2
87#define CX86_CCR3 0xc3
88#define CX86_CCR4 0xe8
89#define CX86_CCR5 0xe9
90#define CX86_CCR6 0xea
91#define CX86_CCR7 0xeb
92#define CX86_PCR1 0xf0
93#define CX86_DIR0 0xfe
94#define CX86_DIR1 0xff
95#define CX86_ARR_BASE 0xc4
96#define CX86_RCR_BASE 0xdc
97
98#ifdef __KERNEL__
99#ifdef CONFIG_VM86 6#ifdef CONFIG_VM86
100#define X86_VM_MASK X86_EFLAGS_VM 7#define X86_VM_MASK X86_EFLAGS_VM
101#else 8#else
102#define X86_VM_MASK 0 /* No VM86 support */ 9#define X86_VM_MASK 0 /* No VM86 support */
103#endif 10#endif
104#endif
105
106#endif /* _ASM_X86_PROCESSOR_FLAGS_H */ 11#endif /* _ASM_X86_PROCESSOR_FLAGS_H */
diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h
index 54d80fddb739..03ca442d8f0d 100644
--- a/arch/x86/include/asm/ptrace.h
+++ b/arch/x86/include/asm/ptrace.h
@@ -1,44 +1,12 @@
1#ifndef _ASM_X86_PTRACE_H 1#ifndef _ASM_X86_PTRACE_H
2#define _ASM_X86_PTRACE_H 2#define _ASM_X86_PTRACE_H
3 3
4#include <linux/compiler.h> /* For __user */
5#include <asm/ptrace-abi.h>
6#include <asm/processor-flags.h>
7
8#ifdef __KERNEL__
9#include <asm/segment.h> 4#include <asm/segment.h>
10#include <asm/page_types.h> 5#include <asm/page_types.h>
11#endif 6#include <uapi/asm/ptrace.h>
12 7
13#ifndef __ASSEMBLY__ 8#ifndef __ASSEMBLY__
14
15#ifdef __i386__ 9#ifdef __i386__
16/* this struct defines the way the registers are stored on the
17 stack during a system call. */
18
19#ifndef __KERNEL__
20
21struct pt_regs {
22 long ebx;
23 long ecx;
24 long edx;
25 long esi;
26 long edi;
27 long ebp;
28 long eax;
29 int xds;
30 int xes;
31 int xfs;
32 int xgs;
33 long orig_eax;
34 long eip;
35 int xcs;
36 long eflags;
37 long esp;
38 int xss;
39};
40
41#else /* __KERNEL__ */
42 10
43struct pt_regs { 11struct pt_regs {
44 unsigned long bx; 12 unsigned long bx;
@@ -60,42 +28,8 @@ struct pt_regs {
60 unsigned long ss; 28 unsigned long ss;
61}; 29};
62 30
63#endif /* __KERNEL__ */
64
65#else /* __i386__ */ 31#else /* __i386__ */
66 32
67#ifndef __KERNEL__
68
69struct pt_regs {
70 unsigned long r15;
71 unsigned long r14;
72 unsigned long r13;
73 unsigned long r12;
74 unsigned long rbp;
75 unsigned long rbx;
76/* arguments: non interrupts/non tracing syscalls only save up to here*/
77 unsigned long r11;
78 unsigned long r10;
79 unsigned long r9;
80 unsigned long r8;
81 unsigned long rax;
82 unsigned long rcx;
83 unsigned long rdx;
84 unsigned long rsi;
85 unsigned long rdi;
86 unsigned long orig_rax;
87/* end of arguments */
88/* cpu exception frame or undefined */
89 unsigned long rip;
90 unsigned long cs;
91 unsigned long eflags;
92 unsigned long rsp;
93 unsigned long ss;
94/* top of stack page */
95};
96
97#else /* __KERNEL__ */
98
99struct pt_regs { 33struct pt_regs {
100 unsigned long r15; 34 unsigned long r15;
101 unsigned long r14; 35 unsigned long r14;
@@ -124,12 +58,8 @@ struct pt_regs {
124/* top of stack page */ 58/* top of stack page */
125}; 59};
126 60
127#endif /* __KERNEL__ */
128#endif /* !__i386__ */ 61#endif /* !__i386__ */
129 62
130
131#ifdef __KERNEL__
132
133#include <linux/init.h> 63#include <linux/init.h>
134#ifdef CONFIG_PARAVIRT 64#ifdef CONFIG_PARAVIRT
135#include <asm/paravirt_types.h> 65#include <asm/paravirt_types.h>
@@ -301,8 +231,5 @@ extern int do_get_thread_area(struct task_struct *p, int idx,
301extern int do_set_thread_area(struct task_struct *p, int idx, 231extern int do_set_thread_area(struct task_struct *p, int idx,
302 struct user_desc __user *info, int can_allocate); 232 struct user_desc __user *info, int can_allocate);
303 233
304#endif /* __KERNEL__ */
305
306#endif /* !__ASSEMBLY__ */ 234#endif /* !__ASSEMBLY__ */
307
308#endif /* _ASM_X86_PTRACE_H */ 235#endif /* _ASM_X86_PTRACE_H */
diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h
index d0f19f9fb846..b7bf3505e1ec 100644
--- a/arch/x86/include/asm/setup.h
+++ b/arch/x86/include/asm/setup.h
@@ -1,7 +1,8 @@
1#ifndef _ASM_X86_SETUP_H 1#ifndef _ASM_X86_SETUP_H
2#define _ASM_X86_SETUP_H 2#define _ASM_X86_SETUP_H
3 3
4#ifdef __KERNEL__ 4#include <uapi/asm/setup.h>
5
5 6
6#define COMMAND_LINE_SIZE 2048 7#define COMMAND_LINE_SIZE 2048
7 8
@@ -123,6 +124,4 @@ void __init x86_64_start_reservations(char *real_mode_data);
123 .size .brk.name,.-1b; \ 124 .size .brk.name,.-1b; \
124 .popsection 125 .popsection
125#endif /* __ASSEMBLY__ */ 126#endif /* __ASSEMBLY__ */
126#endif /* __KERNEL__ */
127
128#endif /* _ASM_X86_SETUP_H */ 127#endif /* _ASM_X86_SETUP_H */
diff --git a/arch/x86/include/asm/sigcontext.h b/arch/x86/include/asm/sigcontext.h
index 5ca71c065eef..9dfce4e0417d 100644
--- a/arch/x86/include/asm/sigcontext.h
+++ b/arch/x86/include/asm/sigcontext.h
@@ -1,104 +1,9 @@
1#ifndef _ASM_X86_SIGCONTEXT_H 1#ifndef _ASM_X86_SIGCONTEXT_H
2#define _ASM_X86_SIGCONTEXT_H 2#define _ASM_X86_SIGCONTEXT_H
3 3
4#include <linux/compiler.h> 4#include <uapi/asm/sigcontext.h>
5#include <linux/types.h>
6
7#define FP_XSTATE_MAGIC1 0x46505853U
8#define FP_XSTATE_MAGIC2 0x46505845U
9#define FP_XSTATE_MAGIC2_SIZE sizeof(FP_XSTATE_MAGIC2)
10
11/*
12 * bytes 464..511 in the current 512byte layout of fxsave/fxrstor frame
13 * are reserved for SW usage. On cpu's supporting xsave/xrstor, these bytes
14 * are used to extended the fpstate pointer in the sigcontext, which now
15 * includes the extended state information along with fpstate information.
16 *
17 * Presence of FP_XSTATE_MAGIC1 at the beginning of this SW reserved
18 * area and FP_XSTATE_MAGIC2 at the end of memory layout
19 * (extended_size - FP_XSTATE_MAGIC2_SIZE) indicates the presence of the
20 * extended state information in the memory layout pointed by the fpstate
21 * pointer in sigcontext.
22 */
23struct _fpx_sw_bytes {
24 __u32 magic1; /* FP_XSTATE_MAGIC1 */
25 __u32 extended_size; /* total size of the layout referred by
26 * fpstate pointer in the sigcontext.
27 */
28 __u64 xstate_bv;
29 /* feature bit mask (including fp/sse/extended
30 * state) that is present in the memory
31 * layout.
32 */
33 __u32 xstate_size; /* actual xsave state size, based on the
34 * features saved in the layout.
35 * 'extended_size' will be greater than
36 * 'xstate_size'.
37 */
38 __u32 padding[7]; /* for future use. */
39};
40 5
41#ifdef __i386__ 6#ifdef __i386__
42/*
43 * As documented in the iBCS2 standard..
44 *
45 * The first part of "struct _fpstate" is just the normal i387
46 * hardware setup, the extra "status" word is used to save the
47 * coprocessor status word before entering the handler.
48 *
49 * Pentium III FXSR, SSE support
50 * Gareth Hughes <gareth@valinux.com>, May 2000
51 *
52 * The FPU state data structure has had to grow to accommodate the
53 * extended FPU state required by the Streaming SIMD Extensions.
54 * There is no documented standard to accomplish this at the moment.
55 */
56struct _fpreg {
57 unsigned short significand[4];
58 unsigned short exponent;
59};
60
61struct _fpxreg {
62 unsigned short significand[4];
63 unsigned short exponent;
64 unsigned short padding[3];
65};
66
67struct _xmmreg {
68 unsigned long element[4];
69};
70
71struct _fpstate {
72 /* Regular FPU environment */
73 unsigned long cw;
74 unsigned long sw;
75 unsigned long tag;
76 unsigned long ipoff;
77 unsigned long cssel;
78 unsigned long dataoff;
79 unsigned long datasel;
80 struct _fpreg _st[8];
81 unsigned short status;
82 unsigned short magic; /* 0xffff = regular FPU data only */
83
84 /* FXSR FPU environment */
85 unsigned long _fxsr_env[6]; /* FXSR FPU env is ignored */
86 unsigned long mxcsr;
87 unsigned long reserved;
88 struct _fpxreg _fxsr_st[8]; /* FXSR FPU reg data is ignored */
89 struct _xmmreg _xmm[8];
90 unsigned long padding1[44];
91
92 union {
93 unsigned long padding2[12];
94 struct _fpx_sw_bytes sw_reserved; /* represents the extended
95 * state info */
96 };
97};
98
99#define X86_FXSR_MAGIC 0x0000
100
101#ifdef __KERNEL__
102struct sigcontext { 7struct sigcontext {
103 unsigned short gs, __gsh; 8 unsigned short gs, __gsh;
104 unsigned short fs, __fsh; 9 unsigned short fs, __fsh;
@@ -131,62 +36,7 @@ struct sigcontext {
131 unsigned long oldmask; 36 unsigned long oldmask;
132 unsigned long cr2; 37 unsigned long cr2;
133}; 38};
134#else /* __KERNEL__ */
135/*
136 * User-space might still rely on the old definition:
137 */
138struct sigcontext {
139 unsigned short gs, __gsh;
140 unsigned short fs, __fsh;
141 unsigned short es, __esh;
142 unsigned short ds, __dsh;
143 unsigned long edi;
144 unsigned long esi;
145 unsigned long ebp;
146 unsigned long esp;
147 unsigned long ebx;
148 unsigned long edx;
149 unsigned long ecx;
150 unsigned long eax;
151 unsigned long trapno;
152 unsigned long err;
153 unsigned long eip;
154 unsigned short cs, __csh;
155 unsigned long eflags;
156 unsigned long esp_at_signal;
157 unsigned short ss, __ssh;
158 struct _fpstate __user *fpstate;
159 unsigned long oldmask;
160 unsigned long cr2;
161};
162#endif /* !__KERNEL__ */
163
164#else /* __i386__ */ 39#else /* __i386__ */
165
166/* FXSAVE frame */
167/* Note: reserved1/2 may someday contain valuable data. Always save/restore
168 them when you change signal frames. */
169struct _fpstate {
170 __u16 cwd;
171 __u16 swd;
172 __u16 twd; /* Note this is not the same as the
173 32bit/x87/FSAVE twd */
174 __u16 fop;
175 __u64 rip;
176 __u64 rdp;
177 __u32 mxcsr;
178 __u32 mxcsr_mask;
179 __u32 st_space[32]; /* 8*16 bytes for each FP-reg */
180 __u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg */
181 __u32 reserved2[12];
182 union {
183 __u32 reserved3[12];
184 struct _fpx_sw_bytes sw_reserved; /* represents the extended
185 * state information */
186 };
187};
188
189#ifdef __KERNEL__
190struct sigcontext { 40struct sigcontext {
191 unsigned long r8; 41 unsigned long r8;
192 unsigned long r9; 42 unsigned long r9;
@@ -225,69 +75,5 @@ struct sigcontext {
225 void __user *fpstate; /* zero when no FPU/extended context */ 75 void __user *fpstate; /* zero when no FPU/extended context */
226 unsigned long reserved1[8]; 76 unsigned long reserved1[8];
227}; 77};
228#else /* __KERNEL__ */
229/*
230 * User-space might still rely on the old definition:
231 */
232struct sigcontext {
233 __u64 r8;
234 __u64 r9;
235 __u64 r10;
236 __u64 r11;
237 __u64 r12;
238 __u64 r13;
239 __u64 r14;
240 __u64 r15;
241 __u64 rdi;
242 __u64 rsi;
243 __u64 rbp;
244 __u64 rbx;
245 __u64 rdx;
246 __u64 rax;
247 __u64 rcx;
248 __u64 rsp;
249 __u64 rip;
250 __u64 eflags; /* RFLAGS */
251 __u16 cs;
252 __u16 gs;
253 __u16 fs;
254 __u16 __pad0;
255 __u64 err;
256 __u64 trapno;
257 __u64 oldmask;
258 __u64 cr2;
259 struct _fpstate __user *fpstate; /* zero when no FPU context */
260#ifdef __ILP32__
261 __u32 __fpstate_pad;
262#endif
263 __u64 reserved1[8];
264};
265#endif /* !__KERNEL__ */
266
267#endif /* !__i386__ */ 78#endif /* !__i386__ */
268
269struct _xsave_hdr {
270 __u64 xstate_bv;
271 __u64 reserved1[2];
272 __u64 reserved2[5];
273};
274
275struct _ymmh_state {
276 /* 16 * 16 bytes for each YMMH-reg */
277 __u32 ymmh_space[64];
278};
279
280/*
281 * Extended state pointed by the fpstate pointer in the sigcontext.
282 * In addition to the fpstate, information encoded in the xstate_hdr
283 * indicates the presence of other extended state information
284 * supported by the processor and OS.
285 */
286struct _xstate {
287 struct _fpstate fpstate;
288 struct _xsave_hdr xstate_hdr;
289 struct _ymmh_state ymmh;
290 /* new processor state extensions go here */
291};
292
293#endif /* _ASM_X86_SIGCONTEXT_H */ 79#endif /* _ASM_X86_SIGCONTEXT_H */
diff --git a/arch/x86/include/asm/signal.h b/arch/x86/include/asm/signal.h
index 0dba8b7a6ac7..216bf364a7e7 100644
--- a/arch/x86/include/asm/signal.h
+++ b/arch/x86/include/asm/signal.h
@@ -2,14 +2,6 @@
2#define _ASM_X86_SIGNAL_H 2#define _ASM_X86_SIGNAL_H
3 3
4#ifndef __ASSEMBLY__ 4#ifndef __ASSEMBLY__
5#include <linux/types.h>
6#include <linux/time.h>
7#include <linux/compiler.h>
8
9/* Avoid too many header ordering problems. */
10struct siginfo;
11
12#ifdef __KERNEL__
13#include <linux/linkage.h> 5#include <linux/linkage.h>
14 6
15/* Most things should be clean enough to redefine this at will, if care 7/* Most things should be clean enough to redefine this at will, if care
@@ -35,102 +27,11 @@ typedef struct {
35typedef sigset_t compat_sigset_t; 27typedef sigset_t compat_sigset_t;
36#endif 28#endif
37 29
38#else
39/* Here we must cater to libcs that poke about in kernel headers. */
40
41#define NSIG 32
42typedef unsigned long sigset_t;
43
44#endif /* __KERNEL__ */
45#endif /* __ASSEMBLY__ */ 30#endif /* __ASSEMBLY__ */
46 31#include <uapi/asm/signal.h>
47#define SIGHUP 1
48#define SIGINT 2
49#define SIGQUIT 3
50#define SIGILL 4
51#define SIGTRAP 5
52#define SIGABRT 6
53#define SIGIOT 6
54#define SIGBUS 7
55#define SIGFPE 8
56#define SIGKILL 9
57#define SIGUSR1 10
58#define SIGSEGV 11
59#define SIGUSR2 12
60#define SIGPIPE 13
61#define SIGALRM 14
62#define SIGTERM 15
63#define SIGSTKFLT 16
64#define SIGCHLD 17
65#define SIGCONT 18
66#define SIGSTOP 19
67#define SIGTSTP 20
68#define SIGTTIN 21
69#define SIGTTOU 22
70#define SIGURG 23
71#define SIGXCPU 24
72#define SIGXFSZ 25
73#define SIGVTALRM 26
74#define SIGPROF 27
75#define SIGWINCH 28
76#define SIGIO 29
77#define SIGPOLL SIGIO
78/*
79#define SIGLOST 29
80*/
81#define SIGPWR 30
82#define SIGSYS 31
83#define SIGUNUSED 31
84
85/* These should not be considered constants from userland. */
86#define SIGRTMIN 32
87#define SIGRTMAX _NSIG
88
89/*
90 * SA_FLAGS values:
91 *
92 * SA_ONSTACK indicates that a registered stack_t will be used.
93 * SA_RESTART flag to get restarting signals (which were the default long ago)
94 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
95 * SA_RESETHAND clears the handler when the signal is delivered.
96 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
97 * SA_NODEFER prevents the current signal from being masked in the handler.
98 *
99 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
100 * Unix names RESETHAND and NODEFER respectively.
101 */
102#define SA_NOCLDSTOP 0x00000001u
103#define SA_NOCLDWAIT 0x00000002u
104#define SA_SIGINFO 0x00000004u
105#define SA_ONSTACK 0x08000000u
106#define SA_RESTART 0x10000000u
107#define SA_NODEFER 0x40000000u
108#define SA_RESETHAND 0x80000000u
109
110#define SA_NOMASK SA_NODEFER
111#define SA_ONESHOT SA_RESETHAND
112
113#define SA_RESTORER 0x04000000
114
115/*
116 * sigaltstack controls
117 */
118#define SS_ONSTACK 1
119#define SS_DISABLE 2
120
121#define MINSIGSTKSZ 2048
122#define SIGSTKSZ 8192
123
124#include <asm-generic/signal-defs.h>
125
126#ifndef __ASSEMBLY__ 32#ifndef __ASSEMBLY__
127
128# ifdef __KERNEL__
129extern void do_notify_resume(struct pt_regs *, void *, __u32); 33extern void do_notify_resume(struct pt_regs *, void *, __u32);
130# endif /* __KERNEL__ */
131
132#ifdef __i386__ 34#ifdef __i386__
133# ifdef __KERNEL__
134struct old_sigaction { 35struct old_sigaction {
135 __sighandler_t sa_handler; 36 __sighandler_t sa_handler;
136 old_sigset_t sa_mask; 37 old_sigset_t sa_mask;
@@ -149,45 +50,8 @@ struct k_sigaction {
149 struct sigaction sa; 50 struct sigaction sa;
150}; 51};
151 52
152# else /* __KERNEL__ */
153/* Here we must cater to libcs that poke about in kernel headers. */
154
155struct sigaction {
156 union {
157 __sighandler_t _sa_handler;
158 void (*_sa_sigaction)(int, struct siginfo *, void *);
159 } _u;
160 sigset_t sa_mask;
161 unsigned long sa_flags;
162 void (*sa_restorer)(void);
163};
164
165#define sa_handler _u._sa_handler
166#define sa_sigaction _u._sa_sigaction
167
168# endif /* ! __KERNEL__ */
169#else /* __i386__ */ 53#else /* __i386__ */
170
171struct sigaction {
172 __sighandler_t sa_handler;
173 unsigned long sa_flags;
174 __sigrestore_t sa_restorer;
175 sigset_t sa_mask; /* mask last for extensibility */
176};
177
178struct k_sigaction {
179 struct sigaction sa;
180};
181
182#endif /* !__i386__ */ 54#endif /* !__i386__ */
183
184typedef struct sigaltstack {
185 void __user *ss_sp;
186 int ss_flags;
187 size_t ss_size;
188} stack_t;
189
190#ifdef __KERNEL__
191#include <asm/sigcontext.h> 55#include <asm/sigcontext.h>
192 56
193#ifdef __i386__ 57#ifdef __i386__
@@ -260,7 +124,5 @@ struct pt_regs;
260 124
261#endif /* !__i386__ */ 125#endif /* !__i386__ */
262 126
263#endif /* __KERNEL__ */
264#endif /* __ASSEMBLY__ */ 127#endif /* __ASSEMBLY__ */
265
266#endif /* _ASM_X86_SIGNAL_H */ 128#endif /* _ASM_X86_SIGNAL_H */
diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h
index cdf5674dd23a..6136d99f537b 100644
--- a/arch/x86/include/asm/svm.h
+++ b/arch/x86/include/asm/svm.h
@@ -1,134 +1,8 @@
1#ifndef __SVM_H 1#ifndef __SVM_H
2#define __SVM_H 2#define __SVM_H
3 3
4#define SVM_EXIT_READ_CR0 0x000 4#include <uapi/asm/svm.h>
5#define SVM_EXIT_READ_CR3 0x003 5
6#define SVM_EXIT_READ_CR4 0x004
7#define SVM_EXIT_READ_CR8 0x008
8#define SVM_EXIT_WRITE_CR0 0x010
9#define SVM_EXIT_WRITE_CR3 0x013
10#define SVM_EXIT_WRITE_CR4 0x014
11#define SVM_EXIT_WRITE_CR8 0x018
12#define SVM_EXIT_READ_DR0 0x020
13#define SVM_EXIT_READ_DR1 0x021
14#define SVM_EXIT_READ_DR2 0x022
15#define SVM_EXIT_READ_DR3 0x023
16#define SVM_EXIT_READ_DR4 0x024
17#define SVM_EXIT_READ_DR5 0x025
18#define SVM_EXIT_READ_DR6 0x026
19#define SVM_EXIT_READ_DR7 0x027
20#define SVM_EXIT_WRITE_DR0 0x030
21#define SVM_EXIT_WRITE_DR1 0x031
22#define SVM_EXIT_WRITE_DR2 0x032
23#define SVM_EXIT_WRITE_DR3 0x033
24#define SVM_EXIT_WRITE_DR4 0x034
25#define SVM_EXIT_WRITE_DR5 0x035
26#define SVM_EXIT_WRITE_DR6 0x036
27#define SVM_EXIT_WRITE_DR7 0x037
28#define SVM_EXIT_EXCP_BASE 0x040
29#define SVM_EXIT_INTR 0x060
30#define SVM_EXIT_NMI 0x061
31#define SVM_EXIT_SMI 0x062
32#define SVM_EXIT_INIT 0x063
33#define SVM_EXIT_VINTR 0x064
34#define SVM_EXIT_CR0_SEL_WRITE 0x065
35#define SVM_EXIT_IDTR_READ 0x066
36#define SVM_EXIT_GDTR_READ 0x067
37#define SVM_EXIT_LDTR_READ 0x068
38#define SVM_EXIT_TR_READ 0x069
39#define SVM_EXIT_IDTR_WRITE 0x06a
40#define SVM_EXIT_GDTR_WRITE 0x06b
41#define SVM_EXIT_LDTR_WRITE 0x06c
42#define SVM_EXIT_TR_WRITE 0x06d
43#define SVM_EXIT_RDTSC 0x06e
44#define SVM_EXIT_RDPMC 0x06f
45#define SVM_EXIT_PUSHF 0x070
46#define SVM_EXIT_POPF 0x071
47#define SVM_EXIT_CPUID 0x072
48#define SVM_EXIT_RSM 0x073
49#define SVM_EXIT_IRET 0x074
50#define SVM_EXIT_SWINT 0x075
51#define SVM_EXIT_INVD 0x076
52#define SVM_EXIT_PAUSE 0x077
53#define SVM_EXIT_HLT 0x078
54#define SVM_EXIT_INVLPG 0x079
55#define SVM_EXIT_INVLPGA 0x07a
56#define SVM_EXIT_IOIO 0x07b
57#define SVM_EXIT_MSR 0x07c
58#define SVM_EXIT_TASK_SWITCH 0x07d
59#define SVM_EXIT_FERR_FREEZE 0x07e
60#define SVM_EXIT_SHUTDOWN 0x07f
61#define SVM_EXIT_VMRUN 0x080
62#define SVM_EXIT_VMMCALL 0x081
63#define SVM_EXIT_VMLOAD 0x082
64#define SVM_EXIT_VMSAVE 0x083
65#define SVM_EXIT_STGI 0x084
66#define SVM_EXIT_CLGI 0x085
67#define SVM_EXIT_SKINIT 0x086
68#define SVM_EXIT_RDTSCP 0x087
69#define SVM_EXIT_ICEBP 0x088
70#define SVM_EXIT_WBINVD 0x089
71#define SVM_EXIT_MONITOR 0x08a
72#define SVM_EXIT_MWAIT 0x08b
73#define SVM_EXIT_MWAIT_COND 0x08c
74#define SVM_EXIT_XSETBV 0x08d
75#define SVM_EXIT_NPF 0x400
76
77#define SVM_EXIT_ERR -1
78
79#define SVM_EXIT_REASONS \
80 { SVM_EXIT_READ_CR0, "read_cr0" }, \
81 { SVM_EXIT_READ_CR3, "read_cr3" }, \
82 { SVM_EXIT_READ_CR4, "read_cr4" }, \
83 { SVM_EXIT_READ_CR8, "read_cr8" }, \
84 { SVM_EXIT_WRITE_CR0, "write_cr0" }, \
85 { SVM_EXIT_WRITE_CR3, "write_cr3" }, \
86 { SVM_EXIT_WRITE_CR4, "write_cr4" }, \
87 { SVM_EXIT_WRITE_CR8, "write_cr8" }, \
88 { SVM_EXIT_READ_DR0, "read_dr0" }, \
89 { SVM_EXIT_READ_DR1, "read_dr1" }, \
90 { SVM_EXIT_READ_DR2, "read_dr2" }, \
91 { SVM_EXIT_READ_DR3, "read_dr3" }, \
92 { SVM_EXIT_WRITE_DR0, "write_dr0" }, \
93 { SVM_EXIT_WRITE_DR1, "write_dr1" }, \
94 { SVM_EXIT_WRITE_DR2, "write_dr2" }, \
95 { SVM_EXIT_WRITE_DR3, "write_dr3" }, \
96 { SVM_EXIT_WRITE_DR5, "write_dr5" }, \
97 { SVM_EXIT_WRITE_DR7, "write_dr7" }, \
98 { SVM_EXIT_EXCP_BASE + DB_VECTOR, "DB excp" }, \
99 { SVM_EXIT_EXCP_BASE + BP_VECTOR, "BP excp" }, \
100 { SVM_EXIT_EXCP_BASE + UD_VECTOR, "UD excp" }, \
101 { SVM_EXIT_EXCP_BASE + PF_VECTOR, "PF excp" }, \
102 { SVM_EXIT_EXCP_BASE + NM_VECTOR, "NM excp" }, \
103 { SVM_EXIT_EXCP_BASE + MC_VECTOR, "MC excp" }, \
104 { SVM_EXIT_INTR, "interrupt" }, \
105 { SVM_EXIT_NMI, "nmi" }, \
106 { SVM_EXIT_SMI, "smi" }, \
107 { SVM_EXIT_INIT, "init" }, \
108 { SVM_EXIT_VINTR, "vintr" }, \
109 { SVM_EXIT_CPUID, "cpuid" }, \
110 { SVM_EXIT_INVD, "invd" }, \
111 { SVM_EXIT_HLT, "hlt" }, \
112 { SVM_EXIT_INVLPG, "invlpg" }, \
113 { SVM_EXIT_INVLPGA, "invlpga" }, \
114 { SVM_EXIT_IOIO, "io" }, \
115 { SVM_EXIT_MSR, "msr" }, \
116 { SVM_EXIT_TASK_SWITCH, "task_switch" }, \
117 { SVM_EXIT_SHUTDOWN, "shutdown" }, \
118 { SVM_EXIT_VMRUN, "vmrun" }, \
119 { SVM_EXIT_VMMCALL, "hypercall" }, \
120 { SVM_EXIT_VMLOAD, "vmload" }, \
121 { SVM_EXIT_VMSAVE, "vmsave" }, \
122 { SVM_EXIT_STGI, "stgi" }, \
123 { SVM_EXIT_CLGI, "clgi" }, \
124 { SVM_EXIT_SKINIT, "skinit" }, \
125 { SVM_EXIT_WBINVD, "wbinvd" }, \
126 { SVM_EXIT_MONITOR, "monitor" }, \
127 { SVM_EXIT_MWAIT, "mwait" }, \
128 { SVM_EXIT_XSETBV, "xsetbv" }, \
129 { SVM_EXIT_NPF, "npf" }
130
131#ifdef __KERNEL__
132 6
133enum { 7enum {
134 INTERCEPT_INTR, 8 INTERCEPT_INTR,
@@ -403,5 +277,3 @@ struct __attribute__ ((__packed__)) vmcb {
403#define SVM_INVLPGA ".byte 0x0f, 0x01, 0xdf" 277#define SVM_INVLPGA ".byte 0x0f, 0x01, 0xdf"
404 278
405#endif 279#endif
406
407#endif
diff --git a/arch/x86/include/asm/unistd.h b/arch/x86/include/asm/unistd.h
index 0e7dea7d3669..1003e69a40d9 100644
--- a/arch/x86/include/asm/unistd.h
+++ b/arch/x86/include/asm/unistd.h
@@ -1,10 +1,8 @@
1#ifndef _ASM_X86_UNISTD_H 1#ifndef _ASM_X86_UNISTD_H
2#define _ASM_X86_UNISTD_H 1 2#define _ASM_X86_UNISTD_H 1
3 3
4/* x32 syscall flag bit */ 4#include <uapi/asm/unistd.h>
5#define __X32_SYSCALL_BIT 0x40000000
6 5
7#ifdef __KERNEL__
8 6
9# ifdef CONFIG_X86_X32_ABI 7# ifdef CONFIG_X86_X32_ABI
10# define __SYSCALL_MASK (~(__X32_SYSCALL_BIT)) 8# define __SYSCALL_MASK (~(__X32_SYSCALL_BIT))
@@ -63,14 +61,4 @@
63 */ 61 */
64# define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") 62# define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
65 63
66#else
67# ifdef __i386__
68# include <asm/unistd_32.h>
69# elif defined(__ILP32__)
70# include <asm/unistd_x32.h>
71# else
72# include <asm/unistd_64.h>
73# endif
74#endif
75
76#endif /* _ASM_X86_UNISTD_H */ 64#endif /* _ASM_X86_UNISTD_H */
diff --git a/arch/x86/include/asm/vm86.h b/arch/x86/include/asm/vm86.h
index f9303602fbc0..1d8de3f3feca 100644
--- a/arch/x86/include/asm/vm86.h
+++ b/arch/x86/include/asm/vm86.h
@@ -1,133 +1,9 @@
1#ifndef _ASM_X86_VM86_H 1#ifndef _ASM_X86_VM86_H
2#define _ASM_X86_VM86_H 2#define _ASM_X86_VM86_H
3 3
4/*
5 * I'm guessing at the VIF/VIP flag usage, but hope that this is how
6 * the Pentium uses them. Linux will return from vm86 mode when both
7 * VIF and VIP is set.
8 *
9 * On a Pentium, we could probably optimize the virtual flags directly
10 * in the eflags register instead of doing it "by hand" in vflags...
11 *
12 * Linus
13 */
14
15#include <asm/processor-flags.h>
16
17#define BIOSSEG 0x0f000
18
19#define CPU_086 0
20#define CPU_186 1
21#define CPU_286 2
22#define CPU_386 3
23#define CPU_486 4
24#define CPU_586 5
25
26/*
27 * Return values for the 'vm86()' system call
28 */
29#define VM86_TYPE(retval) ((retval) & 0xff)
30#define VM86_ARG(retval) ((retval) >> 8)
31
32#define VM86_SIGNAL 0 /* return due to signal */
33#define VM86_UNKNOWN 1 /* unhandled GP fault
34 - IO-instruction or similar */
35#define VM86_INTx 2 /* int3/int x instruction (ARG = x) */
36#define VM86_STI 3 /* sti/popf/iret instruction enabled
37 virtual interrupts */
38
39/*
40 * Additional return values when invoking new vm86()
41 */
42#define VM86_PICRETURN 4 /* return due to pending PIC request */
43#define VM86_TRAP 6 /* return due to DOS-debugger request */
44
45/*
46 * function codes when invoking new vm86()
47 */
48#define VM86_PLUS_INSTALL_CHECK 0
49#define VM86_ENTER 1
50#define VM86_ENTER_NO_BYPASS 2
51#define VM86_REQUEST_IRQ 3
52#define VM86_FREE_IRQ 4
53#define VM86_GET_IRQ_BITS 5
54#define VM86_GET_AND_RESET_IRQ 6
55
56/*
57 * This is the stack-layout seen by the user space program when we have
58 * done a translation of "SAVE_ALL" from vm86 mode. The real kernel layout
59 * is 'kernel_vm86_regs' (see below).
60 */
61
62struct vm86_regs {
63/*
64 * normal regs, with special meaning for the segment descriptors..
65 */
66 long ebx;
67 long ecx;
68 long edx;
69 long esi;
70 long edi;
71 long ebp;
72 long eax;
73 long __null_ds;
74 long __null_es;
75 long __null_fs;
76 long __null_gs;
77 long orig_eax;
78 long eip;
79 unsigned short cs, __csh;
80 long eflags;
81 long esp;
82 unsigned short ss, __ssh;
83/*
84 * these are specific to v86 mode:
85 */
86 unsigned short es, __esh;
87 unsigned short ds, __dsh;
88 unsigned short fs, __fsh;
89 unsigned short gs, __gsh;
90};
91
92struct revectored_struct {
93 unsigned long __map[8]; /* 256 bits */
94};
95
96struct vm86_struct {
97 struct vm86_regs regs;
98 unsigned long flags;
99 unsigned long screen_bitmap;
100 unsigned long cpu_type;
101 struct revectored_struct int_revectored;
102 struct revectored_struct int21_revectored;
103};
104
105/*
106 * flags masks
107 */
108#define VM86_SCREEN_BITMAP 0x0001
109
110struct vm86plus_info_struct {
111 unsigned long force_return_for_pic:1;
112 unsigned long vm86dbg_active:1; /* for debugger */
113 unsigned long vm86dbg_TFpendig:1; /* for debugger */
114 unsigned long unused:28;
115 unsigned long is_vm86pus:1; /* for vm86 internal use */
116 unsigned char vm86dbg_intxxtab[32]; /* for debugger */
117};
118struct vm86plus_struct {
119 struct vm86_regs regs;
120 unsigned long flags;
121 unsigned long screen_bitmap;
122 unsigned long cpu_type;
123 struct revectored_struct int_revectored;
124 struct revectored_struct int21_revectored;
125 struct vm86plus_info_struct vm86plus;
126};
127
128#ifdef __KERNEL__
129 4
130#include <asm/ptrace.h> 5#include <asm/ptrace.h>
6#include <uapi/asm/vm86.h>
131 7
132/* 8/*
133 * This is the (kernel) stack-layout when we have done a "SAVE_ALL" from vm86 9 * This is the (kernel) stack-layout when we have done a "SAVE_ALL" from vm86
@@ -203,6 +79,4 @@ static inline int handle_vm86_trap(struct kernel_vm86_regs *a, long b, int c)
203 79
204#endif /* CONFIG_VM86 */ 80#endif /* CONFIG_VM86 */
205 81
206#endif /* __KERNEL__ */
207
208#endif /* _ASM_X86_VM86_H */ 82#endif /* _ASM_X86_VM86_H */
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
index c2d56b34830d..235b49fa554b 100644
--- a/arch/x86/include/asm/vmx.h
+++ b/arch/x86/include/asm/vmx.h
@@ -1,6 +1,3 @@
1#ifndef VMX_H
2#define VMX_H
3
4/* 1/*
5 * vmx.h: VMX Architecture related definitions 2 * vmx.h: VMX Architecture related definitions
6 * Copyright (c) 2004, Intel Corporation. 3 * Copyright (c) 2004, Intel Corporation.
@@ -24,90 +21,12 @@
24 * Yaniv Kamay <yaniv@qumranet.com> 21 * Yaniv Kamay <yaniv@qumranet.com>
25 * 22 *
26 */ 23 */
24#ifndef VMX_H
25#define VMX_H
27 26
28#define VMX_EXIT_REASONS_FAILED_VMENTRY 0x80000000
29
30#define EXIT_REASON_EXCEPTION_NMI 0
31#define EXIT_REASON_EXTERNAL_INTERRUPT 1
32#define EXIT_REASON_TRIPLE_FAULT 2
33
34#define EXIT_REASON_PENDING_INTERRUPT 7
35#define EXIT_REASON_NMI_WINDOW 8
36#define EXIT_REASON_TASK_SWITCH 9
37#define EXIT_REASON_CPUID 10
38#define EXIT_REASON_HLT 12
39#define EXIT_REASON_INVD 13
40#define EXIT_REASON_INVLPG 14
41#define EXIT_REASON_RDPMC 15
42#define EXIT_REASON_RDTSC 16
43#define EXIT_REASON_VMCALL 18
44#define EXIT_REASON_VMCLEAR 19
45#define EXIT_REASON_VMLAUNCH 20
46#define EXIT_REASON_VMPTRLD 21
47#define EXIT_REASON_VMPTRST 22
48#define EXIT_REASON_VMREAD 23
49#define EXIT_REASON_VMRESUME 24
50#define EXIT_REASON_VMWRITE 25
51#define EXIT_REASON_VMOFF 26
52#define EXIT_REASON_VMON 27
53#define EXIT_REASON_CR_ACCESS 28
54#define EXIT_REASON_DR_ACCESS 29
55#define EXIT_REASON_IO_INSTRUCTION 30
56#define EXIT_REASON_MSR_READ 31
57#define EXIT_REASON_MSR_WRITE 32
58#define EXIT_REASON_INVALID_STATE 33
59#define EXIT_REASON_MWAIT_INSTRUCTION 36
60#define EXIT_REASON_MONITOR_INSTRUCTION 39
61#define EXIT_REASON_PAUSE_INSTRUCTION 40
62#define EXIT_REASON_MCE_DURING_VMENTRY 41
63#define EXIT_REASON_TPR_BELOW_THRESHOLD 43
64#define EXIT_REASON_APIC_ACCESS 44
65#define EXIT_REASON_EPT_VIOLATION 48
66#define EXIT_REASON_EPT_MISCONFIG 49
67#define EXIT_REASON_WBINVD 54
68#define EXIT_REASON_XSETBV 55
69#define EXIT_REASON_INVPCID 58
70
71#define VMX_EXIT_REASONS \
72 { EXIT_REASON_EXCEPTION_NMI, "EXCEPTION_NMI" }, \
73 { EXIT_REASON_EXTERNAL_INTERRUPT, "EXTERNAL_INTERRUPT" }, \
74 { EXIT_REASON_TRIPLE_FAULT, "TRIPLE_FAULT" }, \
75 { EXIT_REASON_PENDING_INTERRUPT, "PENDING_INTERRUPT" }, \
76 { EXIT_REASON_NMI_WINDOW, "NMI_WINDOW" }, \
77 { EXIT_REASON_TASK_SWITCH, "TASK_SWITCH" }, \
78 { EXIT_REASON_CPUID, "CPUID" }, \
79 { EXIT_REASON_HLT, "HLT" }, \
80 { EXIT_REASON_INVLPG, "INVLPG" }, \
81 { EXIT_REASON_RDPMC, "RDPMC" }, \
82 { EXIT_REASON_RDTSC, "RDTSC" }, \
83 { EXIT_REASON_VMCALL, "VMCALL" }, \
84 { EXIT_REASON_VMCLEAR, "VMCLEAR" }, \
85 { EXIT_REASON_VMLAUNCH, "VMLAUNCH" }, \
86 { EXIT_REASON_VMPTRLD, "VMPTRLD" }, \
87 { EXIT_REASON_VMPTRST, "VMPTRST" }, \
88 { EXIT_REASON_VMREAD, "VMREAD" }, \
89 { EXIT_REASON_VMRESUME, "VMRESUME" }, \
90 { EXIT_REASON_VMWRITE, "VMWRITE" }, \
91 { EXIT_REASON_VMOFF, "VMOFF" }, \
92 { EXIT_REASON_VMON, "VMON" }, \
93 { EXIT_REASON_CR_ACCESS, "CR_ACCESS" }, \
94 { EXIT_REASON_DR_ACCESS, "DR_ACCESS" }, \
95 { EXIT_REASON_IO_INSTRUCTION, "IO_INSTRUCTION" }, \
96 { EXIT_REASON_MSR_READ, "MSR_READ" }, \
97 { EXIT_REASON_MSR_WRITE, "MSR_WRITE" }, \
98 { EXIT_REASON_MWAIT_INSTRUCTION, "MWAIT_INSTRUCTION" }, \
99 { EXIT_REASON_MONITOR_INSTRUCTION, "MONITOR_INSTRUCTION" }, \
100 { EXIT_REASON_PAUSE_INSTRUCTION, "PAUSE_INSTRUCTION" }, \
101 { EXIT_REASON_MCE_DURING_VMENTRY, "MCE_DURING_VMENTRY" }, \
102 { EXIT_REASON_TPR_BELOW_THRESHOLD, "TPR_BELOW_THRESHOLD" }, \
103 { EXIT_REASON_APIC_ACCESS, "APIC_ACCESS" }, \
104 { EXIT_REASON_EPT_VIOLATION, "EPT_VIOLATION" }, \
105 { EXIT_REASON_EPT_MISCONFIG, "EPT_MISCONFIG" }, \
106 { EXIT_REASON_WBINVD, "WBINVD" }
107
108#ifdef __KERNEL__
109 27
110#include <linux/types.h> 28#include <linux/types.h>
29#include <uapi/asm/vmx.h>
111 30
112/* 31/*
113 * Definitions of Primary Processor-Based VM-Execution Controls. 32 * Definitions of Primary Processor-Based VM-Execution Controls.
@@ -526,5 +445,3 @@ enum vm_instruction_error_number {
526}; 445};
527 446
528#endif 447#endif
529
530#endif
diff --git a/arch/x86/include/asm/vsyscall.h b/arch/x86/include/asm/vsyscall.h
index 80f80955cfd8..2a46ca720afc 100644
--- a/arch/x86/include/asm/vsyscall.h
+++ b/arch/x86/include/asm/vsyscall.h
@@ -1,20 +1,8 @@
1#ifndef _ASM_X86_VSYSCALL_H 1#ifndef _ASM_X86_VSYSCALL_H
2#define _ASM_X86_VSYSCALL_H 2#define _ASM_X86_VSYSCALL_H
3 3
4enum vsyscall_num {
5 __NR_vgettimeofday,
6 __NR_vtime,
7 __NR_vgetcpu,
8};
9
10#define VSYSCALL_START (-10UL << 20)
11#define VSYSCALL_SIZE 1024
12#define VSYSCALL_END (-2UL << 20)
13#define VSYSCALL_MAPPED_PAGES 1
14#define VSYSCALL_ADDR(vsyscall_nr) (VSYSCALL_START+VSYSCALL_SIZE*(vsyscall_nr))
15
16#ifdef __KERNEL__
17#include <linux/seqlock.h> 4#include <linux/seqlock.h>
5#include <uapi/asm/vsyscall.h>
18 6
19#define VGETCPU_RDTSCP 1 7#define VGETCPU_RDTSCP 1
20#define VGETCPU_LSL 2 8#define VGETCPU_LSL 2
@@ -53,6 +41,4 @@ static inline unsigned int __getcpu(void)
53} 41}
54#endif /* CONFIG_X86_64 */ 42#endif /* CONFIG_X86_64 */
55 43
56#endif /* __KERNEL__ */
57
58#endif /* _ASM_X86_VSYSCALL_H */ 44#endif /* _ASM_X86_VSYSCALL_H */
diff --git a/arch/x86/include/uapi/asm/Kbuild b/arch/x86/include/uapi/asm/Kbuild
index 83b6e9a0dce4..09409c44f9a5 100644
--- a/arch/x86/include/uapi/asm/Kbuild
+++ b/arch/x86/include/uapi/asm/Kbuild
@@ -4,3 +4,61 @@ include include/uapi/asm-generic/Kbuild.asm
4genhdr-y += unistd_32.h 4genhdr-y += unistd_32.h
5genhdr-y += unistd_64.h 5genhdr-y += unistd_64.h
6genhdr-y += unistd_x32.h 6genhdr-y += unistd_x32.h
7header-y += a.out.h
8header-y += auxvec.h
9header-y += bitsperlong.h
10header-y += boot.h
11header-y += bootparam.h
12header-y += byteorder.h
13header-y += debugreg.h
14header-y += e820.h
15header-y += errno.h
16header-y += fcntl.h
17header-y += hw_breakpoint.h
18header-y += hyperv.h
19header-y += ioctl.h
20header-y += ioctls.h
21header-y += ipcbuf.h
22header-y += ist.h
23header-y += kvm.h
24header-y += kvm_para.h
25header-y += ldt.h
26header-y += mce.h
27header-y += mman.h
28header-y += msgbuf.h
29header-y += msr-index.h
30header-y += msr.h
31header-y += mtrr.h
32header-y += param.h
33header-y += perf_regs.h
34header-y += poll.h
35header-y += posix_types.h
36header-y += posix_types_32.h
37header-y += posix_types_64.h
38header-y += posix_types_x32.h
39header-y += prctl.h
40header-y += processor-flags.h
41header-y += ptrace-abi.h
42header-y += ptrace.h
43header-y += resource.h
44header-y += sembuf.h
45header-y += setup.h
46header-y += shmbuf.h
47header-y += sigcontext.h
48header-y += sigcontext32.h
49header-y += siginfo.h
50header-y += signal.h
51header-y += socket.h
52header-y += sockios.h
53header-y += stat.h
54header-y += statfs.h
55header-y += svm.h
56header-y += swab.h
57header-y += termbits.h
58header-y += termios.h
59header-y += types.h
60header-y += ucontext.h
61header-y += unistd.h
62header-y += vm86.h
63header-y += vmx.h
64header-y += vsyscall.h
diff --git a/arch/x86/include/asm/a.out.h b/arch/x86/include/uapi/asm/a.out.h
index 4684f97a5bbd..4684f97a5bbd 100644
--- a/arch/x86/include/asm/a.out.h
+++ b/arch/x86/include/uapi/asm/a.out.h
diff --git a/arch/x86/include/asm/auxvec.h b/arch/x86/include/uapi/asm/auxvec.h
index 77203ac352de..77203ac352de 100644
--- a/arch/x86/include/asm/auxvec.h
+++ b/arch/x86/include/uapi/asm/auxvec.h
diff --git a/arch/x86/include/asm/bitsperlong.h b/arch/x86/include/uapi/asm/bitsperlong.h
index b0ae1c4dc791..b0ae1c4dc791 100644
--- a/arch/x86/include/asm/bitsperlong.h
+++ b/arch/x86/include/uapi/asm/bitsperlong.h
diff --git a/arch/x86/include/uapi/asm/boot.h b/arch/x86/include/uapi/asm/boot.h
new file mode 100644
index 000000000000..94292c4c8122
--- /dev/null
+++ b/arch/x86/include/uapi/asm/boot.h
@@ -0,0 +1,10 @@
1#ifndef _UAPI_ASM_X86_BOOT_H
2#define _UAPI_ASM_X86_BOOT_H
3
4/* Internal svga startup constants */
5#define NORMAL_VGA 0xffff /* 80x25 mode */
6#define EXTENDED_VGA 0xfffe /* 80x50 mode */
7#define ASK_VGA 0xfffd /* ask for it at bootup */
8
9
10#endif /* _UAPI_ASM_X86_BOOT_H */
diff --git a/arch/x86/include/asm/bootparam.h b/arch/x86/include/uapi/asm/bootparam.h
index 92862cd90201..92862cd90201 100644
--- a/arch/x86/include/asm/bootparam.h
+++ b/arch/x86/include/uapi/asm/bootparam.h
diff --git a/arch/x86/include/asm/byteorder.h b/arch/x86/include/uapi/asm/byteorder.h
index b13a7a88f3eb..b13a7a88f3eb 100644
--- a/arch/x86/include/asm/byteorder.h
+++ b/arch/x86/include/uapi/asm/byteorder.h
diff --git a/arch/x86/include/uapi/asm/debugreg.h b/arch/x86/include/uapi/asm/debugreg.h
new file mode 100644
index 000000000000..3c0874dd9861
--- /dev/null
+++ b/arch/x86/include/uapi/asm/debugreg.h
@@ -0,0 +1,80 @@
1#ifndef _UAPI_ASM_X86_DEBUGREG_H
2#define _UAPI_ASM_X86_DEBUGREG_H
3
4
5/* Indicate the register numbers for a number of the specific
6 debug registers. Registers 0-3 contain the addresses we wish to trap on */
7#define DR_FIRSTADDR 0 /* u_debugreg[DR_FIRSTADDR] */
8#define DR_LASTADDR 3 /* u_debugreg[DR_LASTADDR] */
9
10#define DR_STATUS 6 /* u_debugreg[DR_STATUS] */
11#define DR_CONTROL 7 /* u_debugreg[DR_CONTROL] */
12
13/* Define a few things for the status register. We can use this to determine
14 which debugging register was responsible for the trap. The other bits
15 are either reserved or not of interest to us. */
16
17/* Define reserved bits in DR6 which are always set to 1 */
18#define DR6_RESERVED (0xFFFF0FF0)
19
20#define DR_TRAP0 (0x1) /* db0 */
21#define DR_TRAP1 (0x2) /* db1 */
22#define DR_TRAP2 (0x4) /* db2 */
23#define DR_TRAP3 (0x8) /* db3 */
24#define DR_TRAP_BITS (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3)
25
26#define DR_STEP (0x4000) /* single-step */
27#define DR_SWITCH (0x8000) /* task switch */
28
29/* Now define a bunch of things for manipulating the control register.
30 The top two bytes of the control register consist of 4 fields of 4
31 bits - each field corresponds to one of the four debug registers,
32 and indicates what types of access we trap on, and how large the data
33 field is that we are looking at */
34
35#define DR_CONTROL_SHIFT 16 /* Skip this many bits in ctl register */
36#define DR_CONTROL_SIZE 4 /* 4 control bits per register */
37
38#define DR_RW_EXECUTE (0x0) /* Settings for the access types to trap on */
39#define DR_RW_WRITE (0x1)
40#define DR_RW_READ (0x3)
41
42#define DR_LEN_1 (0x0) /* Settings for data length to trap on */
43#define DR_LEN_2 (0x4)
44#define DR_LEN_4 (0xC)
45#define DR_LEN_8 (0x8)
46
47/* The low byte to the control register determine which registers are
48 enabled. There are 4 fields of two bits. One bit is "local", meaning
49 that the processor will reset the bit after a task switch and the other
50 is global meaning that we have to explicitly reset the bit. With linux,
51 you can use either one, since we explicitly zero the register when we enter
52 kernel mode. */
53
54#define DR_LOCAL_ENABLE_SHIFT 0 /* Extra shift to the local enable bit */
55#define DR_GLOBAL_ENABLE_SHIFT 1 /* Extra shift to the global enable bit */
56#define DR_LOCAL_ENABLE (0x1) /* Local enable for reg 0 */
57#define DR_GLOBAL_ENABLE (0x2) /* Global enable for reg 0 */
58#define DR_ENABLE_SIZE 2 /* 2 enable bits per register */
59
60#define DR_LOCAL_ENABLE_MASK (0x55) /* Set local bits for all 4 regs */
61#define DR_GLOBAL_ENABLE_MASK (0xAA) /* Set global bits for all 4 regs */
62
63/* The second byte to the control register has a few special things.
64 We can slow the instruction pipeline for instructions coming via the
65 gdt or the ldt if we want to. I am not sure why this is an advantage */
66
67#ifdef __i386__
68#define DR_CONTROL_RESERVED (0xFC00) /* Reserved by Intel */
69#else
70#define DR_CONTROL_RESERVED (0xFFFFFFFF0000FC00UL) /* Reserved */
71#endif
72
73#define DR_LOCAL_SLOWDOWN (0x100) /* Local slow the pipeline */
74#define DR_GLOBAL_SLOWDOWN (0x200) /* Global slow the pipeline */
75
76/*
77 * HW breakpoint additions
78 */
79
80#endif /* _UAPI_ASM_X86_DEBUGREG_H */
diff --git a/arch/x86/include/uapi/asm/e820.h b/arch/x86/include/uapi/asm/e820.h
new file mode 100644
index 000000000000..bbae02470701
--- /dev/null
+++ b/arch/x86/include/uapi/asm/e820.h
@@ -0,0 +1,75 @@
1#ifndef _UAPI_ASM_X86_E820_H
2#define _UAPI_ASM_X86_E820_H
3#define E820MAP 0x2d0 /* our map */
4#define E820MAX 128 /* number of entries in E820MAP */
5
6/*
7 * Legacy E820 BIOS limits us to 128 (E820MAX) nodes due to the
8 * constrained space in the zeropage. If we have more nodes than
9 * that, and if we've booted off EFI firmware, then the EFI tables
10 * passed us from the EFI firmware can list more nodes. Size our
11 * internal memory map tables to have room for these additional
12 * nodes, based on up to three entries per node for which the
13 * kernel was built: MAX_NUMNODES == (1 << CONFIG_NODES_SHIFT),
14 * plus E820MAX, allowing space for the possible duplicate E820
15 * entries that might need room in the same arrays, prior to the
16 * call to sanitize_e820_map() to remove duplicates. The allowance
17 * of three memory map entries per node is "enough" entries for
18 * the initial hardware platform motivating this mechanism to make
19 * use of additional EFI map entries. Future platforms may want
20 * to allow more than three entries per node or otherwise refine
21 * this size.
22 */
23
24/*
25 * Odd: 'make headers_check' complains about numa.h if I try
26 * to collapse the next two #ifdef lines to a single line:
27 * #if defined(__KERNEL__) && defined(CONFIG_EFI)
28 */
29#ifndef __KERNEL__
30#define E820_X_MAX E820MAX
31#endif
32
33#define E820NR 0x1e8 /* # entries in E820MAP */
34
35#define E820_RAM 1
36#define E820_RESERVED 2
37#define E820_ACPI 3
38#define E820_NVS 4
39#define E820_UNUSABLE 5
40
41
42/*
43 * reserved RAM used by kernel itself
44 * if CONFIG_INTEL_TXT is enabled, memory of this type will be
45 * included in the S3 integrity calculation and so should not include
46 * any memory that BIOS might alter over the S3 transition
47 */
48#define E820_RESERVED_KERN 128
49
50#ifndef __ASSEMBLY__
51#include <linux/types.h>
52struct e820entry {
53 __u64 addr; /* start of memory segment */
54 __u64 size; /* size of memory segment */
55 __u32 type; /* type of memory segment */
56} __attribute__((packed));
57
58struct e820map {
59 __u32 nr_map;
60 struct e820entry map[E820_X_MAX];
61};
62
63#define ISA_START_ADDRESS 0xa0000
64#define ISA_END_ADDRESS 0x100000
65
66#define BIOS_BEGIN 0x000a0000
67#define BIOS_END 0x00100000
68
69#define BIOS_ROM_BASE 0xffe00000
70#define BIOS_ROM_END 0xffffffff
71
72#endif /* __ASSEMBLY__ */
73
74
75#endif /* _UAPI_ASM_X86_E820_H */
diff --git a/arch/x86/include/asm/errno.h b/arch/x86/include/uapi/asm/errno.h
index 4c82b503d92f..4c82b503d92f 100644
--- a/arch/x86/include/asm/errno.h
+++ b/arch/x86/include/uapi/asm/errno.h
diff --git a/arch/x86/include/asm/fcntl.h b/arch/x86/include/uapi/asm/fcntl.h
index 46ab12db5739..46ab12db5739 100644
--- a/arch/x86/include/asm/fcntl.h
+++ b/arch/x86/include/uapi/asm/fcntl.h
diff --git a/arch/x86/include/uapi/asm/hw_breakpoint.h b/arch/x86/include/uapi/asm/hw_breakpoint.h
new file mode 100644
index 000000000000..e69de29bb2d1
--- /dev/null
+++ b/arch/x86/include/uapi/asm/hw_breakpoint.h
diff --git a/arch/x86/include/asm/hyperv.h b/arch/x86/include/uapi/asm/hyperv.h
index b80420bcd09d..b80420bcd09d 100644
--- a/arch/x86/include/asm/hyperv.h
+++ b/arch/x86/include/uapi/asm/hyperv.h
diff --git a/arch/x86/include/asm/ioctl.h b/arch/x86/include/uapi/asm/ioctl.h
index b279fe06dfe5..b279fe06dfe5 100644
--- a/arch/x86/include/asm/ioctl.h
+++ b/arch/x86/include/uapi/asm/ioctl.h
diff --git a/arch/x86/include/asm/ioctls.h b/arch/x86/include/uapi/asm/ioctls.h
index ec34c760665e..ec34c760665e 100644
--- a/arch/x86/include/asm/ioctls.h
+++ b/arch/x86/include/uapi/asm/ioctls.h
diff --git a/arch/x86/include/asm/ipcbuf.h b/arch/x86/include/uapi/asm/ipcbuf.h
index 84c7e51cb6d0..84c7e51cb6d0 100644
--- a/arch/x86/include/asm/ipcbuf.h
+++ b/arch/x86/include/uapi/asm/ipcbuf.h
diff --git a/arch/x86/include/uapi/asm/ist.h b/arch/x86/include/uapi/asm/ist.h
new file mode 100644
index 000000000000..bad9f5ea4070
--- /dev/null
+++ b/arch/x86/include/uapi/asm/ist.h
@@ -0,0 +1,29 @@
1/*
2 * Include file for the interface to IST BIOS
3 * Copyright 2002 Andy Grover <andrew.grover@intel.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
8 * later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 */
15#ifndef _UAPI_ASM_X86_IST_H
16#define _UAPI_ASM_X86_IST_H
17
18
19
20#include <linux/types.h>
21
22struct ist_info {
23 __u32 signature;
24 __u32 command;
25 __u32 event;
26 __u32 perf_level;
27};
28
29#endif /* _UAPI_ASM_X86_IST_H */
diff --git a/arch/x86/include/asm/kvm.h b/arch/x86/include/uapi/asm/kvm.h
index a65ec29e6ffb..a65ec29e6ffb 100644
--- a/arch/x86/include/asm/kvm.h
+++ b/arch/x86/include/uapi/asm/kvm.h
diff --git a/arch/x86/include/uapi/asm/kvm_para.h b/arch/x86/include/uapi/asm/kvm_para.h
new file mode 100644
index 000000000000..06fdbd987e97
--- /dev/null
+++ b/arch/x86/include/uapi/asm/kvm_para.h
@@ -0,0 +1,100 @@
1#ifndef _UAPI_ASM_X86_KVM_PARA_H
2#define _UAPI_ASM_X86_KVM_PARA_H
3
4#include <linux/types.h>
5#include <asm/hyperv.h>
6
7/* This CPUID returns the signature 'KVMKVMKVM' in ebx, ecx, and edx. It
8 * should be used to determine that a VM is running under KVM.
9 */
10#define KVM_CPUID_SIGNATURE 0x40000000
11
12/* This CPUID returns a feature bitmap in eax. Before enabling a particular
13 * paravirtualization, the appropriate feature bit should be checked.
14 */
15#define KVM_CPUID_FEATURES 0x40000001
16#define KVM_FEATURE_CLOCKSOURCE 0
17#define KVM_FEATURE_NOP_IO_DELAY 1
18#define KVM_FEATURE_MMU_OP 2
19/* This indicates that the new set of kvmclock msrs
20 * are available. The use of 0x11 and 0x12 is deprecated
21 */
22#define KVM_FEATURE_CLOCKSOURCE2 3
23#define KVM_FEATURE_ASYNC_PF 4
24#define KVM_FEATURE_STEAL_TIME 5
25#define KVM_FEATURE_PV_EOI 6
26
27/* The last 8 bits are used to indicate how to interpret the flags field
28 * in pvclock structure. If no bits are set, all flags are ignored.
29 */
30#define KVM_FEATURE_CLOCKSOURCE_STABLE_BIT 24
31
32#define MSR_KVM_WALL_CLOCK 0x11
33#define MSR_KVM_SYSTEM_TIME 0x12
34
35#define KVM_MSR_ENABLED 1
36/* Custom MSRs falls in the range 0x4b564d00-0x4b564dff */
37#define MSR_KVM_WALL_CLOCK_NEW 0x4b564d00
38#define MSR_KVM_SYSTEM_TIME_NEW 0x4b564d01
39#define MSR_KVM_ASYNC_PF_EN 0x4b564d02
40#define MSR_KVM_STEAL_TIME 0x4b564d03
41#define MSR_KVM_PV_EOI_EN 0x4b564d04
42
43struct kvm_steal_time {
44 __u64 steal;
45 __u32 version;
46 __u32 flags;
47 __u32 pad[12];
48};
49
50#define KVM_STEAL_ALIGNMENT_BITS 5
51#define KVM_STEAL_VALID_BITS ((-1ULL << (KVM_STEAL_ALIGNMENT_BITS + 1)))
52#define KVM_STEAL_RESERVED_MASK (((1 << KVM_STEAL_ALIGNMENT_BITS) - 1 ) << 1)
53
54#define KVM_MAX_MMU_OP_BATCH 32
55
56#define KVM_ASYNC_PF_ENABLED (1 << 0)
57#define KVM_ASYNC_PF_SEND_ALWAYS (1 << 1)
58
59/* Operations for KVM_HC_MMU_OP */
60#define KVM_MMU_OP_WRITE_PTE 1
61#define KVM_MMU_OP_FLUSH_TLB 2
62#define KVM_MMU_OP_RELEASE_PT 3
63
64/* Payload for KVM_HC_MMU_OP */
65struct kvm_mmu_op_header {
66 __u32 op;
67 __u32 pad;
68};
69
70struct kvm_mmu_op_write_pte {
71 struct kvm_mmu_op_header header;
72 __u64 pte_phys;
73 __u64 pte_val;
74};
75
76struct kvm_mmu_op_flush_tlb {
77 struct kvm_mmu_op_header header;
78};
79
80struct kvm_mmu_op_release_pt {
81 struct kvm_mmu_op_header header;
82 __u64 pt_phys;
83};
84
85#define KVM_PV_REASON_PAGE_NOT_PRESENT 1
86#define KVM_PV_REASON_PAGE_READY 2
87
88struct kvm_vcpu_pv_apf_data {
89 __u32 reason;
90 __u8 pad[60];
91 __u32 enabled;
92};
93
94#define KVM_PV_EOI_BIT 0
95#define KVM_PV_EOI_MASK (0x1 << KVM_PV_EOI_BIT)
96#define KVM_PV_EOI_ENABLED KVM_PV_EOI_MASK
97#define KVM_PV_EOI_DISABLED 0x0
98
99
100#endif /* _UAPI_ASM_X86_KVM_PARA_H */
diff --git a/arch/x86/include/asm/ldt.h b/arch/x86/include/uapi/asm/ldt.h
index 46727eb37bfe..46727eb37bfe 100644
--- a/arch/x86/include/asm/ldt.h
+++ b/arch/x86/include/uapi/asm/ldt.h
diff --git a/arch/x86/include/uapi/asm/mce.h b/arch/x86/include/uapi/asm/mce.h
new file mode 100644
index 000000000000..58c829871c31
--- /dev/null
+++ b/arch/x86/include/uapi/asm/mce.h
@@ -0,0 +1,121 @@
1#ifndef _UAPI_ASM_X86_MCE_H
2#define _UAPI_ASM_X86_MCE_H
3
4#include <linux/types.h>
5#include <asm/ioctls.h>
6
7/*
8 * Machine Check support for x86
9 */
10
11/* MCG_CAP register defines */
12#define MCG_BANKCNT_MASK 0xff /* Number of Banks */
13#define MCG_CTL_P (1ULL<<8) /* MCG_CTL register available */
14#define MCG_EXT_P (1ULL<<9) /* Extended registers available */
15#define MCG_CMCI_P (1ULL<<10) /* CMCI supported */
16#define MCG_EXT_CNT_MASK 0xff0000 /* Number of Extended registers */
17#define MCG_EXT_CNT_SHIFT 16
18#define MCG_EXT_CNT(c) (((c) & MCG_EXT_CNT_MASK) >> MCG_EXT_CNT_SHIFT)
19#define MCG_SER_P (1ULL<<24) /* MCA recovery/new status bits */
20
21/* MCG_STATUS register defines */
22#define MCG_STATUS_RIPV (1ULL<<0) /* restart ip valid */
23#define MCG_STATUS_EIPV (1ULL<<1) /* ip points to correct instruction */
24#define MCG_STATUS_MCIP (1ULL<<2) /* machine check in progress */
25
26/* MCi_STATUS register defines */
27#define MCI_STATUS_VAL (1ULL<<63) /* valid error */
28#define MCI_STATUS_OVER (1ULL<<62) /* previous errors lost */
29#define MCI_STATUS_UC (1ULL<<61) /* uncorrected error */
30#define MCI_STATUS_EN (1ULL<<60) /* error enabled */
31#define MCI_STATUS_MISCV (1ULL<<59) /* misc error reg. valid */
32#define MCI_STATUS_ADDRV (1ULL<<58) /* addr reg. valid */
33#define MCI_STATUS_PCC (1ULL<<57) /* processor context corrupt */
34#define MCI_STATUS_S (1ULL<<56) /* Signaled machine check */
35#define MCI_STATUS_AR (1ULL<<55) /* Action required */
36#define MCACOD 0xffff /* MCA Error Code */
37
38/* Architecturally defined codes from SDM Vol. 3B Chapter 15 */
39#define MCACOD_SCRUB 0x00C0 /* 0xC0-0xCF Memory Scrubbing */
40#define MCACOD_SCRUBMSK 0xfff0
41#define MCACOD_L3WB 0x017A /* L3 Explicit Writeback */
42#define MCACOD_DATA 0x0134 /* Data Load */
43#define MCACOD_INSTR 0x0150 /* Instruction Fetch */
44
45/* MCi_MISC register defines */
46#define MCI_MISC_ADDR_LSB(m) ((m) & 0x3f)
47#define MCI_MISC_ADDR_MODE(m) (((m) >> 6) & 7)
48#define MCI_MISC_ADDR_SEGOFF 0 /* segment offset */
49#define MCI_MISC_ADDR_LINEAR 1 /* linear address */
50#define MCI_MISC_ADDR_PHYS 2 /* physical address */
51#define MCI_MISC_ADDR_MEM 3 /* memory address */
52#define MCI_MISC_ADDR_GENERIC 7 /* generic */
53
54/* CTL2 register defines */
55#define MCI_CTL2_CMCI_EN (1ULL << 30)
56#define MCI_CTL2_CMCI_THRESHOLD_MASK 0x7fffULL
57
58#define MCJ_CTX_MASK 3
59#define MCJ_CTX(flags) ((flags) & MCJ_CTX_MASK)
60#define MCJ_CTX_RANDOM 0 /* inject context: random */
61#define MCJ_CTX_PROCESS 0x1 /* inject context: process */
62#define MCJ_CTX_IRQ 0x2 /* inject context: IRQ */
63#define MCJ_NMI_BROADCAST 0x4 /* do NMI broadcasting */
64#define MCJ_EXCEPTION 0x8 /* raise as exception */
65#define MCJ_IRQ_BRAODCAST 0x10 /* do IRQ broadcasting */
66
67/* Fields are zero when not available */
68struct mce {
69 __u64 status;
70 __u64 misc;
71 __u64 addr;
72 __u64 mcgstatus;
73 __u64 ip;
74 __u64 tsc; /* cpu time stamp counter */
75 __u64 time; /* wall time_t when error was detected */
76 __u8 cpuvendor; /* cpu vendor as encoded in system.h */
77 __u8 inject_flags; /* software inject flags */
78 __u16 pad;
79 __u32 cpuid; /* CPUID 1 EAX */
80 __u8 cs; /* code segment */
81 __u8 bank; /* machine check bank */
82 __u8 cpu; /* cpu number; obsolete; use extcpu now */
83 __u8 finished; /* entry is valid */
84 __u32 extcpu; /* linux cpu number that detected the error */
85 __u32 socketid; /* CPU socket ID */
86 __u32 apicid; /* CPU initial apic ID */
87 __u64 mcgcap; /* MCGCAP MSR: machine check capabilities of CPU */
88};
89
90/*
91 * This structure contains all data related to the MCE log. Also
92 * carries a signature to make it easier to find from external
93 * debugging tools. Each entry is only valid when its finished flag
94 * is set.
95 */
96
97#define MCE_LOG_LEN 32
98
99struct mce_log {
100 char signature[12]; /* "MACHINECHECK" */
101 unsigned len; /* = MCE_LOG_LEN */
102 unsigned next;
103 unsigned flags;
104 unsigned recordlen; /* length of struct mce */
105 struct mce entry[MCE_LOG_LEN];
106};
107
108#define MCE_OVERFLOW 0 /* bit 0 in flags means overflow */
109
110#define MCE_LOG_SIGNATURE "MACHINECHECK"
111
112#define MCE_GET_RECORD_LEN _IOR('M', 1, int)
113#define MCE_GET_LOG_LEN _IOR('M', 2, int)
114#define MCE_GETCLEAR_FLAGS _IOR('M', 3, int)
115
116/* Software defined banks */
117#define MCE_EXTENDED_BANK 128
118#define MCE_THERMAL_BANK MCE_EXTENDED_BANK + 0
119#define K8_MCE_THRESHOLD_BASE (MCE_EXTENDED_BANK + 1)
120
121#endif /* _UAPI_ASM_X86_MCE_H */
diff --git a/arch/x86/include/asm/mman.h b/arch/x86/include/uapi/asm/mman.h
index 513b05f15bb4..513b05f15bb4 100644
--- a/arch/x86/include/asm/mman.h
+++ b/arch/x86/include/uapi/asm/mman.h
diff --git a/arch/x86/include/asm/msgbuf.h b/arch/x86/include/uapi/asm/msgbuf.h
index 809134c644a6..809134c644a6 100644
--- a/arch/x86/include/asm/msgbuf.h
+++ b/arch/x86/include/uapi/asm/msgbuf.h
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/uapi/asm/msr-index.h
index 6e930b218724..6e930b218724 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/uapi/asm/msr-index.h
diff --git a/arch/x86/include/uapi/asm/msr.h b/arch/x86/include/uapi/asm/msr.h
new file mode 100644
index 000000000000..155e51048fa4
--- /dev/null
+++ b/arch/x86/include/uapi/asm/msr.h
@@ -0,0 +1,15 @@
1#ifndef _UAPI_ASM_X86_MSR_H
2#define _UAPI_ASM_X86_MSR_H
3
4#include <asm/msr-index.h>
5
6#ifndef __ASSEMBLY__
7
8#include <linux/types.h>
9#include <linux/ioctl.h>
10
11#define X86_IOC_RDMSR_REGS _IOWR('c', 0xA0, __u32[8])
12#define X86_IOC_WRMSR_REGS _IOWR('c', 0xA1, __u32[8])
13
14#endif /* __ASSEMBLY__ */
15#endif /* _UAPI_ASM_X86_MSR_H */
diff --git a/arch/x86/include/uapi/asm/mtrr.h b/arch/x86/include/uapi/asm/mtrr.h
new file mode 100644
index 000000000000..d0acb658c8f4
--- /dev/null
+++ b/arch/x86/include/uapi/asm/mtrr.h
@@ -0,0 +1,117 @@
1/* Generic MTRR (Memory Type Range Register) ioctls.
2
3 Copyright (C) 1997-1999 Richard Gooch
4
5 This library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Library General Public
7 License as published by the Free Software Foundation; either
8 version 2 of the License, or (at your option) any later version.
9
10 This library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Library General Public License for more details.
14
15 You should have received a copy of the GNU Library General Public
16 License along with this library; if not, write to the Free
17 Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18
19 Richard Gooch may be reached by email at rgooch@atnf.csiro.au
20 The postal address is:
21 Richard Gooch, c/o ATNF, P. O. Box 76, Epping, N.S.W., 2121, Australia.
22*/
23#ifndef _UAPI_ASM_X86_MTRR_H
24#define _UAPI_ASM_X86_MTRR_H
25
26#include <linux/types.h>
27#include <linux/ioctl.h>
28#include <linux/errno.h>
29
30#define MTRR_IOCTL_BASE 'M'
31
32/* Warning: this structure has a different order from i386
33 on x86-64. The 32bit emulation code takes care of that.
34 But you need to use this for 64bit, otherwise your X server
35 will break. */
36
37#ifdef __i386__
38struct mtrr_sentry {
39 unsigned long base; /* Base address */
40 unsigned int size; /* Size of region */
41 unsigned int type; /* Type of region */
42};
43
44struct mtrr_gentry {
45 unsigned int regnum; /* Register number */
46 unsigned long base; /* Base address */
47 unsigned int size; /* Size of region */
48 unsigned int type; /* Type of region */
49};
50
51#else /* __i386__ */
52
53struct mtrr_sentry {
54 __u64 base; /* Base address */
55 __u32 size; /* Size of region */
56 __u32 type; /* Type of region */
57};
58
59struct mtrr_gentry {
60 __u64 base; /* Base address */
61 __u32 size; /* Size of region */
62 __u32 regnum; /* Register number */
63 __u32 type; /* Type of region */
64 __u32 _pad; /* Unused */
65};
66
67#endif /* !__i386__ */
68
69struct mtrr_var_range {
70 __u32 base_lo;
71 __u32 base_hi;
72 __u32 mask_lo;
73 __u32 mask_hi;
74};
75
76/* In the Intel processor's MTRR interface, the MTRR type is always held in
77 an 8 bit field: */
78typedef __u8 mtrr_type;
79
80#define MTRR_NUM_FIXED_RANGES 88
81#define MTRR_MAX_VAR_RANGES 256
82
83struct mtrr_state_type {
84 struct mtrr_var_range var_ranges[MTRR_MAX_VAR_RANGES];
85 mtrr_type fixed_ranges[MTRR_NUM_FIXED_RANGES];
86 unsigned char enabled;
87 unsigned char have_fixed;
88 mtrr_type def_type;
89};
90
91#define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))
92#define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1)
93
94/* These are the various ioctls */
95#define MTRRIOC_ADD_ENTRY _IOW(MTRR_IOCTL_BASE, 0, struct mtrr_sentry)
96#define MTRRIOC_SET_ENTRY _IOW(MTRR_IOCTL_BASE, 1, struct mtrr_sentry)
97#define MTRRIOC_DEL_ENTRY _IOW(MTRR_IOCTL_BASE, 2, struct mtrr_sentry)
98#define MTRRIOC_GET_ENTRY _IOWR(MTRR_IOCTL_BASE, 3, struct mtrr_gentry)
99#define MTRRIOC_KILL_ENTRY _IOW(MTRR_IOCTL_BASE, 4, struct mtrr_sentry)
100#define MTRRIOC_ADD_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 5, struct mtrr_sentry)
101#define MTRRIOC_SET_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 6, struct mtrr_sentry)
102#define MTRRIOC_DEL_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 7, struct mtrr_sentry)
103#define MTRRIOC_GET_PAGE_ENTRY _IOWR(MTRR_IOCTL_BASE, 8, struct mtrr_gentry)
104#define MTRRIOC_KILL_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 9, struct mtrr_sentry)
105
106/* These are the region types */
107#define MTRR_TYPE_UNCACHABLE 0
108#define MTRR_TYPE_WRCOMB 1
109/*#define MTRR_TYPE_ 2*/
110/*#define MTRR_TYPE_ 3*/
111#define MTRR_TYPE_WRTHROUGH 4
112#define MTRR_TYPE_WRPROT 5
113#define MTRR_TYPE_WRBACK 6
114#define MTRR_NUM_TYPES 7
115
116
117#endif /* _UAPI_ASM_X86_MTRR_H */
diff --git a/arch/x86/include/asm/param.h b/arch/x86/include/uapi/asm/param.h
index 965d45427975..965d45427975 100644
--- a/arch/x86/include/asm/param.h
+++ b/arch/x86/include/uapi/asm/param.h
diff --git a/arch/x86/include/asm/perf_regs.h b/arch/x86/include/uapi/asm/perf_regs.h
index 3f2207bfd17b..3f2207bfd17b 100644
--- a/arch/x86/include/asm/perf_regs.h
+++ b/arch/x86/include/uapi/asm/perf_regs.h
diff --git a/arch/x86/include/asm/poll.h b/arch/x86/include/uapi/asm/poll.h
index c98509d3149e..c98509d3149e 100644
--- a/arch/x86/include/asm/poll.h
+++ b/arch/x86/include/uapi/asm/poll.h
diff --git a/arch/x86/include/uapi/asm/posix_types.h b/arch/x86/include/uapi/asm/posix_types.h
new file mode 100644
index 000000000000..85506b383627
--- /dev/null
+++ b/arch/x86/include/uapi/asm/posix_types.h
@@ -0,0 +1,9 @@
1#ifndef __KERNEL__
2# ifdef __i386__
3# include <asm/posix_types_32.h>
4# elif defined(__ILP32__)
5# include <asm/posix_types_x32.h>
6# else
7# include <asm/posix_types_64.h>
8# endif
9#endif
diff --git a/arch/x86/include/asm/posix_types_32.h b/arch/x86/include/uapi/asm/posix_types_32.h
index 8e525059e7d8..8e525059e7d8 100644
--- a/arch/x86/include/asm/posix_types_32.h
+++ b/arch/x86/include/uapi/asm/posix_types_32.h
diff --git a/arch/x86/include/asm/posix_types_64.h b/arch/x86/include/uapi/asm/posix_types_64.h
index cba0c1ead162..cba0c1ead162 100644
--- a/arch/x86/include/asm/posix_types_64.h
+++ b/arch/x86/include/uapi/asm/posix_types_64.h
diff --git a/arch/x86/include/asm/posix_types_x32.h b/arch/x86/include/uapi/asm/posix_types_x32.h
index 85f9bdafa93c..85f9bdafa93c 100644
--- a/arch/x86/include/asm/posix_types_x32.h
+++ b/arch/x86/include/uapi/asm/posix_types_x32.h
diff --git a/arch/x86/include/asm/prctl.h b/arch/x86/include/uapi/asm/prctl.h
index 3ac5032fae09..3ac5032fae09 100644
--- a/arch/x86/include/asm/prctl.h
+++ b/arch/x86/include/uapi/asm/prctl.h
diff --git a/arch/x86/include/uapi/asm/processor-flags.h b/arch/x86/include/uapi/asm/processor-flags.h
new file mode 100644
index 000000000000..54991a746043
--- /dev/null
+++ b/arch/x86/include/uapi/asm/processor-flags.h
@@ -0,0 +1,99 @@
1#ifndef _UAPI_ASM_X86_PROCESSOR_FLAGS_H
2#define _UAPI_ASM_X86_PROCESSOR_FLAGS_H
3/* Various flags defined: can be included from assembler. */
4
5/*
6 * EFLAGS bits
7 */
8#define X86_EFLAGS_CF 0x00000001 /* Carry Flag */
9#define X86_EFLAGS_BIT1 0x00000002 /* Bit 1 - always on */
10#define X86_EFLAGS_PF 0x00000004 /* Parity Flag */
11#define X86_EFLAGS_AF 0x00000010 /* Auxiliary carry Flag */
12#define X86_EFLAGS_ZF 0x00000040 /* Zero Flag */
13#define X86_EFLAGS_SF 0x00000080 /* Sign Flag */
14#define X86_EFLAGS_TF 0x00000100 /* Trap Flag */
15#define X86_EFLAGS_IF 0x00000200 /* Interrupt Flag */
16#define X86_EFLAGS_DF 0x00000400 /* Direction Flag */
17#define X86_EFLAGS_OF 0x00000800 /* Overflow Flag */
18#define X86_EFLAGS_IOPL 0x00003000 /* IOPL mask */
19#define X86_EFLAGS_NT 0x00004000 /* Nested Task */
20#define X86_EFLAGS_RF 0x00010000 /* Resume Flag */
21#define X86_EFLAGS_VM 0x00020000 /* Virtual Mode */
22#define X86_EFLAGS_AC 0x00040000 /* Alignment Check */
23#define X86_EFLAGS_VIF 0x00080000 /* Virtual Interrupt Flag */
24#define X86_EFLAGS_VIP 0x00100000 /* Virtual Interrupt Pending */
25#define X86_EFLAGS_ID 0x00200000 /* CPUID detection flag */
26
27/*
28 * Basic CPU control in CR0
29 */
30#define X86_CR0_PE 0x00000001 /* Protection Enable */
31#define X86_CR0_MP 0x00000002 /* Monitor Coprocessor */
32#define X86_CR0_EM 0x00000004 /* Emulation */
33#define X86_CR0_TS 0x00000008 /* Task Switched */
34#define X86_CR0_ET 0x00000010 /* Extension Type */
35#define X86_CR0_NE 0x00000020 /* Numeric Error */
36#define X86_CR0_WP 0x00010000 /* Write Protect */
37#define X86_CR0_AM 0x00040000 /* Alignment Mask */
38#define X86_CR0_NW 0x20000000 /* Not Write-through */
39#define X86_CR0_CD 0x40000000 /* Cache Disable */
40#define X86_CR0_PG 0x80000000 /* Paging */
41
42/*
43 * Paging options in CR3
44 */
45#define X86_CR3_PWT 0x00000008 /* Page Write Through */
46#define X86_CR3_PCD 0x00000010 /* Page Cache Disable */
47#define X86_CR3_PCID_MASK 0x00000fff /* PCID Mask */
48
49/*
50 * Intel CPU features in CR4
51 */
52#define X86_CR4_VME 0x00000001 /* enable vm86 extensions */
53#define X86_CR4_PVI 0x00000002 /* virtual interrupts flag enable */
54#define X86_CR4_TSD 0x00000004 /* disable time stamp at ipl 3 */
55#define X86_CR4_DE 0x00000008 /* enable debugging extensions */
56#define X86_CR4_PSE 0x00000010 /* enable page size extensions */
57#define X86_CR4_PAE 0x00000020 /* enable physical address extensions */
58#define X86_CR4_MCE 0x00000040 /* Machine check enable */
59#define X86_CR4_PGE 0x00000080 /* enable global pages */
60#define X86_CR4_PCE 0x00000100 /* enable performance counters at ipl 3 */
61#define X86_CR4_OSFXSR 0x00000200 /* enable fast FPU save and restore */
62#define X86_CR4_OSXMMEXCPT 0x00000400 /* enable unmasked SSE exceptions */
63#define X86_CR4_VMXE 0x00002000 /* enable VMX virtualization */
64#define X86_CR4_RDWRGSFS 0x00010000 /* enable RDWRGSFS support */
65#define X86_CR4_PCIDE 0x00020000 /* enable PCID support */
66#define X86_CR4_OSXSAVE 0x00040000 /* enable xsave and xrestore */
67#define X86_CR4_SMEP 0x00100000 /* enable SMEP support */
68#define X86_CR4_SMAP 0x00200000 /* enable SMAP support */
69
70/*
71 * x86-64 Task Priority Register, CR8
72 */
73#define X86_CR8_TPR 0x0000000F /* task priority register */
74
75/*
76 * AMD and Transmeta use MSRs for configuration; see <asm/msr-index.h>
77 */
78
79/*
80 * NSC/Cyrix CPU configuration register indexes
81 */
82#define CX86_PCR0 0x20
83#define CX86_GCR 0xb8
84#define CX86_CCR0 0xc0
85#define CX86_CCR1 0xc1
86#define CX86_CCR2 0xc2
87#define CX86_CCR3 0xc3
88#define CX86_CCR4 0xe8
89#define CX86_CCR5 0xe9
90#define CX86_CCR6 0xea
91#define CX86_CCR7 0xeb
92#define CX86_PCR1 0xf0
93#define CX86_DIR0 0xfe
94#define CX86_DIR1 0xff
95#define CX86_ARR_BASE 0xc4
96#define CX86_RCR_BASE 0xdc
97
98
99#endif /* _UAPI_ASM_X86_PROCESSOR_FLAGS_H */
diff --git a/arch/x86/include/asm/ptrace-abi.h b/arch/x86/include/uapi/asm/ptrace-abi.h
index 7b0a55a88851..7b0a55a88851 100644
--- a/arch/x86/include/asm/ptrace-abi.h
+++ b/arch/x86/include/uapi/asm/ptrace-abi.h
diff --git a/arch/x86/include/uapi/asm/ptrace.h b/arch/x86/include/uapi/asm/ptrace.h
new file mode 100644
index 000000000000..ac4b9aa4d999
--- /dev/null
+++ b/arch/x86/include/uapi/asm/ptrace.h
@@ -0,0 +1,78 @@
1#ifndef _UAPI_ASM_X86_PTRACE_H
2#define _UAPI_ASM_X86_PTRACE_H
3
4#include <linux/compiler.h> /* For __user */
5#include <asm/ptrace-abi.h>
6#include <asm/processor-flags.h>
7
8
9#ifndef __ASSEMBLY__
10
11#ifdef __i386__
12/* this struct defines the way the registers are stored on the
13 stack during a system call. */
14
15#ifndef __KERNEL__
16
17struct pt_regs {
18 long ebx;
19 long ecx;
20 long edx;
21 long esi;
22 long edi;
23 long ebp;
24 long eax;
25 int xds;
26 int xes;
27 int xfs;
28 int xgs;
29 long orig_eax;
30 long eip;
31 int xcs;
32 long eflags;
33 long esp;
34 int xss;
35};
36
37#endif /* __KERNEL__ */
38
39#else /* __i386__ */
40
41#ifndef __KERNEL__
42
43struct pt_regs {
44 unsigned long r15;
45 unsigned long r14;
46 unsigned long r13;
47 unsigned long r12;
48 unsigned long rbp;
49 unsigned long rbx;
50/* arguments: non interrupts/non tracing syscalls only save up to here*/
51 unsigned long r11;
52 unsigned long r10;
53 unsigned long r9;
54 unsigned long r8;
55 unsigned long rax;
56 unsigned long rcx;
57 unsigned long rdx;
58 unsigned long rsi;
59 unsigned long rdi;
60 unsigned long orig_rax;
61/* end of arguments */
62/* cpu exception frame or undefined */
63 unsigned long rip;
64 unsigned long cs;
65 unsigned long eflags;
66 unsigned long rsp;
67 unsigned long ss;
68/* top of stack page */
69};
70
71#endif /* __KERNEL__ */
72#endif /* !__i386__ */
73
74
75
76#endif /* !__ASSEMBLY__ */
77
78#endif /* _UAPI_ASM_X86_PTRACE_H */
diff --git a/arch/x86/include/asm/resource.h b/arch/x86/include/uapi/asm/resource.h
index 04bc4db8921b..04bc4db8921b 100644
--- a/arch/x86/include/asm/resource.h
+++ b/arch/x86/include/uapi/asm/resource.h
diff --git a/arch/x86/include/asm/sembuf.h b/arch/x86/include/uapi/asm/sembuf.h
index ee50c801f7b7..ee50c801f7b7 100644
--- a/arch/x86/include/asm/sembuf.h
+++ b/arch/x86/include/uapi/asm/sembuf.h
diff --git a/arch/x86/include/uapi/asm/setup.h b/arch/x86/include/uapi/asm/setup.h
new file mode 100644
index 000000000000..e69de29bb2d1
--- /dev/null
+++ b/arch/x86/include/uapi/asm/setup.h
diff --git a/arch/x86/include/asm/shmbuf.h b/arch/x86/include/uapi/asm/shmbuf.h
index 83c05fc2de38..83c05fc2de38 100644
--- a/arch/x86/include/asm/shmbuf.h
+++ b/arch/x86/include/uapi/asm/shmbuf.h
diff --git a/arch/x86/include/uapi/asm/sigcontext.h b/arch/x86/include/uapi/asm/sigcontext.h
new file mode 100644
index 000000000000..d8b9f9081e86
--- /dev/null
+++ b/arch/x86/include/uapi/asm/sigcontext.h
@@ -0,0 +1,221 @@
1#ifndef _UAPI_ASM_X86_SIGCONTEXT_H
2#define _UAPI_ASM_X86_SIGCONTEXT_H
3
4#include <linux/compiler.h>
5#include <linux/types.h>
6
7#define FP_XSTATE_MAGIC1 0x46505853U
8#define FP_XSTATE_MAGIC2 0x46505845U
9#define FP_XSTATE_MAGIC2_SIZE sizeof(FP_XSTATE_MAGIC2)
10
11/*
12 * bytes 464..511 in the current 512byte layout of fxsave/fxrstor frame
13 * are reserved for SW usage. On cpu's supporting xsave/xrstor, these bytes
14 * are used to extended the fpstate pointer in the sigcontext, which now
15 * includes the extended state information along with fpstate information.
16 *
17 * Presence of FP_XSTATE_MAGIC1 at the beginning of this SW reserved
18 * area and FP_XSTATE_MAGIC2 at the end of memory layout
19 * (extended_size - FP_XSTATE_MAGIC2_SIZE) indicates the presence of the
20 * extended state information in the memory layout pointed by the fpstate
21 * pointer in sigcontext.
22 */
23struct _fpx_sw_bytes {
24 __u32 magic1; /* FP_XSTATE_MAGIC1 */
25 __u32 extended_size; /* total size of the layout referred by
26 * fpstate pointer in the sigcontext.
27 */
28 __u64 xstate_bv;
29 /* feature bit mask (including fp/sse/extended
30 * state) that is present in the memory
31 * layout.
32 */
33 __u32 xstate_size; /* actual xsave state size, based on the
34 * features saved in the layout.
35 * 'extended_size' will be greater than
36 * 'xstate_size'.
37 */
38 __u32 padding[7]; /* for future use. */
39};
40
41#ifdef __i386__
42/*
43 * As documented in the iBCS2 standard..
44 *
45 * The first part of "struct _fpstate" is just the normal i387
46 * hardware setup, the extra "status" word is used to save the
47 * coprocessor status word before entering the handler.
48 *
49 * Pentium III FXSR, SSE support
50 * Gareth Hughes <gareth@valinux.com>, May 2000
51 *
52 * The FPU state data structure has had to grow to accommodate the
53 * extended FPU state required by the Streaming SIMD Extensions.
54 * There is no documented standard to accomplish this at the moment.
55 */
56struct _fpreg {
57 unsigned short significand[4];
58 unsigned short exponent;
59};
60
61struct _fpxreg {
62 unsigned short significand[4];
63 unsigned short exponent;
64 unsigned short padding[3];
65};
66
67struct _xmmreg {
68 unsigned long element[4];
69};
70
71struct _fpstate {
72 /* Regular FPU environment */
73 unsigned long cw;
74 unsigned long sw;
75 unsigned long tag;
76 unsigned long ipoff;
77 unsigned long cssel;
78 unsigned long dataoff;
79 unsigned long datasel;
80 struct _fpreg _st[8];
81 unsigned short status;
82 unsigned short magic; /* 0xffff = regular FPU data only */
83
84 /* FXSR FPU environment */
85 unsigned long _fxsr_env[6]; /* FXSR FPU env is ignored */
86 unsigned long mxcsr;
87 unsigned long reserved;
88 struct _fpxreg _fxsr_st[8]; /* FXSR FPU reg data is ignored */
89 struct _xmmreg _xmm[8];
90 unsigned long padding1[44];
91
92 union {
93 unsigned long padding2[12];
94 struct _fpx_sw_bytes sw_reserved; /* represents the extended
95 * state info */
96 };
97};
98
99#define X86_FXSR_MAGIC 0x0000
100
101#ifndef __KERNEL__
102/*
103 * User-space might still rely on the old definition:
104 */
105struct sigcontext {
106 unsigned short gs, __gsh;
107 unsigned short fs, __fsh;
108 unsigned short es, __esh;
109 unsigned short ds, __dsh;
110 unsigned long edi;
111 unsigned long esi;
112 unsigned long ebp;
113 unsigned long esp;
114 unsigned long ebx;
115 unsigned long edx;
116 unsigned long ecx;
117 unsigned long eax;
118 unsigned long trapno;
119 unsigned long err;
120 unsigned long eip;
121 unsigned short cs, __csh;
122 unsigned long eflags;
123 unsigned long esp_at_signal;
124 unsigned short ss, __ssh;
125 struct _fpstate __user *fpstate;
126 unsigned long oldmask;
127 unsigned long cr2;
128};
129#endif /* !__KERNEL__ */
130
131#else /* __i386__ */
132
133/* FXSAVE frame */
134/* Note: reserved1/2 may someday contain valuable data. Always save/restore
135 them when you change signal frames. */
136struct _fpstate {
137 __u16 cwd;
138 __u16 swd;
139 __u16 twd; /* Note this is not the same as the
140 32bit/x87/FSAVE twd */
141 __u16 fop;
142 __u64 rip;
143 __u64 rdp;
144 __u32 mxcsr;
145 __u32 mxcsr_mask;
146 __u32 st_space[32]; /* 8*16 bytes for each FP-reg */
147 __u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg */
148 __u32 reserved2[12];
149 union {
150 __u32 reserved3[12];
151 struct _fpx_sw_bytes sw_reserved; /* represents the extended
152 * state information */
153 };
154};
155
156#ifndef __KERNEL__
157/*
158 * User-space might still rely on the old definition:
159 */
160struct sigcontext {
161 __u64 r8;
162 __u64 r9;
163 __u64 r10;
164 __u64 r11;
165 __u64 r12;
166 __u64 r13;
167 __u64 r14;
168 __u64 r15;
169 __u64 rdi;
170 __u64 rsi;
171 __u64 rbp;
172 __u64 rbx;
173 __u64 rdx;
174 __u64 rax;
175 __u64 rcx;
176 __u64 rsp;
177 __u64 rip;
178 __u64 eflags; /* RFLAGS */
179 __u16 cs;
180 __u16 gs;
181 __u16 fs;
182 __u16 __pad0;
183 __u64 err;
184 __u64 trapno;
185 __u64 oldmask;
186 __u64 cr2;
187 struct _fpstate __user *fpstate; /* zero when no FPU context */
188#ifdef __ILP32__
189 __u32 __fpstate_pad;
190#endif
191 __u64 reserved1[8];
192};
193#endif /* !__KERNEL__ */
194
195#endif /* !__i386__ */
196
197struct _xsave_hdr {
198 __u64 xstate_bv;
199 __u64 reserved1[2];
200 __u64 reserved2[5];
201};
202
203struct _ymmh_state {
204 /* 16 * 16 bytes for each YMMH-reg */
205 __u32 ymmh_space[64];
206};
207
208/*
209 * Extended state pointed by the fpstate pointer in the sigcontext.
210 * In addition to the fpstate, information encoded in the xstate_hdr
211 * indicates the presence of other extended state information
212 * supported by the processor and OS.
213 */
214struct _xstate {
215 struct _fpstate fpstate;
216 struct _xsave_hdr xstate_hdr;
217 struct _ymmh_state ymmh;
218 /* new processor state extensions go here */
219};
220
221#endif /* _UAPI_ASM_X86_SIGCONTEXT_H */
diff --git a/arch/x86/include/asm/sigcontext32.h b/arch/x86/include/uapi/asm/sigcontext32.h
index ad1478c4ae12..ad1478c4ae12 100644
--- a/arch/x86/include/asm/sigcontext32.h
+++ b/arch/x86/include/uapi/asm/sigcontext32.h
diff --git a/arch/x86/include/asm/siginfo.h b/arch/x86/include/uapi/asm/siginfo.h
index 34c47b3341c0..34c47b3341c0 100644
--- a/arch/x86/include/asm/siginfo.h
+++ b/arch/x86/include/uapi/asm/siginfo.h
diff --git a/arch/x86/include/uapi/asm/signal.h b/arch/x86/include/uapi/asm/signal.h
new file mode 100644
index 000000000000..0818f9a8e889
--- /dev/null
+++ b/arch/x86/include/uapi/asm/signal.h
@@ -0,0 +1,145 @@
1#ifndef _UAPI_ASM_X86_SIGNAL_H
2#define _UAPI_ASM_X86_SIGNAL_H
3
4#ifndef __ASSEMBLY__
5#include <linux/types.h>
6#include <linux/time.h>
7#include <linux/compiler.h>
8
9/* Avoid too many header ordering problems. */
10struct siginfo;
11
12#ifndef __KERNEL__
13/* Here we must cater to libcs that poke about in kernel headers. */
14
15#define NSIG 32
16typedef unsigned long sigset_t;
17
18#endif /* __KERNEL__ */
19#endif /* __ASSEMBLY__ */
20
21
22#define SIGHUP 1
23#define SIGINT 2
24#define SIGQUIT 3
25#define SIGILL 4
26#define SIGTRAP 5
27#define SIGABRT 6
28#define SIGIOT 6
29#define SIGBUS 7
30#define SIGFPE 8
31#define SIGKILL 9
32#define SIGUSR1 10
33#define SIGSEGV 11
34#define SIGUSR2 12
35#define SIGPIPE 13
36#define SIGALRM 14
37#define SIGTERM 15
38#define SIGSTKFLT 16
39#define SIGCHLD 17
40#define SIGCONT 18
41#define SIGSTOP 19
42#define SIGTSTP 20
43#define SIGTTIN 21
44#define SIGTTOU 22
45#define SIGURG 23
46#define SIGXCPU 24
47#define SIGXFSZ 25
48#define SIGVTALRM 26
49#define SIGPROF 27
50#define SIGWINCH 28
51#define SIGIO 29
52#define SIGPOLL SIGIO
53/*
54#define SIGLOST 29
55*/
56#define SIGPWR 30
57#define SIGSYS 31
58#define SIGUNUSED 31
59
60/* These should not be considered constants from userland. */
61#define SIGRTMIN 32
62#define SIGRTMAX _NSIG
63
64/*
65 * SA_FLAGS values:
66 *
67 * SA_ONSTACK indicates that a registered stack_t will be used.
68 * SA_RESTART flag to get restarting signals (which were the default long ago)
69 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
70 * SA_RESETHAND clears the handler when the signal is delivered.
71 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
72 * SA_NODEFER prevents the current signal from being masked in the handler.
73 *
74 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
75 * Unix names RESETHAND and NODEFER respectively.
76 */
77#define SA_NOCLDSTOP 0x00000001u
78#define SA_NOCLDWAIT 0x00000002u
79#define SA_SIGINFO 0x00000004u
80#define SA_ONSTACK 0x08000000u
81#define SA_RESTART 0x10000000u
82#define SA_NODEFER 0x40000000u
83#define SA_RESETHAND 0x80000000u
84
85#define SA_NOMASK SA_NODEFER
86#define SA_ONESHOT SA_RESETHAND
87
88#define SA_RESTORER 0x04000000
89
90/*
91 * sigaltstack controls
92 */
93#define SS_ONSTACK 1
94#define SS_DISABLE 2
95
96#define MINSIGSTKSZ 2048
97#define SIGSTKSZ 8192
98
99#include <asm-generic/signal-defs.h>
100
101#ifndef __ASSEMBLY__
102
103
104#ifdef __i386__
105# ifndef __KERNEL__
106/* Here we must cater to libcs that poke about in kernel headers. */
107
108struct sigaction {
109 union {
110 __sighandler_t _sa_handler;
111 void (*_sa_sigaction)(int, struct siginfo *, void *);
112 } _u;
113 sigset_t sa_mask;
114 unsigned long sa_flags;
115 void (*sa_restorer)(void);
116};
117
118#define sa_handler _u._sa_handler
119#define sa_sigaction _u._sa_sigaction
120
121# endif /* ! __KERNEL__ */
122#else /* __i386__ */
123
124struct sigaction {
125 __sighandler_t sa_handler;
126 unsigned long sa_flags;
127 __sigrestore_t sa_restorer;
128 sigset_t sa_mask; /* mask last for extensibility */
129};
130
131struct k_sigaction {
132 struct sigaction sa;
133};
134
135#endif /* !__i386__ */
136
137typedef struct sigaltstack {
138 void __user *ss_sp;
139 int ss_flags;
140 size_t ss_size;
141} stack_t;
142
143#endif /* __ASSEMBLY__ */
144
145#endif /* _UAPI_ASM_X86_SIGNAL_H */
diff --git a/arch/x86/include/asm/socket.h b/arch/x86/include/uapi/asm/socket.h
index 6b71384b9d8b..6b71384b9d8b 100644
--- a/arch/x86/include/asm/socket.h
+++ b/arch/x86/include/uapi/asm/socket.h
diff --git a/arch/x86/include/asm/sockios.h b/arch/x86/include/uapi/asm/sockios.h
index def6d4746ee7..def6d4746ee7 100644
--- a/arch/x86/include/asm/sockios.h
+++ b/arch/x86/include/uapi/asm/sockios.h
diff --git a/arch/x86/include/asm/stat.h b/arch/x86/include/uapi/asm/stat.h
index 7b3ddc348585..7b3ddc348585 100644
--- a/arch/x86/include/asm/stat.h
+++ b/arch/x86/include/uapi/asm/stat.h
diff --git a/arch/x86/include/asm/statfs.h b/arch/x86/include/uapi/asm/statfs.h
index 2d0adbf99a8e..2d0adbf99a8e 100644
--- a/arch/x86/include/asm/statfs.h
+++ b/arch/x86/include/uapi/asm/statfs.h
diff --git a/arch/x86/include/uapi/asm/svm.h b/arch/x86/include/uapi/asm/svm.h
new file mode 100644
index 000000000000..b5d7640abc5d
--- /dev/null
+++ b/arch/x86/include/uapi/asm/svm.h
@@ -0,0 +1,132 @@
1#ifndef _UAPI__SVM_H
2#define _UAPI__SVM_H
3
4#define SVM_EXIT_READ_CR0 0x000
5#define SVM_EXIT_READ_CR3 0x003
6#define SVM_EXIT_READ_CR4 0x004
7#define SVM_EXIT_READ_CR8 0x008
8#define SVM_EXIT_WRITE_CR0 0x010
9#define SVM_EXIT_WRITE_CR3 0x013
10#define SVM_EXIT_WRITE_CR4 0x014
11#define SVM_EXIT_WRITE_CR8 0x018
12#define SVM_EXIT_READ_DR0 0x020
13#define SVM_EXIT_READ_DR1 0x021
14#define SVM_EXIT_READ_DR2 0x022
15#define SVM_EXIT_READ_DR3 0x023
16#define SVM_EXIT_READ_DR4 0x024
17#define SVM_EXIT_READ_DR5 0x025
18#define SVM_EXIT_READ_DR6 0x026
19#define SVM_EXIT_READ_DR7 0x027
20#define SVM_EXIT_WRITE_DR0 0x030
21#define SVM_EXIT_WRITE_DR1 0x031
22#define SVM_EXIT_WRITE_DR2 0x032
23#define SVM_EXIT_WRITE_DR3 0x033
24#define SVM_EXIT_WRITE_DR4 0x034
25#define SVM_EXIT_WRITE_DR5 0x035
26#define SVM_EXIT_WRITE_DR6 0x036
27#define SVM_EXIT_WRITE_DR7 0x037
28#define SVM_EXIT_EXCP_BASE 0x040
29#define SVM_EXIT_INTR 0x060
30#define SVM_EXIT_NMI 0x061
31#define SVM_EXIT_SMI 0x062
32#define SVM_EXIT_INIT 0x063
33#define SVM_EXIT_VINTR 0x064
34#define SVM_EXIT_CR0_SEL_WRITE 0x065
35#define SVM_EXIT_IDTR_READ 0x066
36#define SVM_EXIT_GDTR_READ 0x067
37#define SVM_EXIT_LDTR_READ 0x068
38#define SVM_EXIT_TR_READ 0x069
39#define SVM_EXIT_IDTR_WRITE 0x06a
40#define SVM_EXIT_GDTR_WRITE 0x06b
41#define SVM_EXIT_LDTR_WRITE 0x06c
42#define SVM_EXIT_TR_WRITE 0x06d
43#define SVM_EXIT_RDTSC 0x06e
44#define SVM_EXIT_RDPMC 0x06f
45#define SVM_EXIT_PUSHF 0x070
46#define SVM_EXIT_POPF 0x071
47#define SVM_EXIT_CPUID 0x072
48#define SVM_EXIT_RSM 0x073
49#define SVM_EXIT_IRET 0x074
50#define SVM_EXIT_SWINT 0x075
51#define SVM_EXIT_INVD 0x076
52#define SVM_EXIT_PAUSE 0x077
53#define SVM_EXIT_HLT 0x078
54#define SVM_EXIT_INVLPG 0x079
55#define SVM_EXIT_INVLPGA 0x07a
56#define SVM_EXIT_IOIO 0x07b
57#define SVM_EXIT_MSR 0x07c
58#define SVM_EXIT_TASK_SWITCH 0x07d
59#define SVM_EXIT_FERR_FREEZE 0x07e
60#define SVM_EXIT_SHUTDOWN 0x07f
61#define SVM_EXIT_VMRUN 0x080
62#define SVM_EXIT_VMMCALL 0x081
63#define SVM_EXIT_VMLOAD 0x082
64#define SVM_EXIT_VMSAVE 0x083
65#define SVM_EXIT_STGI 0x084
66#define SVM_EXIT_CLGI 0x085
67#define SVM_EXIT_SKINIT 0x086
68#define SVM_EXIT_RDTSCP 0x087
69#define SVM_EXIT_ICEBP 0x088
70#define SVM_EXIT_WBINVD 0x089
71#define SVM_EXIT_MONITOR 0x08a
72#define SVM_EXIT_MWAIT 0x08b
73#define SVM_EXIT_MWAIT_COND 0x08c
74#define SVM_EXIT_XSETBV 0x08d
75#define SVM_EXIT_NPF 0x400
76
77#define SVM_EXIT_ERR -1
78
79#define SVM_EXIT_REASONS \
80 { SVM_EXIT_READ_CR0, "read_cr0" }, \
81 { SVM_EXIT_READ_CR3, "read_cr3" }, \
82 { SVM_EXIT_READ_CR4, "read_cr4" }, \
83 { SVM_EXIT_READ_CR8, "read_cr8" }, \
84 { SVM_EXIT_WRITE_CR0, "write_cr0" }, \
85 { SVM_EXIT_WRITE_CR3, "write_cr3" }, \
86 { SVM_EXIT_WRITE_CR4, "write_cr4" }, \
87 { SVM_EXIT_WRITE_CR8, "write_cr8" }, \
88 { SVM_EXIT_READ_DR0, "read_dr0" }, \
89 { SVM_EXIT_READ_DR1, "read_dr1" }, \
90 { SVM_EXIT_READ_DR2, "read_dr2" }, \
91 { SVM_EXIT_READ_DR3, "read_dr3" }, \
92 { SVM_EXIT_WRITE_DR0, "write_dr0" }, \
93 { SVM_EXIT_WRITE_DR1, "write_dr1" }, \
94 { SVM_EXIT_WRITE_DR2, "write_dr2" }, \
95 { SVM_EXIT_WRITE_DR3, "write_dr3" }, \
96 { SVM_EXIT_WRITE_DR5, "write_dr5" }, \
97 { SVM_EXIT_WRITE_DR7, "write_dr7" }, \
98 { SVM_EXIT_EXCP_BASE + DB_VECTOR, "DB excp" }, \
99 { SVM_EXIT_EXCP_BASE + BP_VECTOR, "BP excp" }, \
100 { SVM_EXIT_EXCP_BASE + UD_VECTOR, "UD excp" }, \
101 { SVM_EXIT_EXCP_BASE + PF_VECTOR, "PF excp" }, \
102 { SVM_EXIT_EXCP_BASE + NM_VECTOR, "NM excp" }, \
103 { SVM_EXIT_EXCP_BASE + MC_VECTOR, "MC excp" }, \
104 { SVM_EXIT_INTR, "interrupt" }, \
105 { SVM_EXIT_NMI, "nmi" }, \
106 { SVM_EXIT_SMI, "smi" }, \
107 { SVM_EXIT_INIT, "init" }, \
108 { SVM_EXIT_VINTR, "vintr" }, \
109 { SVM_EXIT_CPUID, "cpuid" }, \
110 { SVM_EXIT_INVD, "invd" }, \
111 { SVM_EXIT_HLT, "hlt" }, \
112 { SVM_EXIT_INVLPG, "invlpg" }, \
113 { SVM_EXIT_INVLPGA, "invlpga" }, \
114 { SVM_EXIT_IOIO, "io" }, \
115 { SVM_EXIT_MSR, "msr" }, \
116 { SVM_EXIT_TASK_SWITCH, "task_switch" }, \
117 { SVM_EXIT_SHUTDOWN, "shutdown" }, \
118 { SVM_EXIT_VMRUN, "vmrun" }, \
119 { SVM_EXIT_VMMCALL, "hypercall" }, \
120 { SVM_EXIT_VMLOAD, "vmload" }, \
121 { SVM_EXIT_VMSAVE, "vmsave" }, \
122 { SVM_EXIT_STGI, "stgi" }, \
123 { SVM_EXIT_CLGI, "clgi" }, \
124 { SVM_EXIT_SKINIT, "skinit" }, \
125 { SVM_EXIT_WBINVD, "wbinvd" }, \
126 { SVM_EXIT_MONITOR, "monitor" }, \
127 { SVM_EXIT_MWAIT, "mwait" }, \
128 { SVM_EXIT_XSETBV, "xsetbv" }, \
129 { SVM_EXIT_NPF, "npf" }
130
131
132#endif /* _UAPI__SVM_H */
diff --git a/arch/x86/include/asm/swab.h b/arch/x86/include/uapi/asm/swab.h
index 7f235c7105c1..7f235c7105c1 100644
--- a/arch/x86/include/asm/swab.h
+++ b/arch/x86/include/uapi/asm/swab.h
diff --git a/arch/x86/include/asm/termbits.h b/arch/x86/include/uapi/asm/termbits.h
index 3935b106de79..3935b106de79 100644
--- a/arch/x86/include/asm/termbits.h
+++ b/arch/x86/include/uapi/asm/termbits.h
diff --git a/arch/x86/include/asm/termios.h b/arch/x86/include/uapi/asm/termios.h
index 280d78a9d966..280d78a9d966 100644
--- a/arch/x86/include/asm/termios.h
+++ b/arch/x86/include/uapi/asm/termios.h
diff --git a/arch/x86/include/asm/types.h b/arch/x86/include/uapi/asm/types.h
index 8e8c23fef08c..8e8c23fef08c 100644
--- a/arch/x86/include/asm/types.h
+++ b/arch/x86/include/uapi/asm/types.h
diff --git a/arch/x86/include/asm/ucontext.h b/arch/x86/include/uapi/asm/ucontext.h
index b7c29c8017f2..b7c29c8017f2 100644
--- a/arch/x86/include/asm/ucontext.h
+++ b/arch/x86/include/uapi/asm/ucontext.h
diff --git a/arch/x86/include/uapi/asm/unistd.h b/arch/x86/include/uapi/asm/unistd.h
new file mode 100644
index 000000000000..a26df0d75cd0
--- /dev/null
+++ b/arch/x86/include/uapi/asm/unistd.h
@@ -0,0 +1,17 @@
1#ifndef _UAPI_ASM_X86_UNISTD_H
2#define _UAPI_ASM_X86_UNISTD_H
3
4/* x32 syscall flag bit */
5#define __X32_SYSCALL_BIT 0x40000000
6
7#ifndef __KERNEL__
8# ifdef __i386__
9# include <asm/unistd_32.h>
10# elif defined(__ILP32__)
11# include <asm/unistd_x32.h>
12# else
13# include <asm/unistd_64.h>
14# endif
15#endif
16
17#endif /* _UAPI_ASM_X86_UNISTD_H */
diff --git a/arch/x86/include/uapi/asm/vm86.h b/arch/x86/include/uapi/asm/vm86.h
new file mode 100644
index 000000000000..e0b243e9d859
--- /dev/null
+++ b/arch/x86/include/uapi/asm/vm86.h
@@ -0,0 +1,129 @@
1#ifndef _UAPI_ASM_X86_VM86_H
2#define _UAPI_ASM_X86_VM86_H
3
4/*
5 * I'm guessing at the VIF/VIP flag usage, but hope that this is how
6 * the Pentium uses them. Linux will return from vm86 mode when both
7 * VIF and VIP is set.
8 *
9 * On a Pentium, we could probably optimize the virtual flags directly
10 * in the eflags register instead of doing it "by hand" in vflags...
11 *
12 * Linus
13 */
14
15#include <asm/processor-flags.h>
16
17#define BIOSSEG 0x0f000
18
19#define CPU_086 0
20#define CPU_186 1
21#define CPU_286 2
22#define CPU_386 3
23#define CPU_486 4
24#define CPU_586 5
25
26/*
27 * Return values for the 'vm86()' system call
28 */
29#define VM86_TYPE(retval) ((retval) & 0xff)
30#define VM86_ARG(retval) ((retval) >> 8)
31
32#define VM86_SIGNAL 0 /* return due to signal */
33#define VM86_UNKNOWN 1 /* unhandled GP fault
34 - IO-instruction or similar */
35#define VM86_INTx 2 /* int3/int x instruction (ARG = x) */
36#define VM86_STI 3 /* sti/popf/iret instruction enabled
37 virtual interrupts */
38
39/*
40 * Additional return values when invoking new vm86()
41 */
42#define VM86_PICRETURN 4 /* return due to pending PIC request */
43#define VM86_TRAP 6 /* return due to DOS-debugger request */
44
45/*
46 * function codes when invoking new vm86()
47 */
48#define VM86_PLUS_INSTALL_CHECK 0
49#define VM86_ENTER 1
50#define VM86_ENTER_NO_BYPASS 2
51#define VM86_REQUEST_IRQ 3
52#define VM86_FREE_IRQ 4
53#define VM86_GET_IRQ_BITS 5
54#define VM86_GET_AND_RESET_IRQ 6
55
56/*
57 * This is the stack-layout seen by the user space program when we have
58 * done a translation of "SAVE_ALL" from vm86 mode. The real kernel layout
59 * is 'kernel_vm86_regs' (see below).
60 */
61
62struct vm86_regs {
63/*
64 * normal regs, with special meaning for the segment descriptors..
65 */
66 long ebx;
67 long ecx;
68 long edx;
69 long esi;
70 long edi;
71 long ebp;
72 long eax;
73 long __null_ds;
74 long __null_es;
75 long __null_fs;
76 long __null_gs;
77 long orig_eax;
78 long eip;
79 unsigned short cs, __csh;
80 long eflags;
81 long esp;
82 unsigned short ss, __ssh;
83/*
84 * these are specific to v86 mode:
85 */
86 unsigned short es, __esh;
87 unsigned short ds, __dsh;
88 unsigned short fs, __fsh;
89 unsigned short gs, __gsh;
90};
91
92struct revectored_struct {
93 unsigned long __map[8]; /* 256 bits */
94};
95
96struct vm86_struct {
97 struct vm86_regs regs;
98 unsigned long flags;
99 unsigned long screen_bitmap;
100 unsigned long cpu_type;
101 struct revectored_struct int_revectored;
102 struct revectored_struct int21_revectored;
103};
104
105/*
106 * flags masks
107 */
108#define VM86_SCREEN_BITMAP 0x0001
109
110struct vm86plus_info_struct {
111 unsigned long force_return_for_pic:1;
112 unsigned long vm86dbg_active:1; /* for debugger */
113 unsigned long vm86dbg_TFpendig:1; /* for debugger */
114 unsigned long unused:28;
115 unsigned long is_vm86pus:1; /* for vm86 internal use */
116 unsigned char vm86dbg_intxxtab[32]; /* for debugger */
117};
118struct vm86plus_struct {
119 struct vm86_regs regs;
120 unsigned long flags;
121 unsigned long screen_bitmap;
122 unsigned long cpu_type;
123 struct revectored_struct int_revectored;
124 struct revectored_struct int21_revectored;
125 struct vm86plus_info_struct vm86plus;
126};
127
128
129#endif /* _UAPI_ASM_X86_VM86_H */
diff --git a/arch/x86/include/uapi/asm/vmx.h b/arch/x86/include/uapi/asm/vmx.h
new file mode 100644
index 000000000000..979d03bce135
--- /dev/null
+++ b/arch/x86/include/uapi/asm/vmx.h
@@ -0,0 +1,109 @@
1/*
2 * vmx.h: VMX Architecture related definitions
3 * Copyright (c) 2004, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
17 *
18 * A few random additions are:
19 * Copyright (C) 2006 Qumranet
20 * Avi Kivity <avi@qumranet.com>
21 * Yaniv Kamay <yaniv@qumranet.com>
22 *
23 */
24#ifndef _UAPIVMX_H
25#define _UAPIVMX_H
26
27
28#define VMX_EXIT_REASONS_FAILED_VMENTRY 0x80000000
29
30#define EXIT_REASON_EXCEPTION_NMI 0
31#define EXIT_REASON_EXTERNAL_INTERRUPT 1
32#define EXIT_REASON_TRIPLE_FAULT 2
33
34#define EXIT_REASON_PENDING_INTERRUPT 7
35#define EXIT_REASON_NMI_WINDOW 8
36#define EXIT_REASON_TASK_SWITCH 9
37#define EXIT_REASON_CPUID 10
38#define EXIT_REASON_HLT 12
39#define EXIT_REASON_INVD 13
40#define EXIT_REASON_INVLPG 14
41#define EXIT_REASON_RDPMC 15
42#define EXIT_REASON_RDTSC 16
43#define EXIT_REASON_VMCALL 18
44#define EXIT_REASON_VMCLEAR 19
45#define EXIT_REASON_VMLAUNCH 20
46#define EXIT_REASON_VMPTRLD 21
47#define EXIT_REASON_VMPTRST 22
48#define EXIT_REASON_VMREAD 23
49#define EXIT_REASON_VMRESUME 24
50#define EXIT_REASON_VMWRITE 25
51#define EXIT_REASON_VMOFF 26
52#define EXIT_REASON_VMON 27
53#define EXIT_REASON_CR_ACCESS 28
54#define EXIT_REASON_DR_ACCESS 29
55#define EXIT_REASON_IO_INSTRUCTION 30
56#define EXIT_REASON_MSR_READ 31
57#define EXIT_REASON_MSR_WRITE 32
58#define EXIT_REASON_INVALID_STATE 33
59#define EXIT_REASON_MWAIT_INSTRUCTION 36
60#define EXIT_REASON_MONITOR_INSTRUCTION 39
61#define EXIT_REASON_PAUSE_INSTRUCTION 40
62#define EXIT_REASON_MCE_DURING_VMENTRY 41
63#define EXIT_REASON_TPR_BELOW_THRESHOLD 43
64#define EXIT_REASON_APIC_ACCESS 44
65#define EXIT_REASON_EPT_VIOLATION 48
66#define EXIT_REASON_EPT_MISCONFIG 49
67#define EXIT_REASON_WBINVD 54
68#define EXIT_REASON_XSETBV 55
69#define EXIT_REASON_INVPCID 58
70
71#define VMX_EXIT_REASONS \
72 { EXIT_REASON_EXCEPTION_NMI, "EXCEPTION_NMI" }, \
73 { EXIT_REASON_EXTERNAL_INTERRUPT, "EXTERNAL_INTERRUPT" }, \
74 { EXIT_REASON_TRIPLE_FAULT, "TRIPLE_FAULT" }, \
75 { EXIT_REASON_PENDING_INTERRUPT, "PENDING_INTERRUPT" }, \
76 { EXIT_REASON_NMI_WINDOW, "NMI_WINDOW" }, \
77 { EXIT_REASON_TASK_SWITCH, "TASK_SWITCH" }, \
78 { EXIT_REASON_CPUID, "CPUID" }, \
79 { EXIT_REASON_HLT, "HLT" }, \
80 { EXIT_REASON_INVLPG, "INVLPG" }, \
81 { EXIT_REASON_RDPMC, "RDPMC" }, \
82 { EXIT_REASON_RDTSC, "RDTSC" }, \
83 { EXIT_REASON_VMCALL, "VMCALL" }, \
84 { EXIT_REASON_VMCLEAR, "VMCLEAR" }, \
85 { EXIT_REASON_VMLAUNCH, "VMLAUNCH" }, \
86 { EXIT_REASON_VMPTRLD, "VMPTRLD" }, \
87 { EXIT_REASON_VMPTRST, "VMPTRST" }, \
88 { EXIT_REASON_VMREAD, "VMREAD" }, \
89 { EXIT_REASON_VMRESUME, "VMRESUME" }, \
90 { EXIT_REASON_VMWRITE, "VMWRITE" }, \
91 { EXIT_REASON_VMOFF, "VMOFF" }, \
92 { EXIT_REASON_VMON, "VMON" }, \
93 { EXIT_REASON_CR_ACCESS, "CR_ACCESS" }, \
94 { EXIT_REASON_DR_ACCESS, "DR_ACCESS" }, \
95 { EXIT_REASON_IO_INSTRUCTION, "IO_INSTRUCTION" }, \
96 { EXIT_REASON_MSR_READ, "MSR_READ" }, \
97 { EXIT_REASON_MSR_WRITE, "MSR_WRITE" }, \
98 { EXIT_REASON_MWAIT_INSTRUCTION, "MWAIT_INSTRUCTION" }, \
99 { EXIT_REASON_MONITOR_INSTRUCTION, "MONITOR_INSTRUCTION" }, \
100 { EXIT_REASON_PAUSE_INSTRUCTION, "PAUSE_INSTRUCTION" }, \
101 { EXIT_REASON_MCE_DURING_VMENTRY, "MCE_DURING_VMENTRY" }, \
102 { EXIT_REASON_TPR_BELOW_THRESHOLD, "TPR_BELOW_THRESHOLD" }, \
103 { EXIT_REASON_APIC_ACCESS, "APIC_ACCESS" }, \
104 { EXIT_REASON_EPT_VIOLATION, "EPT_VIOLATION" }, \
105 { EXIT_REASON_EPT_MISCONFIG, "EPT_MISCONFIG" }, \
106 { EXIT_REASON_WBINVD, "WBINVD" }
107
108
109#endif /* _UAPIVMX_H */
diff --git a/arch/x86/include/uapi/asm/vsyscall.h b/arch/x86/include/uapi/asm/vsyscall.h
new file mode 100644
index 000000000000..85dc1b3825ab
--- /dev/null
+++ b/arch/x86/include/uapi/asm/vsyscall.h
@@ -0,0 +1,17 @@
1#ifndef _UAPI_ASM_X86_VSYSCALL_H
2#define _UAPI_ASM_X86_VSYSCALL_H
3
4enum vsyscall_num {
5 __NR_vgettimeofday,
6 __NR_vtime,
7 __NR_vgetcpu,
8};
9
10#define VSYSCALL_START (-10UL << 20)
11#define VSYSCALL_SIZE 1024
12#define VSYSCALL_END (-2UL << 20)
13#define VSYSCALL_MAPPED_PAGES 1
14#define VSYSCALL_ADDR(vsyscall_nr) (VSYSCALL_START+VSYSCALL_SIZE*(vsyscall_nr))
15
16
17#endif /* _UAPI_ASM_X86_VSYSCALL_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-10 09:01:08 -0500