diff options
Diffstat (limited to 'arch/x86/include/asm')
| -rw-r--r-- | arch/x86/include/asm/perf_event.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h index 8a3c75d824b7..4e40a64315c9 100644 --- a/arch/x86/include/asm/perf_event.h +++ b/arch/x86/include/asm/perf_event.h | |||
| @@ -158,6 +158,7 @@ struct x86_pmu_capability { | |||
| 158 | #define IBS_CAPS_OPCNT (1U<<4) | 158 | #define IBS_CAPS_OPCNT (1U<<4) |
| 159 | #define IBS_CAPS_BRNTRGT (1U<<5) | 159 | #define IBS_CAPS_BRNTRGT (1U<<5) |
| 160 | #define IBS_CAPS_OPCNTEXT (1U<<6) | 160 | #define IBS_CAPS_OPCNTEXT (1U<<6) |
| 161 | #define IBS_CAPS_RIPINVALIDCHK (1U<<7) | ||
| 161 | 162 | ||
| 162 | #define IBS_CAPS_DEFAULT (IBS_CAPS_AVAIL \ | 163 | #define IBS_CAPS_DEFAULT (IBS_CAPS_AVAIL \ |
| 163 | | IBS_CAPS_FETCHSAM \ | 164 | | IBS_CAPS_FETCHSAM \ |
| @@ -170,14 +171,14 @@ struct x86_pmu_capability { | |||
| 170 | #define IBSCTL_LVT_OFFSET_VALID (1ULL<<8) | 171 | #define IBSCTL_LVT_OFFSET_VALID (1ULL<<8) |
| 171 | #define IBSCTL_LVT_OFFSET_MASK 0x0F | 172 | #define IBSCTL_LVT_OFFSET_MASK 0x0F |
| 172 | 173 | ||
| 173 | /* IbsFetchCtl bits/masks */ | 174 | /* ibs fetch bits/masks */ |
| 174 | #define IBS_FETCH_RAND_EN (1ULL<<57) | 175 | #define IBS_FETCH_RAND_EN (1ULL<<57) |
| 175 | #define IBS_FETCH_VAL (1ULL<<49) | 176 | #define IBS_FETCH_VAL (1ULL<<49) |
| 176 | #define IBS_FETCH_ENABLE (1ULL<<48) | 177 | #define IBS_FETCH_ENABLE (1ULL<<48) |
| 177 | #define IBS_FETCH_CNT 0xFFFF0000ULL | 178 | #define IBS_FETCH_CNT 0xFFFF0000ULL |
| 178 | #define IBS_FETCH_MAX_CNT 0x0000FFFFULL | 179 | #define IBS_FETCH_MAX_CNT 0x0000FFFFULL |
| 179 | 180 | ||
| 180 | /* IbsOpCtl bits */ | 181 | /* ibs op bits/masks */ |
| 181 | /* lower 4 bits of the current count are ignored: */ | 182 | /* lower 4 bits of the current count are ignored: */ |
| 182 | #define IBS_OP_CUR_CNT (0xFFFF0ULL<<32) | 183 | #define IBS_OP_CUR_CNT (0xFFFF0ULL<<32) |
| 183 | #define IBS_OP_CNT_CTL (1ULL<<19) | 184 | #define IBS_OP_CNT_CTL (1ULL<<19) |
| @@ -185,6 +186,7 @@ struct x86_pmu_capability { | |||
| 185 | #define IBS_OP_ENABLE (1ULL<<17) | 186 | #define IBS_OP_ENABLE (1ULL<<17) |
| 186 | #define IBS_OP_MAX_CNT 0x0000FFFFULL | 187 | #define IBS_OP_MAX_CNT 0x0000FFFFULL |
| 187 | #define IBS_OP_MAX_CNT_EXT 0x007FFFFFULL /* not a register bit mask */ | 188 | #define IBS_OP_MAX_CNT_EXT 0x007FFFFFULL /* not a register bit mask */ |
| 189 | #define IBS_RIP_INVALID (1ULL<<38) | ||
| 188 | 190 | ||
| 189 | extern u32 get_ibs_caps(void); | 191 | extern u32 get_ibs_caps(void); |
| 190 | 192 | ||
