diff options
Diffstat (limited to 'arch/x86/include/asm/uv/uv_bau.h')
-rw-r--r-- | arch/x86/include/asm/uv/uv_bau.h | 590 |
1 files changed, 386 insertions, 204 deletions
diff --git a/arch/x86/include/asm/uv/uv_bau.h b/arch/x86/include/asm/uv/uv_bau.h index 130f1eeee5fe..a291c40efd43 100644 --- a/arch/x86/include/asm/uv/uv_bau.h +++ b/arch/x86/include/asm/uv/uv_bau.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * SGI UV Broadcast Assist Unit definitions | 6 | * SGI UV Broadcast Assist Unit definitions |
7 | * | 7 | * |
8 | * Copyright (C) 2008 Silicon Graphics, Inc. All rights reserved. | 8 | * Copyright (C) 2008-2011 Silicon Graphics, Inc. All rights reserved. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #ifndef _ASM_X86_UV_UV_BAU_H | 11 | #ifndef _ASM_X86_UV_UV_BAU_H |
@@ -35,17 +35,20 @@ | |||
35 | 35 | ||
36 | #define MAX_CPUS_PER_UVHUB 64 | 36 | #define MAX_CPUS_PER_UVHUB 64 |
37 | #define MAX_CPUS_PER_SOCKET 32 | 37 | #define MAX_CPUS_PER_SOCKET 32 |
38 | #define UV_ADP_SIZE 64 /* hardware-provided max. */ | 38 | #define ADP_SZ 64 /* hardware-provided max. */ |
39 | #define UV_CPUS_PER_ACT_STATUS 32 /* hardware-provided max. */ | 39 | #define UV_CPUS_PER_AS 32 /* hardware-provided max. */ |
40 | #define UV_ITEMS_PER_DESCRIPTOR 8 | 40 | #define ITEMS_PER_DESC 8 |
41 | /* the 'throttle' to prevent the hardware stay-busy bug */ | 41 | /* the 'throttle' to prevent the hardware stay-busy bug */ |
42 | #define MAX_BAU_CONCURRENT 3 | 42 | #define MAX_BAU_CONCURRENT 3 |
43 | #define UV_ACT_STATUS_MASK 0x3 | 43 | #define UV_ACT_STATUS_MASK 0x3 |
44 | #define UV_ACT_STATUS_SIZE 2 | 44 | #define UV_ACT_STATUS_SIZE 2 |
45 | #define UV_DISTRIBUTION_SIZE 256 | 45 | #define UV_DISTRIBUTION_SIZE 256 |
46 | #define UV_SW_ACK_NPENDING 8 | 46 | #define UV_SW_ACK_NPENDING 8 |
47 | #define UV_NET_ENDPOINT_INTD 0x38 | 47 | #define UV1_NET_ENDPOINT_INTD 0x38 |
48 | #define UV_DESC_BASE_PNODE_SHIFT 49 | 48 | #define UV2_NET_ENDPOINT_INTD 0x28 |
49 | #define UV_NET_ENDPOINT_INTD (is_uv1_hub() ? \ | ||
50 | UV1_NET_ENDPOINT_INTD : UV2_NET_ENDPOINT_INTD) | ||
51 | #define UV_DESC_PSHIFT 49 | ||
49 | #define UV_PAYLOADQ_PNODE_SHIFT 49 | 52 | #define UV_PAYLOADQ_PNODE_SHIFT 49 |
50 | #define UV_PTC_BASENAME "sgi_uv/ptc_statistics" | 53 | #define UV_PTC_BASENAME "sgi_uv/ptc_statistics" |
51 | #define UV_BAU_BASENAME "sgi_uv/bau_tunables" | 54 | #define UV_BAU_BASENAME "sgi_uv/bau_tunables" |
@@ -53,29 +56,64 @@ | |||
53 | #define UV_BAU_TUNABLES_FILE "bau_tunables" | 56 | #define UV_BAU_TUNABLES_FILE "bau_tunables" |
54 | #define WHITESPACE " \t\n" | 57 | #define WHITESPACE " \t\n" |
55 | #define uv_physnodeaddr(x) ((__pa((unsigned long)(x)) & uv_mmask)) | 58 | #define uv_physnodeaddr(x) ((__pa((unsigned long)(x)) & uv_mmask)) |
56 | #define UV_ENABLE_INTD_SOFT_ACK_MODE_SHIFT 15 | 59 | #define cpubit_isset(cpu, bau_local_cpumask) \ |
57 | #define UV_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHIFT 16 | 60 | test_bit((cpu), (bau_local_cpumask).bits) |
58 | #define UV_INTD_SOFT_ACK_TIMEOUT_PERIOD 0x0000000009UL | 61 | |
59 | /* [19:16] SOFT_ACK timeout period 19: 1 is urgency 7 17:16 1 is multiplier */ | 62 | /* [19:16] SOFT_ACK timeout period 19: 1 is urgency 7 17:16 1 is multiplier */ |
60 | #define BAU_MISC_CONTROL_MULT_MASK 3 | 63 | /* |
64 | * UV2: Bit 19 selects between | ||
65 | * (0): 10 microsecond timebase and | ||
66 | * (1): 80 microseconds | ||
67 | * we're using 655us, similar to UV1: 65 units of 10us | ||
68 | */ | ||
69 | #define UV1_INTD_SOFT_ACK_TIMEOUT_PERIOD (9UL) | ||
70 | #define UV2_INTD_SOFT_ACK_TIMEOUT_PERIOD (65*10UL) | ||
71 | |||
72 | #define UV_INTD_SOFT_ACK_TIMEOUT_PERIOD (is_uv1_hub() ? \ | ||
73 | UV1_INTD_SOFT_ACK_TIMEOUT_PERIOD : \ | ||
74 | UV2_INTD_SOFT_ACK_TIMEOUT_PERIOD) | ||
61 | 75 | ||
62 | #define UVH_AGING_PRESCALE_SEL 0x000000b000UL | 76 | #define BAU_MISC_CONTROL_MULT_MASK 3 |
77 | |||
78 | #define UVH_AGING_PRESCALE_SEL 0x000000b000UL | ||
63 | /* [30:28] URGENCY_7 an index into a table of times */ | 79 | /* [30:28] URGENCY_7 an index into a table of times */ |
64 | #define BAU_URGENCY_7_SHIFT 28 | 80 | #define BAU_URGENCY_7_SHIFT 28 |
65 | #define BAU_URGENCY_7_MASK 7 | 81 | #define BAU_URGENCY_7_MASK 7 |
66 | 82 | ||
67 | #define UVH_TRANSACTION_TIMEOUT 0x000000b200UL | 83 | #define UVH_TRANSACTION_TIMEOUT 0x000000b200UL |
68 | /* [45:40] BAU - BAU transaction timeout select - a multiplier */ | 84 | /* [45:40] BAU - BAU transaction timeout select - a multiplier */ |
69 | #define BAU_TRANS_SHIFT 40 | 85 | #define BAU_TRANS_SHIFT 40 |
70 | #define BAU_TRANS_MASK 0x3f | 86 | #define BAU_TRANS_MASK 0x3f |
87 | |||
88 | /* | ||
89 | * shorten some awkward names | ||
90 | */ | ||
91 | #define AS_PUSH_SHIFT UVH_LB_BAU_SB_ACTIVATION_CONTROL_PUSH_SHFT | ||
92 | #define SOFTACK_MSHIFT UVH_LB_BAU_MISC_CONTROL_ENABLE_INTD_SOFT_ACK_MODE_SHFT | ||
93 | #define SOFTACK_PSHIFT UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHFT | ||
94 | #define SOFTACK_TIMEOUT_PERIOD UV_INTD_SOFT_ACK_TIMEOUT_PERIOD | ||
95 | #define write_gmmr uv_write_global_mmr64 | ||
96 | #define write_lmmr uv_write_local_mmr | ||
97 | #define read_lmmr uv_read_local_mmr | ||
98 | #define read_gmmr uv_read_global_mmr64 | ||
71 | 99 | ||
72 | /* | 100 | /* |
73 | * bits in UVH_LB_BAU_SB_ACTIVATION_STATUS_0/1 | 101 | * bits in UVH_LB_BAU_SB_ACTIVATION_STATUS_0/1 |
74 | */ | 102 | */ |
75 | #define DESC_STATUS_IDLE 0 | 103 | #define DS_IDLE 0 |
76 | #define DESC_STATUS_ACTIVE 1 | 104 | #define DS_ACTIVE 1 |
77 | #define DESC_STATUS_DESTINATION_TIMEOUT 2 | 105 | #define DS_DESTINATION_TIMEOUT 2 |
78 | #define DESC_STATUS_SOURCE_TIMEOUT 3 | 106 | #define DS_SOURCE_TIMEOUT 3 |
107 | /* | ||
108 | * bits put together from HRP_LB_BAU_SB_ACTIVATION_STATUS_0/1/2 | ||
109 | * values 1 and 5 will not occur | ||
110 | */ | ||
111 | #define UV2H_DESC_IDLE 0 | ||
112 | #define UV2H_DESC_DEST_TIMEOUT 2 | ||
113 | #define UV2H_DESC_DEST_STRONG_NACK 3 | ||
114 | #define UV2H_DESC_BUSY 4 | ||
115 | #define UV2H_DESC_SOURCE_TIMEOUT 6 | ||
116 | #define UV2H_DESC_DEST_PUT_ERR 7 | ||
79 | 117 | ||
80 | /* | 118 | /* |
81 | * delay for 'plugged' timeout retries, in microseconds | 119 | * delay for 'plugged' timeout retries, in microseconds |
@@ -86,15 +124,24 @@ | |||
86 | * threshholds at which to use IPI to free resources | 124 | * threshholds at which to use IPI to free resources |
87 | */ | 125 | */ |
88 | /* after this # consecutive 'plugged' timeouts, use IPI to release resources */ | 126 | /* after this # consecutive 'plugged' timeouts, use IPI to release resources */ |
89 | #define PLUGSB4RESET 100 | 127 | #define PLUGSB4RESET 100 |
90 | /* after this many consecutive timeouts, use IPI to release resources */ | 128 | /* after this many consecutive timeouts, use IPI to release resources */ |
91 | #define TIMEOUTSB4RESET 1 | 129 | #define TIMEOUTSB4RESET 1 |
92 | /* at this number uses of IPI to release resources, giveup the request */ | 130 | /* at this number uses of IPI to release resources, giveup the request */ |
93 | #define IPI_RESET_LIMIT 1 | 131 | #define IPI_RESET_LIMIT 1 |
94 | /* after this # consecutive successes, bump up the throttle if it was lowered */ | 132 | /* after this # consecutive successes, bump up the throttle if it was lowered */ |
95 | #define COMPLETE_THRESHOLD 5 | 133 | #define COMPLETE_THRESHOLD 5 |
134 | |||
135 | #define UV_LB_SUBNODEID 0x10 | ||
96 | 136 | ||
97 | #define UV_LB_SUBNODEID 0x10 | 137 | /* these two are the same for UV1 and UV2: */ |
138 | #define UV_SA_SHFT UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHFT | ||
139 | #define UV_SA_MASK UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_MASK | ||
140 | /* 4 bits of software ack period */ | ||
141 | #define UV2_ACK_MASK 0x7UL | ||
142 | #define UV2_ACK_UNITS_SHFT 3 | ||
143 | #define UV2_LEG_SHFT UV2H_LB_BAU_MISC_CONTROL_USE_LEGACY_DESCRIPTOR_FORMATS_SHFT | ||
144 | #define UV2_EXT_SHFT UV2H_LB_BAU_MISC_CONTROL_ENABLE_EXTENDED_SB_STATUS_SHFT | ||
98 | 145 | ||
99 | /* | 146 | /* |
100 | * number of entries in the destination side payload queue | 147 | * number of entries in the destination side payload queue |
@@ -115,9 +162,16 @@ | |||
115 | /* | 162 | /* |
116 | * tuning the action when the numalink network is extremely delayed | 163 | * tuning the action when the numalink network is extremely delayed |
117 | */ | 164 | */ |
118 | #define CONGESTED_RESPONSE_US 1000 /* 'long' response time, in microseconds */ | 165 | #define CONGESTED_RESPONSE_US 1000 /* 'long' response time, in |
119 | #define CONGESTED_REPS 10 /* long delays averaged over this many broadcasts */ | 166 | microseconds */ |
120 | #define CONGESTED_PERIOD 30 /* time for the bau to be disabled, in seconds */ | 167 | #define CONGESTED_REPS 10 /* long delays averaged over |
168 | this many broadcasts */ | ||
169 | #define CONGESTED_PERIOD 30 /* time for the bau to be | ||
170 | disabled, in seconds */ | ||
171 | /* see msg_type: */ | ||
172 | #define MSG_NOOP 0 | ||
173 | #define MSG_REGULAR 1 | ||
174 | #define MSG_RETRY 2 | ||
121 | 175 | ||
122 | /* | 176 | /* |
123 | * Distribution: 32 bytes (256 bits) (bytes 0-0x1f of descriptor) | 177 | * Distribution: 32 bytes (256 bits) (bytes 0-0x1f of descriptor) |
@@ -129,8 +183,8 @@ | |||
129 | * 'base_dest_nasid' field of the header corresponds to the | 183 | * 'base_dest_nasid' field of the header corresponds to the |
130 | * destination nodeID associated with that specified bit. | 184 | * destination nodeID associated with that specified bit. |
131 | */ | 185 | */ |
132 | struct bau_target_uvhubmask { | 186 | struct bau_targ_hubmask { |
133 | unsigned long bits[BITS_TO_LONGS(UV_DISTRIBUTION_SIZE)]; | 187 | unsigned long bits[BITS_TO_LONGS(UV_DISTRIBUTION_SIZE)]; |
134 | }; | 188 | }; |
135 | 189 | ||
136 | /* | 190 | /* |
@@ -139,7 +193,7 @@ struct bau_target_uvhubmask { | |||
139 | * enough bits for max. cpu's per uvhub) | 193 | * enough bits for max. cpu's per uvhub) |
140 | */ | 194 | */ |
141 | struct bau_local_cpumask { | 195 | struct bau_local_cpumask { |
142 | unsigned long bits; | 196 | unsigned long bits; |
143 | }; | 197 | }; |
144 | 198 | ||
145 | /* | 199 | /* |
@@ -160,14 +214,14 @@ struct bau_local_cpumask { | |||
160 | * The payload is software-defined for INTD transactions | 214 | * The payload is software-defined for INTD transactions |
161 | */ | 215 | */ |
162 | struct bau_msg_payload { | 216 | struct bau_msg_payload { |
163 | unsigned long address; /* signifies a page or all TLB's | 217 | unsigned long address; /* signifies a page or all |
164 | of the cpu */ | 218 | TLB's of the cpu */ |
165 | /* 64 bits */ | 219 | /* 64 bits */ |
166 | unsigned short sending_cpu; /* filled in by sender */ | 220 | unsigned short sending_cpu; /* filled in by sender */ |
167 | /* 16 bits */ | 221 | /* 16 bits */ |
168 | unsigned short acknowledge_count;/* filled in by destination */ | 222 | unsigned short acknowledge_count; /* filled in by destination */ |
169 | /* 16 bits */ | 223 | /* 16 bits */ |
170 | unsigned int reserved1:32; /* not usable */ | 224 | unsigned int reserved1:32; /* not usable */ |
171 | }; | 225 | }; |
172 | 226 | ||
173 | 227 | ||
@@ -176,93 +230,96 @@ struct bau_msg_payload { | |||
176 | * see table 4.2.3.0.1 in broacast_assist spec. | 230 | * see table 4.2.3.0.1 in broacast_assist spec. |
177 | */ | 231 | */ |
178 | struct bau_msg_header { | 232 | struct bau_msg_header { |
179 | unsigned int dest_subnodeid:6; /* must be 0x10, for the LB */ | 233 | unsigned int dest_subnodeid:6; /* must be 0x10, for the LB */ |
180 | /* bits 5:0 */ | 234 | /* bits 5:0 */ |
181 | unsigned int base_dest_nasid:15; /* nasid of the */ | 235 | unsigned int base_dest_nasid:15; /* nasid of the first bit */ |
182 | /* bits 20:6 */ /* first bit in uvhub map */ | 236 | /* bits 20:6 */ /* in uvhub map */ |
183 | unsigned int command:8; /* message type */ | 237 | unsigned int command:8; /* message type */ |
184 | /* bits 28:21 */ | 238 | /* bits 28:21 */ |
185 | /* 0x38: SN3net EndPoint Message */ | 239 | /* 0x38: SN3net EndPoint Message */ |
186 | unsigned int rsvd_1:3; /* must be zero */ | 240 | unsigned int rsvd_1:3; /* must be zero */ |
187 | /* bits 31:29 */ | 241 | /* bits 31:29 */ |
188 | /* int will align on 32 bits */ | 242 | /* int will align on 32 bits */ |
189 | unsigned int rsvd_2:9; /* must be zero */ | 243 | unsigned int rsvd_2:9; /* must be zero */ |
190 | /* bits 40:32 */ | 244 | /* bits 40:32 */ |
191 | /* Suppl_A is 56-41 */ | 245 | /* Suppl_A is 56-41 */ |
192 | unsigned int sequence:16;/* message sequence number */ | 246 | unsigned int sequence:16; /* message sequence number */ |
193 | /* bits 56:41 */ /* becomes bytes 16-17 of msg */ | 247 | /* bits 56:41 */ /* becomes bytes 16-17 of msg */ |
194 | /* Address field (96:57) is never used as an | 248 | /* Address field (96:57) is |
195 | address (these are address bits 42:3) */ | 249 | never used as an address |
196 | 250 | (these are address bits | |
197 | unsigned int rsvd_3:1; /* must be zero */ | 251 | 42:3) */ |
252 | |||
253 | unsigned int rsvd_3:1; /* must be zero */ | ||
198 | /* bit 57 */ | 254 | /* bit 57 */ |
199 | /* address bits 27:4 are payload */ | 255 | /* address bits 27:4 are payload */ |
200 | /* these next 24 (58-81) bits become bytes 12-14 of msg */ | 256 | /* these next 24 (58-81) bits become bytes 12-14 of msg */ |
201 | |||
202 | /* bits 65:58 land in byte 12 */ | 257 | /* bits 65:58 land in byte 12 */ |
203 | unsigned int replied_to:1;/* sent as 0 by the source to byte 12 */ | 258 | unsigned int replied_to:1; /* sent as 0 by the source to |
259 | byte 12 */ | ||
204 | /* bit 58 */ | 260 | /* bit 58 */ |
205 | unsigned int msg_type:3; /* software type of the message*/ | 261 | unsigned int msg_type:3; /* software type of the |
262 | message */ | ||
206 | /* bits 61:59 */ | 263 | /* bits 61:59 */ |
207 | unsigned int canceled:1; /* message canceled, resource to be freed*/ | 264 | unsigned int canceled:1; /* message canceled, resource |
265 | is to be freed*/ | ||
208 | /* bit 62 */ | 266 | /* bit 62 */ |
209 | unsigned int payload_1a:1;/* not currently used */ | 267 | unsigned int payload_1a:1; /* not currently used */ |
210 | /* bit 63 */ | 268 | /* bit 63 */ |
211 | unsigned int payload_1b:2;/* not currently used */ | 269 | unsigned int payload_1b:2; /* not currently used */ |
212 | /* bits 65:64 */ | 270 | /* bits 65:64 */ |
213 | 271 | ||
214 | /* bits 73:66 land in byte 13 */ | 272 | /* bits 73:66 land in byte 13 */ |
215 | unsigned int payload_1ca:6;/* not currently used */ | 273 | unsigned int payload_1ca:6; /* not currently used */ |
216 | /* bits 71:66 */ | 274 | /* bits 71:66 */ |
217 | unsigned int payload_1c:2;/* not currently used */ | 275 | unsigned int payload_1c:2; /* not currently used */ |
218 | /* bits 73:72 */ | 276 | /* bits 73:72 */ |
219 | 277 | ||
220 | /* bits 81:74 land in byte 14 */ | 278 | /* bits 81:74 land in byte 14 */ |
221 | unsigned int payload_1d:6;/* not currently used */ | 279 | unsigned int payload_1d:6; /* not currently used */ |
222 | /* bits 79:74 */ | 280 | /* bits 79:74 */ |
223 | unsigned int payload_1e:2;/* not currently used */ | 281 | unsigned int payload_1e:2; /* not currently used */ |
224 | /* bits 81:80 */ | 282 | /* bits 81:80 */ |
225 | 283 | ||
226 | unsigned int rsvd_4:7; /* must be zero */ | 284 | unsigned int rsvd_4:7; /* must be zero */ |
227 | /* bits 88:82 */ | 285 | /* bits 88:82 */ |
228 | unsigned int sw_ack_flag:1;/* software acknowledge flag */ | 286 | unsigned int swack_flag:1; /* software acknowledge flag */ |
229 | /* bit 89 */ | 287 | /* bit 89 */ |
230 | /* INTD trasactions at destination are to | 288 | /* INTD trasactions at |
231 | wait for software acknowledge */ | 289 | destination are to wait for |
232 | unsigned int rsvd_5:6; /* must be zero */ | 290 | software acknowledge */ |
291 | unsigned int rsvd_5:6; /* must be zero */ | ||
233 | /* bits 95:90 */ | 292 | /* bits 95:90 */ |
234 | unsigned int rsvd_6:5; /* must be zero */ | 293 | unsigned int rsvd_6:5; /* must be zero */ |
235 | /* bits 100:96 */ | 294 | /* bits 100:96 */ |
236 | unsigned int int_both:1;/* if 1, interrupt both sockets on the uvhub */ | 295 | unsigned int int_both:1; /* if 1, interrupt both sockets |
296 | on the uvhub */ | ||
237 | /* bit 101*/ | 297 | /* bit 101*/ |
238 | unsigned int fairness:3;/* usually zero */ | 298 | unsigned int fairness:3; /* usually zero */ |
239 | /* bits 104:102 */ | 299 | /* bits 104:102 */ |
240 | unsigned int multilevel:1; /* multi-level multicast format */ | 300 | unsigned int multilevel:1; /* multi-level multicast |
301 | format */ | ||
241 | /* bit 105 */ | 302 | /* bit 105 */ |
242 | /* 0 for TLB: endpoint multi-unicast messages */ | 303 | /* 0 for TLB: endpoint multi-unicast messages */ |
243 | unsigned int chaining:1;/* next descriptor is part of this activation*/ | 304 | unsigned int chaining:1; /* next descriptor is part of |
305 | this activation*/ | ||
244 | /* bit 106 */ | 306 | /* bit 106 */ |
245 | unsigned int rsvd_7:21; /* must be zero */ | 307 | unsigned int rsvd_7:21; /* must be zero */ |
246 | /* bits 127:107 */ | 308 | /* bits 127:107 */ |
247 | }; | 309 | }; |
248 | 310 | ||
249 | /* see msg_type: */ | ||
250 | #define MSG_NOOP 0 | ||
251 | #define MSG_REGULAR 1 | ||
252 | #define MSG_RETRY 2 | ||
253 | |||
254 | /* | 311 | /* |
255 | * The activation descriptor: | 312 | * The activation descriptor: |
256 | * The format of the message to send, plus all accompanying control | 313 | * The format of the message to send, plus all accompanying control |
257 | * Should be 64 bytes | 314 | * Should be 64 bytes |
258 | */ | 315 | */ |
259 | struct bau_desc { | 316 | struct bau_desc { |
260 | struct bau_target_uvhubmask distribution; | 317 | struct bau_targ_hubmask distribution; |
261 | /* | 318 | /* |
262 | * message template, consisting of header and payload: | 319 | * message template, consisting of header and payload: |
263 | */ | 320 | */ |
264 | struct bau_msg_header header; | 321 | struct bau_msg_header header; |
265 | struct bau_msg_payload payload; | 322 | struct bau_msg_payload payload; |
266 | }; | 323 | }; |
267 | /* | 324 | /* |
268 | * -payload-- ---------header------ | 325 | * -payload-- ---------header------ |
@@ -281,59 +338,51 @@ struct bau_desc { | |||
281 | * are 32 bytes (2 micropackets) (256 bits) in length, but contain only 17 | 338 | * are 32 bytes (2 micropackets) (256 bits) in length, but contain only 17 |
282 | * bytes of usable data, including the sw ack vector in byte 15 (bits 127:120) | 339 | * bytes of usable data, including the sw ack vector in byte 15 (bits 127:120) |
283 | * (12 bytes come from bau_msg_payload, 3 from payload_1, 2 from | 340 | * (12 bytes come from bau_msg_payload, 3 from payload_1, 2 from |
284 | * sw_ack_vector and payload_2) | 341 | * swack_vec and payload_2) |
285 | * "Enabling Software Acknowledgment mode (see Section 4.3.3 Software | 342 | * "Enabling Software Acknowledgment mode (see Section 4.3.3 Software |
286 | * Acknowledge Processing) also selects 32 byte (17 bytes usable) payload | 343 | * Acknowledge Processing) also selects 32 byte (17 bytes usable) payload |
287 | * operation." | 344 | * operation." |
288 | */ | 345 | */ |
289 | struct bau_payload_queue_entry { | 346 | struct bau_pq_entry { |
290 | unsigned long address; /* signifies a page or all TLB's | 347 | unsigned long address; /* signifies a page or all TLB's |
291 | of the cpu */ | 348 | of the cpu */ |
292 | /* 64 bits, bytes 0-7 */ | 349 | /* 64 bits, bytes 0-7 */ |
293 | 350 | unsigned short sending_cpu; /* cpu that sent the message */ | |
294 | unsigned short sending_cpu; /* cpu that sent the message */ | ||
295 | /* 16 bits, bytes 8-9 */ | 351 | /* 16 bits, bytes 8-9 */ |
296 | 352 | unsigned short acknowledge_count; /* filled in by destination */ | |
297 | unsigned short acknowledge_count; /* filled in by destination */ | ||
298 | /* 16 bits, bytes 10-11 */ | 353 | /* 16 bits, bytes 10-11 */ |
299 | |||
300 | /* these next 3 bytes come from bits 58-81 of the message header */ | 354 | /* these next 3 bytes come from bits 58-81 of the message header */ |
301 | unsigned short replied_to:1; /* sent as 0 by the source */ | 355 | unsigned short replied_to:1; /* sent as 0 by the source */ |
302 | unsigned short msg_type:3; /* software message type */ | 356 | unsigned short msg_type:3; /* software message type */ |
303 | unsigned short canceled:1; /* sent as 0 by the source */ | 357 | unsigned short canceled:1; /* sent as 0 by the source */ |
304 | unsigned short unused1:3; /* not currently using */ | 358 | unsigned short unused1:3; /* not currently using */ |
305 | /* byte 12 */ | 359 | /* byte 12 */ |
306 | 360 | unsigned char unused2a; /* not currently using */ | |
307 | unsigned char unused2a; /* not currently using */ | ||
308 | /* byte 13 */ | 361 | /* byte 13 */ |
309 | unsigned char unused2; /* not currently using */ | 362 | unsigned char unused2; /* not currently using */ |
310 | /* byte 14 */ | 363 | /* byte 14 */ |
311 | 364 | unsigned char swack_vec; /* filled in by the hardware */ | |
312 | unsigned char sw_ack_vector; /* filled in by the hardware */ | ||
313 | /* byte 15 (bits 127:120) */ | 365 | /* byte 15 (bits 127:120) */ |
314 | 366 | unsigned short sequence; /* message sequence number */ | |
315 | unsigned short sequence; /* message sequence number */ | ||
316 | /* bytes 16-17 */ | 367 | /* bytes 16-17 */ |
317 | unsigned char unused4[2]; /* not currently using bytes 18-19 */ | 368 | unsigned char unused4[2]; /* not currently using bytes 18-19 */ |
318 | /* bytes 18-19 */ | 369 | /* bytes 18-19 */ |
319 | 370 | int number_of_cpus; /* filled in at destination */ | |
320 | int number_of_cpus; /* filled in at destination */ | ||
321 | /* 32 bits, bytes 20-23 (aligned) */ | 371 | /* 32 bits, bytes 20-23 (aligned) */ |
322 | 372 | unsigned char unused5[8]; /* not using */ | |
323 | unsigned char unused5[8]; /* not using */ | ||
324 | /* bytes 24-31 */ | 373 | /* bytes 24-31 */ |
325 | }; | 374 | }; |
326 | 375 | ||
327 | struct msg_desc { | 376 | struct msg_desc { |
328 | struct bau_payload_queue_entry *msg; | 377 | struct bau_pq_entry *msg; |
329 | int msg_slot; | 378 | int msg_slot; |
330 | int sw_ack_slot; | 379 | int swack_slot; |
331 | struct bau_payload_queue_entry *va_queue_first; | 380 | struct bau_pq_entry *queue_first; |
332 | struct bau_payload_queue_entry *va_queue_last; | 381 | struct bau_pq_entry *queue_last; |
333 | }; | 382 | }; |
334 | 383 | ||
335 | struct reset_args { | 384 | struct reset_args { |
336 | int sender; | 385 | int sender; |
337 | }; | 386 | }; |
338 | 387 | ||
339 | /* | 388 | /* |
@@ -341,112 +390,226 @@ struct reset_args { | |||
341 | */ | 390 | */ |
342 | struct ptc_stats { | 391 | struct ptc_stats { |
343 | /* sender statistics */ | 392 | /* sender statistics */ |
344 | unsigned long s_giveup; /* number of fall backs to IPI-style flushes */ | 393 | unsigned long s_giveup; /* number of fall backs to |
345 | unsigned long s_requestor; /* number of shootdown requests */ | 394 | IPI-style flushes */ |
346 | unsigned long s_stimeout; /* source side timeouts */ | 395 | unsigned long s_requestor; /* number of shootdown |
347 | unsigned long s_dtimeout; /* destination side timeouts */ | 396 | requests */ |
348 | unsigned long s_time; /* time spent in sending side */ | 397 | unsigned long s_stimeout; /* source side timeouts */ |
349 | unsigned long s_retriesok; /* successful retries */ | 398 | unsigned long s_dtimeout; /* destination side timeouts */ |
350 | unsigned long s_ntargcpu; /* total number of cpu's targeted */ | 399 | unsigned long s_time; /* time spent in sending side */ |
351 | unsigned long s_ntargself; /* times the sending cpu was targeted */ | 400 | unsigned long s_retriesok; /* successful retries */ |
352 | unsigned long s_ntarglocals; /* targets of cpus on the local blade */ | 401 | unsigned long s_ntargcpu; /* total number of cpu's |
353 | unsigned long s_ntargremotes; /* targets of cpus on remote blades */ | 402 | targeted */ |
354 | unsigned long s_ntarglocaluvhub; /* targets of the local hub */ | 403 | unsigned long s_ntargself; /* times the sending cpu was |
355 | unsigned long s_ntargremoteuvhub; /* remotes hubs targeted */ | 404 | targeted */ |
356 | unsigned long s_ntarguvhub; /* total number of uvhubs targeted */ | 405 | unsigned long s_ntarglocals; /* targets of cpus on the local |
357 | unsigned long s_ntarguvhub16; /* number of times target hubs >= 16*/ | 406 | blade */ |
358 | unsigned long s_ntarguvhub8; /* number of times target hubs >= 8 */ | 407 | unsigned long s_ntargremotes; /* targets of cpus on remote |
359 | unsigned long s_ntarguvhub4; /* number of times target hubs >= 4 */ | 408 | blades */ |
360 | unsigned long s_ntarguvhub2; /* number of times target hubs >= 2 */ | 409 | unsigned long s_ntarglocaluvhub; /* targets of the local hub */ |
361 | unsigned long s_ntarguvhub1; /* number of times target hubs == 1 */ | 410 | unsigned long s_ntargremoteuvhub; /* remotes hubs targeted */ |
362 | unsigned long s_resets_plug; /* ipi-style resets from plug state */ | 411 | unsigned long s_ntarguvhub; /* total number of uvhubs |
363 | unsigned long s_resets_timeout; /* ipi-style resets from timeouts */ | 412 | targeted */ |
364 | unsigned long s_busy; /* status stayed busy past s/w timer */ | 413 | unsigned long s_ntarguvhub16; /* number of times target |
365 | unsigned long s_throttles; /* waits in throttle */ | 414 | hubs >= 16*/ |
366 | unsigned long s_retry_messages; /* retry broadcasts */ | 415 | unsigned long s_ntarguvhub8; /* number of times target |
367 | unsigned long s_bau_reenabled; /* for bau enable/disable */ | 416 | hubs >= 8 */ |
368 | unsigned long s_bau_disabled; /* for bau enable/disable */ | 417 | unsigned long s_ntarguvhub4; /* number of times target |
418 | hubs >= 4 */ | ||
419 | unsigned long s_ntarguvhub2; /* number of times target | ||
420 | hubs >= 2 */ | ||
421 | unsigned long s_ntarguvhub1; /* number of times target | ||
422 | hubs == 1 */ | ||
423 | unsigned long s_resets_plug; /* ipi-style resets from plug | ||
424 | state */ | ||
425 | unsigned long s_resets_timeout; /* ipi-style resets from | ||
426 | timeouts */ | ||
427 | unsigned long s_busy; /* status stayed busy past | ||
428 | s/w timer */ | ||
429 | unsigned long s_throttles; /* waits in throttle */ | ||
430 | unsigned long s_retry_messages; /* retry broadcasts */ | ||
431 | unsigned long s_bau_reenabled; /* for bau enable/disable */ | ||
432 | unsigned long s_bau_disabled; /* for bau enable/disable */ | ||
369 | /* destination statistics */ | 433 | /* destination statistics */ |
370 | unsigned long d_alltlb; /* times all tlb's on this cpu were flushed */ | 434 | unsigned long d_alltlb; /* times all tlb's on this |
371 | unsigned long d_onetlb; /* times just one tlb on this cpu was flushed */ | 435 | cpu were flushed */ |
372 | unsigned long d_multmsg; /* interrupts with multiple messages */ | 436 | unsigned long d_onetlb; /* times just one tlb on this |
373 | unsigned long d_nomsg; /* interrupts with no message */ | 437 | cpu was flushed */ |
374 | unsigned long d_time; /* time spent on destination side */ | 438 | unsigned long d_multmsg; /* interrupts with multiple |
375 | unsigned long d_requestee; /* number of messages processed */ | 439 | messages */ |
376 | unsigned long d_retries; /* number of retry messages processed */ | 440 | unsigned long d_nomsg; /* interrupts with no message */ |
377 | unsigned long d_canceled; /* number of messages canceled by retries */ | 441 | unsigned long d_time; /* time spent on destination |
378 | unsigned long d_nocanceled; /* retries that found nothing to cancel */ | 442 | side */ |
379 | unsigned long d_resets; /* number of ipi-style requests processed */ | 443 | unsigned long d_requestee; /* number of messages |
380 | unsigned long d_rcanceled; /* number of messages canceled by resets */ | 444 | processed */ |
445 | unsigned long d_retries; /* number of retry messages | ||
446 | processed */ | ||
447 | unsigned long d_canceled; /* number of messages canceled | ||
448 | by retries */ | ||
449 | unsigned long d_nocanceled; /* retries that found nothing | ||
450 | to cancel */ | ||
451 | unsigned long d_resets; /* number of ipi-style requests | ||
452 | processed */ | ||
453 | unsigned long d_rcanceled; /* number of messages canceled | ||
454 | by resets */ | ||
455 | }; | ||
456 | |||
457 | struct tunables { | ||
458 | int *tunp; | ||
459 | int deflt; | ||
381 | }; | 460 | }; |
382 | 461 | ||
383 | struct hub_and_pnode { | 462 | struct hub_and_pnode { |
384 | short uvhub; | 463 | short uvhub; |
385 | short pnode; | 464 | short pnode; |
386 | }; | 465 | }; |
466 | |||
467 | struct socket_desc { | ||
468 | short num_cpus; | ||
469 | short cpu_number[MAX_CPUS_PER_SOCKET]; | ||
470 | }; | ||
471 | |||
472 | struct uvhub_desc { | ||
473 | unsigned short socket_mask; | ||
474 | short num_cpus; | ||
475 | short uvhub; | ||
476 | short pnode; | ||
477 | struct socket_desc socket[2]; | ||
478 | }; | ||
479 | |||
387 | /* | 480 | /* |
388 | * one per-cpu; to locate the software tables | 481 | * one per-cpu; to locate the software tables |
389 | */ | 482 | */ |
390 | struct bau_control { | 483 | struct bau_control { |
391 | struct bau_desc *descriptor_base; | 484 | struct bau_desc *descriptor_base; |
392 | struct bau_payload_queue_entry *va_queue_first; | 485 | struct bau_pq_entry *queue_first; |
393 | struct bau_payload_queue_entry *va_queue_last; | 486 | struct bau_pq_entry *queue_last; |
394 | struct bau_payload_queue_entry *bau_msg_head; | 487 | struct bau_pq_entry *bau_msg_head; |
395 | struct bau_control *uvhub_master; | 488 | struct bau_control *uvhub_master; |
396 | struct bau_control *socket_master; | 489 | struct bau_control *socket_master; |
397 | struct ptc_stats *statp; | 490 | struct ptc_stats *statp; |
398 | unsigned long timeout_interval; | 491 | unsigned long timeout_interval; |
399 | unsigned long set_bau_on_time; | 492 | unsigned long set_bau_on_time; |
400 | atomic_t active_descriptor_count; | 493 | atomic_t active_descriptor_count; |
401 | int plugged_tries; | 494 | int plugged_tries; |
402 | int timeout_tries; | 495 | int timeout_tries; |
403 | int ipi_attempts; | 496 | int ipi_attempts; |
404 | int conseccompletes; | 497 | int conseccompletes; |
405 | int baudisabled; | 498 | int baudisabled; |
406 | int set_bau_off; | 499 | int set_bau_off; |
407 | short cpu; | 500 | short cpu; |
408 | short osnode; | 501 | short osnode; |
409 | short uvhub_cpu; | 502 | short uvhub_cpu; |
410 | short uvhub; | 503 | short uvhub; |
411 | short cpus_in_socket; | 504 | short cpus_in_socket; |
412 | short cpus_in_uvhub; | 505 | short cpus_in_uvhub; |
413 | short partition_base_pnode; | 506 | short partition_base_pnode; |
414 | unsigned short message_number; | 507 | unsigned short message_number; |
415 | unsigned short uvhub_quiesce; | 508 | unsigned short uvhub_quiesce; |
416 | short socket_acknowledge_count[DEST_Q_SIZE]; | 509 | short socket_acknowledge_count[DEST_Q_SIZE]; |
417 | cycles_t send_message; | 510 | cycles_t send_message; |
418 | spinlock_t uvhub_lock; | 511 | spinlock_t uvhub_lock; |
419 | spinlock_t queue_lock; | 512 | spinlock_t queue_lock; |
420 | /* tunables */ | 513 | /* tunables */ |
421 | int max_bau_concurrent; | 514 | int max_concurr; |
422 | int max_bau_concurrent_constant; | 515 | int max_concurr_const; |
423 | int plugged_delay; | 516 | int plugged_delay; |
424 | int plugsb4reset; | 517 | int plugsb4reset; |
425 | int timeoutsb4reset; | 518 | int timeoutsb4reset; |
426 | int ipi_reset_limit; | 519 | int ipi_reset_limit; |
427 | int complete_threshold; | 520 | int complete_threshold; |
428 | int congested_response_us; | 521 | int cong_response_us; |
429 | int congested_reps; | 522 | int cong_reps; |
430 | int congested_period; | 523 | int cong_period; |
431 | cycles_t period_time; | 524 | cycles_t period_time; |
432 | long period_requests; | 525 | long period_requests; |
433 | struct hub_and_pnode *target_hub_and_pnode; | 526 | struct hub_and_pnode *thp; |
434 | }; | 527 | }; |
435 | 528 | ||
436 | static inline int bau_uvhub_isset(int uvhub, struct bau_target_uvhubmask *dstp) | 529 | static unsigned long read_mmr_uv2_status(void) |
530 | { | ||
531 | return read_lmmr(UV2H_LB_BAU_SB_ACTIVATION_STATUS_2); | ||
532 | } | ||
533 | |||
534 | static void write_mmr_data_broadcast(int pnode, unsigned long mmr_image) | ||
535 | { | ||
536 | write_gmmr(pnode, UVH_BAU_DATA_BROADCAST, mmr_image); | ||
537 | } | ||
538 | |||
539 | static void write_mmr_descriptor_base(int pnode, unsigned long mmr_image) | ||
540 | { | ||
541 | write_gmmr(pnode, UVH_LB_BAU_SB_DESCRIPTOR_BASE, mmr_image); | ||
542 | } | ||
543 | |||
544 | static void write_mmr_activation(unsigned long index) | ||
545 | { | ||
546 | write_lmmr(UVH_LB_BAU_SB_ACTIVATION_CONTROL, index); | ||
547 | } | ||
548 | |||
549 | static void write_gmmr_activation(int pnode, unsigned long mmr_image) | ||
550 | { | ||
551 | write_gmmr(pnode, UVH_LB_BAU_SB_ACTIVATION_CONTROL, mmr_image); | ||
552 | } | ||
553 | |||
554 | static void write_mmr_payload_first(int pnode, unsigned long mmr_image) | ||
555 | { | ||
556 | write_gmmr(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST, mmr_image); | ||
557 | } | ||
558 | |||
559 | static void write_mmr_payload_tail(int pnode, unsigned long mmr_image) | ||
560 | { | ||
561 | write_gmmr(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL, mmr_image); | ||
562 | } | ||
563 | |||
564 | static void write_mmr_payload_last(int pnode, unsigned long mmr_image) | ||
565 | { | ||
566 | write_gmmr(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST, mmr_image); | ||
567 | } | ||
568 | |||
569 | static void write_mmr_misc_control(int pnode, unsigned long mmr_image) | ||
570 | { | ||
571 | write_gmmr(pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image); | ||
572 | } | ||
573 | |||
574 | static unsigned long read_mmr_misc_control(int pnode) | ||
575 | { | ||
576 | return read_gmmr(pnode, UVH_LB_BAU_MISC_CONTROL); | ||
577 | } | ||
578 | |||
579 | static void write_mmr_sw_ack(unsigned long mr) | ||
580 | { | ||
581 | uv_write_local_mmr(UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS, mr); | ||
582 | } | ||
583 | |||
584 | static unsigned long read_mmr_sw_ack(void) | ||
585 | { | ||
586 | return read_lmmr(UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE); | ||
587 | } | ||
588 | |||
589 | static unsigned long read_gmmr_sw_ack(int pnode) | ||
590 | { | ||
591 | return read_gmmr(pnode, UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE); | ||
592 | } | ||
593 | |||
594 | static void write_mmr_data_config(int pnode, unsigned long mr) | ||
595 | { | ||
596 | uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG, mr); | ||
597 | } | ||
598 | |||
599 | static inline int bau_uvhub_isset(int uvhub, struct bau_targ_hubmask *dstp) | ||
437 | { | 600 | { |
438 | return constant_test_bit(uvhub, &dstp->bits[0]); | 601 | return constant_test_bit(uvhub, &dstp->bits[0]); |
439 | } | 602 | } |
440 | static inline void bau_uvhub_set(int pnode, struct bau_target_uvhubmask *dstp) | 603 | static inline void bau_uvhub_set(int pnode, struct bau_targ_hubmask *dstp) |
441 | { | 604 | { |
442 | __set_bit(pnode, &dstp->bits[0]); | 605 | __set_bit(pnode, &dstp->bits[0]); |
443 | } | 606 | } |
444 | static inline void bau_uvhubs_clear(struct bau_target_uvhubmask *dstp, | 607 | static inline void bau_uvhubs_clear(struct bau_targ_hubmask *dstp, |
445 | int nbits) | 608 | int nbits) |
446 | { | 609 | { |
447 | bitmap_zero(&dstp->bits[0], nbits); | 610 | bitmap_zero(&dstp->bits[0], nbits); |
448 | } | 611 | } |
449 | static inline int bau_uvhub_weight(struct bau_target_uvhubmask *dstp) | 612 | static inline int bau_uvhub_weight(struct bau_targ_hubmask *dstp) |
450 | { | 613 | { |
451 | return bitmap_weight((unsigned long *)&dstp->bits[0], | 614 | return bitmap_weight((unsigned long *)&dstp->bits[0], |
452 | UV_DISTRIBUTION_SIZE); | 615 | UV_DISTRIBUTION_SIZE); |
@@ -457,9 +620,6 @@ static inline void bau_cpubits_clear(struct bau_local_cpumask *dstp, int nbits) | |||
457 | bitmap_zero(&dstp->bits, nbits); | 620 | bitmap_zero(&dstp->bits, nbits); |
458 | } | 621 | } |
459 | 622 | ||
460 | #define cpubit_isset(cpu, bau_local_cpumask) \ | ||
461 | test_bit((cpu), (bau_local_cpumask).bits) | ||
462 | |||
463 | extern void uv_bau_message_intr1(void); | 623 | extern void uv_bau_message_intr1(void); |
464 | extern void uv_bau_timeout_intr1(void); | 624 | extern void uv_bau_timeout_intr1(void); |
465 | 625 | ||
@@ -467,7 +627,7 @@ struct atomic_short { | |||
467 | short counter; | 627 | short counter; |
468 | }; | 628 | }; |
469 | 629 | ||
470 | /** | 630 | /* |
471 | * atomic_read_short - read a short atomic variable | 631 | * atomic_read_short - read a short atomic variable |
472 | * @v: pointer of type atomic_short | 632 | * @v: pointer of type atomic_short |
473 | * | 633 | * |
@@ -478,14 +638,14 @@ static inline int atomic_read_short(const struct atomic_short *v) | |||
478 | return v->counter; | 638 | return v->counter; |
479 | } | 639 | } |
480 | 640 | ||
481 | /** | 641 | /* |
482 | * atomic_add_short_return - add and return a short int | 642 | * atom_asr - add and return a short int |
483 | * @i: short value to add | 643 | * @i: short value to add |
484 | * @v: pointer of type atomic_short | 644 | * @v: pointer of type atomic_short |
485 | * | 645 | * |
486 | * Atomically adds @i to @v and returns @i + @v | 646 | * Atomically adds @i to @v and returns @i + @v |
487 | */ | 647 | */ |
488 | static inline int atomic_add_short_return(short i, struct atomic_short *v) | 648 | static inline int atom_asr(short i, struct atomic_short *v) |
489 | { | 649 | { |
490 | short __i = i; | 650 | short __i = i; |
491 | asm volatile(LOCK_PREFIX "xaddw %0, %1" | 651 | asm volatile(LOCK_PREFIX "xaddw %0, %1" |
@@ -494,4 +654,26 @@ static inline int atomic_add_short_return(short i, struct atomic_short *v) | |||
494 | return i + __i; | 654 | return i + __i; |
495 | } | 655 | } |
496 | 656 | ||
657 | /* | ||
658 | * conditionally add 1 to *v, unless *v is >= u | ||
659 | * return 0 if we cannot add 1 to *v because it is >= u | ||
660 | * return 1 if we can add 1 to *v because it is < u | ||
661 | * the add is atomic | ||
662 | * | ||
663 | * This is close to atomic_add_unless(), but this allows the 'u' value | ||
664 | * to be lowered below the current 'v'. atomic_add_unless can only stop | ||
665 | * on equal. | ||
666 | */ | ||
667 | static inline int atomic_inc_unless_ge(spinlock_t *lock, atomic_t *v, int u) | ||
668 | { | ||
669 | spin_lock(lock); | ||
670 | if (atomic_read(v) >= u) { | ||
671 | spin_unlock(lock); | ||
672 | return 0; | ||
673 | } | ||
674 | atomic_inc(v); | ||
675 | spin_unlock(lock); | ||
676 | return 1; | ||
677 | } | ||
678 | |||
497 | #endif /* _ASM_X86_UV_UV_BAU_H */ | 679 | #endif /* _ASM_X86_UV_UV_BAU_H */ |