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-rw-r--r--arch/x86/include/asm/processor.h33
1 files changed, 0 insertions, 33 deletions
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index a092a0cce0b7..ec1c93588cef 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -579,39 +579,6 @@ static inline void load_sp0(struct tss_struct *tss,
579#define set_iopl_mask native_set_iopl_mask 579#define set_iopl_mask native_set_iopl_mask
580#endif /* CONFIG_PARAVIRT */ 580#endif /* CONFIG_PARAVIRT */
581 581
582/*
583 * Save the cr4 feature set we're using (ie
584 * Pentium 4MB enable and PPro Global page
585 * enable), so that any CPU's that boot up
586 * after us can get the correct flags.
587 */
588extern unsigned long mmu_cr4_features;
589extern u32 *trampoline_cr4_features;
590
591static inline void set_in_cr4(unsigned long mask)
592{
593 unsigned long cr4;
594
595 mmu_cr4_features |= mask;
596 if (trampoline_cr4_features)
597 *trampoline_cr4_features = mmu_cr4_features;
598 cr4 = read_cr4();
599 cr4 |= mask;
600 write_cr4(cr4);
601}
602
603static inline void clear_in_cr4(unsigned long mask)
604{
605 unsigned long cr4;
606
607 mmu_cr4_features &= ~mask;
608 if (trampoline_cr4_features)
609 *trampoline_cr4_features = mmu_cr4_features;
610 cr4 = read_cr4();
611 cr4 &= ~mask;
612 write_cr4(cr4);
613}
614
615typedef struct { 582typedef struct {
616 unsigned long seg; 583 unsigned long seg;
617} mm_segment_t; 584} mm_segment_t;