1 files changed, 10 insertions, 8 deletions

diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index e75daac64962..91d323f47364 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -30,6 +30,7 @@ struct mm_struct;
 #include <linux/math64.h>
 #include <linux/init.h>
 
+#define HBP_NUM 4
 /*
  * Default implementation of macro that returns current
  * instruction pointer ("program counter").
@@ -182,7 +183,7 @@ static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
                                 unsigned int *ecx, unsigned int *edx)
 {
         /* ecx is often an input as well as an output. */
-        asm("cpuid"
+        asm volatile("cpuid"
             : "=a" (*eax),
               "=b" (*ebx),
               "=c" (*ecx),
@@ -424,6 +425,8 @@ extern unsigned int xstate_size;
 extern void free_thread_xstate(struct task_struct *);
 extern struct kmem_cache *task_xstate_cachep;
 
+struct perf_event;
+
 struct thread_struct {
         /* Cached TLS descriptors: */
         struct desc_struct      tls_array[GDT_ENTRY_TLS_ENTRIES];
@@ -445,13 +448,12 @@ struct thread_struct {
         unsigned long           fs;
 #endif
         unsigned long           gs;
-        /* Hardware debugging registers: */
-        unsigned long           debugreg0;
-        unsigned long           debugreg1;
-        unsigned long           debugreg2;
-        unsigned long           debugreg3;
-        unsigned long           debugreg6;
-        unsigned long           debugreg7;
+        /* Save middle states of ptrace breakpoints */
+        struct perf_event       *ptrace_bps[HBP_NUM];
+        /* Debug status used for traps, single steps, etc... */
+        unsigned long           debugreg6;
+        /* Keep track of the exact dr7 value set by the user */
+        unsigned long           ptrace_dr7;
         /* Fault info: */
         unsigned long           cr2;
         unsigned long           trap_no;