diff options
Diffstat (limited to 'arch/x86/include/asm/msr-index.h')
-rw-r--r-- | arch/x86/include/asm/msr-index.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 4ffe09b2ad75..4604e6a54d36 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h | |||
@@ -12,6 +12,7 @@ | |||
12 | #define MSR_FS_BASE 0xc0000100 /* 64bit FS base */ | 12 | #define MSR_FS_BASE 0xc0000100 /* 64bit FS base */ |
13 | #define MSR_GS_BASE 0xc0000101 /* 64bit GS base */ | 13 | #define MSR_GS_BASE 0xc0000101 /* 64bit GS base */ |
14 | #define MSR_KERNEL_GS_BASE 0xc0000102 /* SwapGS GS shadow */ | 14 | #define MSR_KERNEL_GS_BASE 0xc0000102 /* SwapGS GS shadow */ |
15 | #define MSR_TSC_AUX 0xc0000103 /* Auxiliary TSC */ | ||
15 | 16 | ||
16 | /* EFER bits: */ | 17 | /* EFER bits: */ |
17 | #define _EFER_SCE 0 /* SYSCALL/SYSRET */ | 18 | #define _EFER_SCE 0 /* SYSCALL/SYSRET */ |
@@ -104,6 +105,8 @@ | |||
104 | #define MSR_AMD64_PATCH_LEVEL 0x0000008b | 105 | #define MSR_AMD64_PATCH_LEVEL 0x0000008b |
105 | #define MSR_AMD64_NB_CFG 0xc001001f | 106 | #define MSR_AMD64_NB_CFG 0xc001001f |
106 | #define MSR_AMD64_PATCH_LOADER 0xc0010020 | 107 | #define MSR_AMD64_PATCH_LOADER 0xc0010020 |
108 | #define MSR_AMD64_OSVW_ID_LENGTH 0xc0010140 | ||
109 | #define MSR_AMD64_OSVW_STATUS 0xc0010141 | ||
107 | #define MSR_AMD64_IBSFETCHCTL 0xc0011030 | 110 | #define MSR_AMD64_IBSFETCHCTL 0xc0011030 |
108 | #define MSR_AMD64_IBSFETCHLINAD 0xc0011031 | 111 | #define MSR_AMD64_IBSFETCHLINAD 0xc0011031 |
109 | #define MSR_AMD64_IBSFETCHPHYSAD 0xc0011032 | 112 | #define MSR_AMD64_IBSFETCHPHYSAD 0xc0011032 |
@@ -123,6 +126,7 @@ | |||
123 | #define FAM10H_MMIO_CONF_BUSRANGE_SHIFT 2 | 126 | #define FAM10H_MMIO_CONF_BUSRANGE_SHIFT 2 |
124 | #define FAM10H_MMIO_CONF_BASE_MASK 0xfffffff | 127 | #define FAM10H_MMIO_CONF_BASE_MASK 0xfffffff |
125 | #define FAM10H_MMIO_CONF_BASE_SHIFT 20 | 128 | #define FAM10H_MMIO_CONF_BASE_SHIFT 20 |
129 | #define MSR_FAM10H_NODE_ID 0xc001100c | ||
126 | 130 | ||
127 | /* K8 MSRs */ | 131 | /* K8 MSRs */ |
128 | #define MSR_K8_TOP_MEM1 0xc001001a | 132 | #define MSR_K8_TOP_MEM1 0xc001001a |